From bba0cddfadcb744e8a6fae27d57ba8d3995eaf64 Mon Sep 17 00:00:00 2001 From: Wade Fife Date: Fri, 8 May 2020 15:50:52 -0500 Subject: x300: Expand DRAM address space to 1G The address ranges configured for the AXI interconnect IP limited the amount of accessible DRAM to two 32 MB regions. This change makes the full 1G available to all DRAM ports. --- .../x300/ip/axi_intercon_2x64_128_bd/axi_intercon_2x64_128_bd.bd | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-) (limited to 'fpga/usrp3') diff --git a/fpga/usrp3/top/x300/ip/axi_intercon_2x64_128_bd/axi_intercon_2x64_128_bd.bd b/fpga/usrp3/top/x300/ip/axi_intercon_2x64_128_bd/axi_intercon_2x64_128_bd.bd index 962d94246..c8fa0d228 100755 --- a/fpga/usrp3/top/x300/ip/axi_intercon_2x64_128_bd/axi_intercon_2x64_128_bd.bd +++ b/fpga/usrp3/top/x300/ip/axi_intercon_2x64_128_bd/axi_intercon_2x64_128_bd.bd @@ -1078,8 +1078,8 @@ SEG_M00_AXI_Reg /M00_AXI/Reg - 0x02000000 - 32M + 0x00000000 + 1G @@ -1092,7 +1092,7 @@ SEG_M00_AXI_Reg /M00_AXI/Reg 0x00000000 - 32M + 1G -- cgit v1.2.3