From b6c7e99830f10c21262247cafa3e077fe3f54119 Mon Sep 17 00:00:00 2001 From: michael-west Date: Sun, 13 Feb 2022 18:12:30 -0800 Subject: fpga: rfnoc: Fix PPS edge detection Make timekeeper module sample rising edge instead of falling edge of PPS signal. Signed-off-by: michael-west --- fpga/usrp3/lib/rfnoc/utils/timekeeper.v | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'fpga/usrp3') diff --git a/fpga/usrp3/lib/rfnoc/utils/timekeeper.v b/fpga/usrp3/lib/rfnoc/utils/timekeeper.v index 2b43c7ee6..436118861 100644 --- a/fpga/usrp3/lib/rfnoc/utils/timekeeper.v +++ b/fpga/usrp3/lib/rfnoc/utils/timekeeper.v @@ -244,7 +244,7 @@ module timekeeper #( pps_edge <= 0; end else begin pps_del <= pps; - pps_edge<= pps_del & ~pps; + pps_edge<= pps & ~pps_del; end end -- cgit v1.2.3