From ab4b0c6e0eacbc68df3f211ce27790b1cfbc002f Mon Sep 17 00:00:00 2001 From: Wade Fife Date: Fri, 10 Sep 2021 15:50:13 -0500 Subject: fpga: n3xx: Update synchronizer constraint --- fpga/usrp3/top/n3xx/mb_timing.xdc | 5 ++--- 1 file changed, 2 insertions(+), 3 deletions(-) (limited to 'fpga/usrp3') diff --git a/fpga/usrp3/top/n3xx/mb_timing.xdc b/fpga/usrp3/top/n3xx/mb_timing.xdc index 6aa3f8132..95265acee 100644 --- a/fpga/usrp3/top/n3xx/mb_timing.xdc +++ b/fpga/usrp3/top/n3xx/mb_timing.xdc @@ -106,6 +106,5 @@ set_max_delay -from $PORT_LIST 50.000 set_min_delay -from $PORT_LIST 0.000 #****************************************************************************** -## Reset Sync False Path -set_false_path -to [get_pins */synchronizer_false_path/stages[0].value_reg[0]/D] -set_false_path -to [get_pins */synchronizer_false_path/stages[0].value_reg[0]/C] +## Synchronizer false paths +set_false_path -to [get_pins -hierarchical -filter {NAME =~ */synchronizer_false_path/stages[0].value_reg[0][*]/D}] -- cgit v1.2.3