From 43ab4c8b43d8407fc9f345ca4b13634f03ad4a43 Mon Sep 17 00:00:00 2001
From: michael-west <michael.west@ettus.com>
Date: Thu, 4 Nov 2021 12:40:09 -0700
Subject: fpga: Add ability to get time from Radio block

Added registers to read back radio time.  Bumped minor compat.

Signed-off-by: michael-west <michael.west@ettus.com>
---
 .../lib/rfnoc/blocks/rfnoc_block_radio/rfnoc_block_radio.v | 14 +++++++++++++-
 .../blocks/rfnoc_block_radio/rfnoc_block_radio_regs.vh     |  4 +++-
 .../rfnoc/blocks/rfnoc_block_radio/rfnoc_block_radio_tb.sv | 10 ++++++++++
 3 files changed, 26 insertions(+), 2 deletions(-)

(limited to 'fpga/usrp3')

diff --git a/fpga/usrp3/lib/rfnoc/blocks/rfnoc_block_radio/rfnoc_block_radio.v b/fpga/usrp3/lib/rfnoc/blocks/rfnoc_block_radio/rfnoc_block_radio.v
index 4af699593..c3a9efa7d 100644
--- a/fpga/usrp3/lib/rfnoc/blocks/rfnoc_block_radio/rfnoc_block_radio.v
+++ b/fpga/usrp3/lib/rfnoc/blocks/rfnoc_block_radio/rfnoc_block_radio.v
@@ -430,12 +430,15 @@ module rfnoc_block_radio #(
   //---------------------------------------------------------------------------
 
   localparam [15:0] compat_major = 16'd0;
-  localparam [15:0] compat_minor = 16'd0;
+  localparam [15:0] compat_minor = 16'd1;
+
+  reg [31:0] radio_time_hi;
 
   always @(posedge radio_clk) begin
     if (radio_rst) begin
       ctrlport_shared_resp_ack  <= 0;
       ctrlport_shared_resp_data <= 0;
+      radio_time_hi <= 32'h0;
     end else begin
       // Default assignments
       ctrlport_shared_resp_ack  <= 0;
@@ -448,6 +451,15 @@ module rfnoc_block_radio #(
             ctrlport_shared_resp_ack  <= 1;
             ctrlport_shared_resp_data <= { compat_major, compat_minor };
           end
+          REG_TIME_LO: begin
+            ctrlport_shared_resp_ack  <= 1;
+            ctrlport_shared_resp_data <= radio_time[31:0];
+            radio_time_hi <= radio_time[63:32];
+          end
+          REG_TIME_HI: begin
+            ctrlport_shared_resp_ack  <= 1;
+            ctrlport_shared_resp_data <= radio_time_hi;
+          end
         endcase
       end
     end
diff --git a/fpga/usrp3/lib/rfnoc/blocks/rfnoc_block_radio/rfnoc_block_radio_regs.vh b/fpga/usrp3/lib/rfnoc/blocks/rfnoc_block_radio/rfnoc_block_radio_regs.vh
index 41f9a144e..e691e6be0 100644
--- a/fpga/usrp3/lib/rfnoc/blocks/rfnoc_block_radio/rfnoc_block_radio_regs.vh
+++ b/fpga/usrp3/lib/rfnoc/blocks/rfnoc_block_radio/rfnoc_block_radio_regs.vh
@@ -17,7 +17,9 @@
 localparam SHARED_BASE_ADDR = 20'h00;  // Base address for shared radio registers
 localparam SHARED_ADDR_W    = 4;       // Address space size for shared registers
 
-localparam REG_COMPAT_NUM = 'h00;  // Compatibility number register offset
+localparam REG_COMPAT_NUM   = 'h00;  // Compatibility number register offset
+localparam REG_TIME_LO      = 'h04;  // Timestamp lower 32 bits
+localparam REG_TIME_HI      = 'h08;  // Timestamp upper 32 bits
 
 
 //-----------------------------------------------------------------------------
diff --git a/fpga/usrp3/lib/rfnoc/blocks/rfnoc_block_radio/rfnoc_block_radio_tb.sv b/fpga/usrp3/lib/rfnoc/blocks/rfnoc_block_radio/rfnoc_block_radio_tb.sv
index 7dfa00fe5..3e318a116 100644
--- a/fpga/usrp3/lib/rfnoc/blocks/rfnoc_block_radio/rfnoc_block_radio_tb.sv
+++ b/fpga/usrp3/lib/rfnoc/blocks/rfnoc_block_radio/rfnoc_block_radio_tb.sv
@@ -566,6 +566,8 @@ module rfnoc_block_radio_tb #(
 
   task automatic test_shared_registers();
     logic [31:0] val;
+    logic [63:0] time1;
+    logic [63:0] time2;
     test.start_test("Shared Registers", 10us);
 
     // Compatibility number
@@ -577,6 +579,14 @@ module rfnoc_block_radio_tb #(
       },
       "REG_COMPAT_NUM didn't read correctly"
     );
+    read_shared(REG_TIME_LO, time1[31:0]);
+    read_shared(REG_TIME_HI, time1[63:32]);
+    read_shared(REG_TIME_LO, time2[31:0]);
+    read_shared(REG_TIME_HI, time2[63:32]);
+    `ASSERT_ERROR(
+      time2 > time1,
+      "Time did not increment in REG_TIME_HI and REG_TIME_LO"
+    );
     test.end_test();
   endtask : test_shared_registers
 
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