From 121b6c560cacfb5deacdee664dd1f32cafef7b3d Mon Sep 17 00:00:00 2001
From: Wade Fife <wade.fife@ettus.com>
Date: Wed, 12 Jan 2022 15:29:14 -0600
Subject: fpga: x400: Fix rfnoc_image_core.vh path

Previously, when running rfnoc_image_builder, the rfnoc_image_core.vh
file in the main x400 directory was being used instead of the one
generated by rfnoc_image_builder.
---
 fpga/usrp3/top/x400/Makefile.x4xx.inc | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

(limited to 'fpga/usrp3')

diff --git a/fpga/usrp3/top/x400/Makefile.x4xx.inc b/fpga/usrp3/top/x400/Makefile.x4xx.inc
index 3bcbe38cd..d031d7e83 100644
--- a/fpga/usrp3/top/x400/Makefile.x4xx.inc
+++ b/fpga/usrp3/top/x400/Makefile.x4xx.inc
@@ -170,7 +170,7 @@ $(WB_SPI_SRCS) $(RFNOC_XPORT_SV_SRCS) \
 # Pass the edge table and image core header files required by RFNoC
 # to Vivado as Verilog definitions.
 EDGE_TBL_DEF="RFNOC_EDGE_TBL_FILE=$(call RESOLVE_PATH,$(EDGE_FILE))"
-IMAGE_CORE_DEF="RFNOC_IMAGE_CORE_HDR=$(DEFAULT_RFNOC_IMAGE_CORE_FILE:.v=.vh)"
+IMAGE_CORE_DEF="RFNOC_IMAGE_CORE_HDR=$(call RESOLVE_PATH,$(IMAGE_CORE:.v=.vh))"
 
 ##################################################
 # Dependency Targets
-- 
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