From cdcd39aeb508298e28e8a2a89db5ab9fefd70435 Mon Sep 17 00:00:00 2001 From: Javier Valenzuela Date: Thu, 10 Feb 2022 12:16:22 -0600 Subject: fpga: x400: Add DRAM enable macro --- fpga/usrp3/top/x400/x4xx_core.v | 4 ++++ 1 file changed, 4 insertions(+) (limited to 'fpga/usrp3/top/x400') diff --git a/fpga/usrp3/top/x400/x4xx_core.v b/fpga/usrp3/top/x400/x4xx_core.v index c9ab18e96..df60b8a90 100644 --- a/fpga/usrp3/top/x400/x4xx_core.v +++ b/fpga/usrp3/top/x400/x4xx_core.v @@ -394,6 +394,10 @@ module x4xx_core #( // DRAM //--------------------------------------------------------------------------- + `ifndef ENABLE_DRAM + `define ENABLE_DRAM 0 + `endif + // Only the 100 and 200 MHz images currently support DRAM due to FPGA // resource limitations. For 200 MHz and below, a 64-bit interface provides // sufficient bandwidth. -- cgit v1.2.3