From 6d3765605262016a80f71e36357f749ea35cbe5a Mon Sep 17 00:00:00 2001 From: Wade Fife Date: Tue, 8 Jun 2021 19:40:46 -0500 Subject: fpga: x400: Add support for X410 motherboard FPGA MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Co-authored-by: Andrew Moch Co-authored-by: Daniel Jepson Co-authored-by: Javier Valenzuela Co-authored-by: Joerg Hofrichter Co-authored-by: Kumaran Subramoniam Co-authored-by: Max Köhler Co-authored-by: Michael Auchter Co-authored-by: Paul Butler Co-authored-by: Wade Fife Co-authored-by: Hector Rubio --- fpga/usrp3/top/x400/.gitignore | 7 + fpga/usrp3/top/x400/Makefile | 192 + fpga/usrp3/top/x400/Makefile.x4xx.inc | 197 + fpga/usrp3/top/x400/build_x4xx.tcl | 38 + fpga/usrp3/top/x400/constraints/pins/common.xdc | 192 + fpga/usrp3/top/x400/constraints/pins/dram.xdc | 344 + fpga/usrp3/top/x400/constraints/pins/ipass.xdc | 60 + fpga/usrp3/top/x400/constraints/pins/qsfp0_0.xdc | 21 + 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fpga/usrp3/top/x400/x4xx_qsfp_wrapper.sv create mode 100644 fpga/usrp3/top/x400/x4xx_qsfp_wrapper_temp.sv create mode 100644 fpga/usrp3/top/x400/x4xx_versioning_regs.v (limited to 'fpga/usrp3/top/x400') diff --git a/fpga/usrp3/top/x400/.gitignore b/fpga/usrp3/top/x400/.gitignore new file mode 100644 index 000000000..416def8e1 --- /dev/null +++ b/fpga/usrp3/top/x400/.gitignore @@ -0,0 +1,7 @@ +build +build-* +*.log +*.jou +vivado*.str +ip/*/sim/ +dts/x410-version-info.dtsi diff --git a/fpga/usrp3/top/x400/Makefile b/fpga/usrp3/top/x400/Makefile new file mode 100644 index 000000000..c96e9b2d0 --- /dev/null +++ b/fpga/usrp3/top/x400/Makefile @@ -0,0 +1,192 @@ +# +# Copyright 2021 Ettus Research, a National Instruments Brand +# +# SPDX-License-Identifier: LGPL-3.0-or-later +# + +# NOTE: All comments prefixed with a "##" will be displayed as a part of the "make help" target +##------------------- +##USRP X4XX FPGA Help +##------------------- +##Usage: +## make +## +##Output: +## build/usrp__fpga_.bit: Configuration bitstream with header +## build/usrp__fpga_.dts: Device tree source file +## build/usrp__fpga_.rpt: Build report (includes utilization and timing summary) + + + +# Definitions +# MGT Types from x4xx_mgt_type.vh +MGT_100GbE = 5 +MGT_Aurora = 3 +MGT_10GbE = 2 +MGT_Disabled = 0 + +# For a 4-lane MGT like 100GBE set QSFPx_0=MGT_100GbE and all others to +# MGT_Disabled. For a 1-lane MGT like 10GbE do not set anything for unused +# lanes. This ensures something is defined only for the lanes that are used, so +# that the TX/RX signals are connected. The presence of a define causes TX/RX +# to be declared, whereas declaring TX/RX on an unused lane will cause an error +# in bitgen for unconstrained pins after it is optimized out. + +QSFP0_10GBE = QSFP0_0=$(MGT_10GbE) +QSFP0_4X10GBE = QSFP0_0=$(MGT_10GbE) QSFP0_1=$(MGT_10GbE) QSFP0_2=$(MGT_10GbE) QSFP0_3=$(MGT_10GbE) +QSFP0_100GBE = QSFP0_0=$(MGT_100GbE) QSFP0_1=$(MGT_Disabled) QSFP0_2=$(MGT_Disabled) QSFP0_3=$(MGT_Disabled) + +QSFP1_10GBE = QSFP1_0=$(MGT_10GbE) +QSFP1_4X10GBE = QSFP1_0=$(MGT_10GbE) QSFP1_1=$(MGT_10GbE) QSFP1_2=$(MGT_10GbE) QSFP1_3=$(MGT_10GbE) +QSFP1_100GBE = QSFP1_0=$(MGT_100GbE) QSFP1_1=$(MGT_Disabled) QSFP1_2=$(MGT_Disabled) QSFP1_3=$(MGT_Disabled) + + +# Target specific variables +X410_IP: DEFS = $(QSFP0_10GBE) RFBW_100M=1 +X410_X1_100: DEFS = $(QSFP0_10GBE) RFBW_100M=1 +X410_XG_100: DEFS = $(QSFP0_10GBE) $(QSFP1_10GBE) RFBW_100M=1 +X410_X4_100: DEFS = $(QSFP0_4X10GBE) RFBW_100M=1 +X410_X4C_100: DEFS = $(QSFP0_4X10GBE) $(QSFP1_100GBE) RFBW_100M=1 USE_100GBE=1 +X410_CG_100: DEFS = $(QSFP0_100GBE) RFBW_100M=1 USE_100GBE=1 +X410_CG_200: DEFS = $(QSFP0_100GBE) RFBW_200M=1 USE_100GBE=1 +X410_XG_200: DEFS = $(QSFP0_10GBE) $(QSFP1_10GBE) RFBW_200M=1 +X410_X4_200: DEFS = $(QSFP0_4X10GBE) RFBW_200M=1 +X410_X4C_200: DEFS = $(QSFP0_4X10GBE) $(QSFP1_100GBE) RFBW_200M=1 USE_100GBE=1 +X410_C1_400: DEFS = $(QSFP0_100GBE) RFBW_400M=1 USE_100GBE=1 +X410_CG_400: DEFS = $(QSFP0_100GBE) $(QSFP1_100GBE) RFBW_400M=1 USE_100GBE=1 + +DEFS += $(OPTIONS) + +# Defaults specific to the various targets: +X410_100_DEFAULTS:=DEFAULT_RFNOC_IMAGE_CORE_FILE=x410_100_rfnoc_image_core.v DEFAULT_EDGE_FILE=$(abspath x410_100_static_router.hex) +X410_200_DEFAULTS:=DEFAULT_RFNOC_IMAGE_CORE_FILE=x410_200_rfnoc_image_core.v DEFAULT_EDGE_FILE=$(abspath x410_200_static_router.hex) +X410_400_DEFAULTS:=DEFAULT_RFNOC_IMAGE_CORE_FILE=x410_400_rfnoc_image_core.v DEFAULT_EDGE_FILE=$(abspath x410_400_static_router.hex) + + +# Option to stop after RTL elaboration. Use this flag as a synthesis check. +ifndef TARGET + ifdef CHECK + TARGET = rtl + else ifdef SYNTH + TARGET = synth + else + TARGET = bin + endif +endif +TOP ?= x4xx + +# vivado_build($1=Device, $2=Definitions) +vivado_build = make -f Makefile.x4xx.inc $(TARGET) NAME=$@ ARCH=$(XIL_ARCH_$1) PART_ID=$(XIL_PART_ID_$1) $2 TOP_MODULE=$(TOP) EXTRA_DEFS="$2" $3 + +# vivado_build($1=Device, $2=Option) +ifeq ($(TARGET),bin) + post_build = @\ + mkdir -p build; \ + echo "Exporting bitstream file..."; \ + cp build-$(1)_$(2)/x4xx.bit build/usrp_`echo $(1) | tr A-Z a-z`_fpga_$(2).bit; \ + echo "Exporting build report..."; \ + cp build-$(1)_$(2)/build.rpt build/usrp_`echo $(1) | tr A-Z a-z`_fpga_$(2).rpt; \ + echo "Build DONE ... $(1)_$(2)"; +else + post_build = @echo "Skipping bitfile export." +endif + +# vivado_ip($1=Device, $2=Definitions) +vivado_ip = make -f Makefile.x4xx.inc viv_ip NAME=$@ ARCH=$(XIL_ARCH_$1) PART_ID=$(XIL_PART_ID_$1) $2 TOP_MODULE=$(TOP) EXTRA_DEFS="$2" + +## +##Supported Targets +##----------------- + +all: X410_X4_200 ##(Default target) + +##X410_X1_100: 10GbE on QSFP0 (Lane 0), 100MHz Bandwidth +X410_X1_100: build/usrp_x410_fpga_X1_100.dts + $(call vivado_build,X410,$(DEFS) X410=1,$(X410_100_DEFAULTS)) + $(call post_build,X410,X1_100) + +##X410_XG_100: 10GbE on QSFP0 (Lane 0) and QSFP1 (Lane 0), 100MHz Bandwidth +X410_XG_100: build/usrp_x410_fpga_XG_100.dts + $(call vivado_build,X410,$(DEFS) X410=1,$(X410_100_DEFAULTS)) + $(call post_build,X410,XG_100) + +##X410_X4_100: 4x10GbE on QSFP0, 100MHz Bandwidth +X410_X4_100: build/usrp_x410_fpga_X4_100.dts + $(call vivado_build,X410,$(DEFS) X410=1,$(X410_100_DEFAULTS)) + $(call post_build,X410,X4_100) + +##X410_X4C_100: (EXPERIMENTAL) 4x10GbE on QSFP0, 100GbE on QSFP1, 100MHz Bandwidth +X410_X4C_100: build/usrp_x410_fpga_X4C_100.dts + $(call vivado_build,X410,$(DEFS) X410=1,$(X410_400_DEFAULTS)) + $(call post_build,X410,X4C_100) + +##X410_CG_100: (EXPERIMENTAL) 100GbE on QSFP0, 100MHz Bandwidth +X410_CG_100: build/usrp_x410_fpga_CG_100.dts + $(call vivado_build,X410,$(DEFS) X410=1,$(X410_400_DEFAULTS)) + $(call post_build,X410,CG_100) + +##X410_XG_200: 10GbE on QSFP0 (Lane 0) and QSFP1 (Lane 0), 200MHz Bandwidth +X410_XG_200: build/usrp_x410_fpga_XG_200.dts + $(call vivado_build,X410,$(DEFS) X410=1,$(X410_200_DEFAULTS)) + $(call post_build,X410,XG_200) + +##X410_X4_200: 4x10GbE on QSFP0, 200MHz Bandwidth +X410_X4_200: build/usrp_x410_fpga_X4_200.dts + $(call vivado_build,X410,$(DEFS) X410=1,$(X410_200_DEFAULTS)) + $(call post_build,X410,X4_200) + +##X410_X4C_200: (EXPERIMENTAL) 4x10GbE on QSFP0, 100GbE on QSFP1, 200MHz Bandwidth +X410_X4C_200: build/usrp_x410_fpga_X4C_200.dts + $(call vivado_build,X410,$(DEFS) X410=1,$(X410_400_DEFAULTS)) + $(call post_build,X410,X4C_200) + +##X410_CG_200: (EXPERIMENTAL) 100GbE on QSFP0, 200MHz Bandwidth +X410_CG_200: build/usrp_x410_fpga_CG_200.dts + $(call vivado_build,X410,$(DEFS) X410=1,$(X410_400_DEFAULTS)) + $(call post_build,X410,CG_200) + +##X410_C1_400: (EXPERIMENTAL) 100GbE on QSFP0, 400MHz Bandwidth +X410_C1_400: build/usrp_x410_fpga_C1_400.dts + $(call vivado_build,X410,$(DEFS) X410=1,$(X410_400_DEFAULTS)) + $(call post_build,X410,C1_400) + +##X410_CG_400: (EXPERIMENTAL) 100GbE on QSFP0 and QSFP1, 400MHz Bandwidth +X410_CG_400: build/usrp_x410_fpga_CG_400.dts + $(call vivado_build,X410,$(DEFS) X410=1,$(X410_400_DEFAULTS)) + $(call post_build,X410,CG_400) + +X410_IP: ##Build IPs only + $(call vivado_ip,X410,$(DEFS) X410=1) + +build/%.dts: dts/*.dts dts/*.dtsi + -mkdir -p build + tools/parse_versions_for_dts.py \ + --input regmap/versioning_regs_regmap_utils.vh \ + --output dts/x410-version-info.dtsi \ + --components fpga,cpld_ifc,db_gpio_ifc,rf_core_100m,rf_core_400m + ${CC} -o $@ -C -E -I dts -nostdinc -undef -x assembler-with-cpp -D__DTS__ \ + $$(python3 tools/get_dts_input.py --target $@) + +clean: ##Clean up all target build outputs. + @echo "Cleaning targets..." + @rm -rf build-X4* + @rm -rf build + +cleanall: ##Clean up all target and ip build outputs. + @echo "Cleaning targets and IP..." + @rm -rf build-ip + @rm -rf build-X4* + @rm -rf build + +help: ##Show this help message. + @grep -h "##" Makefile | grep -v "\"##\"" | sed -e 's/\\$$//' | sed -e 's/##//' + +## +##Supported Options +##----------------- +##GUI=1 Launch the build in the Vivado GUI. +##CHECK=1 Launch the syntax checker instead of building a bitfile. +##SYNTH=1 Launch the build but stop after synthesis. +##TOP= Specify a top module for syntax checking. (Optional. Default is the bitfile top) + +.PHONY: all clean cleanall help diff --git a/fpga/usrp3/top/x400/Makefile.x4xx.inc b/fpga/usrp3/top/x400/Makefile.x4xx.inc new file mode 100644 index 000000000..3bcbe38cd --- /dev/null +++ b/fpga/usrp3/top/x400/Makefile.x4xx.inc @@ -0,0 +1,197 @@ +# +# Copyright 2021 Ettus Research, a National Instruments Brand +# +# SPDX-License-Identifier: LGPL-3.0-or-later +# + +################################################## +# Project Setup +################################################## +# TOP_MODULE = +# NAME = +# PART_ID = +# ARCH = + +################################################## +# Include other makefiles +################################################## + +BASE_DIR = $(abspath ..) +IP_DIR = $(abspath ./ip) +include $(BASE_DIR)/../tools/make/viv_design_builder.mak + +# Include IP directory +include $(IP_DIR)/Makefile.inc + +# Include any LIB dependencies +include coregen_dsp/Makefile.srcs +include $(LIB_DIR)/control/Makefile.srcs +include $(LIB_DIR)/fifo/Makefile.srcs +include $(LIB_DIR)/xge/Makefile.srcs +include $(LIB_DIR)/xge_interface/Makefile.srcs +include $(LIB_DIR)/axi/Makefile.srcs +include $(LIB_DIR)/packet_proc/Makefile.srcs +include $(LIB_DIR)/dsp/Makefile.srcs +include $(LIB_DIR)/ip/Makefile.inc +include $(LIB_DIR)/rfnoc/Makefile.srcs +include $(LIB_DIR)/wb_spi/Makefile.srcs +include $(LIB_DIR)/axi4_sv/Makefile.srcs +include $(LIB_DIR)/axi4s_sv/Makefile.srcs +include $(LIB_DIR)/axi4lite_sv/Makefile.srcs +include $(LIB_DIR)/rfnoc/xport_sv/Makefile.srcs + +# For sake of convenience, we include the Makefile.srcs for DRAM FIFO, DDC, and +# DUC, Replay, and of course the radio. Any other block needs to use the +# RFNOC_OOT_MAKEFILE_SRCS variable (see below). +include $(LIB_DIR)/rfnoc/blocks/rfnoc_block_null_src_sink/Makefile.srcs +include $(LIB_DIR)/rfnoc/blocks/rfnoc_block_radio/Makefile.srcs +include $(LIB_DIR)/rfnoc/blocks/rfnoc_block_ddc/Makefile.srcs +include $(LIB_DIR)/rfnoc/blocks/rfnoc_block_duc/Makefile.srcs + +# If out-of-tree modules want to be compiled into this image, then they need to +# pass in the RFNOC_OOT_MAKEFILE_SRCS as a list of Makefile.srcs files. +# Those files need to amend the RFNOC_OOT_SRCS variable with a list of actual +# source files. +include $(RFNOC_OOT_MAKEFILE_SRCS) + +IMAGE_CORE ?= $(DEFAULT_RFNOC_IMAGE_CORE_FILE) +EDGE_FILE ?= $(DEFAULT_EDGE_FILE) + +################################################## +# Sources +################################################## +TOP_SRCS = + +ifdef X410 +TOP_SRCS += \ +x4xx.v \ +x4xx_qsfp_wrapper_temp.sv \ +x4xx_qsfp_wrapper.sv \ +x4xx_mgt_io_core.sv \ +x4xx_core.v \ +x4xx_core_common.v \ +x4xx_global_regs.v \ +x4xx_versioning_regs.v \ +x4xx_dio.v \ +rf/100m/rf_core_100m.v \ +rf/200m/rf_core_200m.v \ +rf/200m/rf_down_4to2.v \ +rf/200m/rf_up_2to4.v \ +rf/400m/rf_core_400m.v \ +rf/common/rf_reset_controller.vhd \ +ctrlport_spi_master.v \ +cpld_interface.v \ +cpld_interface_regs.v \ +qsfp_led_controller.v \ +rfdc_timing_control.v \ +x4xx_pps_sync.v \ +../../lib/timing/pps_generator.v \ +dboards/ctrlport_byte_serializer.v \ +dboards/db_gpio_interface.v \ +dboards/db_gpio_reordering.v \ +ipass_present_controller.v \ +$(IMAGE_CORE) +endif + +MB_XDC = \ +constraints/pins/common.xdc \ +constraints/pins/rfdc_2x2.xdc \ +constraints/timing/shared_constants.sdc \ +constraints/timing/common.xdc + +# Definitions +# MGT Types from x4xx_mgt_type.vh +MGT_100GbE = 5 +MGT_Aurora = 3 +MGT_10GbE = 2 +MGT_Disabled = 0 + +# Check if any of the ports are set to 10Gbe +ifneq (,$(findstring =$(MGT_10GbE),$(EXTRA_DEFS))) + MB_XDC += constraints/timing/qsfp_10gbe.xdc +endif + +# Add pin constraints for QSFP pins +ifneq (,$(findstring QSFP0_0,"$(EXTRA_DEFS)")) + MB_XDC += constraints/pins/qsfp0_0.xdc +endif +ifneq (,$(findstring QSFP0_1,$(EXTRA_DEFS))) + MB_XDC += constraints/pins/qsfp0_1.xdc +endif +ifneq (,$(findstring QSFP0_2,$(EXTRA_DEFS))) + MB_XDC += constraints/pins/qsfp0_2.xdc +endif +ifneq (,$(findstring QSFP0_3,$(EXTRA_DEFS))) + MB_XDC += constraints/pins/qsfp0_3.xdc +endif + +ifneq (,$(findstring QSFP1_0,$(EXTRA_DEFS))) + MB_XDC += constraints/pins/qsfp1_0.xdc +endif +ifneq (,$(findstring QSFP1_1,$(EXTRA_DEFS))) + MB_XDC += constraints/pins/qsfp1_1.xdc +endif +ifneq (,$(findstring QSFP1_2,$(EXTRA_DEFS))) + MB_XDC += constraints/pins/qsfp1_2.xdc +endif +ifneq (,$(findstring QSFP1_3,$(EXTRA_DEFS))) + MB_XDC += constraints/pins/qsfp1_3.xdc +endif + +ifndef NO_DRAM_FIFOS +DRAM_SRCS = +else +DRAM_SRCS = +endif + +ifdef X410 +DESIGN_SRCS = $(abspath $(MB_XDC)) +endif + +# The XDC files must be read in a specific order, motherboard first and then daughterboard. +# Outside of that, all the other sources can be read in any order desired. +DESIGN_SRCS += $(abspath \ +$(AXI4_SV_SRCS) $(AXI4S_SV_SRCS) $(AXI4LITE_SV_SRCS) $(TOP_SRCS) \ +$(AXI_SRCS) $(FIFO_SRCS) \ +$(CONTROL_LIB_SRCS) $(SDR_LIB_SRCS) $(SERDES_SRCS) \ +$(SIMPLE_GEMAC_SRCS) $(TIMING_SRCS) $(COREGEN_DSP_SRCS) \ +$(VRT_SRCS) $(UDP_SRCS) $(COREGEN_SRCS) $(EXTRAM_SRCS) $(WISHBONE_SRCS) \ +$(XGE_SRCS) $(XGE_INTERFACE_SRCS) $(AURORA_PHY_SRCS) \ +$(XGE_PCS_PMA_SRCS) \ +$(PACKET_PROC_SRCS) $(VITA_SRCS) $(DSP_SRCS) $(DRAM_SRCS) \ +$(RADIO_SRCS) $(CAP_GEN_GENERIC_SRCS) $(IP_XCI_SRCS) $(BD_SRCS) \ +$(RFNOC_SRCS) $(RFNOC_OOT_SRCS) $(LIB_IP_XCI_SRCS) $(LIB_HLS_IP_SRCS) $(LIBCOREGEN_SRCS) \ +$(RFNOC_BLOCK_DUC_SRCS) $(RFNOC_BLOCK_DDC_SRCS) \ +$(RFNOC_BLOCK_RADIO_SRCS) $(RFNOC_BLOCK_NULL_SRC_SINK_SRCS) \ +$(DB_COMMON_SRCS) $(WHITE_RABBIT_SRCS) $(RFNOC_FRAMEWORK_SRCS) \ +$(WB_SPI_SRCS) $(RFNOC_XPORT_SV_SRCS) \ +) + +# Pass the edge table and image core header files required by RFNoC +# to Vivado as Verilog definitions. +EDGE_TBL_DEF="RFNOC_EDGE_TBL_FILE=$(call RESOLVE_PATH,$(EDGE_FILE))" +IMAGE_CORE_DEF="RFNOC_IMAGE_CORE_HDR=$(DEFAULT_RFNOC_IMAGE_CORE_FILE:.v=.vh)" + +################################################## +# Dependency Targets +################################################## +.SECONDEXPANSION: + +VERILOG_DEFS=$(EXTRA_DEFS) $(CUSTOM_DEFS) $(GIT_HASH_VERILOG_DEF) $(EDGE_TBL_DEF) $(IMAGE_CORE_DEF) + +# DESIGN_SRCS and VERILOG_DEFS must be defined +bin: .prereqs $$(DESIGN_SRCS) ip + @echo "Printing MB_XDC:: $(MB_XDC)" + @echo "Printing EXTRA_DEFS:: $(EXTRA_DEFS)" + $(call BUILD_VIVADO_DESIGN,$(abspath ./build_x4xx.tcl),$(TOP_MODULE),$(ARCH),$(PART_ID)) + +synth: .prereqs $$(DESIGN_SRCS) ip + $(call BUILD_VIVADO_DESIGN,$(TOOLS_DIR)/scripts/viv_synth.tcl,$(TOP_MODULE),$(ARCH),$(PART_ID)) + +rtl: .prereqs $$(DESIGN_SRCS) ip + $(call CHECK_VIVADO_DESIGN,$(TOOLS_DIR)/scripts/viv_check_syntax.tcl,$(TOP_MODULE),$(ARCH),$(PART_ID)) + +viv_ip: .prereqs $$(DESIGN_SRCS) ip + @echo "IP Build DONE ..." + +.PHONY: bin diff --git a/fpga/usrp3/top/x400/build_x4xx.tcl b/fpga/usrp3/top/x400/build_x4xx.tcl new file mode 100644 index 000000000..0e8b38462 --- /dev/null +++ b/fpga/usrp3/top/x400/build_x4xx.tcl @@ -0,0 +1,38 @@ +# +# Copyright 2021 Ettus Research, a National Instruments Brand +# +# SPDX-License-Identifier: LGPL-3.0-or-later +# + +source $::env(VIV_TOOLS_DIR)/scripts/viv_utils.tcl +source $::env(VIV_TOOLS_DIR)/scripts/viv_strategies.tcl + +# STEP#1: Create project, add sources, refresh IP +vivado_utils::initialize_project + +# STEP#2: Run synthesis + + +vivado_utils::synthesize_design +vivado_utils::generate_post_synth_reports + +# STEP#3: Run implementation strategy +set strategy [vivado_strategies::get_impl_preset "Performance_ExplorePostRoutePhysOpt"] +# Turn up uncertainty on 100Gb clocks(-quiet so if it fails because the clocks don't exist, it won't error) +set_clock_uncertainty 0.5 -quiet -setup [get_clocks txoutclk_out*] +# Vivado has been underestimating routing delays. +dict set strategy "place_design.directive" "ExtraNetDelay_high" +# Turn down uncertainty on 100Gb clocks +dict set strategy "route_design.pre_hook" {set_clock_uncertainty 0.0 -quiet -setup [get_clocks txoutclk_out*]} +vivado_strategies::implement_design $strategy + +# STEP#4: Generate reports +vivado_utils::generate_post_route_reports + +# STEP#5: Generate a bitstream, netlist and debug probes +set_property BITSTREAM.CONFIG.USR_ACCESS TIMESTAMP [get_designs *] +set byte_swap_bin 1 +vivado_utils::write_implementation_outputs $byte_swap_bin + +# Cleanup +vivado_utils::close_batch_project diff --git a/fpga/usrp3/top/x400/constraints/pins/common.xdc b/fpga/usrp3/top/x400/constraints/pins/common.xdc new file mode 100644 index 000000000..92b09575b --- /dev/null +++ b/fpga/usrp3/top/x400/constraints/pins/common.xdc @@ -0,0 +1,192 @@ +# +# Copyright 2021 Ettus Research, a National Instruments Brand +# +# SPDX-License-Identifier: LGPL-3.0-or-later +# +# Description: +# Common pin constraints for X410. +# + +############################################################################### +# Pin constraints for the MGTs reference clocks +############################################################################### + +set_property PACKAGE_PIN U33 [get_ports {MGT_REFCLK_LMK0_P}] +set_property PACKAGE_PIN U34 [get_ports {MGT_REFCLK_LMK0_N}] + +set_property PACKAGE_PIN T31 [get_ports {MGT_REFCLK_LMK1_P}] +set_property PACKAGE_PIN T32 [get_ports {MGT_REFCLK_LMK1_N}] + +set_property PACKAGE_PIN W33 [get_ports {MGT_REFCLK_LMK2_P}] +set_property PACKAGE_PIN W34 [get_ports {MGT_REFCLK_LMK2_N}] + +set_property PACKAGE_PIN V31 [get_ports {MGT_REFCLK_LMK3_P}] +set_property PACKAGE_PIN V32 [get_ports {MGT_REFCLK_LMK3_N}] + + +############################################################################### +# Common pin constraints for the QSFP28 ports +############################################################################### + +set_property PACKAGE_PIN AJ15 [get_ports {QSFP0_MODPRS_n}] +set_property PACKAGE_PIN AH16 [get_ports {QSFP0_RESET_n}] +set_property PACKAGE_PIN AH15 [get_ports {QSFP0_LPMODE_n}] + +set_property PACKAGE_PIN AL11 [get_ports {QSFP1_MODPRS_n}] +set_property PACKAGE_PIN AR8 [get_ports {QSFP1_RESET_n}] +set_property PACKAGE_PIN AT9 [get_ports {QSFP1_LPMODE_n}] + +set_property IOSTANDARD LVCMOS12 [get_ports {QSFP*_MODPRS_n QSFP*_RESET_n QSFP*_LPMODE_n}] +set_property SLEW SLOW [get_ports {QSFP*_RESET_n QSFP*_LPMODE_n}] + + +############################################################################### +# eCPRI future clocks +############################################################################### + +# Input +set_property PACKAGE_PIN AK17 [get_ports {FPGA_AUX_REF}] +set_property IOSTANDARD LVCMOS12 [get_ports {FPGA_AUX_REF}] + +# Output +set_property PACKAGE_PIN AG17 [get_ports {FABRIC_CLK_OUT_P}] +set_property PACKAGE_PIN AH17 [get_ports {FABRIC_CLK_OUT_N}] +set_property IOSTANDARD DIFF_SSTL12 [get_ports {FABRIC_CLK_OUT_*}] + +# GTY_RCV_CLK_P is defined in qsfp_port1 + + +############################################################################### +# Pin constraints for the other PL pins (1.8 V) +############################################################################### + +set_property PACKAGE_PIN F6 [get_ports {DB1_GPIO[0]}] +set_property PACKAGE_PIN E6 [get_ports {DB1_GPIO[1]}] +set_property PACKAGE_PIN E9 [get_ports {DB1_GPIO[2]}] +set_property PACKAGE_PIN E8 [get_ports {DB1_GPIO[3]}] +set_property PACKAGE_PIN E7 [get_ports {DB1_GPIO[4]}] +set_property PACKAGE_PIN D6 [get_ports {DB1_GPIO[5]}] +set_property PACKAGE_PIN D10 [get_ports {DB1_GPIO[6]}] +set_property PACKAGE_PIN C10 [get_ports {DB1_GPIO[7]}] +set_property PACKAGE_PIN C8 [get_ports {DB1_GPIO[8]}] +set_property PACKAGE_PIN C7 [get_ports {DB1_GPIO[9]}] +set_property PACKAGE_PIN D9 [get_ports {DB1_GPIO[10]}] +set_property PACKAGE_PIN D8 [get_ports {DB1_GPIO[11]}] +set_property PACKAGE_PIN B8 [get_ports {DB1_GPIO[12]}] +set_property PACKAGE_PIN B7 [get_ports {DB1_GPIO[13]}] +set_property PACKAGE_PIN B10 [get_ports {DB1_GPIO[14]}] +set_property PACKAGE_PIN B9 [get_ports {DB1_GPIO[15]}] +set_property PACKAGE_PIN C6 [get_ports {DB1_GPIO[16]}] +set_property PACKAGE_PIN C5 [get_ports {DB1_GPIO[17]}] +set_property PACKAGE_PIN B5 [get_ports {DB1_GPIO[18]}] +set_property PACKAGE_PIN A5 [get_ports {DB1_GPIO[19]}] +set_property IOSTANDARD LVCMOS18 [get_ports {DB1_GPIO[*]}] +set_property PULLDOWN TRUE [get_ports {DB1_GPIO[*]}] +set_property IOB TRUE [get_ports {DB1_GPIO[*]}] + +set_property PACKAGE_PIN A7 [get_ports {DB1_SYNTH_SYNC}] +set_property IOSTANDARD LVCMOS18 [get_ports {DB1_SYNTH_SYNC}] + +set_property PACKAGE_PIN AW6 [get_ports {DB0_GPIO[0]}] +set_property PACKAGE_PIN AW5 [get_ports {DB0_GPIO[1]}] +set_property PACKAGE_PIN AW4 [get_ports {DB0_GPIO[2]}] +set_property PACKAGE_PIN AW3 [get_ports {DB0_GPIO[3]}] +set_property PACKAGE_PIN AV3 [get_ports {DB0_GPIO[4]}] +set_property PACKAGE_PIN AV2 [get_ports {DB0_GPIO[5]}] +set_property PACKAGE_PIN AU2 [get_ports {DB0_GPIO[6]}] +set_property PACKAGE_PIN AU1 [get_ports {DB0_GPIO[7]}] +set_property PACKAGE_PIN AV6 [get_ports {DB0_GPIO[8]}] +set_property PACKAGE_PIN AV5 [get_ports {DB0_GPIO[9]}] +set_property PACKAGE_PIN AU4 [get_ports {DB0_GPIO[10]}] +set_property PACKAGE_PIN AU3 [get_ports {DB0_GPIO[11]}] +set_property PACKAGE_PIN AT5 [get_ports {DB0_GPIO[12]}] +set_property PACKAGE_PIN AU5 [get_ports {DB0_GPIO[13]}] +set_property PACKAGE_PIN AT7 [get_ports {DB0_GPIO[14]}] +set_property PACKAGE_PIN AT6 [get_ports {DB0_GPIO[15]}] +set_property PACKAGE_PIN AU8 [get_ports {DB0_GPIO[16]}] +set_property PACKAGE_PIN AV8 [get_ports {DB0_GPIO[17]}] +set_property PACKAGE_PIN AU7 [get_ports {DB0_GPIO[18]}] +set_property PACKAGE_PIN AV7 [get_ports {DB0_GPIO[19]}] +set_property IOSTANDARD LVCMOS18 [get_ports {DB0_GPIO[*]}] +set_property PULLDOWN TRUE [get_ports {DB0_GPIO[*]}] +set_property IOB TRUE [get_ports {DB0_GPIO[*]}] + +set_property PACKAGE_PIN AP5 [get_ports {DB0_SYNTH_SYNC}] +set_property IOSTANDARD LVCMOS18 [get_ports {DB0_SYNTH_SYNC}] + +set_property PACKAGE_PIN A9 [get_ports {LMK_SYNC}] +set_property IOB TRUE [get_ports {LMK_SYNC}] + +set_property PACKAGE_PIN A10 [get_ports {TRIG_IO}] +set_property PACKAGE_PIN A6 [get_ports {PPS_IN}] +set_property PACKAGE_PIN AR7 [get_ports {PL_CPLD_SCLK}] +set_property PACKAGE_PIN AR6 [get_ports {PL_CPLD_MOSI}] +set_property PACKAGE_PIN AP6 [get_ports {PL_CPLD_MISO}] +set_property IOSTANDARD LVCMOS18 [get_ports {LMK_SYNC TRIG_IO PPS_IN PL_CPLD_SCLK PL_CPLD_MOSI PL_CPLD_MISO}] +set_property DRIVE 16 [get_ports {PL_CPLD_SCLK}] + + +############################################################################### +# Pin constraints for the other PL pins (1.2 V) +############################################################################### + +set_property PACKAGE_PIN AL16 [get_ports {PLL_REFCLK_FPGA_P}] +set_property PACKAGE_PIN AL15 [get_ports {PLL_REFCLK_FPGA_N}] +set_property IOSTANDARD DIFF_SSTL12 [get_ports {PLL_REFCLK_FPGA_*}] + +set_property PACKAGE_PIN G17 [get_ports {BASE_REFCLK_FPGA_P}] +set_property PACKAGE_PIN F17 [get_ports {BASE_REFCLK_FPGA_N}] +set_property IOSTANDARD DIFF_SSTL12 [get_ports {BASE_REFCLK_FPGA_*}] + +set_property PACKAGE_PIN AF17 [get_ports {SYSREF_FABRIC_P}] +set_property PACKAGE_PIN AF16 [get_ports {SYSREF_FABRIC_N}] +set_property IOSTANDARD DIFF_SSTL12 [get_ports {SYSREF_FABRIC_*}] + +set_property PACKAGE_PIN J15 [get_ports {DIOA_FPGA[0]}] +set_property PACKAGE_PIN H15 [get_ports {DIOA_FPGA[1]}] +set_property PACKAGE_PIN L17 [get_ports {DIOA_FPGA[2]}] +set_property PACKAGE_PIN K17 [get_ports {DIOA_FPGA[3]}] +set_property PACKAGE_PIN K16 [get_ports {DIOA_FPGA[4]}] +set_property PACKAGE_PIN J16 [get_ports {DIOA_FPGA[5]}] +set_property PACKAGE_PIN K19 [get_ports {DIOA_FPGA[6]}] +set_property PACKAGE_PIN K18 [get_ports {DIOA_FPGA[7]}] +set_property PACKAGE_PIN H17 [get_ports {DIOA_FPGA[8]}] +set_property PACKAGE_PIN H16 [get_ports {DIOA_FPGA[9]}] +set_property PACKAGE_PIN J19 [get_ports {DIOA_FPGA[10]}] +set_property PACKAGE_PIN J18 [get_ports {DIOA_FPGA[11]}] +set_property PACKAGE_PIN M18 [get_ports {DIOB_FPGA[0]}] +set_property PACKAGE_PIN H18 [get_ports {DIOB_FPGA[1]}] +set_property PACKAGE_PIN G18 [get_ports {DIOB_FPGA[2]}] +set_property PACKAGE_PIN G15 [get_ports {DIOB_FPGA[3]}] +set_property PACKAGE_PIN F15 [get_ports {DIOB_FPGA[4]}] +set_property PACKAGE_PIN G19 [get_ports {DIOB_FPGA[5]}] +set_property PACKAGE_PIN F19 [get_ports {DIOB_FPGA[6]}] +set_property PACKAGE_PIN F16 [get_ports {DIOB_FPGA[7]}] +set_property PACKAGE_PIN E16 [get_ports {DIOB_FPGA[8]}] +set_property PACKAGE_PIN E18 [get_ports {DIOB_FPGA[9]}] +set_property PACKAGE_PIN E17 [get_ports {DIOB_FPGA[10]}] +set_property PACKAGE_PIN E19 [get_ports {DIOB_FPGA[11]}] +set_property IOSTANDARD LVCMOS12 [get_ports {DIO*_FPGA[*]}] +set_property PULLDOWN true [get_ports {DIO*_FPGA[*]}] + +set_property PACKAGE_PIN AW13 [get_ports {PPS_LED}] +set_property IOSTANDARD LVCMOS12 [get_ports {PPS_LED}] + +set_property PACKAGE_PIN B23 [get_ports {PL_CPLD_JTAGEN}] +set_property PACKAGE_PIN N21 [get_ports {PL_CPLD_CS0_n}] +set_property PACKAGE_PIN J24 [get_ports {PL_CPLD_CS1_n}] +set_property PACKAGE_PIN AN12 [get_ports {CPLD_JTAG_OE_n}] +set_property IOSTANDARD LVCMOS12 [get_ports {PL_CPLD_JTAGEN PL_CPLD_CS*_n CPLD_JTAG_OE_n}] + + +############################################################################### +# Unused pins +############################################################################### + +# set_property PACKAGE_PIN D19 [get_ports {PL_CPLD_IRQ}] +# set_property PACKAGE_PIN AF15 [get_ports {FPGA_TEST}] +# set_property IOSTANDARD LVCMOS12 [get_ports {FPGA_TEST PL_CPLD_IRQ}] + +# set_property PACKAGE_PIN AK16 [get_ports {TDC_SPARE_0}] +# set_property PACKAGE_PIN AJ16 [get_ports {TDC_SPARE_1}] +# set_property IOSTANDARD LVCMOS12 [get_ports {TDC_SPARE_*}] diff --git a/fpga/usrp3/top/x400/constraints/pins/dram.xdc b/fpga/usrp3/top/x400/constraints/pins/dram.xdc new file mode 100644 index 000000000..d4e412239 --- /dev/null +++ b/fpga/usrp3/top/x400/constraints/pins/dram.xdc @@ -0,0 +1,344 @@ +# +# Copyright 2021 Ettus Research, a National Instruments Brand +# +# SPDX-License-Identifier: LGPL-3.0-or-later +# +# Description: +# DRAM pin constraints for X410. +# + +############################################################################### +# Pin constraints for DRAM controller 0 +############################################################################### + +set_property PACKAGE_PIN AH20 [get_ports DRAM0_ACT_n] +set_property PACKAGE_PIN AN22 [get_ports {DRAM0_ADDR[0]}] +set_property PACKAGE_PIN AJ18 [get_ports {DRAM0_ADDR[10]}] +set_property PACKAGE_PIN AN21 [get_ports {DRAM0_ADDR[11]}] +set_property PACKAGE_PIN AF20 [get_ports {DRAM0_ADDR[12]}] +set_property PACKAGE_PIN AJ20 [get_ports {DRAM0_ADDR[13]}] +set_property PACKAGE_PIN AG18 [get_ports {DRAM0_ADDR[14]}] +set_property PACKAGE_PIN AK18 [get_ports {DRAM0_ADDR[15]}] +set_property PACKAGE_PIN AN18 [get_ports {DRAM0_ADDR[16]}] +set_property PACKAGE_PIN AL20 [get_ports {DRAM0_ADDR[1]}] +set_property PACKAGE_PIN AK22 [get_ports {DRAM0_ADDR[2]}] +set_property PACKAGE_PIN AM19 [get_ports {DRAM0_ADDR[3]}] +set_property PACKAGE_PIN AG20 [get_ports {DRAM0_ADDR[4]}] +set_property PACKAGE_PIN AT20 [get_ports {DRAM0_ADDR[5]}] +set_property PACKAGE_PIN AL19 [get_ports {DRAM0_ADDR[6]}] +set_property PACKAGE_PIN AK21 [get_ports {DRAM0_ADDR[7]}] +set_property PACKAGE_PIN AL21 [get_ports {DRAM0_ADDR[8]}] +set_property PACKAGE_PIN AP21 [get_ports {DRAM0_ADDR[9]}] +set_property PACKAGE_PIN AK19 [get_ports {DRAM0_BA[0]}] +set_property PACKAGE_PIN AM18 [get_ports {DRAM0_BA[1]}] +set_property PACKAGE_PIN AJ19 [get_ports {DRAM0_BG[0]}] +set_property PACKAGE_PIN AL22 [get_ports {DRAM0_CLK_P[0]}] +set_property PACKAGE_PIN AM22 [get_ports {DRAM0_CLK_N[0]}] +set_property PACKAGE_PIN AF19 [get_ports {DRAM0_CKE[0]}] +set_property PACKAGE_PIN AH18 [get_ports {DRAM0_CS_n[0]}] +set_property PACKAGE_PIN AT17 [get_ports {DRAM0_ODT[0]}] +set_property PACKAGE_PIN AP15 [get_ports DRAM0_RESET_n] +set_property PACKAGE_PIN AM20 [get_ports DRAM0_REFCLK_P] +set_property PACKAGE_PIN AN20 [get_ports DRAM0_REFCLK_N] +set_property PACKAGE_PIN AR17 [get_ports {DRAM0_DM_n[0]}] +set_property PACKAGE_PIN AR22 [get_ports {DRAM0_DQS_p[0]}] +set_property PACKAGE_PIN AT22 [get_ports {DRAM0_DQS_n[0]}] +set_property PACKAGE_PIN AR18 [get_ports {DRAM0_DQ[0]}] +set_property PACKAGE_PIN AR19 [get_ports {DRAM0_DQ[1]}] +set_property PACKAGE_PIN AT19 [get_ports {DRAM0_DQ[2]}] +set_property PACKAGE_PIN AT21 [get_ports {DRAM0_DQ[3]}] +set_property PACKAGE_PIN AP18 [get_ports {DRAM0_DQ[4]}] +set_property PACKAGE_PIN AP19 [get_ports {DRAM0_DQ[5]}] +set_property PACKAGE_PIN AP20 [get_ports {DRAM0_DQ[6]}] +set_property PACKAGE_PIN AR21 [get_ports {DRAM0_DQ[7]}] +set_property PACKAGE_PIN AM12 [get_ports {DRAM0_DM_n[1]}] +set_property PACKAGE_PIN AM13 [get_ports {DRAM0_DQS_p[1]}] +set_property PACKAGE_PIN AN13 [get_ports {DRAM0_DQS_n[1]}] +set_property PACKAGE_PIN AM10 [get_ports {DRAM0_DQ[8]}] +set_property PACKAGE_PIN AP10 [get_ports {DRAM0_DQ[9]}] +set_property PACKAGE_PIN AN10 [get_ports {DRAM0_DQ[10]}] +set_property PACKAGE_PIN AR11 [get_ports {DRAM0_DQ[11]}] +set_property PACKAGE_PIN AL10 [get_ports {DRAM0_DQ[12]}] +set_property PACKAGE_PIN AP11 [get_ports {DRAM0_DQ[13]}] +set_property PACKAGE_PIN AN11 [get_ports {DRAM0_DQ[14]}] +set_property PACKAGE_PIN AR12 [get_ports {DRAM0_DQ[15]}] +set_property PACKAGE_PIN AW19 [get_ports {DRAM0_DM_n[2]}] +set_property PACKAGE_PIN AV21 [get_ports {DRAM0_DQS_p[2]}] +set_property PACKAGE_PIN AW21 [get_ports {DRAM0_DQS_n[2]}] +set_property PACKAGE_PIN AV17 [get_ports {DRAM0_DQ[16]}] +set_property PACKAGE_PIN AV18 [get_ports {DRAM0_DQ[17]}] +set_property PACKAGE_PIN AU19 [get_ports {DRAM0_DQ[18]}] +set_property PACKAGE_PIN AU18 [get_ports {DRAM0_DQ[19]}] +set_property PACKAGE_PIN AU17 [get_ports {DRAM0_DQ[20]}] +set_property PACKAGE_PIN AW20 [get_ports {DRAM0_DQ[21]}] +set_property PACKAGE_PIN AU20 [get_ports {DRAM0_DQ[22]}] +set_property PACKAGE_PIN AV20 [get_ports {DRAM0_DQ[23]}] +set_property PACKAGE_PIN AV10 [get_ports {DRAM0_DM_n[3]}] +set_property PACKAGE_PIN AT12 [get_ports {DRAM0_DQS_p[3]}] +set_property PACKAGE_PIN AT11 [get_ports {DRAM0_DQS_n[3]}] +set_property PACKAGE_PIN AW9 [get_ports {DRAM0_DQ[24]}] +set_property PACKAGE_PIN AU12 [get_ports {DRAM0_DQ[25]}] +set_property PACKAGE_PIN AU10 [get_ports {DRAM0_DQ[26]}] +set_property PACKAGE_PIN AV12 [get_ports {DRAM0_DQ[27]}] +set_property PACKAGE_PIN AW8 [get_ports {DRAM0_DQ[28]}] +set_property PACKAGE_PIN AT10 [get_ports {DRAM0_DQ[29]}] +set_property PACKAGE_PIN AV11 [get_ports {DRAM0_DQ[30]}] +set_property PACKAGE_PIN AW11 [get_ports {DRAM0_DQ[31]}] +set_property PACKAGE_PIN AW14 [get_ports {DRAM0_DM_n[4]}] +set_property PACKAGE_PIN AV16 [get_ports {DRAM0_DQS_p[4]}] +set_property PACKAGE_PIN AW16 [get_ports {DRAM0_DQS_n[4]}] +set_property PACKAGE_PIN AU13 [get_ports {DRAM0_DQ[32]}] +set_property PACKAGE_PIN AV15 [get_ports {DRAM0_DQ[33]}] +set_property PACKAGE_PIN AV13 [get_ports {DRAM0_DQ[34]}] +set_property PACKAGE_PIN AU14 [get_ports {DRAM0_DQ[35]}] +set_property PACKAGE_PIN AU15 [get_ports {DRAM0_DQ[36]}] +set_property PACKAGE_PIN AW15 [get_ports {DRAM0_DQ[37]}] +set_property PACKAGE_PIN AT15 [get_ports {DRAM0_DQ[38]}] +set_property PACKAGE_PIN AT16 [get_ports {DRAM0_DQ[39]}] +set_property PACKAGE_PIN AP8 [get_ports {DRAM0_DM_n[5]}] +set_property PACKAGE_PIN AN8 [get_ports {DRAM0_DQS_p[5]}] +set_property PACKAGE_PIN AN7 [get_ports {DRAM0_DQS_n[5]}] +set_property PACKAGE_PIN AM9 [get_ports {DRAM0_DQ[40]}] +set_property PACKAGE_PIN AR9 [get_ports {DRAM0_DQ[41]}] +set_property PACKAGE_PIN AL7 [get_ports {DRAM0_DQ[42]}] +set_property PACKAGE_PIN AM8 [get_ports {DRAM0_DQ[43]}] +set_property PACKAGE_PIN AL9 [get_ports {DRAM0_DQ[44]}] +set_property PACKAGE_PIN AP9 [get_ports {DRAM0_DQ[45]}] +set_property PACKAGE_PIN AL8 [get_ports {DRAM0_DQ[46]}] +set_property PACKAGE_PIN AM7 [get_ports {DRAM0_DQ[47]}] +set_property PACKAGE_PIN AK13 [get_ports {DRAM0_DM_n[6]}] +set_property PACKAGE_PIN AJ14 [get_ports {DRAM0_DQS_p[6]}] +set_property PACKAGE_PIN AK14 [get_ports {DRAM0_DQS_n[6]}] +set_property PACKAGE_PIN AH12 [get_ports {DRAM0_DQ[48]}] +set_property PACKAGE_PIN AJ13 [get_ports {DRAM0_DQ[49]}] +set_property PACKAGE_PIN AJ12 [get_ports {DRAM0_DQ[50]}] +set_property PACKAGE_PIN AK12 [get_ports {DRAM0_DQ[51]}] +set_property PACKAGE_PIN AG12 [get_ports {DRAM0_DQ[52]}] +set_property PACKAGE_PIN AL14 [get_ports {DRAM0_DQ[53]}] +set_property PACKAGE_PIN AH13 [get_ports {DRAM0_DQ[54]}] +set_property PACKAGE_PIN AM14 [get_ports {DRAM0_DQ[55]}] +set_property PACKAGE_PIN AP13 [get_ports {DRAM0_DM_n[7]}] +set_property PACKAGE_PIN AN17 [get_ports {DRAM0_DQS_p[7]}] +set_property PACKAGE_PIN AN16 [get_ports {DRAM0_DQS_n[7]}] +set_property PACKAGE_PIN AM15 [get_ports {DRAM0_DQ[56]}] +set_property PACKAGE_PIN AP14 [get_ports {DRAM0_DQ[57]}] +set_property PACKAGE_PIN AM17 [get_ports {DRAM0_DQ[58]}] +set_property PACKAGE_PIN AP16 [get_ports {DRAM0_DQ[59]}] +set_property PACKAGE_PIN AL17 [get_ports {DRAM0_DQ[60]}] +set_property PACKAGE_PIN AR14 [get_ports {DRAM0_DQ[61]}] +set_property PACKAGE_PIN AN15 [get_ports {DRAM0_DQ[62]}] +set_property PACKAGE_PIN AR16 [get_ports {DRAM0_DQ[63]}] + + +set_property IOSTANDARD DIFF_POD12_DCI [get_ports {DRAM0_DQS_*[*]}] +set_property IOSTANDARD DIFF_SSTL12 [get_ports {DRAM0_REFCLK_*}] +set_property IOSTANDARD DIFF_SSTL12_DCI [get_ports {DRAM0_CLK_*[0]}] +set_property IOSTANDARD LVCMOS12 [get_ports DRAM0_RESET_n] +set_property IOSTANDARD POD12_DCI [get_ports {DRAM0_DM_n[*] \ + DRAM0_DQ[*]}] +set_property IOSTANDARD SSTL12_DCI [get_ports {DRAM0_ACT_n \ + DRAM0_ADDR[*] \ + DRAM0_BA[*] \ + DRAM0_BG[0] \ + DRAM0_CKE[0] \ + DRAM0_CS_n[0] \ + DRAM0_ODT[0]}] + +set_property DRIVE 8 [get_ports DRAM0_RESET_n] + +set_property SLEW FAST [get_ports {DRAM0_ACT_n \ + DRAM0_ADDR[*] \ + DRAM0_BA[*] \ + DRAM0_BG[0] \ + DRAM0_CLK_*[0] \ + DRAM0_CKE[0] \ + DRAM0_CS_n[0] \ + DRAM0_DM_n[*] \ + DRAM0_DQ[*] \ + DRAM0_DQS_*[*] \ + DRAM0_ODT[0]}] + +set_property OUTPUT_IMPEDANCE RDRV_40_40 [get_ports {DRAM0_ACT_n \ + DRAM0_ADDR[*] \ + DRAM0_BA[*] \ + DRAM0_BG[0] \ + DRAM0_CLK_*[0] \ + DRAM0_CKE[0] \ + DRAM0_CS_n[0] \ + DRAM0_DM_n[*] \ + DRAM0_DQ[*] \ + DRAM0_DQS_*[*] \ + DRAM0_ODT[0]}] + +set_property IBUF_LOW_PWR FALSE [get_ports {DRAM0_DM_n[*] \ + DRAM0_DQ[*] \ + DRAM0_DQS_*[*]}] + + + +############################################################################### +# Pin constraints for DRAM controller 0 +############################################################################### + +set_property PACKAGE_PIN E14 [get_ports DRAM1_ACT_n] +set_property PACKAGE_PIN B12 [get_ports {DRAM1_ADDR[0]}] +set_property PACKAGE_PIN G14 [get_ports {DRAM1_ADDR[1]}] +set_property PACKAGE_PIN D13 [get_ports {DRAM1_ADDR[2]}] +set_property PACKAGE_PIN F12 [get_ports {DRAM1_ADDR[3]}] +set_property PACKAGE_PIN C13 [get_ports {DRAM1_ADDR[4]}] +set_property PACKAGE_PIN D14 [get_ports {DRAM1_ADDR[5]}] +set_property PACKAGE_PIN C12 [get_ports {DRAM1_ADDR[6]}] +set_property PACKAGE_PIN C15 [get_ports {DRAM1_ADDR[7]}] +set_property PACKAGE_PIN H12 [get_ports {DRAM1_ADDR[8]}] +set_property PACKAGE_PIN H13 [get_ports {DRAM1_ADDR[9]}] +set_property PACKAGE_PIN A14 [get_ports {DRAM1_ADDR[10]}] +set_property PACKAGE_PIN K12 [get_ports {DRAM1_ADDR[11]}] +set_property PACKAGE_PIN D11 [get_ports {DRAM1_ADDR[12]}] +set_property PACKAGE_PIN J7 [get_ports {DRAM1_ADDR[13]}] +set_property PACKAGE_PIN A15 [get_ports {DRAM1_ADDR[14]}] +set_property PACKAGE_PIN B14 [get_ports {DRAM1_ADDR[15]}] +set_property PACKAGE_PIN E11 [get_ports {DRAM1_ADDR[16]}] +set_property PACKAGE_PIN A12 [get_ports {DRAM1_BA[0]}] +set_property PACKAGE_PIN A11 [get_ports {DRAM1_BA[1]}] +set_property PACKAGE_PIN B13 [get_ports {DRAM1_BG[0]}] +set_property PACKAGE_PIN E13 [get_ports {DRAM1_CLK_P[0]}] +set_property PACKAGE_PIN E12 [get_ports {DRAM1_CLK_N[0]}] +set_property PACKAGE_PIN C11 [get_ports {DRAM1_CKE[0]}] +set_property PACKAGE_PIN F14 [get_ports {DRAM1_CS_n[0]}] +set_property PACKAGE_PIN B15 [get_ports {DRAM1_ODT[0]}] +set_property PACKAGE_PIN G24 [get_ports DRAM1_RESET_n] +set_property PACKAGE_PIN G13 [get_ports DRAM1_REFCLK_P] +set_property PACKAGE_PIN G12 [get_ports DRAM1_REFCLK_N] +set_property PACKAGE_PIN J8 [get_ports {DRAM1_DM_n[0]}] +set_property PACKAGE_PIN H8 [get_ports {DRAM1_DQS_p[0]}] +set_property PACKAGE_PIN G8 [get_ports {DRAM1_DQS_n[0]}] +set_property PACKAGE_PIN G9 [get_ports {DRAM1_DQ[0]}] +set_property PACKAGE_PIN J9 [get_ports {DRAM1_DQ[1]}] +set_property PACKAGE_PIN H7 [get_ports {DRAM1_DQ[2]}] +set_property PACKAGE_PIN H6 [get_ports {DRAM1_DQ[3]}] +set_property PACKAGE_PIN G7 [get_ports {DRAM1_DQ[4]}] +set_property PACKAGE_PIN G6 [get_ports {DRAM1_DQ[5]}] +set_property PACKAGE_PIN F9 [get_ports {DRAM1_DQ[6]}] +set_property PACKAGE_PIN K9 [get_ports {DRAM1_DQ[7]}] +set_property PACKAGE_PIN K13 [get_ports {DRAM1_DM_n[1]}] +set_property PACKAGE_PIN J14 [get_ports {DRAM1_DQS_p[1]}] +set_property PACKAGE_PIN J13 [get_ports {DRAM1_DQS_n[1]}] +set_property PACKAGE_PIN F10 [get_ports {DRAM1_DQ[8]}] +set_property PACKAGE_PIN K10 [get_ports {DRAM1_DQ[9]}] +set_property PACKAGE_PIN F11 [get_ports {DRAM1_DQ[10]}] +set_property PACKAGE_PIN H10 [get_ports {DRAM1_DQ[11]}] +set_property PACKAGE_PIN H11 [get_ports {DRAM1_DQ[12]}] +set_property PACKAGE_PIN J10 [get_ports {DRAM1_DQ[13]}] +set_property PACKAGE_PIN J11 [get_ports {DRAM1_DQ[14]}] +set_property PACKAGE_PIN K11 [get_ports {DRAM1_DQ[15]}] +set_property PACKAGE_PIN D18 [get_ports {DRAM1_DM_n[2]}] +set_property PACKAGE_PIN B18 [get_ports {DRAM1_DQS_p[2]}] +set_property PACKAGE_PIN B17 [get_ports {DRAM1_DQS_n[2]}] +set_property PACKAGE_PIN A17 [get_ports {DRAM1_DQ[16]}] +set_property PACKAGE_PIN D15 [get_ports {DRAM1_DQ[17]}] +set_property PACKAGE_PIN A16 [get_ports {DRAM1_DQ[18]}] +set_property PACKAGE_PIN D16 [get_ports {DRAM1_DQ[19]}] +set_property PACKAGE_PIN C17 [get_ports {DRAM1_DQ[20]}] +set_property PACKAGE_PIN B19 [get_ports {DRAM1_DQ[21]}] +set_property PACKAGE_PIN A19 [get_ports {DRAM1_DQ[22]}] +set_property PACKAGE_PIN C16 [get_ports {DRAM1_DQ[23]}] +set_property PACKAGE_PIN N14 [get_ports {DRAM1_DM_n[3]}] +set_property PACKAGE_PIN L15 [get_ports {DRAM1_DQS_p[3]}] +set_property PACKAGE_PIN L14 [get_ports {DRAM1_DQS_n[3]}] +set_property PACKAGE_PIN N15 [get_ports {DRAM1_DQ[24]}] +set_property PACKAGE_PIN M12 [get_ports {DRAM1_DQ[25]}] +set_property PACKAGE_PIN M15 [get_ports {DRAM1_DQ[26]}] +set_property PACKAGE_PIN M13 [get_ports {DRAM1_DQ[27]}] +set_property PACKAGE_PIN N17 [get_ports {DRAM1_DQ[28]}] +set_property PACKAGE_PIN L12 [get_ports {DRAM1_DQ[29]}] +set_property PACKAGE_PIN M17 [get_ports {DRAM1_DQ[30]}] +set_property PACKAGE_PIN N13 [get_ports {DRAM1_DQ[31]}] +set_property PACKAGE_PIN C23 [get_ports {DRAM1_DM_n[4]}] +set_property PACKAGE_PIN B22 [get_ports {DRAM1_DQS_p[4]}] +set_property PACKAGE_PIN A22 [get_ports {DRAM1_DQS_n[4]}] +set_property PACKAGE_PIN B24 [get_ports {DRAM1_DQ[32]}] +set_property PACKAGE_PIN C21 [get_ports {DRAM1_DQ[33]}] +set_property PACKAGE_PIN C22 [get_ports {DRAM1_DQ[34]}] +set_property PACKAGE_PIN A21 [get_ports {DRAM1_DQ[35]}] +set_property PACKAGE_PIN A24 [get_ports {DRAM1_DQ[36]}] +set_property PACKAGE_PIN B20 [get_ports {DRAM1_DQ[37]}] +set_property PACKAGE_PIN C20 [get_ports {DRAM1_DQ[38]}] +set_property PACKAGE_PIN A20 [get_ports {DRAM1_DQ[39]}] +set_property PACKAGE_PIN F21 [get_ports {DRAM1_DM_n[5]}] +set_property PACKAGE_PIN D23 [get_ports {DRAM1_DQS_p[5]}] +set_property PACKAGE_PIN D24 [get_ports {DRAM1_DQS_n[5]}] +set_property PACKAGE_PIN E24 [get_ports {DRAM1_DQ[40]}] +set_property PACKAGE_PIN E22 [get_ports {DRAM1_DQ[41]}] +set_property PACKAGE_PIN F24 [get_ports {DRAM1_DQ[42]}] +set_property PACKAGE_PIN E23 [get_ports {DRAM1_DQ[43]}] +set_property PACKAGE_PIN E21 [get_ports {DRAM1_DQ[44]}] +set_property PACKAGE_PIN D21 [get_ports {DRAM1_DQ[45]}] +set_property PACKAGE_PIN F20 [get_ports {DRAM1_DQ[46]}] +set_property PACKAGE_PIN G20 [get_ports {DRAM1_DQ[47]}] +set_property PACKAGE_PIN J23 [get_ports {DRAM1_DM_n[6]}] +set_property PACKAGE_PIN J20 [get_ports {DRAM1_DQS_p[6]}] +set_property PACKAGE_PIN H20 [get_ports {DRAM1_DQS_n[6]}] +set_property PACKAGE_PIN L24 [get_ports {DRAM1_DQ[48]}] +set_property PACKAGE_PIN H23 [get_ports {DRAM1_DQ[49]}] +set_property PACKAGE_PIN J21 [get_ports {DRAM1_DQ[50]}] +set_property PACKAGE_PIN H22 [get_ports {DRAM1_DQ[51]}] +set_property PACKAGE_PIN K24 [get_ports {DRAM1_DQ[52]}] +set_property PACKAGE_PIN G23 [get_ports {DRAM1_DQ[53]}] +set_property PACKAGE_PIN H21 [get_ports {DRAM1_DQ[54]}] +set_property PACKAGE_PIN G22 [get_ports {DRAM1_DQ[55]}] +set_property PACKAGE_PIN N20 [get_ports {DRAM1_DM_n[7]}] +set_property PACKAGE_PIN K21 [get_ports {DRAM1_DQS_p[7]}] +set_property PACKAGE_PIN K22 [get_ports {DRAM1_DQS_n[7]}] +set_property PACKAGE_PIN M19 [get_ports {DRAM1_DQ[56]}] +set_property PACKAGE_PIN L21 [get_ports {DRAM1_DQ[57]}] +set_property PACKAGE_PIN M20 [get_ports {DRAM1_DQ[58]}] +set_property PACKAGE_PIN L23 [get_ports {DRAM1_DQ[59]}] +set_property PACKAGE_PIN N19 [get_ports {DRAM1_DQ[60]}] +set_property PACKAGE_PIN L22 [get_ports {DRAM1_DQ[61]}] +set_property PACKAGE_PIN L20 [get_ports {DRAM1_DQ[62]}] +set_property PACKAGE_PIN L19 [get_ports {DRAM1_DQ[63]}] + + +set_property IOSTANDARD DIFF_POD12_DCI [get_ports {DRAM1_DQS_*[*]}] +set_property IOSTANDARD DIFF_SSTL12 [get_ports {DRAM1_REFCLK_*}] +set_property IOSTANDARD DIFF_SSTL12_DCI [get_ports {DRAM1_CLK_*[0]}] +set_property IOSTANDARD LVCMOS12 [get_ports DRAM1_RESET_n] +set_property IOSTANDARD POD12_DCI [get_ports {DRAM1_DM_n[*] \ + DRAM1_DQ[*]}] +set_property IOSTANDARD SSTL12_DCI [get_ports {DRAM1_ACT_n \ + DRAM1_ADDR[*] \ + DRAM1_BA[*] \ + DRAM1_BG[0] \ + DRAM1_CKE[0] \ + DRAM1_CS_n[0] \ + DRAM1_ODT[0]}] + +set_property DRIVE 8 [get_ports DRAM1_RESET_n] + +set_property SLEW FAST [get_ports {DRAM1_ACT_n \ + DRAM1_ADDR[*] \ + DRAM1_BA[*] \ + DRAM1_BG[0] \ + DRAM1_CLK_*[0] \ + DRAM1_CKE[0] \ + DRAM1_CS_n[0] \ + DRAM1_DM_n[*] \ + DRAM1_DQ[*] \ + DRAM1_DQS_*[*] \ + DRAM1_ODT[0]}] + +set_property OUTPUT_IMPEDANCE RDRV_40_40 [get_ports {DRAM1_ACT_n \ + DRAM1_ADDR[*] \ + DRAM1_BA[*] \ + DRAM1_BG[0] \ + DRAM1_CLK_*[0] \ + DRAM1_CKE[0] \ + DRAM1_CS_n[0] \ + DRAM1_DM_n[*] \ + DRAM1_DQ[*] \ + DRAM1_DQS_*[*] \ + DRAM1_ODT[0]}] + +set_property IBUF_LOW_PWR FALSE [get_ports {DRAM1_DM_n[*] \ + DRAM1_DQ[*] \ + DRAM1_DQS_*[*]}] diff --git a/fpga/usrp3/top/x400/constraints/pins/ipass.xdc b/fpga/usrp3/top/x400/constraints/pins/ipass.xdc new file mode 100644 index 000000000..2c455e1e6 --- /dev/null +++ b/fpga/usrp3/top/x400/constraints/pins/ipass.xdc @@ -0,0 +1,60 @@ +# +# Copyright 2021 Ettus Research, a National Instruments Brand +# +# SPDX-License-Identifier: LGPL-3.0-or-later +# +# Description: +# zHD+iPASS ports (0 and 1) pin constraints for X410. +# + +############################################################################### +# Pin constraints for the MGTs (zHD+iPASS ports) +############################################################################### + +# Quad 129 +set_property PACKAGE_PIN N38 [get_ports {IPASS1_RX_P[0]}] +set_property PACKAGE_PIN N39 [get_ports {IPASS1_RX_N[0]}] +set_property PACKAGE_PIN M36 [get_ports {IPASS1_RX_P[1]}] +set_property PACKAGE_PIN M37 [get_ports {IPASS1_RX_N[1]}] +set_property PACKAGE_PIN L38 [get_ports {IPASS1_RX_P[2]}] +set_property PACKAGE_PIN L39 [get_ports {IPASS1_RX_N[2]}] +set_property PACKAGE_PIN K36 [get_ports {IPASS1_RX_P[3]}] +set_property PACKAGE_PIN K37 [get_ports {IPASS1_RX_N[3]}] + +set_property PACKAGE_PIN P35 [get_ports {IPASS1_TX_P[0]}] +set_property PACKAGE_PIN P36 [get_ports {IPASS1_TX_N[0]}] +set_property PACKAGE_PIN N33 [get_ports {IPASS1_TX_P[1]}] +set_property PACKAGE_PIN N34 [get_ports {IPASS1_TX_N[1]}] +set_property PACKAGE_PIN L33 [get_ports {IPASS1_TX_P[2]}] +set_property PACKAGE_PIN L34 [get_ports {IPASS1_TX_N[2]}] +set_property PACKAGE_PIN J33 [get_ports {IPASS1_TX_P[3]}] +set_property PACKAGE_PIN J34 [get_ports {IPASS1_TX_N[3]}] + +# Quad 130 +set_property PACKAGE_PIN J38 [get_ports {IPASS0_RX_P[0]}] +set_property PACKAGE_PIN J39 [get_ports {IPASS0_RX_N[0]}] +set_property PACKAGE_PIN H36 [get_ports {IPASS0_RX_P[1]}] +set_property PACKAGE_PIN H37 [get_ports {IPASS0_RX_N[1]}] +set_property PACKAGE_PIN G38 [get_ports {IPASS0_RX_P[2]}] +set_property PACKAGE_PIN G39 [get_ports {IPASS0_RX_N[2]}] +set_property PACKAGE_PIN F36 [get_ports {IPASS0_RX_P[3]}] +set_property PACKAGE_PIN F37 [get_ports {IPASS0_RX_N[3]}] + +set_property PACKAGE_PIN H31 [get_ports {IPASS0_TX_P[0]}] +set_property PACKAGE_PIN H32 [get_ports {IPASS0_TX_N[0]}] +set_property PACKAGE_PIN G33 [get_ports {IPASS0_TX_P[1]}] +set_property PACKAGE_PIN G34 [get_ports {IPASS0_TX_N[1]}] +set_property PACKAGE_PIN F31 [get_ports {IPASS0_TX_P[2]}] +set_property PACKAGE_PIN F32 [get_ports {IPASS0_TX_N[2]}] +set_property PACKAGE_PIN E33 [get_ports {IPASS0_TX_P[3]}] +set_property PACKAGE_PIN E34 [get_ports {IPASS0_TX_N[3]}] + + +############################################################################### +# Pin constraints for PCIe-related signals +############################################################################### +set_property PACKAGE_PIN F22 [get_ports {IPASS_SIDEBAND[0]}] +set_property PACKAGE_PIN D20 [get_ports {IPASS_SIDEBAND[1]}] +set_property PACKAGE_PIN AG14 [get_ports {PCIE_RESET}] + +set_property IOSTANDARD LVCMOS12 [get_ports {IPASS_SIDEBAND[*] PCIE_RESET}] diff --git a/fpga/usrp3/top/x400/constraints/pins/qsfp0_0.xdc b/fpga/usrp3/top/x400/constraints/pins/qsfp0_0.xdc new file mode 100644 index 000000000..a285d1b63 --- /dev/null +++ b/fpga/usrp3/top/x400/constraints/pins/qsfp0_0.xdc @@ -0,0 +1,21 @@ +# +# Copyright 2021 Ettus Research, a National Instruments Brand +# +# SPDX-License-Identifier: LGPL-3.0-or-later +# +# Description: +# QSFP28 Port 0 (Lane 0) pin constraints for X410. +# + +############################################################################### +# Pin constraints for the MGTs (QSFP28 ports) +############################################################################### + +# Bank 131 (Quad X0Y4, Lanes X0Y16-X0Y19) +# Lane 0 (X0Y16) + +set_property PACKAGE_PIN E38 [get_ports {QSFP0_0_RX_P}] +set_property PACKAGE_PIN E39 [get_ports {QSFP0_0_RX_N}] + +set_property PACKAGE_PIN D31 [get_ports {QSFP0_0_TX_P}] +set_property PACKAGE_PIN D32 [get_ports {QSFP0_0_TX_N}] diff --git a/fpga/usrp3/top/x400/constraints/pins/qsfp0_1.xdc b/fpga/usrp3/top/x400/constraints/pins/qsfp0_1.xdc new file mode 100644 index 000000000..38f376f50 --- /dev/null +++ b/fpga/usrp3/top/x400/constraints/pins/qsfp0_1.xdc @@ -0,0 +1,21 @@ +# +# Copyright 2021 Ettus Research, a National Instruments Brand +# +# SPDX-License-Identifier: LGPL-3.0-or-later +# +# Description: +# QSFP28 Port 0 (Lane 1) pin constraints for X410. +# + +############################################################################### +# Pin constraints for the MGTs (QSFP28 ports) +############################################################################### + +# Bank 131 (Quad X0Y4, Lanes X0Y16-X0Y19) +# Lane 1 (X0Y17) + +set_property PACKAGE_PIN D36 [get_ports {QSFP0_1_RX_P}] +set_property PACKAGE_PIN D37 [get_ports {QSFP0_1_RX_N}] + +set_property PACKAGE_PIN C33 [get_ports {QSFP0_1_TX_P}] +set_property PACKAGE_PIN C34 [get_ports {QSFP0_1_TX_N}] diff --git a/fpga/usrp3/top/x400/constraints/pins/qsfp0_2.xdc b/fpga/usrp3/top/x400/constraints/pins/qsfp0_2.xdc new file mode 100644 index 000000000..8344b4cb6 --- /dev/null +++ b/fpga/usrp3/top/x400/constraints/pins/qsfp0_2.xdc @@ -0,0 +1,21 @@ +# +# Copyright 2021 Ettus Research, a National Instruments Brand +# +# SPDX-License-Identifier: LGPL-3.0-or-later +# +# Description: +# QSFP28 Port 0 (Lane 2) pin constraints for X410. +# + +############################################################################### +# Pin constraints for the MGTs (QSFP28 ports) +############################################################################### + +# Bank 131 (Quad X0Y4, Lanes X0Y16-X0Y19) +# Lane 2 (X0Y18) + +set_property PACKAGE_PIN C38 [get_ports {QSFP0_2_RX_P}] +set_property PACKAGE_PIN C39 [get_ports {QSFP0_2_RX_N}] + +set_property PACKAGE_PIN B31 [get_ports {QSFP0_2_TX_P}] +set_property PACKAGE_PIN B32 [get_ports {QSFP0_2_TX_N}] diff --git a/fpga/usrp3/top/x400/constraints/pins/qsfp0_3.xdc b/fpga/usrp3/top/x400/constraints/pins/qsfp0_3.xdc new file mode 100644 index 000000000..2d1823988 --- /dev/null +++ b/fpga/usrp3/top/x400/constraints/pins/qsfp0_3.xdc @@ -0,0 +1,21 @@ +# +# Copyright 2021 Ettus Research, a National Instruments Brand +# +# SPDX-License-Identifier: LGPL-3.0-or-later +# +# Description: +# QSFP28 Port 0 (Lane 3) pin constraints for X410. +# + +############################################################################### +# Pin constraints for the MGTs (QSFP28 ports) +############################################################################### + +# Bank 131 (Quad X0Y4, Lanes X0Y16-X0Y19) +# Lane 3 (X0Y19) + +set_property PACKAGE_PIN B36 [get_ports {QSFP0_3_RX_P}] +set_property PACKAGE_PIN B37 [get_ports {QSFP0_3_RX_N}] + +set_property PACKAGE_PIN A33 [get_ports {QSFP0_3_TX_P}] +set_property PACKAGE_PIN A34 [get_ports {QSFP0_3_TX_N}] diff --git a/fpga/usrp3/top/x400/constraints/pins/qsfp1_0.xdc b/fpga/usrp3/top/x400/constraints/pins/qsfp1_0.xdc new file mode 100644 index 000000000..2c68bf7db --- /dev/null +++ b/fpga/usrp3/top/x400/constraints/pins/qsfp1_0.xdc @@ -0,0 +1,29 @@ +# +# Copyright 2021 Ettus Research, a National Instruments Brand +# +# SPDX-License-Identifier: LGPL-3.0-or-later +# +# Description: +# QSFP28 Port 1 (Lane 0) pin constraints for X410. +# + +############################################################################### +# Pin constraints for the MGTs (QSFP28 ports) +############################################################################### + +# Bank 128 (Quad X0Y1, Lanes X0Y4-X0Y7) +# Lane 0 (X0Y4) + +set_property PACKAGE_PIN AA38 [get_ports {QSFP1_0_RX_P}] +set_property PACKAGE_PIN AA39 [get_ports {QSFP1_0_RX_N}] + +set_property PACKAGE_PIN Y35 [get_ports {QSFP1_0_TX_P}] +set_property PACKAGE_PIN Y36 [get_ports {QSFP1_0_TX_N}] + +############################################################################### +# GTY_RCV_CLK_P can only be used with QSFP1 +############################################################################### + +set_property PACKAGE_PIN Y31 [get_ports {GTY_RCV_CLK_P}] +set_property PACKAGE_PIN Y32 [get_ports {GTY_RCV_CLK_N}] +set_property IOSTANDARD DIFF_SSTL12 [get_ports {GTY_RCV_CLK_*}] diff --git a/fpga/usrp3/top/x400/constraints/pins/qsfp1_1.xdc b/fpga/usrp3/top/x400/constraints/pins/qsfp1_1.xdc new file mode 100644 index 000000000..cd0bb5459 --- /dev/null +++ b/fpga/usrp3/top/x400/constraints/pins/qsfp1_1.xdc @@ -0,0 +1,21 @@ +# +# Copyright 2021 Ettus Research, a National Instruments Brand +# +# SPDX-License-Identifier: LGPL-3.0-or-later +# +# Description: +# QSFP28 Port 1 (Lane 1) pin constraints for X410. +# + +############################################################################### +# Pin constraints for the MGTs (QSFP28 ports) +############################################################################### + +# Bank 128 (Quad X0Y1, Lanes X0Y4-X0Y7) +# Lane 1 (X0Y5) + +set_property PACKAGE_PIN W38 [get_ports {QSFP1_1_RX_P}] +set_property PACKAGE_PIN W39 [get_ports {QSFP1_1_RX_N}] + +set_property PACKAGE_PIN V35 [get_ports {QSFP1_1_TX_P}] +set_property PACKAGE_PIN V36 [get_ports {QSFP1_1_TX_N}] diff --git a/fpga/usrp3/top/x400/constraints/pins/qsfp1_2.xdc b/fpga/usrp3/top/x400/constraints/pins/qsfp1_2.xdc new file mode 100644 index 000000000..4e267c2c7 --- /dev/null +++ b/fpga/usrp3/top/x400/constraints/pins/qsfp1_2.xdc @@ -0,0 +1,21 @@ +# +# Copyright 2021 Ettus Research, a National Instruments Brand +# +# SPDX-License-Identifier: LGPL-3.0-or-later +# +# Description: +# QSFP28 Port 1 (Lane 2) pin constraints for X410. +# + +############################################################################### +# Pin constraints for the MGTs (QSFP28 ports) +############################################################################### + +# Bank 128 (Quad X0Y1, Lanes X0Y4-X0Y7) +# Lane 2 (X0Y6) + +set_property PACKAGE_PIN U38 [get_ports {QSFP1_2_RX_P}] +set_property PACKAGE_PIN U39 [get_ports {QSFP1_2_RX_N}] + +set_property PACKAGE_PIN T35 [get_ports {QSFP1_2_TX_P}] +set_property PACKAGE_PIN T36 [get_ports {QSFP1_2_TX_N}] diff --git a/fpga/usrp3/top/x400/constraints/pins/qsfp1_3.xdc b/fpga/usrp3/top/x400/constraints/pins/qsfp1_3.xdc new file mode 100644 index 000000000..e56ee3b7e --- /dev/null +++ b/fpga/usrp3/top/x400/constraints/pins/qsfp1_3.xdc @@ -0,0 +1,21 @@ +# +# Copyright 2021 Ettus Research, a National Instruments Brand +# +# SPDX-License-Identifier: LGPL-3.0-or-later +# +# Description: +# QSFP28 Port 1 (Lane 3) pin constraints for X410. +# + +############################################################################### +# Pin constraints for the MGTs (QSFP28 ports) +############################################################################### + +# Bank 128 (Quad X0Y1, Lanes X0Y4-X0Y7) +# Lane 3 (X0Y7) + +set_property PACKAGE_PIN R38 [get_ports {QSFP1_3_RX_P}] +set_property PACKAGE_PIN R39 [get_ports {QSFP1_3_RX_N}] + +set_property PACKAGE_PIN R33 [get_ports {QSFP1_3_TX_P}] +set_property PACKAGE_PIN R34 [get_ports {QSFP1_3_TX_N}] diff --git a/fpga/usrp3/top/x400/constraints/pins/rfdc_2x2.xdc b/fpga/usrp3/top/x400/constraints/pins/rfdc_2x2.xdc new file mode 100644 index 000000000..140150d17 --- /dev/null +++ b/fpga/usrp3/top/x400/constraints/pins/rfdc_2x2.xdc @@ -0,0 +1,86 @@ +# +# Copyright 2021 Ettus Research, a National Instruments Brand +# +# SPDX-License-Identifier: LGPL-3.0-or-later +# +# Description: +# RF data converters pin constraints for X410. +# Note: commented constraints are left for documentation purposes. +# + +# SYSREF input for data converters. +set_property PACKAGE_PIN U4 [get_ports {SYSREF_RF_N}] +set_property PACKAGE_PIN U5 [get_ports {SYSREF_RF_P}] + +############################################################################### +# Pin constraints for the ADCs +############################################################################### + +# ADC Reference Clocks for Slot 0 (DBA) +set_property PACKAGE_PIN AF5 [get_ports {ADC_CLK_P[0]}] +set_property PACKAGE_PIN AF4 [get_ports {ADC_CLK_N[0]}] +set_property PACKAGE_PIN AD5 [get_ports {ADC_CLK_P[1]}] +set_property PACKAGE_PIN AD4 [get_ports {ADC_CLK_N[1]}] + +# ADC Reference Clocks for Slot 1 (DBB) +set_property PACKAGE_PIN AB5 [get_ports {ADC_CLK_P[2]}] +set_property PACKAGE_PIN AB4 [get_ports {ADC_CLK_N[2]}] +set_property PACKAGE_PIN Y5 [get_ports {ADC_CLK_P[3]}] +set_property PACKAGE_PIN Y4 [get_ports {ADC_CLK_N[3]}] + +# ADC Inputs for Slot 0 (DBA) +# Note: numbering here does NOT match schematic, but it is the right order +# according to RF BD Connection spec. +# set_property PACKAGE_PIN AH2 [get_ports {DB0_RX_P[3]}] +# set_property PACKAGE_PIN AH1 [get_ports {DB0_RX_N[3]}] +# set_property PACKAGE_PIN AK2 [get_ports {DB0_RX_P[2]}] +# set_property PACKAGE_PIN AK1 [get_ports {DB0_RX_N[2]}] +set_property PACKAGE_PIN AM2 [get_ports {DB0_RX_P[1]}] +set_property PACKAGE_PIN AM1 [get_ports {DB0_RX_N[1]}] +set_property PACKAGE_PIN AP2 [get_ports {DB0_RX_P[0]}] +set_property PACKAGE_PIN AP1 [get_ports {DB0_RX_N[0]}] + +# ADC Inputs for Slot 1 (DBB) +# Note: numbering here does NOT match schematic, but it is the right order +# according to RF BD Connection spec. +# set_property PACKAGE_PIN Y2 [get_ports {DB1_RX_P[3]}] +# set_property PACKAGE_PIN Y1 [get_ports {DB1_RX_N[3]}] +# set_property PACKAGE_PIN AB2 [get_ports {DB1_RX_P[2]}] +# set_property PACKAGE_PIN AB1 [get_ports {DB1_RX_N[2]}] +set_property PACKAGE_PIN AD2 [get_ports {DB1_RX_P[1]}] +set_property PACKAGE_PIN AD1 [get_ports {DB1_RX_N[1]}] +set_property PACKAGE_PIN AF2 [get_ports {DB1_RX_P[0]}] +set_property PACKAGE_PIN AF1 [get_ports {DB1_RX_N[0]}] + + +############################################################################### +# Pin constraints for the DACs +############################################################################### + +# DAC Reference Clock for Slot 0 (DBA) +set_property PACKAGE_PIN R5 [get_ports {DAC_CLK_P[0]}] +set_property PACKAGE_PIN R4 [get_ports {DAC_CLK_N[0]}] + +# DAC Reference Clock for Slot 1 (DBB) +set_property PACKAGE_PIN N5 [get_ports {DAC_CLK_P[1]}] +set_property PACKAGE_PIN N4 [get_ports {DAC_CLK_N[1]}] + +# DAC Outputs for Slot 0 (DBA) +set_property PACKAGE_PIN U2 [get_ports {DB0_TX_P[0]}] +set_property PACKAGE_PIN U1 [get_ports {DB0_TX_N[0]}] +set_property PACKAGE_PIN R2 [get_ports {DB0_TX_P[1]}] +set_property PACKAGE_PIN R1 [get_ports {DB0_TX_N[1]}] +# set_property PACKAGE_PIN N2 [get_ports {DB0_TX_P[2]}] +# set_property PACKAGE_PIN N1 [get_ports {DB0_TX_N[2]}] +# set_property PACKAGE_PIN L2 [get_ports {DB0_TX_P[3]}] +# set_property PACKAGE_PIN L1 [get_ports {DB0_TX_N[3]}] + +# DAC Outputs for Slot 1 (DBB) +set_property PACKAGE_PIN J2 [get_ports {DB1_TX_P[0]}] +set_property PACKAGE_PIN J1 [get_ports {DB1_TX_N[0]}] +set_property PACKAGE_PIN G2 [get_ports {DB1_TX_P[1]}] +set_property PACKAGE_PIN G1 [get_ports {DB1_TX_N[1]}] +# set_property PACKAGE_PIN E2 [get_ports {DB1_TX_P[2]}] +# set_property PACKAGE_PIN E1 [get_ports {DB1_TX_N[2]}] +# set_property PACKAGE_PIN C2 [get_ports {DB1_TX_P[3]}] +# set_property PACKAGE_PIN C1 [get_ports {DB1_TX_N[3]}] diff --git a/fpga/usrp3/top/x400/constraints/timing/common.xdc b/fpga/usrp3/top/x400/constraints/timing/common.xdc new file mode 100644 index 000000000..288465ad0 --- /dev/null +++ b/fpga/usrp3/top/x400/constraints/timing/common.xdc @@ -0,0 +1,415 @@ +# +# Copyright 2021 Ettus Research, a National Instruments Brand +# +# SPDX-License-Identifier: LGPL-3.0-or-later +# +# Description: +# Common timing constraints for X410. +# + +############################################################################### +# Motherboard Clocks +############################################################################### + +# 10/25 MHz reference clock from rear panel connector. +# Constrain to the fastest possible clock rate. +set ref_clk_period 40.00 +create_clock -name ref_clk -period $ref_clk_period [get_ports BASE_REFCLK_FPGA_P] + +# PLL Reference Clock. Used to derive data clocks. +# Constrain to the fastest possible clock rate supported in the driver. +# MPM supports 61.44 / 62.5 / 64.0 MHz. +set pll_ref_clk_period 15.625 +create_clock -name pll_ref_clk -period $pll_ref_clk_period [get_ports PLL_REFCLK_FPGA_P] + +# MGT Clocks +# Clock Reference | Frequency | Purpose +# MGT_REFCLK_LMK0 | 156.25/125 MHz | 10 GbE +# MGT_REFCLK_LMK1 | 100.00 MHz | Reserved +# MGT_REFCLK_LMK2 | 100.00 MHz | Reserved +# MGT_REFCLK_LMK3 | 156.25/125 MHz | 10 GbE +create_clock -name mgt_ref_0 -period 6.400 [get_ports MGT_REFCLK_LMK0_P] +create_clock -name mgt_ref_1 -period 10.000 [get_ports MGT_REFCLK_LMK1_P] +create_clock -name mgt_ref_2 -period 10.400 [get_ports MGT_REFCLK_LMK2_P] +create_clock -name mgt_ref_3 -period 6.400 [get_ports MGT_REFCLK_LMK3_P] + +# Virtual clocks for constraining misc. I/Os. +create_clock -name async_in_clk -period 50.00 +create_clock -name async_out_clk -period 50.00 + + +############################################################################### +# Aliases for auto-generated clocks +############################################################################### + +# Name the PS clocks. These are originally declared in the PS8 IP block. +# Create the clocks based on the PS PLCLK pins. +# This generates critical warnings in the OSS flow because the clocks were already +# define and we are completely rewriting the old clock definition... this is OK. +create_clock -name clk100 -period 10.000 \ + [get_pins -of_objects [get_cells -hierarchical {*PS8_i}] -filter {NAME =~ *PLCLK[0]}] + +create_clock -name clk40 -period 25.000 \ + [get_pins -of_objects [get_cells -hierarchical {*PS8_i}] -filter {NAME =~ *PLCLK[1]}] + +create_clock -name clk166 -period 6.000 \ + [get_pins -of_objects [get_cells -hierarchical {*PS8_i}] -filter {NAME =~ *PLCLK[2]}] + +create_clock -name clk200 -period 5.000 \ + [get_pins -of_objects [get_cells -hierarchical {*PS8_i}] -filter {NAME =~ *PLCLK[3]}] + + +############################################################################### +# Sync to DB synthesizer sync CPLD input +############################################################################### + +# synth_sync_hold_requirement and synth_sync_setup_requirement are shared +# between the FPGA and DB CPLD. The values are set in shared_constants.sdc +set synth_sync_ports [get_ports {DB0_SYNTH_SYNC DB1_SYNTH_SYNC}] +set_output_delay -clock [get_clocks pll_ref_clk] -min -$synth_sync_hold_requirement $synth_sync_ports +set_output_delay -clock [get_clocks pll_ref_clk] -max $synth_sync_setup_requirement $synth_sync_ports + + +############################################################################### +# SPI to MB CPLD (PL) +# This interface is defined as system synchronous to pll_ref_clk. +############################################################################### + +# The output delays are chosen to allow a large time window of valid data for +# the MB CPLD logic. +set spi_min_out_delay 0.000 +set spi_max_out_delay 11.000 + +# Set output constraints for all ports. +set spi_out_ports [get_ports {PL_CPLD_SCLK PL_CPLD_MOSI PL_CPLD_CS0_n PL_CPLD_CS1_n}] +set_output_delay -clock [get_clocks pll_ref_clk] -min $spi_min_out_delay $spi_out_ports +set_output_delay -clock [get_clocks pll_ref_clk] -max $spi_max_out_delay $spi_out_ports + +# Both CPLD and FPGA use PLL reference clock from a common clock chip. +# The traces from that clock chip to the ICs are not length matched. Assume a +# worst case clock difference of 0.5 ns at the IC inputs. There is no direction +# defined. The clock can arrive faster or slower at one IC. +set pl_clock_diff 0.500 + +# The longest trace on the PL SPI interface is (assuming 170.0 ps/in) +# Longest trace | Trace length | Trace delay +# PL_CPLD_MISO | 3.863 in | 0.657 ns +set pl_spi_board_delay 0.657 + +# Output delay timings of the MB CPLD design, which still meet timing +set pl_spi_cpld_min_out -1.000 +set pl_spi_cpld_max_out 8.000 + +set spi_in_port [get_ports {PL_CPLD_MISO}] +set_input_delay -clock [get_clocks pll_ref_clk] \ + -min [expr {- $pl_spi_cpld_min_out - $pl_clock_diff}] \ + $spi_in_port +set_input_delay -clock [get_clocks pll_ref_clk] \ + -max [expr {$pll_ref_clk_period - $pl_spi_cpld_max_out + $pl_spi_board_delay + $pl_clock_diff}] \ + $spi_in_port + + +############################################################################### +# 10 GbE +############################################################################### + +# These are the exceptions from "xge_pcs_pma_exceptions.xdc" which are to be +# used when not using the example design. +# +# "clk100" used here is the clock that's connected to the "dclk" input in the core. +set_max_delay -from [get_clocks -of_objects [get_pins -hierarchical -filter {NAME =~ */channel_inst/*_CHANNEL_PRIM_INST/RXOUTCLK}]] -to [get_clocks -of_objects [get_pins -hierarchical -filter {NAME =~ */channel_inst/*_CHANNEL_PRIM_INST/TXOUTCLK}]] -datapath_only 6.40 +set_max_delay -from [get_clocks -of_objects [get_pins -hierarchical -filter {NAME =~ */channel_inst/*_CHANNEL_PRIM_INST/TXOUTCLK}]] -to [get_clocks -of_objects [get_pins -hierarchical -filter {NAME =~ */channel_inst/*_CHANNEL_PRIM_INST/RXOUTCLK}]] -datapath_only 6.40 +set_max_delay -from [get_clocks -of_objects [get_pins -hierarchical -filter {NAME =~ */channel_inst/*_CHANNEL_PRIM_INST/RXOUTCLK}]] -to [get_clocks clk100] -datapath_only 6.40 +set_max_delay -from [get_clocks -of_objects [get_pins -hierarchical -filter {NAME =~ */channel_inst/*_CHANNEL_PRIM_INST/TXOUTCLK}]] -to [get_clocks clk100] -datapath_only 6.40 +set_max_delay -from [get_clocks clk100] -to [get_clocks -of_objects [get_pins -hierarchical -filter {NAME =~ */channel_inst/*_CHANNEL_PRIM_INST/TXOUTCLK}]] -datapath_only 10.000 +set_max_delay -from [get_clocks clk100] -to [get_clocks -of_objects [get_pins -hierarchical -filter {NAME =~ */channel_inst/*_CHANNEL_PRIM_INST/RXOUTCLK}]] -datapath_only 10.000 + + +############################################################################### +# DIO +# Those GPIO pins are considered asynchronous paths. The user has to add +# constraints in case required. Therefore not setting false_paths from / to +# user logic to allow user generated timing constraints to be applied. +############################################################################### + +# Ignore paths from "slow" PS interface to not interfere with user constraints. +set dio_ports [get_ports {DIOA_FPGA[*] DIOB_FPGA[*]}] +set dio_registers [get_cells -hierarchical -filter {NAME =~ *x4xx_dio_i* && IS_SEQUENTIAL && IS_PRIMITIVE}] +set_false_path -from $dio_registers -to $dio_ports +set_false_path -from $dio_ports -to $dio_registers + + +############################################################################### +# PPS +############################################################################### + +# The TRIG_IO port may be driven by either the PPS in BRC domain to +# enable direct sync between 2 devices, or by any other user logic. +# When PPS is exported through Trigger I/O, timing must be analyzed +# to ensure determinism in the PPS exporting. +# But, when other user logic drives TRIG_IO, then the port should be +# treated as asynchronous (or close to async. at least). +# To achieve this conditional timing analysis, the following trick is +# used: +# 1. A virtual copy of ref_clk is created for I/O timing - virtual_ref_clk +# 2. Set output_delay constraints to assign a clock to the TRIG_IO port. +# 3. A set_max_delay constraint is used to time the output path to TRIG_IO +# set_max_delay makes the timing constraint driver agnostic, and as long +# as the critical output delay is met for driving PPS through TRIG_IO, +# we should be fine as this requirement is relatively loose. + +# 1) Creating copy of ref_clk to only analyze timing to TRIG_IO port (output) +# when output is driven by ref_clk (PPS generation in ref_clk domain). +create_clock -name virtual_ref_clk -period $ref_clk_period + +# Trigger IO port is used as output for the PPS signal +# TRIG_IO_1V8 trace length MB = 4.050 + 1.190 inch = 5.240 inch +# TRIG_IO_1V8 trace length DB = 2.401 + 0.120 + 0.457 + 0.261 inch = 3.239 inch +# TRIG_IO buffer max switching time = 3.3 +set trig_max_out_delay [expr {8.479 * 0.17 + 3.3}] + +# Set minimum output delay hold time to a small amount to grant external +# devices some hold time. Delay should be simple to achieve as there is no PLL +# in the clocking path and some combinatorial logic. +set trig_min_out_delay 2.000 + +# 2) set_output_delay for assigning clocks to TRIG_IO. Use zero for delay to +# avoid adding extra delay requirements on top of the set_max|min_delay +# constraints below. +set_output_delay -clock [get_clocks virtual_ref_clk] 0.0 [get_ports {TRIG_IO}] + +# 3) Min and max delays make constraining driver agnostic. We just make sure +# the critical timing for PPS export is met though. +set_max_delay -through [get_port {TRIG_IO}] -to [get_clocks {virtual_ref_clk}] \ + [expr {$ref_clk_period - $trig_max_out_delay}] +set_min_delay -through [get_port {TRIG_IO}] -to [get_clocks {virtual_ref_clk}] \ + $trig_min_out_delay + +# Treat TRIG_IO input as asynchronous. +set_false_path -from [get_ports {TRIG_IO}] +# For documentation purposes, these are the input max/min delays for TRIG_IO: +# - Input delay assuming zero trace delay and TRIG_IO buffer min switching +# time (B->A) = 0.1 ns. +# - TRIG_IO buffer max switching time (B->A = input) = 3.7 ns + same trace +# length as for output (8.479). + +# Assuming no delay on external clock distribution. + +# Account for the PPS min output delay only (for the case two X410 are directly +# connected to each other). +set pps_min_in_delay $trig_min_out_delay + +# PPS_IN trace length DB = 0.535 + 0.133 + 0.117 + 0.061 + 2.745 inch = 3.591 inch +# PPS_IN trace length MB = 5.726 inch +# PPS switch max propagation delay = 3.6 + +# Assume 50% of the clock period is used for external PPS clock distribution as +# the PPS out is used to synchronize one X410 (master) with another X410 +# (slave) the PPS out (trig_io) delay is added to the PPS input. +set pps_max_in_delay [expr {9.317 * 0.17 + 3.6 + 0.5 * $ref_clk_period + $trig_max_out_delay}] + +# Apply PPS input constraints. +set_input_delay -clock [get_clocks ref_clk] -min $pps_min_in_delay [get_ports {PPS_IN}] +set_input_delay -clock [get_clocks ref_clk] -max $pps_max_in_delay [get_ports {PPS_IN}] + +# PPS clock domain crossing BRC -> PRC on the aligned edge. +# Use a data path of half PLL reference clock period to make sure the value is +# captured without metastability. +set_max_delay -from [get_cells -hierarchical pps_delayed_brc_reg] \ + -to [get_clocks pll_ref_clk*] [expr {$pll_ref_clk_period/2}] + + +############################################################################### +# LMK sync +############################################################################### + +# The timings are derived from simulation. + +# Clock Buffer ADCLK944 -> FPGA. +set buffer_to_fpga_min_clk_delay 0.997 +set buffer_to_fpga_max_clk_delay 1.154 + +# Clock Buffer ADCLK944 -> Sample clock PLL (LMK04832). +set buffer_to_spll_min_clk_delay 0.000 +set buffer_to_spll_max_clk_delay 0.014 + +# FPGA -> Sample clock PLL SYNC input. +set fpga_to_spll_min_clk_delay 0.381 +set fpga_to_spll_max_clk_delay 0.460 + +# Sample clock PLL requirements. +set lmk_sync_input_hold 4.000 +set lmk_sync_input_setup 4.000 + +set lmk_sync_output_max_delay [expr {$fpga_to_spll_max_clk_delay + $buffer_to_fpga_max_clk_delay + \ + $lmk_sync_input_setup - $buffer_to_spll_min_clk_delay}] +set lmk_sync_output_min_delay [expr {$fpga_to_spll_min_clk_delay + $buffer_to_fpga_min_clk_delay - \ + $buffer_to_spll_max_clk_delay - $lmk_sync_input_hold}] +set_output_delay -clock ref_clk -max $lmk_sync_output_max_delay [get_ports {LMK_SYNC}] +set_output_delay -clock ref_clk -min $lmk_sync_output_min_delay [get_ports {LMK_SYNC}] + + +############################################################################### +# SPLL SYSREF Capture +############################################################################### + +# SYSREF is generated by the LMK04832 clocking chip (SPLL), which also produces +# the PLL reference clock (PRC) used to generate data clocks with a MMCM. Both +# SYSREF and PLL reference clock are directly fed into the RFSoC. +# SYSREF is captured by the FPGA fabric in the PRC clock domain (MMCM's PRC +# output) with a double synchronizer and then transfered to the RFDC clock +# domain. Both SYSREF versions (PRC and RFDC) are used by downstream logic for +# sync. purposes. +# SYSREF is a continuous signal running at PRC freq. / 25, and it is +# intentionally shifted in the LMK chip to align it closer to the +# PRC's falling edge. +# The added delay follows the formula: +# SYSREF LMK delay = 22 * sample clock period +# The highest sampling frequency supported in MPM (3.072 GHz) is used for +# timing constrains. Therefore, SYSREF LMK's delay = 22 * (1 / 3.072e9). +set sysref_lmk_delay 7.161 +# +# These are the signals' lengths and corresponding delays (assuming 170 ps/in): +# - SYSREF --> 5794 mils (5.794 inches) = 0.985 ns +# - PRC --> 5668 mils (5.668 inches) = 0.964 ns +# +# For min/max input delay calculations, it is assumed min prop. delay of 0 ns, +# which essentially over-constrains SYSREF. +# +# The max input delay is the latest that SYSREF may arrive w.r.t PRC, and it is +# calculated as follows: +# Input delay (max) = SYSREF's LMK delay + SYSREF prop. delay (max) +# - PRC prop. delay (min) +set sysref_max_input_delay [expr {$sysref_lmk_delay + 0.985 - 0}] +# +# The min input delay is the earliest that SYSREF may arrive w.r.t PRC, and it +# is calculated as follows: +# Input delay (min) = SYSREF's LMK delay + SYSREF prop. delay (min) +# - PRC prop. delay (min) +set sysref_min_input_delay [expr {$sysref_lmk_delay + 0 - 0.964}] + +set_input_delay -clock pll_ref_clk -max $sysref_max_input_delay [get_ports {SYSREF_FABRIC_P}] +set_input_delay -clock pll_ref_clk -min $sysref_min_input_delay [get_ports {SYSREF_FABRIC_P}] + + +############################################################################### +# DB GPIO +# This interface is defined as system synchronous to pll_ref_clk. +# Some timing constants in this section are declared in +# /fpga/usrp3/top/x400/constraints/timing/shared_constants.sdc +############################################################################### + +# Set output constraints for all ports. +set db_gpio_ports [get_ports {DB0_GPIO[*] DB1_GPIO[*]}] +set_output_delay -clock [get_clocks pll_ref_clk] -min $db_gpio_fpga_min_out $db_gpio_ports +set_output_delay -clock [get_clocks pll_ref_clk] -max $db_gpio_fpga_max_out $db_gpio_ports + +# Output enable signal is available one clock cycle ahead of valid data, this +# enables the use of multi-cycle paths. +set db_gpio_out_en_regs [get_cells -hierarchical -filter \ + {PRIMITIVE_TYPE =~ REGISTER.*.* && NAME =~ "*bytestream_output_enable*"}] +set_multicycle_path 2 -setup -from $db_gpio_out_en_regs -to $db_gpio_ports +set_multicycle_path 1 -hold -from $db_gpio_out_en_regs -to $db_gpio_ports + +# Calculate output delays back from capturing edge, add board delay and clock +# difference. +# Assume worst case as data being generated late and receiving an early clock: +# - Max CPLD TCO +# - Max data propagation delay +# - Max CPLD clock propagation delay and minimum FPGA clock propagation delay +# - Maximum delay from MC100EPT23 clock buffer +set_input_delay -clock pll_ref_clk \ + -max [expr {$pll_ref_clk_period - $db_gpio_cpld_max_out + $db_gpio_board_max_delay \ + + $db_cpld_prc_clock_prop_max - $fpga_prc_clock_prop_min + $clock_translate_max}] \ + $db_gpio_ports + +# Negate minimum output delay as it is defined from the change to the start +# clock edge. +# Assume worst case as data being generated early and receiving an late clock: +# - Min CPLD TCO +# - Min data propagation delay (0) +# - Min CPLD clock propagation delay and max FPGA clock propagation delay +set_input_delay -clock pll_ref_clk \ + -min [expr {- $db_gpio_cpld_min_out \ + - $db_gpio_board_min_delay \ + - $db_cpld_prc_clock_prop_min + $fpga_prc_clock_prop_max}] \ + $db_gpio_ports + + +############################################################################### +# x4xx_ps_rfdc_bd +############################################################################### + +# The calibration_muxes component contains a clock crossing from some GPIO +# component instances that are synchronous to a configuration clock and ending +# in some AXI registers synchronous to data clock. The GPIO registers are +# essentially constant. When they are changing (due to a register write), the +# latching registers can definitely become metastable, so the software must +# ensure that the corrupted data appears at a safe time. +set gpio_regs [get_pins -of [get_cells -filter {IS_SEQUENTIAL && NAME =~ *rfdc/calibration_muxes/axi_gpio*} -hier] -filter {IS_CLOCK}] +set mux_regs [get_cells -hier -filter {IS_SEQUENTIAL && NAME =~ *rfdc/calibration_muxes/gpio_to_axis_mux*}] +set_false_path -from $gpio_regs -to $mux_regs + +# This property tells Vivado that we require these clocks to be well aligned. +# We have synchronous clock domain crossings between these clocks that can have +# large hold violations after placement due to uneven clock loading. +set_property CLOCK_DELAY_GROUP DataClkGroup [get_nets -hier -filter {\ + NAME=~*/rfdc/data_clock_mmcm/inst/CLK_CORE_DRP_I/clk_inst/data_clk ||\ + NAME=~*/rfdc/data_clock_mmcm/inst/CLK_CORE_DRP_I/clk_inst/data_clk_2x ||\ + NAME=~*/rfdc/data_clock_mmcm/inst/CLK_CORE_DRP_I/clk_inst/pll_ref_clk_out ||\ + NAME=~*/rfdc/data_clock_mmcm/inst/CLK_CORE_DRP_I/clk_inst/rfdc_clk_2x ||\ + NAME=~*/rfdc/data_clock_mmcm/inst/CLK_CORE_DRP_I/clk_inst/rfdc_clk \ +}] + +# We treat rfdc_clk and data_clk buffers as asynchronous, with knowledge that +# code clocked in this domain will be reset after this clocked is enabled. This +# will make timing easier to meet on these clock domains. +set_false_path -from [get_pins -hierarchical -filter {NAME =~ */rfdc/clock_gates_0/*rEnableRfdcBufg1x*/C}] \ + -to [get_pins -hierarchical -filter {NAME =~ */rfdc/rf_clock_buffers/rfdc_clk_1x_buf/*BUFGCE*/CE}] + +set_false_path -from [get_pins -hierarchical -filter {NAME =~ */rfdc/clock_gates_0/*rEnableRfdcBufg2x*/C}] \ + -to [get_pins -hierarchical -filter {NAME =~ */rfdc/rf_clock_buffers/rfdc_clk_2x_buf/*BUFGCE*/CE}] + +set_false_path -from [get_pins -hierarchical -filter {NAME =~ */rfdc/clock_gates_0/*rEnableDataBufg1x*/C}] \ + -to [get_pins -hierarchical -filter {NAME =~ */rfdc/clock_gates_0/*DataClk1xSafeBufg/CE}] + +set_false_path -from [get_pins -hierarchical -filter {NAME =~ */rfdc/clock_gates_0/*rEnableDataBufg2x*/C}] \ + -to [get_pins -hierarchical -filter {NAME =~ */rfdc/clock_gates_0/*DataClk2xSafeBufg/CE}] + + +############################################################################### +# Misc Constraints +############################################################################### + +# Double synchronizer false paths. +set_false_path -to [get_pins -hierarchical -filter {NAME =~ */synchronizer_false_path/stages[0].value_reg[0][*]/D}] +set_false_path -to [get_pins -hierarchical -filter {NAME =~ */rf_reset_controller*/*_ms_reg/D}] +set_false_path -to [get_pins -hierarchical -filter {NAME =~ */rfdc/rf_nco_reset_0/*_ms*/D}] + +# GTY_RCV_CLK_* is driven by a OBUFDS_GTE4 buffer, which has an asynchronous +# clock-enable pin. +# By experimentation, it was observed that explicitly setting a false_path to +# this pin improved timing. +set gty_rcv_clk_buff_ceb [get_pins -of_objects [get_cells -of_objects [all_fanin -flat -startpoints_only [get_ports {GTY_RCV_CLK_P}]]] -filter {NAME=~ "*CEB"}] +set_false_path -from [get_clocks {clk40}] -through $gty_rcv_clk_buff_ceb + + +############################################################################### +# Asynchronous / misc. I/O constraints +# Loosely constrain these to prevent warnings in Vivado. +# Using set_input_delay associates the I/Os to a clock group, but +# set_(min|max)_delay overwrites the setup/hold analysis values. +############################################################################### + +set async_inputs [get_ports {FPGA_AUX_REF}] + +set_input_delay -clock [get_clocks async_in_clk] 0.000 $async_inputs +set_max_delay -from $async_inputs 50.000 +set_min_delay -from $async_inputs 0.000 + + +set async_outputs [get_ports {FABRIC_CLK_OUT_P PPS_LED}] + +set_output_delay -clock [get_clocks async_out_clk] 0.000 $async_outputs +set_max_delay -to $async_outputs 50.000 +set_min_delay -to $async_outputs 0.000 diff --git a/fpga/usrp3/top/x400/constraints/timing/dram.xdc b/fpga/usrp3/top/x400/constraints/timing/dram.xdc new file mode 100644 index 000000000..ed2d2aa64 --- /dev/null +++ b/fpga/usrp3/top/x400/constraints/timing/dram.xdc @@ -0,0 +1,55 @@ +# +# Copyright 2021 Ettus Research, a National Instruments Brand +# +# SPDX-License-Identifier: LGPL-3.0-or-later +# +# Description: +# DRAM timing constraints for X410. +# + +set DramSysClockPeriod 9.996 +set DramSysClockWave {0.0 4.998} +create_clock -name Dram0SysClock -period $DramSysClockPeriod -waveform $DramSysClockWave [get_ports {DRAM0_REFCLK_P}] +create_clock -name Dram1SysClock -period $DramSysClockPeriod -waveform $DramSysClockWave [get_ports {DRAM1_REFCLK_P}] + +## This calibration signal is a static signal. Once asserted it will stay HIGH. +## The multi cycle path constraint is added to improve timing. +set_multicycle_path -setup 8 -from [get_pins */inst/u_ddr4_mem_intfc/u_ddr_cal_top/calDone*/C] +set_multicycle_path -end -hold 7 -from [get_pins */inst/u_ddr4_mem_intfc/u_ddr_cal_top/calDone*/C] + +## These signals once asserted, stay asserted for multiple clock cycles. +## False path constraint is added to improve the HOLD timing. +set_false_path -hold -to [get_pins */inst/*/*/*/*/*/*.u_xiphy_control/xiphy_control/RIU_ADDR*] +set_false_path -hold -to [get_pins */inst/*/*/*/*/*/*.u_xiphy_control/xiphy_control/RIU_WR_DATA*] + +## Multi-cycle path constraints for Fabric - RIU clock domain crossing signals +set_max_delay 5.0 -datapath_only -from [get_pins */inst/*/*/*/u_ddr_cal_addr_decode/io_ready_lvl_reg/C] -to [get_pins */inst/*/u_io_ready_lvl_sync/SYNC[*].sync_reg_reg[0]/D] +set_max_delay 5.0 -datapath_only -from [get_pins */inst/*/*/*/u_ddr_cal_addr_decode/io_read_data_reg[*]/C] -to [get_pins */inst/*/u_io_read_data_sync/SYNC[*].sync_reg_reg[0]/D] +set_max_delay 3.0 -datapath_only -from [get_pins */inst/*/*/*/phy_ready_riuclk_reg/C] -to [get_pins */inst/*/u_phy2clb_phy_ready_sync/SYNC[*].sync_reg_reg[0]/D] +set_max_delay 3.0 -datapath_only -from [get_pins */inst/*/*/*/bisc_complete_riuclk_reg/C] -to [get_pins */inst/*/u_phy2clb_bisc_complete_sync/SYNC[*].sync_reg_reg[0]/D] +set_max_delay 3.0 -datapath_only -from [get_pins */inst/*/*/io_addr_strobe_lvl_riuclk_reg/C] -to [get_pins */inst/*/u_io_addr_strobe_lvl_sync/SYNC[*].sync_reg_reg[0]/D] +set_max_delay 3.0 -datapath_only -from [get_pins */inst/*/*/io_write_strobe_riuclk_reg/C] -to [get_pins */inst/*/u_io_write_strobe_sync/SYNC[*].sync_reg_reg[0]/D] +set_max_delay 3.0 -datapath_only -from [get_pins */inst/*/*/io_address_riuclk_reg[*]/C] -to [get_pins */inst/*/u_io_addr_sync/SYNC[*].sync_reg_reg[0]/D] +set_max_delay 3.0 -datapath_only -from [get_pins */inst/*/*/io_write_data_riuclk_reg[*]/C] -to [get_pins */inst/*/u_io_write_data_sync/SYNC[*].sync_reg_reg[0]/D] +set_max_delay 10.0 -datapath_only -from [get_pins */inst/*/en_vtc_in_reg/C] -to [get_pins */inst/*/u_en_vtc_sync/SYNC[*].sync_reg_reg[0]/D] +set_max_delay 10.0 -datapath_only -from [get_pins */inst/*/*/riu2clb_valid_r1_riuclk_reg[*]/C] -to [get_pins */inst/*/u_riu2clb_valid_sync/SYNC[*].sync_reg_reg[0]/D] +set_max_delay 10.0 -datapath_only -from [get_pins */inst/*/*/*/phy2clb_fixdly_rdy_low_riuclk_int_reg[*]/C] -to [get_pins */inst/*/u_phy2clb_fixdly_rdy_low/SYNC[*].sync_reg_reg[0]/D] +set_max_delay 10.0 -datapath_only -from [get_pins */inst/*/*/*/phy2clb_fixdly_rdy_upp_riuclk_int_reg[*]/C] -to [get_pins */inst/*/u_phy2clb_fixdly_rdy_upp/SYNC[*].sync_reg_reg[0]/D] +set_max_delay 10.0 -datapath_only -from [get_pins */inst/*/*/*/phy2clb_phy_rdy_low_riuclk_int_reg[*]/C] -to [get_pins */inst/*/u_phy2clb_phy_rdy_low/SYNC[*].sync_reg_reg[0]/D] +set_max_delay 10.0 -datapath_only -from [get_pins */inst/*/*/*/phy2clb_phy_rdy_upp_riuclk_int_reg[*]/C] -to [get_pins */inst/*/u_phy2clb_phy_rdy_upp/SYNC[*].sync_reg_reg[0]/D] +set_max_delay 10.0 -datapath_only -from [get_pins */inst/*/rst_r1_reg/C] -to [get_pins */inst/*/u_fab_rst_sync/SYNC[*].sync_reg_reg[0]/D] +set_max_delay 3.0 -datapath_only -from [get_pins */inst/*/*/*/clb2phy_t_b_addr_riuclk_reg/C] -to [get_pins */inst/*/*/*/clb2phy_t_b_addr_i_reg[0]/D] +set_max_delay 3.0 -datapath_only -from [get_pins */inst/*/*/*/*/slave_en_lvl_reg/C] -to [get_pins */inst/*/*/*/*/u_slave_en_sync/SYNC[*].sync_reg_reg[0]/D] +set_max_delay 3.0 -datapath_only -from [get_pins */inst/*/*/*/*/slave_we_r_reg/C] -to [get_pins */inst/*/*/*/*/u_slave_we_sync/SYNC[*].sync_reg_reg[0]/D] +set_max_delay 3.0 -datapath_only -from [get_pins */inst/*/*/*/*/slave_addr_r_reg[*]/C] -to [get_pins */inst/*/*/*/*/u_slave_addr_sync/SYNC[*].sync_reg_reg[0]/D] +set_max_delay 3.0 -datapath_only -from [get_pins */inst/*/*/*/*/slave_di_r_reg[*]/C] -to [get_pins */inst/*/*/*/*/u_slave_di_sync/SYNC[*].sync_reg_reg[0]/D] +set_max_delay 3.0 -datapath_only -from [get_pins */inst/*/*/*/*/slave_rdy_cptd_sclk_reg/C] -to [get_pins */inst/*/*/*/*/u_slave_rdy_cptd_sync/SYNC[*].sync_reg_reg[0]/D] +set_max_delay 12.0 -datapath_only -from [get_pins */inst/*/*/*/*/slave_rdy_lvl_fclk_reg/C] -to [get_pins */inst/*/*/*/*/u_slave_rdy_sync/SYNC[*].sync_reg_reg[0]/D] +set_max_delay 12.0 -datapath_only -from [get_pins */inst/*/*/*/*/slave_do_fclk_reg[*]/C] -to [get_pins */inst/*/*/*/*/u_slave_do_sync/SYNC[*].sync_reg_reg[0]/D] +set_false_path -through [get_pins */inst/u_ddr4_infrastructure/sys_rst] +set_false_path -from [get_pins */inst/*/input_rst_design_reg/C] -to [get_pins */inst/*/rst_div_sync_r_reg[0]/D] +set_false_path -from [get_pins */inst/*/input_rst_design_reg/C] -to [get_pins */inst/*/rst_riu_sync_r_reg[0]/D] +set_false_path -from [get_pins */inst/*/input_rst_design_reg/C] -to [get_pins */inst/*/rst_mb_sync_r_reg[0]/D] +set_false_path -from [get_pins */inst/*/rst_async_riu_div_reg/C] -to [get_pins */inst/*/rst_div_sync_r_reg[0]/D] +set_false_path -from [get_pins */inst/*/rst_async_mb_reg/C] -to [get_pins */inst/*/rst_mb_sync_r_reg[0]/D] +set_false_path -from [get_pins */inst/*/rst_async_riu_div_reg/C] -to [get_pins */inst/*/rst_riu_sync_r_reg[0]/D] diff --git a/fpga/usrp3/top/x400/constraints/timing/qsfp_10gbe.xdc b/fpga/usrp3/top/x400/constraints/timing/qsfp_10gbe.xdc new file mode 100644 index 000000000..2438138e3 --- /dev/null +++ b/fpga/usrp3/top/x400/constraints/timing/qsfp_10gbe.xdc @@ -0,0 +1,19 @@ +# +# Copyright 2021 Ettus Research, a National Instruments Brand +# +# SPDX-License-Identifier: LGPL-3.0-or-later +# +# Description: +# 10 GbE Timing Constraints. +# + +# Specify which clock is used for dclk in the 10 GbE IP. +set DCLK_NAME clk100 + +# Constraints taken from xge_pcs_pma_exceptions.xdc in the example design. +set_max_delay -from [get_clocks -of_objects [get_pins -hierarchical -filter {NAME =~ */channel_inst/*_CHANNEL_PRIM_INST/RXOUTCLK}]] -to [get_clocks -of_objects [get_pins -hierarchical -filter {NAME =~ */channel_inst/*_CHANNEL_PRIM_INST/TXOUTCLK}]] -datapath_only 6.40 +set_max_delay -from [get_clocks -of_objects [get_pins -hierarchical -filter {NAME =~ */channel_inst/*_CHANNEL_PRIM_INST/TXOUTCLK}]] -to [get_clocks -of_objects [get_pins -hierarchical -filter {NAME =~ */channel_inst/*_CHANNEL_PRIM_INST/RXOUTCLK}]] -datapath_only 6.40 +set_max_delay -from [get_clocks -of_objects [get_pins -hierarchical -filter {NAME =~ */channel_inst/*_CHANNEL_PRIM_INST/RXOUTCLK}]] -to [get_clocks $DCLK_NAME] -datapath_only 6.40 +set_max_delay -from [get_clocks -of_objects [get_pins -hierarchical -filter {NAME =~ */channel_inst/*_CHANNEL_PRIM_INST/TXOUTCLK}]] -to [get_clocks $DCLK_NAME] -datapath_only 6.40 +set_max_delay -from [get_clocks $DCLK_NAME] -to [get_clocks -of_objects [get_pins -hierarchical -filter {NAME =~ */channel_inst/*_CHANNEL_PRIM_INST/TXOUTCLK}]] -datapath_only 10.000 +set_max_delay -from [get_clocks $DCLK_NAME] -to [get_clocks -of_objects [get_pins -hierarchical -filter {NAME =~ */channel_inst/*_CHANNEL_PRIM_INST/RXOUTCLK}]] -datapath_only 10.000 diff --git a/fpga/usrp3/top/x400/constraints/timing/shared_constants.sdc b/fpga/usrp3/top/x400/constraints/timing/shared_constants.sdc new file mode 100644 index 000000000..e7d389435 --- /dev/null +++ b/fpga/usrp3/top/x400/constraints/timing/shared_constants.sdc @@ -0,0 +1,130 @@ +# +# Copyright 2021 Ettus Research, a National Instruments Brand +# +# SPDX-License-Identifier: LGPL-3.0-or-later +# +# Description: +# Shared constants for the X410 FPGA and the ZBX CPLD. +# + +# These output delays are more or less arbitrarily chosen, but they dictate the +# delays at the input of the DB CPLD. +# Since the CPLD is built in Quartus, the file extension is .sdc. +set synth_sync_hold_requirement 1.0 +set synth_sync_setup_requirement 8.5 + +# A MC100EPT23 clock translator is placed on the daughterboard to convert +# pll_ref_clk clock IO Standard to 3.3V. The minimum and maximum delays across +# this part are 1.1 ns and 1.8 ns, respectively. +# https://www.onsemi.com/pub/Collateral/MC100EPT23-D.PDF +set clock_translate_min 1.1 +set clock_translate_max 1.8 + +## DB GPIO interface. +# The following values have been adjusted after verifying the slack on input +# and output path for the Post-synthesized designs for FPGA (Vivado) and CPLD +# (Quartus). Values are chosen as those that provide the most slack for FPGA +# timing, while still meeting timing on the CPLD. + +# FPGA output constraints +set db_gpio_fpga_min_out 0.000 +set db_gpio_fpga_max_out 3.250 + +# CPLD output constraints +set db_gpio_cpld_min_out -2.000 +set db_gpio_cpld_max_out 8.500 + +# The longest traces on the DB GPIO interface. +# In order to compute the db_gpio_board_max_delay, the longest GPIO trace from +# the FPGA to any of the DB connector was simulated, and its worst-case value +# was added to the worst-case value obtained while simulating the longest GPIO +# trace on the DB. Both directions (FPGA <-> CPLD) were considered when +# computing the longest propagation delays. Propagation through the Board to +# board connector is assumed shorter than the effect of having the edge +# propagation time twice, as well as adding the two longest traces, instead of +# the longest corresponding pair. +# Longest trace | Trace length | Worst-case delay +# MB: DB0_GPIO[19] | 4.25 in | 912 ps +# DB: MB_FPGA_GPIO_A8 | 3.83 in | 862 ps +set db_gpio_board_max_delay 1.774 + +# The shortest traces on the DB GPIO interface are (assuming 170.0 ps/in). +# A similar consideration was made as for db_gpio_board_max_delay, but using +# the shortest traces in each CCA. +# In this case, edge propagation was not taken into account, as the trace delay +# can act as the worst-case minimum. +# Shorted trace | Trace length | Trace delay +# MB: DB1_GPIO[8] | 2.23 in | 379 ps +# DB: MB_FPGA_GPIO_B12| 2.57 in | 436 ps +set db_gpio_board_min_delay 0.815 + +# DB and FPGA both use PLL reference clock from a common clock chip. +# The common chip that drives these clocks is a LMK04832. +# There exist two additional clock buffers within the trace taking the clock to +# the daughterboard CPLD, a ADCLK944 located in the DB, and a MC100EPT23 near +# the CPLD which takes care of level translation. +# The largest delay that can exist between clocks exists when the LMK04832 +# presents its max skew between outputs and when all clock buffers present +# their maximum delay. +# MC100EPT23 propagation delays will be handled separately in constraints due +# to their significant impact in timing closure, as well as to enable support +# for various corner-cases. +# Board delays were simulated in HyperLynx. Minimum delays considered time +# between start of edge at the source to the start of edge at destination. +# Maximum delays considered time between the start of an edge at the source and +# the settling of the edge at destination. Corner cases were considered for IC +# modeling. +# +# The clock path to the FPGA is composed by a single trace: +# - Minimum clock propagation delay to FPGA = 815 ps. +# - Maximum clock propagation delay to FPGA = 1.329 ps. +# +# The clock path to the CPLD (w/o MC100EPT23) is comprised by multiple traces: +# - Path from MB LMK04832 to DB connector +# - Minimum delay : 1636 ps +# - Path from DB Connector to DB ADCLK944 +# - Minimum delay : 299 ps +# - Path from DB ADCLK944 to CPLD: +# - Minimum delay : 197 ps +# +# The clock path to the CPLD (w/ MC100EPT23) is comprised of multiple traces: +# - Path from MB LMK04832 to DB connector +# - Minimum delay : 1636 ps +# - Maximum delay : 1890 ps +# - Path from DB Connector to DB ADCLK944 +# - Minimum delay : 299 ps +# - Maximum delay : 397 ps +# - Path from DB ADCLK944 to MC100EPT23: +# - Minimum delay : 120 ps +# - Maximum delay : 411 ps +# - Path from MC100EPT23 to CPLD: +# - Minimum delay : 365 ps +# - Maximum delay : 847 ps +# +# The minimum and maximum delays for all traces can be added to account for the +# total board delay to the CPLD: +# +# Max total Board delay = 1890 + 397 + 411 + 847 = 3545 ps +# +# Min total Board delay = 1636 + 299 + 197 = 2132 ps + +# This leaves the worst-case clock arrival values for the different ICs as: + +# Max total Board delay + (Max LMK Skew) + (Max DB ADCLK Prop) +# 3.545 + .1 + .130 = 3.775 ns, +set db_cpld_prc_clock_prop_max 3.775 + +# Min total Board delay - (Max LMK Skew) + (Min DB ADCLK Prop) +# 2.132 - .1 + .07 = 2.102 ns, +set db_cpld_prc_clock_prop_min 2.102 + +# Board delay + (Max LMK Skew) +# 1.329 + .1 = 1.429 ns +set fpga_prc_clock_prop_max 1.429 + +# Board delay - (Max LMK Skew) +# .815 - .1 = 0.715 ns +set fpga_prc_clock_prop_min 0.715 + +# When combining these values, the LMK Skew will be accounted for twice, +# which will just result in more conservative constraints. diff --git a/fpga/usrp3/top/x400/coregen_dsp/Makefile.srcs b/fpga/usrp3/top/x400/coregen_dsp/Makefile.srcs new file mode 100644 index 000000000..41f3147bf --- /dev/null +++ b/fpga/usrp3/top/x400/coregen_dsp/Makefile.srcs @@ -0,0 +1,22 @@ +# +# Copyright 2021 Ettus Research, A National Instruments Brand +# +# SPDX-License-Identifier: LGPL-3.0-or-later +# + +################################################## +# Coregen Sources +################################################## + +COREGEN_DSP_SRCS = $(abspath $(addprefix $(IP_DIR)/../coregen_dsp/, \ +hbdec1.v \ +hbdec1.edif \ +hbdec1_stub.v \ +hbdec2.v \ +hbdec2.edif \ +hbdec2_stub.v \ +hbdec3.v \ +hbdec3.edif \ +hbdec3_stub.v \ +)) + diff --git a/fpga/usrp3/top/x400/coregen_dsp/hbdec1.edif b/fpga/usrp3/top/x400/coregen_dsp/hbdec1.edif new file mode 100644 index 000000000..3d2a17bc6 --- /dev/null +++ b/fpga/usrp3/top/x400/coregen_dsp/hbdec1.edif @@ -0,0 +1,69922 @@ +(edif hbdec1 + (edifVersion 2 0 0) + (edifLevel 0) + (keywordMap (keywordLevel 0)) + (status + (written + (timestamp 2018 8 29 14 59 34) + (program "Xilinx ngc2edif" (version "P_INT.20171106")) + (author "Xilinx. Inc ") + (comment "This EDIF netlist is to be used within supported synthesis tools") + (comment "for determining resource/timing estimates of the design component") + (comment "represented by this netlist.") + (comment "Command line: hbdec1.ngc hbdec1.edif "))) + (external UNISIMS + (edifLevel 0) + (technology (numberDefinition)) + (cell VCC + (cellType GENERIC) + (view view_1 + (viewType NETLIST) + (interface + (port P + (direction OUTPUT) + ) + ) + ) + ) + (cell GND + (cellType GENERIC) + (view view_1 + (viewType NETLIST) + (interface + (port G + (direction OUTPUT) + ) + ) + ) + ) + (cell FDRE + (cellType GENERIC) + (view view_1 + (viewType NETLIST) + (interface + (port C + (direction INPUT) + ) + (port CE + (direction INPUT) + ) + (port D + (direction INPUT) + ) + (port R + (direction INPUT) + ) + (port Q + (direction OUTPUT) + ) + ) + ) + ) + (cell MUXCY_D + (cellType GENERIC) + (view view_1 + (viewType NETLIST) + (interface + (port CI + (direction INPUT) + ) + (port DI + (direction INPUT) + ) + (port S + (direction INPUT) + ) + (port O + (direction OUTPUT) + ) + (port LO + (direction OUTPUT) + ) + ) + ) + ) + (cell XORCY + (cellType GENERIC) + (view view_1 + (viewType NETLIST) + (interface + (port CI + (direction INPUT) + ) + (port LI + (direction INPUT) + ) + (port O + (direction OUTPUT) + ) + ) + ) + ) + (cell FD + (cellType GENERIC) + (view view_1 + (viewType NETLIST) + (interface + (port C + (direction INPUT) + ) + (port D + (direction INPUT) + ) + (port Q + (direction OUTPUT) + ) + ) + ) + ) + (cell DSP48E1 + (cellType GENERIC) + (view view_1 + (viewType NETLIST) + (interface + (port PATTERNBDETECT + (direction OUTPUT) + ) + (port RSTC + (direction INPUT) + ) + (port CEB1 + (direction INPUT) + ) + (port CEAD + (direction INPUT) + ) + (port MULTSIGNOUT + (direction OUTPUT) + ) + (port CEC + (direction INPUT) + ) + (port RSTM + (direction INPUT) + ) + (port MULTSIGNIN + (direction INPUT) + ) + (port CEB2 + (direction INPUT) + ) + (port RSTCTRL + (direction INPUT) + ) + (port CEP + (direction INPUT) + ) + (port CARRYCASCOUT + (direction OUTPUT) + ) + (port RSTA + (direction INPUT) + ) + (port CECARRYIN + (direction INPUT) + ) + (port UNDERFLOW + (direction OUTPUT) + ) + (port PATTERNDETECT + (direction OUTPUT) + ) + (port RSTALUMODE + (direction INPUT) + ) + (port RSTALLCARRYIN + (direction INPUT) + ) + (port CED + (direction INPUT) + ) + (port RSTD + (direction INPUT) + ) + (port CEALUMODE + (direction INPUT) + ) + (port CEA2 + (direction INPUT) + ) + (port CLK + (direction INPUT) + ) + (port CEA1 + (direction INPUT) + ) + (port RSTB + (direction INPUT) + ) + (port OVERFLOW + (direction OUTPUT) + ) + (port CECTRL + (direction INPUT) + ) + (port CEM + (direction INPUT) + ) + (port CARRYIN + (direction INPUT) + ) + (port CARRYCASCIN + (direction INPUT) + ) + (port RSTINMODE + (direction INPUT) + ) + (port CEINMODE + (direction INPUT) + ) + (port RSTP + (direction INPUT) + ) + (port (rename ACOUT_29_ "ACOUT<29>") + (direction OUTPUT) + (property PIN_BUSNAME (string "ACOUT<29:0>") (owner "Xilinx")) + (property PIN_BUSIDX (integer 0) (owner "Xilinx")) + ) + (port (rename ACOUT_28_ "ACOUT<28>") + (direction OUTPUT) + (property PIN_BUSNAME (string "ACOUT<29:0>") (owner "Xilinx")) + (property PIN_BUSIDX (integer 1) (owner "Xilinx")) + ) + (port (rename ACOUT_27_ "ACOUT<27>") + (direction OUTPUT) + (property PIN_BUSNAME (string "ACOUT<29:0>") (owner "Xilinx")) + (property PIN_BUSIDX (integer 2) (owner "Xilinx")) + ) + (port (rename ACOUT_26_ "ACOUT<26>") + (direction OUTPUT) + (property PIN_BUSNAME (string "ACOUT<29:0>") (owner "Xilinx")) + (property PIN_BUSIDX (integer 3) (owner "Xilinx")) + ) + (port (rename ACOUT_25_ "ACOUT<25>") + (direction OUTPUT) + (property PIN_BUSNAME (string "ACOUT<29:0>") (owner "Xilinx")) + (property PIN_BUSIDX (integer 4) (owner "Xilinx")) + ) + (port (rename ACOUT_24_ "ACOUT<24>") + (direction OUTPUT) + (property PIN_BUSNAME (string "ACOUT<29:0>") (owner "Xilinx")) + (property PIN_BUSIDX (integer 5) (owner "Xilinx")) + ) + (port (rename ACOUT_23_ "ACOUT<23>") + (direction OUTPUT) + (property PIN_BUSNAME (string "ACOUT<29:0>") (owner "Xilinx")) + (property PIN_BUSIDX (integer 6) (owner "Xilinx")) + ) + (port (rename ACOUT_22_ "ACOUT<22>") + (direction OUTPUT) + (property PIN_BUSNAME (string "ACOUT<29:0>") (owner "Xilinx")) + (property PIN_BUSIDX (integer 7) (owner "Xilinx")) + ) + (port (rename ACOUT_21_ "ACOUT<21>") + (direction OUTPUT) + (property PIN_BUSNAME (string "ACOUT<29:0>") (owner "Xilinx")) + (property PIN_BUSIDX (integer 8) (owner "Xilinx")) + ) + (port (rename ACOUT_20_ "ACOUT<20>") + (direction OUTPUT) + (property PIN_BUSNAME (string "ACOUT<29:0>") (owner "Xilinx")) + (property PIN_BUSIDX (integer 9) (owner "Xilinx")) + ) + (port (rename ACOUT_19_ "ACOUT<19>") + (direction OUTPUT) + (property PIN_BUSNAME (string "ACOUT<29:0>") (owner "Xilinx")) + (property PIN_BUSIDX (integer 10) (owner "Xilinx")) + ) + (port (rename ACOUT_18_ "ACOUT<18>") + (direction OUTPUT) + (property PIN_BUSNAME (string "ACOUT<29:0>") (owner "Xilinx")) + (property PIN_BUSIDX (integer 11) (owner "Xilinx")) + ) + (port (rename ACOUT_17_ "ACOUT<17>") + (direction OUTPUT) + (property PIN_BUSNAME (string "ACOUT<29:0>") (owner "Xilinx")) + (property PIN_BUSIDX (integer 12) (owner "Xilinx")) + ) + (port (rename ACOUT_16_ "ACOUT<16>") + (direction OUTPUT) + (property PIN_BUSNAME (string "ACOUT<29:0>") (owner "Xilinx")) + (property PIN_BUSIDX (integer 13) (owner "Xilinx")) + ) + (port (rename ACOUT_15_ "ACOUT<15>") + (direction OUTPUT) + (property PIN_BUSNAME (string "ACOUT<29:0>") (owner "Xilinx")) + (property PIN_BUSIDX (integer 14) (owner "Xilinx")) + ) + (port (rename ACOUT_14_ "ACOUT<14>") + (direction OUTPUT) + (property PIN_BUSNAME (string "ACOUT<29:0>") (owner "Xilinx")) + (property PIN_BUSIDX (integer 15) (owner "Xilinx")) + ) + (port (rename ACOUT_13_ "ACOUT<13>") + (direction OUTPUT) + (property PIN_BUSNAME (string "ACOUT<29:0>") (owner "Xilinx")) + (property PIN_BUSIDX (integer 16) (owner "Xilinx")) + ) + (port (rename ACOUT_12_ "ACOUT<12>") + (direction OUTPUT) + (property PIN_BUSNAME (string "ACOUT<29:0>") (owner "Xilinx")) + (property PIN_BUSIDX (integer 17) (owner "Xilinx")) + ) + (port (rename ACOUT_11_ "ACOUT<11>") + (direction OUTPUT) + (property PIN_BUSNAME (string "ACOUT<29:0>") (owner "Xilinx")) + (property PIN_BUSIDX (integer 18) (owner "Xilinx")) + ) + (port (rename ACOUT_10_ "ACOUT<10>") + (direction OUTPUT) + (property PIN_BUSNAME (string "ACOUT<29:0>") (owner "Xilinx")) + (property PIN_BUSIDX (integer 19) (owner "Xilinx")) + ) + (port (rename ACOUT_9_ "ACOUT<9>") + (direction OUTPUT) + (property PIN_BUSNAME (string "ACOUT<29:0>") (owner "Xilinx")) + (property PIN_BUSIDX (integer 20) (owner "Xilinx")) + ) + (port (rename ACOUT_8_ "ACOUT<8>") + (direction OUTPUT) + (property PIN_BUSNAME (string "ACOUT<29:0>") (owner "Xilinx")) + (property PIN_BUSIDX (integer 21) (owner "Xilinx")) + ) + (port (rename ACOUT_7_ "ACOUT<7>") + (direction OUTPUT) + (property PIN_BUSNAME (string "ACOUT<29:0>") (owner "Xilinx")) + (property PIN_BUSIDX (integer 22) (owner "Xilinx")) + ) + (port (rename ACOUT_6_ "ACOUT<6>") + (direction OUTPUT) + (property PIN_BUSNAME (string "ACOUT<29:0>") (owner "Xilinx")) + (property PIN_BUSIDX (integer 23) (owner "Xilinx")) + ) + (port (rename ACOUT_5_ "ACOUT<5>") + (direction OUTPUT) + (property PIN_BUSNAME (string "ACOUT<29:0>") (owner "Xilinx")) + (property PIN_BUSIDX (integer 24) (owner "Xilinx")) + ) + (port (rename ACOUT_4_ "ACOUT<4>") + (direction OUTPUT) + (property PIN_BUSNAME (string "ACOUT<29:0>") (owner "Xilinx")) + (property PIN_BUSIDX (integer 25) (owner "Xilinx")) + ) + (port (rename ACOUT_3_ "ACOUT<3>") + (direction OUTPUT) + (property PIN_BUSNAME (string "ACOUT<29:0>") (owner "Xilinx")) + (property PIN_BUSIDX (integer 26) (owner "Xilinx")) + ) + (port (rename ACOUT_2_ "ACOUT<2>") + (direction OUTPUT) + (property PIN_BUSNAME (string "ACOUT<29:0>") (owner "Xilinx")) + (property PIN_BUSIDX (integer 27) (owner "Xilinx")) + ) + (port (rename ACOUT_1_ "ACOUT<1>") + (direction OUTPUT) + (property PIN_BUSNAME (string "ACOUT<29:0>") (owner "Xilinx")) + (property PIN_BUSIDX (integer 28) (owner "Xilinx")) + ) + (port (rename ACOUT_0_ "ACOUT<0>") + (direction OUTPUT) + (property PIN_BUSNAME (string "ACOUT<29:0>") (owner "Xilinx")) + (property PIN_BUSIDX (integer 29) (owner "Xilinx")) + ) + (port (rename OPMODE_6_ "OPMODE<6>") + (direction INPUT) + (property PIN_BUSNAME (string "OPMODE<6:0>") (owner "Xilinx")) + (property PIN_BUSIDX (integer 0) (owner "Xilinx")) + ) + (port (rename OPMODE_5_ "OPMODE<5>") + (direction INPUT) + (property PIN_BUSNAME (string "OPMODE<6:0>") (owner "Xilinx")) + (property PIN_BUSIDX (integer 1) (owner "Xilinx")) + ) + (port (rename OPMODE_4_ "OPMODE<4>") + (direction INPUT) + (property PIN_BUSNAME (string "OPMODE<6:0>") (owner "Xilinx")) + (property PIN_BUSIDX (integer 2) (owner "Xilinx")) + ) + (port (rename OPMODE_3_ "OPMODE<3>") + (direction INPUT) + (property PIN_BUSNAME (string "OPMODE<6:0>") (owner "Xilinx")) + (property PIN_BUSIDX (integer 3) (owner "Xilinx")) + ) + (port (rename OPMODE_2_ "OPMODE<2>") + (direction INPUT) + (property PIN_BUSNAME (string "OPMODE<6:0>") (owner "Xilinx")) + (property PIN_BUSIDX (integer 4) (owner "Xilinx")) + ) + (port (rename OPMODE_1_ "OPMODE<1>") + (direction INPUT) + (property PIN_BUSNAME (string "OPMODE<6:0>") (owner "Xilinx")) + (property PIN_BUSIDX (integer 5) (owner "Xilinx")) + ) + (port (rename OPMODE_0_ "OPMODE<0>") + (direction INPUT) + (property PIN_BUSNAME (string "OPMODE<6:0>") (owner "Xilinx")) + (property PIN_BUSIDX (integer 6) (owner "Xilinx")) + ) + (port (rename PCIN_47_ "PCIN<47>") + (direction INPUT) + (property PIN_BUSNAME (string "PCIN<47:0>") (owner "Xilinx")) + (property PIN_BUSIDX (integer 0) (owner "Xilinx")) + ) + (port (rename PCIN_46_ "PCIN<46>") + (direction INPUT) + (property PIN_BUSNAME (string "PCIN<47:0>") (owner "Xilinx")) + (property PIN_BUSIDX (integer 1) (owner "Xilinx")) + ) + (port (rename PCIN_45_ "PCIN<45>") + (direction INPUT) + (property PIN_BUSNAME (string "PCIN<47:0>") (owner "Xilinx")) + (property PIN_BUSIDX (integer 2) (owner "Xilinx")) + ) + (port (rename PCIN_44_ "PCIN<44>") + (direction INPUT) + (property PIN_BUSNAME (string "PCIN<47:0>") (owner "Xilinx")) + (property PIN_BUSIDX (integer 3) (owner "Xilinx")) + ) + (port (rename PCIN_43_ "PCIN<43>") + (direction INPUT) + (property PIN_BUSNAME (string "PCIN<47:0>") (owner "Xilinx")) + (property PIN_BUSIDX (integer 4) (owner "Xilinx")) + ) + (port (rename PCIN_42_ "PCIN<42>") + (direction INPUT) + (property PIN_BUSNAME (string "PCIN<47:0>") (owner "Xilinx")) + (property PIN_BUSIDX (integer 5) (owner "Xilinx")) + ) + (port (rename PCIN_41_ "PCIN<41>") + (direction INPUT) + (property PIN_BUSNAME (string "PCIN<47:0>") (owner "Xilinx")) + (property PIN_BUSIDX (integer 6) (owner "Xilinx")) + ) + (port (rename PCIN_40_ "PCIN<40>") + (direction INPUT) + (property PIN_BUSNAME (string "PCIN<47:0>") (owner "Xilinx")) + (property PIN_BUSIDX (integer 7) (owner "Xilinx")) + ) + (port (rename PCIN_39_ "PCIN<39>") + (direction INPUT) + (property PIN_BUSNAME (string "PCIN<47:0>") (owner "Xilinx")) + (property PIN_BUSIDX (integer 8) (owner "Xilinx")) + ) + (port (rename PCIN_38_ "PCIN<38>") + (direction INPUT) + (property PIN_BUSNAME (string "PCIN<47:0>") (owner "Xilinx")) + (property PIN_BUSIDX (integer 9) (owner "Xilinx")) + ) + (port (rename PCIN_37_ "PCIN<37>") + (direction INPUT) + (property PIN_BUSNAME (string "PCIN<47:0>") (owner "Xilinx")) + (property PIN_BUSIDX (integer 10) (owner "Xilinx")) + ) + (port (rename PCIN_36_ "PCIN<36>") + (direction INPUT) + (property PIN_BUSNAME (string "PCIN<47:0>") (owner "Xilinx")) + (property PIN_BUSIDX (integer 11) (owner "Xilinx")) + ) + (port (rename PCIN_35_ "PCIN<35>") + (direction INPUT) + (property PIN_BUSNAME (string "PCIN<47:0>") (owner "Xilinx")) + (property PIN_BUSIDX (integer 12) (owner "Xilinx")) + ) + (port (rename PCIN_34_ "PCIN<34>") + (direction INPUT) + (property PIN_BUSNAME (string "PCIN<47:0>") (owner "Xilinx")) + (property PIN_BUSIDX (integer 13) (owner "Xilinx")) + ) + (port (rename PCIN_33_ "PCIN<33>") + (direction INPUT) + (property PIN_BUSNAME (string "PCIN<47:0>") (owner "Xilinx")) + (property PIN_BUSIDX (integer 14) (owner "Xilinx")) + ) + (port (rename PCIN_32_ "PCIN<32>") + (direction INPUT) + (property PIN_BUSNAME (string "PCIN<47:0>") (owner "Xilinx")) + (property PIN_BUSIDX (integer 15) (owner "Xilinx")) + ) + (port (rename PCIN_31_ "PCIN<31>") + (direction INPUT) + (property PIN_BUSNAME (string "PCIN<47:0>") (owner "Xilinx")) + (property PIN_BUSIDX (integer 16) (owner "Xilinx")) + ) + (port (rename PCIN_30_ "PCIN<30>") + (direction INPUT) + (property PIN_BUSNAME (string "PCIN<47:0>") (owner "Xilinx")) + (property PIN_BUSIDX (integer 17) (owner "Xilinx")) + ) + (port (rename PCIN_29_ "PCIN<29>") + (direction INPUT) + (property PIN_BUSNAME (string "PCIN<47:0>") (owner "Xilinx")) + (property PIN_BUSIDX (integer 18) (owner "Xilinx")) + ) + (port (rename PCIN_28_ "PCIN<28>") + (direction INPUT) + (property PIN_BUSNAME (string "PCIN<47:0>") (owner "Xilinx")) + (property PIN_BUSIDX (integer 19) (owner "Xilinx")) + ) + (port (rename PCIN_27_ "PCIN<27>") + (direction INPUT) + (property PIN_BUSNAME (string "PCIN<47:0>") (owner "Xilinx")) + (property PIN_BUSIDX (integer 20) (owner "Xilinx")) + ) + (port (rename PCIN_26_ "PCIN<26>") + (direction INPUT) + (property PIN_BUSNAME (string "PCIN<47:0>") (owner "Xilinx")) + (property PIN_BUSIDX (integer 21) (owner "Xilinx")) + ) + (port (rename PCIN_25_ "PCIN<25>") + (direction INPUT) + (property PIN_BUSNAME (string "PCIN<47:0>") (owner "Xilinx")) + (property PIN_BUSIDX (integer 22) (owner "Xilinx")) + ) + (port (rename PCIN_24_ "PCIN<24>") + (direction INPUT) + (property PIN_BUSNAME (string "PCIN<47:0>") (owner "Xilinx")) + (property PIN_BUSIDX (integer 23) (owner "Xilinx")) + ) + (port (rename PCIN_23_ "PCIN<23>") + (direction INPUT) + (property PIN_BUSNAME (string "PCIN<47:0>") (owner "Xilinx")) + (property PIN_BUSIDX (integer 24) (owner "Xilinx")) + ) + (port (rename PCIN_22_ "PCIN<22>") + (direction INPUT) + (property PIN_BUSNAME (string "PCIN<47:0>") (owner "Xilinx")) + (property PIN_BUSIDX (integer 25) (owner "Xilinx")) + ) + (port (rename PCIN_21_ "PCIN<21>") + (direction INPUT) + (property PIN_BUSNAME (string "PCIN<47:0>") (owner "Xilinx")) + (property PIN_BUSIDX (integer 26) (owner "Xilinx")) + ) + (port (rename PCIN_20_ "PCIN<20>") + (direction INPUT) + (property PIN_BUSNAME (string "PCIN<47:0>") (owner "Xilinx")) + (property PIN_BUSIDX (integer 27) (owner "Xilinx")) + ) + (port (rename PCIN_19_ "PCIN<19>") + (direction INPUT) + (property PIN_BUSNAME (string "PCIN<47:0>") (owner "Xilinx")) + (property PIN_BUSIDX (integer 28) (owner "Xilinx")) + ) + (port (rename PCIN_18_ "PCIN<18>") + (direction INPUT) + (property PIN_BUSNAME (string "PCIN<47:0>") (owner "Xilinx")) + (property PIN_BUSIDX (integer 29) (owner "Xilinx")) + ) + (port (rename PCIN_17_ "PCIN<17>") + (direction INPUT) + (property PIN_BUSNAME (string "PCIN<47:0>") (owner "Xilinx")) + (property PIN_BUSIDX (integer 30) (owner "Xilinx")) + ) + (port (rename PCIN_16_ "PCIN<16>") + (direction INPUT) + (property PIN_BUSNAME (string "PCIN<47:0>") (owner "Xilinx")) + (property PIN_BUSIDX (integer 31) (owner "Xilinx")) + ) + (port (rename PCIN_15_ "PCIN<15>") + (direction INPUT) + (property PIN_BUSNAME (string "PCIN<47:0>") (owner "Xilinx")) + (property PIN_BUSIDX (integer 32) (owner "Xilinx")) + ) + (port (rename PCIN_14_ "PCIN<14>") + (direction INPUT) + (property PIN_BUSNAME (string "PCIN<47:0>") (owner "Xilinx")) + (property PIN_BUSIDX (integer 33) (owner "Xilinx")) + ) + (port (rename PCIN_13_ "PCIN<13>") + (direction INPUT) + (property PIN_BUSNAME (string "PCIN<47:0>") (owner "Xilinx")) + (property PIN_BUSIDX (integer 34) (owner "Xilinx")) + ) + (port (rename PCIN_12_ "PCIN<12>") + (direction INPUT) + (property PIN_BUSNAME (string "PCIN<47:0>") (owner "Xilinx")) + (property PIN_BUSIDX (integer 35) (owner "Xilinx")) + ) + (port (rename PCIN_11_ "PCIN<11>") + (direction INPUT) + (property PIN_BUSNAME (string "PCIN<47:0>") (owner "Xilinx")) + (property PIN_BUSIDX (integer 36) (owner "Xilinx")) + ) + (port (rename PCIN_10_ "PCIN<10>") + (direction INPUT) + (property PIN_BUSNAME (string "PCIN<47:0>") (owner "Xilinx")) + (property PIN_BUSIDX (integer 37) (owner "Xilinx")) + ) + (port (rename PCIN_9_ "PCIN<9>") + (direction INPUT) + (property PIN_BUSNAME (string "PCIN<47:0>") (owner "Xilinx")) + (property PIN_BUSIDX (integer 38) (owner "Xilinx")) + ) + (port (rename PCIN_8_ "PCIN<8>") + (direction INPUT) + (property PIN_BUSNAME (string "PCIN<47:0>") (owner "Xilinx")) + (property PIN_BUSIDX (integer 39) (owner "Xilinx")) + ) + (port (rename PCIN_7_ "PCIN<7>") + (direction INPUT) + (property PIN_BUSNAME (string "PCIN<47:0>") (owner "Xilinx")) + (property PIN_BUSIDX (integer 40) (owner "Xilinx")) + ) + (port (rename PCIN_6_ "PCIN<6>") + (direction INPUT) + (property PIN_BUSNAME (string "PCIN<47:0>") (owner "Xilinx")) + (property PIN_BUSIDX (integer 41) (owner "Xilinx")) + ) + (port (rename PCIN_5_ "PCIN<5>") + (direction INPUT) + (property PIN_BUSNAME (string "PCIN<47:0>") (owner "Xilinx")) + (property PIN_BUSIDX (integer 42) (owner "Xilinx")) + ) + (port (rename PCIN_4_ "PCIN<4>") + (direction INPUT) + (property PIN_BUSNAME (string "PCIN<47:0>") (owner "Xilinx")) + (property PIN_BUSIDX (integer 43) (owner "Xilinx")) + ) + (port (rename PCIN_3_ "PCIN<3>") + (direction INPUT) + (property PIN_BUSNAME (string "PCIN<47:0>") (owner "Xilinx")) + (property PIN_BUSIDX (integer 44) (owner "Xilinx")) + ) + (port (rename PCIN_2_ "PCIN<2>") + (direction INPUT) + (property PIN_BUSNAME (string "PCIN<47:0>") (owner "Xilinx")) + (property PIN_BUSIDX (integer 45) (owner "Xilinx")) + ) + (port (rename PCIN_1_ "PCIN<1>") + (direction INPUT) + (property PIN_BUSNAME (string "PCIN<47:0>") (owner "Xilinx")) + (property PIN_BUSIDX (integer 46) (owner "Xilinx")) + ) + (port (rename PCIN_0_ "PCIN<0>") + (direction INPUT) + (property PIN_BUSNAME (string "PCIN<47:0>") (owner "Xilinx")) + (property PIN_BUSIDX (integer 47) (owner "Xilinx")) + ) + (port (rename ALUMODE_3_ "ALUMODE<3>") + (direction INPUT) + (property PIN_BUSNAME (string "ALUMODE<3:0>") (owner "Xilinx")) + (property PIN_BUSIDX (integer 0) (owner "Xilinx")) + ) + (port (rename ALUMODE_2_ "ALUMODE<2>") + (direction INPUT) + (property PIN_BUSNAME (string "ALUMODE<3:0>") (owner "Xilinx")) + (property PIN_BUSIDX (integer 1) (owner "Xilinx")) + ) + (port (rename ALUMODE_1_ "ALUMODE<1>") + (direction INPUT) + (property PIN_BUSNAME (string "ALUMODE<3:0>") (owner "Xilinx")) + (property PIN_BUSIDX (integer 2) (owner "Xilinx")) + ) + (port (rename ALUMODE_0_ "ALUMODE<0>") + (direction INPUT) + (property PIN_BUSNAME (string "ALUMODE<3:0>") (owner "Xilinx")) + (property PIN_BUSIDX (integer 3) (owner "Xilinx")) + ) + (port (rename C_47_ "C<47>") + (direction INPUT) + (property PIN_BUSNAME (string "C<47:0>") (owner "Xilinx")) + (property PIN_BUSIDX (integer 0) (owner "Xilinx")) + ) + (port (rename C_46_ "C<46>") + (direction INPUT) + (property PIN_BUSNAME (string "C<47:0>") (owner "Xilinx")) + (property PIN_BUSIDX (integer 1) (owner "Xilinx")) + ) + (port (rename C_45_ "C<45>") + (direction INPUT) + (property PIN_BUSNAME (string "C<47:0>") (owner "Xilinx")) + (property PIN_BUSIDX (integer 2) (owner "Xilinx")) + ) + (port (rename C_44_ "C<44>") + (direction INPUT) + (property PIN_BUSNAME (string "C<47:0>") (owner "Xilinx")) + (property PIN_BUSIDX (integer 3) (owner "Xilinx")) + ) + (port (rename C_43_ "C<43>") + (direction INPUT) + (property PIN_BUSNAME (string "C<47:0>") (owner "Xilinx")) + (property PIN_BUSIDX (integer 4) (owner "Xilinx")) + ) + (port (rename C_42_ "C<42>") + (direction INPUT) + (property PIN_BUSNAME (string "C<47:0>") (owner "Xilinx")) + (property PIN_BUSIDX (integer 5) (owner "Xilinx")) + ) + (port (rename C_41_ "C<41>") + (direction INPUT) + (property PIN_BUSNAME (string "C<47:0>") (owner "Xilinx")) + (property PIN_BUSIDX (integer 6) (owner "Xilinx")) + ) + (port (rename C_40_ "C<40>") + (direction INPUT) + (property PIN_BUSNAME (string "C<47:0>") (owner "Xilinx")) + (property PIN_BUSIDX (integer 7) (owner "Xilinx")) + ) + (port (rename C_39_ "C<39>") + (direction INPUT) + (property PIN_BUSNAME (string "C<47:0>") (owner "Xilinx")) + (property PIN_BUSIDX (integer 8) (owner "Xilinx")) + ) + (port (rename C_38_ "C<38>") + (direction INPUT) + (property PIN_BUSNAME (string "C<47:0>") (owner "Xilinx")) + (property PIN_BUSIDX (integer 9) (owner "Xilinx")) + ) + (port (rename C_37_ "C<37>") + (direction INPUT) + (property PIN_BUSNAME (string "C<47:0>") (owner "Xilinx")) + (property PIN_BUSIDX (integer 10) (owner "Xilinx")) + ) + (port (rename C_36_ "C<36>") + (direction INPUT) + (property PIN_BUSNAME (string "C<47:0>") (owner "Xilinx")) + (property PIN_BUSIDX (integer 11) (owner "Xilinx")) + ) + (port (rename C_35_ "C<35>") + (direction INPUT) + (property PIN_BUSNAME (string "C<47:0>") (owner "Xilinx")) + (property PIN_BUSIDX (integer 12) (owner "Xilinx")) + ) + (port (rename C_34_ "C<34>") + (direction INPUT) + (property PIN_BUSNAME (string "C<47:0>") (owner "Xilinx")) + (property PIN_BUSIDX (integer 13) (owner "Xilinx")) + ) + (port (rename C_33_ "C<33>") + (direction INPUT) + (property PIN_BUSNAME (string "C<47:0>") (owner "Xilinx")) + (property PIN_BUSIDX (integer 14) (owner "Xilinx")) + ) + (port (rename C_32_ "C<32>") + (direction INPUT) + (property PIN_BUSNAME (string "C<47:0>") (owner "Xilinx")) + (property PIN_BUSIDX (integer 15) (owner "Xilinx")) + ) + (port (rename C_31_ "C<31>") + (direction INPUT) + (property PIN_BUSNAME (string "C<47:0>") (owner "Xilinx")) + (property PIN_BUSIDX (integer 16) (owner "Xilinx")) + ) + (port (rename C_30_ "C<30>") + (direction INPUT) + (property PIN_BUSNAME (string "C<47:0>") (owner "Xilinx")) + (property PIN_BUSIDX (integer 17) (owner "Xilinx")) + ) + (port (rename C_29_ "C<29>") + (direction INPUT) + (property PIN_BUSNAME (string "C<47:0>") (owner "Xilinx")) + (property PIN_BUSIDX (integer 18) (owner "Xilinx")) + ) + (port (rename C_28_ "C<28>") + (direction INPUT) + (property PIN_BUSNAME (string "C<47:0>") (owner "Xilinx")) + (property PIN_BUSIDX (integer 19) (owner "Xilinx")) + ) + (port (rename C_27_ "C<27>") + (direction INPUT) + (property PIN_BUSNAME (string "C<47:0>") (owner "Xilinx")) + (property PIN_BUSIDX (integer 20) (owner "Xilinx")) + ) + (port (rename C_26_ "C<26>") + (direction INPUT) + (property PIN_BUSNAME (string "C<47:0>") (owner "Xilinx")) + (property PIN_BUSIDX (integer 21) (owner "Xilinx")) + ) + (port (rename C_25_ "C<25>") + (direction INPUT) + (property PIN_BUSNAME (string "C<47:0>") (owner "Xilinx")) + (property PIN_BUSIDX (integer 22) (owner "Xilinx")) + ) + (port (rename C_24_ "C<24>") + (direction INPUT) + (property PIN_BUSNAME (string "C<47:0>") (owner "Xilinx")) + (property PIN_BUSIDX (integer 23) (owner "Xilinx")) + ) + (port (rename C_23_ "C<23>") + (direction INPUT) + (property PIN_BUSNAME (string "C<47:0>") (owner "Xilinx")) + (property PIN_BUSIDX (integer 24) (owner "Xilinx")) + ) + (port (rename C_22_ "C<22>") + (direction INPUT) + (property PIN_BUSNAME (string "C<47:0>") (owner "Xilinx")) + (property PIN_BUSIDX (integer 25) (owner "Xilinx")) + ) + (port (rename C_21_ "C<21>") + (direction INPUT) + (property PIN_BUSNAME (string "C<47:0>") (owner "Xilinx")) + (property PIN_BUSIDX (integer 26) (owner "Xilinx")) + ) + (port (rename C_20_ "C<20>") + (direction INPUT) + (property PIN_BUSNAME (string "C<47:0>") (owner "Xilinx")) + (property PIN_BUSIDX (integer 27) (owner "Xilinx")) + ) + (port (rename C_19_ "C<19>") + (direction INPUT) + (property PIN_BUSNAME (string "C<47:0>") (owner "Xilinx")) + (property PIN_BUSIDX (integer 28) (owner "Xilinx")) + ) + (port (rename C_18_ "C<18>") + (direction INPUT) + (property PIN_BUSNAME (string "C<47:0>") (owner "Xilinx")) + (property PIN_BUSIDX (integer 29) (owner "Xilinx")) + ) + (port (rename C_17_ "C<17>") + (direction INPUT) + (property PIN_BUSNAME (string "C<47:0>") (owner "Xilinx")) + (property PIN_BUSIDX (integer 30) (owner "Xilinx")) + ) + (port (rename C_16_ "C<16>") + (direction INPUT) + (property PIN_BUSNAME (string "C<47:0>") (owner "Xilinx")) + (property PIN_BUSIDX (integer 31) (owner "Xilinx")) + ) + (port (rename C_15_ "C<15>") + (direction INPUT) + (property PIN_BUSNAME (string "C<47:0>") (owner "Xilinx")) + (property PIN_BUSIDX (integer 32) (owner "Xilinx")) + ) + (port (rename C_14_ "C<14>") + (direction INPUT) + (property PIN_BUSNAME (string "C<47:0>") (owner "Xilinx")) + (property PIN_BUSIDX (integer 33) (owner "Xilinx")) + ) + (port (rename C_13_ "C<13>") + (direction INPUT) + (property PIN_BUSNAME (string "C<47:0>") (owner "Xilinx")) + (property PIN_BUSIDX (integer 34) (owner "Xilinx")) + ) + (port (rename C_12_ "C<12>") + (direction INPUT) + (property PIN_BUSNAME (string "C<47:0>") (owner "Xilinx")) + (property PIN_BUSIDX (integer 35) (owner "Xilinx")) + ) + (port (rename C_11_ "C<11>") + (direction INPUT) + (property PIN_BUSNAME (string "C<47:0>") (owner "Xilinx")) + (property PIN_BUSIDX (integer 36) (owner "Xilinx")) + ) + (port (rename C_10_ "C<10>") + (direction INPUT) + (property PIN_BUSNAME (string "C<47:0>") (owner "Xilinx")) + (property PIN_BUSIDX (integer 37) (owner "Xilinx")) + ) + (port (rename C_9_ "C<9>") + (direction INPUT) + (property PIN_BUSNAME (string "C<47:0>") (owner "Xilinx")) + (property PIN_BUSIDX (integer 38) (owner "Xilinx")) + ) + (port (rename C_8_ "C<8>") + (direction INPUT) + (property PIN_BUSNAME (string "C<47:0>") (owner "Xilinx")) + (property PIN_BUSIDX (integer 39) (owner "Xilinx")) + ) + (port (rename C_7_ "C<7>") + (direction INPUT) + (property PIN_BUSNAME (string "C<47:0>") (owner "Xilinx")) + (property PIN_BUSIDX (integer 40) (owner "Xilinx")) + ) + (port (rename C_6_ "C<6>") + (direction INPUT) + (property PIN_BUSNAME (string "C<47:0>") (owner "Xilinx")) + (property PIN_BUSIDX (integer 41) (owner "Xilinx")) + ) + (port (rename C_5_ "C<5>") + (direction INPUT) + (property PIN_BUSNAME (string "C<47:0>") (owner "Xilinx")) + (property PIN_BUSIDX (integer 42) (owner "Xilinx")) + ) + (port (rename C_4_ "C<4>") + (direction INPUT) + (property PIN_BUSNAME (string "C<47:0>") (owner "Xilinx")) + (property PIN_BUSIDX (integer 43) (owner "Xilinx")) + ) + (port (rename C_3_ "C<3>") + (direction INPUT) + (property PIN_BUSNAME (string "C<47:0>") (owner "Xilinx")) + (property PIN_BUSIDX (integer 44) (owner "Xilinx")) + ) + (port (rename C_2_ "C<2>") + (direction INPUT) + (property PIN_BUSNAME (string "C<47:0>") (owner "Xilinx")) + (property PIN_BUSIDX (integer 45) (owner "Xilinx")) + ) + (port (rename C_1_ "C<1>") + (direction INPUT) + (property PIN_BUSNAME (string "C<47:0>") (owner "Xilinx")) + (property PIN_BUSIDX (integer 46) (owner "Xilinx")) + ) + (port (rename C_0_ "C<0>") + (direction INPUT) + (property PIN_BUSNAME (string "C<47:0>") (owner "Xilinx")) + (property PIN_BUSIDX (integer 47) (owner "Xilinx")) + ) + (port (rename CARRYOUT_3_ "CARRYOUT<3>") + (direction OUTPUT) + (property PIN_BUSNAME (string "CARRYOUT<3:0>") (owner "Xilinx")) + (property PIN_BUSIDX (integer 0) (owner "Xilinx")) + ) + (port (rename CARRYOUT_2_ "CARRYOUT<2>") + (direction OUTPUT) + (property PIN_BUSNAME (string "CARRYOUT<3:0>") (owner "Xilinx")) + (property PIN_BUSIDX (integer 1) (owner "Xilinx")) + ) + (port (rename CARRYOUT_1_ "CARRYOUT<1>") + (direction OUTPUT) + (property PIN_BUSNAME (string "CARRYOUT<3:0>") (owner "Xilinx")) + (property PIN_BUSIDX (integer 2) (owner "Xilinx")) + ) + (port (rename CARRYOUT_0_ "CARRYOUT<0>") + (direction OUTPUT) + (property PIN_BUSNAME (string "CARRYOUT<3:0>") (owner "Xilinx")) + (property PIN_BUSIDX (integer 3) (owner "Xilinx")) + ) + (port (rename INMODE_4_ "INMODE<4>") + (direction INPUT) + (property PIN_BUSNAME (string "INMODE<4:0>") (owner "Xilinx")) + (property PIN_BUSIDX (integer 0) (owner "Xilinx")) + ) + (port (rename INMODE_3_ "INMODE<3>") + (direction INPUT) + (property PIN_BUSNAME (string "INMODE<4:0>") (owner "Xilinx")) + (property PIN_BUSIDX (integer 1) (owner "Xilinx")) + ) + (port (rename INMODE_2_ "INMODE<2>") + (direction INPUT) + (property PIN_BUSNAME (string "INMODE<4:0>") (owner "Xilinx")) + (property PIN_BUSIDX (integer 2) (owner "Xilinx")) + ) + (port (rename INMODE_1_ "INMODE<1>") + (direction INPUT) + (property PIN_BUSNAME (string "INMODE<4:0>") (owner "Xilinx")) + (property PIN_BUSIDX (integer 3) (owner "Xilinx")) + ) + (port (rename INMODE_0_ "INMODE<0>") + (direction INPUT) + (property PIN_BUSNAME (string "INMODE<4:0>") (owner "Xilinx")) + (property PIN_BUSIDX (integer 4) (owner "Xilinx")) + ) + (port (rename BCIN_17_ "BCIN<17>") + (direction INPUT) + (property PIN_BUSNAME (string "BCIN<17:0>") (owner "Xilinx")) + (property PIN_BUSIDX (integer 0) (owner "Xilinx")) + ) + (port (rename BCIN_16_ "BCIN<16>") + (direction INPUT) + (property PIN_BUSNAME (string "BCIN<17:0>") (owner "Xilinx")) + (property PIN_BUSIDX (integer 1) (owner "Xilinx")) + ) + (port (rename BCIN_15_ "BCIN<15>") + (direction INPUT) + (property PIN_BUSNAME (string "BCIN<17:0>") (owner "Xilinx")) + (property PIN_BUSIDX (integer 2) (owner "Xilinx")) + ) + (port (rename BCIN_14_ "BCIN<14>") + (direction INPUT) + (property PIN_BUSNAME (string "BCIN<17:0>") (owner "Xilinx")) + (property PIN_BUSIDX (integer 3) (owner "Xilinx")) + ) + (port (rename BCIN_13_ "BCIN<13>") + (direction INPUT) + (property PIN_BUSNAME (string "BCIN<17:0>") (owner "Xilinx")) + (property PIN_BUSIDX (integer 4) (owner "Xilinx")) + ) + (port (rename BCIN_12_ "BCIN<12>") + (direction INPUT) + (property PIN_BUSNAME (string "BCIN<17:0>") (owner "Xilinx")) + (property PIN_BUSIDX (integer 5) (owner "Xilinx")) + ) + (port (rename BCIN_11_ "BCIN<11>") + (direction INPUT) + (property PIN_BUSNAME (string "BCIN<17:0>") (owner "Xilinx")) + (property PIN_BUSIDX (integer 6) (owner "Xilinx")) + ) + (port (rename BCIN_10_ "BCIN<10>") + (direction INPUT) + (property PIN_BUSNAME (string "BCIN<17:0>") (owner "Xilinx")) + (property PIN_BUSIDX (integer 7) (owner "Xilinx")) + ) + (port (rename BCIN_9_ "BCIN<9>") + (direction INPUT) + (property PIN_BUSNAME (string "BCIN<17:0>") (owner "Xilinx")) + (property PIN_BUSIDX (integer 8) (owner "Xilinx")) + ) + (port (rename BCIN_8_ "BCIN<8>") + (direction INPUT) + (property PIN_BUSNAME (string "BCIN<17:0>") (owner "Xilinx")) + (property PIN_BUSIDX (integer 9) (owner "Xilinx")) + ) + (port (rename BCIN_7_ "BCIN<7>") + (direction INPUT) + (property PIN_BUSNAME (string "BCIN<17:0>") (owner "Xilinx")) + (property PIN_BUSIDX (integer 10) (owner "Xilinx")) + ) + (port (rename BCIN_6_ "BCIN<6>") + (direction INPUT) + (property PIN_BUSNAME (string "BCIN<17:0>") (owner "Xilinx")) + (property PIN_BUSIDX (integer 11) (owner "Xilinx")) + ) + (port (rename BCIN_5_ "BCIN<5>") + (direction INPUT) + (property PIN_BUSNAME (string "BCIN<17:0>") (owner "Xilinx")) + (property PIN_BUSIDX (integer 12) (owner "Xilinx")) + ) + (port (rename BCIN_4_ "BCIN<4>") + (direction INPUT) + (property PIN_BUSNAME (string "BCIN<17:0>") (owner "Xilinx")) + (property PIN_BUSIDX (integer 13) (owner "Xilinx")) + ) + (port (rename BCIN_3_ "BCIN<3>") + (direction INPUT) + (property PIN_BUSNAME (string "BCIN<17:0>") (owner "Xilinx")) + (property PIN_BUSIDX (integer 14) (owner "Xilinx")) + ) + (port (rename BCIN_2_ "BCIN<2>") + (direction INPUT) + (property PIN_BUSNAME (string "BCIN<17:0>") (owner "Xilinx")) + (property PIN_BUSIDX (integer 15) (owner "Xilinx")) + ) + (port (rename BCIN_1_ "BCIN<1>") + (direction INPUT) + (property PIN_BUSNAME (string "BCIN<17:0>") (owner "Xilinx")) + (property PIN_BUSIDX (integer 16) (owner "Xilinx")) + ) + (port (rename BCIN_0_ "BCIN<0>") + (direction INPUT) + (property PIN_BUSNAME (string "BCIN<17:0>") (owner "Xilinx")) + (property PIN_BUSIDX (integer 17) (owner "Xilinx")) + ) + (port (rename B_17_ "B<17>") + (direction INPUT) + (property PIN_BUSNAME (string "B<17:0>") (owner "Xilinx")) + (property PIN_BUSIDX (integer 0) (owner "Xilinx")) + ) + (port (rename B_16_ "B<16>") + (direction INPUT) + (property PIN_BUSNAME (string "B<17:0>") (owner "Xilinx")) + (property PIN_BUSIDX (integer 1) (owner "Xilinx")) + ) + (port (rename B_15_ "B<15>") + (direction INPUT) + (property PIN_BUSNAME (string "B<17:0>") (owner "Xilinx")) + (property PIN_BUSIDX (integer 2) (owner "Xilinx")) + ) + (port (rename B_14_ "B<14>") + (direction INPUT) + (property PIN_BUSNAME (string "B<17:0>") (owner "Xilinx")) + (property PIN_BUSIDX (integer 3) (owner "Xilinx")) + ) + (port (rename B_13_ "B<13>") + (direction INPUT) + (property PIN_BUSNAME (string "B<17:0>") (owner "Xilinx")) + (property PIN_BUSIDX (integer 4) (owner "Xilinx")) + ) + (port (rename B_12_ "B<12>") + (direction INPUT) + (property PIN_BUSNAME (string "B<17:0>") (owner "Xilinx")) + (property PIN_BUSIDX (integer 5) (owner "Xilinx")) + ) + (port (rename B_11_ "B<11>") + (direction INPUT) + (property PIN_BUSNAME (string "B<17:0>") (owner "Xilinx")) + (property PIN_BUSIDX (integer 6) (owner "Xilinx")) + ) + (port (rename B_10_ "B<10>") + (direction INPUT) + (property PIN_BUSNAME (string "B<17:0>") (owner "Xilinx")) + (property PIN_BUSIDX (integer 7) (owner "Xilinx")) + ) + (port (rename B_9_ "B<9>") + (direction INPUT) + (property PIN_BUSNAME (string "B<17:0>") (owner "Xilinx")) + (property PIN_BUSIDX (integer 8) (owner "Xilinx")) + ) + (port (rename B_8_ "B<8>") + (direction INPUT) + (property PIN_BUSNAME (string "B<17:0>") (owner "Xilinx")) + (property PIN_BUSIDX (integer 9) (owner "Xilinx")) + ) + (port (rename B_7_ "B<7>") + (direction INPUT) + (property PIN_BUSNAME (string "B<17:0>") (owner "Xilinx")) + (property PIN_BUSIDX (integer 10) (owner "Xilinx")) + ) + (port (rename B_6_ "B<6>") + (direction INPUT) + (property PIN_BUSNAME (string "B<17:0>") (owner "Xilinx")) + (property PIN_BUSIDX (integer 11) (owner "Xilinx")) + ) + (port (rename B_5_ "B<5>") + (direction INPUT) + (property PIN_BUSNAME (string "B<17:0>") (owner "Xilinx")) + (property PIN_BUSIDX (integer 12) (owner "Xilinx")) + ) + (port (rename B_4_ "B<4>") + (direction INPUT) + (property PIN_BUSNAME (string "B<17:0>") (owner "Xilinx")) + (property PIN_BUSIDX (integer 13) (owner "Xilinx")) + ) + (port (rename B_3_ "B<3>") + (direction INPUT) + (property PIN_BUSNAME (string "B<17:0>") (owner "Xilinx")) + (property PIN_BUSIDX (integer 14) (owner "Xilinx")) + ) + (port (rename B_2_ "B<2>") + (direction INPUT) + (property PIN_BUSNAME (string "B<17:0>") (owner "Xilinx")) + (property PIN_BUSIDX (integer 15) (owner "Xilinx")) + ) + (port (rename B_1_ "B<1>") + (direction INPUT) + (property PIN_BUSNAME (string "B<17:0>") (owner "Xilinx")) + (property PIN_BUSIDX (integer 16) (owner "Xilinx")) + ) + (port (rename B_0_ "B<0>") + (direction INPUT) + (property PIN_BUSNAME (string "B<17:0>") (owner "Xilinx")) + (property PIN_BUSIDX (integer 17) (owner "Xilinx")) + ) + (port (rename BCOUT_17_ "BCOUT<17>") + (direction OUTPUT) + (property PIN_BUSNAME (string "BCOUT<17:0>") (owner "Xilinx")) + (property PIN_BUSIDX (integer 0) (owner "Xilinx")) + ) + (port (rename BCOUT_16_ "BCOUT<16>") + (direction OUTPUT) + (property PIN_BUSNAME (string "BCOUT<17:0>") (owner "Xilinx")) + (property PIN_BUSIDX (integer 1) (owner "Xilinx")) + ) + (port (rename BCOUT_15_ "BCOUT<15>") + (direction OUTPUT) + (property PIN_BUSNAME (string "BCOUT<17:0>") (owner "Xilinx")) + (property PIN_BUSIDX (integer 2) (owner "Xilinx")) + ) + (port (rename BCOUT_14_ "BCOUT<14>") + (direction OUTPUT) + (property PIN_BUSNAME (string "BCOUT<17:0>") (owner "Xilinx")) + (property PIN_BUSIDX (integer 3) (owner "Xilinx")) + ) + (port (rename BCOUT_13_ "BCOUT<13>") + (direction OUTPUT) + (property PIN_BUSNAME (string "BCOUT<17:0>") (owner "Xilinx")) + (property PIN_BUSIDX (integer 4) (owner "Xilinx")) + ) + (port (rename BCOUT_12_ "BCOUT<12>") + (direction OUTPUT) + (property PIN_BUSNAME (string "BCOUT<17:0>") (owner "Xilinx")) + (property PIN_BUSIDX (integer 5) (owner "Xilinx")) + ) + (port (rename BCOUT_11_ "BCOUT<11>") + (direction OUTPUT) + (property PIN_BUSNAME (string "BCOUT<17:0>") (owner "Xilinx")) + (property PIN_BUSIDX (integer 6) (owner "Xilinx")) + ) + (port (rename BCOUT_10_ "BCOUT<10>") + (direction OUTPUT) + (property PIN_BUSNAME (string "BCOUT<17:0>") (owner "Xilinx")) + (property PIN_BUSIDX (integer 7) (owner "Xilinx")) + ) + (port (rename BCOUT_9_ "BCOUT<9>") + (direction OUTPUT) + (property PIN_BUSNAME (string "BCOUT<17:0>") (owner "Xilinx")) + (property PIN_BUSIDX (integer 8) (owner "Xilinx")) + ) + (port (rename BCOUT_8_ "BCOUT<8>") + (direction OUTPUT) + (property PIN_BUSNAME (string "BCOUT<17:0>") (owner "Xilinx")) + (property PIN_BUSIDX (integer 9) (owner "Xilinx")) + ) + (port (rename BCOUT_7_ "BCOUT<7>") + (direction OUTPUT) + (property PIN_BUSNAME (string "BCOUT<17:0>") (owner "Xilinx")) + (property PIN_BUSIDX (integer 10) (owner "Xilinx")) + ) + (port (rename BCOUT_6_ "BCOUT<6>") + (direction OUTPUT) + (property PIN_BUSNAME (string "BCOUT<17:0>") (owner "Xilinx")) + (property PIN_BUSIDX (integer 11) (owner "Xilinx")) + ) + (port (rename BCOUT_5_ "BCOUT<5>") + (direction OUTPUT) + (property PIN_BUSNAME (string "BCOUT<17:0>") (owner "Xilinx")) + (property PIN_BUSIDX (integer 12) (owner "Xilinx")) + ) + (port (rename BCOUT_4_ "BCOUT<4>") + (direction OUTPUT) + (property PIN_BUSNAME (string "BCOUT<17:0>") (owner "Xilinx")) + (property PIN_BUSIDX (integer 13) (owner "Xilinx")) + ) + (port (rename BCOUT_3_ "BCOUT<3>") + (direction OUTPUT) + (property PIN_BUSNAME (string "BCOUT<17:0>") (owner "Xilinx")) + (property PIN_BUSIDX (integer 14) (owner "Xilinx")) + ) + (port (rename BCOUT_2_ "BCOUT<2>") + (direction OUTPUT) + (property PIN_BUSNAME (string "BCOUT<17:0>") (owner "Xilinx")) + (property PIN_BUSIDX (integer 15) (owner "Xilinx")) + ) + (port (rename BCOUT_1_ "BCOUT<1>") + (direction OUTPUT) + (property PIN_BUSNAME (string "BCOUT<17:0>") (owner "Xilinx")) + (property PIN_BUSIDX (integer 16) (owner "Xilinx")) + ) + (port (rename BCOUT_0_ "BCOUT<0>") + (direction OUTPUT) + (property PIN_BUSNAME (string "BCOUT<17:0>") (owner "Xilinx")) + (property PIN_BUSIDX (integer 17) (owner "Xilinx")) + ) + (port (rename D_24_ "D<24>") + (direction INPUT) + (property PIN_BUSNAME (string "D<24:0>") (owner "Xilinx")) + (property PIN_BUSIDX (integer 0) (owner "Xilinx")) + ) + (port (rename D_23_ "D<23>") + (direction INPUT) + (property PIN_BUSNAME (string "D<24:0>") (owner "Xilinx")) + (property PIN_BUSIDX (integer 1) (owner "Xilinx")) + ) + (port (rename D_22_ "D<22>") + (direction INPUT) + (property PIN_BUSNAME (string "D<24:0>") (owner "Xilinx")) + (property PIN_BUSIDX (integer 2) (owner "Xilinx")) + ) + (port (rename D_21_ "D<21>") + (direction INPUT) + (property PIN_BUSNAME (string "D<24:0>") (owner "Xilinx")) + (property PIN_BUSIDX (integer 3) (owner "Xilinx")) + ) + (port (rename D_20_ "D<20>") + (direction INPUT) + (property PIN_BUSNAME (string "D<24:0>") (owner "Xilinx")) + (property PIN_BUSIDX (integer 4) (owner "Xilinx")) + ) + (port (rename D_19_ "D<19>") + (direction INPUT) + (property PIN_BUSNAME (string "D<24:0>") (owner "Xilinx")) + (property PIN_BUSIDX (integer 5) (owner "Xilinx")) + ) + (port (rename D_18_ "D<18>") + (direction INPUT) + (property PIN_BUSNAME (string "D<24:0>") (owner "Xilinx")) + (property PIN_BUSIDX (integer 6) (owner "Xilinx")) + ) + (port (rename D_17_ "D<17>") + (direction INPUT) + (property PIN_BUSNAME (string "D<24:0>") (owner "Xilinx")) + (property PIN_BUSIDX (integer 7) (owner "Xilinx")) + ) + (port (rename D_16_ "D<16>") + (direction INPUT) + (property PIN_BUSNAME (string "D<24:0>") (owner "Xilinx")) + (property PIN_BUSIDX (integer 8) (owner "Xilinx")) + ) + (port (rename D_15_ "D<15>") + (direction INPUT) + (property PIN_BUSNAME (string "D<24:0>") (owner "Xilinx")) + (property PIN_BUSIDX (integer 9) (owner "Xilinx")) + ) + (port (rename D_14_ "D<14>") + (direction INPUT) + (property PIN_BUSNAME (string "D<24:0>") (owner "Xilinx")) + (property PIN_BUSIDX (integer 10) (owner "Xilinx")) + ) + (port (rename D_13_ "D<13>") + (direction INPUT) + (property PIN_BUSNAME (string "D<24:0>") (owner "Xilinx")) + (property PIN_BUSIDX (integer 11) (owner "Xilinx")) + ) + (port (rename D_12_ "D<12>") + (direction INPUT) + (property PIN_BUSNAME (string "D<24:0>") (owner "Xilinx")) + (property PIN_BUSIDX (integer 12) (owner "Xilinx")) + ) + (port (rename D_11_ "D<11>") + (direction INPUT) + (property PIN_BUSNAME (string "D<24:0>") (owner "Xilinx")) + (property PIN_BUSIDX (integer 13) (owner "Xilinx")) + ) + (port (rename D_10_ "D<10>") + (direction INPUT) + (property PIN_BUSNAME (string "D<24:0>") (owner "Xilinx")) + (property PIN_BUSIDX (integer 14) (owner "Xilinx")) + ) + (port (rename D_9_ "D<9>") + (direction INPUT) + (property PIN_BUSNAME (string "D<24:0>") (owner "Xilinx")) + (property PIN_BUSIDX (integer 15) (owner "Xilinx")) + ) + (port (rename D_8_ "D<8>") + (direction INPUT) + (property PIN_BUSNAME (string "D<24:0>") (owner "Xilinx")) + (property PIN_BUSIDX (integer 16) (owner "Xilinx")) + ) + (port (rename D_7_ "D<7>") + (direction INPUT) + (property PIN_BUSNAME (string "D<24:0>") (owner "Xilinx")) + (property PIN_BUSIDX (integer 17) (owner "Xilinx")) + ) + (port (rename D_6_ "D<6>") + (direction INPUT) + (property PIN_BUSNAME (string "D<24:0>") (owner "Xilinx")) + (property PIN_BUSIDX (integer 18) (owner "Xilinx")) + ) + (port (rename D_5_ "D<5>") + (direction INPUT) + (property PIN_BUSNAME (string "D<24:0>") (owner "Xilinx")) + (property PIN_BUSIDX (integer 19) (owner "Xilinx")) + ) + (port (rename D_4_ "D<4>") + (direction INPUT) + (property PIN_BUSNAME (string "D<24:0>") (owner "Xilinx")) + (property PIN_BUSIDX (integer 20) (owner "Xilinx")) + ) + (port (rename D_3_ "D<3>") + (direction INPUT) + (property PIN_BUSNAME (string "D<24:0>") (owner "Xilinx")) + (property PIN_BUSIDX (integer 21) (owner "Xilinx")) + ) + (port (rename D_2_ "D<2>") + (direction INPUT) + (property PIN_BUSNAME (string "D<24:0>") (owner "Xilinx")) + (property PIN_BUSIDX (integer 22) (owner "Xilinx")) + ) + (port (rename D_1_ "D<1>") + (direction INPUT) + (property PIN_BUSNAME (string "D<24:0>") (owner "Xilinx")) + (property PIN_BUSIDX (integer 23) (owner "Xilinx")) + ) + (port (rename D_0_ "D<0>") + (direction INPUT) + (property PIN_BUSNAME (string "D<24:0>") (owner "Xilinx")) + (property PIN_BUSIDX (integer 24) (owner "Xilinx")) + ) + (port (rename P_47_ "P<47>") + (direction OUTPUT) + (property PIN_BUSNAME (string "P<47:0>") (owner "Xilinx")) + (property PIN_BUSIDX (integer 0) (owner "Xilinx")) + ) + (port (rename P_46_ "P<46>") + (direction OUTPUT) + (property PIN_BUSNAME (string "P<47:0>") (owner "Xilinx")) + (property PIN_BUSIDX (integer 1) (owner "Xilinx")) + ) + (port (rename P_45_ "P<45>") + (direction OUTPUT) + (property PIN_BUSNAME (string "P<47:0>") (owner "Xilinx")) + (property PIN_BUSIDX (integer 2) (owner "Xilinx")) + ) + (port (rename P_44_ "P<44>") + (direction OUTPUT) + (property PIN_BUSNAME (string "P<47:0>") (owner "Xilinx")) + (property PIN_BUSIDX (integer 3) (owner "Xilinx")) + ) + (port (rename P_43_ "P<43>") + (direction OUTPUT) + (property PIN_BUSNAME (string "P<47:0>") (owner "Xilinx")) + (property PIN_BUSIDX (integer 4) (owner "Xilinx")) + ) + (port (rename P_42_ "P<42>") + (direction OUTPUT) + (property PIN_BUSNAME (string "P<47:0>") (owner "Xilinx")) + (property PIN_BUSIDX (integer 5) (owner "Xilinx")) + ) + (port (rename P_41_ "P<41>") + (direction OUTPUT) + (property PIN_BUSNAME (string "P<47:0>") (owner "Xilinx")) + (property PIN_BUSIDX (integer 6) (owner "Xilinx")) + ) + (port (rename P_40_ "P<40>") + (direction OUTPUT) + (property PIN_BUSNAME (string "P<47:0>") (owner "Xilinx")) + (property PIN_BUSIDX (integer 7) (owner "Xilinx")) + ) + (port (rename P_39_ "P<39>") + (direction OUTPUT) + (property PIN_BUSNAME (string "P<47:0>") (owner "Xilinx")) + (property PIN_BUSIDX (integer 8) (owner "Xilinx")) + ) + (port (rename P_38_ "P<38>") + (direction OUTPUT) + (property PIN_BUSNAME (string "P<47:0>") (owner "Xilinx")) + (property PIN_BUSIDX (integer 9) (owner "Xilinx")) + ) + (port (rename P_37_ "P<37>") + (direction OUTPUT) + (property PIN_BUSNAME (string "P<47:0>") (owner "Xilinx")) + (property PIN_BUSIDX (integer 10) (owner "Xilinx")) + ) + (port (rename P_36_ "P<36>") + (direction OUTPUT) + (property PIN_BUSNAME (string "P<47:0>") (owner "Xilinx")) + (property PIN_BUSIDX (integer 11) (owner "Xilinx")) + ) + (port (rename P_35_ "P<35>") + (direction OUTPUT) + (property PIN_BUSNAME (string "P<47:0>") (owner "Xilinx")) + (property PIN_BUSIDX (integer 12) (owner "Xilinx")) + ) + (port (rename P_34_ "P<34>") + (direction OUTPUT) + (property PIN_BUSNAME (string "P<47:0>") (owner "Xilinx")) + (property PIN_BUSIDX (integer 13) (owner "Xilinx")) + ) + (port (rename P_33_ "P<33>") + (direction OUTPUT) + (property PIN_BUSNAME (string "P<47:0>") (owner "Xilinx")) + (property PIN_BUSIDX (integer 14) (owner "Xilinx")) + ) + (port (rename P_32_ "P<32>") + (direction OUTPUT) + (property PIN_BUSNAME (string "P<47:0>") (owner "Xilinx")) + (property PIN_BUSIDX (integer 15) (owner "Xilinx")) + ) + (port (rename P_31_ "P<31>") + (direction OUTPUT) + (property PIN_BUSNAME (string "P<47:0>") (owner "Xilinx")) + (property PIN_BUSIDX (integer 16) (owner "Xilinx")) + ) + (port (rename P_30_ "P<30>") + (direction OUTPUT) + (property PIN_BUSNAME (string "P<47:0>") (owner "Xilinx")) + (property PIN_BUSIDX (integer 17) (owner "Xilinx")) + ) + (port (rename P_29_ "P<29>") + (direction OUTPUT) + (property PIN_BUSNAME (string "P<47:0>") (owner "Xilinx")) + (property PIN_BUSIDX (integer 18) (owner "Xilinx")) + ) + (port (rename P_28_ "P<28>") + (direction OUTPUT) + (property PIN_BUSNAME (string "P<47:0>") (owner "Xilinx")) + (property PIN_BUSIDX (integer 19) (owner "Xilinx")) + ) + (port (rename P_27_ "P<27>") + (direction OUTPUT) + (property PIN_BUSNAME (string "P<47:0>") (owner "Xilinx")) + (property PIN_BUSIDX (integer 20) (owner "Xilinx")) + ) + (port (rename P_26_ "P<26>") + (direction OUTPUT) + (property PIN_BUSNAME (string "P<47:0>") (owner "Xilinx")) + (property PIN_BUSIDX (integer 21) (owner "Xilinx")) + ) + (port (rename P_25_ "P<25>") + (direction OUTPUT) + (property PIN_BUSNAME (string "P<47:0>") (owner "Xilinx")) + (property PIN_BUSIDX (integer 22) (owner "Xilinx")) + ) + (port (rename P_24_ "P<24>") + (direction OUTPUT) + (property PIN_BUSNAME (string "P<47:0>") (owner "Xilinx")) + (property PIN_BUSIDX (integer 23) (owner "Xilinx")) + ) + (port (rename P_23_ "P<23>") + (direction OUTPUT) + (property PIN_BUSNAME (string "P<47:0>") (owner "Xilinx")) + (property PIN_BUSIDX (integer 24) (owner "Xilinx")) + ) + (port (rename P_22_ "P<22>") + (direction OUTPUT) + (property PIN_BUSNAME (string "P<47:0>") (owner "Xilinx")) + (property PIN_BUSIDX (integer 25) (owner "Xilinx")) + ) + (port (rename P_21_ "P<21>") + (direction OUTPUT) + (property PIN_BUSNAME (string "P<47:0>") (owner "Xilinx")) + (property PIN_BUSIDX (integer 26) (owner "Xilinx")) + ) + (port (rename P_20_ "P<20>") + (direction OUTPUT) + (property PIN_BUSNAME (string "P<47:0>") (owner "Xilinx")) + (property PIN_BUSIDX (integer 27) (owner "Xilinx")) + ) + (port (rename P_19_ "P<19>") + (direction OUTPUT) + (property PIN_BUSNAME (string "P<47:0>") (owner "Xilinx")) + (property PIN_BUSIDX (integer 28) (owner "Xilinx")) + ) + (port (rename P_18_ "P<18>") + (direction OUTPUT) + (property PIN_BUSNAME (string "P<47:0>") (owner "Xilinx")) + (property PIN_BUSIDX (integer 29) (owner "Xilinx")) + ) + (port (rename P_17_ "P<17>") + (direction OUTPUT) + (property PIN_BUSNAME (string "P<47:0>") (owner "Xilinx")) + (property PIN_BUSIDX (integer 30) (owner "Xilinx")) + ) + (port (rename P_16_ "P<16>") + (direction OUTPUT) + (property PIN_BUSNAME (string "P<47:0>") (owner "Xilinx")) + (property PIN_BUSIDX (integer 31) (owner "Xilinx")) + ) + (port (rename P_15_ "P<15>") + (direction OUTPUT) + (property PIN_BUSNAME (string "P<47:0>") (owner "Xilinx")) + (property PIN_BUSIDX (integer 32) (owner "Xilinx")) + ) + (port (rename P_14_ "P<14>") + (direction OUTPUT) + (property PIN_BUSNAME (string "P<47:0>") (owner "Xilinx")) + (property PIN_BUSIDX (integer 33) (owner "Xilinx")) + ) + (port (rename P_13_ "P<13>") + (direction OUTPUT) + (property PIN_BUSNAME (string "P<47:0>") (owner "Xilinx")) + (property PIN_BUSIDX (integer 34) (owner "Xilinx")) + ) + (port (rename P_12_ "P<12>") + (direction OUTPUT) + (property PIN_BUSNAME (string "P<47:0>") (owner "Xilinx")) + (property PIN_BUSIDX (integer 35) (owner "Xilinx")) + ) + (port (rename P_11_ "P<11>") + (direction OUTPUT) + (property PIN_BUSNAME (string "P<47:0>") (owner "Xilinx")) + (property PIN_BUSIDX (integer 36) (owner "Xilinx")) + ) + (port (rename P_10_ "P<10>") + (direction OUTPUT) + (property PIN_BUSNAME (string "P<47:0>") (owner "Xilinx")) + (property PIN_BUSIDX (integer 37) (owner "Xilinx")) + ) + (port (rename P_9_ "P<9>") + (direction OUTPUT) + (property PIN_BUSNAME (string "P<47:0>") (owner "Xilinx")) + (property PIN_BUSIDX (integer 38) (owner "Xilinx")) + ) + (port (rename P_8_ "P<8>") + (direction OUTPUT) + (property PIN_BUSNAME (string "P<47:0>") (owner "Xilinx")) + (property PIN_BUSIDX (integer 39) (owner "Xilinx")) + ) + (port (rename P_7_ "P<7>") + (direction OUTPUT) + (property PIN_BUSNAME (string "P<47:0>") (owner "Xilinx")) + (property PIN_BUSIDX (integer 40) (owner "Xilinx")) + ) + (port (rename P_6_ "P<6>") + (direction OUTPUT) + (property PIN_BUSNAME (string "P<47:0>") (owner "Xilinx")) + (property PIN_BUSIDX (integer 41) (owner "Xilinx")) + ) + (port (rename P_5_ "P<5>") + (direction OUTPUT) + (property PIN_BUSNAME (string "P<47:0>") (owner "Xilinx")) + (property PIN_BUSIDX (integer 42) (owner "Xilinx")) + ) + (port (rename P_4_ "P<4>") + (direction OUTPUT) + (property PIN_BUSNAME (string "P<47:0>") (owner "Xilinx")) + (property PIN_BUSIDX (integer 43) (owner "Xilinx")) + ) + (port (rename P_3_ "P<3>") + (direction OUTPUT) + (property PIN_BUSNAME (string "P<47:0>") (owner "Xilinx")) + (property PIN_BUSIDX (integer 44) (owner "Xilinx")) + ) + (port (rename P_2_ "P<2>") + (direction OUTPUT) + (property PIN_BUSNAME (string "P<47:0>") (owner "Xilinx")) + (property PIN_BUSIDX (integer 45) (owner "Xilinx")) + ) + (port (rename P_1_ "P<1>") + (direction OUTPUT) + (property PIN_BUSNAME (string "P<47:0>") (owner "Xilinx")) + (property PIN_BUSIDX (integer 46) (owner "Xilinx")) + ) + (port (rename P_0_ "P<0>") + (direction OUTPUT) + (property PIN_BUSNAME (string "P<47:0>") (owner "Xilinx")) + (property PIN_BUSIDX (integer 47) (owner "Xilinx")) + ) + (port (rename A_29_ "A<29>") + (direction INPUT) + (property PIN_BUSNAME (string "A<29:0>") (owner "Xilinx")) + (property PIN_BUSIDX (integer 0) (owner "Xilinx")) + ) + (port (rename A_28_ "A<28>") + (direction INPUT) + (property PIN_BUSNAME (string "A<29:0>") (owner "Xilinx")) + (property PIN_BUSIDX (integer 1) (owner "Xilinx")) + ) + (port (rename A_27_ "A<27>") + (direction INPUT) + (property PIN_BUSNAME (string "A<29:0>") (owner "Xilinx")) + (property PIN_BUSIDX (integer 2) (owner "Xilinx")) + ) + (port (rename A_26_ "A<26>") + (direction INPUT) + (property PIN_BUSNAME (string "A<29:0>") (owner "Xilinx")) + (property PIN_BUSIDX (integer 3) (owner "Xilinx")) + ) + (port (rename A_25_ "A<25>") + (direction INPUT) + (property PIN_BUSNAME (string "A<29:0>") (owner "Xilinx")) + (property PIN_BUSIDX (integer 4) (owner "Xilinx")) + ) + (port (rename A_24_ "A<24>") + (direction INPUT) + (property PIN_BUSNAME (string "A<29:0>") (owner "Xilinx")) + (property PIN_BUSIDX (integer 5) (owner "Xilinx")) + ) + (port (rename A_23_ "A<23>") + (direction INPUT) + (property PIN_BUSNAME (string "A<29:0>") (owner "Xilinx")) + (property PIN_BUSIDX (integer 6) (owner "Xilinx")) + ) + (port (rename A_22_ "A<22>") + (direction INPUT) + (property PIN_BUSNAME (string "A<29:0>") (owner "Xilinx")) + (property PIN_BUSIDX (integer 7) (owner "Xilinx")) + ) + (port (rename A_21_ "A<21>") + (direction INPUT) + (property PIN_BUSNAME (string "A<29:0>") (owner "Xilinx")) + (property PIN_BUSIDX (integer 8) (owner "Xilinx")) + ) + (port (rename A_20_ "A<20>") + (direction INPUT) + (property PIN_BUSNAME (string "A<29:0>") (owner "Xilinx")) + (property PIN_BUSIDX (integer 9) (owner "Xilinx")) + ) + (port (rename A_19_ "A<19>") + (direction INPUT) + (property PIN_BUSNAME (string "A<29:0>") (owner "Xilinx")) + (property PIN_BUSIDX (integer 10) (owner "Xilinx")) + ) + (port (rename A_18_ "A<18>") + (direction INPUT) + (property PIN_BUSNAME (string "A<29:0>") (owner "Xilinx")) + (property PIN_BUSIDX (integer 11) (owner "Xilinx")) + ) + (port (rename A_17_ "A<17>") + (direction INPUT) + (property PIN_BUSNAME (string "A<29:0>") (owner "Xilinx")) + (property PIN_BUSIDX (integer 12) (owner "Xilinx")) + ) + (port (rename A_16_ "A<16>") + (direction INPUT) + (property PIN_BUSNAME (string "A<29:0>") (owner "Xilinx")) + (property PIN_BUSIDX (integer 13) (owner "Xilinx")) + ) + (port (rename A_15_ "A<15>") + (direction INPUT) + (property PIN_BUSNAME (string "A<29:0>") (owner "Xilinx")) + (property PIN_BUSIDX (integer 14) (owner "Xilinx")) + ) + (port (rename A_14_ "A<14>") + (direction INPUT) + (property PIN_BUSNAME (string "A<29:0>") (owner "Xilinx")) + (property PIN_BUSIDX (integer 15) (owner "Xilinx")) + ) + (port (rename A_13_ "A<13>") + (direction INPUT) + (property PIN_BUSNAME (string "A<29:0>") (owner "Xilinx")) + (property PIN_BUSIDX (integer 16) (owner "Xilinx")) + ) + (port (rename A_12_ "A<12>") + (direction INPUT) + (property PIN_BUSNAME (string "A<29:0>") (owner "Xilinx")) + (property PIN_BUSIDX (integer 17) (owner "Xilinx")) + ) + (port (rename A_11_ "A<11>") + (direction INPUT) + (property PIN_BUSNAME (string "A<29:0>") (owner "Xilinx")) + (property PIN_BUSIDX (integer 18) (owner "Xilinx")) + ) + (port (rename A_10_ "A<10>") + (direction INPUT) + (property PIN_BUSNAME (string "A<29:0>") (owner "Xilinx")) + (property PIN_BUSIDX (integer 19) (owner "Xilinx")) + ) + (port (rename A_9_ "A<9>") + (direction INPUT) + (property PIN_BUSNAME (string "A<29:0>") (owner "Xilinx")) + (property PIN_BUSIDX (integer 20) (owner "Xilinx")) + ) + (port (rename A_8_ "A<8>") + (direction INPUT) + (property PIN_BUSNAME (string "A<29:0>") (owner "Xilinx")) + (property PIN_BUSIDX (integer 21) (owner "Xilinx")) + ) + (port (rename A_7_ "A<7>") + (direction INPUT) + (property PIN_BUSNAME (string "A<29:0>") (owner "Xilinx")) + (property PIN_BUSIDX (integer 22) (owner "Xilinx")) + ) + (port (rename A_6_ "A<6>") + (direction INPUT) + (property PIN_BUSNAME (string "A<29:0>") (owner "Xilinx")) + (property PIN_BUSIDX (integer 23) (owner "Xilinx")) + ) + (port (rename A_5_ "A<5>") + (direction INPUT) + (property PIN_BUSNAME (string "A<29:0>") (owner "Xilinx")) + (property PIN_BUSIDX (integer 24) (owner "Xilinx")) + ) + (port (rename A_4_ "A<4>") + (direction INPUT) + (property PIN_BUSNAME (string "A<29:0>") (owner "Xilinx")) + (property PIN_BUSIDX (integer 25) (owner "Xilinx")) + ) + (port (rename A_3_ "A<3>") + (direction INPUT) + (property PIN_BUSNAME (string "A<29:0>") (owner "Xilinx")) + (property PIN_BUSIDX (integer 26) (owner "Xilinx")) + ) + (port (rename A_2_ "A<2>") + (direction INPUT) + (property PIN_BUSNAME (string "A<29:0>") (owner "Xilinx")) + (property PIN_BUSIDX (integer 27) (owner "Xilinx")) + ) + (port (rename A_1_ "A<1>") + (direction INPUT) + (property PIN_BUSNAME (string "A<29:0>") (owner "Xilinx")) + (property PIN_BUSIDX (integer 28) (owner "Xilinx")) + ) + (port (rename A_0_ "A<0>") + (direction INPUT) + (property PIN_BUSNAME (string "A<29:0>") (owner "Xilinx")) + (property PIN_BUSIDX (integer 29) (owner "Xilinx")) + ) + (port (rename PCOUT_47_ "PCOUT<47>") + (direction OUTPUT) + (property PIN_BUSNAME (string "PCOUT<47:0>") (owner "Xilinx")) + (property PIN_BUSIDX (integer 0) (owner "Xilinx")) + ) + (port (rename PCOUT_46_ "PCOUT<46>") + (direction OUTPUT) + (property PIN_BUSNAME (string "PCOUT<47:0>") (owner "Xilinx")) + (property PIN_BUSIDX (integer 1) (owner "Xilinx")) + ) + (port (rename PCOUT_45_ "PCOUT<45>") + (direction OUTPUT) + (property PIN_BUSNAME (string "PCOUT<47:0>") (owner "Xilinx")) + (property PIN_BUSIDX (integer 2) (owner "Xilinx")) + ) + (port (rename PCOUT_44_ "PCOUT<44>") + (direction OUTPUT) + (property PIN_BUSNAME (string "PCOUT<47:0>") (owner "Xilinx")) + (property PIN_BUSIDX (integer 3) (owner "Xilinx")) + ) + (port (rename PCOUT_43_ "PCOUT<43>") + (direction OUTPUT) + (property PIN_BUSNAME (string "PCOUT<47:0>") (owner "Xilinx")) + (property PIN_BUSIDX (integer 4) (owner "Xilinx")) + ) + (port (rename PCOUT_42_ "PCOUT<42>") + (direction OUTPUT) + (property PIN_BUSNAME (string "PCOUT<47:0>") (owner "Xilinx")) + (property PIN_BUSIDX (integer 5) (owner "Xilinx")) + ) + (port (rename PCOUT_41_ "PCOUT<41>") + (direction OUTPUT) + (property PIN_BUSNAME (string "PCOUT<47:0>") (owner "Xilinx")) + (property PIN_BUSIDX (integer 6) (owner "Xilinx")) + ) + (port (rename PCOUT_40_ "PCOUT<40>") + (direction OUTPUT) + (property PIN_BUSNAME (string "PCOUT<47:0>") (owner "Xilinx")) + (property PIN_BUSIDX (integer 7) (owner "Xilinx")) + ) + (port (rename PCOUT_39_ "PCOUT<39>") + (direction OUTPUT) + (property PIN_BUSNAME (string "PCOUT<47:0>") (owner "Xilinx")) + (property PIN_BUSIDX (integer 8) (owner "Xilinx")) + ) + (port (rename PCOUT_38_ "PCOUT<38>") + (direction OUTPUT) + (property PIN_BUSNAME (string "PCOUT<47:0>") (owner "Xilinx")) + (property PIN_BUSIDX (integer 9) (owner "Xilinx")) + ) + (port (rename PCOUT_37_ "PCOUT<37>") + (direction OUTPUT) + (property PIN_BUSNAME (string "PCOUT<47:0>") (owner "Xilinx")) + (property PIN_BUSIDX (integer 10) (owner "Xilinx")) + ) + (port (rename PCOUT_36_ "PCOUT<36>") + (direction OUTPUT) + (property PIN_BUSNAME (string "PCOUT<47:0>") (owner "Xilinx")) + (property PIN_BUSIDX (integer 11) (owner "Xilinx")) + ) + (port (rename PCOUT_35_ "PCOUT<35>") + (direction OUTPUT) + (property PIN_BUSNAME (string "PCOUT<47:0>") (owner "Xilinx")) + (property PIN_BUSIDX (integer 12) (owner "Xilinx")) + ) + (port (rename PCOUT_34_ "PCOUT<34>") + (direction OUTPUT) + (property PIN_BUSNAME (string "PCOUT<47:0>") (owner "Xilinx")) + (property PIN_BUSIDX (integer 13) (owner "Xilinx")) + ) + (port (rename PCOUT_33_ "PCOUT<33>") + (direction OUTPUT) + (property PIN_BUSNAME (string "PCOUT<47:0>") (owner "Xilinx")) + (property PIN_BUSIDX (integer 14) (owner "Xilinx")) + ) + (port (rename PCOUT_32_ "PCOUT<32>") + (direction OUTPUT) + (property PIN_BUSNAME (string "PCOUT<47:0>") (owner "Xilinx")) + (property PIN_BUSIDX (integer 15) (owner "Xilinx")) + ) + (port (rename PCOUT_31_ "PCOUT<31>") + (direction OUTPUT) + (property PIN_BUSNAME (string "PCOUT<47:0>") (owner "Xilinx")) + (property PIN_BUSIDX (integer 16) (owner "Xilinx")) + ) + (port (rename PCOUT_30_ "PCOUT<30>") + (direction OUTPUT) + (property PIN_BUSNAME (string "PCOUT<47:0>") (owner "Xilinx")) + (property PIN_BUSIDX (integer 17) (owner "Xilinx")) + ) + (port (rename PCOUT_29_ "PCOUT<29>") + (direction OUTPUT) + (property PIN_BUSNAME (string "PCOUT<47:0>") (owner "Xilinx")) + (property PIN_BUSIDX (integer 18) (owner "Xilinx")) + ) + (port (rename PCOUT_28_ "PCOUT<28>") + (direction OUTPUT) + (property PIN_BUSNAME (string "PCOUT<47:0>") (owner "Xilinx")) + (property PIN_BUSIDX (integer 19) (owner "Xilinx")) + ) + (port (rename PCOUT_27_ "PCOUT<27>") + (direction OUTPUT) + (property PIN_BUSNAME (string "PCOUT<47:0>") (owner "Xilinx")) + (property PIN_BUSIDX (integer 20) (owner "Xilinx")) + ) + (port (rename PCOUT_26_ "PCOUT<26>") + (direction OUTPUT) + (property PIN_BUSNAME (string "PCOUT<47:0>") (owner "Xilinx")) + (property PIN_BUSIDX (integer 21) (owner "Xilinx")) + ) + (port (rename PCOUT_25_ "PCOUT<25>") + (direction OUTPUT) + (property PIN_BUSNAME (string "PCOUT<47:0>") (owner "Xilinx")) + (property PIN_BUSIDX (integer 22) (owner "Xilinx")) + ) + (port (rename PCOUT_24_ "PCOUT<24>") + (direction OUTPUT) + (property PIN_BUSNAME (string "PCOUT<47:0>") (owner "Xilinx")) + (property PIN_BUSIDX (integer 23) (owner "Xilinx")) + ) + (port (rename PCOUT_23_ "PCOUT<23>") + (direction OUTPUT) + (property PIN_BUSNAME (string "PCOUT<47:0>") (owner "Xilinx")) + (property PIN_BUSIDX (integer 24) (owner "Xilinx")) + ) + (port (rename PCOUT_22_ "PCOUT<22>") + (direction OUTPUT) + (property PIN_BUSNAME (string "PCOUT<47:0>") (owner "Xilinx")) + (property PIN_BUSIDX (integer 25) (owner "Xilinx")) + ) + (port (rename PCOUT_21_ "PCOUT<21>") + (direction OUTPUT) + (property PIN_BUSNAME (string "PCOUT<47:0>") (owner "Xilinx")) + (property PIN_BUSIDX (integer 26) (owner "Xilinx")) + ) + (port (rename PCOUT_20_ "PCOUT<20>") + (direction OUTPUT) + (property PIN_BUSNAME (string "PCOUT<47:0>") (owner "Xilinx")) + (property PIN_BUSIDX (integer 27) (owner "Xilinx")) + ) + (port (rename PCOUT_19_ "PCOUT<19>") + (direction OUTPUT) + (property PIN_BUSNAME (string "PCOUT<47:0>") (owner "Xilinx")) + (property PIN_BUSIDX (integer 28) (owner "Xilinx")) + ) + (port (rename PCOUT_18_ "PCOUT<18>") + (direction OUTPUT) + (property PIN_BUSNAME (string "PCOUT<47:0>") (owner "Xilinx")) + (property PIN_BUSIDX (integer 29) (owner "Xilinx")) + ) + (port (rename PCOUT_17_ "PCOUT<17>") + (direction OUTPUT) + (property PIN_BUSNAME (string "PCOUT<47:0>") (owner "Xilinx")) + (property PIN_BUSIDX (integer 30) (owner "Xilinx")) + ) + (port (rename PCOUT_16_ "PCOUT<16>") + (direction OUTPUT) + (property PIN_BUSNAME (string "PCOUT<47:0>") (owner "Xilinx")) + (property PIN_BUSIDX (integer 31) (owner "Xilinx")) + ) + (port (rename PCOUT_15_ "PCOUT<15>") + (direction OUTPUT) + (property PIN_BUSNAME (string "PCOUT<47:0>") (owner "Xilinx")) + (property PIN_BUSIDX (integer 32) (owner "Xilinx")) + ) + (port (rename PCOUT_14_ "PCOUT<14>") + (direction OUTPUT) + (property PIN_BUSNAME (string "PCOUT<47:0>") (owner "Xilinx")) + (property PIN_BUSIDX (integer 33) (owner "Xilinx")) + ) + (port (rename PCOUT_13_ "PCOUT<13>") + (direction OUTPUT) + (property PIN_BUSNAME (string "PCOUT<47:0>") (owner "Xilinx")) + (property PIN_BUSIDX (integer 34) (owner "Xilinx")) + ) + (port (rename PCOUT_12_ "PCOUT<12>") + (direction OUTPUT) + (property PIN_BUSNAME (string "PCOUT<47:0>") (owner "Xilinx")) + (property PIN_BUSIDX (integer 35) (owner "Xilinx")) + ) + (port (rename PCOUT_11_ "PCOUT<11>") + (direction OUTPUT) + (property PIN_BUSNAME (string "PCOUT<47:0>") (owner "Xilinx")) + (property PIN_BUSIDX (integer 36) (owner "Xilinx")) + ) + (port (rename PCOUT_10_ "PCOUT<10>") + (direction OUTPUT) + (property PIN_BUSNAME (string "PCOUT<47:0>") (owner "Xilinx")) + (property PIN_BUSIDX (integer 37) (owner "Xilinx")) + ) + (port (rename PCOUT_9_ "PCOUT<9>") + (direction OUTPUT) + (property PIN_BUSNAME (string "PCOUT<47:0>") (owner "Xilinx")) + (property PIN_BUSIDX (integer 38) (owner "Xilinx")) + ) + (port (rename PCOUT_8_ "PCOUT<8>") + (direction OUTPUT) + (property PIN_BUSNAME (string "PCOUT<47:0>") (owner "Xilinx")) + (property PIN_BUSIDX (integer 39) (owner "Xilinx")) + ) + (port (rename PCOUT_7_ "PCOUT<7>") + (direction OUTPUT) + (property PIN_BUSNAME (string "PCOUT<47:0>") (owner "Xilinx")) + (property PIN_BUSIDX (integer 40) (owner "Xilinx")) + ) + (port (rename PCOUT_6_ "PCOUT<6>") + (direction OUTPUT) + (property PIN_BUSNAME (string "PCOUT<47:0>") (owner "Xilinx")) + (property PIN_BUSIDX (integer 41) (owner "Xilinx")) + ) + (port (rename PCOUT_5_ "PCOUT<5>") + (direction OUTPUT) + (property PIN_BUSNAME (string "PCOUT<47:0>") (owner "Xilinx")) + (property PIN_BUSIDX (integer 42) (owner "Xilinx")) + ) + (port (rename PCOUT_4_ "PCOUT<4>") + (direction OUTPUT) + (property PIN_BUSNAME (string "PCOUT<47:0>") (owner "Xilinx")) + (property PIN_BUSIDX (integer 43) (owner "Xilinx")) + ) + (port (rename PCOUT_3_ "PCOUT<3>") + (direction OUTPUT) + (property PIN_BUSNAME (string "PCOUT<47:0>") (owner "Xilinx")) + (property PIN_BUSIDX (integer 44) (owner "Xilinx")) + ) + (port (rename PCOUT_2_ "PCOUT<2>") + (direction OUTPUT) + (property PIN_BUSNAME (string "PCOUT<47:0>") (owner "Xilinx")) + (property PIN_BUSIDX (integer 45) (owner "Xilinx")) + ) + (port (rename PCOUT_1_ "PCOUT<1>") + (direction OUTPUT) + (property PIN_BUSNAME (string "PCOUT<47:0>") (owner "Xilinx")) + (property PIN_BUSIDX (integer 46) (owner "Xilinx")) + ) + (port (rename PCOUT_0_ "PCOUT<0>") + (direction OUTPUT) + (property PIN_BUSNAME (string "PCOUT<47:0>") (owner "Xilinx")) + (property PIN_BUSIDX (integer 47) (owner "Xilinx")) + ) + (port (rename ACIN_29_ "ACIN<29>") + (direction INPUT) + (property PIN_BUSNAME (string "ACIN<29:0>") (owner "Xilinx")) + (property PIN_BUSIDX (integer 0) (owner "Xilinx")) + ) + (port (rename ACIN_28_ "ACIN<28>") + (direction INPUT) + (property PIN_BUSNAME (string "ACIN<29:0>") (owner "Xilinx")) + (property PIN_BUSIDX (integer 1) (owner "Xilinx")) + ) + (port (rename ACIN_27_ "ACIN<27>") + (direction INPUT) + (property PIN_BUSNAME (string "ACIN<29:0>") (owner "Xilinx")) + (property PIN_BUSIDX (integer 2) (owner "Xilinx")) + ) + (port (rename ACIN_26_ "ACIN<26>") + (direction INPUT) + (property PIN_BUSNAME (string "ACIN<29:0>") (owner "Xilinx")) + (property PIN_BUSIDX (integer 3) (owner "Xilinx")) + ) + (port (rename ACIN_25_ "ACIN<25>") + (direction INPUT) + (property PIN_BUSNAME (string "ACIN<29:0>") (owner "Xilinx")) + (property PIN_BUSIDX (integer 4) (owner "Xilinx")) + ) + (port (rename ACIN_24_ "ACIN<24>") + (direction INPUT) + (property PIN_BUSNAME (string "ACIN<29:0>") (owner "Xilinx")) + (property PIN_BUSIDX (integer 5) (owner "Xilinx")) + ) + (port (rename ACIN_23_ "ACIN<23>") + (direction INPUT) + (property PIN_BUSNAME (string "ACIN<29:0>") (owner "Xilinx")) + (property PIN_BUSIDX (integer 6) (owner "Xilinx")) + ) + (port (rename ACIN_22_ "ACIN<22>") + (direction INPUT) + (property PIN_BUSNAME (string "ACIN<29:0>") (owner "Xilinx")) + (property PIN_BUSIDX (integer 7) (owner "Xilinx")) + ) + (port (rename ACIN_21_ "ACIN<21>") + (direction INPUT) + (property PIN_BUSNAME (string "ACIN<29:0>") (owner "Xilinx")) + (property PIN_BUSIDX (integer 8) (owner "Xilinx")) + ) + (port (rename ACIN_20_ "ACIN<20>") + (direction INPUT) + (property PIN_BUSNAME (string "ACIN<29:0>") (owner "Xilinx")) + (property PIN_BUSIDX (integer 9) (owner "Xilinx")) + ) + (port (rename ACIN_19_ "ACIN<19>") + (direction INPUT) + (property PIN_BUSNAME (string "ACIN<29:0>") (owner "Xilinx")) + (property PIN_BUSIDX (integer 10) (owner "Xilinx")) + ) + (port (rename ACIN_18_ "ACIN<18>") + (direction INPUT) + (property PIN_BUSNAME (string "ACIN<29:0>") (owner "Xilinx")) + (property PIN_BUSIDX (integer 11) (owner "Xilinx")) + ) + (port (rename ACIN_17_ "ACIN<17>") + (direction INPUT) + (property PIN_BUSNAME (string "ACIN<29:0>") (owner "Xilinx")) + (property PIN_BUSIDX (integer 12) (owner "Xilinx")) + ) + (port (rename ACIN_16_ "ACIN<16>") + (direction INPUT) + (property PIN_BUSNAME (string "ACIN<29:0>") (owner "Xilinx")) + (property PIN_BUSIDX (integer 13) (owner "Xilinx")) + ) + (port (rename ACIN_15_ "ACIN<15>") + (direction INPUT) + (property PIN_BUSNAME (string "ACIN<29:0>") (owner "Xilinx")) + (property PIN_BUSIDX (integer 14) (owner "Xilinx")) + ) + (port (rename ACIN_14_ "ACIN<14>") + (direction INPUT) + (property PIN_BUSNAME (string "ACIN<29:0>") (owner "Xilinx")) + (property PIN_BUSIDX (integer 15) (owner "Xilinx")) + ) + (port (rename ACIN_13_ "ACIN<13>") + (direction INPUT) + (property PIN_BUSNAME (string "ACIN<29:0>") (owner "Xilinx")) + (property PIN_BUSIDX (integer 16) (owner "Xilinx")) + ) + (port (rename ACIN_12_ "ACIN<12>") + (direction INPUT) + (property PIN_BUSNAME (string "ACIN<29:0>") (owner "Xilinx")) + (property PIN_BUSIDX (integer 17) (owner "Xilinx")) + ) + (port (rename ACIN_11_ "ACIN<11>") + (direction INPUT) + (property PIN_BUSNAME (string "ACIN<29:0>") (owner "Xilinx")) + (property PIN_BUSIDX (integer 18) (owner "Xilinx")) + ) + (port (rename ACIN_10_ "ACIN<10>") + (direction INPUT) + (property PIN_BUSNAME (string "ACIN<29:0>") (owner "Xilinx")) + (property PIN_BUSIDX (integer 19) (owner "Xilinx")) + ) + (port (rename ACIN_9_ "ACIN<9>") + (direction INPUT) + (property PIN_BUSNAME (string "ACIN<29:0>") (owner "Xilinx")) + (property PIN_BUSIDX (integer 20) (owner "Xilinx")) + ) + (port (rename ACIN_8_ "ACIN<8>") + (direction INPUT) + (property PIN_BUSNAME (string "ACIN<29:0>") (owner "Xilinx")) + (property PIN_BUSIDX (integer 21) (owner "Xilinx")) + ) + (port (rename ACIN_7_ "ACIN<7>") + (direction INPUT) + (property PIN_BUSNAME (string "ACIN<29:0>") (owner "Xilinx")) + (property PIN_BUSIDX (integer 22) (owner "Xilinx")) + ) + (port (rename ACIN_6_ "ACIN<6>") + (direction INPUT) + (property PIN_BUSNAME (string "ACIN<29:0>") (owner "Xilinx")) + (property PIN_BUSIDX (integer 23) (owner "Xilinx")) + ) + (port (rename ACIN_5_ "ACIN<5>") + (direction INPUT) + (property PIN_BUSNAME (string "ACIN<29:0>") (owner "Xilinx")) + (property PIN_BUSIDX (integer 24) (owner "Xilinx")) + ) + (port (rename ACIN_4_ "ACIN<4>") + (direction INPUT) + (property PIN_BUSNAME (string "ACIN<29:0>") (owner "Xilinx")) + (property PIN_BUSIDX (integer 25) (owner "Xilinx")) + ) + (port (rename ACIN_3_ "ACIN<3>") + (direction INPUT) + (property PIN_BUSNAME (string "ACIN<29:0>") (owner "Xilinx")) + (property PIN_BUSIDX (integer 26) (owner "Xilinx")) + ) + (port (rename ACIN_2_ "ACIN<2>") + (direction INPUT) + (property PIN_BUSNAME (string "ACIN<29:0>") (owner "Xilinx")) + (property PIN_BUSIDX (integer 27) (owner "Xilinx")) + ) + (port (rename ACIN_1_ "ACIN<1>") + (direction INPUT) + (property PIN_BUSNAME (string "ACIN<29:0>") (owner "Xilinx")) + (property PIN_BUSIDX (integer 28) (owner "Xilinx")) + ) + (port (rename ACIN_0_ "ACIN<0>") + (direction INPUT) + (property PIN_BUSNAME (string "ACIN<29:0>") (owner "Xilinx")) + (property PIN_BUSIDX (integer 29) (owner "Xilinx")) + ) + (port (rename CARRYINSEL_2_ "CARRYINSEL<2>") + (direction INPUT) + (property PIN_BUSNAME (string "CARRYINSEL<2:0>") (owner "Xilinx")) + (property PIN_BUSIDX (integer 0) (owner "Xilinx")) + ) + (port (rename CARRYINSEL_1_ "CARRYINSEL<1>") + (direction INPUT) + (property PIN_BUSNAME (string "CARRYINSEL<2:0>") (owner "Xilinx")) + (property PIN_BUSIDX (integer 1) (owner "Xilinx")) + ) + (port (rename CARRYINSEL_0_ "CARRYINSEL<0>") + (direction INPUT) + (property PIN_BUSNAME (string "CARRYINSEL<2:0>") (owner "Xilinx")) + (property PIN_BUSIDX (integer 2) (owner "Xilinx")) + ) + ) + ) + ) + (cell FDSE + (cellType GENERIC) + (view view_1 + (viewType NETLIST) + (interface + (port C + (direction INPUT) + ) + (port CE + (direction INPUT) + ) + (port D + (direction INPUT) + ) + (port S + (direction INPUT) + ) + (port Q + (direction OUTPUT) + ) + ) + ) + ) + (cell FDE + (cellType GENERIC) + (view view_1 + (viewType NETLIST) + (interface + (port C + (direction INPUT) + ) + (port CE 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(cellType GENERIC) + (view view_1 + (viewType NETLIST) + (interface + (port I0 + (direction INPUT) + ) + (port I1 + (direction INPUT) + ) + (port O + (direction OUTPUT) + ) + ) + ) + ) + (cell MUXCY + (cellType GENERIC) + (view view_1 + (viewType NETLIST) + (interface + (port CI + (direction INPUT) + ) + (port DI + (direction INPUT) + ) + (port S + (direction INPUT) + ) + (port O + (direction OUTPUT) + ) + ) + ) + ) + (cell MUXCY_L + (cellType GENERIC) + (view view_1 + (viewType NETLIST) + (interface + (port CI + (direction INPUT) + ) + (port DI + (direction INPUT) + ) + (port S + (direction INPUT) + ) + (port LO + (direction OUTPUT) + ) + ) + ) + ) + (cell SRLC16E + (cellType GENERIC) + (view view_1 + (viewType NETLIST) + (interface + (port A0 + (direction INPUT) + ) + (port A1 + (direction INPUT) + ) + (port A2 + (direction INPUT) + ) + (port A3 + (direction INPUT) + ) + (port CE + (direction INPUT) + ) + (port CLK + (direction INPUT) + ) + (port D + (direction INPUT) + ) + (port Q + (direction OUTPUT) + ) + (port Q15 + (direction OUTPUT) + ) + ) + ) + ) + (cell LUT4 + (cellType GENERIC) + (view view_1 + (viewType NETLIST) + (interface + (port I0 + (direction INPUT) + ) + (port I1 + (direction INPUT) + ) + (port I2 + (direction INPUT) + ) + (port I3 + (direction INPUT) + ) + (port O + (direction OUTPUT) + ) + ) + ) + ) + (cell LUT3 + (cellType GENERIC) + (view view_1 + (viewType NETLIST) + (interface + (port I0 + (direction INPUT) + ) + (port I1 + (direction INPUT) + ) + (port I2 + (direction INPUT) + ) + (port O + (direction OUTPUT) + ) + ) + ) + ) + (cell LUT5 + (cellType GENERIC) + (view view_1 + (viewType NETLIST) + (interface + (port I0 + (direction INPUT) + ) + (port I1 + (direction INPUT) + ) + (port I2 + (direction INPUT) + ) + (port I3 + (direction INPUT) + ) + (port I4 + (direction INPUT) + ) + (port O + (direction OUTPUT) + ) + ) + ) + ) + (cell LUT1 + (cellType GENERIC) + (view view_1 + (viewType NETLIST) + (interface + (port I0 + (direction INPUT) + ) + (port O + (direction OUTPUT) + ) + ) + ) + ) + (cell INV + (cellType GENERIC) + (view view_1 + (viewType NETLIST) + (interface + (port I + (direction INPUT) + ) + (port O + (direction OUTPUT) + ) + ) + ) + ) + ) + + (library hbdec1_lib + (edifLevel 0) + (technology (numberDefinition)) + (cell (rename dpr_ram_8_blk0000075c "dpr_ram_8") + (cellType GENERIC) + (view view_1 + (viewType NETLIST) + (interface + (port WEA + (direction INPUT) + ) + (port CE + (direction INPUT) + ) + (port SCLR + (direction INPUT) + ) + (port CLK + (direction INPUT) + ) + (port (array (rename ADDRA "ADDRA<0:0>") 1) + (direction INPUT)) + (port (array (rename DA_IN "DA_IN<17:0>") 18) + (direction INPUT)) + (port (array (rename ADDRB "ADDRB<0:0>") 1) + (direction INPUT)) + (port (array (rename DA_OUT "DA_OUT<17:0>") 18) + (direction OUTPUT)) + (port (array (rename DB_OUT "DB_OUT<17:0>") 18) + (direction OUTPUT)) + ) + (contents + (instance blk0000075d + (viewRef view_1 (cellRef GND (libraryRef UNISIMS))) + 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OUTPUT)) + (port (array (rename din_10 "din_10<23:0>") 24) + (direction INPUT)) + (port (array (rename din_11 "din_11<23:0>") 24) + (direction INPUT)) + (port (array (rename din_12 "din_12<23:0>") 24) + (direction INPUT)) + (port (array (rename din_13 "din_13<23:0>") 24) + (direction INPUT)) + (port (array (rename din_14 "din_14<23:0>") 24) + (direction INPUT)) + (port (array (rename din_15 "din_15<23:0>") 24) + (direction INPUT)) + (port (array (rename din_16 "din_16<23:0>") 24) + (direction INPUT)) + (port (array (rename coef_filter_sel "coef_filter_sel<0:0>") 1) + (direction INPUT)) + (port (array (rename dout_1 "dout_1<46:0>") 47) + (direction OUTPUT)) + (port (array (rename dout_2 "dout_2<46:0>") 47) + (direction OUTPUT)) + (port (array (rename dout_3 "dout_3<46:0>") 47) + (direction OUTPUT)) + (port (array (rename dout_4 "dout_4<46:0>") 47) + (direction OUTPUT)) + (port (array (rename din_1 "din_1<23:0>") 24) + (direction INPUT)) + (port (array (rename din_2 "din_2<23:0>") 24) + (direction INPUT)) + (port (array (rename dout_5 "dout_5<46:0>") 47) + (direction OUTPUT)) + (port (array (rename din_3 "din_3<23:0>") 24) + (direction INPUT)) + (port (array (rename dout_6 "dout_6<46:0>") 47) + (direction OUTPUT)) + (port (array (rename din_4 "din_4<23:0>") 24) + (direction INPUT)) + (port (array (rename dout_7 "dout_7<46:0>") 47) + (direction OUTPUT)) + (port (array (rename din_5 "din_5<23:0>") 24) + (direction INPUT)) + (port (array (rename dout_8 "dout_8<46:0>") 47) + (direction OUTPUT)) + (port (array (rename din_6 "din_6<23:0>") 24) + (direction INPUT)) + (port (array (rename dout_9 "dout_9<46:0>") 47) + (direction OUTPUT)) + (port (array (rename din_7 "din_7<23:0>") 24) + (direction INPUT)) + (port (array (rename din_8 "din_8<23:0>") 24) + (direction INPUT)) + (port (array (rename din_9 "din_9<23:0>") 24) + (direction INPUT)) + (port (array (rename dout_q_10 "dout_q_10<46:0>") 47) + (direction OUTPUT)) + (port (array (rename dout_q_11 "dout_q_11<46:0>") 47) + (direction OUTPUT)) + (port (array (rename dout_q_12 "dout_q_12<46:0>") 47) + (direction OUTPUT)) + (port (array (rename dout_q_13 "dout_q_13<46:0>") 47) + (direction OUTPUT)) + (port (array (rename dout_q_14 "dout_q_14<46:0>") 47) + (direction OUTPUT)) + (port (array (rename dout_q_15 "dout_q_15<46:0>") 47) + (direction OUTPUT)) + (port (array (rename dout_q_16 "dout_q_16<46:0>") 47) + (direction OUTPUT)) + (port (array (rename coef_din "coef_din<17:0>") 18) + (direction INPUT)) + (port (array (rename dout_i "dout_i<23:0>") 24) + (direction OUTPUT)) + (port (array (rename dout_q "dout_q<46:0>") 47) + (direction OUTPUT)) + (port (array (rename dout_i_1 "dout_i_1<23:0>") 24) + (direction OUTPUT)) + (port (array (rename dout_i_2 "dout_i_2<23:0>") 24) + (direction OUTPUT)) + (port (array (rename dout_i_3 "dout_i_3<23:0>") 24) + (direction OUTPUT)) + (port (array (rename dout_i_4 "dout_i_4<23:0>") 24) + (direction OUTPUT)) + (port (array (rename dout_i_5 "dout_i_5<23:0>") 24) + (direction OUTPUT)) + (port (array (rename dout_i_6 "dout_i_6<23:0>") 24) + (direction OUTPUT)) + (port (array (rename dout_q_1 "dout_q_1<46:0>") 47) + (direction OUTPUT)) + (port (array (rename dout_i_7 "dout_i_7<23:0>") 24) + (direction OUTPUT)) + (port (array (rename dout_q_2 "dout_q_2<46:0>") 47) + (direction OUTPUT)) + (port (array (rename dout_i_8 "dout_i_8<23:0>") 24) + (direction OUTPUT)) + (port (array (rename dout_q_3 "dout_q_3<46:0>") 47) + (direction OUTPUT)) + (port (array (rename dout_i_9 "dout_i_9<23:0>") 24) + (direction OUTPUT)) + (port (array (rename dout_q_4 "dout_q_4<46:0>") 47) + (direction OUTPUT)) + (port (array (rename dout_q_5 "dout_q_5<46:0>") 47) + (direction OUTPUT)) + (port (array (rename dout_q_6 "dout_q_6<46:0>") 47) + (direction OUTPUT)) + (port (array (rename dout_q_7 "dout_q_7<46:0>") 47) + (direction OUTPUT)) + (port (array (rename dout_q_8 "dout_q_8<46:0>") 47) + (direction OUTPUT)) + (port (array (rename dout_q_9 "dout_q_9<46:0>") 47) + (direction OUTPUT)) + (port (array (rename dout "dout<46:0>") 47) + (direction OUTPUT)) + (port (array (rename din "din<23:0>") 24) + (direction INPUT)) + (port (array (rename chan_in "chan_in<0:0>") 1) + (direction OUTPUT)) + (port (array (rename chan_out "chan_out<0:0>") 1) + (direction OUTPUT)) + (port (array (rename filter_sel "filter_sel<0:0>") 1) + (direction INPUT)) + ) + (contents + (instance blk00000004 + (viewRef view_1 (cellRef GND (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + ) + (instance blk00000005 + (viewRef view_1 (cellRef VCC (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + ) + (instance blk00000006 + (viewRef view_1 (cellRef FDRE (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property OPTIMIZE_PRIMITIVES_NGC (string "no") (owner "Xilinx")) + (property INIT (string "0") (owner "Xilinx")) + ) + (instance blk00000007 + (viewRef view_1 (cellRef MUXCY_D (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property OPTIMIZE_PRIMITIVES_NGC (string "no") (owner "Xilinx")) + ) + (instance blk00000008 + (viewRef view_1 (cellRef MUXCY_D (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property OPTIMIZE_PRIMITIVES_NGC (string "no") (owner "Xilinx")) + ) + (instance blk00000009 + (viewRef view_1 (cellRef FDRE (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property INIT (string "0") (owner "Xilinx")) + ) + (instance blk0000000a + (viewRef view_1 (cellRef MUXCY_D (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property OPTIMIZE_PRIMITIVES_NGC (string "no") (owner "Xilinx")) + ) + (instance blk0000000b + (viewRef view_1 (cellRef MUXCY_D (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property OPTIMIZE_PRIMITIVES_NGC (string "no") (owner "Xilinx")) + ) + (instance blk0000000c + (viewRef view_1 (cellRef XORCY (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property OPTIMIZE_PRIMITIVES_NGC (string "no") (owner "Xilinx")) + ) + (instance blk0000000d + (viewRef view_1 (cellRef FD (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property INIT (string "0") (owner "Xilinx")) + ) + (instance blk0000000e + (viewRef view_1 (cellRef FD (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property INIT (string "0") (owner "Xilinx")) + ) + (instance blk0000000f + (viewRef view_1 (cellRef FD (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property INIT (string "0") (owner "Xilinx")) + ) + (instance blk00000010 + (viewRef view_1 (cellRef MUXCY_D (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property OPTIMIZE_PRIMITIVES_NGC (string "no") (owner "Xilinx")) + ) + (instance blk00000011 + (viewRef view_1 (cellRef MUXCY_D (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property OPTIMIZE_PRIMITIVES_NGC (string "no") (owner "Xilinx")) + ) + (instance blk00000012 + (viewRef view_1 (cellRef XORCY (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property OPTIMIZE_PRIMITIVES_NGC (string "no") (owner "Xilinx")) + ) + (instance blk00000013 + (viewRef view_1 (cellRef MUXCY_D (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property OPTIMIZE_PRIMITIVES_NGC (string "no") (owner "Xilinx")) + ) + (instance blk00000014 + (viewRef view_1 (cellRef MUXCY_D (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property OPTIMIZE_PRIMITIVES_NGC (string "no") (owner "Xilinx")) + ) + (instance blk00000015 + (viewRef view_1 (cellRef DSP48E1 (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property BUS_INFO (string "3:INPUT:CARRYINSEL<2:0>") (owner "Xilinx")) + (property BUS_INFO (string "4:OUTPUT:CARRYOUT<3:0>") (owner "Xilinx")) + (property BUS_INFO (string "4:INPUT:ALUMODE<3:0>") (owner "Xilinx")) + (property BUS_INFO (string "7:INPUT:OPMODE<6:0>") (owner "Xilinx")) + (property BUS_INFO (string "5:INPUT:INMODE<4:0>") (owner "Xilinx")) + (property BUS_INFO (string "30:OUTPUT:ACOUT<29:0>") (owner "Xilinx")) + (property BUS_INFO (string "18:OUTPUT:BCOUT<17:0>") (owner "Xilinx")) + (property BUS_INFO (string "48:OUTPUT:PCOUT<47:0>") (owner "Xilinx")) + (property BUS_INFO (string "48:INPUT:PCIN<47:0>") (owner "Xilinx")) + (property BUS_INFO (string "18:INPUT:BCIN<17:0>") (owner "Xilinx")) + (property BUS_INFO (string "30:INPUT:ACIN<29:0>") (owner "Xilinx")) + (property BUS_INFO (string "48:INPUT:C<47:0>") (owner "Xilinx")) + (property BUS_INFO (string "18:INPUT:B<17:0>") (owner "Xilinx")) + (property BUS_INFO (string "25:INPUT:D<24:0>") (owner "Xilinx")) + (property BUS_INFO (string "48:OUTPUT:P<47:0>") (owner "Xilinx")) + (property BUS_INFO (string "30:INPUT:A<29:0>") (owner "Xilinx")) + (property OPTIMIZE_PRIMITIVES_NGC (string "no") (owner "Xilinx")) + (property ACASCREG (integer 2) (owner "Xilinx")) + (property ADREG (integer 0) (owner "Xilinx")) + (property ALUMODEREG (integer 1) (owner "Xilinx")) + (property AREG (integer 2) (owner "Xilinx")) + (property AUTORESET_PATDET (string "NO_RESET") (owner "Xilinx")) + (property A_INPUT (string "DIRECT") (owner "Xilinx")) + (property BCASCREG (integer 2) (owner "Xilinx")) + (property BREG (integer 2) (owner "Xilinx")) + (property B_INPUT (string "DIRECT") (owner "Xilinx")) + (property CARRYINREG (integer 1) (owner "Xilinx")) + (property CARRYINSELREG (integer 1) (owner "Xilinx")) + (property CREG (integer 1) (owner "Xilinx")) + (property DREG (integer 0) (owner "Xilinx")) + (property INMODEREG (integer 0) (owner "Xilinx")) + (property MASK (string "FFFFFFFFFFFE") (owner "Xilinx")) + (property MREG (integer 1) (owner "Xilinx")) + (property OPMODEREG (integer 1) (owner "Xilinx")) + (property PATTERN (string "000000000000") (owner "Xilinx")) + (property PREG (integer 1) (owner "Xilinx")) + (property SEL_MASK (string "MASK") (owner "Xilinx")) + (property SEL_PATTERN (string "PATTERN") (owner "Xilinx")) + (property USE_DPORT (string "FALSE") (owner "Xilinx")) + (property USE_MULT (string "MULTIPLY") (owner "Xilinx")) + (property USE_PATTERN_DETECT (string "NO_PATDET") (owner "Xilinx")) + (property USE_SIMD (string "ONE48") (owner "Xilinx")) + ) + (instance blk00000016 + (viewRef view_1 (cellRef DSP48E1 (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property BUS_INFO (string "3:INPUT:CARRYINSEL<2:0>") (owner "Xilinx")) + (property BUS_INFO (string "4:OUTPUT:CARRYOUT<3:0>") (owner "Xilinx")) + (property BUS_INFO (string "4:INPUT:ALUMODE<3:0>") (owner "Xilinx")) + (property BUS_INFO (string "7:INPUT:OPMODE<6:0>") (owner "Xilinx")) + (property BUS_INFO (string "5:INPUT:INMODE<4:0>") (owner "Xilinx")) + (property BUS_INFO (string "30:OUTPUT:ACOUT<29:0>") (owner "Xilinx")) + (property BUS_INFO (string "18:OUTPUT:BCOUT<17:0>") (owner "Xilinx")) + (property BUS_INFO (string "48:OUTPUT:PCOUT<47:0>") (owner "Xilinx")) + (property BUS_INFO (string "48:INPUT:PCIN<47:0>") (owner "Xilinx")) + (property BUS_INFO (string "18:INPUT:BCIN<17:0>") (owner "Xilinx")) + (property BUS_INFO (string "30:INPUT:ACIN<29:0>") (owner "Xilinx")) + (property BUS_INFO (string "48:INPUT:C<47:0>") (owner "Xilinx")) + (property BUS_INFO (string "18:INPUT:B<17:0>") (owner "Xilinx")) + (property BUS_INFO (string "25:INPUT:D<24:0>") (owner "Xilinx")) + (property BUS_INFO (string "48:OUTPUT:P<47:0>") (owner "Xilinx")) + (property BUS_INFO (string "30:INPUT:A<29:0>") (owner "Xilinx")) + (property OPTIMIZE_PRIMITIVES_NGC (string "no") (owner "Xilinx")) + (property ACASCREG (integer 2) (owner "Xilinx")) + (property ADREG (integer 0) (owner "Xilinx")) + (property ALUMODEREG (integer 1) (owner "Xilinx")) + (property AREG (integer 2) (owner "Xilinx")) + (property AUTORESET_PATDET (string "NO_RESET") (owner "Xilinx")) + (property A_INPUT (string "DIRECT") (owner "Xilinx")) + (property BCASCREG (integer 2) (owner "Xilinx")) + (property BREG (integer 2) (owner "Xilinx")) + (property B_INPUT (string "DIRECT") (owner "Xilinx")) + (property CARRYINREG (integer 1) (owner "Xilinx")) + (property CARRYINSELREG (integer 1) (owner "Xilinx")) + (property CREG (integer 1) (owner "Xilinx")) + (property DREG (integer 0) (owner "Xilinx")) + (property INMODEREG (integer 0) (owner "Xilinx")) + (property MASK (string "FFFFFFFFFFFE") (owner "Xilinx")) + (property MREG (integer 1) (owner "Xilinx")) + (property OPMODEREG (integer 1) (owner "Xilinx")) + (property PATTERN (string "000000000000") (owner "Xilinx")) + (property PREG (integer 1) (owner "Xilinx")) + (property SEL_MASK (string "MASK") (owner "Xilinx")) + (property SEL_PATTERN (string "PATTERN") (owner "Xilinx")) + (property USE_DPORT (string "FALSE") (owner "Xilinx")) + (property USE_MULT (string "MULTIPLY") (owner "Xilinx")) + (property USE_PATTERN_DETECT (string "NO_PATDET") (owner "Xilinx")) + (property USE_SIMD (string "ONE48") (owner "Xilinx")) + ) + (instance blk00000017 + (viewRef view_1 (cellRef MUXCY_D (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property OPTIMIZE_PRIMITIVES_NGC (string "no") (owner "Xilinx")) + ) + (instance blk00000018 + (viewRef view_1 (cellRef FDSE (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property OPTIMIZE_PRIMITIVES_NGC (string "no") (owner "Xilinx")) + (property INIT (string "1") (owner "Xilinx")) + ) + (instance blk00000019 + (viewRef view_1 (cellRef FDRE (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property OPTIMIZE_PRIMITIVES_NGC (string "no") (owner "Xilinx")) + (property INIT (string "0") (owner "Xilinx")) + ) + (instance blk0000001a + (viewRef view_1 (cellRef FDRE (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property OPTIMIZE_PRIMITIVES_NGC (string "no") (owner "Xilinx")) + (property INIT (string "0") (owner "Xilinx")) + ) + (instance blk0000001b + (viewRef view_1 (cellRef FDE (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property INIT (string "0") (owner "Xilinx")) + ) + (instance blk0000001c + (viewRef view_1 (cellRef FDRE (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property OPTIMIZE_PRIMITIVES_NGC (string "no") (owner "Xilinx")) + (property INIT (string "0") (owner "Xilinx")) + ) + (instance blk0000001d + (viewRef view_1 (cellRef FDRE (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property OPTIMIZE_PRIMITIVES_NGC (string "no") (owner "Xilinx")) + (property INIT (string "0") (owner "Xilinx")) + ) + (instance blk0000001e + (viewRef view_1 (cellRef FDRE (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property OPTIMIZE_PRIMITIVES_NGC (string "no") (owner "Xilinx")) + (property INIT (string "0") (owner "Xilinx")) + ) + (instance blk0000001f + (viewRef view_1 (cellRef FDRE (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property OPTIMIZE_PRIMITIVES_NGC (string "no") (owner "Xilinx")) + (property INIT (string "0") (owner "Xilinx")) + ) + (instance blk00000020 + (viewRef view_1 (cellRef FDRE (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property OPTIMIZE_PRIMITIVES_NGC (string "no") (owner "Xilinx")) + (property INIT (string "0") (owner "Xilinx")) + ) + (instance blk00000021 + (viewRef view_1 (cellRef FDRE (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property OPTIMIZE_PRIMITIVES_NGC (string "no") (owner "Xilinx")) + (property INIT (string "0") (owner "Xilinx")) + ) + (instance blk00000022 + (viewRef view_1 (cellRef FDSE (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + ) + (instance blk00000023 + (viewRef view_1 (cellRef FDRE (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + ) + (instance blk00000024 + (viewRef view_1 (cellRef FDRE (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property INIT (string "0") (owner "Xilinx")) + ) + (instance blk00000025 + (viewRef view_1 (cellRef FDRE (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + ) + (instance blk00000026 + (viewRef view_1 (cellRef FDRE (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property INIT (string "0") (owner "Xilinx")) + ) + (instance blk00000027 + (viewRef view_1 (cellRef FDRE (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property INIT (string "0") (owner "Xilinx")) + ) + (instance blk00000028 + (viewRef view_1 (cellRef FDRE (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property INIT (string "0") (owner "Xilinx")) + ) + (instance blk00000029 + (viewRef view_1 (cellRef FDRE (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property INIT (string "0") (owner "Xilinx")) + ) + (instance blk0000002a + (viewRef view_1 (cellRef FDRE (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property INIT (string "0") (owner "Xilinx")) + ) + (instance blk0000002b + (viewRef view_1 (cellRef FDR (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property INIT (string "1") (owner "Xilinx")) + ) + (instance blk0000002c + (viewRef view_1 (cellRef dpr_ram_1_blk0000002c (libraryRef hbdec1_lib))) + (property BUS_INFO (string "3:INPUT:ADDRA<2:0>") (owner "Xilinx")) + (property BUS_INFO (string "48:INPUT:DA_IN<47:0>") (owner "Xilinx")) + (property BUS_INFO (string "3:INPUT:ADDRB<2:0>") (owner "Xilinx")) + (property BUS_INFO (string "48:OUTPUT:DA_OUT<47:0>") (owner "Xilinx")) + (property BUS_INFO (string "48:OUTPUT:DB_OUT<47:0>") (owner "Xilinx")) + (property NLW_UNIQUE_ID (integer 0) (owner "Xilinx")) + (property NLW_MACRO_TAG (integer 2) (owner "Xilinx")) + (property NLW_MACRO_ALIAS (string "dpr_ram_1_blk0000002c") (owner "Xilinx")) + ) + (instance blk0000008f + (viewRef view_1 (cellRef FDSE (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property OPTIMIZE_PRIMITIVES_NGC (string "no") (owner "Xilinx")) + (property INIT (string "1") (owner "Xilinx")) + ) + (instance blk00000090 + (viewRef view_1 (cellRef FDRE (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property OPTIMIZE_PRIMITIVES_NGC (string "no") (owner "Xilinx")) + (property INIT (string "0") (owner "Xilinx")) + ) + (instance blk00000091 + (viewRef view_1 (cellRef MUXCY_D (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property OPTIMIZE_PRIMITIVES_NGC (string "no") (owner "Xilinx")) + ) + (instance blk00000092 + (viewRef view_1 (cellRef MUXCY_D (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property OPTIMIZE_PRIMITIVES_NGC (string "no") (owner "Xilinx")) + ) + (instance blk00000093 + (viewRef view_1 (cellRef XORCY (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property OPTIMIZE_PRIMITIVES_NGC (string "no") (owner "Xilinx")) + ) + (instance blk00000094 + (viewRef view_1 (cellRef MUXCY_D (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property OPTIMIZE_PRIMITIVES_NGC (string "no") (owner "Xilinx")) + ) + (instance blk00000095 + (viewRef view_1 (cellRef XORCY (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property OPTIMIZE_PRIMITIVES_NGC (string "no") (owner "Xilinx")) + ) + (instance blk00000096 + (viewRef view_1 (cellRef MUXCY_D (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property OPTIMIZE_PRIMITIVES_NGC (string "no") (owner "Xilinx")) + ) + (instance blk00000097 + (viewRef view_1 (cellRef MUXCY_D (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property OPTIMIZE_PRIMITIVES_NGC (string "no") (owner "Xilinx")) + ) + (instance blk00000098 + (viewRef view_1 (cellRef MUXCY_D (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property OPTIMIZE_PRIMITIVES_NGC (string "no") (owner "Xilinx")) + ) + (instance blk00000099 + (viewRef view_1 (cellRef MUXCY_D (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property OPTIMIZE_PRIMITIVES_NGC (string "no") (owner "Xilinx")) + ) + (instance blk0000009a + (viewRef view_1 (cellRef MUXCY_D (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property OPTIMIZE_PRIMITIVES_NGC (string "no") (owner "Xilinx")) + ) + (instance blk0000009b + (viewRef view_1 (cellRef MUXCY_D (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property OPTIMIZE_PRIMITIVES_NGC (string "no") (owner "Xilinx")) + ) + (instance blk0000009c + (viewRef view_1 (cellRef FDE (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property INIT (string "0") (owner "Xilinx")) + ) + (instance blk0000009d + (viewRef view_1 (cellRef FDE (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property INIT (string "0") (owner "Xilinx")) + ) + (instance blk0000009e + (viewRef view_1 (cellRef FDRE (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property OPTIMIZE_PRIMITIVES_NGC (string "no") (owner "Xilinx")) + (property INIT (string "0") (owner "Xilinx")) + ) + (instance blk0000009f + (viewRef view_1 (cellRef FDRE (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property OPTIMIZE_PRIMITIVES_NGC (string "no") (owner "Xilinx")) + (property INIT (string "0") (owner "Xilinx")) + ) + (instance blk000000a0 + (viewRef view_1 (cellRef FDRE (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property INIT (string "0") (owner "Xilinx")) + ) + (instance blk000000a1 + (viewRef view_1 (cellRef FDRE (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property OPTIMIZE_PRIMITIVES_NGC (string "no") (owner "Xilinx")) + (property INIT (string "0") (owner "Xilinx")) + ) + (instance blk000000a2 + (viewRef view_1 (cellRef FDRE (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property OPTIMIZE_PRIMITIVES_NGC (string "no") (owner "Xilinx")) + (property INIT (string "0") (owner "Xilinx")) + ) + (instance blk000000a3 + (viewRef view_1 (cellRef FDRE (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property OPTIMIZE_PRIMITIVES_NGC (string "no") (owner "Xilinx")) + (property INIT (string "0") (owner "Xilinx")) + ) + (instance blk000000a4 + (viewRef view_1 (cellRef FDRE (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property OPTIMIZE_PRIMITIVES_NGC (string "no") (owner "Xilinx")) + (property INIT (string "0") (owner "Xilinx")) + ) + (instance blk000000a5 + (viewRef view_1 (cellRef FDE (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property INIT (string "0") (owner "Xilinx")) + ) + (instance blk000000a6 + (viewRef view_1 (cellRef FDE (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property INIT (string "0") (owner "Xilinx")) + ) + (instance blk000000a7 + (viewRef view_1 (cellRef FDE (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property INIT (string "0") (owner "Xilinx")) + ) + (instance blk000000a8 + (viewRef view_1 (cellRef FDE (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property INIT (string "0") (owner "Xilinx")) + ) + (instance blk000000a9 + (viewRef view_1 (cellRef FDE (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property INIT (string "0") (owner "Xilinx")) + ) + (instance blk000000aa + (viewRef view_1 (cellRef FDE (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property INIT (string "0") (owner "Xilinx")) + ) + (instance blk000000ab + (viewRef view_1 (cellRef FDE (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property INIT (string "0") (owner "Xilinx")) + ) + (instance blk000000ac + (viewRef view_1 (cellRef FDE (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property INIT (string "0") (owner "Xilinx")) + ) + (instance blk000000ad + (viewRef view_1 (cellRef FDE (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property INIT (string "0") (owner "Xilinx")) + ) + (instance blk000000ae + (viewRef view_1 (cellRef FDE (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property INIT (string "0") (owner "Xilinx")) + ) + (instance blk000000af + (viewRef view_1 (cellRef FDE (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property INIT (string "0") (owner "Xilinx")) + ) + (instance blk000000b0 + (viewRef view_1 (cellRef FDE (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property INIT (string "0") (owner "Xilinx")) + ) + (instance blk000000b1 + (viewRef view_1 (cellRef FDE (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property INIT (string "0") (owner "Xilinx")) + ) + (instance blk000000b2 + (viewRef view_1 (cellRef FDE (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property INIT (string "0") (owner "Xilinx")) + ) + (instance blk000000b3 + (viewRef view_1 (cellRef FDE (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property INIT (string "0") (owner "Xilinx")) + ) + (instance blk000000b4 + (viewRef view_1 (cellRef XORCY (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property OPTIMIZE_PRIMITIVES_NGC (string "no") (owner "Xilinx")) + ) + (instance blk000000b5 + (viewRef view_1 (cellRef XORCY (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property OPTIMIZE_PRIMITIVES_NGC (string "no") (owner "Xilinx")) + ) + (instance blk000000b6 + (viewRef view_1 (cellRef XORCY (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property OPTIMIZE_PRIMITIVES_NGC (string "no") (owner "Xilinx")) + ) + (instance blk000000b7 + (viewRef view_1 (cellRef MUXCY (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property OPTIMIZE_PRIMITIVES_NGC (string "no") (owner "Xilinx")) + ) + (instance blk000000b8 + (viewRef view_1 (cellRef MUXCY_D (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property OPTIMIZE_PRIMITIVES_NGC (string "no") (owner "Xilinx")) + ) + (instance blk000000b9 + (viewRef view_1 (cellRef MUXCY_L (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property OPTIMIZE_PRIMITIVES_NGC (string "no") (owner "Xilinx")) + ) + (instance blk000000ba + (viewRef view_1 (cellRef MUXCY_L (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property OPTIMIZE_PRIMITIVES_NGC (string "no") (owner "Xilinx")) + ) + (instance blk000000bb + (viewRef view_1 (cellRef MUXCY_D (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property OPTIMIZE_PRIMITIVES_NGC (string "no") (owner "Xilinx")) + ) + (instance blk000000bc + (viewRef view_1 (cellRef XORCY (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property OPTIMIZE_PRIMITIVES_NGC (string "no") (owner "Xilinx")) + ) + (instance blk000000bd + (viewRef view_1 (cellRef FDRE (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property INIT (string "0") (owner "Xilinx")) + ) + (instance blk000000be + (viewRef view_1 (cellRef FDRE (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property INIT (string "0") (owner "Xilinx")) + ) + (instance blk000000bf + (viewRef view_1 (cellRef FDE (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + ) + (instance blk000000c0 + (viewRef view_1 (cellRef XORCY (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property OPTIMIZE_PRIMITIVES_NGC (string "no") (owner "Xilinx")) + ) + (instance blk000000c1 + (viewRef view_1 (cellRef MUXCY_D (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property OPTIMIZE_PRIMITIVES_NGC (string "no") (owner "Xilinx")) + ) + (instance blk000000c2 + (viewRef view_1 (cellRef MUXCY_D (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property OPTIMIZE_PRIMITIVES_NGC (string "no") (owner "Xilinx")) + ) + (instance blk000000c3 + (viewRef view_1 (cellRef MUXCY_D (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property OPTIMIZE_PRIMITIVES_NGC (string "no") (owner "Xilinx")) + ) + (instance blk000000c4 + (viewRef view_1 (cellRef MUXCY_D (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property OPTIMIZE_PRIMITIVES_NGC (string "no") (owner "Xilinx")) + ) + (instance blk000000c5 + (viewRef view_1 (cellRef MUXCY_D (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property OPTIMIZE_PRIMITIVES_NGC (string "no") (owner "Xilinx")) + ) + (instance blk000000c6 + (viewRef view_1 (cellRef MUXCY_D (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property OPTIMIZE_PRIMITIVES_NGC (string "no") (owner "Xilinx")) + ) + (instance blk000000c7 + (viewRef view_1 (cellRef MUXCY_D (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property OPTIMIZE_PRIMITIVES_NGC (string "no") (owner "Xilinx")) + ) + (instance blk000000c8 + (viewRef view_1 (cellRef FDRE (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property OPTIMIZE_PRIMITIVES_NGC (string "no") (owner "Xilinx")) + (property INIT (string "0") (owner "Xilinx")) + ) + (instance blk000000c9 + (viewRef view_1 (cellRef FDSE (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property OPTIMIZE_PRIMITIVES_NGC (string "no") (owner "Xilinx")) + (property INIT (string "1") (owner "Xilinx")) + ) + (instance blk000000ca + (viewRef view_1 (cellRef XORCY (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property OPTIMIZE_PRIMITIVES_NGC (string "no") (owner "Xilinx")) + ) + (instance blk000000cb + (viewRef view_1 (cellRef MUXCY_D (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property OPTIMIZE_PRIMITIVES_NGC (string "no") (owner "Xilinx")) + ) + (instance blk000000cc + (viewRef view_1 (cellRef MUXCY_D (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property OPTIMIZE_PRIMITIVES_NGC (string "no") (owner "Xilinx")) + ) + (instance blk000000cd + (viewRef view_1 (cellRef MUXCY_D (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property OPTIMIZE_PRIMITIVES_NGC (string "no") (owner "Xilinx")) + ) + (instance blk000000ce + (viewRef view_1 (cellRef MUXCY_D (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property OPTIMIZE_PRIMITIVES_NGC (string "no") (owner "Xilinx")) + ) + (instance blk000000cf + (viewRef view_1 (cellRef MUXCY_D (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property OPTIMIZE_PRIMITIVES_NGC (string "no") (owner "Xilinx")) + ) + (instance blk000000d0 + (viewRef view_1 (cellRef MUXCY_D (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property OPTIMIZE_PRIMITIVES_NGC (string "no") (owner "Xilinx")) + ) + (instance blk000000d1 + (viewRef view_1 (cellRef FDRE (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property OPTIMIZE_PRIMITIVES_NGC (string "no") (owner "Xilinx")) + (property INIT (string "0") (owner "Xilinx")) + ) + (instance blk000000d2 + (viewRef view_1 (cellRef FDSE (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property OPTIMIZE_PRIMITIVES_NGC (string "no") (owner "Xilinx")) + (property INIT (string "1") (owner "Xilinx")) + ) + (instance blk000000d3 + (viewRef view_1 (cellRef XORCY (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property OPTIMIZE_PRIMITIVES_NGC (string "no") (owner "Xilinx")) + ) + (instance blk000000d4 + (viewRef view_1 (cellRef XORCY (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property OPTIMIZE_PRIMITIVES_NGC (string "no") (owner "Xilinx")) + ) + (instance blk000000d5 + (viewRef view_1 (cellRef MUXCY (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property OPTIMIZE_PRIMITIVES_NGC (string "no") (owner "Xilinx")) + ) + (instance blk000000d6 + (viewRef view_1 (cellRef MUXCY_D (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property OPTIMIZE_PRIMITIVES_NGC (string "no") (owner "Xilinx")) + ) + (instance blk000000d7 + (viewRef view_1 (cellRef MUXCY_L (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property OPTIMIZE_PRIMITIVES_NGC (string "no") (owner "Xilinx")) + ) + (instance blk000000d8 + (viewRef view_1 (cellRef XORCY (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property OPTIMIZE_PRIMITIVES_NGC (string "no") (owner "Xilinx")) + ) + (instance blk000000d9 + (viewRef view_1 (cellRef XORCY (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property OPTIMIZE_PRIMITIVES_NGC (string "no") (owner "Xilinx")) + ) + (instance blk000000da + (viewRef view_1 (cellRef MUXCY_D (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property OPTIMIZE_PRIMITIVES_NGC (string "no") (owner "Xilinx")) + ) + (instance blk000000db + (viewRef view_1 (cellRef MUXCY_L (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property OPTIMIZE_PRIMITIVES_NGC (string "no") (owner "Xilinx")) + ) + (instance blk000000dc + (viewRef view_1 (cellRef MUXCY_D (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property OPTIMIZE_PRIMITIVES_NGC (string "no") (owner "Xilinx")) + ) + (instance blk000000dd + (viewRef view_1 (cellRef XORCY (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property OPTIMIZE_PRIMITIVES_NGC (string "no") (owner "Xilinx")) + ) + (instance blk000000de + (viewRef view_1 (cellRef MUXCY (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property OPTIMIZE_PRIMITIVES_NGC (string "no") (owner "Xilinx")) + ) + (instance blk000000df + (viewRef view_1 (cellRef MUXCY_D (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property OPTIMIZE_PRIMITIVES_NGC (string "no") (owner "Xilinx")) + ) + (instance blk000000e0 + (viewRef view_1 (cellRef XORCY (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property OPTIMIZE_PRIMITIVES_NGC (string "no") (owner "Xilinx")) + ) + (instance blk000000e1 + (viewRef view_1 (cellRef FDE (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + ) + (instance blk000000e2 + (viewRef view_1 (cellRef MUXCY_D (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property OPTIMIZE_PRIMITIVES_NGC (string "no") (owner "Xilinx")) + ) + (instance blk000000e3 + (viewRef view_1 (cellRef XORCY (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property OPTIMIZE_PRIMITIVES_NGC (string "no") (owner "Xilinx")) + ) + (instance blk000000e4 + (viewRef view_1 (cellRef FDE (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property INIT (string "0") (owner "Xilinx")) + ) + (instance blk000000e5 + (viewRef view_1 (cellRef FDE (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property INIT (string "0") (owner "Xilinx")) + ) + (instance blk000000e6 + (viewRef view_1 (cellRef FDRE (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property INIT (string "0") (owner "Xilinx")) + ) + (instance blk000000e7 + (viewRef view_1 (cellRef DSP48E1 (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property BUS_INFO (string "3:INPUT:CARRYINSEL<2:0>") (owner "Xilinx")) + (property BUS_INFO (string "4:OUTPUT:CARRYOUT<3:0>") (owner "Xilinx")) + (property BUS_INFO (string "4:INPUT:ALUMODE<3:0>") (owner "Xilinx")) + (property BUS_INFO (string "7:INPUT:OPMODE<6:0>") (owner "Xilinx")) + (property BUS_INFO (string "5:INPUT:INMODE<4:0>") (owner "Xilinx")) + (property BUS_INFO (string "30:OUTPUT:ACOUT<29:0>") (owner "Xilinx")) + (property BUS_INFO (string "18:OUTPUT:BCOUT<17:0>") (owner "Xilinx")) + (property BUS_INFO (string "48:OUTPUT:PCOUT<47:0>") (owner "Xilinx")) + (property BUS_INFO (string "48:INPUT:PCIN<47:0>") (owner "Xilinx")) + (property BUS_INFO (string "18:INPUT:BCIN<17:0>") (owner "Xilinx")) + (property BUS_INFO (string "30:INPUT:ACIN<29:0>") (owner "Xilinx")) + (property BUS_INFO (string "48:INPUT:C<47:0>") (owner "Xilinx")) + (property BUS_INFO (string "18:INPUT:B<17:0>") (owner "Xilinx")) + (property BUS_INFO (string "25:INPUT:D<24:0>") (owner "Xilinx")) + (property BUS_INFO (string "48:OUTPUT:P<47:0>") (owner "Xilinx")) + (property BUS_INFO (string "30:INPUT:A<29:0>") (owner "Xilinx")) + (property OPTIMIZE_PRIMITIVES_NGC (string "no") (owner "Xilinx")) + (property ACASCREG (integer 1) (owner "Xilinx")) + (property ADREG (integer 1) (owner "Xilinx")) + (property ALUMODEREG (integer 0) (owner "Xilinx")) + (property AREG (integer 1) (owner "Xilinx")) + (property AUTORESET_PATDET (string "NO_RESET") (owner "Xilinx")) + (property A_INPUT (string "DIRECT") (owner "Xilinx")) + (property BCASCREG (integer 1) (owner "Xilinx")) + (property BREG (integer 1) (owner "Xilinx")) + (property B_INPUT (string "DIRECT") (owner "Xilinx")) + (property CARRYINREG (integer 1) (owner "Xilinx")) + (property CARRYINSELREG (integer 1) (owner "Xilinx")) + (property CREG (integer 1) (owner "Xilinx")) + (property DREG (integer 1) (owner "Xilinx")) + (property INMODEREG (integer 1) (owner "Xilinx")) + (property MASK (string "FFFFFFFFFFFE") (owner "Xilinx")) + (property MREG (integer 1) (owner "Xilinx")) + (property OPMODEREG (integer 0) (owner "Xilinx")) + (property PATTERN (string "000000000000") (owner "Xilinx")) + (property PREG (integer 1) (owner "Xilinx")) + (property SEL_MASK (string "MASK") (owner "Xilinx")) + (property SEL_PATTERN (string "PATTERN") (owner "Xilinx")) + (property USE_DPORT (string "TRUE") (owner "Xilinx")) + (property USE_MULT (string "MULTIPLY") (owner "Xilinx")) + (property USE_PATTERN_DETECT (string "NO_PATDET") (owner "Xilinx")) + (property USE_SIMD (string "ONE48") (owner "Xilinx")) + ) + (instance blk000000e8 + (viewRef view_1 (cellRef DSP48E1 (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property BUS_INFO (string "3:INPUT:CARRYINSEL<2:0>") (owner "Xilinx")) + (property BUS_INFO (string "4:OUTPUT:CARRYOUT<3:0>") (owner "Xilinx")) + (property BUS_INFO (string "4:INPUT:ALUMODE<3:0>") (owner "Xilinx")) + (property BUS_INFO (string "7:INPUT:OPMODE<6:0>") (owner "Xilinx")) + (property BUS_INFO (string "5:INPUT:INMODE<4:0>") (owner "Xilinx")) + (property BUS_INFO (string "30:OUTPUT:ACOUT<29:0>") (owner "Xilinx")) + (property BUS_INFO (string "18:OUTPUT:BCOUT<17:0>") (owner "Xilinx")) + (property BUS_INFO (string "48:OUTPUT:PCOUT<47:0>") (owner "Xilinx")) + (property BUS_INFO (string "48:INPUT:PCIN<47:0>") (owner "Xilinx")) + (property BUS_INFO (string "18:INPUT:BCIN<17:0>") (owner "Xilinx")) + (property BUS_INFO (string "30:INPUT:ACIN<29:0>") (owner "Xilinx")) + (property BUS_INFO (string "48:INPUT:C<47:0>") (owner "Xilinx")) + (property BUS_INFO (string "18:INPUT:B<17:0>") (owner "Xilinx")) + (property BUS_INFO (string "25:INPUT:D<24:0>") (owner "Xilinx")) + (property BUS_INFO (string "48:OUTPUT:P<47:0>") (owner "Xilinx")) + (property BUS_INFO (string "30:INPUT:A<29:0>") (owner "Xilinx")) + (property OPTIMIZE_PRIMITIVES_NGC (string "no") (owner "Xilinx")) + (property ACASCREG (integer 1) (owner "Xilinx")) + (property ADREG (integer 1) (owner "Xilinx")) + (property ALUMODEREG (integer 0) (owner "Xilinx")) + (property AREG (integer 1) (owner "Xilinx")) + (property AUTORESET_PATDET (string "NO_RESET") (owner "Xilinx")) + (property A_INPUT (string "DIRECT") (owner "Xilinx")) + (property BCASCREG (integer 1) (owner "Xilinx")) + (property BREG (integer 1) (owner "Xilinx")) + (property B_INPUT (string "DIRECT") (owner "Xilinx")) + (property CARRYINREG (integer 1) (owner "Xilinx")) + (property CARRYINSELREG (integer 1) (owner "Xilinx")) + (property CREG (integer 1) (owner "Xilinx")) + (property DREG (integer 1) (owner "Xilinx")) + (property INMODEREG (integer 1) (owner "Xilinx")) + (property MASK (string "FFFFFFFFFFFE") (owner "Xilinx")) + (property MREG (integer 1) (owner "Xilinx")) + (property OPMODEREG (integer 0) (owner "Xilinx")) + (property PATTERN (string "000000000000") (owner "Xilinx")) + (property PREG (integer 1) (owner "Xilinx")) + (property SEL_MASK (string "MASK") (owner "Xilinx")) + (property SEL_PATTERN (string "PATTERN") (owner "Xilinx")) + (property USE_DPORT (string "TRUE") (owner "Xilinx")) + (property USE_MULT (string "MULTIPLY") (owner "Xilinx")) + (property USE_PATTERN_DETECT (string "NO_PATDET") (owner "Xilinx")) + (property USE_SIMD (string "ONE48") (owner "Xilinx")) + ) + (instance blk000000e9 + (viewRef view_1 (cellRef DSP48E1 (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property BUS_INFO (string "3:INPUT:CARRYINSEL<2:0>") (owner "Xilinx")) + (property BUS_INFO (string "4:OUTPUT:CARRYOUT<3:0>") (owner "Xilinx")) + (property BUS_INFO (string "4:INPUT:ALUMODE<3:0>") (owner "Xilinx")) + (property BUS_INFO (string "7:INPUT:OPMODE<6:0>") (owner "Xilinx")) + (property BUS_INFO (string "5:INPUT:INMODE<4:0>") (owner "Xilinx")) + (property BUS_INFO (string "30:OUTPUT:ACOUT<29:0>") (owner "Xilinx")) + (property BUS_INFO (string "18:OUTPUT:BCOUT<17:0>") (owner "Xilinx")) + (property BUS_INFO (string "48:OUTPUT:PCOUT<47:0>") (owner "Xilinx")) + (property BUS_INFO (string "48:INPUT:PCIN<47:0>") (owner "Xilinx")) + (property BUS_INFO (string "18:INPUT:BCIN<17:0>") (owner "Xilinx")) + (property BUS_INFO (string "30:INPUT:ACIN<29:0>") (owner "Xilinx")) + (property BUS_INFO (string "48:INPUT:C<47:0>") (owner "Xilinx")) + (property BUS_INFO (string "18:INPUT:B<17:0>") (owner "Xilinx")) + (property BUS_INFO (string "25:INPUT:D<24:0>") (owner "Xilinx")) + (property BUS_INFO (string "48:OUTPUT:P<47:0>") (owner "Xilinx")) + (property BUS_INFO (string "30:INPUT:A<29:0>") (owner "Xilinx")) + (property OPTIMIZE_PRIMITIVES_NGC (string "no") (owner "Xilinx")) + (property ACASCREG (integer 1) (owner "Xilinx")) + (property ADREG (integer 1) (owner "Xilinx")) + (property ALUMODEREG (integer 0) (owner "Xilinx")) + (property AREG (integer 1) (owner "Xilinx")) + (property AUTORESET_PATDET (string "NO_RESET") (owner "Xilinx")) + (property A_INPUT (string "DIRECT") (owner "Xilinx")) + (property BCASCREG (integer 1) (owner "Xilinx")) + (property BREG (integer 1) (owner "Xilinx")) + (property B_INPUT (string "DIRECT") (owner "Xilinx")) + (property CARRYINREG (integer 1) (owner "Xilinx")) + (property CARRYINSELREG (integer 1) (owner "Xilinx")) + (property CREG (integer 1) (owner "Xilinx")) + (property DREG (integer 1) (owner "Xilinx")) + (property INMODEREG (integer 1) (owner "Xilinx")) + (property MASK (string "FFFFFFFFFFFE") (owner "Xilinx")) + (property MREG (integer 1) (owner "Xilinx")) + (property OPMODEREG (integer 0) (owner "Xilinx")) + (property PATTERN (string "000000000000") (owner "Xilinx")) + (property PREG (integer 1) (owner "Xilinx")) + (property SEL_MASK (string "MASK") (owner "Xilinx")) + (property SEL_PATTERN (string "PATTERN") (owner "Xilinx")) + (property USE_DPORT (string "TRUE") (owner "Xilinx")) + (property USE_MULT (string "MULTIPLY") (owner "Xilinx")) + (property USE_PATTERN_DETECT (string "NO_PATDET") (owner "Xilinx")) + (property USE_SIMD (string "ONE48") (owner "Xilinx")) + ) + (instance blk000000ea + (viewRef view_1 (cellRef DSP48E1 (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property BUS_INFO (string "3:INPUT:CARRYINSEL<2:0>") (owner "Xilinx")) + (property BUS_INFO (string "4:OUTPUT:CARRYOUT<3:0>") (owner "Xilinx")) + (property BUS_INFO (string "4:INPUT:ALUMODE<3:0>") (owner "Xilinx")) + (property BUS_INFO (string "7:INPUT:OPMODE<6:0>") (owner "Xilinx")) + (property BUS_INFO (string "5:INPUT:INMODE<4:0>") (owner "Xilinx")) + (property BUS_INFO (string "30:OUTPUT:ACOUT<29:0>") (owner "Xilinx")) + (property BUS_INFO (string "18:OUTPUT:BCOUT<17:0>") (owner "Xilinx")) + (property BUS_INFO (string "48:OUTPUT:PCOUT<47:0>") (owner "Xilinx")) + (property BUS_INFO (string "48:INPUT:PCIN<47:0>") (owner "Xilinx")) + (property BUS_INFO (string "18:INPUT:BCIN<17:0>") (owner "Xilinx")) + (property BUS_INFO (string "30:INPUT:ACIN<29:0>") (owner "Xilinx")) + (property BUS_INFO (string "48:INPUT:C<47:0>") (owner "Xilinx")) + (property BUS_INFO (string "18:INPUT:B<17:0>") (owner "Xilinx")) + (property BUS_INFO (string "25:INPUT:D<24:0>") (owner "Xilinx")) + (property BUS_INFO (string "48:OUTPUT:P<47:0>") (owner "Xilinx")) + (property BUS_INFO (string "30:INPUT:A<29:0>") (owner "Xilinx")) + (property OPTIMIZE_PRIMITIVES_NGC (string "no") (owner "Xilinx")) + (property ACASCREG (integer 1) (owner "Xilinx")) + (property ADREG (integer 1) (owner "Xilinx")) + (property ALUMODEREG (integer 0) (owner "Xilinx")) + (property AREG (integer 1) (owner "Xilinx")) + (property AUTORESET_PATDET (string "NO_RESET") (owner "Xilinx")) + (property A_INPUT (string "DIRECT") (owner "Xilinx")) + (property BCASCREG (integer 1) (owner "Xilinx")) + (property BREG (integer 1) (owner "Xilinx")) + (property B_INPUT (string "DIRECT") (owner "Xilinx")) + (property CARRYINREG (integer 1) (owner "Xilinx")) + (property CARRYINSELREG (integer 1) (owner "Xilinx")) + (property CREG (integer 1) (owner "Xilinx")) + (property DREG (integer 1) (owner "Xilinx")) + (property INMODEREG (integer 1) (owner "Xilinx")) + (property MASK (string "FFFFFFFFFFFE") (owner "Xilinx")) + (property MREG (integer 1) (owner "Xilinx")) + (property OPMODEREG (integer 0) (owner "Xilinx")) + (property PATTERN (string "000000000000") (owner "Xilinx")) + (property PREG (integer 1) (owner "Xilinx")) + (property SEL_MASK (string "MASK") (owner "Xilinx")) + (property SEL_PATTERN (string "PATTERN") (owner "Xilinx")) + (property USE_DPORT (string "TRUE") (owner "Xilinx")) + (property USE_MULT (string "MULTIPLY") (owner "Xilinx")) + (property USE_PATTERN_DETECT (string "NO_PATDET") (owner "Xilinx")) + (property USE_SIMD (string "ONE48") (owner "Xilinx")) + ) + (instance blk000000eb + (viewRef view_1 (cellRef DSP48E1 (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property BUS_INFO (string "3:INPUT:CARRYINSEL<2:0>") (owner "Xilinx")) + (property BUS_INFO (string "4:OUTPUT:CARRYOUT<3:0>") (owner "Xilinx")) + (property BUS_INFO (string "4:INPUT:ALUMODE<3:0>") (owner "Xilinx")) + (property BUS_INFO (string "7:INPUT:OPMODE<6:0>") (owner "Xilinx")) + (property BUS_INFO (string "5:INPUT:INMODE<4:0>") (owner "Xilinx")) + (property BUS_INFO (string "30:OUTPUT:ACOUT<29:0>") (owner "Xilinx")) + (property BUS_INFO (string "18:OUTPUT:BCOUT<17:0>") (owner "Xilinx")) + (property BUS_INFO (string "48:OUTPUT:PCOUT<47:0>") (owner "Xilinx")) + (property BUS_INFO (string "48:INPUT:PCIN<47:0>") (owner "Xilinx")) + (property BUS_INFO (string "18:INPUT:BCIN<17:0>") (owner "Xilinx")) + (property BUS_INFO (string "30:INPUT:ACIN<29:0>") (owner "Xilinx")) + (property BUS_INFO (string "48:INPUT:C<47:0>") (owner "Xilinx")) + (property BUS_INFO (string "18:INPUT:B<17:0>") (owner "Xilinx")) + (property BUS_INFO (string "25:INPUT:D<24:0>") (owner "Xilinx")) + (property BUS_INFO (string "48:OUTPUT:P<47:0>") (owner "Xilinx")) + (property BUS_INFO (string "30:INPUT:A<29:0>") (owner "Xilinx")) + (property OPTIMIZE_PRIMITIVES_NGC (string "no") (owner "Xilinx")) + (property ACASCREG (integer 1) (owner "Xilinx")) + (property ADREG (integer 1) (owner "Xilinx")) + (property ALUMODEREG (integer 0) (owner "Xilinx")) + (property AREG (integer 1) (owner "Xilinx")) + (property AUTORESET_PATDET (string "NO_RESET") (owner "Xilinx")) + (property A_INPUT (string "DIRECT") (owner "Xilinx")) + (property BCASCREG (integer 1) (owner "Xilinx")) + (property BREG (integer 1) (owner "Xilinx")) + (property B_INPUT (string "DIRECT") (owner "Xilinx")) + (property CARRYINREG (integer 1) (owner "Xilinx")) + (property CARRYINSELREG (integer 1) (owner "Xilinx")) + (property CREG (integer 1) (owner "Xilinx")) + (property DREG (integer 1) (owner "Xilinx")) + (property INMODEREG (integer 1) (owner "Xilinx")) + (property MASK (string "FFFFFFFFFFFE") (owner "Xilinx")) + (property MREG (integer 1) (owner "Xilinx")) + (property OPMODEREG (integer 0) (owner "Xilinx")) + (property PATTERN (string "000000000000") (owner "Xilinx")) + (property PREG (integer 1) (owner "Xilinx")) + (property SEL_MASK (string "MASK") (owner "Xilinx")) + (property SEL_PATTERN (string "PATTERN") (owner "Xilinx")) + (property USE_DPORT (string "TRUE") (owner "Xilinx")) + (property USE_MULT (string "MULTIPLY") (owner "Xilinx")) + (property USE_PATTERN_DETECT (string "NO_PATDET") (owner "Xilinx")) + (property USE_SIMD (string "ONE48") (owner "Xilinx")) + ) + (instance blk000000ec + (viewRef view_1 (cellRef DSP48E1 (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property BUS_INFO (string "3:INPUT:CARRYINSEL<2:0>") (owner "Xilinx")) + (property BUS_INFO (string "4:OUTPUT:CARRYOUT<3:0>") (owner "Xilinx")) + (property BUS_INFO (string "4:INPUT:ALUMODE<3:0>") (owner "Xilinx")) + (property BUS_INFO (string "7:INPUT:OPMODE<6:0>") (owner "Xilinx")) + (property BUS_INFO (string "5:INPUT:INMODE<4:0>") (owner "Xilinx")) + (property BUS_INFO (string "30:OUTPUT:ACOUT<29:0>") (owner "Xilinx")) + (property BUS_INFO (string "18:OUTPUT:BCOUT<17:0>") (owner "Xilinx")) + (property BUS_INFO (string "48:OUTPUT:PCOUT<47:0>") (owner "Xilinx")) + (property BUS_INFO (string "48:INPUT:PCIN<47:0>") (owner "Xilinx")) + (property BUS_INFO (string "18:INPUT:BCIN<17:0>") (owner "Xilinx")) + (property BUS_INFO (string "30:INPUT:ACIN<29:0>") (owner "Xilinx")) + (property BUS_INFO (string "48:INPUT:C<47:0>") (owner "Xilinx")) + (property BUS_INFO (string "18:INPUT:B<17:0>") (owner "Xilinx")) + (property BUS_INFO (string "25:INPUT:D<24:0>") (owner "Xilinx")) + (property BUS_INFO (string "48:OUTPUT:P<47:0>") (owner "Xilinx")) + (property BUS_INFO (string "30:INPUT:A<29:0>") (owner "Xilinx")) + (property OPTIMIZE_PRIMITIVES_NGC (string "no") (owner "Xilinx")) + (property ACASCREG (integer 1) (owner "Xilinx")) + (property ADREG (integer 1) (owner "Xilinx")) + (property ALUMODEREG (integer 0) (owner "Xilinx")) + (property AREG (integer 1) (owner "Xilinx")) + (property AUTORESET_PATDET (string "NO_RESET") (owner "Xilinx")) + (property A_INPUT (string "DIRECT") (owner "Xilinx")) + (property BCASCREG (integer 1) (owner "Xilinx")) + (property BREG (integer 1) (owner "Xilinx")) + (property B_INPUT (string "DIRECT") (owner "Xilinx")) + (property CARRYINREG (integer 1) (owner "Xilinx")) + (property CARRYINSELREG (integer 1) (owner "Xilinx")) + (property CREG (integer 1) (owner "Xilinx")) + (property DREG (integer 1) (owner "Xilinx")) + (property INMODEREG (integer 1) (owner "Xilinx")) + (property MASK (string "FFFFFFFFFFFE") (owner "Xilinx")) + (property MREG (integer 1) (owner "Xilinx")) + (property OPMODEREG (integer 0) (owner "Xilinx")) + (property PATTERN (string "000000000000") (owner "Xilinx")) + (property PREG (integer 1) (owner "Xilinx")) + (property SEL_MASK (string "MASK") (owner "Xilinx")) + (property SEL_PATTERN (string "PATTERN") (owner "Xilinx")) + (property USE_DPORT (string "TRUE") (owner "Xilinx")) + (property USE_MULT (string "MULTIPLY") (owner "Xilinx")) + (property USE_PATTERN_DETECT (string "NO_PATDET") (owner "Xilinx")) + (property USE_SIMD (string "ONE48") (owner "Xilinx")) + ) + (instance blk000000ed + (viewRef view_1 (cellRef DSP48E1 (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property BUS_INFO (string "3:INPUT:CARRYINSEL<2:0>") (owner "Xilinx")) + (property BUS_INFO (string "4:OUTPUT:CARRYOUT<3:0>") (owner "Xilinx")) + (property BUS_INFO (string "4:INPUT:ALUMODE<3:0>") (owner "Xilinx")) + (property BUS_INFO (string "7:INPUT:OPMODE<6:0>") (owner "Xilinx")) + (property BUS_INFO (string "5:INPUT:INMODE<4:0>") (owner "Xilinx")) + (property BUS_INFO (string "30:OUTPUT:ACOUT<29:0>") (owner "Xilinx")) + (property BUS_INFO (string "18:OUTPUT:BCOUT<17:0>") (owner "Xilinx")) + (property BUS_INFO (string "48:OUTPUT:PCOUT<47:0>") (owner "Xilinx")) + (property BUS_INFO (string "48:INPUT:PCIN<47:0>") (owner "Xilinx")) + (property BUS_INFO (string "18:INPUT:BCIN<17:0>") (owner "Xilinx")) + (property BUS_INFO (string "30:INPUT:ACIN<29:0>") (owner "Xilinx")) + (property BUS_INFO (string "48:INPUT:C<47:0>") (owner "Xilinx")) + (property BUS_INFO (string "18:INPUT:B<17:0>") (owner "Xilinx")) + (property BUS_INFO (string "25:INPUT:D<24:0>") (owner "Xilinx")) + (property BUS_INFO (string "48:OUTPUT:P<47:0>") (owner "Xilinx")) + (property BUS_INFO (string "30:INPUT:A<29:0>") (owner "Xilinx")) + (property OPTIMIZE_PRIMITIVES_NGC (string "no") (owner "Xilinx")) + (property ACASCREG (integer 1) (owner "Xilinx")) + (property ADREG (integer 1) (owner "Xilinx")) + (property ALUMODEREG (integer 0) (owner "Xilinx")) + (property AREG (integer 1) (owner "Xilinx")) + (property AUTORESET_PATDET (string "NO_RESET") (owner "Xilinx")) + (property A_INPUT (string "DIRECT") (owner "Xilinx")) + (property BCASCREG (integer 1) (owner "Xilinx")) + (property BREG (integer 1) (owner "Xilinx")) + (property B_INPUT (string "DIRECT") (owner "Xilinx")) + (property CARRYINREG (integer 1) (owner "Xilinx")) + (property CARRYINSELREG (integer 1) (owner "Xilinx")) + (property CREG (integer 1) (owner "Xilinx")) + (property DREG (integer 1) (owner "Xilinx")) + (property INMODEREG (integer 1) (owner "Xilinx")) + (property MASK (string "FFFFFFFFFFFE") (owner "Xilinx")) + (property MREG (integer 1) (owner "Xilinx")) + (property OPMODEREG (integer 0) (owner "Xilinx")) + (property PATTERN (string "000000000000") (owner "Xilinx")) + (property PREG (integer 1) (owner "Xilinx")) + (property SEL_MASK (string "MASK") (owner "Xilinx")) + (property SEL_PATTERN (string "PATTERN") (owner "Xilinx")) + (property USE_DPORT (string "TRUE") (owner "Xilinx")) + (property USE_MULT (string "MULTIPLY") (owner "Xilinx")) + (property USE_PATTERN_DETECT (string "NO_PATDET") (owner "Xilinx")) + (property USE_SIMD (string "ONE48") (owner "Xilinx")) + ) + (instance blk000000ee + (viewRef view_1 (cellRef DSP48E1 (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property BUS_INFO (string "3:INPUT:CARRYINSEL<2:0>") (owner "Xilinx")) + (property BUS_INFO (string "4:OUTPUT:CARRYOUT<3:0>") (owner "Xilinx")) + (property BUS_INFO (string "4:INPUT:ALUMODE<3:0>") (owner "Xilinx")) + (property BUS_INFO (string "7:INPUT:OPMODE<6:0>") (owner "Xilinx")) + (property BUS_INFO (string "5:INPUT:INMODE<4:0>") (owner "Xilinx")) + (property BUS_INFO (string "30:OUTPUT:ACOUT<29:0>") (owner "Xilinx")) + (property BUS_INFO (string "18:OUTPUT:BCOUT<17:0>") (owner "Xilinx")) + (property BUS_INFO (string "48:OUTPUT:PCOUT<47:0>") (owner "Xilinx")) + (property BUS_INFO (string "48:INPUT:PCIN<47:0>") (owner "Xilinx")) + (property BUS_INFO (string "18:INPUT:BCIN<17:0>") (owner "Xilinx")) + (property BUS_INFO (string "30:INPUT:ACIN<29:0>") (owner "Xilinx")) + (property BUS_INFO (string "48:INPUT:C<47:0>") (owner "Xilinx")) + (property BUS_INFO (string "18:INPUT:B<17:0>") (owner "Xilinx")) + (property BUS_INFO (string "25:INPUT:D<24:0>") (owner "Xilinx")) + (property BUS_INFO (string "48:OUTPUT:P<47:0>") (owner "Xilinx")) + (property BUS_INFO (string "30:INPUT:A<29:0>") (owner "Xilinx")) + (property OPTIMIZE_PRIMITIVES_NGC (string "no") (owner "Xilinx")) + (property ACASCREG (integer 1) (owner "Xilinx")) + (property ADREG (integer 1) (owner "Xilinx")) + (property ALUMODEREG (integer 0) (owner "Xilinx")) + (property AREG (integer 1) (owner "Xilinx")) + (property AUTORESET_PATDET (string "NO_RESET") (owner "Xilinx")) + (property A_INPUT (string "DIRECT") (owner "Xilinx")) + (property BCASCREG (integer 1) (owner "Xilinx")) + (property BREG (integer 1) (owner "Xilinx")) + (property B_INPUT (string "DIRECT") (owner "Xilinx")) + (property CARRYINREG (integer 1) (owner "Xilinx")) + (property CARRYINSELREG (integer 1) (owner "Xilinx")) + (property CREG (integer 1) (owner "Xilinx")) + (property DREG (integer 1) (owner "Xilinx")) + (property INMODEREG (integer 1) (owner "Xilinx")) + (property MASK (string "FFFFFFFFFFFE") (owner "Xilinx")) + (property MREG (integer 1) (owner "Xilinx")) + (property OPMODEREG (integer 0) (owner "Xilinx")) + (property PATTERN (string "000000000000") (owner "Xilinx")) + (property PREG (integer 1) (owner "Xilinx")) + (property SEL_MASK (string "MASK") (owner "Xilinx")) + (property SEL_PATTERN (string "PATTERN") (owner "Xilinx")) + (property USE_DPORT (string "TRUE") (owner "Xilinx")) + (property USE_MULT (string "MULTIPLY") (owner "Xilinx")) + (property USE_PATTERN_DETECT (string "NO_PATDET") (owner "Xilinx")) + (property USE_SIMD (string "ONE48") (owner "Xilinx")) + ) + (instance blk000000ef + (viewRef view_1 (cellRef DSP48E1 (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property BUS_INFO (string "3:INPUT:CARRYINSEL<2:0>") (owner "Xilinx")) + (property BUS_INFO (string "4:OUTPUT:CARRYOUT<3:0>") (owner "Xilinx")) + (property BUS_INFO (string "4:INPUT:ALUMODE<3:0>") (owner "Xilinx")) + (property BUS_INFO (string "7:INPUT:OPMODE<6:0>") (owner "Xilinx")) + (property BUS_INFO (string "5:INPUT:INMODE<4:0>") (owner "Xilinx")) + (property BUS_INFO (string "30:OUTPUT:ACOUT<29:0>") (owner "Xilinx")) + (property BUS_INFO (string "18:OUTPUT:BCOUT<17:0>") (owner "Xilinx")) + (property BUS_INFO (string "48:OUTPUT:PCOUT<47:0>") (owner "Xilinx")) + (property BUS_INFO (string "48:INPUT:PCIN<47:0>") (owner "Xilinx")) + (property BUS_INFO (string "18:INPUT:BCIN<17:0>") (owner "Xilinx")) + (property BUS_INFO (string "30:INPUT:ACIN<29:0>") (owner "Xilinx")) + (property BUS_INFO (string "48:INPUT:C<47:0>") (owner "Xilinx")) + (property BUS_INFO (string "18:INPUT:B<17:0>") (owner "Xilinx")) + (property BUS_INFO (string "25:INPUT:D<24:0>") (owner "Xilinx")) + (property BUS_INFO (string "48:OUTPUT:P<47:0>") (owner "Xilinx")) + (property BUS_INFO (string "30:INPUT:A<29:0>") (owner "Xilinx")) + (property OPTIMIZE_PRIMITIVES_NGC (string "no") (owner "Xilinx")) + (property ACASCREG (integer 1) (owner "Xilinx")) + (property ADREG (integer 1) (owner "Xilinx")) + (property ALUMODEREG (integer 0) (owner "Xilinx")) + (property AREG (integer 1) (owner "Xilinx")) + (property AUTORESET_PATDET (string "NO_RESET") (owner "Xilinx")) + (property A_INPUT (string "DIRECT") (owner "Xilinx")) + (property BCASCREG (integer 1) (owner "Xilinx")) + (property BREG (integer 1) (owner "Xilinx")) + (property B_INPUT (string "DIRECT") (owner "Xilinx")) + (property CARRYINREG (integer 1) (owner "Xilinx")) + (property CARRYINSELREG (integer 1) (owner "Xilinx")) + (property CREG (integer 1) (owner "Xilinx")) + (property DREG (integer 1) (owner "Xilinx")) + (property INMODEREG (integer 1) (owner "Xilinx")) + (property MASK (string "FFFFFFFFFFFE") (owner "Xilinx")) + (property MREG (integer 1) (owner "Xilinx")) + (property OPMODEREG (integer 0) (owner "Xilinx")) + (property PATTERN (string "000000000000") (owner "Xilinx")) + (property PREG (integer 1) (owner "Xilinx")) + (property SEL_MASK (string "MASK") (owner "Xilinx")) + (property SEL_PATTERN (string "PATTERN") (owner "Xilinx")) + (property USE_DPORT (string "TRUE") (owner "Xilinx")) + (property USE_MULT (string "MULTIPLY") (owner "Xilinx")) + (property USE_PATTERN_DETECT (string "NO_PATDET") (owner "Xilinx")) + (property USE_SIMD (string "ONE48") (owner "Xilinx")) + ) + (instance blk000000f0 + (viewRef view_1 (cellRef DSP48E1 (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property BUS_INFO (string "3:INPUT:CARRYINSEL<2:0>") (owner "Xilinx")) + (property BUS_INFO (string "4:OUTPUT:CARRYOUT<3:0>") (owner "Xilinx")) + (property BUS_INFO (string "4:INPUT:ALUMODE<3:0>") (owner "Xilinx")) + (property BUS_INFO (string "7:INPUT:OPMODE<6:0>") (owner "Xilinx")) + (property BUS_INFO (string "5:INPUT:INMODE<4:0>") (owner "Xilinx")) + (property BUS_INFO (string "30:OUTPUT:ACOUT<29:0>") (owner "Xilinx")) + (property BUS_INFO (string "18:OUTPUT:BCOUT<17:0>") (owner "Xilinx")) + (property BUS_INFO (string "48:OUTPUT:PCOUT<47:0>") (owner "Xilinx")) + (property BUS_INFO (string "48:INPUT:PCIN<47:0>") (owner "Xilinx")) + (property BUS_INFO (string "18:INPUT:BCIN<17:0>") (owner "Xilinx")) + (property BUS_INFO (string "30:INPUT:ACIN<29:0>") (owner "Xilinx")) + (property BUS_INFO (string "48:INPUT:C<47:0>") (owner "Xilinx")) + (property BUS_INFO (string "18:INPUT:B<17:0>") (owner "Xilinx")) + (property BUS_INFO (string "25:INPUT:D<24:0>") (owner "Xilinx")) + (property BUS_INFO (string "48:OUTPUT:P<47:0>") (owner "Xilinx")) + (property BUS_INFO (string "30:INPUT:A<29:0>") (owner "Xilinx")) + (property OPTIMIZE_PRIMITIVES_NGC (string "no") (owner "Xilinx")) + (property ACASCREG (integer 1) (owner "Xilinx")) + (property ADREG (integer 1) (owner "Xilinx")) + (property ALUMODEREG (integer 0) (owner "Xilinx")) + (property AREG (integer 1) (owner "Xilinx")) + (property AUTORESET_PATDET (string "NO_RESET") (owner "Xilinx")) + (property A_INPUT (string "DIRECT") (owner "Xilinx")) + (property BCASCREG (integer 1) (owner "Xilinx")) + (property BREG (integer 1) (owner "Xilinx")) + (property B_INPUT (string "DIRECT") (owner "Xilinx")) + (property CARRYINREG (integer 1) (owner "Xilinx")) + (property CARRYINSELREG (integer 1) (owner "Xilinx")) + (property CREG (integer 1) (owner "Xilinx")) + (property DREG (integer 1) (owner "Xilinx")) + (property INMODEREG (integer 1) (owner "Xilinx")) + (property MASK (string "FFFFFFFFFFFE") (owner "Xilinx")) + (property MREG (integer 1) (owner "Xilinx")) + (property OPMODEREG (integer 0) (owner "Xilinx")) + (property PATTERN (string "000000000000") (owner "Xilinx")) + (property PREG (integer 1) (owner "Xilinx")) + (property SEL_MASK (string "MASK") (owner "Xilinx")) + (property SEL_PATTERN (string "PATTERN") (owner "Xilinx")) + (property USE_DPORT (string "TRUE") (owner "Xilinx")) + (property USE_MULT (string "MULTIPLY") (owner "Xilinx")) + (property USE_PATTERN_DETECT (string "NO_PATDET") (owner "Xilinx")) + (property USE_SIMD (string "ONE48") (owner "Xilinx")) + ) + (instance blk000000f1 + (viewRef view_1 (cellRef DSP48E1 (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property BUS_INFO (string "3:INPUT:CARRYINSEL<2:0>") (owner "Xilinx")) + (property BUS_INFO (string "4:OUTPUT:CARRYOUT<3:0>") (owner "Xilinx")) + (property BUS_INFO (string "4:INPUT:ALUMODE<3:0>") (owner "Xilinx")) + (property BUS_INFO (string "7:INPUT:OPMODE<6:0>") (owner "Xilinx")) + (property BUS_INFO (string "5:INPUT:INMODE<4:0>") (owner "Xilinx")) + (property BUS_INFO (string "30:OUTPUT:ACOUT<29:0>") (owner "Xilinx")) + (property BUS_INFO (string "18:OUTPUT:BCOUT<17:0>") (owner "Xilinx")) + (property BUS_INFO (string "48:OUTPUT:PCOUT<47:0>") (owner "Xilinx")) + (property BUS_INFO (string "48:INPUT:PCIN<47:0>") (owner "Xilinx")) + (property BUS_INFO (string "18:INPUT:BCIN<17:0>") (owner "Xilinx")) + (property BUS_INFO (string "30:INPUT:ACIN<29:0>") (owner "Xilinx")) + (property BUS_INFO (string "48:INPUT:C<47:0>") (owner "Xilinx")) + (property BUS_INFO (string "18:INPUT:B<17:0>") (owner "Xilinx")) + (property BUS_INFO (string "25:INPUT:D<24:0>") (owner "Xilinx")) + (property BUS_INFO (string "48:OUTPUT:P<47:0>") (owner "Xilinx")) + (property BUS_INFO (string "30:INPUT:A<29:0>") (owner "Xilinx")) + (property OPTIMIZE_PRIMITIVES_NGC (string "no") (owner "Xilinx")) + (property ACASCREG (integer 1) (owner "Xilinx")) + (property ADREG (integer 1) (owner "Xilinx")) + (property ALUMODEREG (integer 0) (owner "Xilinx")) + (property AREG (integer 1) (owner "Xilinx")) + (property AUTORESET_PATDET (string "NO_RESET") (owner "Xilinx")) + (property A_INPUT (string "DIRECT") (owner "Xilinx")) + (property BCASCREG (integer 1) (owner "Xilinx")) + (property BREG (integer 1) (owner "Xilinx")) + (property B_INPUT (string "DIRECT") (owner "Xilinx")) + (property CARRYINREG (integer 1) (owner "Xilinx")) + (property CARRYINSELREG (integer 1) (owner "Xilinx")) + (property CREG (integer 1) (owner "Xilinx")) + (property DREG (integer 1) (owner "Xilinx")) + (property INMODEREG (integer 1) (owner "Xilinx")) + (property MASK (string "FFFFFFFFFFFE") (owner "Xilinx")) + (property MREG (integer 1) (owner "Xilinx")) + (property OPMODEREG (integer 0) (owner "Xilinx")) + (property PATTERN (string "000000000000") (owner "Xilinx")) + (property PREG (integer 1) (owner "Xilinx")) + (property SEL_MASK (string "MASK") (owner "Xilinx")) + (property SEL_PATTERN (string "PATTERN") (owner "Xilinx")) + (property USE_DPORT (string "TRUE") (owner "Xilinx")) + (property USE_MULT (string "MULTIPLY") (owner "Xilinx")) + (property USE_PATTERN_DETECT (string "NO_PATDET") (owner "Xilinx")) + (property USE_SIMD (string "ONE48") (owner "Xilinx")) + ) + (instance blk000000f2 + (viewRef view_1 (cellRef DSP48E1 (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property BUS_INFO (string "3:INPUT:CARRYINSEL<2:0>") (owner "Xilinx")) + (property BUS_INFO (string "4:OUTPUT:CARRYOUT<3:0>") (owner "Xilinx")) + (property BUS_INFO (string "4:INPUT:ALUMODE<3:0>") (owner "Xilinx")) + (property BUS_INFO (string "7:INPUT:OPMODE<6:0>") (owner "Xilinx")) + (property BUS_INFO (string "5:INPUT:INMODE<4:0>") (owner "Xilinx")) + (property BUS_INFO (string "30:OUTPUT:ACOUT<29:0>") (owner "Xilinx")) + (property BUS_INFO (string "18:OUTPUT:BCOUT<17:0>") (owner "Xilinx")) + (property BUS_INFO (string "48:OUTPUT:PCOUT<47:0>") (owner "Xilinx")) + (property BUS_INFO (string "48:INPUT:PCIN<47:0>") (owner "Xilinx")) + (property BUS_INFO (string "18:INPUT:BCIN<17:0>") (owner "Xilinx")) + (property BUS_INFO (string "30:INPUT:ACIN<29:0>") (owner "Xilinx")) + (property BUS_INFO (string "48:INPUT:C<47:0>") (owner "Xilinx")) + (property BUS_INFO (string "18:INPUT:B<17:0>") (owner "Xilinx")) + (property BUS_INFO (string "25:INPUT:D<24:0>") (owner "Xilinx")) + (property BUS_INFO (string "48:OUTPUT:P<47:0>") (owner "Xilinx")) + (property BUS_INFO (string "30:INPUT:A<29:0>") (owner "Xilinx")) + (property OPTIMIZE_PRIMITIVES_NGC (string "no") (owner "Xilinx")) + (property ACASCREG (integer 1) (owner "Xilinx")) + (property ADREG (integer 1) (owner "Xilinx")) + (property ALUMODEREG (integer 0) (owner "Xilinx")) + (property AREG (integer 1) (owner "Xilinx")) + (property AUTORESET_PATDET (string "NO_RESET") (owner "Xilinx")) + (property A_INPUT (string "DIRECT") (owner "Xilinx")) + (property BCASCREG (integer 1) (owner "Xilinx")) + (property BREG (integer 1) (owner "Xilinx")) + (property B_INPUT (string "DIRECT") (owner "Xilinx")) + (property CARRYINREG (integer 1) (owner "Xilinx")) + (property CARRYINSELREG (integer 1) (owner "Xilinx")) + (property CREG (integer 1) (owner "Xilinx")) + (property DREG (integer 1) (owner "Xilinx")) + (property INMODEREG (integer 1) (owner "Xilinx")) + (property MASK (string "FFFFFFFFFFFE") (owner "Xilinx")) + (property MREG (integer 1) (owner "Xilinx")) + (property OPMODEREG (integer 0) (owner "Xilinx")) + (property PATTERN (string "000000000000") (owner "Xilinx")) + (property PREG (integer 1) (owner "Xilinx")) + (property SEL_MASK (string "MASK") (owner "Xilinx")) + (property SEL_PATTERN (string "PATTERN") (owner "Xilinx")) + (property USE_DPORT (string "TRUE") (owner "Xilinx")) + (property USE_MULT (string "MULTIPLY") (owner "Xilinx")) + (property USE_PATTERN_DETECT (string "NO_PATDET") (owner "Xilinx")) + (property USE_SIMD (string "ONE48") (owner "Xilinx")) + ) + (instance blk000000f3 + (viewRef view_1 (cellRef FDRE (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property INIT (string "0") (owner "Xilinx")) + ) + (instance blk000000f4 + (viewRef view_1 (cellRef FDRE (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property INIT (string "0") (owner "Xilinx")) + ) + (instance blk000000f5 + (viewRef view_1 (cellRef FDRE (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property INIT (string "0") (owner "Xilinx")) + ) + (instance blk000000f6 + (viewRef view_1 (cellRef FDRE (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property INIT (string "0") (owner "Xilinx")) + ) + (instance blk000000f7 + (viewRef view_1 (cellRef FDRE (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property INIT (string "0") (owner "Xilinx")) + ) + (instance blk000000f8 + (viewRef view_1 (cellRef FDRE (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property INIT (string "0") (owner "Xilinx")) + ) + (instance blk000000f9 + (viewRef view_1 (cellRef FDRE (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property INIT (string "0") (owner "Xilinx")) + ) + (instance blk000000fa + (viewRef view_1 (cellRef FDRE (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property INIT (string "0") (owner "Xilinx")) + ) + (instance blk000000fb + (viewRef view_1 (cellRef FDRE (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property INIT (string "0") (owner "Xilinx")) + ) + (instance blk000000fc + (viewRef view_1 (cellRef FDRE (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property INIT (string "0") (owner "Xilinx")) + ) + (instance blk000000fd + (viewRef view_1 (cellRef FDRE (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property INIT (string "0") (owner "Xilinx")) + ) + (instance blk000000fe + (viewRef view_1 (cellRef FDRE (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property INIT (string "0") (owner "Xilinx")) + ) + (instance blk000000ff + (viewRef view_1 (cellRef FDRE (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property INIT (string "0") (owner "Xilinx")) + ) + (instance blk00000100 + (viewRef view_1 (cellRef FDRE (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property INIT (string "0") (owner "Xilinx")) + ) + (instance blk00000101 + (viewRef view_1 (cellRef FDRE (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property INIT (string "0") (owner "Xilinx")) + ) + (instance blk00000102 + (viewRef view_1 (cellRef FDRE (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property INIT (string "0") (owner "Xilinx")) + ) + (instance blk00000103 + (viewRef view_1 (cellRef FDRE (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property INIT (string "0") (owner "Xilinx")) + ) + (instance blk00000104 + (viewRef view_1 (cellRef FDRE (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property INIT (string "0") (owner "Xilinx")) + ) + (instance blk00000105 + (viewRef view_1 (cellRef FDRE (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property INIT (string "0") (owner "Xilinx")) + ) + (instance blk00000106 + (viewRef view_1 (cellRef FDRE (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property INIT (string "0") (owner "Xilinx")) + ) + (instance blk00000107 + (viewRef view_1 (cellRef FDRE (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property INIT (string "0") (owner "Xilinx")) + ) + (instance blk00000108 + (viewRef view_1 (cellRef FDRE (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property INIT (string "0") (owner "Xilinx")) + ) + (instance blk00000109 + (viewRef view_1 (cellRef FDRE (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property INIT (string "0") (owner "Xilinx")) + ) + (instance blk0000010a + (viewRef view_1 (cellRef FDRE (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property INIT (string "0") (owner "Xilinx")) + ) + (instance blk0000010b + (viewRef view_1 (cellRef FDRE (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property INIT (string "0") (owner "Xilinx")) + ) + (instance blk0000010c + (viewRef view_1 (cellRef FDRE (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property INIT (string "0") (owner "Xilinx")) + ) + (instance blk0000010d + (viewRef view_1 (cellRef FDRE (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property INIT (string "0") (owner "Xilinx")) + ) + (instance blk0000010e + (viewRef view_1 (cellRef FDRE (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property INIT (string "0") (owner "Xilinx")) + ) + (instance blk0000010f + (viewRef view_1 (cellRef FDRE (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property INIT (string "0") (owner "Xilinx")) + ) + (instance blk00000110 + (viewRef view_1 (cellRef FDRE (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property INIT (string "0") (owner "Xilinx")) + ) + (instance blk00000111 + (viewRef view_1 (cellRef FDRE (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property INIT (string "0") (owner "Xilinx")) + ) + (instance blk00000112 + (viewRef view_1 (cellRef FDRE (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property INIT (string "0") (owner "Xilinx")) + ) + (instance blk00000113 + (viewRef view_1 (cellRef FDRE (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property INIT (string "0") (owner "Xilinx")) + ) + (instance blk00000114 + (viewRef view_1 (cellRef FDRE (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property INIT (string "0") (owner "Xilinx")) + ) + (instance blk00000115 + (viewRef view_1 (cellRef FDRE (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property INIT (string "0") (owner "Xilinx")) + ) + (instance blk00000116 + (viewRef view_1 (cellRef FDRE (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property INIT (string "0") (owner "Xilinx")) + ) + (instance blk00000117 + (viewRef view_1 (cellRef FDRE (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property INIT (string "0") (owner "Xilinx")) + ) + (instance blk00000118 + (viewRef view_1 (cellRef FDRE (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property INIT (string "0") (owner "Xilinx")) + ) + (instance blk00000119 + (viewRef view_1 (cellRef FDRE (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property INIT (string "0") (owner "Xilinx")) + ) + (instance blk0000011a + (viewRef view_1 (cellRef FDRE (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property INIT (string "0") (owner "Xilinx")) + ) + (instance blk0000011b + (viewRef view_1 (cellRef FDRE (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property INIT (string "0") (owner "Xilinx")) + ) + (instance blk0000011c + (viewRef view_1 (cellRef FDRE (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property INIT (string "0") (owner "Xilinx")) + ) + (instance blk0000011d + (viewRef view_1 (cellRef FDRE (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property INIT (string "0") (owner "Xilinx")) + ) + (instance blk0000011e + (viewRef view_1 (cellRef FDRE (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property INIT (string "0") (owner "Xilinx")) + ) + (instance blk0000011f + (viewRef view_1 (cellRef FDRE (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property INIT (string "0") (owner "Xilinx")) + ) + (instance blk00000120 + (viewRef view_1 (cellRef sp_ram_blk00000120 (libraryRef hbdec1_lib))) + (property BUS_INFO (string "1:INPUT:ADDR<0:0>") (owner "Xilinx")) + (property BUS_INFO (string "24:INPUT:DATA_IN<23:0>") (owner "Xilinx")) + (property BUS_INFO (string "24:OUTPUT:DATA_OUT<23:0>") (owner "Xilinx")) + (property NLW_UNIQUE_ID (integer 0) (owner "Xilinx")) + (property NLW_MACRO_TAG (integer 3) (owner "Xilinx")) + (property NLW_MACRO_ALIAS (string "sp_ram_blk00000120") (owner "Xilinx")) + ) + (instance blk00000153 + (viewRef view_1 (cellRef sp_ram_NO1_blk00000153 (libraryRef hbdec1_lib))) + (property BUS_INFO (string "1:INPUT:ADDR<0:0>") (owner "Xilinx")) + (property BUS_INFO (string "24:INPUT:DATA_IN<23:0>") (owner "Xilinx")) + (property BUS_INFO (string "24:OUTPUT:DATA_OUT<23:0>") (owner "Xilinx")) + (property NLW_UNIQUE_ID (integer 1) (owner "Xilinx")) + (property NLW_MACRO_TAG (integer 4) (owner "Xilinx")) + (property NLW_MACRO_ALIAS (string "sp_ram_NO1_blk00000153") (owner "Xilinx")) + ) + (instance blk00000186 + (viewRef view_1 (cellRef sp_ram_NO2_blk00000186 (libraryRef hbdec1_lib))) + (property BUS_INFO (string "1:INPUT:ADDR<0:0>") (owner "Xilinx")) + (property BUS_INFO (string "24:INPUT:DATA_IN<23:0>") (owner "Xilinx")) + (property BUS_INFO (string "24:OUTPUT:DATA_OUT<23:0>") (owner "Xilinx")) + (property NLW_UNIQUE_ID (integer 2) (owner "Xilinx")) + (property NLW_MACRO_TAG (integer 5) (owner "Xilinx")) + (property NLW_MACRO_ALIAS (string "sp_ram_NO2_blk00000186") (owner "Xilinx")) + ) + (instance blk000001b9 + (viewRef view_1 (cellRef sp_ram_NO3_blk000001b9 (libraryRef hbdec1_lib))) + (property BUS_INFO (string "1:INPUT:ADDR<0:0>") (owner "Xilinx")) + (property BUS_INFO (string "24:INPUT:DATA_IN<23:0>") (owner "Xilinx")) + (property BUS_INFO (string "24:OUTPUT:DATA_OUT<23:0>") (owner "Xilinx")) + (property NLW_UNIQUE_ID (integer 3) (owner "Xilinx")) + (property NLW_MACRO_TAG (integer 6) (owner "Xilinx")) + (property NLW_MACRO_ALIAS (string "sp_ram_NO3_blk000001b9") (owner "Xilinx")) + ) + (instance blk000001ec + (viewRef view_1 (cellRef sp_ram_NO4_blk000001ec (libraryRef hbdec1_lib))) + (property BUS_INFO (string "1:INPUT:ADDR<0:0>") (owner "Xilinx")) + (property BUS_INFO (string "24:INPUT:DATA_IN<23:0>") (owner "Xilinx")) + (property BUS_INFO (string "24:OUTPUT:DATA_OUT<23:0>") (owner "Xilinx")) + (property NLW_UNIQUE_ID (integer 4) (owner "Xilinx")) + (property NLW_MACRO_TAG (integer 7) (owner "Xilinx")) + (property NLW_MACRO_ALIAS (string "sp_ram_NO4_blk000001ec") (owner "Xilinx")) + ) + (instance blk0000021f + (viewRef view_1 (cellRef sp_ram_NO5_blk0000021f (libraryRef hbdec1_lib))) + (property BUS_INFO (string "1:INPUT:ADDR<0:0>") (owner "Xilinx")) + (property BUS_INFO (string "24:INPUT:DATA_IN<23:0>") (owner "Xilinx")) + (property BUS_INFO (string "24:OUTPUT:DATA_OUT<23:0>") (owner "Xilinx")) + (property NLW_UNIQUE_ID (integer 5) (owner "Xilinx")) + (property NLW_MACRO_TAG (integer 8) (owner "Xilinx")) + (property NLW_MACRO_ALIAS (string "sp_ram_NO5_blk0000021f") (owner "Xilinx")) + ) + (instance blk00000252 + (viewRef view_1 (cellRef sp_ram_NO6_blk00000252 (libraryRef hbdec1_lib))) + (property BUS_INFO (string "1:INPUT:ADDR<0:0>") (owner "Xilinx")) + (property BUS_INFO (string "24:INPUT:DATA_IN<23:0>") (owner "Xilinx")) + (property BUS_INFO (string "24:OUTPUT:DATA_OUT<23:0>") (owner "Xilinx")) + (property NLW_UNIQUE_ID (integer 6) (owner "Xilinx")) + (property NLW_MACRO_TAG (integer 9) (owner "Xilinx")) + (property NLW_MACRO_ALIAS (string "sp_ram_NO6_blk00000252") (owner "Xilinx")) + ) + (instance blk00000285 + (viewRef view_1 (cellRef sp_ram_NO7_blk00000285 (libraryRef hbdec1_lib))) + (property BUS_INFO (string "1:INPUT:ADDR<0:0>") (owner "Xilinx")) + (property BUS_INFO (string "24:INPUT:DATA_IN<23:0>") (owner "Xilinx")) + (property BUS_INFO (string "24:OUTPUT:DATA_OUT<23:0>") (owner "Xilinx")) + (property NLW_UNIQUE_ID (integer 7) (owner "Xilinx")) + (property NLW_MACRO_TAG (integer 10) (owner "Xilinx")) + (property NLW_MACRO_ALIAS (string "sp_ram_NO7_blk00000285") (owner "Xilinx")) + ) + (instance blk000002b8 + (viewRef view_1 (cellRef sp_ram_NO8_blk000002b8 (libraryRef hbdec1_lib))) + (property BUS_INFO (string "1:INPUT:ADDR<0:0>") (owner "Xilinx")) + (property BUS_INFO (string "24:INPUT:DATA_IN<23:0>") (owner "Xilinx")) + (property BUS_INFO (string "24:OUTPUT:DATA_OUT<23:0>") (owner "Xilinx")) + (property NLW_UNIQUE_ID (integer 8) (owner "Xilinx")) + (property NLW_MACRO_TAG (integer 11) (owner "Xilinx")) + (property NLW_MACRO_ALIAS (string "sp_ram_NO8_blk000002b8") (owner "Xilinx")) + ) + (instance blk000002eb + (viewRef view_1 (cellRef sp_ram_NO9_blk000002eb (libraryRef hbdec1_lib))) + (property BUS_INFO (string "1:INPUT:ADDR<0:0>") (owner "Xilinx")) + (property BUS_INFO (string "24:INPUT:DATA_IN<23:0>") (owner "Xilinx")) + (property BUS_INFO (string "24:OUTPUT:DATA_OUT<23:0>") (owner "Xilinx")) + (property NLW_UNIQUE_ID (integer 9) (owner "Xilinx")) + (property NLW_MACRO_TAG (integer 12) (owner "Xilinx")) + (property NLW_MACRO_ALIAS (string "sp_ram_NO9_blk000002eb") (owner "Xilinx")) + ) + (instance blk0000031e + (viewRef view_1 (cellRef sp_ram_NO10_blk0000031e (libraryRef hbdec1_lib))) + (property BUS_INFO (string "1:INPUT:ADDR<0:0>") (owner "Xilinx")) + (property BUS_INFO (string "24:INPUT:DATA_IN<23:0>") (owner "Xilinx")) + (property BUS_INFO (string "24:OUTPUT:DATA_OUT<23:0>") (owner "Xilinx")) + (property NLW_UNIQUE_ID (integer 10) (owner "Xilinx")) + (property NLW_MACRO_TAG (integer 13) (owner "Xilinx")) + (property NLW_MACRO_ALIAS (string "sp_ram_NO10_blk0000031e") (owner "Xilinx")) + ) + (instance blk00000351 + (viewRef view_1 (cellRef sp_ram_NO11_blk00000351 (libraryRef hbdec1_lib))) + (property BUS_INFO (string "1:INPUT:ADDR<0:0>") (owner "Xilinx")) + (property BUS_INFO (string "24:INPUT:DATA_IN<23:0>") (owner "Xilinx")) + (property BUS_INFO (string "24:OUTPUT:DATA_OUT<23:0>") (owner "Xilinx")) + (property NLW_UNIQUE_ID (integer 11) (owner "Xilinx")) + (property NLW_MACRO_TAG (integer 14) (owner "Xilinx")) + (property NLW_MACRO_ALIAS (string "sp_ram_NO11_blk00000351") (owner "Xilinx")) + ) + (instance blk00000384 + (viewRef view_1 (cellRef sp_ram_NO12_blk00000384 (libraryRef hbdec1_lib))) + (property BUS_INFO (string "1:INPUT:ADDR<0:0>") (owner "Xilinx")) + (property BUS_INFO (string "24:INPUT:DATA_IN<23:0>") (owner "Xilinx")) + (property BUS_INFO (string "24:OUTPUT:DATA_OUT<23:0>") (owner "Xilinx")) + (property NLW_UNIQUE_ID (integer 12) (owner "Xilinx")) + (property NLW_MACRO_TAG (integer 15) (owner "Xilinx")) + (property NLW_MACRO_ALIAS (string "sp_ram_NO12_blk00000384") (owner "Xilinx")) + ) + (instance blk000003b7 + (viewRef view_1 (cellRef sp_ram_NO13_blk000003b7 (libraryRef hbdec1_lib))) + (property BUS_INFO (string "1:INPUT:ADDR<0:0>") (owner "Xilinx")) + (property BUS_INFO (string "24:INPUT:DATA_IN<23:0>") (owner "Xilinx")) + (property BUS_INFO (string "24:OUTPUT:DATA_OUT<23:0>") (owner "Xilinx")) + (property NLW_UNIQUE_ID (integer 13) (owner "Xilinx")) + (property NLW_MACRO_TAG (integer 16) (owner "Xilinx")) + (property NLW_MACRO_ALIAS (string "sp_ram_NO13_blk000003b7") (owner "Xilinx")) + ) + (instance blk000003ea + (viewRef view_1 (cellRef sp_ram_NO14_blk000003ea (libraryRef hbdec1_lib))) + (property BUS_INFO (string "1:INPUT:ADDR<0:0>") (owner "Xilinx")) + (property BUS_INFO (string "24:INPUT:DATA_IN<23:0>") (owner "Xilinx")) + (property BUS_INFO (string "24:OUTPUT:DATA_OUT<23:0>") (owner "Xilinx")) + (property NLW_UNIQUE_ID (integer 14) (owner "Xilinx")) + (property NLW_MACRO_TAG (integer 17) (owner "Xilinx")) + (property NLW_MACRO_ALIAS (string "sp_ram_NO14_blk000003ea") (owner "Xilinx")) + ) + (instance blk0000041d + (viewRef view_1 (cellRef sp_ram_NO15_blk0000041d (libraryRef hbdec1_lib))) + (property BUS_INFO (string "1:INPUT:ADDR<0:0>") (owner "Xilinx")) + (property BUS_INFO (string "24:INPUT:DATA_IN<23:0>") (owner "Xilinx")) + (property BUS_INFO (string "24:OUTPUT:DATA_OUT<23:0>") (owner "Xilinx")) + (property NLW_UNIQUE_ID (integer 15) (owner "Xilinx")) + (property NLW_MACRO_TAG (integer 18) (owner "Xilinx")) + (property NLW_MACRO_ALIAS (string "sp_ram_NO15_blk0000041d") (owner "Xilinx")) + ) + (instance blk00000450 + (viewRef view_1 (cellRef sp_ram_NO16_blk00000450 (libraryRef hbdec1_lib))) + (property BUS_INFO (string "1:INPUT:ADDR<0:0>") (owner "Xilinx")) + (property BUS_INFO (string "24:INPUT:DATA_IN<23:0>") (owner "Xilinx")) + (property BUS_INFO (string "24:OUTPUT:DATA_OUT<23:0>") (owner "Xilinx")) + (property NLW_UNIQUE_ID (integer 16) (owner "Xilinx")) + (property NLW_MACRO_TAG (integer 19) (owner "Xilinx")) + (property NLW_MACRO_ALIAS (string "sp_ram_NO16_blk00000450") (owner "Xilinx")) + ) + (instance blk00000483 + (viewRef view_1 (cellRef sp_ram_NO17_blk00000483 (libraryRef hbdec1_lib))) + (property BUS_INFO (string "1:INPUT:ADDR<0:0>") (owner "Xilinx")) + (property BUS_INFO (string "24:INPUT:DATA_IN<23:0>") (owner "Xilinx")) + (property BUS_INFO (string "24:OUTPUT:DATA_OUT<23:0>") (owner "Xilinx")) + (property NLW_UNIQUE_ID (integer 17) (owner "Xilinx")) + (property NLW_MACRO_TAG (integer 20) (owner "Xilinx")) + (property NLW_MACRO_ALIAS (string "sp_ram_NO17_blk00000483") (owner "Xilinx")) + ) + (instance blk000004b6 + (viewRef view_1 (cellRef sp_ram_NO18_blk000004b6 (libraryRef hbdec1_lib))) + (property BUS_INFO (string "1:INPUT:ADDR<0:0>") (owner "Xilinx")) + (property BUS_INFO (string "24:INPUT:DATA_IN<23:0>") (owner "Xilinx")) + (property BUS_INFO (string "24:OUTPUT:DATA_OUT<23:0>") (owner "Xilinx")) + (property NLW_UNIQUE_ID (integer 18) (owner "Xilinx")) + (property NLW_MACRO_TAG (integer 21) (owner "Xilinx")) + (property NLW_MACRO_ALIAS (string "sp_ram_NO18_blk000004b6") (owner "Xilinx")) + ) + (instance blk000004e9 + (viewRef view_1 (cellRef sp_ram_NO19_blk000004e9 (libraryRef hbdec1_lib))) + (property BUS_INFO (string "1:INPUT:ADDR<0:0>") (owner "Xilinx")) + (property BUS_INFO (string "24:INPUT:DATA_IN<23:0>") (owner "Xilinx")) + (property BUS_INFO (string "24:OUTPUT:DATA_OUT<23:0>") (owner "Xilinx")) + (property NLW_UNIQUE_ID (integer 19) (owner "Xilinx")) + (property NLW_MACRO_TAG (integer 22) (owner "Xilinx")) + (property NLW_MACRO_ALIAS (string "sp_ram_NO19_blk000004e9") (owner "Xilinx")) + ) + (instance blk0000051c + (viewRef view_1 (cellRef sp_ram_NO20_blk0000051c (libraryRef hbdec1_lib))) + (property BUS_INFO (string "1:INPUT:ADDR<0:0>") (owner "Xilinx")) + (property BUS_INFO (string "24:INPUT:DATA_IN<23:0>") (owner "Xilinx")) + (property BUS_INFO (string "24:OUTPUT:DATA_OUT<23:0>") (owner "Xilinx")) + (property NLW_UNIQUE_ID (integer 20) (owner "Xilinx")) + (property NLW_MACRO_TAG (integer 23) (owner "Xilinx")) + (property NLW_MACRO_ALIAS (string "sp_ram_NO20_blk0000051c") (owner "Xilinx")) + ) + (instance blk0000054f + (viewRef view_1 (cellRef sp_ram_NO21_blk0000054f (libraryRef hbdec1_lib))) + (property BUS_INFO (string "1:INPUT:ADDR<0:0>") (owner "Xilinx")) + (property BUS_INFO (string "24:INPUT:DATA_IN<23:0>") (owner "Xilinx")) + (property BUS_INFO (string "24:OUTPUT:DATA_OUT<23:0>") (owner "Xilinx")) + (property NLW_UNIQUE_ID (integer 21) (owner "Xilinx")) + (property NLW_MACRO_TAG (integer 24) (owner "Xilinx")) + (property NLW_MACRO_ALIAS (string "sp_ram_NO21_blk0000054f") (owner "Xilinx")) + ) + (instance blk00000582 + (viewRef view_1 (cellRef sp_ram_NO22_blk00000582 (libraryRef hbdec1_lib))) + (property BUS_INFO (string "1:INPUT:ADDR<0:0>") (owner "Xilinx")) + (property BUS_INFO (string "24:INPUT:DATA_IN<23:0>") (owner "Xilinx")) + (property BUS_INFO (string "24:OUTPUT:DATA_OUT<23:0>") (owner "Xilinx")) + (property NLW_UNIQUE_ID (integer 22) (owner "Xilinx")) + (property NLW_MACRO_TAG (integer 25) (owner "Xilinx")) + (property NLW_MACRO_ALIAS (string "sp_ram_NO22_blk00000582") (owner "Xilinx")) + ) + (instance blk000005b5 + (viewRef view_1 (cellRef sp_ram_NO23_blk000005b5 (libraryRef hbdec1_lib))) + (property BUS_INFO (string "1:INPUT:ADDR<0:0>") (owner "Xilinx")) + (property BUS_INFO (string "24:INPUT:DATA_IN<23:0>") (owner "Xilinx")) + (property BUS_INFO (string "24:OUTPUT:DATA_OUT<23:0>") (owner "Xilinx")) + (property NLW_UNIQUE_ID (integer 23) (owner "Xilinx")) + (property NLW_MACRO_TAG (integer 26) (owner "Xilinx")) + (property NLW_MACRO_ALIAS (string "sp_ram_NO23_blk000005b5") (owner "Xilinx")) + ) + (instance blk000005e8 + (viewRef view_1 (cellRef dpr_ram_2_blk000005e8 (libraryRef hbdec1_lib))) + (property BUS_INFO (string "2:INPUT:ADDRA<1:0>") (owner "Xilinx")) + (property BUS_INFO (string "18:INPUT:DA_IN<17:0>") (owner "Xilinx")) + (property BUS_INFO (string "2:INPUT:ADDRB<1:0>") (owner "Xilinx")) + (property BUS_INFO (string "18:OUTPUT:DA_OUT<17:0>") (owner "Xilinx")) + (property BUS_INFO (string "18:OUTPUT:DB_OUT<17:0>") (owner "Xilinx")) + (property NLW_UNIQUE_ID (integer 0) (owner "Xilinx")) + (property NLW_MACRO_TAG (integer 27) (owner "Xilinx")) + (property NLW_MACRO_ALIAS (string "dpr_ram_2_blk000005e8") (owner "Xilinx")) + ) + (instance blk00000621 + (viewRef view_1 (cellRef dpr_ram_3_blk00000621 (libraryRef hbdec1_lib))) + (property BUS_INFO (string "2:INPUT:ADDRA<1:0>") (owner "Xilinx")) + (property BUS_INFO (string "18:INPUT:DA_IN<17:0>") (owner "Xilinx")) + (property BUS_INFO (string "2:INPUT:ADDRB<1:0>") (owner "Xilinx")) + (property BUS_INFO (string "18:OUTPUT:DA_OUT<17:0>") (owner "Xilinx")) + (property BUS_INFO (string "18:OUTPUT:DB_OUT<17:0>") (owner "Xilinx")) + (property NLW_UNIQUE_ID (integer 0) (owner "Xilinx")) + (property NLW_MACRO_TAG (integer 28) (owner "Xilinx")) + (property NLW_MACRO_ALIAS (string "dpr_ram_3_blk00000621") (owner "Xilinx")) + ) + (instance blk0000065a + (viewRef view_1 (cellRef dpr_ram_4_blk0000065a (libraryRef hbdec1_lib))) + (property BUS_INFO (string "2:INPUT:ADDRA<1:0>") (owner "Xilinx")) + (property BUS_INFO (string "18:INPUT:DA_IN<17:0>") (owner "Xilinx")) + (property BUS_INFO (string "2:INPUT:ADDRB<1:0>") (owner "Xilinx")) + (property BUS_INFO (string "18:OUTPUT:DA_OUT<17:0>") (owner "Xilinx")) + (property BUS_INFO (string "18:OUTPUT:DB_OUT<17:0>") (owner "Xilinx")) + (property NLW_UNIQUE_ID (integer 0) (owner "Xilinx")) + (property NLW_MACRO_TAG (integer 29) (owner "Xilinx")) + (property NLW_MACRO_ALIAS (string "dpr_ram_4_blk0000065a") (owner "Xilinx")) + ) + (instance blk00000693 + (viewRef view_1 (cellRef dpr_ram_5_blk00000693 (libraryRef hbdec1_lib))) + (property BUS_INFO (string "2:INPUT:ADDRA<1:0>") (owner "Xilinx")) + (property BUS_INFO (string "18:INPUT:DA_IN<17:0>") (owner "Xilinx")) + (property BUS_INFO (string "2:INPUT:ADDRB<1:0>") (owner "Xilinx")) + (property BUS_INFO (string "18:OUTPUT:DA_OUT<17:0>") (owner "Xilinx")) + (property BUS_INFO (string "18:OUTPUT:DB_OUT<17:0>") (owner "Xilinx")) + (property NLW_UNIQUE_ID (integer 0) (owner "Xilinx")) + (property NLW_MACRO_TAG (integer 30) (owner "Xilinx")) + (property NLW_MACRO_ALIAS (string "dpr_ram_5_blk00000693") (owner "Xilinx")) + ) + (instance blk000006cc + (viewRef view_1 (cellRef dpr_ram_6_blk000006cc (libraryRef hbdec1_lib))) + (property BUS_INFO (string "2:INPUT:ADDRA<1:0>") (owner "Xilinx")) + (property BUS_INFO (string "18:INPUT:DA_IN<17:0>") (owner "Xilinx")) + (property BUS_INFO (string "2:INPUT:ADDRB<1:0>") (owner "Xilinx")) + (property BUS_INFO (string "18:OUTPUT:DA_OUT<17:0>") (owner "Xilinx")) + (property BUS_INFO (string "18:OUTPUT:DB_OUT<17:0>") (owner "Xilinx")) + (property NLW_UNIQUE_ID (integer 0) (owner "Xilinx")) + (property NLW_MACRO_TAG (integer 31) (owner "Xilinx")) + (property NLW_MACRO_ALIAS (string "dpr_ram_6_blk000006cc") (owner "Xilinx")) + ) + (instance blk00000705 + (viewRef view_1 (cellRef dpr_ram_7_blk00000705 (libraryRef hbdec1_lib))) + (property BUS_INFO (string "2:INPUT:ADDRA<1:0>") (owner "Xilinx")) + (property BUS_INFO (string "18:INPUT:DA_IN<17:0>") (owner "Xilinx")) + (property BUS_INFO (string "2:INPUT:ADDRB<1:0>") (owner "Xilinx")) + (property BUS_INFO (string "18:OUTPUT:DA_OUT<17:0>") (owner "Xilinx")) + (property BUS_INFO (string "18:OUTPUT:DB_OUT<17:0>") (owner "Xilinx")) + (property NLW_UNIQUE_ID (integer 0) (owner "Xilinx")) + (property NLW_MACRO_TAG (integer 32) (owner "Xilinx")) + (property NLW_MACRO_ALIAS (string "dpr_ram_7_blk00000705") (owner "Xilinx")) + ) + (instance blk0000072c + (viewRef view_1 (cellRef FDRE (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property INIT (string "0") (owner "Xilinx")) + ) + (instance blk0000072d + (viewRef view_1 (cellRef FDRE (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property INIT (string "0") (owner "Xilinx")) + ) + (instance blk0000072e + (viewRef view_1 (cellRef FDRE (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property INIT (string "0") (owner "Xilinx")) + ) + (instance blk0000072f + (viewRef view_1 (cellRef FDRE (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property INIT (string "0") (owner "Xilinx")) + ) + (instance blk00000730 + (viewRef view_1 (cellRef FDRE (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property INIT (string "0") (owner "Xilinx")) + ) + (instance blk00000731 + (viewRef view_1 (cellRef FDRE (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property INIT (string "0") (owner "Xilinx")) + ) + (instance blk00000732 + (viewRef view_1 (cellRef FDRE (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property INIT (string "0") (owner "Xilinx")) + ) + (instance blk00000733 + (viewRef view_1 (cellRef FDRE (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property INIT (string "0") (owner "Xilinx")) + ) + (instance blk00000734 + (viewRef view_1 (cellRef FDRE (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property INIT (string "0") (owner "Xilinx")) + ) + (instance blk00000735 + (viewRef view_1 (cellRef FDRE (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property INIT (string "0") (owner "Xilinx")) + ) + (instance blk00000736 + (viewRef view_1 (cellRef FDRE (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property INIT (string "0") (owner "Xilinx")) + ) + (instance blk00000737 + (viewRef view_1 (cellRef FDRE (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property INIT (string "0") (owner "Xilinx")) + ) + (instance blk00000738 + (viewRef view_1 (cellRef FDRE (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property INIT (string "0") (owner "Xilinx")) + ) + (instance blk00000739 + (viewRef view_1 (cellRef FDRE (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property INIT (string "0") (owner "Xilinx")) + ) + (instance blk0000073a + (viewRef view_1 (cellRef FDRE (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property INIT (string "0") (owner "Xilinx")) + ) + (instance blk0000073b + (viewRef view_1 (cellRef FDRE (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property INIT (string "0") (owner "Xilinx")) + ) + (instance blk0000073c + (viewRef view_1 (cellRef FDRE (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property INIT (string "0") (owner "Xilinx")) + ) + (instance blk0000073d + (viewRef view_1 (cellRef FDRE (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property INIT (string "0") (owner "Xilinx")) + ) + (instance blk0000073e + (viewRef view_1 (cellRef FDRE (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property INIT (string "0") (owner "Xilinx")) + ) + (instance blk0000073f + (viewRef view_1 (cellRef FDRE (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property INIT (string "0") (owner "Xilinx")) + ) + (instance blk00000740 + (viewRef view_1 (cellRef FDRE (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property INIT (string "0") (owner "Xilinx")) + ) + (instance blk00000741 + (viewRef view_1 (cellRef FDRE (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property INIT (string "0") (owner "Xilinx")) + ) + (instance blk00000742 + (viewRef view_1 (cellRef FDRE (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property INIT (string "0") (owner "Xilinx")) + ) + (instance blk00000743 + (viewRef view_1 (cellRef FDRE (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property INIT (string "0") (owner "Xilinx")) + ) + (instance blk00000744 + (viewRef view_1 (cellRef FDRE (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property INIT (string "0") (owner "Xilinx")) + ) + (instance blk00000745 + (viewRef view_1 (cellRef FDRE (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property INIT (string "0") (owner "Xilinx")) + ) + (instance blk00000746 + (viewRef view_1 (cellRef FDRE (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property INIT (string "0") (owner "Xilinx")) + ) + (instance blk00000747 + (viewRef view_1 (cellRef FDRE (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property INIT (string "0") (owner "Xilinx")) + ) + (instance blk00000748 + (viewRef view_1 (cellRef FDRE (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property INIT (string "0") (owner "Xilinx")) + ) + (instance blk00000749 + (viewRef view_1 (cellRef FDRE (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property INIT (string "0") (owner "Xilinx")) + ) + (instance blk0000074a + (viewRef view_1 (cellRef FDRE (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property INIT (string "0") (owner "Xilinx")) + ) + (instance blk0000074b + (viewRef view_1 (cellRef FDRE (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property INIT (string "0") (owner "Xilinx")) + ) + (instance blk0000074c + (viewRef view_1 (cellRef FDRE (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property INIT (string "0") (owner "Xilinx")) + ) + (instance blk0000074d + (viewRef view_1 (cellRef FDRE (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property INIT (string "0") (owner "Xilinx")) + ) + (instance blk0000074e + (viewRef view_1 (cellRef FDRE (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property INIT (string "0") (owner "Xilinx")) + ) + (instance blk0000074f + (viewRef view_1 (cellRef FDRE (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property INIT (string "0") (owner "Xilinx")) + ) + (instance blk00000750 + (viewRef view_1 (cellRef FDRE (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property INIT (string "0") (owner "Xilinx")) + ) + (instance blk00000751 + (viewRef view_1 (cellRef FDRE (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property INIT (string "0") (owner "Xilinx")) + ) + (instance blk00000752 + (viewRef view_1 (cellRef FDRE (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property INIT (string "0") (owner "Xilinx")) + ) + (instance blk00000753 + (viewRef view_1 (cellRef FDRE (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property INIT (string "0") (owner "Xilinx")) + ) + (instance blk00000754 + (viewRef view_1 (cellRef FDRE (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property INIT (string "0") (owner "Xilinx")) + ) + (instance blk00000755 + (viewRef view_1 (cellRef FDRE (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property INIT (string "0") (owner "Xilinx")) + ) + (instance blk00000756 + (viewRef view_1 (cellRef FDRE (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property INIT (string "0") (owner "Xilinx")) + ) + (instance blk00000757 + (viewRef view_1 (cellRef FDRE (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property INIT (string "0") (owner "Xilinx")) + ) + (instance blk00000758 + (viewRef view_1 (cellRef FDRE (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property INIT (string "0") (owner "Xilinx")) + ) + (instance blk00000759 + (viewRef view_1 (cellRef FDRE (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property INIT (string "0") (owner "Xilinx")) + ) + (instance blk0000075a + (viewRef view_1 (cellRef FDRE (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property INIT (string "0") (owner "Xilinx")) + ) + (instance blk0000075b + (viewRef view_1 (cellRef FDRE (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property INIT (string "0") (owner "Xilinx")) + ) + (instance blk0000075c + (viewRef view_1 (cellRef dpr_ram_8_blk0000075c (libraryRef hbdec1_lib))) + (property BUS_INFO (string "1:INPUT:ADDRA<0:0>") (owner "Xilinx")) + (property BUS_INFO (string "18:INPUT:DA_IN<17:0>") (owner "Xilinx")) + (property BUS_INFO (string "1:INPUT:ADDRB<0:0>") (owner "Xilinx")) + (property BUS_INFO (string "18:OUTPUT:DA_OUT<17:0>") (owner "Xilinx")) + (property BUS_INFO (string "18:OUTPUT:DB_OUT<17:0>") (owner "Xilinx")) + (property NLW_UNIQUE_ID (integer 0) (owner "Xilinx")) + (property NLW_MACRO_TAG (integer 33) (owner "Xilinx")) + (property NLW_MACRO_ALIAS (string "dpr_ram_8_blk0000075c") (owner "Xilinx")) + ) + (instance blk00000783 + (viewRef view_1 (cellRef XORCY (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property OPTIMIZE_PRIMITIVES_NGC (string "no") (owner "Xilinx")) + ) + (instance blk00000784 + (viewRef view_1 (cellRef XORCY (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property OPTIMIZE_PRIMITIVES_NGC (string "no") (owner "Xilinx")) + ) + (instance blk00000785 + (viewRef view_1 (cellRef XORCY (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property OPTIMIZE_PRIMITIVES_NGC (string "no") (owner "Xilinx")) + ) + (instance blk00000786 + (viewRef view_1 (cellRef XORCY (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property OPTIMIZE_PRIMITIVES_NGC (string "no") (owner "Xilinx")) + ) + (instance blk00000787 + (viewRef view_1 (cellRef XORCY (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property OPTIMIZE_PRIMITIVES_NGC (string "no") (owner "Xilinx")) + ) + (instance blk00000788 + (viewRef view_1 (cellRef XORCY (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property OPTIMIZE_PRIMITIVES_NGC (string "no") (owner "Xilinx")) + ) + (instance blk00000789 + (viewRef view_1 (cellRef MUXCY_D (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property OPTIMIZE_PRIMITIVES_NGC (string "no") (owner "Xilinx")) + ) + (instance blk0000078a + (viewRef view_1 (cellRef MUXCY_L (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property OPTIMIZE_PRIMITIVES_NGC (string "no") (owner "Xilinx")) + ) + (instance blk0000078b + (viewRef view_1 (cellRef MUXCY_L (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property OPTIMIZE_PRIMITIVES_NGC (string "no") (owner "Xilinx")) + ) + (instance blk0000078c + (viewRef view_1 (cellRef MUXCY_L (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property OPTIMIZE_PRIMITIVES_NGC (string "no") (owner "Xilinx")) + ) + (instance blk0000078d + (viewRef view_1 (cellRef MUXCY_L (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property OPTIMIZE_PRIMITIVES_NGC (string "no") (owner "Xilinx")) + ) + (instance blk0000078e + (viewRef view_1 (cellRef MUXCY_L (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property OPTIMIZE_PRIMITIVES_NGC (string "no") (owner "Xilinx")) + ) + (instance blk0000078f + (viewRef view_1 (cellRef FDE (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property INIT (string "0") (owner "Xilinx")) + ) + (instance blk00000790 + (viewRef view_1 (cellRef FDRE (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property OPTIMIZE_PRIMITIVES_NGC (string "no") (owner "Xilinx")) + (property INIT (string "0") (owner "Xilinx")) + ) + (instance blk00000791 + (viewRef view_1 (cellRef FDRE (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property OPTIMIZE_PRIMITIVES_NGC (string "no") (owner "Xilinx")) + (property INIT (string "0") (owner "Xilinx")) + ) + (instance blk00000792 + (viewRef view_1 (cellRef FDRE (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property OPTIMIZE_PRIMITIVES_NGC (string "no") (owner "Xilinx")) + (property INIT (string "0") (owner "Xilinx")) + ) + (instance blk00000793 + (viewRef view_1 (cellRef FDRE (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property OPTIMIZE_PRIMITIVES_NGC (string "no") (owner "Xilinx")) + (property INIT (string "0") (owner "Xilinx")) + ) + (instance blk00000794 + (viewRef view_1 (cellRef FDRE (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property OPTIMIZE_PRIMITIVES_NGC (string "no") (owner "Xilinx")) + (property INIT (string "0") (owner "Xilinx")) + ) + (instance blk00000795 + (viewRef view_1 (cellRef FDRE (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property OPTIMIZE_PRIMITIVES_NGC (string "no") (owner "Xilinx")) + (property INIT (string "0") (owner "Xilinx")) + ) + (instance blk00000796 + (viewRef view_1 (cellRef FDRE (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property OPTIMIZE_PRIMITIVES_NGC (string "no") (owner "Xilinx")) + (property INIT (string "0") (owner "Xilinx")) + ) + (instance blk00000797 + (viewRef view_1 (cellRef FDRE (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property OPTIMIZE_PRIMITIVES_NGC (string "no") (owner "Xilinx")) + (property INIT (string "0") (owner "Xilinx")) + ) + (instance blk00000798 + (viewRef view_1 (cellRef FDRE (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property OPTIMIZE_PRIMITIVES_NGC (string "no") (owner "Xilinx")) + (property INIT (string "0") (owner "Xilinx")) + ) + (instance blk00000799 + (viewRef view_1 (cellRef FDRE (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property OPTIMIZE_PRIMITIVES_NGC (string "no") (owner "Xilinx")) + (property INIT (string "0") (owner "Xilinx")) + ) + (instance blk0000079a + (viewRef view_1 (cellRef FDRE (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property OPTIMIZE_PRIMITIVES_NGC (string "no") (owner "Xilinx")) + (property INIT (string "0") (owner "Xilinx")) + ) + (instance blk0000079b + (viewRef view_1 (cellRef FDRE (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property OPTIMIZE_PRIMITIVES_NGC (string "no") (owner "Xilinx")) + (property INIT (string "0") (owner "Xilinx")) + ) + (instance blk0000079c + (viewRef view_1 (cellRef FDRE (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property OPTIMIZE_PRIMITIVES_NGC (string "no") (owner "Xilinx")) + (property INIT (string "0") (owner "Xilinx")) + ) + (instance blk0000079d + (viewRef view_1 (cellRef FDRE (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property OPTIMIZE_PRIMITIVES_NGC (string "no") (owner "Xilinx")) + (property INIT (string "0") (owner "Xilinx")) + ) + (instance blk0000079e + (viewRef view_1 (cellRef FDRE (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property OPTIMIZE_PRIMITIVES_NGC (string "no") (owner "Xilinx")) + (property INIT (string "0") (owner "Xilinx")) + ) + (instance blk0000079f + (viewRef view_1 (cellRef FDRE (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property OPTIMIZE_PRIMITIVES_NGC (string "no") (owner "Xilinx")) + (property INIT (string "0") (owner "Xilinx")) + ) + (instance blk000007a0 + (viewRef view_1 (cellRef FDRE (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property OPTIMIZE_PRIMITIVES_NGC (string "no") (owner "Xilinx")) + (property INIT (string "0") (owner "Xilinx")) + ) + (instance blk000007a1 + (viewRef view_1 (cellRef FDRE (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property OPTIMIZE_PRIMITIVES_NGC (string "no") (owner "Xilinx")) + (property INIT (string "0") (owner "Xilinx")) + ) + (instance blk000007a2 + (viewRef view_1 (cellRef FDRE (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property OPTIMIZE_PRIMITIVES_NGC (string "no") (owner "Xilinx")) + (property INIT (string "0") (owner "Xilinx")) + ) + (instance blk000007a3 + (viewRef view_1 (cellRef FDRE (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property OPTIMIZE_PRIMITIVES_NGC (string "no") (owner "Xilinx")) + (property INIT (string "0") (owner "Xilinx")) + ) + (instance blk000007a4 + (viewRef view_1 (cellRef FDRE (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property OPTIMIZE_PRIMITIVES_NGC (string "no") (owner "Xilinx")) + (property INIT (string "0") (owner "Xilinx")) + ) + (instance blk000007a5 + (viewRef view_1 (cellRef FDRE (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property OPTIMIZE_PRIMITIVES_NGC (string "no") (owner "Xilinx")) + (property INIT (string "0") (owner "Xilinx")) + ) + (instance blk000007a6 + (viewRef view_1 (cellRef FDRE (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property OPTIMIZE_PRIMITIVES_NGC (string "no") (owner "Xilinx")) + (property INIT (string "0") (owner "Xilinx")) + ) + (instance blk000007a7 + (viewRef view_1 (cellRef FDRE (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property OPTIMIZE_PRIMITIVES_NGC (string "no") (owner "Xilinx")) + (property INIT (string "0") (owner "Xilinx")) + ) + (instance blk000007a8 + (viewRef view_1 (cellRef FDRE (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property OPTIMIZE_PRIMITIVES_NGC (string "no") (owner "Xilinx")) + (property INIT (string "0") (owner "Xilinx")) + ) + (instance blk000007a9 + (viewRef view_1 (cellRef FDRE (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property OPTIMIZE_PRIMITIVES_NGC (string "no") (owner "Xilinx")) + (property INIT (string "0") (owner "Xilinx")) + ) + (instance blk000007aa + (viewRef view_1 (cellRef FDRE (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property OPTIMIZE_PRIMITIVES_NGC (string "no") (owner "Xilinx")) + (property INIT (string "0") (owner "Xilinx")) + ) + (instance blk000007ab + (viewRef view_1 (cellRef FDRE (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property OPTIMIZE_PRIMITIVES_NGC (string "no") (owner "Xilinx")) + (property INIT (string "0") (owner "Xilinx")) + ) + (instance blk000007ac + (viewRef view_1 (cellRef FDRE (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property OPTIMIZE_PRIMITIVES_NGC (string "no") (owner "Xilinx")) + (property INIT (string "0") (owner "Xilinx")) + ) + (instance blk000007ad + (viewRef view_1 (cellRef FDRE (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property OPTIMIZE_PRIMITIVES_NGC (string "no") (owner "Xilinx")) + (property INIT (string "0") (owner "Xilinx")) + ) + (instance blk000007ae + (viewRef view_1 (cellRef FDRE (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property OPTIMIZE_PRIMITIVES_NGC (string "no") (owner "Xilinx")) + (property INIT (string "0") (owner "Xilinx")) + ) + (instance blk000007af + (viewRef view_1 (cellRef FDRE (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property OPTIMIZE_PRIMITIVES_NGC (string "no") (owner "Xilinx")) + (property INIT (string "0") (owner "Xilinx")) + ) + (instance blk000007b0 + (viewRef view_1 (cellRef FDRE (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property OPTIMIZE_PRIMITIVES_NGC (string "no") (owner "Xilinx")) + (property INIT (string "0") (owner "Xilinx")) + ) + (instance blk000007b1 + (viewRef view_1 (cellRef FDRE (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property OPTIMIZE_PRIMITIVES_NGC (string "no") (owner "Xilinx")) + (property INIT (string "0") (owner "Xilinx")) + ) + (instance blk000007b2 + (viewRef view_1 (cellRef FDRE (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property OPTIMIZE_PRIMITIVES_NGC (string "no") (owner "Xilinx")) + (property INIT (string "0") (owner "Xilinx")) + ) + (instance blk000007b3 + (viewRef view_1 (cellRef FDRE (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property OPTIMIZE_PRIMITIVES_NGC (string "no") (owner "Xilinx")) + (property INIT (string "0") (owner "Xilinx")) + ) + (instance blk000007b4 + (viewRef view_1 (cellRef FDRE (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property OPTIMIZE_PRIMITIVES_NGC (string "no") (owner "Xilinx")) + (property INIT (string "0") (owner "Xilinx")) + ) + (instance blk000007b5 + (viewRef view_1 (cellRef FDRE (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property OPTIMIZE_PRIMITIVES_NGC (string "no") (owner "Xilinx")) + (property INIT (string "0") (owner "Xilinx")) + ) + (instance blk000007b6 + (viewRef view_1 (cellRef FDRE (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property OPTIMIZE_PRIMITIVES_NGC (string "no") (owner "Xilinx")) + (property INIT (string "0") (owner "Xilinx")) + ) + (instance blk000007b7 + (viewRef view_1 (cellRef FDRE (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property OPTIMIZE_PRIMITIVES_NGC (string "no") (owner "Xilinx")) + (property INIT (string "0") (owner "Xilinx")) + ) + (instance blk000007b8 + (viewRef view_1 (cellRef FDRE (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property OPTIMIZE_PRIMITIVES_NGC (string "no") (owner "Xilinx")) + (property INIT (string "0") (owner "Xilinx")) + ) + (instance blk000007b9 + (viewRef view_1 (cellRef FDRE (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property OPTIMIZE_PRIMITIVES_NGC (string "no") (owner "Xilinx")) + (property INIT (string "0") (owner "Xilinx")) + ) + (instance blk000007ba + (viewRef view_1 (cellRef FDRE (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property OPTIMIZE_PRIMITIVES_NGC (string "no") (owner "Xilinx")) + (property INIT (string "0") (owner "Xilinx")) + ) + (instance blk000007bb + (viewRef view_1 (cellRef FDRE (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property OPTIMIZE_PRIMITIVES_NGC (string "no") (owner "Xilinx")) + (property INIT (string "0") (owner "Xilinx")) + ) + (instance blk000007bc + (viewRef view_1 (cellRef FDRE (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property OPTIMIZE_PRIMITIVES_NGC (string "no") (owner "Xilinx")) + (property INIT (string "0") (owner "Xilinx")) + ) + (instance blk000007bd + (viewRef view_1 (cellRef FDRE (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property OPTIMIZE_PRIMITIVES_NGC (string "no") (owner "Xilinx")) + (property INIT (string "0") (owner "Xilinx")) + ) + (instance blk000007be + (viewRef view_1 (cellRef FDRE (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property OPTIMIZE_PRIMITIVES_NGC (string "no") (owner "Xilinx")) + (property INIT (string "0") (owner "Xilinx")) + ) + (instance blk000007bf + (viewRef view_1 (cellRef FDRE (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property OPTIMIZE_PRIMITIVES_NGC (string "no") (owner "Xilinx")) + (property INIT (string "0") (owner "Xilinx")) + ) + (instance blk000007c0 + (viewRef view_1 (cellRef FDRE (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property OPTIMIZE_PRIMITIVES_NGC (string "no") (owner "Xilinx")) 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"Xilinx")) + (property INIT (string "0") (owner "Xilinx")) + ) + (instance blk000007c5 + (viewRef view_1 (cellRef FDRE (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property OPTIMIZE_PRIMITIVES_NGC (string "no") (owner "Xilinx")) + (property INIT (string "0") (owner "Xilinx")) + ) + (instance blk000007c6 + (viewRef view_1 (cellRef FDRE (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property OPTIMIZE_PRIMITIVES_NGC (string "no") (owner "Xilinx")) + (property INIT (string "0") (owner "Xilinx")) + ) + (instance blk000007c7 + (viewRef view_1 (cellRef FDRE (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property OPTIMIZE_PRIMITIVES_NGC (string "no") (owner "Xilinx")) + (property INIT (string "0") (owner "Xilinx")) + ) + (instance blk000007c8 + (viewRef view_1 (cellRef FDRE (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property OPTIMIZE_PRIMITIVES_NGC (string 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(boolean (true)) (owner "Xilinx")) + (property INIT (string "0000") (owner "Xilinx")) + ) + (instance blk00000939 + (viewRef view_1 (cellRef FDE (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property INIT (string "0") (owner "Xilinx")) + ) + (instance blk0000093a + (viewRef view_1 (cellRef SRLC16E (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property INIT (string "0000") (owner "Xilinx")) + ) + (instance blk0000093b + (viewRef view_1 (cellRef FDE (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property INIT (string "0") (owner "Xilinx")) + ) + (instance blk0000093c + (viewRef view_1 (cellRef SRLC16E (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property INIT (string "0000") (owner "Xilinx")) + ) + (instance blk0000093d + (viewRef view_1 (cellRef FDE (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property INIT (string "0") (owner "Xilinx")) + ) + (instance blk0000093e + (viewRef view_1 (cellRef SRLC16E (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property INIT (string "0000") (owner "Xilinx")) + ) + (instance blk0000093f + (viewRef view_1 (cellRef FDE (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property INIT (string "0") (owner "Xilinx")) + ) + (instance blk00000940 + (viewRef view_1 (cellRef SRLC16E (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property INIT (string "0000") (owner "Xilinx")) + ) + (instance blk00000941 + (viewRef view_1 (cellRef FDE (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property INIT (string "0") (owner "Xilinx")) + ) + (instance blk00000942 + (viewRef view_1 (cellRef SRLC16E (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property INIT (string "0000") (owner "Xilinx")) + ) + (instance blk00000943 + (viewRef view_1 (cellRef FDE (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property INIT (string "0") (owner "Xilinx")) + ) + (instance blk00000944 + (viewRef view_1 (cellRef SRLC16E (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property INIT (string "0000") (owner "Xilinx")) + ) + (instance blk00000945 + (viewRef view_1 (cellRef FDE (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property INIT (string "0") (owner "Xilinx")) + ) + (instance blk00000946 + (viewRef view_1 (cellRef SRLC16E (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property INIT (string "0000") (owner "Xilinx")) + ) + (instance blk00000947 + (viewRef view_1 (cellRef FDE (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property INIT (string "0") (owner "Xilinx")) + ) + (instance blk00000948 + (viewRef view_1 (cellRef SRLC16E (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property INIT (string "0000") (owner "Xilinx")) + ) + (instance blk00000949 + (viewRef view_1 (cellRef FDE (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property INIT (string "0") (owner "Xilinx")) + ) + (instance blk0000094a + (viewRef view_1 (cellRef SRLC16E (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property INIT (string "0000") (owner "Xilinx")) + ) + (instance blk0000094b + (viewRef view_1 (cellRef FDE (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property INIT (string "0") (owner "Xilinx")) + ) + (instance blk0000094c + (viewRef view_1 (cellRef SRLC16E (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property INIT (string "0000") (owner "Xilinx")) + ) + (instance blk0000094d + (viewRef view_1 (cellRef FDE (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property 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(owner "Xilinx")) + (property INIT (string "0") (owner "Xilinx")) + ) + (instance blk0000096e + (viewRef view_1 (cellRef SRLC16E (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property INIT (string "0000") (owner "Xilinx")) + ) + (instance blk0000096f + (viewRef view_1 (cellRef FDE (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property INIT (string "0") (owner "Xilinx")) + ) + (instance blk00000970 + (viewRef view_1 (cellRef SRLC16E (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property INIT (string "0000") (owner "Xilinx")) + ) + (instance blk00000971 + (viewRef view_1 (cellRef FDE (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property INIT (string "0") (owner "Xilinx")) + ) + (instance blk00000972 + (viewRef view_1 (cellRef SRLC16E (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property INIT (string "0000") (owner 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(string "0000") (owner "Xilinx")) + ) + (instance blk000009a3 + (viewRef view_1 (cellRef FDE (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property INIT (string "0") (owner "Xilinx")) + ) + (instance blk000009a4 + (viewRef view_1 (cellRef SRLC16E (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property INIT (string "0000") (owner "Xilinx")) + ) + (instance blk000009a5 + (viewRef view_1 (cellRef FDE (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property INIT (string "0") (owner "Xilinx")) + ) + (instance blk000009a6 + (viewRef view_1 (cellRef SRLC16E (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property INIT (string "0000") (owner "Xilinx")) + ) + (instance blk000009a7 + (viewRef view_1 (cellRef FDE (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property INIT (string "0") (owner "Xilinx")) + ) + (instance blk000009a8 + (viewRef view_1 (cellRef SRLC16E (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property INIT (string "0000") (owner "Xilinx")) + ) + (instance blk000009a9 + (viewRef view_1 (cellRef FDE (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property INIT (string "0") (owner "Xilinx")) + ) + (instance blk000009aa + (viewRef view_1 (cellRef SRLC16E (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property INIT (string "0000") (owner "Xilinx")) + ) + (instance blk000009ab + (viewRef view_1 (cellRef FDE (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property INIT (string "0") (owner "Xilinx")) + ) + (instance blk000009ac + (viewRef view_1 (cellRef SRLC16E (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property INIT (string "0000") (owner "Xilinx")) + ) + (instance blk000009ad + (viewRef view_1 (cellRef FDE (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property INIT (string "0") (owner "Xilinx")) + ) + (instance blk000009ae + (viewRef view_1 (cellRef SRLC16E (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property INIT (string "0000") (owner "Xilinx")) + ) + (instance blk000009af + (viewRef view_1 (cellRef FDE (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property INIT (string "0") (owner "Xilinx")) + ) + (instance blk000009b0 + (viewRef view_1 (cellRef SRLC16E (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property INIT (string "0000") (owner "Xilinx")) + ) + (instance blk000009b1 + (viewRef view_1 (cellRef FDE (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property INIT (string "0") (owner "Xilinx")) + ) + (instance blk000009b2 + (viewRef view_1 (cellRef SRLC16E (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property INIT (string "0000") (owner "Xilinx")) + ) + (instance blk000009b3 + (viewRef view_1 (cellRef FDE (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property INIT (string "0") (owner "Xilinx")) + ) + (instance blk000009b4 + (viewRef view_1 (cellRef SRLC16E (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property INIT (string "0000") (owner "Xilinx")) + ) + (instance blk000009b5 + (viewRef view_1 (cellRef FDE (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property INIT (string "0") (owner "Xilinx")) + ) + (instance blk000009b6 + (viewRef view_1 (cellRef SRLC16E (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property INIT (string "0000") (owner "Xilinx")) + ) + (instance blk000009b7 + (viewRef view_1 (cellRef FDE (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property INIT (string "0") (owner "Xilinx")) + ) + (instance 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+ (instance blk000009c8 + (viewRef view_1 (cellRef SRLC16E (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property INIT (string "0000") (owner "Xilinx")) + ) + (instance blk000009c9 + (viewRef view_1 (cellRef FDE (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property INIT (string "0") (owner "Xilinx")) + ) + (instance blk000009ca + (viewRef view_1 (cellRef SRLC16E (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property INIT (string "0000") (owner "Xilinx")) + ) + (instance blk000009cb + (viewRef view_1 (cellRef FDE (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property INIT (string "0") (owner "Xilinx")) + ) + (instance blk000009cc + (viewRef view_1 (cellRef SRLC16E (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property INIT (string "0000") (owner "Xilinx")) + ) + (instance blk000009cd + (viewRef view_1 (cellRef FDE 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"Xilinx")) + (property INIT (string "0") (owner "Xilinx")) + ) + (instance blk00000a08 + (viewRef view_1 (cellRef SRLC16E (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property INIT (string "0000") (owner "Xilinx")) + ) + (instance blk00000a09 + (viewRef view_1 (cellRef FDE (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property INIT (string "0") (owner "Xilinx")) + ) + (instance blk00000a0a + (viewRef view_1 (cellRef SRLC16E (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property INIT (string "0000") (owner "Xilinx")) + ) + (instance blk00000a0b + (viewRef view_1 (cellRef FDE (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property INIT (string "0") (owner "Xilinx")) + ) + (instance blk00000a0c + (viewRef view_1 (cellRef SRLC16E (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property INIT (string "0000") (owner "Xilinx")) + ) + (instance blk00000a0d + (viewRef view_1 (cellRef FDE (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property INIT (string "0") (owner "Xilinx")) + ) + (instance blk00000a0e + (viewRef view_1 (cellRef SRLC16E (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property INIT (string "0000") (owner "Xilinx")) + ) + (instance blk00000a0f + (viewRef view_1 (cellRef FDE (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property INIT (string "0") (owner "Xilinx")) + ) + (instance blk00000a10 + (viewRef view_1 (cellRef SRLC16E (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property INIT (string "0000") (owner "Xilinx")) + ) + (instance blk00000a11 + (viewRef view_1 (cellRef FDE (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property INIT (string "0") (owner "Xilinx")) + ) + (instance blk00000a12 + (viewRef view_1 (cellRef SRLC16E (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property INIT (string "0000") (owner "Xilinx")) + ) + (instance blk00000a13 + (viewRef view_1 (cellRef FDE (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property INIT (string "0") (owner "Xilinx")) + ) + (instance blk00000a14 + (viewRef view_1 (cellRef SRLC16E (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property INIT (string "0000") (owner "Xilinx")) + ) + (instance blk00000a15 + (viewRef view_1 (cellRef FDE (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property INIT (string "0") (owner "Xilinx")) + ) + (instance blk00000a16 + (viewRef view_1 (cellRef SRLC16E (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property INIT (string "0000") (owner "Xilinx")) + ) + (instance blk00000a17 + (viewRef view_1 (cellRef FDE (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property INIT (string "0") (owner "Xilinx")) + ) + (instance blk00000a18 + (viewRef view_1 (cellRef SRLC16E (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property INIT (string "0000") (owner "Xilinx")) + ) + (instance blk00000a19 + (viewRef view_1 (cellRef FDE (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property INIT (string "0") (owner "Xilinx")) + ) + (instance blk00000a1a + (viewRef view_1 (cellRef SRLC16E (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property INIT (string "0000") (owner "Xilinx")) + ) + (instance blk00000a1b + (viewRef view_1 (cellRef FDE (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property INIT (string "0") (owner "Xilinx")) + ) + (instance blk00000a1c + (viewRef view_1 (cellRef SRLC16E (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property INIT (string "0000") (owner "Xilinx")) + ) + (instance blk00000a1d + (viewRef view_1 (cellRef FDE (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property INIT (string "0") (owner "Xilinx")) + ) + (instance blk00000a1e + (viewRef view_1 (cellRef SRLC16E (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property INIT (string "0000") (owner "Xilinx")) + ) + (instance blk00000a1f + (viewRef view_1 (cellRef FDE (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property INIT (string "0") (owner "Xilinx")) + ) + (instance blk00000a20 + (viewRef view_1 (cellRef SRLC16E (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property INIT (string "0000") (owner "Xilinx")) + ) + (instance blk00000a21 + (viewRef view_1 (cellRef FDE (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property INIT (string "0") (owner "Xilinx")) + ) + (instance blk00000a22 + (viewRef view_1 (cellRef SRLC16E (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property INIT (string "0000") (owner "Xilinx")) + ) + (instance blk00000a23 + (viewRef view_1 (cellRef FDE (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property INIT (string "0") (owner "Xilinx")) + ) + (instance blk00000a24 + (viewRef view_1 (cellRef SRLC16E (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property INIT (string "0000") (owner "Xilinx")) + ) + (instance blk00000a25 + (viewRef view_1 (cellRef FDE (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property INIT (string "0") (owner "Xilinx")) + ) + (instance blk00000a26 + (viewRef view_1 (cellRef SRLC16E (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property INIT (string "0000") (owner "Xilinx")) + ) + (instance blk00000a27 + (viewRef view_1 (cellRef FDE (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property INIT (string "0") (owner "Xilinx")) + ) + (instance blk00000a28 + (viewRef view_1 (cellRef SRLC16E (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property INIT (string "0000") (owner "Xilinx")) + ) + (instance blk00000a29 + (viewRef view_1 (cellRef FDE (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property INIT (string "0") (owner "Xilinx")) + ) + (instance blk00000a2a + (viewRef view_1 (cellRef SRLC16E (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property INIT (string "0000") (owner "Xilinx")) + ) + (instance blk00000a2b + (viewRef view_1 (cellRef FDE (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property INIT (string "0") (owner "Xilinx")) + ) + (instance blk00000a2c + (viewRef view_1 (cellRef SRLC16E (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property INIT (string "0000") (owner "Xilinx")) + ) + (instance blk00000a2d + (viewRef view_1 (cellRef FDE (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property INIT (string "0") (owner "Xilinx")) + ) + (instance blk00000a2e + (viewRef view_1 (cellRef SRLC16E (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property INIT (string "0000") (owner "Xilinx")) + ) + (instance blk00000a2f + (viewRef view_1 (cellRef FDE (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property INIT (string "0") (owner "Xilinx")) + ) + (instance blk00000a30 + (viewRef view_1 (cellRef SRLC16E (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property INIT (string "0000") (owner "Xilinx")) + ) + (instance blk00000a31 + (viewRef view_1 (cellRef FDE (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property INIT (string "0") (owner "Xilinx")) + ) + (instance blk00000a32 + (viewRef view_1 (cellRef SRLC16E (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property INIT (string "0000") (owner "Xilinx")) + ) + (instance blk00000a33 + (viewRef view_1 (cellRef FDE (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property INIT (string "0") (owner "Xilinx")) + ) + (instance blk00000a34 + (viewRef view_1 (cellRef SRLC16E (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property INIT (string "0000") (owner "Xilinx")) + ) + (instance blk00000a35 + (viewRef view_1 (cellRef FDE (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property INIT (string "0") (owner "Xilinx")) + ) + (instance blk00000a36 + (viewRef view_1 (cellRef SRLC16E (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property INIT (string "0000") (owner "Xilinx")) + ) + (instance blk00000a37 + (viewRef view_1 (cellRef FDE (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property INIT (string "0") (owner "Xilinx")) + ) + (instance blk00000a38 + (viewRef view_1 (cellRef SRLC16E (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property INIT (string "0000") (owner "Xilinx")) + ) + (instance blk00000a39 + (viewRef view_1 (cellRef FDE (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property INIT (string "0") (owner "Xilinx")) + ) + (instance blk00000a3a + (viewRef view_1 (cellRef SRLC16E (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property INIT (string "0000") (owner "Xilinx")) + ) + (instance blk00000a3b + (viewRef view_1 (cellRef FDE (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property INIT (string "0") (owner "Xilinx")) + ) + (instance blk00000a3c + (viewRef view_1 (cellRef SRLC16E (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property INIT (string "0000") (owner "Xilinx")) + ) + (instance blk00000a3d + (viewRef view_1 (cellRef FDE (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property INIT (string "0") (owner "Xilinx")) + ) + (instance blk00000a3e + (viewRef view_1 (cellRef SRLC16E (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property INIT (string "0000") (owner "Xilinx")) + ) + (instance blk00000a3f + (viewRef view_1 (cellRef FDE (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property INIT (string "0") (owner "Xilinx")) + ) + (instance blk00000a40 + (viewRef view_1 (cellRef SRLC16E (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property INIT (string "0000") (owner "Xilinx")) + ) + (instance blk00000a41 + (viewRef view_1 (cellRef FDE (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property INIT (string "0") (owner "Xilinx")) + ) + (instance blk00000a42 + (viewRef view_1 (cellRef SRLC16E (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property INIT (string "0000") (owner "Xilinx")) + ) + (instance blk00000a43 + (viewRef view_1 (cellRef FDE (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property INIT (string "0") (owner "Xilinx")) + ) + (instance blk00000a44 + (viewRef view_1 (cellRef SRLC16E (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property INIT (string "0000") (owner "Xilinx")) + ) + (instance blk00000a45 + (viewRef view_1 (cellRef FDE (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property INIT (string "0") (owner "Xilinx")) + ) + (instance blk00000a46 + (viewRef view_1 (cellRef SRLC16E (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property INIT (string "0000") (owner "Xilinx")) + ) + (instance blk00000a47 + (viewRef view_1 (cellRef FDE (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property INIT (string "0") (owner "Xilinx")) + ) + (instance blk00000a48 + (viewRef view_1 (cellRef SRLC16E (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property INIT (string "0000") (owner "Xilinx")) + ) + (instance blk00000a49 + (viewRef view_1 (cellRef FDE (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property INIT (string "0") (owner "Xilinx")) + ) + (instance blk00000a4a + (viewRef view_1 (cellRef SRLC16E (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property INIT (string "0000") (owner "Xilinx")) + ) + (instance blk00000a4b + (viewRef view_1 (cellRef FDE (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property INIT (string "0") (owner "Xilinx")) + ) + (instance blk00000a4c + (viewRef view_1 (cellRef SRLC16E (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property INIT (string "0000") (owner "Xilinx")) + ) + (instance blk00000a4d + (viewRef view_1 (cellRef FDE (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property INIT (string "0") (owner "Xilinx")) + ) + (instance blk00000a4e + (viewRef view_1 (cellRef SRLC16E (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property INIT (string "0000") (owner "Xilinx")) + ) + (instance blk00000a4f + (viewRef view_1 (cellRef FDE (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property INIT (string "0") (owner "Xilinx")) + ) + (instance blk00000a50 + (viewRef view_1 (cellRef SRLC16E (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property INIT (string "0000") (owner "Xilinx")) + ) + (instance blk00000a51 + (viewRef view_1 (cellRef FDE (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property INIT (string "0") (owner "Xilinx")) + ) + (instance blk00000a52 + (viewRef view_1 (cellRef SRLC16E (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property INIT (string "0000") (owner "Xilinx")) + ) + (instance blk00000a53 + (viewRef view_1 (cellRef FDE (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property INIT (string "0") (owner "Xilinx")) + ) + (instance blk00000a54 + (viewRef view_1 (cellRef SRLC16E (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property INIT (string "0000") (owner "Xilinx")) + ) + (instance blk00000a55 + (viewRef view_1 (cellRef FDE (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property INIT (string "0") (owner "Xilinx")) + ) + (instance blk00000a56 + (viewRef view_1 (cellRef SRLC16E (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property INIT (string "0000") (owner "Xilinx")) + ) + (instance blk00000a57 + (viewRef view_1 (cellRef FDE (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property INIT (string "0") (owner "Xilinx")) + ) + (instance blk00000a58 + (viewRef view_1 (cellRef SRLC16E (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property INIT (string "0000") (owner "Xilinx")) + ) + (instance blk00000a59 + (viewRef view_1 (cellRef FDE (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property INIT (string "0") (owner "Xilinx")) + ) + (instance blk00000a5a + (viewRef view_1 (cellRef SRLC16E (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property INIT (string "0000") (owner "Xilinx")) + ) + (instance blk00000a5b + (viewRef view_1 (cellRef FDE (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property INIT (string "0") (owner "Xilinx")) + ) + (instance blk00000a5c + (viewRef view_1 (cellRef SRLC16E (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property INIT (string "0000") (owner "Xilinx")) + ) + (instance blk00000a5d + (viewRef view_1 (cellRef FDE (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property INIT (string "0") (owner "Xilinx")) + ) + (instance blk00000a5e + (viewRef view_1 (cellRef SRLC16E (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property INIT (string "0000") (owner "Xilinx")) + ) + (instance blk00000a5f + (viewRef view_1 (cellRef FDE (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property INIT (string "0") (owner "Xilinx")) + ) + (instance blk00000a60 + (viewRef view_1 (cellRef SRLC16E (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property INIT (string "0000") (owner "Xilinx")) + ) + (instance blk00000a61 + (viewRef view_1 (cellRef FDE (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property INIT (string "0") (owner "Xilinx")) + ) + (instance blk00000a62 + (viewRef view_1 (cellRef SRLC16E (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property INIT (string "0000") (owner "Xilinx")) + ) + (instance blk00000a63 + (viewRef view_1 (cellRef FDE (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property INIT (string "0") (owner "Xilinx")) + ) + (instance blk00000a64 + (viewRef view_1 (cellRef SRLC16E (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property INIT (string "0000") (owner "Xilinx")) + ) + (instance blk00000a65 + (viewRef view_1 (cellRef FDE (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property INIT (string "0") (owner "Xilinx")) + ) + (instance blk00000a66 + (viewRef view_1 (cellRef SRLC16E (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property INIT (string "0000") (owner "Xilinx")) + ) + (instance blk00000a67 + (viewRef view_1 (cellRef FDE (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property INIT (string "0") (owner "Xilinx")) + ) + (instance blk00000a68 + (viewRef view_1 (cellRef SRLC16E (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property INIT (string "0000") (owner "Xilinx")) + ) + (instance blk00000a69 + (viewRef view_1 (cellRef FDE (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property INIT (string "0") (owner "Xilinx")) + ) + (instance blk00000a6a + (viewRef view_1 (cellRef SRLC16E (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property INIT (string "0000") (owner "Xilinx")) + ) + (instance blk00000a6b + (viewRef view_1 (cellRef FDE (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property INIT (string "0") (owner "Xilinx")) + ) + (instance blk00000a6c + (viewRef view_1 (cellRef SRLC16E (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property INIT (string "0000") (owner "Xilinx")) + ) + (instance blk00000a6d + (viewRef view_1 (cellRef FDE (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property INIT (string "0") (owner "Xilinx")) + ) + (instance blk00000a6e + (viewRef view_1 (cellRef SRLC16E (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property INIT (string "0000") (owner "Xilinx")) + ) + (instance blk00000a6f + (viewRef view_1 (cellRef FDE (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property INIT (string "0") (owner "Xilinx")) + ) + (instance blk00000a70 + (viewRef view_1 (cellRef SRLC16E (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property INIT (string "0000") (owner "Xilinx")) + ) + (instance blk00000a71 + (viewRef view_1 (cellRef FDE (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property INIT (string "0") (owner "Xilinx")) + ) + (instance blk00000a72 + (viewRef view_1 (cellRef SRLC16E (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property INIT (string "0000") (owner "Xilinx")) + ) + (instance blk00000a73 + (viewRef view_1 (cellRef FDE (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property INIT (string "0") (owner "Xilinx")) + ) + (instance blk00000a74 + (viewRef view_1 (cellRef SRLC16E (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property INIT (string "0000") (owner "Xilinx")) + ) + (instance blk00000a75 + (viewRef view_1 (cellRef FDE (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property INIT (string "0") (owner "Xilinx")) + ) + (instance blk00000a76 + (viewRef view_1 (cellRef SRLC16E (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property INIT (string "0000") (owner "Xilinx")) + ) + (instance blk00000a77 + (viewRef view_1 (cellRef FDE (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property INIT (string "0") (owner "Xilinx")) + ) + (instance blk00000a78 + (viewRef view_1 (cellRef SRLC16E (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property INIT (string "0000") (owner "Xilinx")) + ) + (instance blk00000a79 + (viewRef view_1 (cellRef FDE (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property INIT (string "0") (owner "Xilinx")) + ) + (instance blk00000a7a + (viewRef view_1 (cellRef SRLC16E (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property INIT (string "0000") (owner "Xilinx")) + ) + (instance blk00000a7b + (viewRef view_1 (cellRef FDE (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property INIT (string "0") (owner "Xilinx")) + ) + (instance blk00000a7c + (viewRef view_1 (cellRef SRLC16E (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property INIT (string "0000") (owner "Xilinx")) + ) + (instance blk00000a7d + (viewRef view_1 (cellRef FDE (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property INIT (string "0") (owner "Xilinx")) + ) + (instance blk00000a7e + (viewRef view_1 (cellRef SRLC16E (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property INIT (string "0000") (owner "Xilinx")) + ) + (instance blk00000a7f + (viewRef view_1 (cellRef FDE (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property INIT (string "0") (owner "Xilinx")) + ) + (instance blk00000a80 + (viewRef view_1 (cellRef SRLC16E (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property INIT (string "0000") (owner "Xilinx")) + ) + (instance blk00000a81 + (viewRef view_1 (cellRef FDE (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property INIT (string "0") (owner "Xilinx")) + ) + (instance blk00000a82 + (viewRef view_1 (cellRef SRLC16E (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property INIT (string "0000") (owner "Xilinx")) + ) + (instance blk00000a83 + (viewRef view_1 (cellRef FDE (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property INIT (string "0") (owner "Xilinx")) + ) + (instance blk00000a84 + (viewRef view_1 (cellRef SRLC16E (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property INIT (string "0000") (owner "Xilinx")) + ) + (instance blk00000a85 + (viewRef view_1 (cellRef FDE (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property INIT (string "0") (owner "Xilinx")) + ) + (instance blk00000a86 + (viewRef view_1 (cellRef SRLC16E (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property INIT (string "0000") (owner "Xilinx")) + ) + (instance blk00000a87 + (viewRef view_1 (cellRef FDE (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property INIT (string "0") (owner "Xilinx")) + ) + (instance blk00000a88 + (viewRef view_1 (cellRef SRLC16E (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property INIT (string "0000") (owner "Xilinx")) + ) + (instance blk00000a89 + (viewRef view_1 (cellRef FDE (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property INIT (string "0") (owner "Xilinx")) + ) + (instance blk00000a8a + (viewRef view_1 (cellRef SRLC16E (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property INIT (string "0000") (owner "Xilinx")) + ) + (instance blk00000a8b + (viewRef view_1 (cellRef FDE (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property INIT (string "0") (owner "Xilinx")) + ) + (instance blk00000a8c + (viewRef view_1 (cellRef SRLC16E (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property INIT (string "0000") (owner "Xilinx")) + ) + (instance blk00000a8d + (viewRef view_1 (cellRef FDE (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property INIT (string "0") (owner "Xilinx")) + ) + (instance blk00000a8e + (viewRef view_1 (cellRef SRLC16E (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property INIT (string "0000") (owner "Xilinx")) + ) + (instance blk00000a8f + (viewRef view_1 (cellRef FDE (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property INIT (string "0") (owner "Xilinx")) + ) + (instance blk00000a90 + (viewRef view_1 (cellRef SRLC16E (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property INIT (string "0000") (owner "Xilinx")) + ) + (instance blk00000a91 + (viewRef view_1 (cellRef FDE (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property INIT (string "0") (owner "Xilinx")) + ) + (instance blk00000a92 + (viewRef view_1 (cellRef SRLC16E (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property INIT (string "0000") (owner "Xilinx")) + ) + (instance blk00000a93 + (viewRef view_1 (cellRef FDE (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property INIT (string "0") (owner "Xilinx")) + ) + (instance blk00000a94 + (viewRef view_1 (cellRef SRLC16E (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property INIT (string "0000") (owner "Xilinx")) + ) + (instance blk00000a95 + (viewRef view_1 (cellRef FDE (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property INIT (string "0") (owner "Xilinx")) + ) + (instance blk00000a96 + (viewRef view_1 (cellRef SRLC16E (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property INIT (string "0000") (owner "Xilinx")) + ) + (instance blk00000a97 + (viewRef view_1 (cellRef FDE (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property INIT (string "0") (owner "Xilinx")) + ) + (instance blk00000a98 + (viewRef view_1 (cellRef SRLC16E (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property INIT (string "0000") (owner "Xilinx")) + ) + (instance blk00000a99 + (viewRef view_1 (cellRef FDE (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property INIT (string "0") (owner "Xilinx")) + ) + (instance blk00000a9a + (viewRef view_1 (cellRef SRLC16E (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property INIT (string "0000") (owner "Xilinx")) + ) + (instance blk00000a9b + (viewRef view_1 (cellRef FDE (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property INIT (string "0") (owner "Xilinx")) + ) + (instance blk00000a9c + (viewRef view_1 (cellRef SRLC16E (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property INIT (string "0000") (owner "Xilinx")) + ) + (instance blk00000a9d + (viewRef view_1 (cellRef FDE (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property INIT (string "0") (owner "Xilinx")) + ) + (instance blk00000a9e + (viewRef view_1 (cellRef SRLC16E (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property INIT (string "0000") (owner "Xilinx")) + ) + (instance blk00000a9f + (viewRef view_1 (cellRef FDE (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property INIT (string "0") (owner "Xilinx")) + ) + (instance blk00000aa0 + (viewRef view_1 (cellRef SRLC16E (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property INIT (string "0000") (owner "Xilinx")) + ) + (instance blk00000aa1 + (viewRef view_1 (cellRef FDE (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property INIT (string "0") (owner "Xilinx")) + ) + (instance blk00000aa2 + (viewRef view_1 (cellRef SRLC16E (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property INIT (string "0000") (owner "Xilinx")) + ) + (instance blk00000aa3 + (viewRef view_1 (cellRef FDE (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property INIT (string "0") (owner "Xilinx")) + ) + (instance blk00000aa4 + (viewRef view_1 (cellRef SRLC16E (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property INIT (string "0000") (owner "Xilinx")) + ) + (instance blk00000aa5 + (viewRef view_1 (cellRef FDE (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property INIT (string "0") (owner "Xilinx")) + ) + (instance blk00000aa6 + (viewRef view_1 (cellRef SRLC16E (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property INIT (string "0000") (owner "Xilinx")) + ) + (instance blk00000aa7 + (viewRef view_1 (cellRef FDE (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property INIT (string "0") (owner "Xilinx")) + ) + (instance blk00000aa8 + (viewRef view_1 (cellRef SRLC16E (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property INIT (string "0000") (owner "Xilinx")) + ) + (instance blk00000aa9 + (viewRef view_1 (cellRef FDE (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property INIT (string "0") (owner "Xilinx")) + ) + (instance blk00000aaa + (viewRef view_1 (cellRef SRLC16E (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property INIT (string "0000") (owner "Xilinx")) + ) + (instance blk00000aab + (viewRef view_1 (cellRef FDE (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property INIT (string "0") (owner "Xilinx")) + ) + (instance blk00000aac + (viewRef view_1 (cellRef SRLC16E (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property INIT (string "0000") (owner "Xilinx")) + ) + (instance blk00000aad + (viewRef view_1 (cellRef FDE (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property INIT (string "0") (owner "Xilinx")) + ) + (instance blk00000aae + (viewRef view_1 (cellRef SRLC16E (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property INIT (string "0000") (owner "Xilinx")) + ) + (instance blk00000aaf + (viewRef view_1 (cellRef FDE (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property INIT (string "0") (owner "Xilinx")) + ) + (instance blk00000ab0 + (viewRef view_1 (cellRef SRLC16E (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property INIT (string "0000") (owner "Xilinx")) + ) + (instance blk00000ab1 + (viewRef view_1 (cellRef FDE (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property INIT (string "0") (owner "Xilinx")) + ) + (instance blk00000ab2 + (viewRef view_1 (cellRef SRLC16E (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property INIT (string "0000") (owner "Xilinx")) + ) + (instance blk00000ab3 + (viewRef view_1 (cellRef FDE (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property INIT (string "0") (owner "Xilinx")) + ) + (instance blk00000ab4 + (viewRef view_1 (cellRef SRLC16E (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property INIT (string "0000") (owner "Xilinx")) + ) + (instance blk00000ab5 + (viewRef view_1 (cellRef FDE (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property INIT (string "0") (owner "Xilinx")) + ) + (instance blk00000ab6 + (viewRef view_1 (cellRef SRLC16E (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property INIT (string "0000") (owner "Xilinx")) + ) + (instance blk00000ab7 + (viewRef view_1 (cellRef FDE (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property INIT (string "0") (owner "Xilinx")) + ) + (instance blk00000ab8 + (viewRef view_1 (cellRef SRLC16E (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property INIT (string "0000") (owner "Xilinx")) + ) + (instance blk00000ab9 + (viewRef view_1 (cellRef FDE (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property INIT (string "0") (owner "Xilinx")) + ) + (instance blk00000aba + (viewRef view_1 (cellRef SRLC16E (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property INIT (string "0000") (owner "Xilinx")) + ) + (instance blk00000abb + (viewRef view_1 (cellRef FDE (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property INIT (string "0") (owner "Xilinx")) + ) + (instance blk00000abc + (viewRef view_1 (cellRef SRLC16E (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property INIT (string "0000") (owner "Xilinx")) + ) + (instance blk00000abd + (viewRef view_1 (cellRef FDE (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property INIT (string "0") (owner "Xilinx")) + ) + (instance blk00000abe + (viewRef view_1 (cellRef SRLC16E (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property INIT (string "0000") (owner "Xilinx")) + ) + (instance blk00000abf + (viewRef view_1 (cellRef FDE (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property INIT (string "0") (owner "Xilinx")) + ) + (instance blk00000ac0 + (viewRef view_1 (cellRef SRLC16E (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property INIT (string "0000") (owner "Xilinx")) + ) + (instance blk00000ac1 + (viewRef view_1 (cellRef FDE (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property INIT (string "0") (owner "Xilinx")) + ) + (instance blk00000ac2 + (viewRef view_1 (cellRef SRLC16E (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property INIT (string "0000") (owner "Xilinx")) + ) + (instance blk00000ac3 + (viewRef view_1 (cellRef FDE (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property INIT (string "0") (owner "Xilinx")) + ) + (instance blk00000ac4 + (viewRef view_1 (cellRef SRLC16E (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property INIT (string "0000") (owner "Xilinx")) + ) + (instance blk00000ac5 + (viewRef view_1 (cellRef FDE (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property INIT (string "0") (owner "Xilinx")) + ) + (instance blk00000ac6 + (viewRef view_1 (cellRef SRLC16E (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property INIT (string "0000") (owner "Xilinx")) + ) + (instance blk00000ac7 + (viewRef view_1 (cellRef FDE (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property INIT (string "0") (owner "Xilinx")) + ) + (instance blk00000ac8 + (viewRef view_1 (cellRef SRLC16E (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property INIT (string "0000") (owner "Xilinx")) + ) + (instance blk00000ac9 + (viewRef view_1 (cellRef FDE (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property INIT (string "0") (owner "Xilinx")) + ) + (instance blk00000aca + (viewRef view_1 (cellRef SRLC16E (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property INIT (string "0000") (owner "Xilinx")) + ) + (instance blk00000acb + (viewRef view_1 (cellRef FDE (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property INIT (string "0") (owner "Xilinx")) + ) + (instance blk00000acc + (viewRef view_1 (cellRef SRLC16E (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property INIT (string "0000") (owner "Xilinx")) + ) + (instance blk00000acd + (viewRef view_1 (cellRef FDE (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property INIT (string "0") (owner "Xilinx")) + ) + (instance blk00000ace + (viewRef view_1 (cellRef SRLC16E (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property INIT (string "0000") (owner "Xilinx")) + ) + (instance blk00000acf + (viewRef view_1 (cellRef FDE (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property INIT (string "0") (owner "Xilinx")) + ) + (instance blk00000ad0 + (viewRef view_1 (cellRef SRLC16E (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property INIT (string "0000") (owner "Xilinx")) + ) + (instance blk00000ad1 + (viewRef view_1 (cellRef FDE (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property INIT (string "0") (owner "Xilinx")) + ) + (instance blk00000ad2 + (viewRef view_1 (cellRef SRLC16E (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property INIT (string "0000") (owner "Xilinx")) + ) + (instance blk00000ad3 + (viewRef view_1 (cellRef FDE (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property INIT (string "0") (owner "Xilinx")) + ) + (instance blk00000ad4 + (viewRef view_1 (cellRef SRLC16E (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property INIT (string "0000") (owner "Xilinx")) + ) + (instance blk00000ad5 + (viewRef view_1 (cellRef FDE (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property INIT (string "0") (owner "Xilinx")) + ) + (instance blk00000ad6 + (viewRef view_1 (cellRef SRLC16E (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property INIT (string "0000") (owner "Xilinx")) + ) + (instance blk00000ad7 + (viewRef view_1 (cellRef FDE (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property INIT (string "0") (owner "Xilinx")) + ) + (instance blk00000ad8 + (viewRef view_1 (cellRef SRLC16E (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property INIT (string "0000") (owner "Xilinx")) + ) + (instance blk00000ad9 + (viewRef view_1 (cellRef FDE (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property INIT (string "0") (owner "Xilinx")) + ) + (instance blk00000ada + (viewRef view_1 (cellRef SRLC16E (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property INIT (string "0000") (owner "Xilinx")) + ) + (instance blk00000adb + (viewRef view_1 (cellRef FDE (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property INIT (string "0") (owner "Xilinx")) + ) + (instance blk00000adc + (viewRef view_1 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(boolean (true)) (owner "Xilinx")) + (property INIT (string "0") (owner "Xilinx")) + ) + (instance blk00000ae2 + (viewRef view_1 (cellRef SRLC16E (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property INIT (string "0000") (owner "Xilinx")) + ) + (instance blk00000ae3 + (viewRef view_1 (cellRef FDE (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property INIT (string "0") (owner "Xilinx")) + ) + (instance blk00000ae4 + (viewRef view_1 (cellRef SRLC16E (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property INIT (string "0000") (owner "Xilinx")) + ) + (instance blk00000ae5 + (viewRef view_1 (cellRef FDE (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property INIT (string "0") (owner "Xilinx")) + ) + (instance blk00000ae6 + (viewRef view_1 (cellRef SRLC16E (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property INIT (string "0000") (owner "Xilinx")) + ) + (instance blk00000ae7 + (viewRef view_1 (cellRef FDE (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property INIT (string "0") (owner "Xilinx")) + ) + (instance blk00000ae8 + (viewRef view_1 (cellRef SRLC16E (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property INIT (string "0000") (owner "Xilinx")) + ) + (instance blk00000ae9 + (viewRef view_1 (cellRef FDE (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property INIT (string "0") (owner "Xilinx")) + ) + (instance blk00000aea + (viewRef view_1 (cellRef SRLC16E (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property INIT (string "0000") (owner "Xilinx")) + ) + (instance blk00000aeb + (viewRef view_1 (cellRef FDE (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property INIT (string "0") (owner "Xilinx")) + ) + (instance blk00000aec + (viewRef view_1 (cellRef SRLC16E (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property INIT (string "0000") (owner "Xilinx")) + ) + (instance blk00000aed + (viewRef view_1 (cellRef FDE (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property INIT (string "0") (owner "Xilinx")) + ) + (instance blk00000aee + (viewRef view_1 (cellRef SRLC16E (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property INIT (string "0000") (owner "Xilinx")) + ) + (instance blk00000aef + (viewRef view_1 (cellRef FDE (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property INIT (string "0") (owner "Xilinx")) + ) + (instance blk00000af0 + (viewRef view_1 (cellRef SRLC16E (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property INIT (string "0000") (owner "Xilinx")) + ) + (instance blk00000af1 + (viewRef view_1 (cellRef FDE (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property INIT (string "0") (owner "Xilinx")) + ) + (instance blk00000af2 + (viewRef view_1 (cellRef SRLC16E (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property INIT (string "0000") (owner "Xilinx")) + ) + (instance blk00000af3 + (viewRef view_1 (cellRef FDE (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property INIT (string "0") (owner "Xilinx")) + ) + (instance blk00000af4 + (viewRef view_1 (cellRef SRLC16E (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property INIT (string "0000") (owner "Xilinx")) + ) + (instance blk00000af5 + (viewRef view_1 (cellRef FDE (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property INIT (string "0") (owner "Xilinx")) + ) + (instance blk00000af6 + (viewRef view_1 (cellRef SRLC16E (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property INIT (string "0000") (owner "Xilinx")) + ) + (instance blk00000af7 + (viewRef view_1 (cellRef FDE (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property INIT (string "0") (owner "Xilinx")) + ) + (instance blk00000af8 + (viewRef view_1 (cellRef SRLC16E (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property INIT (string "0000") (owner "Xilinx")) + ) + (instance blk00000af9 + (viewRef view_1 (cellRef FDE (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property INIT (string "0") (owner "Xilinx")) + ) + (instance blk00000afa + (viewRef view_1 (cellRef SRLC16E (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property INIT (string "0000") (owner "Xilinx")) + ) + (instance blk00000afb + (viewRef view_1 (cellRef FDE (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property INIT (string "0") (owner "Xilinx")) + ) + (instance blk00000afc + (viewRef view_1 (cellRef SRLC16E (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property INIT (string "0000") (owner "Xilinx")) + ) + (instance blk00000afd + (viewRef view_1 (cellRef FDE (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property INIT (string "0") (owner "Xilinx")) + ) + (instance blk00000afe + (viewRef view_1 (cellRef SRLC16E (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property INIT (string "0000") (owner "Xilinx")) + ) + (instance blk00000aff + (viewRef view_1 (cellRef FDE (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property INIT (string "0") (owner "Xilinx")) + ) + (instance blk00000b00 + (viewRef view_1 (cellRef SRLC16E (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property INIT (string "0000") (owner "Xilinx")) + ) + (instance blk00000b01 + (viewRef view_1 (cellRef FDE (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property INIT (string "0") (owner "Xilinx")) + ) + (instance blk00000b02 + (viewRef view_1 (cellRef SRLC16E (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property INIT (string "0000") (owner "Xilinx")) + ) + (instance blk00000b03 + (viewRef view_1 (cellRef FDE (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property INIT (string "0") (owner "Xilinx")) + ) + (instance blk00000b04 + (viewRef view_1 (cellRef SRLC16E (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property INIT (string "0000") (owner "Xilinx")) + ) + (instance blk00000b05 + (viewRef view_1 (cellRef FDE (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property INIT (string "0") (owner "Xilinx")) + ) + (instance blk00000b06 + (viewRef view_1 (cellRef SRLC16E (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property INIT (string "0000") (owner "Xilinx")) + ) + (instance blk00000b07 + (viewRef view_1 (cellRef FDE (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property INIT (string "0") (owner "Xilinx")) + ) + (instance blk00000b08 + (viewRef view_1 (cellRef SRLC16E (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property INIT (string "0000") (owner "Xilinx")) + ) + (instance blk00000b09 + (viewRef view_1 (cellRef FDE (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property INIT (string "0") (owner "Xilinx")) + ) + (instance blk00000b0a + (viewRef view_1 (cellRef SRLC16E (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property INIT (string "0000") (owner "Xilinx")) + ) + (instance blk00000b0b + (viewRef view_1 (cellRef FDE (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property INIT (string "0") (owner "Xilinx")) + ) + (instance blk00000b0c + (viewRef view_1 (cellRef SRLC16E (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property INIT (string "0000") (owner "Xilinx")) + ) + (instance blk00000b0d + (viewRef view_1 (cellRef FDE (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property INIT (string "0") (owner "Xilinx")) + ) + (instance blk00000b0e + (viewRef view_1 (cellRef SRLC16E (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property INIT (string "0000") (owner "Xilinx")) + ) + (instance blk00000b0f + (viewRef view_1 (cellRef FDE (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property INIT (string "0") (owner "Xilinx")) + ) + (instance blk00000b10 + (viewRef view_1 (cellRef SRLC16E (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property INIT (string "0000") (owner "Xilinx")) + ) + (instance blk00000b11 + (viewRef view_1 (cellRef FDE (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property INIT (string "0") (owner "Xilinx")) + ) + (instance blk00000b12 + (viewRef view_1 (cellRef SRLC16E (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property INIT (string "0000") (owner "Xilinx")) + ) + (instance blk00000b13 + (viewRef view_1 (cellRef FDE (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property INIT (string "0") (owner "Xilinx")) + ) + (instance blk00000b14 + (viewRef view_1 (cellRef SRLC16E (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property INIT (string "0000") (owner "Xilinx")) + ) + (instance blk00000b15 + (viewRef view_1 (cellRef FDE (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property INIT (string "0") (owner "Xilinx")) + ) + (instance blk00000b16 + (viewRef view_1 (cellRef SRLC16E (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property INIT (string "0000") (owner "Xilinx")) + ) + (instance blk00000b17 + (viewRef view_1 (cellRef FDE (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property INIT (string "0") (owner "Xilinx")) + ) + (instance blk00000b18 + (viewRef view_1 (cellRef SRLC16E (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property INIT (string "0000") (owner "Xilinx")) + ) + (instance blk00000b19 + (viewRef view_1 (cellRef FDE (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property INIT (string "0") (owner "Xilinx")) + ) + (instance blk00000b1a + (viewRef view_1 (cellRef SRLC16E (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property INIT (string "0000") (owner "Xilinx")) + ) + (instance blk00000b1b + (viewRef view_1 (cellRef FDE (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property INIT (string "0") (owner "Xilinx")) + ) + (instance blk00000b1c + (viewRef view_1 (cellRef SRLC16E (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property INIT (string "0000") (owner "Xilinx")) + ) + (instance blk00000b1d + (viewRef view_1 (cellRef FDE (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property INIT (string "0") (owner "Xilinx")) + ) + (instance blk00000b1e + (viewRef view_1 (cellRef SRLC16E (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property INIT (string "0000") (owner "Xilinx")) + ) + (instance blk00000b1f + (viewRef view_1 (cellRef FDE (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property INIT (string "0") (owner "Xilinx")) + ) + (instance blk00000b20 + (viewRef view_1 (cellRef SRLC16E (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property INIT (string "0000") (owner "Xilinx")) + ) + (instance blk00000b21 + (viewRef view_1 (cellRef FDE (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property INIT (string "0") (owner "Xilinx")) + ) + (instance blk00000b22 + (viewRef view_1 (cellRef SRLC16E (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property INIT (string "0000") (owner "Xilinx")) + ) + (instance blk00000b23 + (viewRef view_1 (cellRef FDE (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property INIT (string "0") (owner "Xilinx")) + ) + (instance blk00000b24 + (viewRef view_1 (cellRef SRLC16E (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property INIT (string "0000") (owner "Xilinx")) + ) + (instance blk00000b25 + (viewRef view_1 (cellRef FDE (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property INIT (string "0") (owner "Xilinx")) + ) + (instance blk00000b26 + (viewRef view_1 (cellRef SRLC16E (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property INIT (string "0000") (owner "Xilinx")) + ) + (instance blk00000b27 + (viewRef view_1 (cellRef FDE (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property INIT (string "0") (owner "Xilinx")) + ) + (instance blk00000b28 + (viewRef view_1 (cellRef SRLC16E (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property INIT (string "0000") (owner "Xilinx")) + ) + (instance blk00000b29 + (viewRef view_1 (cellRef FDE (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property INIT (string "0") (owner "Xilinx")) + ) + (instance blk00000b2a + (viewRef view_1 (cellRef SRLC16E (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property INIT (string "0000") (owner "Xilinx")) + ) + (instance blk00000b2b + (viewRef view_1 (cellRef FDE (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property INIT (string "0") (owner "Xilinx")) + ) + (instance blk00000b2c + (viewRef view_1 (cellRef SRLC16E (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property INIT (string "0000") (owner "Xilinx")) + ) + (instance blk00000b2d + (viewRef view_1 (cellRef FDE (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property INIT (string "0") (owner "Xilinx")) + ) + (instance blk00000b2e + (viewRef view_1 (cellRef SRLC16E (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property INIT (string "0000") (owner "Xilinx")) + ) + (instance blk00000b2f + (viewRef view_1 (cellRef FDE (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property INIT (string "0") (owner "Xilinx")) + ) + (instance blk00000b30 + (viewRef view_1 (cellRef SRLC16E (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property INIT (string "0000") (owner "Xilinx")) + ) + (instance blk00000b31 + (viewRef view_1 (cellRef FDE (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property INIT (string "0") (owner "Xilinx")) + ) + (instance blk00000b32 + (viewRef view_1 (cellRef SRLC16E (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property INIT (string "0000") (owner "Xilinx")) + ) + (instance blk00000b33 + (viewRef view_1 (cellRef FDE (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property INIT (string "0") (owner "Xilinx")) + ) + (instance blk00000b34 + (viewRef view_1 (cellRef SRLC16E (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property INIT (string "0000") (owner "Xilinx")) + ) + (instance blk00000b35 + (viewRef view_1 (cellRef FDE (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property INIT (string "0") (owner "Xilinx")) + ) + (instance blk00000b36 + (viewRef view_1 (cellRef SRLC16E (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property INIT (string "0000") (owner "Xilinx")) + ) + (instance blk00000b37 + (viewRef view_1 (cellRef FDE (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property INIT (string "0") (owner "Xilinx")) + ) + (instance blk00000b38 + (viewRef view_1 (cellRef SRLC16E (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property INIT (string "0000") (owner "Xilinx")) + ) + (instance blk00000b39 + (viewRef view_1 (cellRef FDE (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property INIT (string "0") (owner "Xilinx")) + ) + (instance blk00000b3a + (viewRef view_1 (cellRef SRLC16E (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property INIT (string "0000") (owner "Xilinx")) + ) + (instance blk00000b3b + (viewRef view_1 (cellRef FDE (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property INIT (string "0") (owner "Xilinx")) + ) + (instance blk00000b3c + (viewRef view_1 (cellRef SRLC16E (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property INIT (string "0000") (owner "Xilinx")) + ) + (instance blk00000b3d + (viewRef view_1 (cellRef FDE (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property INIT (string "0") (owner "Xilinx")) + ) + (instance blk00000b3e + (viewRef view_1 (cellRef SRLC16E (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property INIT (string "0000") (owner "Xilinx")) + ) + (instance blk00000b3f + (viewRef view_1 (cellRef FDE (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property INIT (string "0") (owner "Xilinx")) + ) + (instance blk00000b40 + (viewRef view_1 (cellRef SRLC16E (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property INIT (string "0000") (owner "Xilinx")) + ) + (instance blk00000b41 + (viewRef view_1 (cellRef FDE (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property INIT (string "0") (owner "Xilinx")) + ) + (instance blk00000b42 + (viewRef view_1 (cellRef SRLC16E (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property INIT (string "0000") (owner "Xilinx")) + ) + (instance blk00000b43 + (viewRef view_1 (cellRef FDE (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property INIT (string "0") (owner "Xilinx")) + ) + (instance blk00000b44 + (viewRef view_1 (cellRef SRLC16E (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property INIT (string "0000") (owner "Xilinx")) + ) + (instance blk00000b45 + (viewRef view_1 (cellRef FDE (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property INIT (string "0") (owner "Xilinx")) + ) + (instance blk00000b46 + (viewRef view_1 (cellRef SRLC16E (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property INIT (string "0000") (owner "Xilinx")) + ) + (instance blk00000b47 + (viewRef view_1 (cellRef FDE (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property INIT (string "0") (owner "Xilinx")) + ) + (instance blk00000b48 + (viewRef view_1 (cellRef SRLC16E (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property INIT (string "0000") (owner "Xilinx")) + ) + (instance blk00000b49 + (viewRef view_1 (cellRef FDE (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property INIT (string "0") (owner "Xilinx")) + ) + (instance blk00000b4a + (viewRef view_1 (cellRef SRLC16E (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property INIT (string "0000") (owner "Xilinx")) + ) + (instance blk00000b4b + (viewRef view_1 (cellRef FDE (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property INIT (string "0") (owner "Xilinx")) + ) + (instance blk00000b4c + (viewRef view_1 (cellRef SRLC16E (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property INIT (string "0000") (owner "Xilinx")) + ) + (instance blk00000b4d + (viewRef view_1 (cellRef FDE (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property INIT (string "0") (owner "Xilinx")) + ) + (instance blk00000b4e + (viewRef view_1 (cellRef SRLC16E (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property INIT (string "0000") (owner "Xilinx")) + ) + (instance blk00000b4f + (viewRef view_1 (cellRef FDE (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property INIT (string "0") (owner "Xilinx")) + ) + (instance blk00000b50 + (viewRef view_1 (cellRef SRLC16E (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property INIT (string "0000") (owner "Xilinx")) + ) + (instance blk00000b51 + (viewRef view_1 (cellRef FDE (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property INIT (string "0") (owner "Xilinx")) + ) + (instance blk00000b52 + (viewRef view_1 (cellRef SRLC16E (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property INIT (string "0000") (owner "Xilinx")) + ) + (instance blk00000b53 + (viewRef view_1 (cellRef FDE (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property INIT (string "0") (owner "Xilinx")) + ) + (instance blk00000b54 + (viewRef view_1 (cellRef SRLC16E (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property INIT (string "0000") (owner "Xilinx")) + ) + (instance blk00000b55 + (viewRef view_1 (cellRef FDE (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property INIT (string "0") (owner "Xilinx")) + ) + (instance blk00000b56 + (viewRef view_1 (cellRef SRLC16E (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property INIT (string "0000") (owner "Xilinx")) + ) + (instance blk00000b57 + (viewRef view_1 (cellRef FDE (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property INIT (string "0") (owner "Xilinx")) + ) + (instance blk00000b58 + (viewRef view_1 (cellRef SRLC16E (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property INIT (string "0000") (owner "Xilinx")) + ) + (instance blk00000b59 + (viewRef view_1 (cellRef FDE (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property INIT (string "0") (owner "Xilinx")) + ) + (instance blk00000b5a + (viewRef view_1 (cellRef SRLC16E (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property INIT (string "0000") (owner "Xilinx")) + ) + (instance blk00000b5b + (viewRef view_1 (cellRef FDE (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property INIT (string "0") (owner "Xilinx")) + ) + (instance blk00000b5c + (viewRef view_1 (cellRef SRLC16E (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property INIT (string "0000") (owner "Xilinx")) + ) + (instance blk00000b5d + (viewRef view_1 (cellRef FDE (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property INIT (string "0") (owner "Xilinx")) + ) + (instance blk00000b5e + (viewRef view_1 (cellRef SRLC16E (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property INIT (string "0000") (owner "Xilinx")) + ) + (instance blk00000b5f + (viewRef view_1 (cellRef FDE (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property INIT (string "0") (owner "Xilinx")) + ) + (instance blk00000b60 + (viewRef view_1 (cellRef SRLC16E (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property INIT (string "0000") (owner "Xilinx")) + ) + (instance blk00000b61 + (viewRef view_1 (cellRef FDE (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property INIT (string "0") (owner "Xilinx")) + ) + (instance blk00000b62 + (viewRef view_1 (cellRef SRLC16E (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property INIT (string "0000") (owner "Xilinx")) + ) + (instance blk00000b63 + (viewRef view_1 (cellRef FDE (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property INIT (string "0") (owner "Xilinx")) + ) + (instance blk00000b64 + (viewRef view_1 (cellRef SRLC16E (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property INIT (string "0000") (owner "Xilinx")) + ) + (instance blk00000b65 + (viewRef view_1 (cellRef FDE (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property INIT (string "0") (owner "Xilinx")) + ) + (instance blk00000b66 + (viewRef view_1 (cellRef SRLC16E (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property INIT (string "0000") (owner "Xilinx")) + ) + (instance blk00000b67 + (viewRef view_1 (cellRef FDE (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property INIT (string "0") (owner "Xilinx")) + ) + (instance blk00000b68 + (viewRef view_1 (cellRef SRLC16E (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property INIT (string "0000") (owner "Xilinx")) + ) + (instance blk00000b69 + (viewRef view_1 (cellRef FDE (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property INIT (string "0") (owner "Xilinx")) + ) + (instance blk00000b6a + (viewRef view_1 (cellRef SRLC16E (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property INIT (string "0000") (owner "Xilinx")) + ) + (instance blk00000b6b + (viewRef view_1 (cellRef FDE (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property INIT (string "0") (owner "Xilinx")) + ) + (instance blk00000b6c + (viewRef view_1 (cellRef SRLC16E (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property INIT (string "0000") (owner "Xilinx")) + ) + (instance blk00000b6d + (viewRef view_1 (cellRef FDE (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property INIT (string "0") (owner "Xilinx")) + ) + (instance blk00000b6e + (viewRef view_1 (cellRef SRLC16E (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property INIT (string "0000") (owner "Xilinx")) + ) + (instance blk00000b6f + (viewRef view_1 (cellRef FDE (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property INIT (string "0") (owner "Xilinx")) + ) + (instance blk00000b70 + (viewRef view_1 (cellRef SRLC16E (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property INIT (string "0000") (owner "Xilinx")) + ) + (instance blk00000b71 + (viewRef view_1 (cellRef FDE (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property INIT (string "0") (owner "Xilinx")) + ) + (instance blk00000b72 + (viewRef view_1 (cellRef SRLC16E (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property INIT (string "0000") (owner "Xilinx")) + ) + (instance blk00000b73 + (viewRef view_1 (cellRef FDE (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property INIT (string "0") (owner "Xilinx")) + ) + (instance blk00000b74 + (viewRef view_1 (cellRef SRLC16E (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property INIT (string "0000") (owner "Xilinx")) + ) + (instance blk00000b75 + (viewRef view_1 (cellRef FDE (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property INIT (string "0") (owner "Xilinx")) + ) + (instance blk00000b76 + (viewRef view_1 (cellRef SRLC16E (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property INIT (string "0000") (owner "Xilinx")) + ) + (instance blk00000b77 + (viewRef view_1 (cellRef FDE (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property INIT (string "0") (owner "Xilinx")) + ) + (instance blk00000b78 + (viewRef view_1 (cellRef SRLC16E (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property INIT (string "0000") (owner "Xilinx")) + ) + (instance blk00000b79 + (viewRef view_1 (cellRef FDE (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property INIT (string "0") (owner "Xilinx")) + ) + (instance blk00000b7a + (viewRef view_1 (cellRef SRLC16E (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property INIT (string "0000") (owner "Xilinx")) + ) + (instance blk00000b7b + (viewRef view_1 (cellRef FDE (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property INIT (string "0") (owner "Xilinx")) + ) + (instance blk00000b7c + (viewRef view_1 (cellRef SRLC16E (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property INIT (string "0000") (owner "Xilinx")) + ) + (instance blk00000b7d + (viewRef view_1 (cellRef FDE (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property INIT (string "0") (owner "Xilinx")) + ) + (instance blk00000b7e + (viewRef view_1 (cellRef SRLC16E (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property INIT (string "0000") (owner "Xilinx")) + ) + (instance blk00000b7f + (viewRef view_1 (cellRef FDE (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property INIT (string "0") (owner "Xilinx")) + ) + (instance blk00000b80 + (viewRef view_1 (cellRef SRLC16E (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property INIT (string "0000") (owner "Xilinx")) + ) + (instance blk00000b81 + (viewRef view_1 (cellRef FDE (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property INIT (string "0") (owner "Xilinx")) + ) + (instance blk00000b82 + (viewRef view_1 (cellRef SRLC16E (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property INIT (string "0000") (owner "Xilinx")) + ) + (instance blk00000b83 + (viewRef view_1 (cellRef FDE (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property INIT (string "0") (owner "Xilinx")) + ) + (instance blk00000b84 + (viewRef view_1 (cellRef SRLC16E (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property INIT (string "0000") (owner "Xilinx")) + ) + (instance blk00000b85 + (viewRef view_1 (cellRef FDE (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property INIT (string "0") (owner "Xilinx")) + ) + (instance blk00000b86 + (viewRef view_1 (cellRef SRLC16E (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property INIT (string "0000") (owner "Xilinx")) + ) + (instance blk00000b87 + (viewRef view_1 (cellRef FDE (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property INIT (string "0") (owner "Xilinx")) + ) + (instance blk00000b88 + (viewRef view_1 (cellRef SRLC16E (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property INIT (string "0000") (owner "Xilinx")) + ) + (instance blk00000b89 + (viewRef view_1 (cellRef FDE (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property INIT (string "0") (owner "Xilinx")) + ) + (instance blk00000b8a + (viewRef view_1 (cellRef SRLC16E (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property INIT (string "0000") (owner "Xilinx")) + ) + (instance blk00000b8b + (viewRef view_1 (cellRef FDE (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property INIT (string "0") (owner "Xilinx")) + ) + (instance blk00000b8c + (viewRef view_1 (cellRef SRLC16E (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property INIT (string "0000") (owner "Xilinx")) + ) + (instance blk00000b8d + (viewRef view_1 (cellRef FDE (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property INIT (string "0") (owner "Xilinx")) + ) + (instance blk00000b8e + (viewRef view_1 (cellRef SRLC16E (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property INIT (string "0000") (owner "Xilinx")) + ) + (instance blk00000b8f + (viewRef view_1 (cellRef FDE (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property INIT (string "0") (owner "Xilinx")) + ) + (instance blk00000b90 + (viewRef view_1 (cellRef SRLC16E (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property INIT (string "0000") (owner "Xilinx")) + ) + (instance blk00000b91 + (viewRef view_1 (cellRef FDE (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property INIT (string "0") (owner "Xilinx")) + ) + (instance blk00000b92 + (viewRef view_1 (cellRef SRLC16E (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property INIT (string "0000") (owner "Xilinx")) + ) + (instance blk00000b93 + (viewRef view_1 (cellRef FDE (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property INIT (string "0") (owner "Xilinx")) + ) + (instance blk00000b94 + (viewRef view_1 (cellRef SRLC16E (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property INIT (string "0000") (owner "Xilinx")) + ) + (instance blk00000b95 + (viewRef view_1 (cellRef FDE (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property INIT (string "0") (owner "Xilinx")) + ) + (instance blk00000b96 + (viewRef view_1 (cellRef SRLC16E (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property INIT (string "0000") (owner "Xilinx")) + ) + (instance blk00000b97 + (viewRef view_1 (cellRef FDE (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property INIT (string "0") (owner "Xilinx")) + ) + (instance blk00000b98 + (viewRef view_1 (cellRef SRLC16E (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property INIT (string "0000") (owner "Xilinx")) + ) + (instance blk00000b99 + (viewRef view_1 (cellRef FDE (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property INIT (string "0") (owner "Xilinx")) + ) + (instance blk00000b9a + (viewRef view_1 (cellRef SRLC16E (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property INIT (string "0000") (owner "Xilinx")) + ) + (instance blk00000b9b + (viewRef view_1 (cellRef FDE (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property INIT (string "0") (owner "Xilinx")) + ) + (instance blk00000b9c + (viewRef view_1 (cellRef SRLC16E (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property INIT (string "0000") (owner "Xilinx")) + ) + (instance blk00000b9d + (viewRef view_1 (cellRef FDE (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property INIT (string "0") (owner "Xilinx")) + ) + (instance blk00000b9e + (viewRef view_1 (cellRef SRLC16E (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property INIT (string "0000") (owner "Xilinx")) + ) + (instance blk00000b9f + (viewRef view_1 (cellRef FDE (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property INIT (string "0") (owner "Xilinx")) + ) + (instance blk00000ba0 + (viewRef view_1 (cellRef SRLC16E (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property INIT (string "0000") (owner "Xilinx")) + ) + (instance blk00000ba1 + (viewRef view_1 (cellRef FDE (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property INIT (string "0") (owner "Xilinx")) + ) + (instance blk00000ba2 + (viewRef view_1 (cellRef SRLC16E (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property INIT (string "0000") (owner "Xilinx")) + ) + (instance blk00000ba3 + (viewRef view_1 (cellRef FDE (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property INIT (string "0") (owner "Xilinx")) + ) + (instance blk00000ba4 + (viewRef view_1 (cellRef SRLC16E (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property INIT (string "0000") (owner "Xilinx")) + ) + (instance blk00000ba5 + (viewRef view_1 (cellRef FDE (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property INIT (string "0") (owner "Xilinx")) + ) + (instance blk00000ba6 + (viewRef view_1 (cellRef SRLC16E (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property INIT (string "0000") (owner "Xilinx")) + ) + (instance blk00000ba7 + (viewRef view_1 (cellRef FDE (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property INIT (string "0") (owner "Xilinx")) + ) + (instance blk00000ba8 + (viewRef view_1 (cellRef SRLC16E (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property INIT (string "0000") (owner "Xilinx")) + ) + (instance blk00000ba9 + (viewRef view_1 (cellRef FDE (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property INIT (string "0") (owner "Xilinx")) + ) + (instance blk00000baa + (viewRef view_1 (cellRef SRLC16E (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property INIT (string "0000") (owner "Xilinx")) + ) + (instance blk00000bab + (viewRef view_1 (cellRef FDE (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property INIT (string "0") (owner "Xilinx")) + ) + (instance blk00000bac + (viewRef view_1 (cellRef SRLC16E (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property INIT (string "0000") (owner "Xilinx")) + ) + (instance blk00000bad + (viewRef view_1 (cellRef FDE (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property INIT (string "0") (owner "Xilinx")) + ) + (instance blk00000bae + (viewRef view_1 (cellRef SRLC16E (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property INIT (string "0000") (owner "Xilinx")) + ) + (instance blk00000baf + (viewRef view_1 (cellRef FDE (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property INIT (string "0") (owner "Xilinx")) + ) + (instance blk00000bb0 + (viewRef view_1 (cellRef SRLC16E (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property INIT (string "0000") (owner "Xilinx")) + ) + (instance blk00000bb1 + (viewRef view_1 (cellRef FDE (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property INIT (string "0") (owner "Xilinx")) + ) + (instance blk00000bb2 + (viewRef view_1 (cellRef SRLC16E (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property INIT (string "0000") (owner "Xilinx")) + ) + (instance blk00000bb3 + (viewRef view_1 (cellRef FDE (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property INIT (string "0") (owner "Xilinx")) + ) + (instance blk00000bb4 + (viewRef view_1 (cellRef SRLC16E (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property INIT (string "0000") (owner "Xilinx")) + ) + (instance blk00000bb5 + (viewRef view_1 (cellRef FDE (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property INIT (string "0") (owner "Xilinx")) + ) + (instance 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"dout_2<1>") + (joined + (portRef (member dout_2 45)) + (portRef (member dout_2 45) (instanceRef blk00000003)) + ) + (property USER_ALIAS (string "N722") (owner "Xilinx")) + ) + (net (rename dout_2_renamed_4_0_ "dout_2<0>") + (joined + (portRef (member dout_2 46)) + (portRef (member dout_2 46) (instanceRef blk00000003)) + ) + (property USER_ALIAS (string "N723") (owner "Xilinx")) + ) + ) + ) + ) + ) + + (design hbdec1 + (cellRef hbdec1 + (libraryRef hbdec1_lib) + ) + (property PART (string "7k325tffg900-2") (owner "Xilinx")) + ) +) + diff --git a/fpga/usrp3/top/x400/coregen_dsp/hbdec1.v b/fpga/usrp3/top/x400/coregen_dsp/hbdec1.v new file mode 100644 index 000000000..916d06e13 --- /dev/null +++ b/fpga/usrp3/top/x400/coregen_dsp/hbdec1.v @@ -0,0 +1,39998 @@ +//////////////////////////////////////////////////////////////////////////////// +// Copyright (c) 1995-2012 Xilinx, Inc. All rights reserved. +//////////////////////////////////////////////////////////////////////////////// +// ____ ____ +// / /\/ / +// /___/ \ / Vendor: Xilinx +// \ \ \/ Version: P.49d +// \ \ Application: netgen +// / / Filename: hbdec1.v +// /___/ /\ Timestamp: Wed Dec 4 13:35:23 2013 +// \ \ / \ +// \___\/\___\ +// +// Command : -intstyle ise -w -sim -ofmt verilog ./tmp/_cg/hbdec1.ngc ./tmp/_cg/hbdec1.v +// Device : 7k325tffg900-2 +// Input file : ./tmp/_cg/hbdec1.ngc +// Output file : ./tmp/_cg/hbdec1.v +// # of Modules : 1 +// Design Name : hbdec1 +// Xilinx : /opt/Xilinx/14.4/ISE_DS/ISE/ +// +// Purpose: +// This verilog netlist is a verification model and uses simulation +// primitives which may not represent the true implementation of the +// device, however the netlist is functionally correct and should not +// be modified. This file cannot be synthesized and should only be used +// with supported simulation tools. +// +// Reference: +// Command Line Tools User Guide, Chapter 23 and Synthesis and Simulation Design Guide, Chapter 6 +// +//////////////////////////////////////////////////////////////////////////////// + +`timescale 1 ns/1 ps + +module hbdec1 ( + sclr, ce, rfd, rdy, data_valid, coef_we, nd, clk, coef_ld, dout_1, dout_2, din_1, din_2, coef_din +)/* synthesis syn_black_box syn_noprune=1 */; + input sclr; + input ce; + output rfd; + output rdy; + output data_valid; + input coef_we; + input nd; + input clk; + input coef_ld; + output [46 : 0] dout_1; + output [46 : 0] dout_2; + input [23 : 0] din_1; + input [23 : 0] din_2; + input [17 : 0] coef_din; + + // synthesis translate_off + + wire NlwRenamedSig_OI_rfd; + wire \blk00000003/sig00000b8e ; + wire \blk00000003/sig00000b8d ; + wire \blk00000003/sig00000b8c ; + wire \blk00000003/sig00000b8b ; + wire \blk00000003/sig00000b8a ; + wire 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\blk00000003/blk0000075c/sig000015d1 ; + wire NLW_blk00000001_P_UNCONNECTED; + wire NLW_blk00000002_G_UNCONNECTED; + wire \NLW_blk00000003/blk00000c12_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000c10_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000c0e_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000c0c_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000c0a_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000c08_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000c06_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000c04_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000c02_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000c00_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000bfe_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000bfc_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000bfa_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000bf8_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000bf6_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000bf4_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000bf2_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000bf0_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000bee_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000bec_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000bea_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000be8_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000be6_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000be4_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000be2_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000be0_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000bde_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000bdc_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000bda_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000bd8_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000bd6_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000bd4_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000bd2_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000bd0_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000bce_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000bcc_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000bca_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000bc8_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000bc6_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000bc4_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000bc2_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000bc0_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000bbe_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000bbc_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000bba_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000bb8_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000bb6_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000bb4_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000bb2_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000bb0_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000bae_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000bac_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000baa_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000ba8_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000ba6_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000ba4_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000ba2_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000ba0_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000b9e_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000b9c_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000b9a_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000b98_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000b96_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000b94_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000b92_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000b90_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000b8e_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000b8c_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000b8a_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000b88_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000b86_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000b84_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000b82_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000b80_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000b7e_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000b7c_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000b7a_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000b78_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000b76_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000b74_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000b72_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000b70_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000b6e_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000b6c_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000b6a_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000b68_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000b66_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000b64_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000b62_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000b60_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000b5e_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000b5c_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000b5a_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000b58_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000b56_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000b54_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000b52_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000b50_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000b4e_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000b4c_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000b4a_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000b48_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000b46_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000b44_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000b42_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000b40_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000b3e_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000b3c_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000b3a_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000b38_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000b36_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000b34_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000b32_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000b30_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000b2e_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000b2c_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000b2a_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000b28_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000b26_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000b24_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000b22_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000b20_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000b1e_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000b1c_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000b1a_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000b18_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000b16_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000b14_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000b12_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000b10_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000b0e_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000b0c_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000b0a_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000b08_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000b06_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000b04_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000b02_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000b00_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000afe_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000afc_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000afa_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000af8_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000af6_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000af4_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000af2_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000af0_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000aee_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000aec_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000aea_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000ae8_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000ae6_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000ae4_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000ae2_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000ae0_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000ade_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000adc_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000ada_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000ad8_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000ad6_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000ad4_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000ad2_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000ad0_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000ace_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000acc_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000aca_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000ac8_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000ac6_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000ac4_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000ac2_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000ac0_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000abe_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000abc_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000aba_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000ab8_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000ab6_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000ab4_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000ab2_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000ab0_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000aae_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000aac_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000aaa_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000aa8_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000aa6_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000aa4_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000aa2_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000aa0_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000a9e_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000a9c_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000a9a_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000a98_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000a96_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000a94_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000a92_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000a90_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000a8e_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000a8c_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000a8a_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000a88_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000a86_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000a84_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000a82_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000a80_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000a7e_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000a7c_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000a7a_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000a78_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000a76_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000a74_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000a72_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000a70_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000a6e_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000a6c_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000a6a_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000a68_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000a66_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000a64_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000a62_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000a60_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000a5e_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000a5c_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000a5a_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000a58_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000a56_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000a54_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000a52_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000a50_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000a4e_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000a4c_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000a4a_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000a48_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000a46_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000a44_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000a42_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000a40_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000a3e_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000a3c_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000a3a_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000a38_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000a36_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000a34_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000a32_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000a30_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000a2e_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000a2c_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000a2a_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000a28_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000a26_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000a24_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000a22_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000a20_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000a1e_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000a1c_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000a1a_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000a18_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000a16_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000a14_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000a12_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000a10_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000a0e_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000a0c_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000a0a_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000a08_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000a06_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000a04_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000a02_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000a00_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk000009fe_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk000009fc_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk000009fa_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk000009f8_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk000009f6_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk000009f4_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk000009f2_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk000009f0_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk000009ee_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk000009ec_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk000009ea_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk000009e8_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk000009e6_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk000009e4_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk000009e2_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk000009e0_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk000009de_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk000009dc_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk000009da_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk000009d8_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk000009d6_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk000009d4_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk000009d2_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk000009d0_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk000009ce_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk000009cc_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk000009ca_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk000009c8_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk000009c6_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk000009c4_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk000009c2_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk000009c0_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk000009be_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk000009bc_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk000009ba_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk000009b8_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk000009b6_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk000009b4_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk000009b2_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk000009b0_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk000009ae_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk000009ac_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk000009aa_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk000009a8_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk000009a6_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk000009a4_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk000009a2_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk000009a0_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk0000099e_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk0000099c_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk0000099a_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000998_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000996_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000994_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000992_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000990_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk0000098e_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk0000098c_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk0000098a_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000988_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000986_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000984_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000982_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000980_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk0000097e_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk0000097c_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk0000097a_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000978_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000976_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000974_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000972_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000970_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk0000096e_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk0000096c_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk0000096a_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000968_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000966_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000964_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000962_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000960_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk0000095e_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk0000095c_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk0000095a_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000958_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000956_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000954_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000952_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000950_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk0000094e_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk0000094c_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk0000094a_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000948_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000946_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000944_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000942_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000940_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk0000093e_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk0000093c_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk0000093a_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000938_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000936_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000934_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000932_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000930_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk0000092e_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk0000092c_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk0000092a_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000928_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000926_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000924_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000922_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000920_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk0000091e_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk0000091c_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk0000091a_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000918_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000916_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000914_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000912_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000910_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk0000090e_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk0000090c_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk0000090a_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000908_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000906_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000904_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000902_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000900_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk000008fe_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk000008fc_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk000008fa_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk000008f8_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk000008f6_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk000008f4_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk000008f2_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk000008f0_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk000008ee_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk000008ec_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk000008ea_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk000008e8_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk000008e6_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk000008e4_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk000008e2_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk000008e0_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk000008de_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk000008dc_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk000007f4_O_UNCONNECTED ; + wire \NLW_blk00000003/blk000007f4_LO_UNCONNECTED ; + wire \NLW_blk00000003/blk00000789_O_UNCONNECTED ; + wire \NLW_blk00000003/blk00000789_LO_UNCONNECTED ; + wire \NLW_blk00000003/blk000000f2_PATTERNBDETECT_UNCONNECTED ; + wire \NLW_blk00000003/blk000000f2_MULTSIGNOUT_UNCONNECTED ; + wire \NLW_blk00000003/blk000000f2_CARRYCASCOUT_UNCONNECTED ; + wire \NLW_blk00000003/blk000000f2_UNDERFLOW_UNCONNECTED ; + wire \NLW_blk00000003/blk000000f2_PATTERNDETECT_UNCONNECTED ; + wire \NLW_blk00000003/blk000000f2_OVERFLOW_UNCONNECTED ; + wire \NLW_blk00000003/blk000000f2_ACOUT<29>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000f2_ACOUT<28>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000f2_ACOUT<27>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000f2_ACOUT<26>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000f2_ACOUT<25>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000f2_ACOUT<24>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000f2_ACOUT<23>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000f2_ACOUT<22>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000f2_ACOUT<21>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000f2_ACOUT<20>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000f2_ACOUT<19>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000f2_ACOUT<18>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000f2_ACOUT<17>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000f2_ACOUT<16>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000f2_ACOUT<15>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000f2_ACOUT<14>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000f2_ACOUT<13>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000f2_ACOUT<12>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000f2_ACOUT<11>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000f2_ACOUT<10>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000f2_ACOUT<9>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000f2_ACOUT<8>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000f2_ACOUT<7>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000f2_ACOUT<6>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000f2_ACOUT<5>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000f2_ACOUT<4>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000f2_ACOUT<3>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000f2_ACOUT<2>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000f2_ACOUT<1>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000f2_ACOUT<0>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000f2_CARRYOUT<3>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000f2_CARRYOUT<2>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000f2_CARRYOUT<1>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000f2_CARRYOUT<0>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000f2_BCOUT<17>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000f2_BCOUT<16>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000f2_BCOUT<15>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000f2_BCOUT<14>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000f2_BCOUT<13>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000f2_BCOUT<12>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000f2_BCOUT<11>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000f2_BCOUT<10>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000f2_BCOUT<9>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000f2_BCOUT<8>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000f2_BCOUT<7>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000f2_BCOUT<6>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000f2_BCOUT<5>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000f2_BCOUT<4>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000f2_BCOUT<3>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000f2_BCOUT<2>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000f2_BCOUT<1>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000f2_BCOUT<0>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000f2_P<47>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000f2_P<46>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000f2_P<45>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000f2_P<44>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000f2_P<43>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000f2_P<42>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000f2_P<41>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000f2_P<40>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000f2_P<39>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000f2_P<38>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000f2_P<37>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000f2_P<36>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000f2_P<35>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000f2_P<34>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000f2_P<33>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000f2_P<32>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000f2_P<31>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000f2_P<30>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000f2_P<29>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000f2_P<28>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000f2_P<27>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000f2_P<26>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000f2_P<25>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000f2_P<24>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000f2_P<23>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000f2_P<22>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000f2_P<21>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000f2_P<20>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000f2_P<19>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000f2_P<18>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000f2_P<17>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000f2_P<16>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000f2_P<15>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000f2_P<14>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000f2_P<13>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000f2_P<12>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000f2_P<11>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000f2_P<10>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000f2_P<9>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000f2_P<8>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000f2_P<7>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000f2_P<6>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000f2_P<5>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000f2_P<4>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000f2_P<3>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000f2_P<2>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000f2_P<1>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000f2_P<0>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000f1_PATTERNBDETECT_UNCONNECTED ; + wire \NLW_blk00000003/blk000000f1_MULTSIGNOUT_UNCONNECTED ; + wire \NLW_blk00000003/blk000000f1_CARRYCASCOUT_UNCONNECTED ; + wire \NLW_blk00000003/blk000000f1_UNDERFLOW_UNCONNECTED ; + wire \NLW_blk00000003/blk000000f1_PATTERNDETECT_UNCONNECTED ; + wire \NLW_blk00000003/blk000000f1_OVERFLOW_UNCONNECTED ; + wire \NLW_blk00000003/blk000000f1_ACOUT<29>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000f1_ACOUT<28>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000f1_ACOUT<27>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000f1_ACOUT<26>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000f1_ACOUT<25>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000f1_ACOUT<24>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000f1_ACOUT<23>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000f1_ACOUT<22>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000f1_ACOUT<21>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000f1_ACOUT<20>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000f1_ACOUT<19>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000f1_ACOUT<18>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000f1_ACOUT<17>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000f1_ACOUT<16>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000f1_ACOUT<15>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000f1_ACOUT<14>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000f1_ACOUT<13>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000f1_ACOUT<12>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000f1_ACOUT<11>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000f1_ACOUT<10>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000f1_ACOUT<9>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000f1_ACOUT<8>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000f1_ACOUT<7>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000f1_ACOUT<6>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000f1_ACOUT<5>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000f1_ACOUT<4>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000f1_ACOUT<3>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000f1_ACOUT<2>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000f1_ACOUT<1>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000f1_ACOUT<0>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000f1_CARRYOUT<3>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000f1_CARRYOUT<2>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000f1_CARRYOUT<1>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000f1_CARRYOUT<0>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000f1_BCOUT<17>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000f1_BCOUT<16>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000f1_BCOUT<15>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000f1_BCOUT<14>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000f1_BCOUT<13>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000f1_BCOUT<12>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000f1_BCOUT<11>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000f1_BCOUT<10>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000f1_BCOUT<9>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000f1_BCOUT<8>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000f1_BCOUT<7>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000f1_BCOUT<6>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000f1_BCOUT<5>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000f1_BCOUT<4>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000f1_BCOUT<3>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000f1_BCOUT<2>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000f1_BCOUT<1>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000f1_BCOUT<0>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000f1_P<47>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000f1_P<46>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000f1_P<45>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000f1_P<44>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000f1_P<43>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000f1_P<42>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000f1_P<41>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000f1_P<40>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000f1_P<39>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000f1_P<38>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000f1_P<37>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000f1_P<36>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000f1_P<35>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000f1_P<34>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000f1_P<33>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000f1_P<32>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000f1_P<31>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000f1_P<30>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000f1_P<29>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000f1_P<28>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000f1_P<27>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000f1_P<26>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000f1_P<25>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000f1_P<24>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000f1_P<23>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000f1_P<22>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000f1_P<21>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000f1_P<20>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000f1_P<19>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000f1_P<18>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000f1_P<17>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000f1_P<16>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000f1_P<15>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000f1_P<14>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000f1_P<13>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000f1_P<12>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000f1_P<11>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000f1_P<10>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000f1_P<9>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000f1_P<8>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000f1_P<7>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000f1_P<6>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000f1_P<5>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000f1_P<4>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000f1_P<3>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000f1_P<2>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000f1_P<1>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000f1_P<0>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000f0_PATTERNBDETECT_UNCONNECTED ; + wire \NLW_blk00000003/blk000000f0_MULTSIGNOUT_UNCONNECTED ; + wire \NLW_blk00000003/blk000000f0_CARRYCASCOUT_UNCONNECTED ; + wire \NLW_blk00000003/blk000000f0_UNDERFLOW_UNCONNECTED ; + wire \NLW_blk00000003/blk000000f0_PATTERNDETECT_UNCONNECTED ; + wire \NLW_blk00000003/blk000000f0_OVERFLOW_UNCONNECTED ; + wire \NLW_blk00000003/blk000000f0_ACOUT<29>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000f0_ACOUT<28>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000f0_ACOUT<27>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000f0_ACOUT<26>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000f0_ACOUT<25>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000f0_ACOUT<24>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000f0_ACOUT<23>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000f0_ACOUT<22>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000f0_ACOUT<21>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000f0_ACOUT<20>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000f0_ACOUT<19>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000f0_ACOUT<18>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000f0_ACOUT<17>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000f0_ACOUT<16>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000f0_ACOUT<15>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000f0_ACOUT<14>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000f0_ACOUT<13>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000f0_ACOUT<12>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000f0_ACOUT<11>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000f0_ACOUT<10>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000f0_ACOUT<9>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000f0_ACOUT<8>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000f0_ACOUT<7>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000f0_ACOUT<6>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000f0_ACOUT<5>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000f0_ACOUT<4>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000f0_ACOUT<3>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000f0_ACOUT<2>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000f0_ACOUT<1>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000f0_ACOUT<0>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000f0_CARRYOUT<3>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000f0_CARRYOUT<2>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000f0_CARRYOUT<1>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000f0_CARRYOUT<0>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000f0_BCOUT<17>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000f0_BCOUT<16>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000f0_BCOUT<15>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000f0_BCOUT<14>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000f0_BCOUT<13>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000f0_BCOUT<12>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000f0_BCOUT<11>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000f0_BCOUT<10>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000f0_BCOUT<9>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000f0_BCOUT<8>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000f0_BCOUT<7>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000f0_BCOUT<6>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000f0_BCOUT<5>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000f0_BCOUT<4>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000f0_BCOUT<3>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000f0_BCOUT<2>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000f0_BCOUT<1>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000f0_BCOUT<0>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000f0_P<47>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000f0_P<46>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000f0_P<45>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000f0_P<44>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000f0_P<43>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000f0_P<42>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000f0_P<41>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000f0_P<40>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000f0_P<39>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000f0_P<38>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000f0_P<37>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000f0_P<36>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000f0_P<35>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000f0_P<34>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000f0_P<33>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000f0_P<32>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000f0_P<31>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000f0_P<30>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000f0_P<29>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000f0_P<28>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000f0_P<27>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000f0_P<26>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000f0_P<25>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000f0_P<24>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000f0_P<23>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000f0_P<22>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000f0_P<21>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000f0_P<20>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000f0_P<19>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000f0_P<18>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000f0_P<17>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000f0_P<16>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000f0_P<15>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000f0_P<14>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000f0_P<13>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000f0_P<12>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000f0_P<11>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000f0_P<10>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000f0_P<9>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000f0_P<8>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000f0_P<7>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000f0_P<6>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000f0_P<5>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000f0_P<4>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000f0_P<3>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000f0_P<2>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000f0_P<1>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000f0_P<0>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000ef_PATTERNBDETECT_UNCONNECTED ; + wire \NLW_blk00000003/blk000000ef_MULTSIGNOUT_UNCONNECTED ; + wire \NLW_blk00000003/blk000000ef_CARRYCASCOUT_UNCONNECTED ; + wire \NLW_blk00000003/blk000000ef_UNDERFLOW_UNCONNECTED ; + wire \NLW_blk00000003/blk000000ef_PATTERNDETECT_UNCONNECTED ; + wire \NLW_blk00000003/blk000000ef_OVERFLOW_UNCONNECTED ; + wire \NLW_blk00000003/blk000000ef_ACOUT<29>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000ef_ACOUT<28>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000ef_ACOUT<27>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000ef_ACOUT<26>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000ef_ACOUT<25>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000ef_ACOUT<24>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000ef_ACOUT<23>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000ef_ACOUT<22>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000ef_ACOUT<21>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000ef_ACOUT<20>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000ef_ACOUT<19>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000ef_ACOUT<18>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000ef_ACOUT<17>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000ef_ACOUT<16>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000ef_ACOUT<15>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000ef_ACOUT<14>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000ef_ACOUT<13>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000ef_ACOUT<12>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000ef_ACOUT<11>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000ef_ACOUT<10>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000ef_ACOUT<9>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000ef_ACOUT<8>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000ef_ACOUT<7>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000ef_ACOUT<6>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000ef_ACOUT<5>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000ef_ACOUT<4>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000ef_ACOUT<3>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000ef_ACOUT<2>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000ef_ACOUT<1>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000ef_ACOUT<0>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000ef_CARRYOUT<3>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000ef_CARRYOUT<2>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000ef_CARRYOUT<1>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000ef_CARRYOUT<0>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000ef_BCOUT<17>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000ef_BCOUT<16>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000ef_BCOUT<15>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000ef_BCOUT<14>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000ef_BCOUT<13>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000ef_BCOUT<12>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000ef_BCOUT<11>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000ef_BCOUT<10>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000ef_BCOUT<9>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000ef_BCOUT<8>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000ef_BCOUT<7>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000ef_BCOUT<6>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000ef_BCOUT<5>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000ef_BCOUT<4>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000ef_BCOUT<3>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000ef_BCOUT<2>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000ef_BCOUT<1>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000ef_BCOUT<0>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000ef_P<47>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000ef_P<46>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000ef_P<45>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000ef_P<44>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000ef_P<43>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000ef_P<42>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000ef_P<41>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000ef_P<40>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000ef_P<39>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000ef_P<38>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000ef_P<37>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000ef_P<36>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000ef_P<35>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000ef_P<34>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000ef_P<33>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000ef_P<32>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000ef_P<31>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000ef_P<30>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000ef_P<29>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000ef_P<28>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000ef_P<27>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000ef_P<26>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000ef_P<25>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000ef_P<24>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000ef_P<23>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000ef_P<22>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000ef_P<21>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000ef_P<20>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000ef_P<19>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000ef_P<18>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000ef_P<17>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000ef_P<16>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000ef_P<15>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000ef_P<14>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000ef_P<13>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000ef_P<12>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000ef_P<11>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000ef_P<10>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000ef_P<9>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000ef_P<8>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000ef_P<7>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000ef_P<6>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000ef_P<5>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000ef_P<4>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000ef_P<3>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000ef_P<2>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000ef_P<1>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000ef_P<0>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000ee_PATTERNBDETECT_UNCONNECTED ; + wire \NLW_blk00000003/blk000000ee_MULTSIGNOUT_UNCONNECTED ; + wire \NLW_blk00000003/blk000000ee_CARRYCASCOUT_UNCONNECTED ; + wire \NLW_blk00000003/blk000000ee_UNDERFLOW_UNCONNECTED ; + wire \NLW_blk00000003/blk000000ee_PATTERNDETECT_UNCONNECTED ; + wire \NLW_blk00000003/blk000000ee_OVERFLOW_UNCONNECTED ; + wire \NLW_blk00000003/blk000000ee_ACOUT<29>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000ee_ACOUT<28>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000ee_ACOUT<27>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000ee_ACOUT<26>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000ee_ACOUT<25>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000ee_ACOUT<24>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000ee_ACOUT<23>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000ee_ACOUT<22>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000ee_ACOUT<21>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000ee_ACOUT<20>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000ee_ACOUT<19>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000ee_ACOUT<18>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000ee_ACOUT<17>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000ee_ACOUT<16>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000ee_ACOUT<15>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000ee_ACOUT<14>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000ee_ACOUT<13>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000ee_ACOUT<12>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000ee_ACOUT<11>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000ee_ACOUT<10>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000ee_ACOUT<9>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000ee_ACOUT<8>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000ee_ACOUT<7>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000ee_ACOUT<6>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000ee_ACOUT<5>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000ee_ACOUT<4>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000ee_ACOUT<3>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000ee_ACOUT<2>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000ee_ACOUT<1>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000ee_ACOUT<0>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000ee_CARRYOUT<3>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000ee_CARRYOUT<2>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000ee_CARRYOUT<1>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000ee_CARRYOUT<0>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000ee_BCOUT<17>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000ee_BCOUT<16>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000ee_BCOUT<15>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000ee_BCOUT<14>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000ee_BCOUT<13>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000ee_BCOUT<12>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000ee_BCOUT<11>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000ee_BCOUT<10>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000ee_BCOUT<9>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000ee_BCOUT<8>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000ee_BCOUT<7>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000ee_BCOUT<6>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000ee_BCOUT<5>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000ee_BCOUT<4>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000ee_BCOUT<3>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000ee_BCOUT<2>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000ee_BCOUT<1>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000ee_BCOUT<0>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000ee_P<47>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000ee_P<46>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000ee_P<45>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000ee_P<44>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000ee_P<43>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000ee_P<42>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000ee_P<41>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000ee_P<40>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000ee_P<39>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000ee_P<38>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000ee_P<37>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000ee_P<36>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000ee_P<35>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000ee_P<34>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000ee_P<33>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000ee_P<32>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000ee_P<31>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000ee_P<30>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000ee_P<29>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000ee_P<28>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000ee_P<27>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000ee_P<26>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000ee_P<25>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000ee_P<24>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000ee_P<23>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000ee_P<22>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000ee_P<21>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000ee_P<20>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000ee_P<19>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000ee_P<18>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000ee_P<17>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000ee_P<16>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000ee_P<15>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000ee_P<14>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000ee_P<13>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000ee_P<12>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000ee_P<11>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000ee_P<10>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000ee_P<9>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000ee_P<8>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000ee_P<7>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000ee_P<6>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000ee_P<5>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000ee_P<4>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000ee_P<3>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000ee_P<2>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000ee_P<1>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000ee_P<0>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000ed_PATTERNBDETECT_UNCONNECTED ; + wire \NLW_blk00000003/blk000000ed_MULTSIGNOUT_UNCONNECTED ; + wire \NLW_blk00000003/blk000000ed_CARRYCASCOUT_UNCONNECTED ; + wire \NLW_blk00000003/blk000000ed_UNDERFLOW_UNCONNECTED ; + wire \NLW_blk00000003/blk000000ed_PATTERNDETECT_UNCONNECTED ; + wire \NLW_blk00000003/blk000000ed_OVERFLOW_UNCONNECTED ; + wire \NLW_blk00000003/blk000000ed_ACOUT<29>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000ed_ACOUT<28>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000ed_ACOUT<27>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000ed_ACOUT<26>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000ed_ACOUT<25>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000ed_ACOUT<24>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000ed_ACOUT<23>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000ed_ACOUT<22>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000ed_ACOUT<21>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000ed_ACOUT<20>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000ed_ACOUT<19>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000ed_ACOUT<18>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000ed_ACOUT<17>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000ed_ACOUT<16>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000ed_ACOUT<15>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000ed_ACOUT<14>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000ed_ACOUT<13>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000ed_ACOUT<12>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000ed_ACOUT<11>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000ed_ACOUT<10>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000ed_ACOUT<9>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000ed_ACOUT<8>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000ed_ACOUT<7>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000ed_ACOUT<6>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000ed_ACOUT<5>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000ed_ACOUT<4>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000ed_ACOUT<3>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000ed_ACOUT<2>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000ed_ACOUT<1>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000ed_ACOUT<0>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000ed_CARRYOUT<3>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000ed_CARRYOUT<2>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000ed_CARRYOUT<1>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000ed_CARRYOUT<0>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000ed_BCOUT<17>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000ed_BCOUT<16>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000ed_BCOUT<15>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000ed_BCOUT<14>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000ed_BCOUT<13>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000ed_BCOUT<12>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000ed_BCOUT<11>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000ed_BCOUT<10>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000ed_BCOUT<9>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000ed_BCOUT<8>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000ed_BCOUT<7>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000ed_BCOUT<6>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000ed_BCOUT<5>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000ed_BCOUT<4>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000ed_BCOUT<3>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000ed_BCOUT<2>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000ed_BCOUT<1>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000ed_BCOUT<0>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000ed_P<47>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000ed_P<46>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000ed_P<45>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000ed_P<44>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000ed_P<43>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000ed_P<42>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000ed_P<41>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000ed_P<40>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000ed_P<39>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000ed_P<38>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000ed_P<37>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000ed_P<36>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000ed_P<35>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000ed_P<34>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000ed_P<33>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000ed_P<32>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000ed_P<31>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000ed_P<30>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000ed_P<29>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000ed_P<28>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000ed_P<27>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000ed_P<26>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000ed_P<25>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000ed_P<24>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000ed_P<23>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000ed_P<22>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000ed_P<21>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000ed_P<20>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000ed_P<19>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000ed_P<18>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000ed_P<17>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000ed_P<16>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000ed_P<15>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000ed_P<14>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000ed_P<13>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000ed_P<12>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000ed_P<11>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000ed_P<10>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000ed_P<9>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000ed_P<8>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000ed_P<7>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000ed_P<6>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000ed_P<5>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000ed_P<4>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000ed_P<3>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000ed_P<2>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000ed_P<1>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000ed_P<0>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000ec_PATTERNBDETECT_UNCONNECTED ; + wire \NLW_blk00000003/blk000000ec_MULTSIGNOUT_UNCONNECTED ; + wire \NLW_blk00000003/blk000000ec_CARRYCASCOUT_UNCONNECTED ; + wire \NLW_blk00000003/blk000000ec_UNDERFLOW_UNCONNECTED ; + wire \NLW_blk00000003/blk000000ec_PATTERNDETECT_UNCONNECTED ; + wire \NLW_blk00000003/blk000000ec_OVERFLOW_UNCONNECTED ; + wire \NLW_blk00000003/blk000000ec_ACOUT<29>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000ec_ACOUT<28>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000ec_ACOUT<27>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000ec_ACOUT<26>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000ec_ACOUT<25>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000ec_ACOUT<24>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000ec_ACOUT<23>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000ec_ACOUT<22>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000ec_ACOUT<21>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000ec_ACOUT<20>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000ec_ACOUT<19>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000ec_ACOUT<18>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000ec_ACOUT<17>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000ec_ACOUT<16>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000ec_ACOUT<15>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000ec_ACOUT<14>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000ec_ACOUT<13>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000ec_ACOUT<12>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000ec_ACOUT<11>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000ec_ACOUT<10>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000ec_ACOUT<9>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000ec_ACOUT<8>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000ec_ACOUT<7>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000ec_ACOUT<6>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000ec_ACOUT<5>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000ec_ACOUT<4>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000ec_ACOUT<3>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000ec_ACOUT<2>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000ec_ACOUT<1>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000ec_ACOUT<0>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000ec_CARRYOUT<3>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000ec_CARRYOUT<2>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000ec_CARRYOUT<1>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000ec_CARRYOUT<0>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000ec_BCOUT<17>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000ec_BCOUT<16>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000ec_BCOUT<15>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000ec_BCOUT<14>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000ec_BCOUT<13>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000ec_BCOUT<12>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000ec_BCOUT<11>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000ec_BCOUT<10>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000ec_BCOUT<9>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000ec_BCOUT<8>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000ec_BCOUT<7>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000ec_BCOUT<6>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000ec_BCOUT<5>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000ec_BCOUT<4>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000ec_BCOUT<3>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000ec_BCOUT<2>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000ec_BCOUT<1>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000ec_BCOUT<0>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000ec_P<47>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000ec_P<46>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000ec_P<45>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000ec_P<44>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000ec_P<43>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000ec_P<42>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000ec_P<41>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000ec_P<40>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000ec_P<39>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000ec_P<38>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000ec_P<37>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000ec_P<36>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000ec_P<35>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000ec_P<34>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000ec_P<33>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000ec_P<32>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000ec_P<31>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000ec_P<30>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000ec_P<29>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000ec_P<28>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000ec_P<27>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000ec_P<26>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000ec_P<25>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000ec_P<24>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000ec_P<23>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000ec_P<22>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000ec_P<21>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000ec_P<20>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000ec_P<19>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000ec_P<18>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000ec_P<17>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000ec_P<16>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000ec_P<15>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000ec_P<14>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000ec_P<13>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000ec_P<12>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000ec_P<11>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000ec_P<10>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000ec_P<9>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000ec_P<8>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000ec_P<7>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000ec_P<6>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000ec_P<5>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000ec_P<4>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000ec_P<3>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000ec_P<2>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000ec_P<1>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000ec_P<0>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000eb_PATTERNBDETECT_UNCONNECTED ; + wire \NLW_blk00000003/blk000000eb_MULTSIGNOUT_UNCONNECTED ; + wire \NLW_blk00000003/blk000000eb_CARRYCASCOUT_UNCONNECTED ; + wire \NLW_blk00000003/blk000000eb_UNDERFLOW_UNCONNECTED ; + wire \NLW_blk00000003/blk000000eb_PATTERNDETECT_UNCONNECTED ; + wire \NLW_blk00000003/blk000000eb_OVERFLOW_UNCONNECTED ; + wire \NLW_blk00000003/blk000000eb_ACOUT<29>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000eb_ACOUT<28>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000eb_ACOUT<27>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000eb_ACOUT<26>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000eb_ACOUT<25>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000eb_ACOUT<24>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000eb_ACOUT<23>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000eb_ACOUT<22>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000eb_ACOUT<21>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000eb_ACOUT<20>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000eb_ACOUT<19>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000eb_ACOUT<18>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000eb_ACOUT<17>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000eb_ACOUT<16>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000eb_ACOUT<15>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000eb_ACOUT<14>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000eb_ACOUT<13>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000eb_ACOUT<12>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000eb_ACOUT<11>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000eb_ACOUT<10>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000eb_ACOUT<9>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000eb_ACOUT<8>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000eb_ACOUT<7>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000eb_ACOUT<6>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000eb_ACOUT<5>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000eb_ACOUT<4>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000eb_ACOUT<3>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000eb_ACOUT<2>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000eb_ACOUT<1>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000eb_ACOUT<0>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000eb_CARRYOUT<3>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000eb_CARRYOUT<2>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000eb_CARRYOUT<1>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000eb_CARRYOUT<0>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000eb_BCOUT<17>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000eb_BCOUT<16>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000eb_BCOUT<15>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000eb_BCOUT<14>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000eb_BCOUT<13>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000eb_BCOUT<12>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000eb_BCOUT<11>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000eb_BCOUT<10>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000eb_BCOUT<9>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000eb_BCOUT<8>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000eb_BCOUT<7>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000eb_BCOUT<6>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000eb_BCOUT<5>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000eb_BCOUT<4>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000eb_BCOUT<3>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000eb_BCOUT<2>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000eb_BCOUT<1>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000eb_BCOUT<0>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000eb_P<47>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000eb_P<46>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000eb_P<45>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000eb_P<44>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000eb_P<43>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000eb_P<42>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000eb_P<41>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000eb_P<40>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000eb_P<39>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000eb_P<38>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000eb_P<37>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000eb_P<36>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000eb_P<35>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000eb_P<34>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000eb_P<33>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000eb_P<32>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000eb_P<31>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000eb_P<30>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000eb_P<29>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000eb_P<28>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000eb_P<27>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000eb_P<26>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000eb_P<25>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000eb_P<24>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000eb_P<23>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000eb_P<22>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000eb_P<21>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000eb_P<20>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000eb_P<19>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000eb_P<18>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000eb_P<17>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000eb_P<16>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000eb_P<15>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000eb_P<14>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000eb_P<13>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000eb_P<12>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000eb_P<11>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000eb_P<10>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000eb_P<9>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000eb_P<8>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000eb_P<7>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000eb_P<6>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000eb_P<5>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000eb_P<4>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000eb_P<3>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000eb_P<2>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000eb_P<1>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000eb_P<0>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000ea_PATTERNBDETECT_UNCONNECTED ; + wire \NLW_blk00000003/blk000000ea_MULTSIGNOUT_UNCONNECTED ; + wire \NLW_blk00000003/blk000000ea_CARRYCASCOUT_UNCONNECTED ; + wire \NLW_blk00000003/blk000000ea_UNDERFLOW_UNCONNECTED ; + wire \NLW_blk00000003/blk000000ea_PATTERNDETECT_UNCONNECTED ; + wire \NLW_blk00000003/blk000000ea_OVERFLOW_UNCONNECTED ; + wire \NLW_blk00000003/blk000000ea_ACOUT<29>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000ea_ACOUT<28>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000ea_ACOUT<27>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000ea_ACOUT<26>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000ea_ACOUT<25>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000ea_ACOUT<24>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000ea_ACOUT<23>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000ea_ACOUT<22>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000ea_ACOUT<21>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000ea_ACOUT<20>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000ea_ACOUT<19>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000ea_ACOUT<18>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000ea_ACOUT<17>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000ea_ACOUT<16>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000ea_ACOUT<15>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000ea_ACOUT<14>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000ea_ACOUT<13>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000ea_ACOUT<12>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000ea_ACOUT<11>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000ea_ACOUT<10>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000ea_ACOUT<9>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000ea_ACOUT<8>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000ea_ACOUT<7>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000ea_ACOUT<6>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000ea_ACOUT<5>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000ea_ACOUT<4>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000ea_ACOUT<3>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000ea_ACOUT<2>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000ea_ACOUT<1>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000ea_ACOUT<0>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000ea_CARRYOUT<3>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000ea_CARRYOUT<2>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000ea_CARRYOUT<1>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000ea_CARRYOUT<0>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000ea_BCOUT<17>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000ea_BCOUT<16>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000ea_BCOUT<15>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000ea_BCOUT<14>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000ea_BCOUT<13>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000ea_BCOUT<12>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000ea_BCOUT<11>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000ea_BCOUT<10>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000ea_BCOUT<9>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000ea_BCOUT<8>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000ea_BCOUT<7>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000ea_BCOUT<6>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000ea_BCOUT<5>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000ea_BCOUT<4>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000ea_BCOUT<3>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000ea_BCOUT<2>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000ea_BCOUT<1>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000ea_BCOUT<0>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000ea_P<47>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000ea_P<46>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000ea_P<45>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000ea_P<44>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000ea_P<43>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000ea_P<42>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000ea_P<41>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000ea_P<40>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000ea_P<39>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000ea_P<38>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000ea_P<37>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000ea_P<36>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000ea_P<35>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000ea_P<34>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000ea_P<33>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000ea_P<32>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000ea_P<31>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000ea_P<30>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000ea_P<29>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000ea_P<28>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000ea_P<27>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000ea_P<26>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000ea_P<25>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000ea_P<24>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000ea_P<23>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000ea_P<22>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000ea_P<21>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000ea_P<20>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000ea_P<19>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000ea_P<18>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000ea_P<17>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000ea_P<16>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000ea_P<15>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000ea_P<14>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000ea_P<13>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000ea_P<12>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000ea_P<11>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000ea_P<10>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000ea_P<9>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000ea_P<8>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000ea_P<7>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000ea_P<6>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000ea_P<5>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000ea_P<4>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000ea_P<3>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000ea_P<2>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000ea_P<1>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000ea_P<0>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000e9_PATTERNBDETECT_UNCONNECTED ; + wire \NLW_blk00000003/blk000000e9_MULTSIGNOUT_UNCONNECTED ; + wire \NLW_blk00000003/blk000000e9_CARRYCASCOUT_UNCONNECTED ; + wire \NLW_blk00000003/blk000000e9_UNDERFLOW_UNCONNECTED ; + wire \NLW_blk00000003/blk000000e9_PATTERNDETECT_UNCONNECTED ; + wire \NLW_blk00000003/blk000000e9_OVERFLOW_UNCONNECTED ; + wire \NLW_blk00000003/blk000000e9_ACOUT<29>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000e9_ACOUT<28>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000e9_ACOUT<27>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000e9_ACOUT<26>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000e9_ACOUT<25>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000e9_ACOUT<24>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000e9_ACOUT<23>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000e9_ACOUT<22>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000e9_ACOUT<21>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000e9_ACOUT<20>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000e9_ACOUT<19>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000e9_ACOUT<18>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000e9_ACOUT<17>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000e9_ACOUT<16>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000e9_ACOUT<15>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000e9_ACOUT<14>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000e9_ACOUT<13>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000e9_ACOUT<12>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000e9_ACOUT<11>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000e9_ACOUT<10>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000e9_ACOUT<9>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000e9_ACOUT<8>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000e9_ACOUT<7>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000e9_ACOUT<6>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000e9_ACOUT<5>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000e9_ACOUT<4>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000e9_ACOUT<3>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000e9_ACOUT<2>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000e9_ACOUT<1>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000e9_ACOUT<0>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000e9_CARRYOUT<3>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000e9_CARRYOUT<2>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000e9_CARRYOUT<1>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000e9_CARRYOUT<0>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000e9_BCOUT<17>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000e9_BCOUT<16>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000e9_BCOUT<15>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000e9_BCOUT<14>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000e9_BCOUT<13>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000e9_BCOUT<12>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000e9_BCOUT<11>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000e9_BCOUT<10>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000e9_BCOUT<9>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000e9_BCOUT<8>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000e9_BCOUT<7>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000e9_BCOUT<6>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000e9_BCOUT<5>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000e9_BCOUT<4>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000e9_BCOUT<3>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000e9_BCOUT<2>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000e9_BCOUT<1>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000e9_BCOUT<0>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000e9_P<47>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000e9_P<46>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000e9_P<45>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000e9_P<44>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000e9_P<43>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000e9_P<42>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000e9_P<41>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000e9_P<40>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000e9_P<39>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000e9_P<38>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000e9_P<37>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000e9_P<36>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000e9_P<35>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000e9_P<34>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000e9_P<33>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000e9_P<32>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000e9_P<31>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000e9_P<30>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000e9_P<29>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000e9_P<28>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000e9_P<27>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000e9_P<26>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000e9_P<25>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000e9_P<24>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000e9_P<23>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000e9_P<22>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000e9_P<21>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000e9_P<20>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000e9_P<19>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000e9_P<18>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000e9_P<17>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000e9_P<16>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000e9_P<15>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000e9_P<14>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000e9_P<13>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000e9_P<12>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000e9_P<11>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000e9_P<10>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000e9_P<9>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000e9_P<8>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000e9_P<7>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000e9_P<6>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000e9_P<5>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000e9_P<4>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000e9_P<3>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000e9_P<2>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000e9_P<1>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000e9_P<0>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000e8_PATTERNBDETECT_UNCONNECTED ; + wire \NLW_blk00000003/blk000000e8_MULTSIGNOUT_UNCONNECTED ; + wire \NLW_blk00000003/blk000000e8_CARRYCASCOUT_UNCONNECTED ; + wire \NLW_blk00000003/blk000000e8_UNDERFLOW_UNCONNECTED ; + wire \NLW_blk00000003/blk000000e8_PATTERNDETECT_UNCONNECTED ; + wire \NLW_blk00000003/blk000000e8_OVERFLOW_UNCONNECTED ; + wire \NLW_blk00000003/blk000000e8_ACOUT<29>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000e8_ACOUT<28>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000e8_ACOUT<27>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000e8_ACOUT<26>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000e8_ACOUT<25>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000e8_ACOUT<24>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000e8_ACOUT<23>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000e8_ACOUT<22>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000e8_ACOUT<21>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000e8_ACOUT<20>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000e8_ACOUT<19>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000e8_ACOUT<18>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000e8_ACOUT<17>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000e8_ACOUT<16>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000e8_ACOUT<15>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000e8_ACOUT<14>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000e8_ACOUT<13>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000e8_ACOUT<12>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000e8_ACOUT<11>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000e8_ACOUT<10>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000e8_ACOUT<9>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000e8_ACOUT<8>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000e8_ACOUT<7>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000e8_ACOUT<6>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000e8_ACOUT<5>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000e8_ACOUT<4>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000e8_ACOUT<3>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000e8_ACOUT<2>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000e8_ACOUT<1>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000e8_ACOUT<0>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000e8_CARRYOUT<3>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000e8_CARRYOUT<2>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000e8_CARRYOUT<1>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000e8_CARRYOUT<0>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000e8_BCOUT<17>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000e8_BCOUT<16>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000e8_BCOUT<15>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000e8_BCOUT<14>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000e8_BCOUT<13>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000e8_BCOUT<12>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000e8_BCOUT<11>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000e8_BCOUT<10>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000e8_BCOUT<9>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000e8_BCOUT<8>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000e8_BCOUT<7>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000e8_BCOUT<6>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000e8_BCOUT<5>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000e8_BCOUT<4>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000e8_BCOUT<3>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000e8_BCOUT<2>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000e8_BCOUT<1>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000e8_BCOUT<0>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000e8_P<47>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000e8_P<46>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000e8_P<45>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000e8_P<44>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000e8_P<43>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000e8_P<42>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000e8_P<41>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000e8_P<40>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000e8_P<39>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000e8_P<38>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000e8_P<37>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000e8_P<36>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000e8_P<35>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000e8_P<34>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000e8_P<33>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000e8_P<32>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000e8_P<31>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000e8_P<30>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000e8_P<29>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000e8_P<28>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000e8_P<27>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000e8_P<26>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000e8_P<25>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000e8_P<24>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000e8_P<23>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000e8_P<22>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000e8_P<21>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000e8_P<20>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000e8_P<19>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000e8_P<18>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000e8_P<17>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000e8_P<16>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000e8_P<15>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000e8_P<14>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000e8_P<13>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000e8_P<12>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000e8_P<11>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000e8_P<10>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000e8_P<9>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000e8_P<8>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000e8_P<7>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000e8_P<6>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000e8_P<5>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000e8_P<4>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000e8_P<3>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000e8_P<2>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000e8_P<1>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000e8_P<0>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000e7_PATTERNBDETECT_UNCONNECTED ; + wire \NLW_blk00000003/blk000000e7_MULTSIGNOUT_UNCONNECTED ; + wire \NLW_blk00000003/blk000000e7_CARRYCASCOUT_UNCONNECTED ; + wire \NLW_blk00000003/blk000000e7_UNDERFLOW_UNCONNECTED ; + wire \NLW_blk00000003/blk000000e7_PATTERNDETECT_UNCONNECTED ; + wire \NLW_blk00000003/blk000000e7_OVERFLOW_UNCONNECTED ; + wire \NLW_blk00000003/blk000000e7_ACOUT<29>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000e7_ACOUT<28>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000e7_ACOUT<27>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000e7_ACOUT<26>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000e7_ACOUT<25>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000e7_ACOUT<24>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000e7_ACOUT<23>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000e7_ACOUT<22>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000e7_ACOUT<21>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000e7_ACOUT<20>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000e7_ACOUT<19>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000e7_ACOUT<18>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000e7_ACOUT<17>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000e7_ACOUT<16>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000e7_ACOUT<15>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000e7_ACOUT<14>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000e7_ACOUT<13>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000e7_ACOUT<12>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000e7_ACOUT<11>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000e7_ACOUT<10>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000e7_ACOUT<9>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000e7_ACOUT<8>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000e7_ACOUT<7>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000e7_ACOUT<6>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000e7_ACOUT<5>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000e7_ACOUT<4>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000e7_ACOUT<3>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000e7_ACOUT<2>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000e7_ACOUT<1>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000e7_ACOUT<0>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000e7_CARRYOUT<3>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000e7_CARRYOUT<2>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000e7_CARRYOUT<1>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000e7_CARRYOUT<0>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000e7_BCOUT<17>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000e7_BCOUT<16>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000e7_BCOUT<15>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000e7_BCOUT<14>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000e7_BCOUT<13>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000e7_BCOUT<12>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000e7_BCOUT<11>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000e7_BCOUT<10>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000e7_BCOUT<9>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000e7_BCOUT<8>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000e7_BCOUT<7>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000e7_BCOUT<6>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000e7_BCOUT<5>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000e7_BCOUT<4>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000e7_BCOUT<3>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000e7_BCOUT<2>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000e7_BCOUT<1>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000e7_BCOUT<0>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000e7_P<47>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000e7_P<46>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000e7_P<45>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000e7_P<44>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000e7_P<43>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000e7_P<42>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000e7_P<41>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000e7_P<40>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000e7_P<39>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000e7_P<38>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000e7_P<37>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000e7_P<36>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000e7_P<35>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000e7_P<34>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000e7_P<33>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000e7_P<32>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000e7_P<31>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000e7_P<30>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000e7_P<29>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000e7_P<28>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000e7_P<27>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000e7_P<26>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000e7_P<25>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000e7_P<24>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000e7_P<23>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000e7_P<22>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000e7_P<21>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000e7_P<20>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000e7_P<19>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000e7_P<18>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000e7_P<17>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000e7_P<16>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000e7_P<15>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000e7_P<14>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000e7_P<13>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000e7_P<12>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000e7_P<11>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000e7_P<10>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000e7_P<9>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000e7_P<8>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000e7_P<7>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000e7_P<6>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000e7_P<5>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000e7_P<4>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000e7_P<3>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000e7_P<2>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000e7_P<1>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000e7_P<0>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000e2_O_UNCONNECTED ; + wire \NLW_blk00000003/blk000000e2_LO_UNCONNECTED ; + wire \NLW_blk00000003/blk000000df_O_UNCONNECTED ; + wire \NLW_blk00000003/blk000000df_LO_UNCONNECTED ; + wire \NLW_blk00000003/blk000000dc_O_UNCONNECTED ; + wire \NLW_blk00000003/blk000000dc_LO_UNCONNECTED ; + wire \NLW_blk00000003/blk000000da_O_UNCONNECTED ; + wire \NLW_blk00000003/blk000000da_LO_UNCONNECTED ; + wire \NLW_blk00000003/blk000000d6_O_UNCONNECTED ; + wire \NLW_blk00000003/blk000000d6_LO_UNCONNECTED ; + wire \NLW_blk00000003/blk000000d0_LO_UNCONNECTED ; + wire \NLW_blk00000003/blk000000cf_LO_UNCONNECTED ; + wire \NLW_blk00000003/blk000000ce_LO_UNCONNECTED ; + wire \NLW_blk00000003/blk000000cd_LO_UNCONNECTED ; + wire \NLW_blk00000003/blk000000cc_LO_UNCONNECTED ; + wire \NLW_blk00000003/blk000000cb_O_UNCONNECTED ; + wire \NLW_blk00000003/blk000000c7_LO_UNCONNECTED ; + wire \NLW_blk00000003/blk000000c6_LO_UNCONNECTED ; + wire \NLW_blk00000003/blk000000c5_LO_UNCONNECTED ; + wire \NLW_blk00000003/blk000000c4_LO_UNCONNECTED ; + wire \NLW_blk00000003/blk000000c3_LO_UNCONNECTED ; + wire \NLW_blk00000003/blk000000c2_O_UNCONNECTED ; + wire \NLW_blk00000003/blk000000c1_LO_UNCONNECTED ; + wire \NLW_blk00000003/blk000000bb_O_UNCONNECTED ; + wire \NLW_blk00000003/blk000000bb_LO_UNCONNECTED ; + wire \NLW_blk00000003/blk000000b8_O_UNCONNECTED ; + wire \NLW_blk00000003/blk000000b8_LO_UNCONNECTED ; + wire \NLW_blk00000003/blk000000a4_Q_UNCONNECTED ; + wire \NLW_blk00000003/blk000000a2_Q_UNCONNECTED ; + wire \NLW_blk00000003/blk0000009a_LO_UNCONNECTED ; + wire \NLW_blk00000003/blk00000099_O_UNCONNECTED ; + wire \NLW_blk00000003/blk00000098_O_UNCONNECTED ; + wire \NLW_blk00000003/blk00000097_LO_UNCONNECTED ; + wire \NLW_blk00000003/blk00000096_O_UNCONNECTED ; + wire \NLW_blk00000003/blk00000094_O_UNCONNECTED ; + wire \NLW_blk00000003/blk00000094_LO_UNCONNECTED ; + wire \NLW_blk00000003/blk00000092_O_UNCONNECTED ; + wire \NLW_blk00000003/blk00000091_LO_UNCONNECTED ; + wire \NLW_blk00000003/blk0000001d_Q_UNCONNECTED ; + wire \NLW_blk00000003/blk00000019_Q_UNCONNECTED ; + wire \NLW_blk00000003/blk00000017_O_UNCONNECTED ; + wire \NLW_blk00000003/blk00000016_PATTERNBDETECT_UNCONNECTED ; + wire \NLW_blk00000003/blk00000016_MULTSIGNOUT_UNCONNECTED ; + wire \NLW_blk00000003/blk00000016_CARRYCASCOUT_UNCONNECTED ; + wire \NLW_blk00000003/blk00000016_UNDERFLOW_UNCONNECTED ; + wire \NLW_blk00000003/blk00000016_PATTERNDETECT_UNCONNECTED ; + wire \NLW_blk00000003/blk00000016_OVERFLOW_UNCONNECTED ; + wire \NLW_blk00000003/blk00000016_ACOUT<29>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000016_ACOUT<28>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000016_ACOUT<27>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000016_ACOUT<26>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000016_ACOUT<25>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000016_ACOUT<24>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000016_ACOUT<23>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000016_ACOUT<22>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000016_ACOUT<21>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000016_ACOUT<20>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000016_ACOUT<19>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000016_ACOUT<18>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000016_ACOUT<17>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000016_ACOUT<16>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000016_ACOUT<15>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000016_ACOUT<14>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000016_ACOUT<13>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000016_ACOUT<12>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000016_ACOUT<11>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000016_ACOUT<10>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000016_ACOUT<9>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000016_ACOUT<8>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000016_ACOUT<7>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000016_ACOUT<6>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000016_ACOUT<5>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000016_ACOUT<4>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000016_ACOUT<3>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000016_ACOUT<2>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000016_ACOUT<1>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000016_ACOUT<0>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000016_CARRYOUT<3>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000016_CARRYOUT<2>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000016_CARRYOUT<1>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000016_CARRYOUT<0>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000016_BCOUT<17>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000016_BCOUT<16>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000016_BCOUT<15>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000016_BCOUT<14>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000016_BCOUT<13>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000016_BCOUT<12>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000016_BCOUT<11>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000016_BCOUT<10>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000016_BCOUT<9>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000016_BCOUT<8>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000016_BCOUT<7>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000016_BCOUT<6>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000016_BCOUT<5>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000016_BCOUT<4>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000016_BCOUT<3>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000016_BCOUT<2>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000016_BCOUT<1>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000016_BCOUT<0>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000016_P<47>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000016_PCOUT<47>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000016_PCOUT<46>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000016_PCOUT<45>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000016_PCOUT<44>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000016_PCOUT<43>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000016_PCOUT<42>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000016_PCOUT<41>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000016_PCOUT<40>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000016_PCOUT<39>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000016_PCOUT<38>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000016_PCOUT<37>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000016_PCOUT<36>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000016_PCOUT<35>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000016_PCOUT<34>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000016_PCOUT<33>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000016_PCOUT<32>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000016_PCOUT<31>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000016_PCOUT<30>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000016_PCOUT<29>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000016_PCOUT<28>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000016_PCOUT<27>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000016_PCOUT<26>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000016_PCOUT<25>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000016_PCOUT<24>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000016_PCOUT<23>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000016_PCOUT<22>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000016_PCOUT<21>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000016_PCOUT<20>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000016_PCOUT<19>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000016_PCOUT<18>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000016_PCOUT<17>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000016_PCOUT<16>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000016_PCOUT<15>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000016_PCOUT<14>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000016_PCOUT<13>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000016_PCOUT<12>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000016_PCOUT<11>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000016_PCOUT<10>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000016_PCOUT<9>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000016_PCOUT<8>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000016_PCOUT<7>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000016_PCOUT<6>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000016_PCOUT<5>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000016_PCOUT<4>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000016_PCOUT<3>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000016_PCOUT<2>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000016_PCOUT<1>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000016_PCOUT<0>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000015_PATTERNBDETECT_UNCONNECTED ; + wire \NLW_blk00000003/blk00000015_MULTSIGNOUT_UNCONNECTED ; + wire \NLW_blk00000003/blk00000015_CARRYCASCOUT_UNCONNECTED ; + wire \NLW_blk00000003/blk00000015_UNDERFLOW_UNCONNECTED ; + wire \NLW_blk00000003/blk00000015_PATTERNDETECT_UNCONNECTED ; + wire \NLW_blk00000003/blk00000015_OVERFLOW_UNCONNECTED ; + wire \NLW_blk00000003/blk00000015_ACOUT<29>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000015_ACOUT<28>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000015_ACOUT<27>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000015_ACOUT<26>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000015_ACOUT<25>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000015_ACOUT<24>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000015_ACOUT<23>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000015_ACOUT<22>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000015_ACOUT<21>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000015_ACOUT<20>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000015_ACOUT<19>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000015_ACOUT<18>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000015_ACOUT<17>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000015_ACOUT<16>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000015_ACOUT<15>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000015_ACOUT<14>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000015_ACOUT<13>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000015_ACOUT<12>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000015_ACOUT<11>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000015_ACOUT<10>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000015_ACOUT<9>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000015_ACOUT<8>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000015_ACOUT<7>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000015_ACOUT<6>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000015_ACOUT<5>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000015_ACOUT<4>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000015_ACOUT<3>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000015_ACOUT<2>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000015_ACOUT<1>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000015_ACOUT<0>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000015_CARRYOUT<3>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000015_CARRYOUT<2>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000015_CARRYOUT<1>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000015_CARRYOUT<0>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000015_BCOUT<17>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000015_BCOUT<16>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000015_BCOUT<15>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000015_BCOUT<14>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000015_BCOUT<13>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000015_BCOUT<12>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000015_BCOUT<11>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000015_BCOUT<10>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000015_BCOUT<9>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000015_BCOUT<8>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000015_BCOUT<7>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000015_BCOUT<6>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000015_BCOUT<5>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000015_BCOUT<4>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000015_BCOUT<3>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000015_BCOUT<2>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000015_BCOUT<1>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000015_BCOUT<0>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000015_P<47>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000015_PCOUT<47>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000015_PCOUT<46>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000015_PCOUT<45>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000015_PCOUT<44>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000015_PCOUT<43>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000015_PCOUT<42>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000015_PCOUT<41>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000015_PCOUT<40>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000015_PCOUT<39>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000015_PCOUT<38>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000015_PCOUT<37>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000015_PCOUT<36>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000015_PCOUT<35>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000015_PCOUT<34>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000015_PCOUT<33>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000015_PCOUT<32>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000015_PCOUT<31>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000015_PCOUT<30>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000015_PCOUT<29>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000015_PCOUT<28>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000015_PCOUT<27>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000015_PCOUT<26>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000015_PCOUT<25>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000015_PCOUT<24>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000015_PCOUT<23>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000015_PCOUT<22>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000015_PCOUT<21>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000015_PCOUT<20>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000015_PCOUT<19>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000015_PCOUT<18>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000015_PCOUT<17>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000015_PCOUT<16>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000015_PCOUT<15>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000015_PCOUT<14>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000015_PCOUT<13>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000015_PCOUT<12>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000015_PCOUT<11>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000015_PCOUT<10>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000015_PCOUT<9>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000015_PCOUT<8>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000015_PCOUT<7>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000015_PCOUT<6>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000015_PCOUT<5>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000015_PCOUT<4>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000015_PCOUT<3>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000015_PCOUT<2>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000015_PCOUT<1>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000015_PCOUT<0>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000014_LO_UNCONNECTED ; + wire \NLW_blk00000003/blk00000011_O_UNCONNECTED ; + wire \NLW_blk00000003/blk00000010_LO_UNCONNECTED ; + wire \NLW_blk00000003/blk0000000b_O_UNCONNECTED ; + wire \NLW_blk00000003/blk0000000b_LO_UNCONNECTED ; + wire \NLW_blk00000003/blk0000000a_O_UNCONNECTED ; + wire \NLW_blk00000003/blk00000008_LO_UNCONNECTED ; + wire \NLW_blk00000003/blk0000002c/blk0000008d_SPO_UNCONNECTED ; + wire \NLW_blk00000003/blk0000002c/blk0000008c_SPO_UNCONNECTED ; + wire \NLW_blk00000003/blk0000002c/blk0000008b_SPO_UNCONNECTED ; + wire \NLW_blk00000003/blk0000002c/blk0000008a_SPO_UNCONNECTED ; + wire \NLW_blk00000003/blk0000002c/blk00000089_SPO_UNCONNECTED ; + wire \NLW_blk00000003/blk0000002c/blk00000088_SPO_UNCONNECTED ; + wire \NLW_blk00000003/blk0000002c/blk00000087_SPO_UNCONNECTED ; + wire \NLW_blk00000003/blk0000002c/blk00000086_SPO_UNCONNECTED ; + wire \NLW_blk00000003/blk0000002c/blk00000085_SPO_UNCONNECTED ; + wire \NLW_blk00000003/blk0000002c/blk00000084_SPO_UNCONNECTED ; + wire \NLW_blk00000003/blk0000002c/blk00000083_SPO_UNCONNECTED ; + wire \NLW_blk00000003/blk0000002c/blk00000082_SPO_UNCONNECTED ; + wire \NLW_blk00000003/blk0000002c/blk00000081_SPO_UNCONNECTED ; + wire \NLW_blk00000003/blk0000002c/blk00000080_SPO_UNCONNECTED ; + wire \NLW_blk00000003/blk0000002c/blk0000007f_SPO_UNCONNECTED ; + wire \NLW_blk00000003/blk0000002c/blk0000007e_SPO_UNCONNECTED ; + wire \NLW_blk00000003/blk0000002c/blk0000007d_SPO_UNCONNECTED ; + wire \NLW_blk00000003/blk0000002c/blk0000007c_SPO_UNCONNECTED ; + wire \NLW_blk00000003/blk0000002c/blk0000007b_SPO_UNCONNECTED ; + wire \NLW_blk00000003/blk0000002c/blk0000007a_SPO_UNCONNECTED ; + wire \NLW_blk00000003/blk0000002c/blk00000079_SPO_UNCONNECTED ; + wire \NLW_blk00000003/blk0000002c/blk00000078_SPO_UNCONNECTED ; + wire \NLW_blk00000003/blk0000002c/blk00000077_SPO_UNCONNECTED ; + wire \NLW_blk00000003/blk0000002c/blk00000076_SPO_UNCONNECTED ; + wire \NLW_blk00000003/blk0000002c/blk00000075_SPO_UNCONNECTED ; + wire \NLW_blk00000003/blk0000002c/blk00000074_SPO_UNCONNECTED ; + wire \NLW_blk00000003/blk0000002c/blk00000073_SPO_UNCONNECTED ; + wire \NLW_blk00000003/blk0000002c/blk00000072_SPO_UNCONNECTED ; + wire \NLW_blk00000003/blk0000002c/blk00000071_SPO_UNCONNECTED ; + wire \NLW_blk00000003/blk0000002c/blk00000070_SPO_UNCONNECTED ; + wire \NLW_blk00000003/blk0000002c/blk0000006f_SPO_UNCONNECTED ; + wire \NLW_blk00000003/blk0000002c/blk0000006e_SPO_UNCONNECTED ; + wire \NLW_blk00000003/blk0000002c/blk0000006d_SPO_UNCONNECTED ; + wire \NLW_blk00000003/blk0000002c/blk0000006c_SPO_UNCONNECTED ; + wire \NLW_blk00000003/blk0000002c/blk0000006b_SPO_UNCONNECTED ; + wire \NLW_blk00000003/blk0000002c/blk0000006a_SPO_UNCONNECTED ; + wire \NLW_blk00000003/blk0000002c/blk00000069_SPO_UNCONNECTED ; + wire \NLW_blk00000003/blk0000002c/blk00000068_SPO_UNCONNECTED ; + wire \NLW_blk00000003/blk0000002c/blk00000067_SPO_UNCONNECTED ; + wire \NLW_blk00000003/blk0000002c/blk00000066_SPO_UNCONNECTED ; + wire \NLW_blk00000003/blk0000002c/blk00000065_SPO_UNCONNECTED ; + wire \NLW_blk00000003/blk0000002c/blk00000064_SPO_UNCONNECTED ; + wire \NLW_blk00000003/blk0000002c/blk00000063_SPO_UNCONNECTED ; + wire \NLW_blk00000003/blk0000002c/blk00000062_SPO_UNCONNECTED ; + wire \NLW_blk00000003/blk0000002c/blk00000061_SPO_UNCONNECTED ; + wire \NLW_blk00000003/blk0000002c/blk00000060_SPO_UNCONNECTED ; + wire \NLW_blk00000003/blk0000002c/blk0000005f_SPO_UNCONNECTED ; + wire \NLW_blk00000003/blk0000002c/blk0000005e_SPO_UNCONNECTED ; + wire \NLW_blk00000003/blk00000120/blk00000151_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000120/blk00000150_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000120/blk0000014f_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000120/blk0000014e_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000120/blk0000014d_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000120/blk0000014c_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000120/blk0000014b_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000120/blk0000014a_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000120/blk00000149_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000120/blk00000148_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000120/blk00000147_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000120/blk00000146_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000120/blk00000145_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000120/blk00000144_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000120/blk00000143_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000120/blk00000142_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000120/blk00000141_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000120/blk00000140_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000120/blk0000013f_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000120/blk0000013e_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000120/blk0000013d_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000120/blk0000013c_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000120/blk0000013b_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000120/blk0000013a_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000153/blk00000184_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000153/blk00000183_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000153/blk00000182_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000153/blk00000181_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000153/blk00000180_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000153/blk0000017f_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000153/blk0000017e_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000153/blk0000017d_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000153/blk0000017c_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000153/blk0000017b_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000153/blk0000017a_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000153/blk00000179_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000153/blk00000178_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000153/blk00000177_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000153/blk00000176_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000153/blk00000175_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000153/blk00000174_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000153/blk00000173_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000153/blk00000172_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000153/blk00000171_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000153/blk00000170_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000153/blk0000016f_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000153/blk0000016e_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000153/blk0000016d_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000186/blk000001b7_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000186/blk000001b6_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000186/blk000001b5_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000186/blk000001b4_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000186/blk000001b3_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000186/blk000001b2_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000186/blk000001b1_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000186/blk000001b0_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000186/blk000001af_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000186/blk000001ae_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000186/blk000001ad_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000186/blk000001ac_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000186/blk000001ab_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000186/blk000001aa_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000186/blk000001a9_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000186/blk000001a8_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000186/blk000001a7_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000186/blk000001a6_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000186/blk000001a5_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000186/blk000001a4_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000186/blk000001a3_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000186/blk000001a2_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000186/blk000001a1_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000186/blk000001a0_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk000001b9/blk000001ea_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk000001b9/blk000001e9_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk000001b9/blk000001e8_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk000001b9/blk000001e7_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk000001b9/blk000001e6_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk000001b9/blk000001e5_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk000001b9/blk000001e4_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk000001b9/blk000001e3_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk000001b9/blk000001e2_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk000001b9/blk000001e1_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk000001b9/blk000001e0_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk000001b9/blk000001df_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk000001b9/blk000001de_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk000001b9/blk000001dd_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk000001b9/blk000001dc_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk000001b9/blk000001db_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk000001b9/blk000001da_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk000001b9/blk000001d9_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk000001b9/blk000001d8_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk000001b9/blk000001d7_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk000001b9/blk000001d6_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk000001b9/blk000001d5_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk000001b9/blk000001d4_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk000001b9/blk000001d3_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk000001ec/blk0000021d_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk000001ec/blk0000021c_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk000001ec/blk0000021b_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk000001ec/blk0000021a_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk000001ec/blk00000219_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk000001ec/blk00000218_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk000001ec/blk00000217_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk000001ec/blk00000216_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk000001ec/blk00000215_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk000001ec/blk00000214_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk000001ec/blk00000213_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk000001ec/blk00000212_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk000001ec/blk00000211_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk000001ec/blk00000210_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk000001ec/blk0000020f_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk000001ec/blk0000020e_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk000001ec/blk0000020d_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk000001ec/blk0000020c_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk000001ec/blk0000020b_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk000001ec/blk0000020a_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk000001ec/blk00000209_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk000001ec/blk00000208_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk000001ec/blk00000207_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk000001ec/blk00000206_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk0000021f/blk00000250_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk0000021f/blk0000024f_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk0000021f/blk0000024e_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk0000021f/blk0000024d_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk0000021f/blk0000024c_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk0000021f/blk0000024b_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk0000021f/blk0000024a_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk0000021f/blk00000249_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk0000021f/blk00000248_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk0000021f/blk00000247_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk0000021f/blk00000246_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk0000021f/blk00000245_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk0000021f/blk00000244_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk0000021f/blk00000243_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk0000021f/blk00000242_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk0000021f/blk00000241_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk0000021f/blk00000240_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk0000021f/blk0000023f_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk0000021f/blk0000023e_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk0000021f/blk0000023d_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk0000021f/blk0000023c_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk0000021f/blk0000023b_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk0000021f/blk0000023a_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk0000021f/blk00000239_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000252/blk00000283_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000252/blk00000282_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000252/blk00000281_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000252/blk00000280_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000252/blk0000027f_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000252/blk0000027e_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000252/blk0000027d_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000252/blk0000027c_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000252/blk0000027b_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000252/blk0000027a_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000252/blk00000279_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000252/blk00000278_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000252/blk00000277_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000252/blk00000276_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000252/blk00000275_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000252/blk00000274_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000252/blk00000273_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000252/blk00000272_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000252/blk00000271_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000252/blk00000270_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000252/blk0000026f_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000252/blk0000026e_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000252/blk0000026d_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000252/blk0000026c_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000285/blk000002b6_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000285/blk000002b5_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000285/blk000002b4_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000285/blk000002b3_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000285/blk000002b2_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000285/blk000002b1_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000285/blk000002b0_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000285/blk000002af_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000285/blk000002ae_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000285/blk000002ad_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000285/blk000002ac_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000285/blk000002ab_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000285/blk000002aa_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000285/blk000002a9_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000285/blk000002a8_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000285/blk000002a7_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000285/blk000002a6_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000285/blk000002a5_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000285/blk000002a4_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000285/blk000002a3_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000285/blk000002a2_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000285/blk000002a1_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000285/blk000002a0_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000285/blk0000029f_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk000002b8/blk000002e9_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk000002b8/blk000002e8_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk000002b8/blk000002e7_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk000002b8/blk000002e6_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk000002b8/blk000002e5_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk000002b8/blk000002e4_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk000002b8/blk000002e3_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk000002b8/blk000002e2_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk000002b8/blk000002e1_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk000002b8/blk000002e0_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk000002b8/blk000002df_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk000002b8/blk000002de_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk000002b8/blk000002dd_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk000002b8/blk000002dc_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk000002b8/blk000002db_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk000002b8/blk000002da_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk000002b8/blk000002d9_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk000002b8/blk000002d8_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk000002b8/blk000002d7_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk000002b8/blk000002d6_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk000002b8/blk000002d5_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk000002b8/blk000002d4_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk000002b8/blk000002d3_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk000002b8/blk000002d2_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk000002eb/blk0000031c_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk000002eb/blk0000031b_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk000002eb/blk0000031a_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk000002eb/blk00000319_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk000002eb/blk00000318_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk000002eb/blk00000317_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk000002eb/blk00000316_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk000002eb/blk00000315_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk000002eb/blk00000314_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk000002eb/blk00000313_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk000002eb/blk00000312_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk000002eb/blk00000311_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk000002eb/blk00000310_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk000002eb/blk0000030f_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk000002eb/blk0000030e_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk000002eb/blk0000030d_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk000002eb/blk0000030c_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk000002eb/blk0000030b_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk000002eb/blk0000030a_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk000002eb/blk00000309_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk000002eb/blk00000308_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk000002eb/blk00000307_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk000002eb/blk00000306_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk000002eb/blk00000305_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk0000031e/blk0000034f_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk0000031e/blk0000034e_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk0000031e/blk0000034d_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk0000031e/blk0000034c_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk0000031e/blk0000034b_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk0000031e/blk0000034a_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk0000031e/blk00000349_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk0000031e/blk00000348_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk0000031e/blk00000347_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk0000031e/blk00000346_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk0000031e/blk00000345_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk0000031e/blk00000344_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk0000031e/blk00000343_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk0000031e/blk00000342_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk0000031e/blk00000341_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk0000031e/blk00000340_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk0000031e/blk0000033f_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk0000031e/blk0000033e_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk0000031e/blk0000033d_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk0000031e/blk0000033c_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk0000031e/blk0000033b_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk0000031e/blk0000033a_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk0000031e/blk00000339_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk0000031e/blk00000338_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000351/blk00000382_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000351/blk00000381_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000351/blk00000380_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000351/blk0000037f_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000351/blk0000037e_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000351/blk0000037d_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000351/blk0000037c_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000351/blk0000037b_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000351/blk0000037a_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000351/blk00000379_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000351/blk00000378_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000351/blk00000377_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000351/blk00000376_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000351/blk00000375_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000351/blk00000374_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000351/blk00000373_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000351/blk00000372_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000351/blk00000371_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000351/blk00000370_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000351/blk0000036f_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000351/blk0000036e_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000351/blk0000036d_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000351/blk0000036c_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000351/blk0000036b_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000384/blk000003b5_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000384/blk000003b4_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000384/blk000003b3_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000384/blk000003b2_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000384/blk000003b1_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000384/blk000003b0_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000384/blk000003af_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000384/blk000003ae_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000384/blk000003ad_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000384/blk000003ac_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000384/blk000003ab_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000384/blk000003aa_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000384/blk000003a9_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000384/blk000003a8_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000384/blk000003a7_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000384/blk000003a6_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000384/blk000003a5_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000384/blk000003a4_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000384/blk000003a3_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000384/blk000003a2_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000384/blk000003a1_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000384/blk000003a0_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000384/blk0000039f_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000384/blk0000039e_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk000003b7/blk000003e8_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk000003b7/blk000003e7_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk000003b7/blk000003e6_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk000003b7/blk000003e5_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk000003b7/blk000003e4_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk000003b7/blk000003e3_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk000003b7/blk000003e2_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk000003b7/blk000003e1_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk000003b7/blk000003e0_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk000003b7/blk000003df_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk000003b7/blk000003de_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk000003b7/blk000003dd_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk000003b7/blk000003dc_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk000003b7/blk000003db_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk000003b7/blk000003da_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk000003b7/blk000003d9_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk000003b7/blk000003d8_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk000003b7/blk000003d7_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk000003b7/blk000003d6_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk000003b7/blk000003d5_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk000003b7/blk000003d4_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk000003b7/blk000003d3_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk000003b7/blk000003d2_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk000003b7/blk000003d1_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk000003ea/blk0000041b_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk000003ea/blk0000041a_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk000003ea/blk00000419_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk000003ea/blk00000418_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk000003ea/blk00000417_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk000003ea/blk00000416_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk000003ea/blk00000415_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk000003ea/blk00000414_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk000003ea/blk00000413_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk000003ea/blk00000412_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk000003ea/blk00000411_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk000003ea/blk00000410_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk000003ea/blk0000040f_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk000003ea/blk0000040e_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk000003ea/blk0000040d_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk000003ea/blk0000040c_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk000003ea/blk0000040b_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk000003ea/blk0000040a_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk000003ea/blk00000409_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk000003ea/blk00000408_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk000003ea/blk00000407_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk000003ea/blk00000406_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk000003ea/blk00000405_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk000003ea/blk00000404_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk0000041d/blk0000044e_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk0000041d/blk0000044d_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk0000041d/blk0000044c_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk0000041d/blk0000044b_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk0000041d/blk0000044a_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk0000041d/blk00000449_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk0000041d/blk00000448_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk0000041d/blk00000447_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk0000041d/blk00000446_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk0000041d/blk00000445_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk0000041d/blk00000444_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk0000041d/blk00000443_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk0000041d/blk00000442_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk0000041d/blk00000441_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk0000041d/blk00000440_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk0000041d/blk0000043f_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk0000041d/blk0000043e_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk0000041d/blk0000043d_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk0000041d/blk0000043c_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk0000041d/blk0000043b_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk0000041d/blk0000043a_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk0000041d/blk00000439_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk0000041d/blk00000438_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk0000041d/blk00000437_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000450/blk00000481_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000450/blk00000480_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000450/blk0000047f_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000450/blk0000047e_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000450/blk0000047d_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000450/blk0000047c_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000450/blk0000047b_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000450/blk0000047a_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000450/blk00000479_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000450/blk00000478_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000450/blk00000477_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000450/blk00000476_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000450/blk00000475_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000450/blk00000474_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000450/blk00000473_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000450/blk00000472_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000450/blk00000471_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000450/blk00000470_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000450/blk0000046f_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000450/blk0000046e_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000450/blk0000046d_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000450/blk0000046c_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000450/blk0000046b_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000450/blk0000046a_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000483/blk000004b4_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000483/blk000004b3_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000483/blk000004b2_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000483/blk000004b1_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000483/blk000004b0_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000483/blk000004af_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000483/blk000004ae_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000483/blk000004ad_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000483/blk000004ac_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000483/blk000004ab_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000483/blk000004aa_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000483/blk000004a9_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000483/blk000004a8_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000483/blk000004a7_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000483/blk000004a6_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000483/blk000004a5_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000483/blk000004a4_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000483/blk000004a3_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000483/blk000004a2_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000483/blk000004a1_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000483/blk000004a0_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000483/blk0000049f_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000483/blk0000049e_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000483/blk0000049d_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk000004b6/blk000004e7_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk000004b6/blk000004e6_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk000004b6/blk000004e5_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk000004b6/blk000004e4_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk000004b6/blk000004e3_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk000004b6/blk000004e2_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk000004b6/blk000004e1_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk000004b6/blk000004e0_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk000004b6/blk000004df_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk000004b6/blk000004de_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk000004b6/blk000004dd_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk000004b6/blk000004dc_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk000004b6/blk000004db_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk000004b6/blk000004da_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk000004b6/blk000004d9_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk000004b6/blk000004d8_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk000004b6/blk000004d7_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk000004b6/blk000004d6_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk000004b6/blk000004d5_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk000004b6/blk000004d4_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk000004b6/blk000004d3_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk000004b6/blk000004d2_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk000004b6/blk000004d1_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk000004b6/blk000004d0_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk000004e9/blk0000051a_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk000004e9/blk00000519_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk000004e9/blk00000518_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk000004e9/blk00000517_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk000004e9/blk00000516_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk000004e9/blk00000515_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk000004e9/blk00000514_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk000004e9/blk00000513_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk000004e9/blk00000512_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk000004e9/blk00000511_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk000004e9/blk00000510_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk000004e9/blk0000050f_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk000004e9/blk0000050e_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk000004e9/blk0000050d_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk000004e9/blk0000050c_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk000004e9/blk0000050b_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk000004e9/blk0000050a_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk000004e9/blk00000509_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk000004e9/blk00000508_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk000004e9/blk00000507_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk000004e9/blk00000506_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk000004e9/blk00000505_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk000004e9/blk00000504_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk000004e9/blk00000503_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk0000051c/blk0000054d_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk0000051c/blk0000054c_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk0000051c/blk0000054b_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk0000051c/blk0000054a_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk0000051c/blk00000549_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk0000051c/blk00000548_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk0000051c/blk00000547_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk0000051c/blk00000546_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk0000051c/blk00000545_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk0000051c/blk00000544_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk0000051c/blk00000543_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk0000051c/blk00000542_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk0000051c/blk00000541_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk0000051c/blk00000540_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk0000051c/blk0000053f_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk0000051c/blk0000053e_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk0000051c/blk0000053d_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk0000051c/blk0000053c_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk0000051c/blk0000053b_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk0000051c/blk0000053a_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk0000051c/blk00000539_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk0000051c/blk00000538_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk0000051c/blk00000537_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk0000051c/blk00000536_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk0000054f/blk00000580_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk0000054f/blk0000057f_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk0000054f/blk0000057e_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk0000054f/blk0000057d_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk0000054f/blk0000057c_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk0000054f/blk0000057b_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk0000054f/blk0000057a_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk0000054f/blk00000579_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk0000054f/blk00000578_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk0000054f/blk00000577_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk0000054f/blk00000576_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk0000054f/blk00000575_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk0000054f/blk00000574_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk0000054f/blk00000573_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk0000054f/blk00000572_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk0000054f/blk00000571_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk0000054f/blk00000570_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk0000054f/blk0000056f_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk0000054f/blk0000056e_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk0000054f/blk0000056d_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk0000054f/blk0000056c_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk0000054f/blk0000056b_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk0000054f/blk0000056a_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk0000054f/blk00000569_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000582/blk000005b3_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000582/blk000005b2_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000582/blk000005b1_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000582/blk000005b0_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000582/blk000005af_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000582/blk000005ae_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000582/blk000005ad_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000582/blk000005ac_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000582/blk000005ab_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000582/blk000005aa_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000582/blk000005a9_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000582/blk000005a8_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000582/blk000005a7_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000582/blk000005a6_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000582/blk000005a5_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000582/blk000005a4_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000582/blk000005a3_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000582/blk000005a2_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000582/blk000005a1_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000582/blk000005a0_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000582/blk0000059f_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000582/blk0000059e_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000582/blk0000059d_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000582/blk0000059c_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk000005b5/blk000005e6_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk000005b5/blk000005e5_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk000005b5/blk000005e4_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk000005b5/blk000005e3_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk000005b5/blk000005e2_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk000005b5/blk000005e1_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk000005b5/blk000005e0_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk000005b5/blk000005df_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk000005b5/blk000005de_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk000005b5/blk000005dd_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk000005b5/blk000005dc_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk000005b5/blk000005db_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk000005b5/blk000005da_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk000005b5/blk000005d9_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk000005b5/blk000005d8_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk000005b5/blk000005d7_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk000005b5/blk000005d6_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk000005b5/blk000005d5_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk000005b5/blk000005d4_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk000005b5/blk000005d3_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk000005b5/blk000005d2_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk000005b5/blk000005d1_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk000005b5/blk000005d0_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk000005b5/blk000005cf_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000705/blk0000072a_SPO_UNCONNECTED ; + wire \NLW_blk00000003/blk00000705/blk00000729_SPO_UNCONNECTED ; + wire \NLW_blk00000003/blk00000705/blk00000728_SPO_UNCONNECTED ; + wire \NLW_blk00000003/blk00000705/blk00000727_SPO_UNCONNECTED ; + wire \NLW_blk00000003/blk00000705/blk00000726_SPO_UNCONNECTED ; + wire \NLW_blk00000003/blk00000705/blk00000725_SPO_UNCONNECTED ; + wire \NLW_blk00000003/blk00000705/blk00000724_SPO_UNCONNECTED ; + wire \NLW_blk00000003/blk00000705/blk00000723_SPO_UNCONNECTED ; + wire \NLW_blk00000003/blk00000705/blk00000722_SPO_UNCONNECTED ; + wire \NLW_blk00000003/blk00000705/blk00000721_SPO_UNCONNECTED ; + wire \NLW_blk00000003/blk00000705/blk00000720_SPO_UNCONNECTED ; + wire \NLW_blk00000003/blk00000705/blk0000071f_SPO_UNCONNECTED ; + wire \NLW_blk00000003/blk00000705/blk0000071e_SPO_UNCONNECTED ; + wire \NLW_blk00000003/blk00000705/blk0000071d_SPO_UNCONNECTED ; + wire \NLW_blk00000003/blk00000705/blk0000071c_SPO_UNCONNECTED ; + wire \NLW_blk00000003/blk00000705/blk0000071b_SPO_UNCONNECTED ; + wire \NLW_blk00000003/blk00000705/blk0000071a_SPO_UNCONNECTED ; + wire \NLW_blk00000003/blk00000705/blk00000719_SPO_UNCONNECTED ; + wire \NLW_blk00000003/blk0000075c/blk00000781_SPO_UNCONNECTED ; + wire \NLW_blk00000003/blk0000075c/blk00000780_SPO_UNCONNECTED ; + wire \NLW_blk00000003/blk0000075c/blk0000077f_SPO_UNCONNECTED ; + wire \NLW_blk00000003/blk0000075c/blk0000077e_SPO_UNCONNECTED ; + wire \NLW_blk00000003/blk0000075c/blk0000077d_SPO_UNCONNECTED ; + wire \NLW_blk00000003/blk0000075c/blk0000077c_SPO_UNCONNECTED ; + wire \NLW_blk00000003/blk0000075c/blk0000077b_SPO_UNCONNECTED ; + wire \NLW_blk00000003/blk0000075c/blk0000077a_SPO_UNCONNECTED ; + wire \NLW_blk00000003/blk0000075c/blk00000779_SPO_UNCONNECTED ; + wire \NLW_blk00000003/blk0000075c/blk00000778_SPO_UNCONNECTED ; + wire \NLW_blk00000003/blk0000075c/blk00000777_SPO_UNCONNECTED ; + wire \NLW_blk00000003/blk0000075c/blk00000776_SPO_UNCONNECTED ; + wire \NLW_blk00000003/blk0000075c/blk00000775_SPO_UNCONNECTED ; + wire \NLW_blk00000003/blk0000075c/blk00000774_SPO_UNCONNECTED ; + wire \NLW_blk00000003/blk0000075c/blk00000773_SPO_UNCONNECTED ; + wire \NLW_blk00000003/blk0000075c/blk00000772_SPO_UNCONNECTED ; + wire \NLW_blk00000003/blk0000075c/blk00000771_SPO_UNCONNECTED ; + wire \NLW_blk00000003/blk0000075c/blk00000770_SPO_UNCONNECTED ; + wire [17 : 0] coef_din_0; + wire [23 : 0] din_1_1; + wire [23 : 0] din_2_2; + wire [46 : 0] NlwRenamedSig_OI_dout_1; + wire [46 : 0] NlwRenamedSig_OI_dout_2; + assign + rfd = NlwRenamedSig_OI_rfd, + dout_1[46] = NlwRenamedSig_OI_dout_1[46], + dout_1[45] = NlwRenamedSig_OI_dout_1[45], + dout_1[44] = NlwRenamedSig_OI_dout_1[44], + dout_1[43] = NlwRenamedSig_OI_dout_1[43], + dout_1[42] = NlwRenamedSig_OI_dout_1[42], + dout_1[41] = NlwRenamedSig_OI_dout_1[41], + dout_1[40] = NlwRenamedSig_OI_dout_1[40], + dout_1[39] = NlwRenamedSig_OI_dout_1[39], + dout_1[38] = NlwRenamedSig_OI_dout_1[38], + dout_1[37] = NlwRenamedSig_OI_dout_1[37], + dout_1[36] = NlwRenamedSig_OI_dout_1[36], + dout_1[35] = NlwRenamedSig_OI_dout_1[35], + dout_1[34] = NlwRenamedSig_OI_dout_1[34], + dout_1[33] = NlwRenamedSig_OI_dout_1[33], + dout_1[32] = NlwRenamedSig_OI_dout_1[32], + dout_1[31] = NlwRenamedSig_OI_dout_1[31], + dout_1[30] = NlwRenamedSig_OI_dout_1[30], + dout_1[29] = NlwRenamedSig_OI_dout_1[29], + dout_1[28] = NlwRenamedSig_OI_dout_1[28], + dout_1[27] = NlwRenamedSig_OI_dout_1[27], + dout_1[26] = NlwRenamedSig_OI_dout_1[26], + dout_1[25] = NlwRenamedSig_OI_dout_1[25], + dout_1[24] = NlwRenamedSig_OI_dout_1[24], + dout_1[23] = NlwRenamedSig_OI_dout_1[23], + dout_1[22] = NlwRenamedSig_OI_dout_1[22], + dout_1[21] = NlwRenamedSig_OI_dout_1[21], + dout_1[20] = NlwRenamedSig_OI_dout_1[20], + dout_1[19] = NlwRenamedSig_OI_dout_1[19], + dout_1[18] = NlwRenamedSig_OI_dout_1[18], + dout_1[17] = NlwRenamedSig_OI_dout_1[17], + dout_1[16] = NlwRenamedSig_OI_dout_1[16], + dout_1[15] = NlwRenamedSig_OI_dout_1[15], + dout_1[14] = NlwRenamedSig_OI_dout_1[14], + dout_1[13] = NlwRenamedSig_OI_dout_1[13], + dout_1[12] = NlwRenamedSig_OI_dout_1[12], + dout_1[11] = NlwRenamedSig_OI_dout_1[11], + dout_1[10] = NlwRenamedSig_OI_dout_1[10], + dout_1[9] = NlwRenamedSig_OI_dout_1[9], + dout_1[8] = NlwRenamedSig_OI_dout_1[8], + dout_1[7] = NlwRenamedSig_OI_dout_1[7], + dout_1[6] = NlwRenamedSig_OI_dout_1[6], + dout_1[5] = NlwRenamedSig_OI_dout_1[5], + dout_1[4] = NlwRenamedSig_OI_dout_1[4], + dout_1[3] = NlwRenamedSig_OI_dout_1[3], + dout_1[2] = NlwRenamedSig_OI_dout_1[2], + dout_1[1] = NlwRenamedSig_OI_dout_1[1], + dout_1[0] = NlwRenamedSig_OI_dout_1[0], + dout_2[46] = NlwRenamedSig_OI_dout_2[46], + dout_2[45] = NlwRenamedSig_OI_dout_2[45], + dout_2[44] = NlwRenamedSig_OI_dout_2[44], + dout_2[43] = NlwRenamedSig_OI_dout_2[43], + dout_2[42] = NlwRenamedSig_OI_dout_2[42], + dout_2[41] = NlwRenamedSig_OI_dout_2[41], + dout_2[40] = NlwRenamedSig_OI_dout_2[40], + dout_2[39] = NlwRenamedSig_OI_dout_2[39], + dout_2[38] = NlwRenamedSig_OI_dout_2[38], + dout_2[37] = NlwRenamedSig_OI_dout_2[37], + dout_2[36] = NlwRenamedSig_OI_dout_2[36], + dout_2[35] = NlwRenamedSig_OI_dout_2[35], + dout_2[34] = NlwRenamedSig_OI_dout_2[34], + dout_2[33] = NlwRenamedSig_OI_dout_2[33], + dout_2[32] = NlwRenamedSig_OI_dout_2[32], + dout_2[31] = NlwRenamedSig_OI_dout_2[31], + dout_2[30] = NlwRenamedSig_OI_dout_2[30], + dout_2[29] = NlwRenamedSig_OI_dout_2[29], + dout_2[28] = NlwRenamedSig_OI_dout_2[28], + dout_2[27] = NlwRenamedSig_OI_dout_2[27], + dout_2[26] = NlwRenamedSig_OI_dout_2[26], + dout_2[25] = NlwRenamedSig_OI_dout_2[25], + dout_2[24] = NlwRenamedSig_OI_dout_2[24], + dout_2[23] = NlwRenamedSig_OI_dout_2[23], + dout_2[22] = NlwRenamedSig_OI_dout_2[22], + dout_2[21] = NlwRenamedSig_OI_dout_2[21], + dout_2[20] = NlwRenamedSig_OI_dout_2[20], + dout_2[19] = NlwRenamedSig_OI_dout_2[19], + dout_2[18] = NlwRenamedSig_OI_dout_2[18], + dout_2[17] = NlwRenamedSig_OI_dout_2[17], + dout_2[16] = NlwRenamedSig_OI_dout_2[16], + dout_2[15] = NlwRenamedSig_OI_dout_2[15], + dout_2[14] = NlwRenamedSig_OI_dout_2[14], + dout_2[13] = NlwRenamedSig_OI_dout_2[13], + dout_2[12] = NlwRenamedSig_OI_dout_2[12], + dout_2[11] = NlwRenamedSig_OI_dout_2[11], + dout_2[10] = NlwRenamedSig_OI_dout_2[10], + dout_2[9] = NlwRenamedSig_OI_dout_2[9], + dout_2[8] = NlwRenamedSig_OI_dout_2[8], + dout_2[7] = NlwRenamedSig_OI_dout_2[7], + dout_2[6] = NlwRenamedSig_OI_dout_2[6], + dout_2[5] = NlwRenamedSig_OI_dout_2[5], + dout_2[4] = NlwRenamedSig_OI_dout_2[4], + dout_2[3] = NlwRenamedSig_OI_dout_2[3], + dout_2[2] = NlwRenamedSig_OI_dout_2[2], + dout_2[1] = NlwRenamedSig_OI_dout_2[1], + dout_2[0] = NlwRenamedSig_OI_dout_2[0], + din_1_1[23] = din_1[23], + din_1_1[22] = din_1[22], + din_1_1[21] = din_1[21], + din_1_1[20] = din_1[20], + din_1_1[19] = din_1[19], + din_1_1[18] = din_1[18], + din_1_1[17] = din_1[17], + din_1_1[16] = din_1[16], + din_1_1[15] = din_1[15], + din_1_1[14] = din_1[14], + din_1_1[13] = din_1[13], + din_1_1[12] = din_1[12], + din_1_1[11] = din_1[11], + din_1_1[10] = din_1[10], + din_1_1[9] = din_1[9], + din_1_1[8] = din_1[8], + din_1_1[7] = din_1[7], + din_1_1[6] = din_1[6], + din_1_1[5] = din_1[5], + din_1_1[4] = din_1[4], + din_1_1[3] = din_1[3], + din_1_1[2] = din_1[2], + din_1_1[1] = din_1[1], + din_1_1[0] = din_1[0], + din_2_2[23] = din_2[23], + din_2_2[22] = din_2[22], + din_2_2[21] = din_2[21], + din_2_2[20] = din_2[20], + din_2_2[19] = din_2[19], + din_2_2[18] = din_2[18], + din_2_2[17] = din_2[17], + din_2_2[16] = din_2[16], + din_2_2[15] = din_2[15], + din_2_2[14] = din_2[14], + din_2_2[13] = din_2[13], + din_2_2[12] = din_2[12], + din_2_2[11] = din_2[11], + din_2_2[10] = din_2[10], + din_2_2[9] = din_2[9], + din_2_2[8] = din_2[8], + din_2_2[7] = din_2[7], + din_2_2[6] = din_2[6], + din_2_2[5] = din_2[5], + din_2_2[4] = din_2[4], + din_2_2[3] = din_2[3], + din_2_2[2] = din_2[2], + din_2_2[1] = din_2[1], + din_2_2[0] = din_2[0], + coef_din_0[17] = coef_din[17], + coef_din_0[16] = coef_din[16], + coef_din_0[15] = coef_din[15], + coef_din_0[14] = coef_din[14], + coef_din_0[13] = coef_din[13], + coef_din_0[12] = coef_din[12], + coef_din_0[11] = coef_din[11], + coef_din_0[10] = coef_din[10], + coef_din_0[9] = coef_din[9], + coef_din_0[8] = coef_din[8], + coef_din_0[7] = coef_din[7], + coef_din_0[6] = coef_din[6], + coef_din_0[5] = coef_din[5], + coef_din_0[4] = coef_din[4], + coef_din_0[3] = coef_din[3], + coef_din_0[2] = coef_din[2], + coef_din_0[1] = coef_din[1], + coef_din_0[0] = coef_din[0]; + VCC blk00000001 ( + .P(NLW_blk00000001_P_UNCONNECTED) + ); + GND blk00000002 ( + .G(NLW_blk00000002_G_UNCONNECTED) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000c13 ( + .C(clk), + .CE(\blk00000003/sig000009b7 ), + .D(\blk00000003/sig00000b8e ), + .Q(\blk00000003/sig00000881 ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000c12 ( + .A0(\blk00000003/sig00000049 ), + .A1(\blk00000003/sig00000049 ), + .A2(\blk00000003/sig00000049 ), + .A3(\blk00000003/sig00000049 ), + .CE(\blk00000003/sig000009b7 ), + .CLK(clk), + .D(\blk00000003/sig00000839 ), + .Q(\blk00000003/sig00000b8e ), + .Q15(\NLW_blk00000003/blk00000c12_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000c11 ( + .C(clk), + .CE(\blk00000003/sig000009b7 ), + .D(\blk00000003/sig00000b8d ), + .Q(\blk00000003/sig00000880 ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000c10 ( + .A0(\blk00000003/sig00000049 ), + .A1(\blk00000003/sig00000049 ), + .A2(\blk00000003/sig00000049 ), + .A3(\blk00000003/sig00000049 ), + .CE(\blk00000003/sig000009b7 ), + .CLK(clk), + .D(\blk00000003/sig00000838 ), + .Q(\blk00000003/sig00000b8d ), + .Q15(\NLW_blk00000003/blk00000c10_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000c0f ( + .C(clk), + .CE(\blk00000003/sig000009b7 ), + .D(\blk00000003/sig00000b8c ), + .Q(\blk00000003/sig0000087f ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000c0e ( + .A0(\blk00000003/sig00000049 ), + .A1(\blk00000003/sig00000049 ), + .A2(\blk00000003/sig00000049 ), + .A3(\blk00000003/sig00000049 ), + .CE(\blk00000003/sig000009b7 ), + .CLK(clk), + .D(\blk00000003/sig00000837 ), + .Q(\blk00000003/sig00000b8c ), + .Q15(\NLW_blk00000003/blk00000c0e_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000c0d ( + .C(clk), + .CE(\blk00000003/sig000009b7 ), + .D(\blk00000003/sig00000b8b ), + .Q(\blk00000003/sig0000087e ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000c0c ( + .A0(\blk00000003/sig00000049 ), + .A1(\blk00000003/sig00000049 ), + .A2(\blk00000003/sig00000049 ), + .A3(\blk00000003/sig00000049 ), + .CE(\blk00000003/sig000009b7 ), + .CLK(clk), + .D(\blk00000003/sig00000836 ), + .Q(\blk00000003/sig00000b8b ), + .Q15(\NLW_blk00000003/blk00000c0c_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000c0b ( + .C(clk), + .CE(\blk00000003/sig000009b7 ), + .D(\blk00000003/sig00000b8a ), + .Q(\blk00000003/sig0000087c ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000c0a ( + .A0(\blk00000003/sig00000049 ), + .A1(\blk00000003/sig00000049 ), + .A2(\blk00000003/sig00000049 ), + .A3(\blk00000003/sig00000049 ), + .CE(\blk00000003/sig000009b7 ), + .CLK(clk), + .D(\blk00000003/sig00000834 ), + .Q(\blk00000003/sig00000b8a ), + .Q15(\NLW_blk00000003/blk00000c0a_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000c09 ( + .C(clk), + .CE(\blk00000003/sig000009b7 ), + .D(\blk00000003/sig00000b89 ), + .Q(\blk00000003/sig0000087b ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000c08 ( + .A0(\blk00000003/sig00000049 ), + .A1(\blk00000003/sig00000049 ), + .A2(\blk00000003/sig00000049 ), + .A3(\blk00000003/sig00000049 ), + .CE(\blk00000003/sig000009b7 ), + .CLK(clk), + .D(\blk00000003/sig00000833 ), + .Q(\blk00000003/sig00000b89 ), + .Q15(\NLW_blk00000003/blk00000c08_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000c07 ( + .C(clk), + .CE(\blk00000003/sig000009b7 ), + .D(\blk00000003/sig00000b88 ), + .Q(\blk00000003/sig0000087d ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000c06 ( + .A0(\blk00000003/sig00000049 ), + .A1(\blk00000003/sig00000049 ), + .A2(\blk00000003/sig00000049 ), + .A3(\blk00000003/sig00000049 ), + .CE(\blk00000003/sig000009b7 ), + .CLK(clk), + .D(\blk00000003/sig00000835 ), + .Q(\blk00000003/sig00000b88 ), + .Q15(\NLW_blk00000003/blk00000c06_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000c05 ( + .C(clk), + .CE(\blk00000003/sig000009b7 ), + .D(\blk00000003/sig00000b87 ), + .Q(\blk00000003/sig00000879 ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000c04 ( + .A0(\blk00000003/sig00000049 ), + .A1(\blk00000003/sig00000049 ), + .A2(\blk00000003/sig00000049 ), + .A3(\blk00000003/sig00000049 ), + .CE(\blk00000003/sig000009b7 ), + .CLK(clk), + .D(\blk00000003/sig00000831 ), + .Q(\blk00000003/sig00000b87 ), + .Q15(\NLW_blk00000003/blk00000c04_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000c03 ( + .C(clk), + .CE(\blk00000003/sig000009b7 ), + .D(\blk00000003/sig00000b86 ), + .Q(\blk00000003/sig00000878 ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000c02 ( + .A0(\blk00000003/sig00000049 ), + .A1(\blk00000003/sig00000049 ), + .A2(\blk00000003/sig00000049 ), + .A3(\blk00000003/sig00000049 ), + .CE(\blk00000003/sig000009b7 ), + .CLK(clk), + .D(\blk00000003/sig00000830 ), + .Q(\blk00000003/sig00000b86 ), + .Q15(\NLW_blk00000003/blk00000c02_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000c01 ( + .C(clk), + .CE(\blk00000003/sig000009b7 ), + .D(\blk00000003/sig00000b85 ), + .Q(\blk00000003/sig0000087a ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000c00 ( + .A0(\blk00000003/sig00000049 ), + .A1(\blk00000003/sig00000049 ), + .A2(\blk00000003/sig00000049 ), + .A3(\blk00000003/sig00000049 ), + .CE(\blk00000003/sig000009b7 ), + .CLK(clk), + .D(\blk00000003/sig00000832 ), + .Q(\blk00000003/sig00000b85 ), + .Q15(\NLW_blk00000003/blk00000c00_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000bff ( + .C(clk), + .CE(\blk00000003/sig000009b7 ), + .D(\blk00000003/sig00000b84 ), + .Q(\blk00000003/sig00000876 ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000bfe ( + .A0(\blk00000003/sig00000049 ), + .A1(\blk00000003/sig00000049 ), + .A2(\blk00000003/sig00000049 ), + .A3(\blk00000003/sig00000049 ), + .CE(\blk00000003/sig000009b7 ), + .CLK(clk), + .D(\blk00000003/sig0000082e ), + .Q(\blk00000003/sig00000b84 ), + .Q15(\NLW_blk00000003/blk00000bfe_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000bfd ( + .C(clk), + .CE(\blk00000003/sig000009b7 ), + .D(\blk00000003/sig00000b83 ), + .Q(\blk00000003/sig00000875 ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000bfc ( + .A0(\blk00000003/sig00000049 ), + .A1(\blk00000003/sig00000049 ), + .A2(\blk00000003/sig00000049 ), + .A3(\blk00000003/sig00000049 ), + .CE(\blk00000003/sig000009b7 ), + .CLK(clk), + .D(\blk00000003/sig0000082d ), + .Q(\blk00000003/sig00000b83 ), + .Q15(\NLW_blk00000003/blk00000bfc_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000bfb ( + .C(clk), + .CE(\blk00000003/sig000009b7 ), + .D(\blk00000003/sig00000b82 ), + .Q(\blk00000003/sig00000877 ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000bfa ( + .A0(\blk00000003/sig00000049 ), + .A1(\blk00000003/sig00000049 ), + .A2(\blk00000003/sig00000049 ), + .A3(\blk00000003/sig00000049 ), + .CE(\blk00000003/sig000009b7 ), + .CLK(clk), + .D(\blk00000003/sig0000082f ), + .Q(\blk00000003/sig00000b82 ), + .Q15(\NLW_blk00000003/blk00000bfa_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000bf9 ( + .C(clk), + .CE(\blk00000003/sig000009b7 ), + .D(\blk00000003/sig00000b81 ), + .Q(\blk00000003/sig00000873 ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000bf8 ( + .A0(\blk00000003/sig00000049 ), + .A1(\blk00000003/sig00000049 ), + .A2(\blk00000003/sig00000049 ), + .A3(\blk00000003/sig00000049 ), + .CE(\blk00000003/sig000009b7 ), + .CLK(clk), + .D(\blk00000003/sig0000082b ), + .Q(\blk00000003/sig00000b81 ), + .Q15(\NLW_blk00000003/blk00000bf8_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000bf7 ( + .C(clk), + .CE(\blk00000003/sig000009b7 ), + .D(\blk00000003/sig00000b80 ), + .Q(\blk00000003/sig00000872 ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000bf6 ( + .A0(\blk00000003/sig00000049 ), + .A1(\blk00000003/sig00000049 ), + .A2(\blk00000003/sig00000049 ), + .A3(\blk00000003/sig00000049 ), + .CE(\blk00000003/sig000009b7 ), + .CLK(clk), + .D(\blk00000003/sig0000082a ), + .Q(\blk00000003/sig00000b80 ), + .Q15(\NLW_blk00000003/blk00000bf6_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000bf5 ( + .C(clk), + .CE(\blk00000003/sig000009b7 ), + .D(\blk00000003/sig00000b7f ), + .Q(\blk00000003/sig00000874 ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000bf4 ( + .A0(\blk00000003/sig00000049 ), + .A1(\blk00000003/sig00000049 ), + .A2(\blk00000003/sig00000049 ), + .A3(\blk00000003/sig00000049 ), + .CE(\blk00000003/sig000009b7 ), + .CLK(clk), + .D(\blk00000003/sig0000082c ), + .Q(\blk00000003/sig00000b7f ), + .Q15(\NLW_blk00000003/blk00000bf4_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000bf3 ( + .C(clk), + .CE(\blk00000003/sig000009b7 ), + .D(\blk00000003/sig00000b7e ), + .Q(\blk00000003/sig00000870 ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000bf2 ( + .A0(\blk00000003/sig00000049 ), + .A1(\blk00000003/sig00000049 ), + .A2(\blk00000003/sig00000049 ), + .A3(\blk00000003/sig00000049 ), + .CE(\blk00000003/sig000009b7 ), + .CLK(clk), + .D(\blk00000003/sig00000828 ), + .Q(\blk00000003/sig00000b7e ), + .Q15(\NLW_blk00000003/blk00000bf2_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000bf1 ( + .C(clk), + .CE(\blk00000003/sig000009b7 ), + .D(\blk00000003/sig00000b7d ), + .Q(\blk00000003/sig0000086f ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000bf0 ( + .A0(\blk00000003/sig00000049 ), + .A1(\blk00000003/sig00000049 ), + .A2(\blk00000003/sig00000049 ), + .A3(\blk00000003/sig00000049 ), + .CE(\blk00000003/sig000009b7 ), + .CLK(clk), + .D(\blk00000003/sig00000827 ), + .Q(\blk00000003/sig00000b7d ), + .Q15(\NLW_blk00000003/blk00000bf0_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000bef ( + .C(clk), + .CE(\blk00000003/sig000009b7 ), + .D(\blk00000003/sig00000b7c ), + .Q(\blk00000003/sig00000871 ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000bee ( + .A0(\blk00000003/sig00000049 ), + .A1(\blk00000003/sig00000049 ), + .A2(\blk00000003/sig00000049 ), + .A3(\blk00000003/sig00000049 ), + .CE(\blk00000003/sig000009b7 ), + .CLK(clk), + .D(\blk00000003/sig00000829 ), + .Q(\blk00000003/sig00000b7c ), + .Q15(\NLW_blk00000003/blk00000bee_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000bed ( + .C(clk), + .CE(\blk00000003/sig000009b7 ), + .D(\blk00000003/sig00000b7b ), + .Q(\blk00000003/sig0000086d ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000bec ( + .A0(\blk00000003/sig00000049 ), + .A1(\blk00000003/sig00000049 ), + .A2(\blk00000003/sig00000049 ), + .A3(\blk00000003/sig00000049 ), + .CE(\blk00000003/sig000009b7 ), + .CLK(clk), + .D(\blk00000003/sig00000825 ), + .Q(\blk00000003/sig00000b7b ), + .Q15(\NLW_blk00000003/blk00000bec_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000beb ( + .C(clk), + .CE(\blk00000003/sig000009b7 ), + .D(\blk00000003/sig00000b7a ), + .Q(\blk00000003/sig0000086c ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000bea ( + .A0(\blk00000003/sig00000049 ), + .A1(\blk00000003/sig00000049 ), + .A2(\blk00000003/sig00000049 ), + .A3(\blk00000003/sig00000049 ), + .CE(\blk00000003/sig000009b7 ), + .CLK(clk), + .D(\blk00000003/sig00000824 ), + .Q(\blk00000003/sig00000b7a ), + .Q15(\NLW_blk00000003/blk00000bea_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000be9 ( + .C(clk), + .CE(\blk00000003/sig000009b7 ), + .D(\blk00000003/sig00000b79 ), + .Q(\blk00000003/sig0000086e ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000be8 ( + .A0(\blk00000003/sig00000049 ), + .A1(\blk00000003/sig00000049 ), + .A2(\blk00000003/sig00000049 ), + .A3(\blk00000003/sig00000049 ), + .CE(\blk00000003/sig000009b7 ), + .CLK(clk), + .D(\blk00000003/sig00000826 ), + .Q(\blk00000003/sig00000b79 ), + .Q15(\NLW_blk00000003/blk00000be8_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000be7 ( + .C(clk), + .CE(\blk00000003/sig000009b7 ), + .D(\blk00000003/sig00000b78 ), + .Q(\blk00000003/sig0000086a ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000be6 ( + .A0(\blk00000003/sig00000049 ), + .A1(\blk00000003/sig00000049 ), + .A2(\blk00000003/sig00000049 ), + .A3(\blk00000003/sig00000049 ), + .CE(\blk00000003/sig000009b7 ), + .CLK(clk), + .D(\blk00000003/sig00000822 ), + .Q(\blk00000003/sig00000b78 ), + .Q15(\NLW_blk00000003/blk00000be6_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000be5 ( + .C(clk), + .CE(\blk00000003/sig000009b7 ), + .D(\blk00000003/sig00000b77 ), + .Q(\blk00000003/sig0000086b ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000be4 ( + .A0(\blk00000003/sig00000049 ), + .A1(\blk00000003/sig00000049 ), + .A2(\blk00000003/sig00000049 ), + .A3(\blk00000003/sig00000049 ), + .CE(\blk00000003/sig000009b7 ), + .CLK(clk), + .D(\blk00000003/sig00000823 ), + .Q(\blk00000003/sig00000b77 ), + .Q15(\NLW_blk00000003/blk00000be4_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000be3 ( + .C(clk), + .CE(\blk00000003/sig000009b7 ), + .D(\blk00000003/sig00000b76 ), + .Q(\blk00000003/sig000008b1 ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000be2 ( + .A0(\blk00000003/sig00000049 ), + .A1(\blk00000003/sig00000049 ), + .A2(\blk00000003/sig00000049 ), + .A3(\blk00000003/sig00000049 ), + .CE(\blk00000003/sig000009b7 ), + .CLK(clk), + .D(\blk00000003/sig00000851 ), + .Q(\blk00000003/sig00000b76 ), + .Q15(\NLW_blk00000003/blk00000be2_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000be1 ( + .C(clk), + .CE(\blk00000003/sig000009b7 ), + .D(\blk00000003/sig00000b75 ), + .Q(\blk00000003/sig000008b0 ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000be0 ( + .A0(\blk00000003/sig00000049 ), + .A1(\blk00000003/sig00000049 ), + .A2(\blk00000003/sig00000049 ), + .A3(\blk00000003/sig00000049 ), + .CE(\blk00000003/sig000009b7 ), + .CLK(clk), + .D(\blk00000003/sig00000850 ), + .Q(\blk00000003/sig00000b75 ), + .Q15(\NLW_blk00000003/blk00000be0_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000bdf ( + .C(clk), + .CE(\blk00000003/sig000009b7 ), + .D(\blk00000003/sig00000b74 ), + .Q(\blk00000003/sig000008ae ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000bde ( + .A0(\blk00000003/sig00000049 ), + .A1(\blk00000003/sig00000049 ), + .A2(\blk00000003/sig00000049 ), + .A3(\blk00000003/sig00000049 ), + .CE(\blk00000003/sig000009b7 ), + .CLK(clk), + .D(\blk00000003/sig0000084e ), + .Q(\blk00000003/sig00000b74 ), + .Q15(\NLW_blk00000003/blk00000bde_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000bdd ( + .C(clk), + .CE(\blk00000003/sig000009b7 ), + .D(\blk00000003/sig00000b73 ), + .Q(\blk00000003/sig000008ad ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000bdc ( + .A0(\blk00000003/sig00000049 ), + .A1(\blk00000003/sig00000049 ), + .A2(\blk00000003/sig00000049 ), + .A3(\blk00000003/sig00000049 ), + .CE(\blk00000003/sig000009b7 ), + .CLK(clk), + .D(\blk00000003/sig0000084d ), + .Q(\blk00000003/sig00000b73 ), + .Q15(\NLW_blk00000003/blk00000bdc_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000bdb ( + .C(clk), + .CE(\blk00000003/sig000009b7 ), + .D(\blk00000003/sig00000b72 ), + .Q(\blk00000003/sig000008af ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000bda ( + .A0(\blk00000003/sig00000049 ), + .A1(\blk00000003/sig00000049 ), + .A2(\blk00000003/sig00000049 ), + .A3(\blk00000003/sig00000049 ), + .CE(\blk00000003/sig000009b7 ), + .CLK(clk), + .D(\blk00000003/sig0000084f ), + .Q(\blk00000003/sig00000b72 ), + .Q15(\NLW_blk00000003/blk00000bda_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000bd9 ( + .C(clk), + .CE(\blk00000003/sig000009b7 ), + .D(\blk00000003/sig00000b71 ), + .Q(\blk00000003/sig000008ab ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000bd8 ( + .A0(\blk00000003/sig00000049 ), + .A1(\blk00000003/sig00000049 ), + .A2(\blk00000003/sig00000049 ), + .A3(\blk00000003/sig00000049 ), + .CE(\blk00000003/sig000009b7 ), + .CLK(clk), + .D(\blk00000003/sig0000084b ), + .Q(\blk00000003/sig00000b71 ), + .Q15(\NLW_blk00000003/blk00000bd8_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000bd7 ( + .C(clk), + .CE(\blk00000003/sig000009b7 ), + .D(\blk00000003/sig00000b70 ), + .Q(\blk00000003/sig000008aa ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000bd6 ( + .A0(\blk00000003/sig00000049 ), + .A1(\blk00000003/sig00000049 ), + .A2(\blk00000003/sig00000049 ), + .A3(\blk00000003/sig00000049 ), + .CE(\blk00000003/sig000009b7 ), + .CLK(clk), + .D(\blk00000003/sig0000084a ), + .Q(\blk00000003/sig00000b70 ), + .Q15(\NLW_blk00000003/blk00000bd6_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000bd5 ( + .C(clk), + .CE(\blk00000003/sig000009b7 ), + .D(\blk00000003/sig00000b6f ), + .Q(\blk00000003/sig000008ac ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000bd4 ( + .A0(\blk00000003/sig00000049 ), + .A1(\blk00000003/sig00000049 ), + .A2(\blk00000003/sig00000049 ), + .A3(\blk00000003/sig00000049 ), + .CE(\blk00000003/sig000009b7 ), + .CLK(clk), + .D(\blk00000003/sig0000084c ), + .Q(\blk00000003/sig00000b6f ), + .Q15(\NLW_blk00000003/blk00000bd4_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000bd3 ( + .C(clk), + .CE(\blk00000003/sig000009b7 ), + .D(\blk00000003/sig00000b6e ), + .Q(\blk00000003/sig000008a9 ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000bd2 ( + .A0(\blk00000003/sig00000049 ), + .A1(\blk00000003/sig00000049 ), + .A2(\blk00000003/sig00000049 ), + .A3(\blk00000003/sig00000049 ), + .CE(\blk00000003/sig000009b7 ), + .CLK(clk), + .D(\blk00000003/sig00000849 ), + .Q(\blk00000003/sig00000b6e ), + .Q15(\NLW_blk00000003/blk00000bd2_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000bd1 ( + .C(clk), + .CE(\blk00000003/sig000009b7 ), + .D(\blk00000003/sig00000b6d ), + .Q(\blk00000003/sig000008a8 ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000bd0 ( + .A0(\blk00000003/sig00000049 ), + .A1(\blk00000003/sig00000049 ), + .A2(\blk00000003/sig00000049 ), + .A3(\blk00000003/sig00000049 ), + .CE(\blk00000003/sig000009b7 ), + .CLK(clk), + .D(\blk00000003/sig00000848 ), + .Q(\blk00000003/sig00000b6d ), + .Q15(\NLW_blk00000003/blk00000bd0_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000bcf ( + .C(clk), + .CE(\blk00000003/sig000009b7 ), + .D(\blk00000003/sig00000b6c ), + .Q(\blk00000003/sig000008a7 ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000bce ( + .A0(\blk00000003/sig00000049 ), + .A1(\blk00000003/sig00000049 ), + .A2(\blk00000003/sig00000049 ), + .A3(\blk00000003/sig00000049 ), + .CE(\blk00000003/sig000009b7 ), + .CLK(clk), + .D(\blk00000003/sig00000847 ), + .Q(\blk00000003/sig00000b6c ), + .Q15(\NLW_blk00000003/blk00000bce_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000bcd ( + .C(clk), + .CE(\blk00000003/sig000009b7 ), + .D(\blk00000003/sig00000b6b ), + .Q(\blk00000003/sig000008a6 ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000bcc ( + .A0(\blk00000003/sig00000049 ), + .A1(\blk00000003/sig00000049 ), + .A2(\blk00000003/sig00000049 ), + .A3(\blk00000003/sig00000049 ), + .CE(\blk00000003/sig000009b7 ), + .CLK(clk), + .D(\blk00000003/sig00000846 ), + .Q(\blk00000003/sig00000b6b ), + .Q15(\NLW_blk00000003/blk00000bcc_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000bcb ( + .C(clk), + .CE(\blk00000003/sig000009b7 ), + .D(\blk00000003/sig00000b6a ), + .Q(\blk00000003/sig000008a4 ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000bca ( + .A0(\blk00000003/sig00000049 ), + .A1(\blk00000003/sig00000049 ), + .A2(\blk00000003/sig00000049 ), + .A3(\blk00000003/sig00000049 ), + .CE(\blk00000003/sig000009b7 ), + .CLK(clk), + .D(\blk00000003/sig00000844 ), + .Q(\blk00000003/sig00000b6a ), + .Q15(\NLW_blk00000003/blk00000bca_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000bc9 ( + .C(clk), + .CE(\blk00000003/sig000009b7 ), + .D(\blk00000003/sig00000b69 ), + .Q(\blk00000003/sig000008a3 ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000bc8 ( + .A0(\blk00000003/sig00000049 ), + .A1(\blk00000003/sig00000049 ), + .A2(\blk00000003/sig00000049 ), + .A3(\blk00000003/sig00000049 ), + .CE(\blk00000003/sig000009b7 ), + .CLK(clk), + .D(\blk00000003/sig00000843 ), + .Q(\blk00000003/sig00000b69 ), + .Q15(\NLW_blk00000003/blk00000bc8_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000bc7 ( + .C(clk), + .CE(\blk00000003/sig000009b7 ), + .D(\blk00000003/sig00000b68 ), + .Q(\blk00000003/sig000008a5 ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000bc6 ( + .A0(\blk00000003/sig00000049 ), + .A1(\blk00000003/sig00000049 ), + .A2(\blk00000003/sig00000049 ), + .A3(\blk00000003/sig00000049 ), + .CE(\blk00000003/sig000009b7 ), + .CLK(clk), + .D(\blk00000003/sig00000845 ), + .Q(\blk00000003/sig00000b68 ), + .Q15(\NLW_blk00000003/blk00000bc6_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000bc5 ( + .C(clk), + .CE(\blk00000003/sig000009b7 ), + .D(\blk00000003/sig00000b67 ), + .Q(\blk00000003/sig000008a1 ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000bc4 ( + .A0(\blk00000003/sig00000049 ), + .A1(\blk00000003/sig00000049 ), + .A2(\blk00000003/sig00000049 ), + .A3(\blk00000003/sig00000049 ), + .CE(\blk00000003/sig000009b7 ), + .CLK(clk), + .D(\blk00000003/sig00000841 ), + .Q(\blk00000003/sig00000b67 ), + .Q15(\NLW_blk00000003/blk00000bc4_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000bc3 ( + .C(clk), + .CE(\blk00000003/sig000009b7 ), + .D(\blk00000003/sig00000b66 ), + .Q(\blk00000003/sig000008a0 ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000bc2 ( + .A0(\blk00000003/sig00000049 ), + .A1(\blk00000003/sig00000049 ), + .A2(\blk00000003/sig00000049 ), + .A3(\blk00000003/sig00000049 ), + .CE(\blk00000003/sig000009b7 ), + .CLK(clk), + .D(\blk00000003/sig00000840 ), + .Q(\blk00000003/sig00000b66 ), + .Q15(\NLW_blk00000003/blk00000bc2_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000bc1 ( + .C(clk), + .CE(\blk00000003/sig000009b7 ), + .D(\blk00000003/sig00000b65 ), + .Q(\blk00000003/sig000008a2 ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000bc0 ( + .A0(\blk00000003/sig00000049 ), + .A1(\blk00000003/sig00000049 ), + .A2(\blk00000003/sig00000049 ), + .A3(\blk00000003/sig00000049 ), + .CE(\blk00000003/sig000009b7 ), + .CLK(clk), + .D(\blk00000003/sig00000842 ), + .Q(\blk00000003/sig00000b65 ), + .Q15(\NLW_blk00000003/blk00000bc0_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000bbf ( + .C(clk), + .CE(\blk00000003/sig000009b7 ), + .D(\blk00000003/sig00000b64 ), + .Q(\blk00000003/sig0000089e ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000bbe ( + .A0(\blk00000003/sig00000049 ), + .A1(\blk00000003/sig00000049 ), + .A2(\blk00000003/sig00000049 ), + .A3(\blk00000003/sig00000049 ), + .CE(\blk00000003/sig000009b7 ), + .CLK(clk), + .D(\blk00000003/sig0000083e ), + .Q(\blk00000003/sig00000b64 ), + .Q15(\NLW_blk00000003/blk00000bbe_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000bbd ( + .C(clk), + .CE(\blk00000003/sig000009b7 ), + .D(\blk00000003/sig00000b63 ), + .Q(\blk00000003/sig0000089d ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000bbc ( + .A0(\blk00000003/sig00000049 ), + .A1(\blk00000003/sig00000049 ), + .A2(\blk00000003/sig00000049 ), + .A3(\blk00000003/sig00000049 ), + .CE(\blk00000003/sig000009b7 ), + .CLK(clk), + .D(\blk00000003/sig0000083d ), + .Q(\blk00000003/sig00000b63 ), + .Q15(\NLW_blk00000003/blk00000bbc_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000bbb ( + .C(clk), + .CE(\blk00000003/sig000009b7 ), + .D(\blk00000003/sig00000b62 ), + .Q(\blk00000003/sig0000089f ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000bba ( + .A0(\blk00000003/sig00000049 ), + .A1(\blk00000003/sig00000049 ), + .A2(\blk00000003/sig00000049 ), + .A3(\blk00000003/sig00000049 ), + .CE(\blk00000003/sig000009b7 ), + .CLK(clk), + .D(\blk00000003/sig0000083f ), + .Q(\blk00000003/sig00000b62 ), + .Q15(\NLW_blk00000003/blk00000bba_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000bb9 ( + .C(clk), + .CE(\blk00000003/sig000009b7 ), + .D(\blk00000003/sig00000b61 ), + .Q(\blk00000003/sig0000089c ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000bb8 ( + .A0(\blk00000003/sig00000049 ), + .A1(\blk00000003/sig00000049 ), + .A2(\blk00000003/sig00000049 ), + .A3(\blk00000003/sig00000049 ), + .CE(\blk00000003/sig000009b7 ), + .CLK(clk), + .D(\blk00000003/sig0000083c ), + .Q(\blk00000003/sig00000b61 ), + .Q15(\NLW_blk00000003/blk00000bb8_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000bb7 ( + .C(clk), + .CE(\blk00000003/sig000009b7 ), + .D(\blk00000003/sig00000b60 ), + .Q(\blk00000003/sig0000089b ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000bb6 ( + .A0(\blk00000003/sig00000049 ), + .A1(\blk00000003/sig00000049 ), + .A2(\blk00000003/sig00000049 ), + .A3(\blk00000003/sig00000049 ), + .CE(\blk00000003/sig000009b7 ), + .CLK(clk), + .D(\blk00000003/sig0000083b ), + .Q(\blk00000003/sig00000b60 ), + .Q15(\NLW_blk00000003/blk00000bb6_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000bb5 ( + .C(clk), + .CE(\blk00000003/sig000009b7 ), + .D(\blk00000003/sig00000b5f ), + .Q(\blk00000003/sig0000089a ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000bb4 ( + .A0(\blk00000003/sig00000049 ), + .A1(\blk00000003/sig00000049 ), + .A2(\blk00000003/sig00000049 ), + .A3(\blk00000003/sig00000049 ), + .CE(\blk00000003/sig000009b7 ), + .CLK(clk), + .D(\blk00000003/sig0000083a ), + .Q(\blk00000003/sig00000b5f ), + .Q15(\NLW_blk00000003/blk00000bb4_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000bb3 ( + .C(clk), + .CE(\blk00000003/sig000009b6 ), + .D(\blk00000003/sig00000b5e ), + .Q(\blk00000003/sig00000839 ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000bb2 ( + .A0(\blk00000003/sig00000049 ), + .A1(\blk00000003/sig00000049 ), + .A2(\blk00000003/sig00000049 ), + .A3(\blk00000003/sig00000049 ), + .CE(\blk00000003/sig000009b6 ), + .CLK(clk), + .D(\blk00000003/sig00000809 ), + .Q(\blk00000003/sig00000b5e ), + .Q15(\NLW_blk00000003/blk00000bb2_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000bb1 ( + .C(clk), + .CE(\blk00000003/sig000009b6 ), + .D(\blk00000003/sig00000b5d ), + .Q(\blk00000003/sig00000838 ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000bb0 ( + .A0(\blk00000003/sig00000049 ), + .A1(\blk00000003/sig00000049 ), + .A2(\blk00000003/sig00000049 ), + .A3(\blk00000003/sig00000049 ), + .CE(\blk00000003/sig000009b6 ), + .CLK(clk), + .D(\blk00000003/sig00000808 ), + .Q(\blk00000003/sig00000b5d ), + .Q15(\NLW_blk00000003/blk00000bb0_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000baf ( + .C(clk), + .CE(\blk00000003/sig000009b6 ), + .D(\blk00000003/sig00000b5c ), + .Q(\blk00000003/sig00000837 ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000bae ( + .A0(\blk00000003/sig00000049 ), + .A1(\blk00000003/sig00000049 ), + .A2(\blk00000003/sig00000049 ), + .A3(\blk00000003/sig00000049 ), + .CE(\blk00000003/sig000009b6 ), + .CLK(clk), + .D(\blk00000003/sig00000807 ), + .Q(\blk00000003/sig00000b5c ), + .Q15(\NLW_blk00000003/blk00000bae_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000bad ( + .C(clk), + .CE(\blk00000003/sig000009b6 ), + .D(\blk00000003/sig00000b5b ), + .Q(\blk00000003/sig00000836 ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000bac ( + .A0(\blk00000003/sig00000049 ), + .A1(\blk00000003/sig00000049 ), + .A2(\blk00000003/sig00000049 ), + .A3(\blk00000003/sig00000049 ), + .CE(\blk00000003/sig000009b6 ), + .CLK(clk), + .D(\blk00000003/sig00000806 ), + .Q(\blk00000003/sig00000b5b ), + .Q15(\NLW_blk00000003/blk00000bac_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000bab ( + .C(clk), + .CE(\blk00000003/sig000009b6 ), + .D(\blk00000003/sig00000b5a ), + .Q(\blk00000003/sig00000835 ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000baa ( + .A0(\blk00000003/sig00000049 ), + .A1(\blk00000003/sig00000049 ), + .A2(\blk00000003/sig00000049 ), + .A3(\blk00000003/sig00000049 ), + .CE(\blk00000003/sig000009b6 ), + .CLK(clk), + .D(\blk00000003/sig00000805 ), + .Q(\blk00000003/sig00000b5a ), + .Q15(\NLW_blk00000003/blk00000baa_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000ba9 ( + .C(clk), + .CE(\blk00000003/sig000009b6 ), + .D(\blk00000003/sig00000b59 ), + .Q(\blk00000003/sig00000833 ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000ba8 ( + .A0(\blk00000003/sig00000049 ), + .A1(\blk00000003/sig00000049 ), + .A2(\blk00000003/sig00000049 ), + .A3(\blk00000003/sig00000049 ), + .CE(\blk00000003/sig000009b6 ), + .CLK(clk), + .D(\blk00000003/sig00000803 ), + .Q(\blk00000003/sig00000b59 ), + .Q15(\NLW_blk00000003/blk00000ba8_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000ba7 ( + .C(clk), + .CE(\blk00000003/sig000009b6 ), + .D(\blk00000003/sig00000b58 ), + .Q(\blk00000003/sig00000832 ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000ba6 ( + .A0(\blk00000003/sig00000049 ), + .A1(\blk00000003/sig00000049 ), + .A2(\blk00000003/sig00000049 ), + .A3(\blk00000003/sig00000049 ), + .CE(\blk00000003/sig000009b6 ), + .CLK(clk), + .D(\blk00000003/sig00000802 ), + .Q(\blk00000003/sig00000b58 ), + .Q15(\NLW_blk00000003/blk00000ba6_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000ba5 ( + .C(clk), + .CE(\blk00000003/sig000009b6 ), + .D(\blk00000003/sig00000b57 ), + .Q(\blk00000003/sig00000834 ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000ba4 ( + .A0(\blk00000003/sig00000049 ), + .A1(\blk00000003/sig00000049 ), + .A2(\blk00000003/sig00000049 ), + .A3(\blk00000003/sig00000049 ), + .CE(\blk00000003/sig000009b6 ), + .CLK(clk), + .D(\blk00000003/sig00000804 ), + .Q(\blk00000003/sig00000b57 ), + .Q15(\NLW_blk00000003/blk00000ba4_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000ba3 ( + .C(clk), + .CE(\blk00000003/sig000009b6 ), + .D(\blk00000003/sig00000b56 ), + .Q(\blk00000003/sig00000830 ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000ba2 ( + .A0(\blk00000003/sig00000049 ), + .A1(\blk00000003/sig00000049 ), + .A2(\blk00000003/sig00000049 ), + .A3(\blk00000003/sig00000049 ), + .CE(\blk00000003/sig000009b6 ), + .CLK(clk), + .D(\blk00000003/sig00000800 ), + .Q(\blk00000003/sig00000b56 ), + .Q15(\NLW_blk00000003/blk00000ba2_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000ba1 ( + .C(clk), + .CE(\blk00000003/sig000009b6 ), + .D(\blk00000003/sig00000b55 ), + .Q(\blk00000003/sig0000082f ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000ba0 ( + .A0(\blk00000003/sig00000049 ), + .A1(\blk00000003/sig00000049 ), + .A2(\blk00000003/sig00000049 ), + .A3(\blk00000003/sig00000049 ), + .CE(\blk00000003/sig000009b6 ), + .CLK(clk), + .D(\blk00000003/sig000007ff ), + .Q(\blk00000003/sig00000b55 ), + .Q15(\NLW_blk00000003/blk00000ba0_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000b9f ( + .C(clk), + .CE(\blk00000003/sig000009b6 ), + .D(\blk00000003/sig00000b54 ), + .Q(\blk00000003/sig00000831 ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000b9e ( + .A0(\blk00000003/sig00000049 ), + .A1(\blk00000003/sig00000049 ), + .A2(\blk00000003/sig00000049 ), + .A3(\blk00000003/sig00000049 ), + .CE(\blk00000003/sig000009b6 ), + .CLK(clk), + .D(\blk00000003/sig00000801 ), + .Q(\blk00000003/sig00000b54 ), + .Q15(\NLW_blk00000003/blk00000b9e_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000b9d ( + .C(clk), + .CE(\blk00000003/sig000009b6 ), + .D(\blk00000003/sig00000b53 ), + .Q(\blk00000003/sig0000082d ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000b9c ( + .A0(\blk00000003/sig00000049 ), + .A1(\blk00000003/sig00000049 ), + .A2(\blk00000003/sig00000049 ), + .A3(\blk00000003/sig00000049 ), + .CE(\blk00000003/sig000009b6 ), + .CLK(clk), + .D(\blk00000003/sig000007fd ), + .Q(\blk00000003/sig00000b53 ), + .Q15(\NLW_blk00000003/blk00000b9c_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000b9b ( + .C(clk), + .CE(\blk00000003/sig000009b6 ), + .D(\blk00000003/sig00000b52 ), + .Q(\blk00000003/sig0000082c ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000b9a ( + .A0(\blk00000003/sig00000049 ), + .A1(\blk00000003/sig00000049 ), + .A2(\blk00000003/sig00000049 ), + .A3(\blk00000003/sig00000049 ), + .CE(\blk00000003/sig000009b6 ), + .CLK(clk), + .D(\blk00000003/sig000007fc ), + .Q(\blk00000003/sig00000b52 ), + .Q15(\NLW_blk00000003/blk00000b9a_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000b99 ( + .C(clk), + .CE(\blk00000003/sig000009b6 ), + .D(\blk00000003/sig00000b51 ), + .Q(\blk00000003/sig0000082e ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000b98 ( + .A0(\blk00000003/sig00000049 ), + .A1(\blk00000003/sig00000049 ), + .A2(\blk00000003/sig00000049 ), + .A3(\blk00000003/sig00000049 ), + .CE(\blk00000003/sig000009b6 ), + .CLK(clk), + .D(\blk00000003/sig000007fe ), + .Q(\blk00000003/sig00000b51 ), + .Q15(\NLW_blk00000003/blk00000b98_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000b97 ( + .C(clk), + .CE(\blk00000003/sig000009b6 ), + .D(\blk00000003/sig00000b50 ), + .Q(\blk00000003/sig0000082b ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000b96 ( + .A0(\blk00000003/sig00000049 ), + .A1(\blk00000003/sig00000049 ), + .A2(\blk00000003/sig00000049 ), + .A3(\blk00000003/sig00000049 ), + .CE(\blk00000003/sig000009b6 ), + .CLK(clk), + .D(\blk00000003/sig000007fb ), + .Q(\blk00000003/sig00000b50 ), + .Q15(\NLW_blk00000003/blk00000b96_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000b95 ( + .C(clk), + .CE(\blk00000003/sig000009b6 ), + .D(\blk00000003/sig00000b4f ), + .Q(\blk00000003/sig0000082a ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000b94 ( + .A0(\blk00000003/sig00000049 ), + .A1(\blk00000003/sig00000049 ), + .A2(\blk00000003/sig00000049 ), + .A3(\blk00000003/sig00000049 ), + .CE(\blk00000003/sig000009b6 ), + .CLK(clk), + .D(\blk00000003/sig000007fa ), + .Q(\blk00000003/sig00000b4f ), + .Q15(\NLW_blk00000003/blk00000b94_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000b93 ( + .C(clk), + .CE(\blk00000003/sig000009b6 ), + .D(\blk00000003/sig00000b4e ), + .Q(\blk00000003/sig00000829 ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000b92 ( + .A0(\blk00000003/sig00000049 ), + .A1(\blk00000003/sig00000049 ), + .A2(\blk00000003/sig00000049 ), + .A3(\blk00000003/sig00000049 ), + .CE(\blk00000003/sig000009b6 ), + .CLK(clk), + .D(\blk00000003/sig000007f9 ), + .Q(\blk00000003/sig00000b4e ), + .Q15(\NLW_blk00000003/blk00000b92_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000b91 ( + .C(clk), + .CE(\blk00000003/sig000009b6 ), + .D(\blk00000003/sig00000b4d ), + .Q(\blk00000003/sig00000828 ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000b90 ( + .A0(\blk00000003/sig00000049 ), + .A1(\blk00000003/sig00000049 ), + .A2(\blk00000003/sig00000049 ), + .A3(\blk00000003/sig00000049 ), + .CE(\blk00000003/sig000009b6 ), + .CLK(clk), + .D(\blk00000003/sig000007f8 ), + .Q(\blk00000003/sig00000b4d ), + .Q15(\NLW_blk00000003/blk00000b90_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000b8f ( + .C(clk), + .CE(\blk00000003/sig000009b6 ), + .D(\blk00000003/sig00000b4c ), + .Q(\blk00000003/sig00000826 ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000b8e ( + .A0(\blk00000003/sig00000049 ), + .A1(\blk00000003/sig00000049 ), + .A2(\blk00000003/sig00000049 ), + .A3(\blk00000003/sig00000049 ), + .CE(\blk00000003/sig000009b6 ), + .CLK(clk), + .D(\blk00000003/sig000007f6 ), + .Q(\blk00000003/sig00000b4c ), + .Q15(\NLW_blk00000003/blk00000b8e_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000b8d ( + .C(clk), + .CE(\blk00000003/sig000009b6 ), + .D(\blk00000003/sig00000b4b ), + .Q(\blk00000003/sig00000825 ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000b8c ( + .A0(\blk00000003/sig00000049 ), + .A1(\blk00000003/sig00000049 ), + .A2(\blk00000003/sig00000049 ), + .A3(\blk00000003/sig00000049 ), + .CE(\blk00000003/sig000009b6 ), + .CLK(clk), + .D(\blk00000003/sig000007f5 ), + .Q(\blk00000003/sig00000b4b ), + .Q15(\NLW_blk00000003/blk00000b8c_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000b8b ( + .C(clk), + .CE(\blk00000003/sig000009b6 ), + .D(\blk00000003/sig00000b4a ), + .Q(\blk00000003/sig00000827 ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000b8a ( + .A0(\blk00000003/sig00000049 ), + .A1(\blk00000003/sig00000049 ), + .A2(\blk00000003/sig00000049 ), + .A3(\blk00000003/sig00000049 ), + .CE(\blk00000003/sig000009b6 ), + .CLK(clk), + .D(\blk00000003/sig000007f7 ), + .Q(\blk00000003/sig00000b4a ), + .Q15(\NLW_blk00000003/blk00000b8a_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000b89 ( + .C(clk), + .CE(\blk00000003/sig000009b6 ), + .D(\blk00000003/sig00000b49 ), + .Q(\blk00000003/sig00000823 ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000b88 ( + .A0(\blk00000003/sig00000049 ), + .A1(\blk00000003/sig00000049 ), + .A2(\blk00000003/sig00000049 ), + .A3(\blk00000003/sig00000049 ), + .CE(\blk00000003/sig000009b6 ), + .CLK(clk), + .D(\blk00000003/sig000007f3 ), + .Q(\blk00000003/sig00000b49 ), + .Q15(\NLW_blk00000003/blk00000b88_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000b87 ( + .C(clk), + .CE(\blk00000003/sig000009b6 ), + .D(\blk00000003/sig00000b48 ), + .Q(\blk00000003/sig00000822 ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000b86 ( + .A0(\blk00000003/sig00000049 ), + .A1(\blk00000003/sig00000049 ), + .A2(\blk00000003/sig00000049 ), + .A3(\blk00000003/sig00000049 ), + .CE(\blk00000003/sig000009b6 ), + .CLK(clk), + .D(\blk00000003/sig000007f2 ), + .Q(\blk00000003/sig00000b48 ), + .Q15(\NLW_blk00000003/blk00000b86_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000b85 ( + .C(clk), + .CE(\blk00000003/sig000009b6 ), + .D(\blk00000003/sig00000b47 ), + .Q(\blk00000003/sig00000824 ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000b84 ( + .A0(\blk00000003/sig00000049 ), + .A1(\blk00000003/sig00000049 ), + .A2(\blk00000003/sig00000049 ), + .A3(\blk00000003/sig00000049 ), + .CE(\blk00000003/sig000009b6 ), + .CLK(clk), + .D(\blk00000003/sig000007f4 ), + .Q(\blk00000003/sig00000b47 ), + .Q15(\NLW_blk00000003/blk00000b84_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000b83 ( + .C(clk), + .CE(\blk00000003/sig000009b6 ), + .D(\blk00000003/sig00000b46 ), + .Q(\blk00000003/sig00000851 ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000b82 ( + .A0(\blk00000003/sig00000049 ), + .A1(\blk00000003/sig00000049 ), + .A2(\blk00000003/sig00000049 ), + .A3(\blk00000003/sig00000049 ), + .CE(\blk00000003/sig000009b6 ), + .CLK(clk), + .D(\blk00000003/sig00000821 ), + .Q(\blk00000003/sig00000b46 ), + .Q15(\NLW_blk00000003/blk00000b82_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000b81 ( + .C(clk), + .CE(\blk00000003/sig000009b6 ), + .D(\blk00000003/sig00000b45 ), + .Q(\blk00000003/sig0000084f ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000b80 ( + .A0(\blk00000003/sig00000049 ), + .A1(\blk00000003/sig00000049 ), + .A2(\blk00000003/sig00000049 ), + .A3(\blk00000003/sig00000049 ), + .CE(\blk00000003/sig000009b6 ), + .CLK(clk), + .D(\blk00000003/sig0000081f ), + .Q(\blk00000003/sig00000b45 ), + .Q15(\NLW_blk00000003/blk00000b80_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000b7f ( + .C(clk), + .CE(\blk00000003/sig000009b6 ), + .D(\blk00000003/sig00000b44 ), + .Q(\blk00000003/sig0000084e ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000b7e ( + .A0(\blk00000003/sig00000049 ), + .A1(\blk00000003/sig00000049 ), + .A2(\blk00000003/sig00000049 ), + .A3(\blk00000003/sig00000049 ), + .CE(\blk00000003/sig000009b6 ), + .CLK(clk), + .D(\blk00000003/sig0000081e ), + .Q(\blk00000003/sig00000b44 ), + .Q15(\NLW_blk00000003/blk00000b7e_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000b7d ( + .C(clk), + .CE(\blk00000003/sig000009b6 ), + .D(\blk00000003/sig00000b43 ), + .Q(\blk00000003/sig00000850 ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000b7c ( + .A0(\blk00000003/sig00000049 ), + .A1(\blk00000003/sig00000049 ), + .A2(\blk00000003/sig00000049 ), + .A3(\blk00000003/sig00000049 ), + .CE(\blk00000003/sig000009b6 ), + .CLK(clk), + .D(\blk00000003/sig00000820 ), + .Q(\blk00000003/sig00000b43 ), + .Q15(\NLW_blk00000003/blk00000b7c_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000b7b ( + .C(clk), + .CE(\blk00000003/sig000009b6 ), + .D(\blk00000003/sig00000b42 ), + .Q(\blk00000003/sig0000084c ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000b7a ( + .A0(\blk00000003/sig00000049 ), + .A1(\blk00000003/sig00000049 ), + .A2(\blk00000003/sig00000049 ), + .A3(\blk00000003/sig00000049 ), + .CE(\blk00000003/sig000009b6 ), + .CLK(clk), + .D(\blk00000003/sig0000081c ), + .Q(\blk00000003/sig00000b42 ), + .Q15(\NLW_blk00000003/blk00000b7a_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000b79 ( + .C(clk), + .CE(\blk00000003/sig000009b6 ), + .D(\blk00000003/sig00000b41 ), + .Q(\blk00000003/sig0000084b ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000b78 ( + .A0(\blk00000003/sig00000049 ), + .A1(\blk00000003/sig00000049 ), + .A2(\blk00000003/sig00000049 ), + .A3(\blk00000003/sig00000049 ), + .CE(\blk00000003/sig000009b6 ), + .CLK(clk), + .D(\blk00000003/sig0000081b ), + .Q(\blk00000003/sig00000b41 ), + .Q15(\NLW_blk00000003/blk00000b78_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000b77 ( + .C(clk), + .CE(\blk00000003/sig000009b6 ), + .D(\blk00000003/sig00000b40 ), + .Q(\blk00000003/sig0000084d ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000b76 ( + .A0(\blk00000003/sig00000049 ), + .A1(\blk00000003/sig00000049 ), + .A2(\blk00000003/sig00000049 ), + .A3(\blk00000003/sig00000049 ), + .CE(\blk00000003/sig000009b6 ), + .CLK(clk), + .D(\blk00000003/sig0000081d ), + .Q(\blk00000003/sig00000b40 ), + .Q15(\NLW_blk00000003/blk00000b76_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000b75 ( + .C(clk), + .CE(\blk00000003/sig000009b6 ), + .D(\blk00000003/sig00000b3f ), + .Q(\blk00000003/sig00000849 ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000b74 ( + .A0(\blk00000003/sig00000049 ), + .A1(\blk00000003/sig00000049 ), + .A2(\blk00000003/sig00000049 ), + .A3(\blk00000003/sig00000049 ), + .CE(\blk00000003/sig000009b6 ), + .CLK(clk), + .D(\blk00000003/sig00000819 ), + .Q(\blk00000003/sig00000b3f ), + .Q15(\NLW_blk00000003/blk00000b74_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000b73 ( + .C(clk), + .CE(\blk00000003/sig000009b6 ), + .D(\blk00000003/sig00000b3e ), + .Q(\blk00000003/sig00000848 ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000b72 ( + .A0(\blk00000003/sig00000049 ), + .A1(\blk00000003/sig00000049 ), + .A2(\blk00000003/sig00000049 ), + .A3(\blk00000003/sig00000049 ), + .CE(\blk00000003/sig000009b6 ), + .CLK(clk), + .D(\blk00000003/sig00000818 ), + .Q(\blk00000003/sig00000b3e ), + .Q15(\NLW_blk00000003/blk00000b72_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000b71 ( + .C(clk), + .CE(\blk00000003/sig000009b6 ), + .D(\blk00000003/sig00000b3d ), + .Q(\blk00000003/sig0000084a ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000b70 ( + .A0(\blk00000003/sig00000049 ), + .A1(\blk00000003/sig00000049 ), + .A2(\blk00000003/sig00000049 ), + .A3(\blk00000003/sig00000049 ), + .CE(\blk00000003/sig000009b6 ), + .CLK(clk), + .D(\blk00000003/sig0000081a ), + .Q(\blk00000003/sig00000b3d ), + .Q15(\NLW_blk00000003/blk00000b70_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000b6f ( + .C(clk), + .CE(\blk00000003/sig000009b6 ), + .D(\blk00000003/sig00000b3c ), + .Q(\blk00000003/sig00000847 ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000b6e ( + .A0(\blk00000003/sig00000049 ), + .A1(\blk00000003/sig00000049 ), + .A2(\blk00000003/sig00000049 ), + .A3(\blk00000003/sig00000049 ), + .CE(\blk00000003/sig000009b6 ), + .CLK(clk), + .D(\blk00000003/sig00000817 ), + .Q(\blk00000003/sig00000b3c ), + .Q15(\NLW_blk00000003/blk00000b6e_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000b6d ( + .C(clk), + .CE(\blk00000003/sig000009b6 ), + .D(\blk00000003/sig00000b3b ), + .Q(\blk00000003/sig00000846 ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000b6c ( + .A0(\blk00000003/sig00000049 ), + .A1(\blk00000003/sig00000049 ), + .A2(\blk00000003/sig00000049 ), + .A3(\blk00000003/sig00000049 ), + .CE(\blk00000003/sig000009b6 ), + .CLK(clk), + .D(\blk00000003/sig00000816 ), + .Q(\blk00000003/sig00000b3b ), + .Q15(\NLW_blk00000003/blk00000b6c_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000b6b ( + .C(clk), + .CE(\blk00000003/sig000009b6 ), + .D(\blk00000003/sig00000b3a ), + .Q(\blk00000003/sig00000845 ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000b6a ( + .A0(\blk00000003/sig00000049 ), + .A1(\blk00000003/sig00000049 ), + .A2(\blk00000003/sig00000049 ), + .A3(\blk00000003/sig00000049 ), + .CE(\blk00000003/sig000009b6 ), + .CLK(clk), + .D(\blk00000003/sig00000815 ), + .Q(\blk00000003/sig00000b3a ), + .Q15(\NLW_blk00000003/blk00000b6a_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000b69 ( + .C(clk), + .CE(\blk00000003/sig000009b6 ), + .D(\blk00000003/sig00000b39 ), + .Q(\blk00000003/sig00000844 ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000b68 ( + .A0(\blk00000003/sig00000049 ), + .A1(\blk00000003/sig00000049 ), + .A2(\blk00000003/sig00000049 ), + .A3(\blk00000003/sig00000049 ), + .CE(\blk00000003/sig000009b6 ), + .CLK(clk), + .D(\blk00000003/sig00000814 ), + .Q(\blk00000003/sig00000b39 ), + .Q15(\NLW_blk00000003/blk00000b68_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000b67 ( + .C(clk), + .CE(\blk00000003/sig000009b6 ), + .D(\blk00000003/sig00000b38 ), + .Q(\blk00000003/sig00000842 ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000b66 ( + .A0(\blk00000003/sig00000049 ), + .A1(\blk00000003/sig00000049 ), + .A2(\blk00000003/sig00000049 ), + .A3(\blk00000003/sig00000049 ), + .CE(\blk00000003/sig000009b6 ), + .CLK(clk), + .D(\blk00000003/sig00000812 ), + .Q(\blk00000003/sig00000b38 ), + .Q15(\NLW_blk00000003/blk00000b66_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000b65 ( + .C(clk), + .CE(\blk00000003/sig000009b6 ), + .D(\blk00000003/sig00000b37 ), + .Q(\blk00000003/sig00000841 ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000b64 ( + .A0(\blk00000003/sig00000049 ), + .A1(\blk00000003/sig00000049 ), + .A2(\blk00000003/sig00000049 ), + .A3(\blk00000003/sig00000049 ), + .CE(\blk00000003/sig000009b6 ), + .CLK(clk), + .D(\blk00000003/sig00000811 ), + .Q(\blk00000003/sig00000b37 ), + .Q15(\NLW_blk00000003/blk00000b64_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000b63 ( + .C(clk), + .CE(\blk00000003/sig000009b6 ), + .D(\blk00000003/sig00000b36 ), + .Q(\blk00000003/sig00000843 ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000b62 ( + .A0(\blk00000003/sig00000049 ), + .A1(\blk00000003/sig00000049 ), + .A2(\blk00000003/sig00000049 ), + .A3(\blk00000003/sig00000049 ), + .CE(\blk00000003/sig000009b6 ), + .CLK(clk), + .D(\blk00000003/sig00000813 ), + .Q(\blk00000003/sig00000b36 ), + .Q15(\NLW_blk00000003/blk00000b62_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000b61 ( + .C(clk), + .CE(\blk00000003/sig000009b6 ), + .D(\blk00000003/sig00000b35 ), + .Q(\blk00000003/sig0000083f ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000b60 ( + .A0(\blk00000003/sig00000049 ), + .A1(\blk00000003/sig00000049 ), + .A2(\blk00000003/sig00000049 ), + .A3(\blk00000003/sig00000049 ), + .CE(\blk00000003/sig000009b6 ), + .CLK(clk), + .D(\blk00000003/sig0000080f ), + .Q(\blk00000003/sig00000b35 ), + .Q15(\NLW_blk00000003/blk00000b60_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000b5f ( + .C(clk), + .CE(\blk00000003/sig000009b6 ), + .D(\blk00000003/sig00000b34 ), + .Q(\blk00000003/sig0000083e ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000b5e ( + .A0(\blk00000003/sig00000049 ), + .A1(\blk00000003/sig00000049 ), + .A2(\blk00000003/sig00000049 ), + .A3(\blk00000003/sig00000049 ), + .CE(\blk00000003/sig000009b6 ), + .CLK(clk), + .D(\blk00000003/sig0000080e ), + .Q(\blk00000003/sig00000b34 ), + .Q15(\NLW_blk00000003/blk00000b5e_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000b5d ( + .C(clk), + .CE(\blk00000003/sig000009b6 ), + .D(\blk00000003/sig00000b33 ), + .Q(\blk00000003/sig00000840 ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000b5c ( + .A0(\blk00000003/sig00000049 ), + .A1(\blk00000003/sig00000049 ), + .A2(\blk00000003/sig00000049 ), + .A3(\blk00000003/sig00000049 ), + .CE(\blk00000003/sig000009b6 ), + .CLK(clk), + .D(\blk00000003/sig00000810 ), + .Q(\blk00000003/sig00000b33 ), + .Q15(\NLW_blk00000003/blk00000b5c_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000b5b ( + .C(clk), + .CE(\blk00000003/sig000009b6 ), + .D(\blk00000003/sig00000b32 ), + .Q(\blk00000003/sig0000083c ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000b5a ( + .A0(\blk00000003/sig00000049 ), + .A1(\blk00000003/sig00000049 ), + .A2(\blk00000003/sig00000049 ), + .A3(\blk00000003/sig00000049 ), + .CE(\blk00000003/sig000009b6 ), + .CLK(clk), + .D(\blk00000003/sig0000080c ), + .Q(\blk00000003/sig00000b32 ), + .Q15(\NLW_blk00000003/blk00000b5a_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000b59 ( + .C(clk), + .CE(\blk00000003/sig000009b6 ), + .D(\blk00000003/sig00000b31 ), + .Q(\blk00000003/sig0000083b ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000b58 ( + .A0(\blk00000003/sig00000049 ), + .A1(\blk00000003/sig00000049 ), + .A2(\blk00000003/sig00000049 ), + .A3(\blk00000003/sig00000049 ), + .CE(\blk00000003/sig000009b6 ), + .CLK(clk), + .D(\blk00000003/sig0000080b ), + .Q(\blk00000003/sig00000b31 ), + .Q15(\NLW_blk00000003/blk00000b58_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000b57 ( + .C(clk), + .CE(\blk00000003/sig000009b6 ), + .D(\blk00000003/sig00000b30 ), + .Q(\blk00000003/sig0000083d ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000b56 ( + .A0(\blk00000003/sig00000049 ), + .A1(\blk00000003/sig00000049 ), + .A2(\blk00000003/sig00000049 ), + .A3(\blk00000003/sig00000049 ), + .CE(\blk00000003/sig000009b6 ), + .CLK(clk), + .D(\blk00000003/sig0000080d ), + .Q(\blk00000003/sig00000b30 ), + .Q15(\NLW_blk00000003/blk00000b56_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000b55 ( + .C(clk), + .CE(\blk00000003/sig000009b6 ), + .D(\blk00000003/sig00000b2f ), + .Q(\blk00000003/sig0000083a ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000b54 ( + .A0(\blk00000003/sig00000049 ), + .A1(\blk00000003/sig00000049 ), + .A2(\blk00000003/sig00000049 ), + .A3(\blk00000003/sig00000049 ), + .CE(\blk00000003/sig000009b6 ), + .CLK(clk), + .D(\blk00000003/sig0000080a ), + .Q(\blk00000003/sig00000b2f ), + .Q15(\NLW_blk00000003/blk00000b54_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000b53 ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig00000b2e ), + .Q(\blk00000003/sig000009ac ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000b52 ( + .A0(NlwRenamedSig_OI_rfd), + .A1(NlwRenamedSig_OI_rfd), + .A2(NlwRenamedSig_OI_rfd), + .A3(\blk00000003/sig00000049 ), + .CE(ce), + .CLK(clk), + .D(\blk00000003/sig00000761 ), + .Q(\blk00000003/sig00000b2e ), + .Q15(\NLW_blk00000003/blk00000b52_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000b51 ( + .C(clk), + .CE(\blk00000003/sig000009b5 ), + .D(\blk00000003/sig00000b2d ), + .Q(\blk00000003/sig00000808 ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000b50 ( + .A0(\blk00000003/sig00000049 ), + .A1(\blk00000003/sig00000049 ), + .A2(\blk00000003/sig00000049 ), + .A3(\blk00000003/sig00000049 ), + .CE(\blk00000003/sig000009b5 ), + .CLK(clk), + .D(\blk00000003/sig000007d8 ), + .Q(\blk00000003/sig00000b2d ), + .Q15(\NLW_blk00000003/blk00000b50_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000b4f ( + .C(clk), + .CE(\blk00000003/sig000009b5 ), + .D(\blk00000003/sig00000b2c ), + .Q(\blk00000003/sig00000807 ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000b4e ( + .A0(\blk00000003/sig00000049 ), + .A1(\blk00000003/sig00000049 ), + .A2(\blk00000003/sig00000049 ), + .A3(\blk00000003/sig00000049 ), + .CE(\blk00000003/sig000009b5 ), + .CLK(clk), + .D(\blk00000003/sig000007d7 ), + .Q(\blk00000003/sig00000b2c ), + .Q15(\NLW_blk00000003/blk00000b4e_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000b4d ( + .C(clk), + .CE(\blk00000003/sig000009b5 ), + .D(\blk00000003/sig00000b2b ), + .Q(\blk00000003/sig00000809 ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000b4c ( + .A0(\blk00000003/sig00000049 ), + .A1(\blk00000003/sig00000049 ), + .A2(\blk00000003/sig00000049 ), + .A3(\blk00000003/sig00000049 ), + .CE(\blk00000003/sig000009b5 ), + .CLK(clk), + .D(\blk00000003/sig000007d9 ), + .Q(\blk00000003/sig00000b2b ), + .Q15(\NLW_blk00000003/blk00000b4c_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000b4b ( + .C(clk), + .CE(\blk00000003/sig000009b5 ), + .D(\blk00000003/sig00000b2a ), + .Q(\blk00000003/sig00000806 ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000b4a ( + .A0(\blk00000003/sig00000049 ), + .A1(\blk00000003/sig00000049 ), + .A2(\blk00000003/sig00000049 ), + .A3(\blk00000003/sig00000049 ), + .CE(\blk00000003/sig000009b5 ), + .CLK(clk), + .D(\blk00000003/sig000007d6 ), + .Q(\blk00000003/sig00000b2a ), + .Q15(\NLW_blk00000003/blk00000b4a_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000b49 ( + .C(clk), + .CE(\blk00000003/sig000009b5 ), + .D(\blk00000003/sig00000b29 ), + .Q(\blk00000003/sig00000805 ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000b48 ( + .A0(\blk00000003/sig00000049 ), + .A1(\blk00000003/sig00000049 ), + .A2(\blk00000003/sig00000049 ), + .A3(\blk00000003/sig00000049 ), + .CE(\blk00000003/sig000009b5 ), + .CLK(clk), + .D(\blk00000003/sig000007d5 ), + .Q(\blk00000003/sig00000b29 ), + .Q15(\NLW_blk00000003/blk00000b48_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000b47 ( + .C(clk), + .CE(\blk00000003/sig000009b5 ), + .D(\blk00000003/sig00000b28 ), + .Q(\blk00000003/sig00000804 ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000b46 ( + .A0(\blk00000003/sig00000049 ), + .A1(\blk00000003/sig00000049 ), + .A2(\blk00000003/sig00000049 ), + .A3(\blk00000003/sig00000049 ), + .CE(\blk00000003/sig000009b5 ), + .CLK(clk), + .D(\blk00000003/sig000007d4 ), + .Q(\blk00000003/sig00000b28 ), + .Q15(\NLW_blk00000003/blk00000b46_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000b45 ( + .C(clk), + .CE(\blk00000003/sig000009b5 ), + .D(\blk00000003/sig00000b27 ), + .Q(\blk00000003/sig00000803 ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000b44 ( + .A0(\blk00000003/sig00000049 ), + .A1(\blk00000003/sig00000049 ), + .A2(\blk00000003/sig00000049 ), + .A3(\blk00000003/sig00000049 ), + .CE(\blk00000003/sig000009b5 ), + .CLK(clk), + .D(\blk00000003/sig000007d3 ), + .Q(\blk00000003/sig00000b27 ), + .Q15(\NLW_blk00000003/blk00000b44_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000b43 ( + .C(clk), + .CE(\blk00000003/sig000009b5 ), + .D(\blk00000003/sig00000b26 ), + .Q(\blk00000003/sig00000801 ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000b42 ( + .A0(\blk00000003/sig00000049 ), + .A1(\blk00000003/sig00000049 ), + .A2(\blk00000003/sig00000049 ), + .A3(\blk00000003/sig00000049 ), + .CE(\blk00000003/sig000009b5 ), + .CLK(clk), + .D(\blk00000003/sig000007d1 ), + .Q(\blk00000003/sig00000b26 ), + .Q15(\NLW_blk00000003/blk00000b42_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000b41 ( + .C(clk), + .CE(\blk00000003/sig000009b5 ), + .D(\blk00000003/sig00000b25 ), + .Q(\blk00000003/sig00000800 ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000b40 ( + .A0(\blk00000003/sig00000049 ), + .A1(\blk00000003/sig00000049 ), + .A2(\blk00000003/sig00000049 ), + .A3(\blk00000003/sig00000049 ), + .CE(\blk00000003/sig000009b5 ), + .CLK(clk), + .D(\blk00000003/sig000007d0 ), + .Q(\blk00000003/sig00000b25 ), + .Q15(\NLW_blk00000003/blk00000b40_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000b3f ( + .C(clk), + .CE(\blk00000003/sig000009b5 ), + .D(\blk00000003/sig00000b24 ), + .Q(\blk00000003/sig00000802 ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000b3e ( + .A0(\blk00000003/sig00000049 ), + .A1(\blk00000003/sig00000049 ), + .A2(\blk00000003/sig00000049 ), + .A3(\blk00000003/sig00000049 ), + .CE(\blk00000003/sig000009b5 ), + .CLK(clk), + .D(\blk00000003/sig000007d2 ), + .Q(\blk00000003/sig00000b24 ), + .Q15(\NLW_blk00000003/blk00000b3e_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000b3d ( + .C(clk), + .CE(\blk00000003/sig000009b5 ), + .D(\blk00000003/sig00000b23 ), + .Q(\blk00000003/sig000007fe ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000b3c ( + .A0(\blk00000003/sig00000049 ), + .A1(\blk00000003/sig00000049 ), + .A2(\blk00000003/sig00000049 ), + .A3(\blk00000003/sig00000049 ), + .CE(\blk00000003/sig000009b5 ), + .CLK(clk), + .D(\blk00000003/sig000007ce ), + .Q(\blk00000003/sig00000b23 ), + .Q15(\NLW_blk00000003/blk00000b3c_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000b3b ( + .C(clk), + .CE(\blk00000003/sig000009b5 ), + .D(\blk00000003/sig00000b22 ), + .Q(\blk00000003/sig000007fd ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000b3a ( + .A0(\blk00000003/sig00000049 ), + .A1(\blk00000003/sig00000049 ), + .A2(\blk00000003/sig00000049 ), + .A3(\blk00000003/sig00000049 ), + .CE(\blk00000003/sig000009b5 ), + .CLK(clk), + .D(\blk00000003/sig000007cd ), + .Q(\blk00000003/sig00000b22 ), + .Q15(\NLW_blk00000003/blk00000b3a_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000b39 ( + .C(clk), + .CE(\blk00000003/sig000009b5 ), + .D(\blk00000003/sig00000b21 ), + .Q(\blk00000003/sig000007ff ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000b38 ( + .A0(\blk00000003/sig00000049 ), + .A1(\blk00000003/sig00000049 ), + .A2(\blk00000003/sig00000049 ), + .A3(\blk00000003/sig00000049 ), + .CE(\blk00000003/sig000009b5 ), + .CLK(clk), + .D(\blk00000003/sig000007cf ), + .Q(\blk00000003/sig00000b21 ), + .Q15(\NLW_blk00000003/blk00000b38_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000b37 ( + .C(clk), + .CE(\blk00000003/sig000009b5 ), + .D(\blk00000003/sig00000b20 ), + .Q(\blk00000003/sig000007fb ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000b36 ( + .A0(\blk00000003/sig00000049 ), + .A1(\blk00000003/sig00000049 ), + .A2(\blk00000003/sig00000049 ), + .A3(\blk00000003/sig00000049 ), + .CE(\blk00000003/sig000009b5 ), + .CLK(clk), + .D(\blk00000003/sig000007cb ), + .Q(\blk00000003/sig00000b20 ), + .Q15(\NLW_blk00000003/blk00000b36_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000b35 ( + .C(clk), + .CE(\blk00000003/sig000009b5 ), + .D(\blk00000003/sig00000b1f ), + .Q(\blk00000003/sig000007fa ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000b34 ( + .A0(\blk00000003/sig00000049 ), + .A1(\blk00000003/sig00000049 ), + .A2(\blk00000003/sig00000049 ), + .A3(\blk00000003/sig00000049 ), + .CE(\blk00000003/sig000009b5 ), + .CLK(clk), + .D(\blk00000003/sig000007ca ), + .Q(\blk00000003/sig00000b1f ), + .Q15(\NLW_blk00000003/blk00000b34_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000b33 ( + .C(clk), + .CE(\blk00000003/sig000009b5 ), + .D(\blk00000003/sig00000b1e ), + .Q(\blk00000003/sig000007fc ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000b32 ( + .A0(\blk00000003/sig00000049 ), + .A1(\blk00000003/sig00000049 ), + .A2(\blk00000003/sig00000049 ), + .A3(\blk00000003/sig00000049 ), + .CE(\blk00000003/sig000009b5 ), + .CLK(clk), + .D(\blk00000003/sig000007cc ), + .Q(\blk00000003/sig00000b1e ), + .Q15(\NLW_blk00000003/blk00000b32_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000b31 ( + .C(clk), + .CE(\blk00000003/sig000009b5 ), + .D(\blk00000003/sig00000b1d ), + .Q(\blk00000003/sig000007f9 ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000b30 ( + .A0(\blk00000003/sig00000049 ), + .A1(\blk00000003/sig00000049 ), + .A2(\blk00000003/sig00000049 ), + .A3(\blk00000003/sig00000049 ), + .CE(\blk00000003/sig000009b5 ), + .CLK(clk), + .D(\blk00000003/sig000007c9 ), + .Q(\blk00000003/sig00000b1d ), + .Q15(\NLW_blk00000003/blk00000b30_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000b2f ( + .C(clk), + .CE(\blk00000003/sig000009b5 ), + .D(\blk00000003/sig00000b1c ), + .Q(\blk00000003/sig000007f8 ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000b2e ( + .A0(\blk00000003/sig00000049 ), + .A1(\blk00000003/sig00000049 ), + .A2(\blk00000003/sig00000049 ), + .A3(\blk00000003/sig00000049 ), + .CE(\blk00000003/sig000009b5 ), + .CLK(clk), + .D(\blk00000003/sig000007c8 ), + .Q(\blk00000003/sig00000b1c ), + .Q15(\NLW_blk00000003/blk00000b2e_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000b2d ( + .C(clk), + .CE(\blk00000003/sig000009b5 ), + .D(\blk00000003/sig00000b1b ), + .Q(\blk00000003/sig000007f7 ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000b2c ( + .A0(\blk00000003/sig00000049 ), + .A1(\blk00000003/sig00000049 ), + .A2(\blk00000003/sig00000049 ), + .A3(\blk00000003/sig00000049 ), + .CE(\blk00000003/sig000009b5 ), + .CLK(clk), + .D(\blk00000003/sig000007c7 ), + .Q(\blk00000003/sig00000b1b ), + .Q15(\NLW_blk00000003/blk00000b2c_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000b2b ( + .C(clk), + .CE(\blk00000003/sig000009b5 ), + .D(\blk00000003/sig00000b1a ), + .Q(\blk00000003/sig000007f6 ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000b2a ( + .A0(\blk00000003/sig00000049 ), + .A1(\blk00000003/sig00000049 ), + .A2(\blk00000003/sig00000049 ), + .A3(\blk00000003/sig00000049 ), + .CE(\blk00000003/sig000009b5 ), + .CLK(clk), + .D(\blk00000003/sig000007c6 ), + .Q(\blk00000003/sig00000b1a ), + .Q15(\NLW_blk00000003/blk00000b2a_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000b29 ( + .C(clk), + .CE(\blk00000003/sig000009b5 ), + .D(\blk00000003/sig00000b19 ), + .Q(\blk00000003/sig000007f4 ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000b28 ( + .A0(\blk00000003/sig00000049 ), + .A1(\blk00000003/sig00000049 ), + .A2(\blk00000003/sig00000049 ), + .A3(\blk00000003/sig00000049 ), + .CE(\blk00000003/sig000009b5 ), + .CLK(clk), + .D(\blk00000003/sig000007c4 ), + .Q(\blk00000003/sig00000b19 ), + .Q15(\NLW_blk00000003/blk00000b28_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000b27 ( + .C(clk), + .CE(\blk00000003/sig000009b5 ), + .D(\blk00000003/sig00000b18 ), + .Q(\blk00000003/sig000007f3 ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000b26 ( + .A0(\blk00000003/sig00000049 ), + .A1(\blk00000003/sig00000049 ), + .A2(\blk00000003/sig00000049 ), + .A3(\blk00000003/sig00000049 ), + .CE(\blk00000003/sig000009b5 ), + .CLK(clk), + .D(\blk00000003/sig000007c3 ), + .Q(\blk00000003/sig00000b18 ), + .Q15(\NLW_blk00000003/blk00000b26_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000b25 ( + .C(clk), + .CE(\blk00000003/sig000009b5 ), + .D(\blk00000003/sig00000b17 ), + .Q(\blk00000003/sig000007f5 ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000b24 ( + .A0(\blk00000003/sig00000049 ), + .A1(\blk00000003/sig00000049 ), + .A2(\blk00000003/sig00000049 ), + .A3(\blk00000003/sig00000049 ), + .CE(\blk00000003/sig000009b5 ), + .CLK(clk), + .D(\blk00000003/sig000007c5 ), + .Q(\blk00000003/sig00000b17 ), + .Q15(\NLW_blk00000003/blk00000b24_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000b23 ( + .C(clk), + .CE(\blk00000003/sig000009b5 ), + .D(\blk00000003/sig00000b16 ), + .Q(\blk00000003/sig000007f2 ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000b22 ( + .A0(\blk00000003/sig00000049 ), + .A1(\blk00000003/sig00000049 ), + .A2(\blk00000003/sig00000049 ), + .A3(\blk00000003/sig00000049 ), + .CE(\blk00000003/sig000009b5 ), + .CLK(clk), + .D(\blk00000003/sig000007c2 ), + .Q(\blk00000003/sig00000b16 ), + .Q15(\NLW_blk00000003/blk00000b22_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000b21 ( + .C(clk), + .CE(\blk00000003/sig000009b5 ), + .D(\blk00000003/sig00000b15 ), + .Q(\blk00000003/sig00000821 ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000b20 ( + .A0(\blk00000003/sig00000049 ), + .A1(\blk00000003/sig00000049 ), + .A2(\blk00000003/sig00000049 ), + .A3(\blk00000003/sig00000049 ), + .CE(\blk00000003/sig000009b5 ), + .CLK(clk), + .D(\blk00000003/sig000007f1 ), + .Q(\blk00000003/sig00000b15 ), + .Q15(\NLW_blk00000003/blk00000b20_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000b1f ( + .C(clk), + .CE(\blk00000003/sig000009b5 ), + .D(\blk00000003/sig00000b14 ), + .Q(\blk00000003/sig00000820 ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000b1e ( + .A0(\blk00000003/sig00000049 ), + .A1(\blk00000003/sig00000049 ), + .A2(\blk00000003/sig00000049 ), + .A3(\blk00000003/sig00000049 ), + .CE(\blk00000003/sig000009b5 ), + .CLK(clk), + .D(\blk00000003/sig000007f0 ), + .Q(\blk00000003/sig00000b14 ), + .Q15(\NLW_blk00000003/blk00000b1e_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000b1d ( + .C(clk), + .CE(\blk00000003/sig000009b5 ), + .D(\blk00000003/sig00000b13 ), + .Q(\blk00000003/sig0000081f ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000b1c ( + .A0(\blk00000003/sig00000049 ), + .A1(\blk00000003/sig00000049 ), + .A2(\blk00000003/sig00000049 ), + .A3(\blk00000003/sig00000049 ), + .CE(\blk00000003/sig000009b5 ), + .CLK(clk), + .D(\blk00000003/sig000007ef ), + .Q(\blk00000003/sig00000b13 ), + .Q15(\NLW_blk00000003/blk00000b1c_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000b1b ( + .C(clk), + .CE(\blk00000003/sig000009b5 ), + .D(\blk00000003/sig00000b12 ), + .Q(\blk00000003/sig0000081d ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000b1a ( + .A0(\blk00000003/sig00000049 ), + .A1(\blk00000003/sig00000049 ), + .A2(\blk00000003/sig00000049 ), + .A3(\blk00000003/sig00000049 ), + .CE(\blk00000003/sig000009b5 ), + .CLK(clk), + .D(\blk00000003/sig000007ed ), + .Q(\blk00000003/sig00000b12 ), + .Q15(\NLW_blk00000003/blk00000b1a_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000b19 ( + .C(clk), + .CE(\blk00000003/sig000009b5 ), + .D(\blk00000003/sig00000b11 ), + .Q(\blk00000003/sig0000081c ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000b18 ( + .A0(\blk00000003/sig00000049 ), + .A1(\blk00000003/sig00000049 ), + .A2(\blk00000003/sig00000049 ), + .A3(\blk00000003/sig00000049 ), + .CE(\blk00000003/sig000009b5 ), + .CLK(clk), + .D(\blk00000003/sig000007ec ), + .Q(\blk00000003/sig00000b11 ), + .Q15(\NLW_blk00000003/blk00000b18_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000b17 ( + .C(clk), + .CE(\blk00000003/sig000009b5 ), + .D(\blk00000003/sig00000b10 ), + .Q(\blk00000003/sig0000081e ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000b16 ( + .A0(\blk00000003/sig00000049 ), + .A1(\blk00000003/sig00000049 ), + .A2(\blk00000003/sig00000049 ), + .A3(\blk00000003/sig00000049 ), + .CE(\blk00000003/sig000009b5 ), + .CLK(clk), + .D(\blk00000003/sig000007ee ), + .Q(\blk00000003/sig00000b10 ), + .Q15(\NLW_blk00000003/blk00000b16_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000b15 ( + .C(clk), + .CE(\blk00000003/sig000009b5 ), + .D(\blk00000003/sig00000b0f ), + .Q(\blk00000003/sig0000081a ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000b14 ( + .A0(\blk00000003/sig00000049 ), + .A1(\blk00000003/sig00000049 ), + .A2(\blk00000003/sig00000049 ), + .A3(\blk00000003/sig00000049 ), + .CE(\blk00000003/sig000009b5 ), + .CLK(clk), + .D(\blk00000003/sig000007ea ), + .Q(\blk00000003/sig00000b0f ), + .Q15(\NLW_blk00000003/blk00000b14_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000b13 ( + .C(clk), + .CE(\blk00000003/sig000009b5 ), + .D(\blk00000003/sig00000b0e ), + .Q(\blk00000003/sig00000819 ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000b12 ( + .A0(\blk00000003/sig00000049 ), + .A1(\blk00000003/sig00000049 ), + .A2(\blk00000003/sig00000049 ), + .A3(\blk00000003/sig00000049 ), + .CE(\blk00000003/sig000009b5 ), + .CLK(clk), + .D(\blk00000003/sig000007e9 ), + .Q(\blk00000003/sig00000b0e ), + .Q15(\NLW_blk00000003/blk00000b12_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000b11 ( + .C(clk), + .CE(\blk00000003/sig000009b5 ), + .D(\blk00000003/sig00000b0d ), + .Q(\blk00000003/sig0000081b ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000b10 ( + .A0(\blk00000003/sig00000049 ), + .A1(\blk00000003/sig00000049 ), + .A2(\blk00000003/sig00000049 ), + .A3(\blk00000003/sig00000049 ), + .CE(\blk00000003/sig000009b5 ), + .CLK(clk), + .D(\blk00000003/sig000007eb ), + .Q(\blk00000003/sig00000b0d ), + .Q15(\NLW_blk00000003/blk00000b10_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000b0f ( + .C(clk), + .CE(\blk00000003/sig000009b5 ), + .D(\blk00000003/sig00000b0c ), + .Q(\blk00000003/sig00000817 ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000b0e ( + .A0(\blk00000003/sig00000049 ), + .A1(\blk00000003/sig00000049 ), + .A2(\blk00000003/sig00000049 ), + .A3(\blk00000003/sig00000049 ), + .CE(\blk00000003/sig000009b5 ), + .CLK(clk), + .D(\blk00000003/sig000007e7 ), + .Q(\blk00000003/sig00000b0c ), + .Q15(\NLW_blk00000003/blk00000b0e_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000b0d ( + .C(clk), + .CE(\blk00000003/sig000009b5 ), + .D(\blk00000003/sig00000b0b ), + .Q(\blk00000003/sig00000816 ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000b0c ( + .A0(\blk00000003/sig00000049 ), + .A1(\blk00000003/sig00000049 ), + .A2(\blk00000003/sig00000049 ), + .A3(\blk00000003/sig00000049 ), + .CE(\blk00000003/sig000009b5 ), + .CLK(clk), + .D(\blk00000003/sig000007e6 ), + .Q(\blk00000003/sig00000b0b ), + .Q15(\NLW_blk00000003/blk00000b0c_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000b0b ( + .C(clk), + .CE(\blk00000003/sig000009b5 ), + .D(\blk00000003/sig00000b0a ), + .Q(\blk00000003/sig00000818 ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000b0a ( + .A0(\blk00000003/sig00000049 ), + .A1(\blk00000003/sig00000049 ), + .A2(\blk00000003/sig00000049 ), + .A3(\blk00000003/sig00000049 ), + .CE(\blk00000003/sig000009b5 ), + .CLK(clk), + .D(\blk00000003/sig000007e8 ), + .Q(\blk00000003/sig00000b0a ), + .Q15(\NLW_blk00000003/blk00000b0a_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000b09 ( + .C(clk), + .CE(\blk00000003/sig000009b5 ), + .D(\blk00000003/sig00000b09 ), + .Q(\blk00000003/sig00000815 ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000b08 ( + .A0(\blk00000003/sig00000049 ), + .A1(\blk00000003/sig00000049 ), + .A2(\blk00000003/sig00000049 ), + .A3(\blk00000003/sig00000049 ), + .CE(\blk00000003/sig000009b5 ), + .CLK(clk), + .D(\blk00000003/sig000007e5 ), + .Q(\blk00000003/sig00000b09 ), + .Q15(\NLW_blk00000003/blk00000b08_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000b07 ( + .C(clk), + .CE(\blk00000003/sig000009b5 ), + .D(\blk00000003/sig00000b08 ), + .Q(\blk00000003/sig00000814 ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000b06 ( + .A0(\blk00000003/sig00000049 ), + .A1(\blk00000003/sig00000049 ), + .A2(\blk00000003/sig00000049 ), + .A3(\blk00000003/sig00000049 ), + .CE(\blk00000003/sig000009b5 ), + .CLK(clk), + .D(\blk00000003/sig000007e4 ), + .Q(\blk00000003/sig00000b08 ), + .Q15(\NLW_blk00000003/blk00000b06_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000b05 ( + .C(clk), + .CE(\blk00000003/sig000009b5 ), + .D(\blk00000003/sig00000b07 ), + .Q(\blk00000003/sig00000813 ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000b04 ( + .A0(\blk00000003/sig00000049 ), + .A1(\blk00000003/sig00000049 ), + .A2(\blk00000003/sig00000049 ), + .A3(\blk00000003/sig00000049 ), + .CE(\blk00000003/sig000009b5 ), + .CLK(clk), + .D(\blk00000003/sig000007e3 ), + .Q(\blk00000003/sig00000b07 ), + .Q15(\NLW_blk00000003/blk00000b04_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000b03 ( + .C(clk), + .CE(\blk00000003/sig000009b5 ), + .D(\blk00000003/sig00000b06 ), + .Q(\blk00000003/sig00000812 ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000b02 ( + .A0(\blk00000003/sig00000049 ), + .A1(\blk00000003/sig00000049 ), + .A2(\blk00000003/sig00000049 ), + .A3(\blk00000003/sig00000049 ), + .CE(\blk00000003/sig000009b5 ), + .CLK(clk), + .D(\blk00000003/sig000007e2 ), + .Q(\blk00000003/sig00000b06 ), + .Q15(\NLW_blk00000003/blk00000b02_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000b01 ( + .C(clk), + .CE(\blk00000003/sig000009b5 ), + .D(\blk00000003/sig00000b05 ), + .Q(\blk00000003/sig00000810 ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000b00 ( + .A0(\blk00000003/sig00000049 ), + .A1(\blk00000003/sig00000049 ), + .A2(\blk00000003/sig00000049 ), + .A3(\blk00000003/sig00000049 ), + .CE(\blk00000003/sig000009b5 ), + .CLK(clk), + .D(\blk00000003/sig000007e0 ), + .Q(\blk00000003/sig00000b05 ), + .Q15(\NLW_blk00000003/blk00000b00_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000aff ( + .C(clk), + .CE(\blk00000003/sig000009b5 ), + .D(\blk00000003/sig00000b04 ), + .Q(\blk00000003/sig0000080f ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000afe ( + .A0(\blk00000003/sig00000049 ), + .A1(\blk00000003/sig00000049 ), + .A2(\blk00000003/sig00000049 ), + .A3(\blk00000003/sig00000049 ), + .CE(\blk00000003/sig000009b5 ), + .CLK(clk), + .D(\blk00000003/sig000007df ), + .Q(\blk00000003/sig00000b04 ), + .Q15(\NLW_blk00000003/blk00000afe_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000afd ( + .C(clk), + .CE(\blk00000003/sig000009b5 ), + .D(\blk00000003/sig00000b03 ), + .Q(\blk00000003/sig00000811 ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000afc ( + .A0(\blk00000003/sig00000049 ), + .A1(\blk00000003/sig00000049 ), + .A2(\blk00000003/sig00000049 ), + .A3(\blk00000003/sig00000049 ), + .CE(\blk00000003/sig000009b5 ), + .CLK(clk), + .D(\blk00000003/sig000007e1 ), + .Q(\blk00000003/sig00000b03 ), + .Q15(\NLW_blk00000003/blk00000afc_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000afb ( + .C(clk), + .CE(\blk00000003/sig000009b5 ), + .D(\blk00000003/sig00000b02 ), + .Q(\blk00000003/sig0000080d ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000afa ( + .A0(\blk00000003/sig00000049 ), + .A1(\blk00000003/sig00000049 ), + .A2(\blk00000003/sig00000049 ), + .A3(\blk00000003/sig00000049 ), + .CE(\blk00000003/sig000009b5 ), + .CLK(clk), + .D(\blk00000003/sig000007dd ), + .Q(\blk00000003/sig00000b02 ), + .Q15(\NLW_blk00000003/blk00000afa_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000af9 ( + .C(clk), + .CE(\blk00000003/sig000009b5 ), + .D(\blk00000003/sig00000b01 ), + .Q(\blk00000003/sig0000080c ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000af8 ( + .A0(\blk00000003/sig00000049 ), + .A1(\blk00000003/sig00000049 ), + .A2(\blk00000003/sig00000049 ), + .A3(\blk00000003/sig00000049 ), + .CE(\blk00000003/sig000009b5 ), + .CLK(clk), + .D(\blk00000003/sig000007dc ), + .Q(\blk00000003/sig00000b01 ), + .Q15(\NLW_blk00000003/blk00000af8_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000af7 ( + .C(clk), + .CE(\blk00000003/sig000009b5 ), + .D(\blk00000003/sig00000b00 ), + .Q(\blk00000003/sig0000080e ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000af6 ( + .A0(\blk00000003/sig00000049 ), + .A1(\blk00000003/sig00000049 ), + .A2(\blk00000003/sig00000049 ), + .A3(\blk00000003/sig00000049 ), + .CE(\blk00000003/sig000009b5 ), + .CLK(clk), + .D(\blk00000003/sig000007de ), + .Q(\blk00000003/sig00000b00 ), + .Q15(\NLW_blk00000003/blk00000af6_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000af5 ( + .C(clk), + .CE(\blk00000003/sig000009b5 ), + .D(\blk00000003/sig00000aff ), + .Q(\blk00000003/sig0000080a ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000af4 ( + .A0(\blk00000003/sig00000049 ), + .A1(\blk00000003/sig00000049 ), + .A2(\blk00000003/sig00000049 ), + .A3(\blk00000003/sig00000049 ), + .CE(\blk00000003/sig000009b5 ), + .CLK(clk), + .D(\blk00000003/sig000007da ), + .Q(\blk00000003/sig00000aff ), + .Q15(\NLW_blk00000003/blk00000af4_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000af3 ( + .C(clk), + .CE(\blk00000003/sig000009b5 ), + .D(\blk00000003/sig00000afe ), + .Q(\blk00000003/sig0000080b ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000af2 ( + .A0(\blk00000003/sig00000049 ), + .A1(\blk00000003/sig00000049 ), + .A2(\blk00000003/sig00000049 ), + .A3(\blk00000003/sig00000049 ), + .CE(\blk00000003/sig000009b5 ), + .CLK(clk), + .D(\blk00000003/sig000007db ), + .Q(\blk00000003/sig00000afe ), + .Q15(\NLW_blk00000003/blk00000af2_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000af1 ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig00000afd ), + .Q(\blk00000003/sig00000937 ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000af0 ( + .A0(\blk00000003/sig00000049 ), + .A1(\blk00000003/sig00000049 ), + .A2(\blk00000003/sig00000049 ), + .A3(NlwRenamedSig_OI_rfd), + .CE(ce), + .CLK(clk), + .D(\blk00000003/sig00000760 ), + .Q(\blk00000003/sig00000afd ), + .Q15(\NLW_blk00000003/blk00000af0_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000aef ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig00000afc ), + .Q(\blk00000003/sig000001c8 ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000aee ( + .A0(NlwRenamedSig_OI_rfd), + .A1(NlwRenamedSig_OI_rfd), + .A2(NlwRenamedSig_OI_rfd), + .A3(\blk00000003/sig00000049 ), + .CE(ce), + .CLK(clk), + .D(\blk00000003/sig00000a9a ), + .Q(\blk00000003/sig00000afc ), + .Q15(\NLW_blk00000003/blk00000aee_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000aed ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig00000afb ), + .Q(\blk00000003/sig000001c7 ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000aec ( + .A0(NlwRenamedSig_OI_rfd), + .A1(NlwRenamedSig_OI_rfd), + .A2(NlwRenamedSig_OI_rfd), + .A3(\blk00000003/sig00000049 ), + .CE(ce), + .CLK(clk), + .D(\blk00000003/sig00000a98 ), + .Q(\blk00000003/sig00000afb ), + .Q15(\NLW_blk00000003/blk00000aec_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000aeb ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig00000afa ), + .Q(\blk00000003/sig000001c9 ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000aea ( + .A0(NlwRenamedSig_OI_rfd), + .A1(NlwRenamedSig_OI_rfd), + .A2(NlwRenamedSig_OI_rfd), + .A3(\blk00000003/sig00000049 ), + .CE(ce), + .CLK(clk), + .D(\blk00000003/sig00000a96 ), + .Q(\blk00000003/sig00000afa ), + .Q15(\NLW_blk00000003/blk00000aea_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000ae9 ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig00000af9 ), + .Q(\blk00000003/sig000001c5 ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000ae8 ( + .A0(NlwRenamedSig_OI_rfd), + .A1(NlwRenamedSig_OI_rfd), + .A2(NlwRenamedSig_OI_rfd), + .A3(\blk00000003/sig00000049 ), + .CE(ce), + .CLK(clk), + .D(\blk00000003/sig00000a94 ), + .Q(\blk00000003/sig00000af9 ), + .Q15(\NLW_blk00000003/blk00000ae8_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000ae7 ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig00000af8 ), + .Q(\blk00000003/sig000001c4 ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000ae6 ( + .A0(NlwRenamedSig_OI_rfd), + .A1(NlwRenamedSig_OI_rfd), + .A2(NlwRenamedSig_OI_rfd), + .A3(\blk00000003/sig00000049 ), + .CE(ce), + .CLK(clk), + .D(\blk00000003/sig00000a92 ), + .Q(\blk00000003/sig00000af8 ), + .Q15(\NLW_blk00000003/blk00000ae6_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000ae5 ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig00000af7 ), + .Q(\blk00000003/sig000001c6 ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000ae4 ( + .A0(NlwRenamedSig_OI_rfd), + .A1(NlwRenamedSig_OI_rfd), + .A2(NlwRenamedSig_OI_rfd), + .A3(\blk00000003/sig00000049 ), + .CE(ce), + .CLK(clk), + .D(\blk00000003/sig00000a90 ), + .Q(\blk00000003/sig00000af7 ), + .Q15(\NLW_blk00000003/blk00000ae4_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000ae3 ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig00000af6 ), + .Q(\blk00000003/sig000001c2 ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000ae2 ( + .A0(NlwRenamedSig_OI_rfd), + .A1(NlwRenamedSig_OI_rfd), + .A2(NlwRenamedSig_OI_rfd), + .A3(\blk00000003/sig00000049 ), + .CE(ce), + .CLK(clk), + .D(\blk00000003/sig00000a8e ), + .Q(\blk00000003/sig00000af6 ), + .Q15(\NLW_blk00000003/blk00000ae2_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000ae1 ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig00000af5 ), + .Q(\blk00000003/sig000001c1 ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000ae0 ( + .A0(NlwRenamedSig_OI_rfd), + .A1(NlwRenamedSig_OI_rfd), + .A2(NlwRenamedSig_OI_rfd), + .A3(\blk00000003/sig00000049 ), + .CE(ce), + .CLK(clk), + .D(\blk00000003/sig00000a8c ), + .Q(\blk00000003/sig00000af5 ), + .Q15(\NLW_blk00000003/blk00000ae0_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000adf ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig00000af4 ), + .Q(\blk00000003/sig000001c3 ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000ade ( + .A0(NlwRenamedSig_OI_rfd), + .A1(NlwRenamedSig_OI_rfd), + .A2(NlwRenamedSig_OI_rfd), + .A3(\blk00000003/sig00000049 ), + .CE(ce), + .CLK(clk), + .D(\blk00000003/sig00000a8a ), + .Q(\blk00000003/sig00000af4 ), + .Q15(\NLW_blk00000003/blk00000ade_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000add ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig00000af3 ), + .Q(\blk00000003/sig000001bf ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000adc ( + .A0(NlwRenamedSig_OI_rfd), + .A1(NlwRenamedSig_OI_rfd), + .A2(NlwRenamedSig_OI_rfd), + .A3(\blk00000003/sig00000049 ), + .CE(ce), + .CLK(clk), + .D(\blk00000003/sig00000a86 ), + .Q(\blk00000003/sig00000af3 ), + .Q15(\NLW_blk00000003/blk00000adc_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000adb ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig00000af2 ), + .Q(\blk00000003/sig000001be ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000ada ( + .A0(NlwRenamedSig_OI_rfd), + .A1(NlwRenamedSig_OI_rfd), + .A2(NlwRenamedSig_OI_rfd), + .A3(\blk00000003/sig00000049 ), + .CE(ce), + .CLK(clk), + .D(\blk00000003/sig00000a84 ), + .Q(\blk00000003/sig00000af2 ), + .Q15(\NLW_blk00000003/blk00000ada_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000ad9 ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig00000af1 ), + .Q(\blk00000003/sig000001c0 ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000ad8 ( + .A0(NlwRenamedSig_OI_rfd), + .A1(NlwRenamedSig_OI_rfd), + .A2(NlwRenamedSig_OI_rfd), + .A3(\blk00000003/sig00000049 ), + .CE(ce), + .CLK(clk), + .D(\blk00000003/sig00000a88 ), + .Q(\blk00000003/sig00000af1 ), + .Q15(\NLW_blk00000003/blk00000ad8_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000ad7 ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig00000af0 ), + .Q(\blk00000003/sig000001bc ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000ad6 ( + .A0(NlwRenamedSig_OI_rfd), + .A1(NlwRenamedSig_OI_rfd), + .A2(NlwRenamedSig_OI_rfd), + .A3(\blk00000003/sig00000049 ), + .CE(ce), + .CLK(clk), + .D(\blk00000003/sig00000a7c ), + .Q(\blk00000003/sig00000af0 ), + .Q15(\NLW_blk00000003/blk00000ad6_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000ad5 ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig00000aef ), + .Q(\blk00000003/sig000001bb ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000ad4 ( + .A0(NlwRenamedSig_OI_rfd), + .A1(NlwRenamedSig_OI_rfd), + .A2(NlwRenamedSig_OI_rfd), + .A3(\blk00000003/sig00000049 ), + .CE(ce), + .CLK(clk), + .D(\blk00000003/sig00000a80 ), + .Q(\blk00000003/sig00000aef ), + .Q15(\NLW_blk00000003/blk00000ad4_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000ad3 ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig00000aee ), + .Q(\blk00000003/sig000001bd ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000ad2 ( + .A0(NlwRenamedSig_OI_rfd), + .A1(NlwRenamedSig_OI_rfd), + .A2(NlwRenamedSig_OI_rfd), + .A3(\blk00000003/sig00000049 ), + .CE(ce), + .CLK(clk), + .D(\blk00000003/sig00000a82 ), + .Q(\blk00000003/sig00000aee ), + .Q15(\NLW_blk00000003/blk00000ad2_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000ad1 ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig00000aed ), + .Q(\blk00000003/sig000001b9 ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000ad0 ( + .A0(NlwRenamedSig_OI_rfd), + .A1(NlwRenamedSig_OI_rfd), + .A2(NlwRenamedSig_OI_rfd), + .A3(\blk00000003/sig00000049 ), + .CE(ce), + .CLK(clk), + .D(\blk00000003/sig00000a76 ), + .Q(\blk00000003/sig00000aed ), + .Q15(\NLW_blk00000003/blk00000ad0_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000acf ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig00000aec ), + .Q(\blk00000003/sig000001b8 ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000ace ( + .A0(NlwRenamedSig_OI_rfd), + .A1(NlwRenamedSig_OI_rfd), + .A2(NlwRenamedSig_OI_rfd), + .A3(\blk00000003/sig00000049 ), + .CE(ce), + .CLK(clk), + .D(\blk00000003/sig00000a7a ), + .Q(\blk00000003/sig00000aec ), + .Q15(\NLW_blk00000003/blk00000ace_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000acd ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig00000aeb ), + .Q(\blk00000003/sig000001ba ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000acc ( + .A0(NlwRenamedSig_OI_rfd), + .A1(NlwRenamedSig_OI_rfd), + .A2(NlwRenamedSig_OI_rfd), + .A3(\blk00000003/sig00000049 ), + .CE(ce), + .CLK(clk), + .D(\blk00000003/sig00000a7e ), + .Q(\blk00000003/sig00000aeb ), + .Q15(\NLW_blk00000003/blk00000acc_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000acb ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig00000aea ), + .Q(\blk00000003/sig000001b7 ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000aca ( + .A0(NlwRenamedSig_OI_rfd), + .A1(NlwRenamedSig_OI_rfd), + .A2(NlwRenamedSig_OI_rfd), + .A3(\blk00000003/sig00000049 ), + .CE(ce), + .CLK(clk), + .D(\blk00000003/sig00000a78 ), + .Q(\blk00000003/sig00000aea ), + .Q15(\NLW_blk00000003/blk00000aca_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000ac9 ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig00000ae9 ), + .Q(\blk00000003/sig000001b6 ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000ac8 ( + .A0(NlwRenamedSig_OI_rfd), + .A1(NlwRenamedSig_OI_rfd), + .A2(NlwRenamedSig_OI_rfd), + .A3(\blk00000003/sig00000049 ), + .CE(ce), + .CLK(clk), + .D(\blk00000003/sig00000a70 ), + .Q(\blk00000003/sig00000ae9 ), + .Q15(\NLW_blk00000003/blk00000ac8_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000ac7 ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig00000ae8 ), + .Q(\blk00000003/sig000001b5 ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000ac6 ( + .A0(NlwRenamedSig_OI_rfd), + .A1(NlwRenamedSig_OI_rfd), + .A2(NlwRenamedSig_OI_rfd), + .A3(\blk00000003/sig00000049 ), + .CE(ce), + .CLK(clk), + .D(\blk00000003/sig00000a74 ), + .Q(\blk00000003/sig00000ae8 ), + .Q15(\NLW_blk00000003/blk00000ac6_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000ac5 ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig00000ae7 ), + .Q(\blk00000003/sig000001b4 ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000ac4 ( + .A0(NlwRenamedSig_OI_rfd), + .A1(NlwRenamedSig_OI_rfd), + .A2(NlwRenamedSig_OI_rfd), + .A3(\blk00000003/sig00000049 ), + .CE(ce), + .CLK(clk), + .D(\blk00000003/sig00000a72 ), + .Q(\blk00000003/sig00000ae7 ), + .Q15(\NLW_blk00000003/blk00000ac4_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000ac3 ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig00000ae6 ), + .Q(\blk00000003/sig000001b2 ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000ac2 ( + .A0(NlwRenamedSig_OI_rfd), + .A1(NlwRenamedSig_OI_rfd), + .A2(NlwRenamedSig_OI_rfd), + .A3(\blk00000003/sig00000049 ), + .CE(ce), + .CLK(clk), + .D(\blk00000003/sig00000a6c ), + .Q(\blk00000003/sig00000ae6 ), + .Q15(\NLW_blk00000003/blk00000ac2_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000ac1 ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig00000ae5 ), + .Q(\blk00000003/sig00000152 ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000ac0 ( + .A0(NlwRenamedSig_OI_rfd), + .A1(NlwRenamedSig_OI_rfd), + .A2(NlwRenamedSig_OI_rfd), + .A3(\blk00000003/sig00000049 ), + .CE(ce), + .CLK(clk), + .D(\blk00000003/sig00000a6a ), + .Q(\blk00000003/sig00000ae5 ), + .Q15(\NLW_blk00000003/blk00000ac0_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000abf ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig00000ae4 ), + .Q(\blk00000003/sig000001b3 ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000abe ( + .A0(NlwRenamedSig_OI_rfd), + .A1(NlwRenamedSig_OI_rfd), + .A2(NlwRenamedSig_OI_rfd), + .A3(\blk00000003/sig00000049 ), + .CE(ce), + .CLK(clk), + .D(\blk00000003/sig00000a6e ), + .Q(\blk00000003/sig00000ae4 ), + .Q15(\NLW_blk00000003/blk00000abe_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000abd ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig00000ae3 ), + .Q(\blk00000003/sig00000150 ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000abc ( + .A0(NlwRenamedSig_OI_rfd), + .A1(NlwRenamedSig_OI_rfd), + .A2(NlwRenamedSig_OI_rfd), + .A3(\blk00000003/sig00000049 ), + .CE(ce), + .CLK(clk), + .D(\blk00000003/sig00000a62 ), + .Q(\blk00000003/sig00000ae3 ), + .Q15(\NLW_blk00000003/blk00000abc_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000abb ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig00000ae2 ), + .Q(\blk00000003/sig0000014f ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000aba ( + .A0(NlwRenamedSig_OI_rfd), + .A1(NlwRenamedSig_OI_rfd), + .A2(NlwRenamedSig_OI_rfd), + .A3(\blk00000003/sig00000049 ), + .CE(ce), + .CLK(clk), + .D(\blk00000003/sig00000a66 ), + .Q(\blk00000003/sig00000ae2 ), + .Q15(\NLW_blk00000003/blk00000aba_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000ab9 ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig00000ae1 ), + .Q(\blk00000003/sig00000151 ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000ab8 ( + .A0(NlwRenamedSig_OI_rfd), + .A1(NlwRenamedSig_OI_rfd), + .A2(NlwRenamedSig_OI_rfd), + .A3(\blk00000003/sig00000049 ), + .CE(ce), + .CLK(clk), + .D(\blk00000003/sig00000a68 ), + .Q(\blk00000003/sig00000ae1 ), + .Q15(\NLW_blk00000003/blk00000ab8_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000ab7 ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig00000ae0 ), + .Q(\blk00000003/sig0000014d ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000ab6 ( + .A0(NlwRenamedSig_OI_rfd), + .A1(NlwRenamedSig_OI_rfd), + .A2(NlwRenamedSig_OI_rfd), + .A3(\blk00000003/sig00000049 ), + .CE(ce), + .CLK(clk), + .D(\blk00000003/sig00000a5c ), + .Q(\blk00000003/sig00000ae0 ), + .Q15(\NLW_blk00000003/blk00000ab6_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000ab5 ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig00000adf ), + .Q(\blk00000003/sig0000014c ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000ab4 ( + .A0(NlwRenamedSig_OI_rfd), + .A1(NlwRenamedSig_OI_rfd), + .A2(NlwRenamedSig_OI_rfd), + .A3(\blk00000003/sig00000049 ), + .CE(ce), + .CLK(clk), + .D(\blk00000003/sig00000a60 ), + .Q(\blk00000003/sig00000adf ), + .Q15(\NLW_blk00000003/blk00000ab4_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000ab3 ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig00000ade ), + .Q(\blk00000003/sig0000014e ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000ab2 ( + .A0(NlwRenamedSig_OI_rfd), + .A1(NlwRenamedSig_OI_rfd), + .A2(NlwRenamedSig_OI_rfd), + .A3(\blk00000003/sig00000049 ), + .CE(ce), + .CLK(clk), + .D(\blk00000003/sig00000a64 ), + .Q(\blk00000003/sig00000ade ), + .Q15(\NLW_blk00000003/blk00000ab2_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000ab1 ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig00000add ), + .Q(\blk00000003/sig0000014b ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000ab0 ( + .A0(NlwRenamedSig_OI_rfd), + .A1(NlwRenamedSig_OI_rfd), + .A2(NlwRenamedSig_OI_rfd), + .A3(\blk00000003/sig00000049 ), + .CE(ce), + .CLK(clk), + .D(\blk00000003/sig00000a5e ), + .Q(\blk00000003/sig00000add ), + .Q15(\NLW_blk00000003/blk00000ab0_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000aaf ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig00000adc ), + .Q(\blk00000003/sig0000014a ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000aae ( + .A0(NlwRenamedSig_OI_rfd), + .A1(NlwRenamedSig_OI_rfd), + .A2(NlwRenamedSig_OI_rfd), + .A3(\blk00000003/sig00000049 ), + .CE(ce), + .CLK(clk), + .D(\blk00000003/sig00000a56 ), + .Q(\blk00000003/sig00000adc ), + .Q15(\NLW_blk00000003/blk00000aae_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000aad ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig00000adb ), + .Q(\blk00000003/sig00000149 ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000aac ( + .A0(NlwRenamedSig_OI_rfd), + .A1(NlwRenamedSig_OI_rfd), + .A2(NlwRenamedSig_OI_rfd), + .A3(\blk00000003/sig00000049 ), + .CE(ce), + .CLK(clk), + .D(\blk00000003/sig00000a5a ), + .Q(\blk00000003/sig00000adb ), + .Q15(\NLW_blk00000003/blk00000aac_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000aab ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig00000ada ), + .Q(\blk00000003/sig00000148 ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000aaa ( + .A0(NlwRenamedSig_OI_rfd), + .A1(NlwRenamedSig_OI_rfd), + .A2(NlwRenamedSig_OI_rfd), + .A3(\blk00000003/sig00000049 ), + .CE(ce), + .CLK(clk), + .D(\blk00000003/sig00000a58 ), + .Q(\blk00000003/sig00000ada ), + .Q15(\NLW_blk00000003/blk00000aaa_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000aa9 ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig00000ad9 ), + .Q(\blk00000003/sig00000146 ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000aa8 ( + .A0(NlwRenamedSig_OI_rfd), + .A1(NlwRenamedSig_OI_rfd), + .A2(NlwRenamedSig_OI_rfd), + .A3(\blk00000003/sig00000049 ), + .CE(ce), + .CLK(clk), + .D(\blk00000003/sig00000a52 ), + .Q(\blk00000003/sig00000ad9 ), + .Q15(\NLW_blk00000003/blk00000aa8_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000aa7 ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig00000ad8 ), + .Q(\blk00000003/sig00000145 ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000aa6 ( + .A0(NlwRenamedSig_OI_rfd), + .A1(NlwRenamedSig_OI_rfd), + .A2(NlwRenamedSig_OI_rfd), + .A3(\blk00000003/sig00000049 ), + .CE(ce), + .CLK(clk), + .D(\blk00000003/sig00000a50 ), + .Q(\blk00000003/sig00000ad8 ), + .Q15(\NLW_blk00000003/blk00000aa6_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000aa5 ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig00000ad7 ), + .Q(\blk00000003/sig00000147 ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000aa4 ( + .A0(NlwRenamedSig_OI_rfd), + .A1(NlwRenamedSig_OI_rfd), + .A2(NlwRenamedSig_OI_rfd), + .A3(\blk00000003/sig00000049 ), + .CE(ce), + .CLK(clk), + .D(\blk00000003/sig00000a54 ), + .Q(\blk00000003/sig00000ad7 ), + .Q15(\NLW_blk00000003/blk00000aa4_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000aa3 ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig00000ad6 ), + .Q(\blk00000003/sig00000143 ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000aa2 ( + .A0(NlwRenamedSig_OI_rfd), + .A1(NlwRenamedSig_OI_rfd), + .A2(NlwRenamedSig_OI_rfd), + .A3(\blk00000003/sig00000049 ), + .CE(ce), + .CLK(clk), + .D(\blk00000003/sig00000a48 ), + .Q(\blk00000003/sig00000ad6 ), + .Q15(\NLW_blk00000003/blk00000aa2_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000aa1 ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig00000ad5 ), + .Q(\blk00000003/sig00000142 ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000aa0 ( + .A0(NlwRenamedSig_OI_rfd), + .A1(NlwRenamedSig_OI_rfd), + .A2(NlwRenamedSig_OI_rfd), + .A3(\blk00000003/sig00000049 ), + .CE(ce), + .CLK(clk), + .D(\blk00000003/sig00000a4c ), + .Q(\blk00000003/sig00000ad5 ), + .Q15(\NLW_blk00000003/blk00000aa0_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000a9f ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig00000ad4 ), + .Q(\blk00000003/sig00000144 ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000a9e ( + .A0(NlwRenamedSig_OI_rfd), + .A1(NlwRenamedSig_OI_rfd), + .A2(NlwRenamedSig_OI_rfd), + .A3(\blk00000003/sig00000049 ), + .CE(ce), + .CLK(clk), + .D(\blk00000003/sig00000a4e ), + .Q(\blk00000003/sig00000ad4 ), + .Q15(\NLW_blk00000003/blk00000a9e_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000a9d ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig00000ad3 ), + .Q(\blk00000003/sig00000140 ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000a9c ( + .A0(NlwRenamedSig_OI_rfd), + .A1(NlwRenamedSig_OI_rfd), + .A2(NlwRenamedSig_OI_rfd), + .A3(\blk00000003/sig00000049 ), + .CE(ce), + .CLK(clk), + .D(\blk00000003/sig00000a42 ), + .Q(\blk00000003/sig00000ad3 ), + .Q15(\NLW_blk00000003/blk00000a9c_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000a9b ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig00000ad2 ), + .Q(\blk00000003/sig0000013f ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000a9a ( + .A0(NlwRenamedSig_OI_rfd), + .A1(NlwRenamedSig_OI_rfd), + .A2(NlwRenamedSig_OI_rfd), + .A3(\blk00000003/sig00000049 ), + .CE(ce), + .CLK(clk), + .D(\blk00000003/sig00000a46 ), + .Q(\blk00000003/sig00000ad2 ), + .Q15(\NLW_blk00000003/blk00000a9a_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000a99 ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig00000ad1 ), + .Q(\blk00000003/sig00000141 ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000a98 ( + .A0(NlwRenamedSig_OI_rfd), + .A1(NlwRenamedSig_OI_rfd), + .A2(NlwRenamedSig_OI_rfd), + .A3(\blk00000003/sig00000049 ), + .CE(ce), + .CLK(clk), + .D(\blk00000003/sig00000a4a ), + .Q(\blk00000003/sig00000ad1 ), + .Q15(\NLW_blk00000003/blk00000a98_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000a97 ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig00000ad0 ), + .Q(\blk00000003/sig0000013e ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000a96 ( + .A0(NlwRenamedSig_OI_rfd), + .A1(NlwRenamedSig_OI_rfd), + .A2(NlwRenamedSig_OI_rfd), + .A3(\blk00000003/sig00000049 ), + .CE(ce), + .CLK(clk), + .D(\blk00000003/sig00000a44 ), + .Q(\blk00000003/sig00000ad0 ), + .Q15(\NLW_blk00000003/blk00000a96_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000a95 ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig00000acf ), + .Q(\blk00000003/sig0000013d ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000a94 ( + .A0(NlwRenamedSig_OI_rfd), + .A1(NlwRenamedSig_OI_rfd), + .A2(NlwRenamedSig_OI_rfd), + .A3(\blk00000003/sig00000049 ), + .CE(ce), + .CLK(clk), + .D(\blk00000003/sig00000a3c ), + .Q(\blk00000003/sig00000acf ), + .Q15(\NLW_blk00000003/blk00000a94_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000a93 ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig00000ace ), + .Q(\blk00000003/sig0000013c ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000a92 ( + .A0(NlwRenamedSig_OI_rfd), + .A1(NlwRenamedSig_OI_rfd), + .A2(NlwRenamedSig_OI_rfd), + .A3(\blk00000003/sig00000049 ), + .CE(ce), + .CLK(clk), + .D(\blk00000003/sig00000a40 ), + .Q(\blk00000003/sig00000ace ), + .Q15(\NLW_blk00000003/blk00000a92_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000a91 ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig00000acd ), + .Q(\blk00000003/sig0000013b ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000a90 ( + .A0(NlwRenamedSig_OI_rfd), + .A1(NlwRenamedSig_OI_rfd), + .A2(NlwRenamedSig_OI_rfd), + .A3(\blk00000003/sig00000049 ), + .CE(ce), + .CLK(clk), + .D(\blk00000003/sig00000a3e ), + .Q(\blk00000003/sig00000acd ), + .Q15(\NLW_blk00000003/blk00000a90_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000a8f ( + .C(clk), + .CE(\blk00000003/sig000009b4 ), + .D(\blk00000003/sig00000acc ), + .Q(\blk00000003/sig000007d9 ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000a8e ( + .A0(\blk00000003/sig00000049 ), + .A1(\blk00000003/sig00000049 ), + .A2(\blk00000003/sig00000049 ), + .A3(\blk00000003/sig00000049 ), + .CE(\blk00000003/sig000009b4 ), + .CLK(clk), + .D(\blk00000003/sig000007a9 ), + .Q(\blk00000003/sig00000acc ), + .Q15(\NLW_blk00000003/blk00000a8e_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000a8d ( + .C(clk), + .CE(\blk00000003/sig000009b4 ), + .D(\blk00000003/sig00000acb ), + .Q(\blk00000003/sig000007d8 ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000a8c ( + .A0(\blk00000003/sig00000049 ), + .A1(\blk00000003/sig00000049 ), + .A2(\blk00000003/sig00000049 ), + .A3(\blk00000003/sig00000049 ), + .CE(\blk00000003/sig000009b4 ), + .CLK(clk), + .D(\blk00000003/sig000007a8 ), + .Q(\blk00000003/sig00000acb ), + .Q15(\NLW_blk00000003/blk00000a8c_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000a8b ( + .C(clk), + .CE(\blk00000003/sig000009b4 ), + .D(\blk00000003/sig00000aca ), + .Q(\blk00000003/sig000007d6 ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000a8a ( + .A0(\blk00000003/sig00000049 ), + .A1(\blk00000003/sig00000049 ), + .A2(\blk00000003/sig00000049 ), + .A3(\blk00000003/sig00000049 ), + .CE(\blk00000003/sig000009b4 ), + .CLK(clk), + .D(\blk00000003/sig000007a6 ), + .Q(\blk00000003/sig00000aca ), + .Q15(\NLW_blk00000003/blk00000a8a_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000a89 ( + .C(clk), + .CE(\blk00000003/sig000009b4 ), + .D(\blk00000003/sig00000ac9 ), + .Q(\blk00000003/sig000007d5 ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000a88 ( + .A0(\blk00000003/sig00000049 ), + .A1(\blk00000003/sig00000049 ), + .A2(\blk00000003/sig00000049 ), + .A3(\blk00000003/sig00000049 ), + .CE(\blk00000003/sig000009b4 ), + .CLK(clk), + .D(\blk00000003/sig000007a5 ), + .Q(\blk00000003/sig00000ac9 ), + .Q15(\NLW_blk00000003/blk00000a88_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000a87 ( + .C(clk), + .CE(\blk00000003/sig000009b4 ), + .D(\blk00000003/sig00000ac8 ), + .Q(\blk00000003/sig000007d7 ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000a86 ( + .A0(\blk00000003/sig00000049 ), + .A1(\blk00000003/sig00000049 ), + .A2(\blk00000003/sig00000049 ), + .A3(\blk00000003/sig00000049 ), + .CE(\blk00000003/sig000009b4 ), + .CLK(clk), + .D(\blk00000003/sig000007a7 ), + .Q(\blk00000003/sig00000ac8 ), + .Q15(\NLW_blk00000003/blk00000a86_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000a85 ( + .C(clk), + .CE(\blk00000003/sig000009b4 ), + .D(\blk00000003/sig00000ac7 ), + .Q(\blk00000003/sig000007d4 ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000a84 ( + .A0(\blk00000003/sig00000049 ), + .A1(\blk00000003/sig00000049 ), + .A2(\blk00000003/sig00000049 ), + .A3(\blk00000003/sig00000049 ), + .CE(\blk00000003/sig000009b4 ), + .CLK(clk), + .D(\blk00000003/sig000007a4 ), + .Q(\blk00000003/sig00000ac7 ), + .Q15(\NLW_blk00000003/blk00000a84_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000a83 ( + .C(clk), + .CE(\blk00000003/sig000009b4 ), + .D(\blk00000003/sig00000ac6 ), + .Q(\blk00000003/sig000007d3 ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000a82 ( + .A0(\blk00000003/sig00000049 ), + .A1(\blk00000003/sig00000049 ), + .A2(\blk00000003/sig00000049 ), + .A3(\blk00000003/sig00000049 ), + .CE(\blk00000003/sig000009b4 ), + .CLK(clk), + .D(\blk00000003/sig000007a3 ), + .Q(\blk00000003/sig00000ac6 ), + .Q15(\NLW_blk00000003/blk00000a82_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000a81 ( + .C(clk), + .CE(\blk00000003/sig000009b4 ), + .D(\blk00000003/sig00000ac5 ), + .Q(\blk00000003/sig000007d2 ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000a80 ( + .A0(\blk00000003/sig00000049 ), + .A1(\blk00000003/sig00000049 ), + .A2(\blk00000003/sig00000049 ), + .A3(\blk00000003/sig00000049 ), + .CE(\blk00000003/sig000009b4 ), + .CLK(clk), + .D(\blk00000003/sig000007a2 ), + .Q(\blk00000003/sig00000ac5 ), + .Q15(\NLW_blk00000003/blk00000a80_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000a7f ( + .C(clk), + .CE(\blk00000003/sig000009b4 ), + .D(\blk00000003/sig00000ac4 ), + .Q(\blk00000003/sig000007d1 ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000a7e ( + .A0(\blk00000003/sig00000049 ), + .A1(\blk00000003/sig00000049 ), + .A2(\blk00000003/sig00000049 ), + .A3(\blk00000003/sig00000049 ), + .CE(\blk00000003/sig000009b4 ), + .CLK(clk), + .D(\blk00000003/sig000007a1 ), + .Q(\blk00000003/sig00000ac4 ), + .Q15(\NLW_blk00000003/blk00000a7e_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000a7d ( + .C(clk), + .CE(\blk00000003/sig000009b4 ), + .D(\blk00000003/sig00000ac3 ), + .Q(\blk00000003/sig000007cf ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000a7c ( + .A0(\blk00000003/sig00000049 ), + .A1(\blk00000003/sig00000049 ), + .A2(\blk00000003/sig00000049 ), + .A3(\blk00000003/sig00000049 ), + .CE(\blk00000003/sig000009b4 ), + .CLK(clk), + .D(\blk00000003/sig0000079f ), + .Q(\blk00000003/sig00000ac3 ), + .Q15(\NLW_blk00000003/blk00000a7c_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000a7b ( + .C(clk), + .CE(\blk00000003/sig000009b4 ), + .D(\blk00000003/sig00000ac2 ), + .Q(\blk00000003/sig000007ce ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000a7a ( + .A0(\blk00000003/sig00000049 ), + .A1(\blk00000003/sig00000049 ), + .A2(\blk00000003/sig00000049 ), + .A3(\blk00000003/sig00000049 ), + .CE(\blk00000003/sig000009b4 ), + .CLK(clk), + .D(\blk00000003/sig0000079e ), + .Q(\blk00000003/sig00000ac2 ), + .Q15(\NLW_blk00000003/blk00000a7a_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000a79 ( + .C(clk), + .CE(\blk00000003/sig000009b4 ), + .D(\blk00000003/sig00000ac1 ), + .Q(\blk00000003/sig000007d0 ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000a78 ( + .A0(\blk00000003/sig00000049 ), + .A1(\blk00000003/sig00000049 ), + .A2(\blk00000003/sig00000049 ), + .A3(\blk00000003/sig00000049 ), + .CE(\blk00000003/sig000009b4 ), + .CLK(clk), + .D(\blk00000003/sig000007a0 ), + .Q(\blk00000003/sig00000ac1 ), + .Q15(\NLW_blk00000003/blk00000a78_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000a77 ( + .C(clk), + .CE(\blk00000003/sig000009b4 ), + .D(\blk00000003/sig00000ac0 ), + .Q(\blk00000003/sig000007cc ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000a76 ( + .A0(\blk00000003/sig00000049 ), + .A1(\blk00000003/sig00000049 ), + .A2(\blk00000003/sig00000049 ), + .A3(\blk00000003/sig00000049 ), + .CE(\blk00000003/sig000009b4 ), + .CLK(clk), + .D(\blk00000003/sig0000079c ), + .Q(\blk00000003/sig00000ac0 ), + .Q15(\NLW_blk00000003/blk00000a76_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000a75 ( + .C(clk), + .CE(\blk00000003/sig000009b4 ), + .D(\blk00000003/sig00000abf ), + .Q(\blk00000003/sig000007cb ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000a74 ( + .A0(\blk00000003/sig00000049 ), + .A1(\blk00000003/sig00000049 ), + .A2(\blk00000003/sig00000049 ), + .A3(\blk00000003/sig00000049 ), + .CE(\blk00000003/sig000009b4 ), + .CLK(clk), + .D(\blk00000003/sig0000079b ), + .Q(\blk00000003/sig00000abf ), + .Q15(\NLW_blk00000003/blk00000a74_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000a73 ( + .C(clk), + .CE(\blk00000003/sig000009b4 ), + .D(\blk00000003/sig00000abe ), + .Q(\blk00000003/sig000007cd ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000a72 ( + .A0(\blk00000003/sig00000049 ), + .A1(\blk00000003/sig00000049 ), + .A2(\blk00000003/sig00000049 ), + .A3(\blk00000003/sig00000049 ), + .CE(\blk00000003/sig000009b4 ), + .CLK(clk), + .D(\blk00000003/sig0000079d ), + .Q(\blk00000003/sig00000abe ), + .Q15(\NLW_blk00000003/blk00000a72_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000a71 ( + .C(clk), + .CE(\blk00000003/sig000009b4 ), + .D(\blk00000003/sig00000abd ), + .Q(\blk00000003/sig000007c9 ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000a70 ( + .A0(\blk00000003/sig00000049 ), + .A1(\blk00000003/sig00000049 ), + .A2(\blk00000003/sig00000049 ), + .A3(\blk00000003/sig00000049 ), + .CE(\blk00000003/sig000009b4 ), + .CLK(clk), + .D(\blk00000003/sig00000799 ), + .Q(\blk00000003/sig00000abd ), + .Q15(\NLW_blk00000003/blk00000a70_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000a6f ( + .C(clk), + .CE(\blk00000003/sig000009b4 ), + .D(\blk00000003/sig00000abc ), + .Q(\blk00000003/sig000007c8 ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000a6e ( + .A0(\blk00000003/sig00000049 ), + .A1(\blk00000003/sig00000049 ), + .A2(\blk00000003/sig00000049 ), + .A3(\blk00000003/sig00000049 ), + .CE(\blk00000003/sig000009b4 ), + .CLK(clk), + .D(\blk00000003/sig00000798 ), + .Q(\blk00000003/sig00000abc ), + .Q15(\NLW_blk00000003/blk00000a6e_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000a6d ( + .C(clk), + .CE(\blk00000003/sig000009b4 ), + .D(\blk00000003/sig00000abb ), + .Q(\blk00000003/sig000007ca ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000a6c ( + .A0(\blk00000003/sig00000049 ), + .A1(\blk00000003/sig00000049 ), + .A2(\blk00000003/sig00000049 ), + .A3(\blk00000003/sig00000049 ), + .CE(\blk00000003/sig000009b4 ), + .CLK(clk), + .D(\blk00000003/sig0000079a ), + .Q(\blk00000003/sig00000abb ), + .Q15(\NLW_blk00000003/blk00000a6c_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000a6b ( + .C(clk), + .CE(\blk00000003/sig000009b4 ), + .D(\blk00000003/sig00000aba ), + .Q(\blk00000003/sig000007c7 ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000a6a ( + .A0(\blk00000003/sig00000049 ), + .A1(\blk00000003/sig00000049 ), + .A2(\blk00000003/sig00000049 ), + .A3(\blk00000003/sig00000049 ), + .CE(\blk00000003/sig000009b4 ), + .CLK(clk), + .D(\blk00000003/sig00000797 ), + .Q(\blk00000003/sig00000aba ), + .Q15(\NLW_blk00000003/blk00000a6a_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000a69 ( + .C(clk), + .CE(\blk00000003/sig000009b4 ), + .D(\blk00000003/sig00000ab9 ), + .Q(\blk00000003/sig000007c6 ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000a68 ( + .A0(\blk00000003/sig00000049 ), + .A1(\blk00000003/sig00000049 ), + .A2(\blk00000003/sig00000049 ), + .A3(\blk00000003/sig00000049 ), + .CE(\blk00000003/sig000009b4 ), + .CLK(clk), + .D(\blk00000003/sig00000796 ), + .Q(\blk00000003/sig00000ab9 ), + .Q15(\NLW_blk00000003/blk00000a68_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000a67 ( + .C(clk), + .CE(\blk00000003/sig000009b4 ), + .D(\blk00000003/sig00000ab8 ), + .Q(\blk00000003/sig000007c5 ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000a66 ( + .A0(\blk00000003/sig00000049 ), + .A1(\blk00000003/sig00000049 ), + .A2(\blk00000003/sig00000049 ), + .A3(\blk00000003/sig00000049 ), + .CE(\blk00000003/sig000009b4 ), + .CLK(clk), + .D(\blk00000003/sig00000795 ), + .Q(\blk00000003/sig00000ab8 ), + .Q15(\NLW_blk00000003/blk00000a66_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000a65 ( + .C(clk), + .CE(\blk00000003/sig000009b4 ), + .D(\blk00000003/sig00000ab7 ), + .Q(\blk00000003/sig000007c4 ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000a64 ( + .A0(\blk00000003/sig00000049 ), + .A1(\blk00000003/sig00000049 ), + .A2(\blk00000003/sig00000049 ), + .A3(\blk00000003/sig00000049 ), + .CE(\blk00000003/sig000009b4 ), + .CLK(clk), + .D(\blk00000003/sig00000794 ), + .Q(\blk00000003/sig00000ab7 ), + .Q15(\NLW_blk00000003/blk00000a64_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000a63 ( + .C(clk), + .CE(\blk00000003/sig000009b4 ), + .D(\blk00000003/sig00000ab6 ), + .Q(\blk00000003/sig000007c2 ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000a62 ( + .A0(\blk00000003/sig00000049 ), + .A1(\blk00000003/sig00000049 ), + .A2(\blk00000003/sig00000049 ), + .A3(\blk00000003/sig00000049 ), + .CE(\blk00000003/sig000009b4 ), + .CLK(clk), + .D(\blk00000003/sig00000792 ), + .Q(\blk00000003/sig00000ab6 ), + .Q15(\NLW_blk00000003/blk00000a62_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000a61 ( + .C(clk), + .CE(\blk00000003/sig000009b4 ), + .D(\blk00000003/sig00000ab5 ), + .Q(\blk00000003/sig000007c3 ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000a60 ( + .A0(\blk00000003/sig00000049 ), + .A1(\blk00000003/sig00000049 ), + .A2(\blk00000003/sig00000049 ), + .A3(\blk00000003/sig00000049 ), + .CE(\blk00000003/sig000009b4 ), + .CLK(clk), + .D(\blk00000003/sig00000793 ), + .Q(\blk00000003/sig00000ab5 ), + .Q15(\NLW_blk00000003/blk00000a60_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000a5f ( + .C(clk), + .CE(\blk00000003/sig000009b4 ), + .D(\blk00000003/sig00000ab4 ), + .Q(\blk00000003/sig000007f1 ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000a5e ( + .A0(\blk00000003/sig00000049 ), + .A1(\blk00000003/sig00000049 ), + .A2(\blk00000003/sig00000049 ), + .A3(\blk00000003/sig00000049 ), + .CE(\blk00000003/sig000009b4 ), + .CLK(clk), + .D(\blk00000003/sig000007c1 ), + .Q(\blk00000003/sig00000ab4 ), + .Q15(\NLW_blk00000003/blk00000a5e_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000a5d ( + .C(clk), + .CE(\blk00000003/sig000009b4 ), + .D(\blk00000003/sig00000ab3 ), + .Q(\blk00000003/sig000007f0 ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000a5c ( + .A0(\blk00000003/sig00000049 ), + .A1(\blk00000003/sig00000049 ), + .A2(\blk00000003/sig00000049 ), + .A3(\blk00000003/sig00000049 ), + .CE(\blk00000003/sig000009b4 ), + .CLK(clk), + .D(\blk00000003/sig000007c0 ), + .Q(\blk00000003/sig00000ab3 ), + .Q15(\NLW_blk00000003/blk00000a5c_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000a5b ( + .C(clk), + .CE(\blk00000003/sig000009b4 ), + .D(\blk00000003/sig00000ab2 ), + .Q(\blk00000003/sig000007ef ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000a5a ( + .A0(\blk00000003/sig00000049 ), + .A1(\blk00000003/sig00000049 ), + .A2(\blk00000003/sig00000049 ), + .A3(\blk00000003/sig00000049 ), + .CE(\blk00000003/sig000009b4 ), + .CLK(clk), + .D(\blk00000003/sig000007bf ), + .Q(\blk00000003/sig00000ab2 ), + .Q15(\NLW_blk00000003/blk00000a5a_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000a59 ( + .C(clk), + .CE(\blk00000003/sig000009b4 ), + .D(\blk00000003/sig00000ab1 ), + .Q(\blk00000003/sig000007ee ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000a58 ( + .A0(\blk00000003/sig00000049 ), + .A1(\blk00000003/sig00000049 ), + .A2(\blk00000003/sig00000049 ), + .A3(\blk00000003/sig00000049 ), + .CE(\blk00000003/sig000009b4 ), + .CLK(clk), + .D(\blk00000003/sig000007be ), + .Q(\blk00000003/sig00000ab1 ), + .Q15(\NLW_blk00000003/blk00000a58_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000a57 ( + .C(clk), + .CE(\blk00000003/sig000009b4 ), + .D(\blk00000003/sig00000ab0 ), + .Q(\blk00000003/sig000007ed ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000a56 ( + .A0(\blk00000003/sig00000049 ), + .A1(\blk00000003/sig00000049 ), + .A2(\blk00000003/sig00000049 ), + .A3(\blk00000003/sig00000049 ), + .CE(\blk00000003/sig000009b4 ), + .CLK(clk), + .D(\blk00000003/sig000007bd ), + .Q(\blk00000003/sig00000ab0 ), + .Q15(\NLW_blk00000003/blk00000a56_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000a55 ( + .C(clk), + .CE(\blk00000003/sig000009b4 ), + .D(\blk00000003/sig00000aaf ), + .Q(\blk00000003/sig000007eb ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000a54 ( + .A0(\blk00000003/sig00000049 ), + .A1(\blk00000003/sig00000049 ), + .A2(\blk00000003/sig00000049 ), + .A3(\blk00000003/sig00000049 ), + .CE(\blk00000003/sig000009b4 ), + .CLK(clk), + .D(\blk00000003/sig000007bb ), + .Q(\blk00000003/sig00000aaf ), + .Q15(\NLW_blk00000003/blk00000a54_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000a53 ( + .C(clk), + .CE(\blk00000003/sig000009b4 ), + .D(\blk00000003/sig00000aae ), + .Q(\blk00000003/sig000007ea ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000a52 ( + .A0(\blk00000003/sig00000049 ), + .A1(\blk00000003/sig00000049 ), + .A2(\blk00000003/sig00000049 ), + .A3(\blk00000003/sig00000049 ), + .CE(\blk00000003/sig000009b4 ), + .CLK(clk), + .D(\blk00000003/sig000007ba ), + .Q(\blk00000003/sig00000aae ), + .Q15(\NLW_blk00000003/blk00000a52_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000a51 ( + .C(clk), + .CE(\blk00000003/sig000009b4 ), + .D(\blk00000003/sig00000aad ), + .Q(\blk00000003/sig000007ec ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000a50 ( + .A0(\blk00000003/sig00000049 ), + .A1(\blk00000003/sig00000049 ), + .A2(\blk00000003/sig00000049 ), + .A3(\blk00000003/sig00000049 ), + .CE(\blk00000003/sig000009b4 ), + .CLK(clk), + .D(\blk00000003/sig000007bc ), + .Q(\blk00000003/sig00000aad ), + .Q15(\NLW_blk00000003/blk00000a50_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000a4f ( + .C(clk), + .CE(\blk00000003/sig000009b4 ), + .D(\blk00000003/sig00000aac ), + .Q(\blk00000003/sig000007e8 ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000a4e ( + .A0(\blk00000003/sig00000049 ), + .A1(\blk00000003/sig00000049 ), + .A2(\blk00000003/sig00000049 ), + .A3(\blk00000003/sig00000049 ), + .CE(\blk00000003/sig000009b4 ), + .CLK(clk), + .D(\blk00000003/sig000007b8 ), + .Q(\blk00000003/sig00000aac ), + .Q15(\NLW_blk00000003/blk00000a4e_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000a4d ( + .C(clk), + .CE(\blk00000003/sig000009b4 ), + .D(\blk00000003/sig00000aab ), + .Q(\blk00000003/sig000007e7 ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000a4c ( + .A0(\blk00000003/sig00000049 ), + .A1(\blk00000003/sig00000049 ), + .A2(\blk00000003/sig00000049 ), + .A3(\blk00000003/sig00000049 ), + .CE(\blk00000003/sig000009b4 ), + .CLK(clk), + .D(\blk00000003/sig000007b7 ), + .Q(\blk00000003/sig00000aab ), + .Q15(\NLW_blk00000003/blk00000a4c_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000a4b ( + .C(clk), + .CE(\blk00000003/sig000009b4 ), + .D(\blk00000003/sig00000aaa ), + .Q(\blk00000003/sig000007e9 ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000a4a ( + .A0(\blk00000003/sig00000049 ), + .A1(\blk00000003/sig00000049 ), + .A2(\blk00000003/sig00000049 ), + .A3(\blk00000003/sig00000049 ), + .CE(\blk00000003/sig000009b4 ), + .CLK(clk), + .D(\blk00000003/sig000007b9 ), + .Q(\blk00000003/sig00000aaa ), + .Q15(\NLW_blk00000003/blk00000a4a_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000a49 ( + .C(clk), + .CE(\blk00000003/sig000009b4 ), + .D(\blk00000003/sig00000aa9 ), + .Q(\blk00000003/sig000007e5 ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000a48 ( + .A0(\blk00000003/sig00000049 ), + .A1(\blk00000003/sig00000049 ), + .A2(\blk00000003/sig00000049 ), + .A3(\blk00000003/sig00000049 ), + .CE(\blk00000003/sig000009b4 ), + .CLK(clk), + .D(\blk00000003/sig000007b5 ), + .Q(\blk00000003/sig00000aa9 ), + .Q15(\NLW_blk00000003/blk00000a48_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000a47 ( + .C(clk), + .CE(\blk00000003/sig000009b4 ), + .D(\blk00000003/sig00000aa8 ), + .Q(\blk00000003/sig000007e4 ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000a46 ( + .A0(\blk00000003/sig00000049 ), + .A1(\blk00000003/sig00000049 ), + .A2(\blk00000003/sig00000049 ), + .A3(\blk00000003/sig00000049 ), + .CE(\blk00000003/sig000009b4 ), + .CLK(clk), + .D(\blk00000003/sig000007b4 ), + .Q(\blk00000003/sig00000aa8 ), + .Q15(\NLW_blk00000003/blk00000a46_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000a45 ( + .C(clk), + .CE(\blk00000003/sig000009b4 ), + .D(\blk00000003/sig00000aa7 ), + .Q(\blk00000003/sig000007e6 ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000a44 ( + .A0(\blk00000003/sig00000049 ), + .A1(\blk00000003/sig00000049 ), + .A2(\blk00000003/sig00000049 ), + .A3(\blk00000003/sig00000049 ), + .CE(\blk00000003/sig000009b4 ), + .CLK(clk), + .D(\blk00000003/sig000007b6 ), + .Q(\blk00000003/sig00000aa7 ), + .Q15(\NLW_blk00000003/blk00000a44_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000a43 ( + .C(clk), + .CE(\blk00000003/sig000009b4 ), + .D(\blk00000003/sig00000aa6 ), + .Q(\blk00000003/sig000007e3 ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000a42 ( + .A0(\blk00000003/sig00000049 ), + .A1(\blk00000003/sig00000049 ), + .A2(\blk00000003/sig00000049 ), + .A3(\blk00000003/sig00000049 ), + .CE(\blk00000003/sig000009b4 ), + .CLK(clk), + .D(\blk00000003/sig000007b3 ), + .Q(\blk00000003/sig00000aa6 ), + .Q15(\NLW_blk00000003/blk00000a42_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000a41 ( + .C(clk), + .CE(\blk00000003/sig000009b4 ), + .D(\blk00000003/sig00000aa5 ), + .Q(\blk00000003/sig000007e2 ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000a40 ( + .A0(\blk00000003/sig00000049 ), + .A1(\blk00000003/sig00000049 ), + .A2(\blk00000003/sig00000049 ), + .A3(\blk00000003/sig00000049 ), + .CE(\blk00000003/sig000009b4 ), + .CLK(clk), + .D(\blk00000003/sig000007b2 ), + .Q(\blk00000003/sig00000aa5 ), + .Q15(\NLW_blk00000003/blk00000a40_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000a3f ( + .C(clk), + .CE(\blk00000003/sig000009b4 ), + .D(\blk00000003/sig00000aa4 ), + .Q(\blk00000003/sig000007e1 ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000a3e ( + .A0(\blk00000003/sig00000049 ), + .A1(\blk00000003/sig00000049 ), + .A2(\blk00000003/sig00000049 ), + .A3(\blk00000003/sig00000049 ), + .CE(\blk00000003/sig000009b4 ), + .CLK(clk), + .D(\blk00000003/sig000007b1 ), + .Q(\blk00000003/sig00000aa4 ), + .Q15(\NLW_blk00000003/blk00000a3e_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000a3d ( + .C(clk), + .CE(\blk00000003/sig000009b4 ), + .D(\blk00000003/sig00000aa3 ), + .Q(\blk00000003/sig000007e0 ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000a3c ( + .A0(\blk00000003/sig00000049 ), + .A1(\blk00000003/sig00000049 ), + .A2(\blk00000003/sig00000049 ), + .A3(\blk00000003/sig00000049 ), + .CE(\blk00000003/sig000009b4 ), + .CLK(clk), + .D(\blk00000003/sig000007b0 ), + .Q(\blk00000003/sig00000aa3 ), + .Q15(\NLW_blk00000003/blk00000a3c_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000a3b ( + .C(clk), + .CE(\blk00000003/sig000009b4 ), + .D(\blk00000003/sig00000aa2 ), + .Q(\blk00000003/sig000007de ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000a3a ( + .A0(\blk00000003/sig00000049 ), + .A1(\blk00000003/sig00000049 ), + .A2(\blk00000003/sig00000049 ), + .A3(\blk00000003/sig00000049 ), + .CE(\blk00000003/sig000009b4 ), + .CLK(clk), + .D(\blk00000003/sig000007ae ), + .Q(\blk00000003/sig00000aa2 ), + .Q15(\NLW_blk00000003/blk00000a3a_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000a39 ( + .C(clk), + .CE(\blk00000003/sig000009b4 ), + .D(\blk00000003/sig00000aa1 ), + .Q(\blk00000003/sig000007dd ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000a38 ( + .A0(\blk00000003/sig00000049 ), + .A1(\blk00000003/sig00000049 ), + .A2(\blk00000003/sig00000049 ), + .A3(\blk00000003/sig00000049 ), + .CE(\blk00000003/sig000009b4 ), + .CLK(clk), + .D(\blk00000003/sig000007ad ), + .Q(\blk00000003/sig00000aa1 ), + .Q15(\NLW_blk00000003/blk00000a38_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000a37 ( + .C(clk), + .CE(\blk00000003/sig000009b4 ), + .D(\blk00000003/sig00000aa0 ), + .Q(\blk00000003/sig000007df ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000a36 ( + .A0(\blk00000003/sig00000049 ), + .A1(\blk00000003/sig00000049 ), + .A2(\blk00000003/sig00000049 ), + .A3(\blk00000003/sig00000049 ), + .CE(\blk00000003/sig000009b4 ), + .CLK(clk), + .D(\blk00000003/sig000007af ), + .Q(\blk00000003/sig00000aa0 ), + .Q15(\NLW_blk00000003/blk00000a36_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000a35 ( + .C(clk), + .CE(\blk00000003/sig000009b4 ), + .D(\blk00000003/sig00000a9f ), + .Q(\blk00000003/sig000007db ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000a34 ( + .A0(\blk00000003/sig00000049 ), + .A1(\blk00000003/sig00000049 ), + .A2(\blk00000003/sig00000049 ), + .A3(\blk00000003/sig00000049 ), + .CE(\blk00000003/sig000009b4 ), + .CLK(clk), + .D(\blk00000003/sig000007ab ), + .Q(\blk00000003/sig00000a9f ), + .Q15(\NLW_blk00000003/blk00000a34_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000a33 ( + .C(clk), + .CE(\blk00000003/sig000009b4 ), + .D(\blk00000003/sig00000a9e ), + .Q(\blk00000003/sig000007da ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000a32 ( + .A0(\blk00000003/sig00000049 ), + .A1(\blk00000003/sig00000049 ), + .A2(\blk00000003/sig00000049 ), + .A3(\blk00000003/sig00000049 ), + .CE(\blk00000003/sig000009b4 ), + .CLK(clk), + .D(\blk00000003/sig000007aa ), + .Q(\blk00000003/sig00000a9e ), + .Q15(\NLW_blk00000003/blk00000a32_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000a31 ( + .C(clk), + .CE(\blk00000003/sig000009b4 ), + .D(\blk00000003/sig00000a9d ), + .Q(\blk00000003/sig000007dc ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000a30 ( + .A0(\blk00000003/sig00000049 ), + .A1(\blk00000003/sig00000049 ), + .A2(\blk00000003/sig00000049 ), + .A3(\blk00000003/sig00000049 ), + .CE(\blk00000003/sig000009b4 ), + .CLK(clk), + .D(\blk00000003/sig000007ac ), + .Q(\blk00000003/sig00000a9d ), + .Q15(\NLW_blk00000003/blk00000a30_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000a2f ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig00000a9c ), + .Q(\blk00000003/sig00000761 ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000a2e ( + .A0(\blk00000003/sig00000049 ), + .A1(\blk00000003/sig00000049 ), + .A2(\blk00000003/sig00000049 ), + .A3(\blk00000003/sig00000049 ), + .CE(ce), + .CLK(clk), + .D(\blk00000003/sig000001de ), + .Q(\blk00000003/sig00000a9c ), + .Q15(\NLW_blk00000003/blk00000a2e_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000a2d ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig00000a9b ), + .Q(\blk00000003/sig000009ad ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000a2c ( + .A0(\blk00000003/sig00000049 ), + .A1(\blk00000003/sig00000049 ), + .A2(NlwRenamedSig_OI_rfd), + .A3(NlwRenamedSig_OI_rfd), + .CE(ce), + .CLK(clk), + .D(\blk00000003/sig000001ca ), + .Q(\blk00000003/sig00000a9b ), + .Q15(\NLW_blk00000003/blk00000a2c_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000a2b ( + .C(clk), + .CE(\blk00000003/sig000009b8 ), + .D(\blk00000003/sig00000a99 ), + .Q(\blk00000003/sig00000a9a ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000a2a ( + .A0(\blk00000003/sig00000049 ), + .A1(NlwRenamedSig_OI_rfd), + .A2(\blk00000003/sig00000049 ), + .A3(NlwRenamedSig_OI_rfd), + .CE(\blk00000003/sig000009b8 ), + .CLK(clk), + .D(\blk00000003/sig00000218 ), + .Q(\blk00000003/sig00000a99 ), + .Q15(\NLW_blk00000003/blk00000a2a_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000a29 ( + .C(clk), + .CE(\blk00000003/sig000009b8 ), + .D(\blk00000003/sig00000a97 ), + .Q(\blk00000003/sig00000a98 ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000a28 ( + .A0(\blk00000003/sig00000049 ), + .A1(NlwRenamedSig_OI_rfd), + .A2(\blk00000003/sig00000049 ), + .A3(NlwRenamedSig_OI_rfd), + .CE(\blk00000003/sig000009b8 ), + .CLK(clk), + .D(\blk00000003/sig00000217 ), + .Q(\blk00000003/sig00000a97 ), + .Q15(\NLW_blk00000003/blk00000a28_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000a27 ( + .C(clk), + .CE(\blk00000003/sig000009b8 ), + .D(\blk00000003/sig00000a95 ), + .Q(\blk00000003/sig00000a96 ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000a26 ( + .A0(\blk00000003/sig00000049 ), + .A1(NlwRenamedSig_OI_rfd), + .A2(\blk00000003/sig00000049 ), + .A3(NlwRenamedSig_OI_rfd), + .CE(\blk00000003/sig000009b8 ), + .CLK(clk), + .D(\blk00000003/sig00000219 ), + .Q(\blk00000003/sig00000a95 ), + .Q15(\NLW_blk00000003/blk00000a26_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000a25 ( + .C(clk), + .CE(\blk00000003/sig000009b8 ), + .D(\blk00000003/sig00000a93 ), + .Q(\blk00000003/sig00000a94 ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000a24 ( + .A0(\blk00000003/sig00000049 ), + .A1(NlwRenamedSig_OI_rfd), + .A2(\blk00000003/sig00000049 ), + .A3(NlwRenamedSig_OI_rfd), + .CE(\blk00000003/sig000009b8 ), + .CLK(clk), + .D(\blk00000003/sig00000215 ), + .Q(\blk00000003/sig00000a93 ), + .Q15(\NLW_blk00000003/blk00000a24_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000a23 ( + .C(clk), + .CE(\blk00000003/sig000009b8 ), + .D(\blk00000003/sig00000a91 ), + .Q(\blk00000003/sig00000a92 ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000a22 ( + .A0(\blk00000003/sig00000049 ), + .A1(NlwRenamedSig_OI_rfd), + .A2(\blk00000003/sig00000049 ), + .A3(NlwRenamedSig_OI_rfd), + .CE(\blk00000003/sig000009b8 ), + .CLK(clk), + .D(\blk00000003/sig00000214 ), + .Q(\blk00000003/sig00000a91 ), + .Q15(\NLW_blk00000003/blk00000a22_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000a21 ( + .C(clk), + .CE(\blk00000003/sig000009b8 ), + .D(\blk00000003/sig00000a8f ), + .Q(\blk00000003/sig00000a90 ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000a20 ( + .A0(\blk00000003/sig00000049 ), + .A1(NlwRenamedSig_OI_rfd), + .A2(\blk00000003/sig00000049 ), + .A3(NlwRenamedSig_OI_rfd), + .CE(\blk00000003/sig000009b8 ), + .CLK(clk), + .D(\blk00000003/sig00000216 ), + .Q(\blk00000003/sig00000a8f ), + .Q15(\NLW_blk00000003/blk00000a20_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000a1f ( + .C(clk), + .CE(\blk00000003/sig000009b8 ), + .D(\blk00000003/sig00000a8d ), + .Q(\blk00000003/sig00000a8e ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000a1e ( + .A0(\blk00000003/sig00000049 ), + .A1(NlwRenamedSig_OI_rfd), + .A2(\blk00000003/sig00000049 ), + .A3(NlwRenamedSig_OI_rfd), + .CE(\blk00000003/sig000009b8 ), + .CLK(clk), + .D(\blk00000003/sig00000212 ), + .Q(\blk00000003/sig00000a8d ), + .Q15(\NLW_blk00000003/blk00000a1e_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000a1d ( + .C(clk), + .CE(\blk00000003/sig000009b8 ), + .D(\blk00000003/sig00000a8b ), + .Q(\blk00000003/sig00000a8c ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000a1c ( + .A0(\blk00000003/sig00000049 ), + .A1(NlwRenamedSig_OI_rfd), + .A2(\blk00000003/sig00000049 ), + .A3(NlwRenamedSig_OI_rfd), + .CE(\blk00000003/sig000009b8 ), + .CLK(clk), + .D(\blk00000003/sig00000211 ), + .Q(\blk00000003/sig00000a8b ), + .Q15(\NLW_blk00000003/blk00000a1c_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000a1b ( + .C(clk), + .CE(\blk00000003/sig000009b8 ), + .D(\blk00000003/sig00000a89 ), + .Q(\blk00000003/sig00000a8a ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000a1a ( + .A0(\blk00000003/sig00000049 ), + .A1(NlwRenamedSig_OI_rfd), + .A2(\blk00000003/sig00000049 ), + .A3(NlwRenamedSig_OI_rfd), + .CE(\blk00000003/sig000009b8 ), + .CLK(clk), + .D(\blk00000003/sig00000213 ), + .Q(\blk00000003/sig00000a89 ), + .Q15(\NLW_blk00000003/blk00000a1a_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000a19 ( + .C(clk), + .CE(\blk00000003/sig000009b8 ), + .D(\blk00000003/sig00000a87 ), + .Q(\blk00000003/sig00000a88 ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000a18 ( + .A0(\blk00000003/sig00000049 ), + .A1(NlwRenamedSig_OI_rfd), + .A2(\blk00000003/sig00000049 ), + .A3(NlwRenamedSig_OI_rfd), + .CE(\blk00000003/sig000009b8 ), + .CLK(clk), + .D(\blk00000003/sig00000210 ), + .Q(\blk00000003/sig00000a87 ), + .Q15(\NLW_blk00000003/blk00000a18_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000a17 ( + .C(clk), + .CE(\blk00000003/sig000009b8 ), + .D(\blk00000003/sig00000a85 ), + .Q(\blk00000003/sig00000a86 ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000a16 ( + .A0(\blk00000003/sig00000049 ), + .A1(NlwRenamedSig_OI_rfd), + .A2(\blk00000003/sig00000049 ), + .A3(NlwRenamedSig_OI_rfd), + .CE(\blk00000003/sig000009b8 ), + .CLK(clk), + .D(\blk00000003/sig0000020f ), + .Q(\blk00000003/sig00000a85 ), + .Q15(\NLW_blk00000003/blk00000a16_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000a15 ( + .C(clk), + .CE(\blk00000003/sig000009b8 ), + .D(\blk00000003/sig00000a83 ), + .Q(\blk00000003/sig00000a84 ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000a14 ( + .A0(\blk00000003/sig00000049 ), + .A1(NlwRenamedSig_OI_rfd), + .A2(\blk00000003/sig00000049 ), + .A3(NlwRenamedSig_OI_rfd), + .CE(\blk00000003/sig000009b8 ), + .CLK(clk), + .D(\blk00000003/sig0000020e ), + .Q(\blk00000003/sig00000a83 ), + .Q15(\NLW_blk00000003/blk00000a14_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000a13 ( + .C(clk), + .CE(\blk00000003/sig000009b8 ), + .D(\blk00000003/sig00000a81 ), + .Q(\blk00000003/sig00000a82 ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000a12 ( + .A0(\blk00000003/sig00000049 ), + .A1(NlwRenamedSig_OI_rfd), + .A2(\blk00000003/sig00000049 ), + .A3(NlwRenamedSig_OI_rfd), + .CE(\blk00000003/sig000009b8 ), + .CLK(clk), + .D(\blk00000003/sig0000020d ), + .Q(\blk00000003/sig00000a81 ), + .Q15(\NLW_blk00000003/blk00000a12_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000a11 ( + .C(clk), + .CE(\blk00000003/sig000009b8 ), + .D(\blk00000003/sig00000a7f ), + .Q(\blk00000003/sig00000a80 ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000a10 ( + .A0(\blk00000003/sig00000049 ), + .A1(NlwRenamedSig_OI_rfd), + .A2(\blk00000003/sig00000049 ), + .A3(NlwRenamedSig_OI_rfd), + .CE(\blk00000003/sig000009b8 ), + .CLK(clk), + .D(\blk00000003/sig0000020b ), + .Q(\blk00000003/sig00000a7f ), + .Q15(\NLW_blk00000003/blk00000a10_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000a0f ( + .C(clk), + .CE(\blk00000003/sig000009b8 ), + .D(\blk00000003/sig00000a7d ), + .Q(\blk00000003/sig00000a7e ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000a0e ( + .A0(\blk00000003/sig00000049 ), + .A1(NlwRenamedSig_OI_rfd), + .A2(\blk00000003/sig00000049 ), + .A3(NlwRenamedSig_OI_rfd), + .CE(\blk00000003/sig000009b8 ), + .CLK(clk), + .D(\blk00000003/sig0000020a ), + .Q(\blk00000003/sig00000a7d ), + .Q15(\NLW_blk00000003/blk00000a0e_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000a0d ( + .C(clk), + .CE(\blk00000003/sig000009b8 ), + .D(\blk00000003/sig00000a7b ), + .Q(\blk00000003/sig00000a7c ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000a0c ( + .A0(\blk00000003/sig00000049 ), + .A1(NlwRenamedSig_OI_rfd), + .A2(\blk00000003/sig00000049 ), + .A3(NlwRenamedSig_OI_rfd), + .CE(\blk00000003/sig000009b8 ), + .CLK(clk), + .D(\blk00000003/sig0000020c ), + .Q(\blk00000003/sig00000a7b ), + .Q15(\NLW_blk00000003/blk00000a0c_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000a0b ( + .C(clk), + .CE(\blk00000003/sig000009b8 ), + .D(\blk00000003/sig00000a79 ), + .Q(\blk00000003/sig00000a7a ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000a0a ( + .A0(\blk00000003/sig00000049 ), + .A1(NlwRenamedSig_OI_rfd), + .A2(\blk00000003/sig00000049 ), + .A3(NlwRenamedSig_OI_rfd), + .CE(\blk00000003/sig000009b8 ), + .CLK(clk), + .D(\blk00000003/sig00000208 ), + .Q(\blk00000003/sig00000a79 ), + .Q15(\NLW_blk00000003/blk00000a0a_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000a09 ( + .C(clk), + .CE(\blk00000003/sig000009b8 ), + .D(\blk00000003/sig00000a77 ), + .Q(\blk00000003/sig00000a78 ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000a08 ( + .A0(\blk00000003/sig00000049 ), + .A1(NlwRenamedSig_OI_rfd), + .A2(\blk00000003/sig00000049 ), + .A3(NlwRenamedSig_OI_rfd), + .CE(\blk00000003/sig000009b8 ), + .CLK(clk), + .D(\blk00000003/sig00000207 ), + .Q(\blk00000003/sig00000a77 ), + .Q15(\NLW_blk00000003/blk00000a08_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000a07 ( + .C(clk), + .CE(\blk00000003/sig000009b8 ), + .D(\blk00000003/sig00000a75 ), + .Q(\blk00000003/sig00000a76 ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000a06 ( + .A0(\blk00000003/sig00000049 ), + .A1(NlwRenamedSig_OI_rfd), + .A2(\blk00000003/sig00000049 ), + .A3(NlwRenamedSig_OI_rfd), + .CE(\blk00000003/sig000009b8 ), + .CLK(clk), + .D(\blk00000003/sig00000209 ), + .Q(\blk00000003/sig00000a75 ), + .Q15(\NLW_blk00000003/blk00000a06_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000a05 ( + .C(clk), + .CE(\blk00000003/sig000009b8 ), + .D(\blk00000003/sig00000a73 ), + .Q(\blk00000003/sig00000a74 ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000a04 ( + .A0(\blk00000003/sig00000049 ), + .A1(NlwRenamedSig_OI_rfd), + .A2(\blk00000003/sig00000049 ), + .A3(NlwRenamedSig_OI_rfd), + .CE(\blk00000003/sig000009b8 ), + .CLK(clk), + .D(\blk00000003/sig00000205 ), + .Q(\blk00000003/sig00000a73 ), + .Q15(\NLW_blk00000003/blk00000a04_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000a03 ( + .C(clk), + .CE(\blk00000003/sig000009b8 ), + .D(\blk00000003/sig00000a71 ), + .Q(\blk00000003/sig00000a72 ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000a02 ( + .A0(\blk00000003/sig00000049 ), + .A1(NlwRenamedSig_OI_rfd), + .A2(\blk00000003/sig00000049 ), + .A3(NlwRenamedSig_OI_rfd), + .CE(\blk00000003/sig000009b8 ), + .CLK(clk), + .D(\blk00000003/sig00000204 ), + .Q(\blk00000003/sig00000a71 ), + .Q15(\NLW_blk00000003/blk00000a02_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000a01 ( + .C(clk), + .CE(\blk00000003/sig000009b8 ), + .D(\blk00000003/sig00000a6f ), + .Q(\blk00000003/sig00000a70 ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000a00 ( + .A0(\blk00000003/sig00000049 ), + .A1(NlwRenamedSig_OI_rfd), + .A2(\blk00000003/sig00000049 ), + .A3(NlwRenamedSig_OI_rfd), + .CE(\blk00000003/sig000009b8 ), + .CLK(clk), + .D(\blk00000003/sig00000206 ), + .Q(\blk00000003/sig00000a6f ), + .Q15(\NLW_blk00000003/blk00000a00_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000009ff ( + .C(clk), + .CE(\blk00000003/sig000009b8 ), + .D(\blk00000003/sig00000a6d ), + .Q(\blk00000003/sig00000a6e ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk000009fe ( + .A0(\blk00000003/sig00000049 ), + .A1(NlwRenamedSig_OI_rfd), + .A2(\blk00000003/sig00000049 ), + .A3(NlwRenamedSig_OI_rfd), + .CE(\blk00000003/sig000009b8 ), + .CLK(clk), + .D(\blk00000003/sig00000203 ), + .Q(\blk00000003/sig00000a6d ), + .Q15(\NLW_blk00000003/blk000009fe_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000009fd ( + .C(clk), + .CE(\blk00000003/sig000009b8 ), + .D(\blk00000003/sig00000a6b ), + .Q(\blk00000003/sig00000a6c ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk000009fc ( + .A0(\blk00000003/sig00000049 ), + .A1(NlwRenamedSig_OI_rfd), + .A2(\blk00000003/sig00000049 ), + .A3(NlwRenamedSig_OI_rfd), + .CE(\blk00000003/sig000009b8 ), + .CLK(clk), + .D(\blk00000003/sig00000202 ), + .Q(\blk00000003/sig00000a6b ), + .Q15(\NLW_blk00000003/blk000009fc_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000009fb ( + .C(clk), + .CE(\blk00000003/sig000009b8 ), + .D(\blk00000003/sig00000a69 ), + .Q(\blk00000003/sig00000a6a ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk000009fa ( + .A0(\blk00000003/sig00000049 ), + .A1(NlwRenamedSig_OI_rfd), + .A2(\blk00000003/sig00000049 ), + .A3(NlwRenamedSig_OI_rfd), + .CE(\blk00000003/sig000009b8 ), + .CLK(clk), + .D(\blk00000003/sig00000201 ), + .Q(\blk00000003/sig00000a69 ), + .Q15(\NLW_blk00000003/blk000009fa_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000009f9 ( + .C(clk), + .CE(\blk00000003/sig000009b8 ), + .D(\blk00000003/sig00000a67 ), + .Q(\blk00000003/sig00000a68 ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk000009f8 ( + .A0(\blk00000003/sig00000049 ), + .A1(NlwRenamedSig_OI_rfd), + .A2(\blk00000003/sig00000049 ), + .A3(NlwRenamedSig_OI_rfd), + .CE(\blk00000003/sig000009b8 ), + .CLK(clk), + .D(\blk00000003/sig00000200 ), + .Q(\blk00000003/sig00000a67 ), + .Q15(\NLW_blk00000003/blk000009f8_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000009f7 ( + .C(clk), + .CE(\blk00000003/sig000009b8 ), + .D(\blk00000003/sig00000a65 ), + .Q(\blk00000003/sig00000a66 ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk000009f6 ( + .A0(\blk00000003/sig00000049 ), + .A1(NlwRenamedSig_OI_rfd), + .A2(\blk00000003/sig00000049 ), + .A3(NlwRenamedSig_OI_rfd), + .CE(\blk00000003/sig000009b8 ), + .CLK(clk), + .D(\blk00000003/sig000001fe ), + .Q(\blk00000003/sig00000a65 ), + .Q15(\NLW_blk00000003/blk000009f6_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000009f5 ( + .C(clk), + .CE(\blk00000003/sig000009b8 ), + .D(\blk00000003/sig00000a63 ), + .Q(\blk00000003/sig00000a64 ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk000009f4 ( + .A0(\blk00000003/sig00000049 ), + .A1(NlwRenamedSig_OI_rfd), + .A2(\blk00000003/sig00000049 ), + .A3(NlwRenamedSig_OI_rfd), + .CE(\blk00000003/sig000009b8 ), + .CLK(clk), + .D(\blk00000003/sig000001fd ), + .Q(\blk00000003/sig00000a63 ), + .Q15(\NLW_blk00000003/blk000009f4_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000009f3 ( + .C(clk), + .CE(\blk00000003/sig000009b8 ), + .D(\blk00000003/sig00000a61 ), + .Q(\blk00000003/sig00000a62 ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk000009f2 ( + .A0(\blk00000003/sig00000049 ), + .A1(NlwRenamedSig_OI_rfd), + .A2(\blk00000003/sig00000049 ), + .A3(NlwRenamedSig_OI_rfd), + .CE(\blk00000003/sig000009b8 ), + .CLK(clk), + .D(\blk00000003/sig000001ff ), + .Q(\blk00000003/sig00000a61 ), + .Q15(\NLW_blk00000003/blk000009f2_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000009f1 ( + .C(clk), + .CE(\blk00000003/sig000009b8 ), + .D(\blk00000003/sig00000a5f ), + .Q(\blk00000003/sig00000a60 ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk000009f0 ( + .A0(\blk00000003/sig00000049 ), + .A1(NlwRenamedSig_OI_rfd), + .A2(\blk00000003/sig00000049 ), + .A3(NlwRenamedSig_OI_rfd), + .CE(\blk00000003/sig000009b8 ), + .CLK(clk), + .D(\blk00000003/sig000001fb ), + .Q(\blk00000003/sig00000a5f ), + .Q15(\NLW_blk00000003/blk000009f0_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000009ef ( + .C(clk), + .CE(\blk00000003/sig000009b8 ), + .D(\blk00000003/sig00000a5d ), + .Q(\blk00000003/sig00000a5e ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk000009ee ( + .A0(\blk00000003/sig00000049 ), + .A1(NlwRenamedSig_OI_rfd), + .A2(\blk00000003/sig00000049 ), + .A3(NlwRenamedSig_OI_rfd), + .CE(\blk00000003/sig000009b8 ), + .CLK(clk), + .D(\blk00000003/sig000001fa ), + .Q(\blk00000003/sig00000a5d ), + .Q15(\NLW_blk00000003/blk000009ee_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000009ed ( + .C(clk), + .CE(\blk00000003/sig000009b8 ), + .D(\blk00000003/sig00000a5b ), + .Q(\blk00000003/sig00000a5c ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk000009ec ( + .A0(\blk00000003/sig00000049 ), + .A1(NlwRenamedSig_OI_rfd), + .A2(\blk00000003/sig00000049 ), + .A3(NlwRenamedSig_OI_rfd), + .CE(\blk00000003/sig000009b8 ), + .CLK(clk), + .D(\blk00000003/sig000001fc ), + .Q(\blk00000003/sig00000a5b ), + .Q15(\NLW_blk00000003/blk000009ec_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000009eb ( + .C(clk), + .CE(\blk00000003/sig000009b8 ), + .D(\blk00000003/sig00000a59 ), + .Q(\blk00000003/sig00000a5a ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk000009ea ( + .A0(\blk00000003/sig00000049 ), + .A1(NlwRenamedSig_OI_rfd), + .A2(\blk00000003/sig00000049 ), + .A3(NlwRenamedSig_OI_rfd), + .CE(\blk00000003/sig000009b8 ), + .CLK(clk), + .D(\blk00000003/sig000001f8 ), + .Q(\blk00000003/sig00000a59 ), + .Q15(\NLW_blk00000003/blk000009ea_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000009e9 ( + .C(clk), + .CE(\blk00000003/sig000009b8 ), + .D(\blk00000003/sig00000a57 ), + .Q(\blk00000003/sig00000a58 ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk000009e8 ( + .A0(\blk00000003/sig00000049 ), + .A1(NlwRenamedSig_OI_rfd), + .A2(\blk00000003/sig00000049 ), + .A3(NlwRenamedSig_OI_rfd), + .CE(\blk00000003/sig000009b8 ), + .CLK(clk), + .D(\blk00000003/sig000001f7 ), + .Q(\blk00000003/sig00000a57 ), + .Q15(\NLW_blk00000003/blk000009e8_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000009e7 ( + .C(clk), + .CE(\blk00000003/sig000009b8 ), + .D(\blk00000003/sig00000a55 ), + .Q(\blk00000003/sig00000a56 ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk000009e6 ( + .A0(\blk00000003/sig00000049 ), + .A1(NlwRenamedSig_OI_rfd), + .A2(\blk00000003/sig00000049 ), + .A3(NlwRenamedSig_OI_rfd), + .CE(\blk00000003/sig000009b8 ), + .CLK(clk), + .D(\blk00000003/sig000001f9 ), + .Q(\blk00000003/sig00000a55 ), + .Q15(\NLW_blk00000003/blk000009e6_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000009e5 ( + .C(clk), + .CE(\blk00000003/sig000009b8 ), + .D(\blk00000003/sig00000a53 ), + .Q(\blk00000003/sig00000a54 ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk000009e4 ( + .A0(\blk00000003/sig00000049 ), + .A1(NlwRenamedSig_OI_rfd), + .A2(\blk00000003/sig00000049 ), + .A3(NlwRenamedSig_OI_rfd), + .CE(\blk00000003/sig000009b8 ), + .CLK(clk), + .D(\blk00000003/sig000001f6 ), + .Q(\blk00000003/sig00000a53 ), + .Q15(\NLW_blk00000003/blk000009e4_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000009e3 ( + .C(clk), + .CE(\blk00000003/sig000009b8 ), + .D(\blk00000003/sig00000a51 ), + .Q(\blk00000003/sig00000a52 ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk000009e2 ( + .A0(\blk00000003/sig00000049 ), + .A1(NlwRenamedSig_OI_rfd), + .A2(\blk00000003/sig00000049 ), + .A3(NlwRenamedSig_OI_rfd), + .CE(\blk00000003/sig000009b8 ), + .CLK(clk), + .D(\blk00000003/sig000001f5 ), + .Q(\blk00000003/sig00000a51 ), + .Q15(\NLW_blk00000003/blk000009e2_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000009e1 ( + .C(clk), + .CE(\blk00000003/sig000009b8 ), + .D(\blk00000003/sig00000a4f ), + .Q(\blk00000003/sig00000a50 ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk000009e0 ( + .A0(\blk00000003/sig00000049 ), + .A1(NlwRenamedSig_OI_rfd), + .A2(\blk00000003/sig00000049 ), + .A3(NlwRenamedSig_OI_rfd), + .CE(\blk00000003/sig000009b8 ), + .CLK(clk), + .D(\blk00000003/sig000001f4 ), + .Q(\blk00000003/sig00000a4f ), + .Q15(\NLW_blk00000003/blk000009e0_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000009df ( + .C(clk), + .CE(\blk00000003/sig000009b8 ), + .D(\blk00000003/sig00000a4d ), + .Q(\blk00000003/sig00000a4e ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk000009de ( + .A0(\blk00000003/sig00000049 ), + .A1(NlwRenamedSig_OI_rfd), + .A2(\blk00000003/sig00000049 ), + .A3(NlwRenamedSig_OI_rfd), + .CE(\blk00000003/sig000009b8 ), + .CLK(clk), + .D(\blk00000003/sig000001f3 ), + .Q(\blk00000003/sig00000a4d ), + .Q15(\NLW_blk00000003/blk000009de_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000009dd ( + .C(clk), + .CE(\blk00000003/sig000009b8 ), + .D(\blk00000003/sig00000a4b ), + .Q(\blk00000003/sig00000a4c ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk000009dc ( + .A0(\blk00000003/sig00000049 ), + .A1(NlwRenamedSig_OI_rfd), + .A2(\blk00000003/sig00000049 ), + .A3(NlwRenamedSig_OI_rfd), + .CE(\blk00000003/sig000009b8 ), + .CLK(clk), + .D(\blk00000003/sig000001f1 ), + .Q(\blk00000003/sig00000a4b ), + .Q15(\NLW_blk00000003/blk000009dc_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000009db ( + .C(clk), + .CE(\blk00000003/sig000009b8 ), + .D(\blk00000003/sig00000a49 ), + .Q(\blk00000003/sig00000a4a ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk000009da ( + .A0(\blk00000003/sig00000049 ), + .A1(NlwRenamedSig_OI_rfd), + .A2(\blk00000003/sig00000049 ), + .A3(NlwRenamedSig_OI_rfd), + .CE(\blk00000003/sig000009b8 ), + .CLK(clk), + .D(\blk00000003/sig000001f0 ), + .Q(\blk00000003/sig00000a49 ), + .Q15(\NLW_blk00000003/blk000009da_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000009d9 ( + .C(clk), + .CE(\blk00000003/sig000009b8 ), + .D(\blk00000003/sig00000a47 ), + .Q(\blk00000003/sig00000a48 ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk000009d8 ( + .A0(\blk00000003/sig00000049 ), + .A1(NlwRenamedSig_OI_rfd), + .A2(\blk00000003/sig00000049 ), + .A3(NlwRenamedSig_OI_rfd), + .CE(\blk00000003/sig000009b8 ), + .CLK(clk), + .D(\blk00000003/sig000001f2 ), + .Q(\blk00000003/sig00000a47 ), + .Q15(\NLW_blk00000003/blk000009d8_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000009d7 ( + .C(clk), + .CE(\blk00000003/sig000009b8 ), + .D(\blk00000003/sig00000a45 ), + .Q(\blk00000003/sig00000a46 ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk000009d6 ( + .A0(\blk00000003/sig00000049 ), + .A1(NlwRenamedSig_OI_rfd), + .A2(\blk00000003/sig00000049 ), + .A3(NlwRenamedSig_OI_rfd), + .CE(\blk00000003/sig000009b8 ), + .CLK(clk), + .D(\blk00000003/sig000001ee ), + .Q(\blk00000003/sig00000a45 ), + .Q15(\NLW_blk00000003/blk000009d6_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000009d5 ( + .C(clk), + .CE(\blk00000003/sig000009b8 ), + .D(\blk00000003/sig00000a43 ), + .Q(\blk00000003/sig00000a44 ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk000009d4 ( + .A0(\blk00000003/sig00000049 ), + .A1(NlwRenamedSig_OI_rfd), + .A2(\blk00000003/sig00000049 ), + .A3(NlwRenamedSig_OI_rfd), + .CE(\blk00000003/sig000009b8 ), + .CLK(clk), + .D(\blk00000003/sig000001ed ), + .Q(\blk00000003/sig00000a43 ), + .Q15(\NLW_blk00000003/blk000009d4_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000009d3 ( + .C(clk), + .CE(\blk00000003/sig000009b8 ), + .D(\blk00000003/sig00000a41 ), + .Q(\blk00000003/sig00000a42 ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk000009d2 ( + .A0(\blk00000003/sig00000049 ), + .A1(NlwRenamedSig_OI_rfd), + .A2(\blk00000003/sig00000049 ), + .A3(NlwRenamedSig_OI_rfd), + .CE(\blk00000003/sig000009b8 ), + .CLK(clk), + .D(\blk00000003/sig000001ef ), + .Q(\blk00000003/sig00000a41 ), + .Q15(\NLW_blk00000003/blk000009d2_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000009d1 ( + .C(clk), + .CE(\blk00000003/sig000009b8 ), + .D(\blk00000003/sig00000a3f ), + .Q(\blk00000003/sig00000a40 ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk000009d0 ( + .A0(\blk00000003/sig00000049 ), + .A1(NlwRenamedSig_OI_rfd), + .A2(\blk00000003/sig00000049 ), + .A3(NlwRenamedSig_OI_rfd), + .CE(\blk00000003/sig000009b8 ), + .CLK(clk), + .D(\blk00000003/sig000001eb ), + .Q(\blk00000003/sig00000a3f ), + .Q15(\NLW_blk00000003/blk000009d0_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000009cf ( + .C(clk), + .CE(\blk00000003/sig000009b8 ), + .D(\blk00000003/sig00000a3d ), + .Q(\blk00000003/sig00000a3e ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk000009ce ( + .A0(\blk00000003/sig00000049 ), + .A1(NlwRenamedSig_OI_rfd), + .A2(\blk00000003/sig00000049 ), + .A3(NlwRenamedSig_OI_rfd), + .CE(\blk00000003/sig000009b8 ), + .CLK(clk), + .D(\blk00000003/sig000001ea ), + .Q(\blk00000003/sig00000a3d ), + .Q15(\NLW_blk00000003/blk000009ce_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000009cd ( + .C(clk), + .CE(\blk00000003/sig000009b8 ), + .D(\blk00000003/sig00000a3b ), + .Q(\blk00000003/sig00000a3c ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk000009cc ( + .A0(\blk00000003/sig00000049 ), + .A1(NlwRenamedSig_OI_rfd), + .A2(\blk00000003/sig00000049 ), + .A3(NlwRenamedSig_OI_rfd), + .CE(\blk00000003/sig000009b8 ), + .CLK(clk), + .D(\blk00000003/sig000001ec ), + .Q(\blk00000003/sig00000a3b ), + .Q15(\NLW_blk00000003/blk000009cc_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000009cb ( + .C(clk), + .CE(\blk00000003/sig0000091e ), + .D(\blk00000003/sig00000a3a ), + .Q(\blk00000003/sig000007a9 ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk000009ca ( + .A0(\blk00000003/sig00000049 ), + .A1(\blk00000003/sig00000049 ), + .A2(\blk00000003/sig00000049 ), + .A3(\blk00000003/sig00000049 ), + .CE(\blk00000003/sig0000091e ), + .CLK(clk), + .D(\blk00000003/sig00000779 ), + .Q(\blk00000003/sig00000a3a ), + .Q15(\NLW_blk00000003/blk000009ca_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000009c9 ( + .C(clk), + .CE(\blk00000003/sig0000091e ), + .D(\blk00000003/sig00000a39 ), + .Q(\blk00000003/sig000007a7 ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk000009c8 ( + .A0(\blk00000003/sig00000049 ), + .A1(\blk00000003/sig00000049 ), + .A2(\blk00000003/sig00000049 ), + .A3(\blk00000003/sig00000049 ), + .CE(\blk00000003/sig0000091e ), + .CLK(clk), + .D(\blk00000003/sig00000777 ), + .Q(\blk00000003/sig00000a39 ), + .Q15(\NLW_blk00000003/blk000009c8_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000009c7 ( + .C(clk), + .CE(\blk00000003/sig0000091e ), + .D(\blk00000003/sig00000a38 ), + .Q(\blk00000003/sig000007a6 ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk000009c6 ( + .A0(\blk00000003/sig00000049 ), + .A1(\blk00000003/sig00000049 ), + .A2(\blk00000003/sig00000049 ), + .A3(\blk00000003/sig00000049 ), + .CE(\blk00000003/sig0000091e ), + .CLK(clk), + .D(\blk00000003/sig00000776 ), + .Q(\blk00000003/sig00000a38 ), + .Q15(\NLW_blk00000003/blk000009c6_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000009c5 ( + .C(clk), + .CE(\blk00000003/sig0000091e ), + .D(\blk00000003/sig00000a37 ), + .Q(\blk00000003/sig000007a8 ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk000009c4 ( + .A0(\blk00000003/sig00000049 ), + .A1(\blk00000003/sig00000049 ), + .A2(\blk00000003/sig00000049 ), + .A3(\blk00000003/sig00000049 ), + .CE(\blk00000003/sig0000091e ), + .CLK(clk), + .D(\blk00000003/sig00000778 ), + .Q(\blk00000003/sig00000a37 ), + .Q15(\NLW_blk00000003/blk000009c4_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000009c3 ( + .C(clk), + .CE(\blk00000003/sig0000091e ), + .D(\blk00000003/sig00000a36 ), + .Q(\blk00000003/sig000007a4 ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk000009c2 ( + .A0(\blk00000003/sig00000049 ), + .A1(\blk00000003/sig00000049 ), + .A2(\blk00000003/sig00000049 ), + .A3(\blk00000003/sig00000049 ), + .CE(\blk00000003/sig0000091e ), + .CLK(clk), + .D(\blk00000003/sig00000774 ), + .Q(\blk00000003/sig00000a36 ), + .Q15(\NLW_blk00000003/blk000009c2_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000009c1 ( + .C(clk), + .CE(\blk00000003/sig0000091e ), + .D(\blk00000003/sig00000a35 ), + .Q(\blk00000003/sig000007a3 ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk000009c0 ( + .A0(\blk00000003/sig00000049 ), + .A1(\blk00000003/sig00000049 ), + .A2(\blk00000003/sig00000049 ), + .A3(\blk00000003/sig00000049 ), + .CE(\blk00000003/sig0000091e ), + .CLK(clk), + .D(\blk00000003/sig00000773 ), + .Q(\blk00000003/sig00000a35 ), + .Q15(\NLW_blk00000003/blk000009c0_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000009bf ( + .C(clk), + .CE(\blk00000003/sig0000091e ), + .D(\blk00000003/sig00000a34 ), + .Q(\blk00000003/sig000007a5 ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk000009be ( + .A0(\blk00000003/sig00000049 ), + .A1(\blk00000003/sig00000049 ), + .A2(\blk00000003/sig00000049 ), + .A3(\blk00000003/sig00000049 ), + .CE(\blk00000003/sig0000091e ), + .CLK(clk), + .D(\blk00000003/sig00000775 ), + .Q(\blk00000003/sig00000a34 ), + .Q15(\NLW_blk00000003/blk000009be_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000009bd ( + .C(clk), + .CE(\blk00000003/sig0000091e ), + .D(\blk00000003/sig00000a33 ), + .Q(\blk00000003/sig000007a2 ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk000009bc ( + .A0(\blk00000003/sig00000049 ), + .A1(\blk00000003/sig00000049 ), + .A2(\blk00000003/sig00000049 ), + .A3(\blk00000003/sig00000049 ), + .CE(\blk00000003/sig0000091e ), + .CLK(clk), + .D(\blk00000003/sig00000772 ), + .Q(\blk00000003/sig00000a33 ), + .Q15(\NLW_blk00000003/blk000009bc_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000009bb ( + .C(clk), + .CE(\blk00000003/sig0000091e ), + .D(\blk00000003/sig00000a32 ), + .Q(\blk00000003/sig000007a1 ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk000009ba ( + .A0(\blk00000003/sig00000049 ), + .A1(\blk00000003/sig00000049 ), + .A2(\blk00000003/sig00000049 ), + .A3(\blk00000003/sig00000049 ), + .CE(\blk00000003/sig0000091e ), + .CLK(clk), + .D(\blk00000003/sig00000771 ), + .Q(\blk00000003/sig00000a32 ), + .Q15(\NLW_blk00000003/blk000009ba_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000009b9 ( + .C(clk), + .CE(\blk00000003/sig0000091e ), + .D(\blk00000003/sig00000a31 ), + .Q(\blk00000003/sig000007a0 ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk000009b8 ( + .A0(\blk00000003/sig00000049 ), + .A1(\blk00000003/sig00000049 ), + .A2(\blk00000003/sig00000049 ), + .A3(\blk00000003/sig00000049 ), + .CE(\blk00000003/sig0000091e ), + .CLK(clk), + .D(\blk00000003/sig00000770 ), + .Q(\blk00000003/sig00000a31 ), + .Q15(\NLW_blk00000003/blk000009b8_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000009b7 ( + .C(clk), + .CE(\blk00000003/sig0000091e ), + .D(\blk00000003/sig00000a30 ), + .Q(\blk00000003/sig0000079f ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk000009b6 ( + .A0(\blk00000003/sig00000049 ), + .A1(\blk00000003/sig00000049 ), + .A2(\blk00000003/sig00000049 ), + .A3(\blk00000003/sig00000049 ), + .CE(\blk00000003/sig0000091e ), + .CLK(clk), + .D(\blk00000003/sig0000076f ), + .Q(\blk00000003/sig00000a30 ), + .Q15(\NLW_blk00000003/blk000009b6_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000009b5 ( + .C(clk), + .CE(\blk00000003/sig0000091e ), + .D(\blk00000003/sig00000a2f ), + .Q(\blk00000003/sig0000079d ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk000009b4 ( + .A0(\blk00000003/sig00000049 ), + .A1(\blk00000003/sig00000049 ), + .A2(\blk00000003/sig00000049 ), + .A3(\blk00000003/sig00000049 ), + .CE(\blk00000003/sig0000091e ), + .CLK(clk), + .D(\blk00000003/sig0000076d ), + .Q(\blk00000003/sig00000a2f ), + .Q15(\NLW_blk00000003/blk000009b4_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000009b3 ( + .C(clk), + .CE(\blk00000003/sig0000091e ), + .D(\blk00000003/sig00000a2e ), + .Q(\blk00000003/sig0000079c ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk000009b2 ( + .A0(\blk00000003/sig00000049 ), + .A1(\blk00000003/sig00000049 ), + .A2(\blk00000003/sig00000049 ), + .A3(\blk00000003/sig00000049 ), + .CE(\blk00000003/sig0000091e ), + .CLK(clk), + .D(\blk00000003/sig0000076c ), + .Q(\blk00000003/sig00000a2e ), + .Q15(\NLW_blk00000003/blk000009b2_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000009b1 ( + .C(clk), + .CE(\blk00000003/sig0000091e ), + .D(\blk00000003/sig00000a2d ), + .Q(\blk00000003/sig0000079e ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk000009b0 ( + .A0(\blk00000003/sig00000049 ), + .A1(\blk00000003/sig00000049 ), + .A2(\blk00000003/sig00000049 ), + .A3(\blk00000003/sig00000049 ), + .CE(\blk00000003/sig0000091e ), + .CLK(clk), + .D(\blk00000003/sig0000076e ), + .Q(\blk00000003/sig00000a2d ), + .Q15(\NLW_blk00000003/blk000009b0_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000009af ( + .C(clk), + .CE(\blk00000003/sig0000091e ), + .D(\blk00000003/sig00000a2c ), + .Q(\blk00000003/sig0000079a ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk000009ae ( + .A0(\blk00000003/sig00000049 ), + .A1(\blk00000003/sig00000049 ), + .A2(\blk00000003/sig00000049 ), + .A3(\blk00000003/sig00000049 ), + .CE(\blk00000003/sig0000091e ), + .CLK(clk), + .D(\blk00000003/sig0000076a ), + .Q(\blk00000003/sig00000a2c ), + .Q15(\NLW_blk00000003/blk000009ae_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000009ad ( + .C(clk), + .CE(\blk00000003/sig0000091e ), + .D(\blk00000003/sig00000a2b ), + .Q(\blk00000003/sig00000799 ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk000009ac ( + .A0(\blk00000003/sig00000049 ), + .A1(\blk00000003/sig00000049 ), + .A2(\blk00000003/sig00000049 ), + .A3(\blk00000003/sig00000049 ), + .CE(\blk00000003/sig0000091e ), + .CLK(clk), + .D(\blk00000003/sig00000769 ), + .Q(\blk00000003/sig00000a2b ), + .Q15(\NLW_blk00000003/blk000009ac_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000009ab ( + .C(clk), + .CE(\blk00000003/sig0000091e ), + .D(\blk00000003/sig00000a2a ), + .Q(\blk00000003/sig0000079b ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk000009aa ( + .A0(\blk00000003/sig00000049 ), + .A1(\blk00000003/sig00000049 ), + .A2(\blk00000003/sig00000049 ), + .A3(\blk00000003/sig00000049 ), + .CE(\blk00000003/sig0000091e ), + .CLK(clk), + .D(\blk00000003/sig0000076b ), + .Q(\blk00000003/sig00000a2a ), + .Q15(\NLW_blk00000003/blk000009aa_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000009a9 ( + .C(clk), + .CE(\blk00000003/sig0000091e ), + .D(\blk00000003/sig00000a29 ), + .Q(\blk00000003/sig00000797 ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk000009a8 ( + .A0(\blk00000003/sig00000049 ), + .A1(\blk00000003/sig00000049 ), + .A2(\blk00000003/sig00000049 ), + .A3(\blk00000003/sig00000049 ), + .CE(\blk00000003/sig0000091e ), + .CLK(clk), + .D(\blk00000003/sig00000767 ), + .Q(\blk00000003/sig00000a29 ), + .Q15(\NLW_blk00000003/blk000009a8_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000009a7 ( + .C(clk), + .CE(\blk00000003/sig0000091e ), + .D(\blk00000003/sig00000a28 ), + .Q(\blk00000003/sig00000796 ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk000009a6 ( + .A0(\blk00000003/sig00000049 ), + .A1(\blk00000003/sig00000049 ), + .A2(\blk00000003/sig00000049 ), + .A3(\blk00000003/sig00000049 ), + .CE(\blk00000003/sig0000091e ), + .CLK(clk), + .D(\blk00000003/sig00000766 ), + .Q(\blk00000003/sig00000a28 ), + .Q15(\NLW_blk00000003/blk000009a6_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000009a5 ( + .C(clk), + .CE(\blk00000003/sig0000091e ), + .D(\blk00000003/sig00000a27 ), + .Q(\blk00000003/sig00000798 ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk000009a4 ( + .A0(\blk00000003/sig00000049 ), + .A1(\blk00000003/sig00000049 ), + .A2(\blk00000003/sig00000049 ), + .A3(\blk00000003/sig00000049 ), + .CE(\blk00000003/sig0000091e ), + .CLK(clk), + .D(\blk00000003/sig00000768 ), + .Q(\blk00000003/sig00000a27 ), + .Q15(\NLW_blk00000003/blk000009a4_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000009a3 ( + .C(clk), + .CE(\blk00000003/sig0000091e ), + .D(\blk00000003/sig00000a26 ), + .Q(\blk00000003/sig00000794 ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk000009a2 ( + .A0(\blk00000003/sig00000049 ), + .A1(\blk00000003/sig00000049 ), + .A2(\blk00000003/sig00000049 ), + .A3(\blk00000003/sig00000049 ), + .CE(\blk00000003/sig0000091e ), + .CLK(clk), + .D(\blk00000003/sig00000764 ), + .Q(\blk00000003/sig00000a26 ), + .Q15(\NLW_blk00000003/blk000009a2_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000009a1 ( + .C(clk), + .CE(\blk00000003/sig0000091e ), + .D(\blk00000003/sig00000a25 ), + .Q(\blk00000003/sig00000793 ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk000009a0 ( + .A0(\blk00000003/sig00000049 ), + .A1(\blk00000003/sig00000049 ), + .A2(\blk00000003/sig00000049 ), + .A3(\blk00000003/sig00000049 ), + .CE(\blk00000003/sig0000091e ), + .CLK(clk), + .D(\blk00000003/sig00000763 ), + .Q(\blk00000003/sig00000a25 ), + .Q15(\NLW_blk00000003/blk000009a0_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk0000099f ( + .C(clk), + .CE(\blk00000003/sig0000091e ), + .D(\blk00000003/sig00000a24 ), + .Q(\blk00000003/sig00000795 ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk0000099e ( + .A0(\blk00000003/sig00000049 ), + .A1(\blk00000003/sig00000049 ), + .A2(\blk00000003/sig00000049 ), + .A3(\blk00000003/sig00000049 ), + .CE(\blk00000003/sig0000091e ), + .CLK(clk), + .D(\blk00000003/sig00000765 ), + .Q(\blk00000003/sig00000a24 ), + .Q15(\NLW_blk00000003/blk0000099e_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk0000099d ( + .C(clk), + .CE(\blk00000003/sig0000091e ), + .D(\blk00000003/sig00000a23 ), + .Q(\blk00000003/sig00000792 ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk0000099c ( + .A0(\blk00000003/sig00000049 ), + .A1(\blk00000003/sig00000049 ), + .A2(\blk00000003/sig00000049 ), + .A3(\blk00000003/sig00000049 ), + .CE(\blk00000003/sig0000091e ), + .CLK(clk), + .D(\blk00000003/sig00000762 ), + .Q(\blk00000003/sig00000a23 ), + .Q15(\NLW_blk00000003/blk0000099c_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk0000099b ( + .C(clk), + .CE(\blk00000003/sig0000091e ), + .D(\blk00000003/sig00000a22 ), + .Q(\blk00000003/sig000007c0 ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk0000099a ( + .A0(\blk00000003/sig00000049 ), + .A1(\blk00000003/sig00000049 ), + .A2(\blk00000003/sig00000049 ), + .A3(\blk00000003/sig00000049 ), + .CE(\blk00000003/sig0000091e ), + .CLK(clk), + .D(\blk00000003/sig00000790 ), + .Q(\blk00000003/sig00000a22 ), + .Q15(\NLW_blk00000003/blk0000099a_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000999 ( + .C(clk), + .CE(\blk00000003/sig0000091e ), + .D(\blk00000003/sig00000a21 ), + .Q(\blk00000003/sig000007bf ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000998 ( + .A0(\blk00000003/sig00000049 ), + .A1(\blk00000003/sig00000049 ), + .A2(\blk00000003/sig00000049 ), + .A3(\blk00000003/sig00000049 ), + .CE(\blk00000003/sig0000091e ), + .CLK(clk), + .D(\blk00000003/sig0000078f ), + .Q(\blk00000003/sig00000a21 ), + .Q15(\NLW_blk00000003/blk00000998_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000997 ( + .C(clk), + .CE(\blk00000003/sig0000091e ), + .D(\blk00000003/sig00000a20 ), + .Q(\blk00000003/sig000007c1 ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000996 ( + .A0(\blk00000003/sig00000049 ), + .A1(\blk00000003/sig00000049 ), + .A2(\blk00000003/sig00000049 ), + .A3(\blk00000003/sig00000049 ), + .CE(\blk00000003/sig0000091e ), + .CLK(clk), + .D(\blk00000003/sig00000791 ), + .Q(\blk00000003/sig00000a20 ), + .Q15(\NLW_blk00000003/blk00000996_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000995 ( + .C(clk), + .CE(\blk00000003/sig0000091e ), + .D(\blk00000003/sig00000a1f ), + .Q(\blk00000003/sig000007bd ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000994 ( + .A0(\blk00000003/sig00000049 ), + .A1(\blk00000003/sig00000049 ), + .A2(\blk00000003/sig00000049 ), + .A3(\blk00000003/sig00000049 ), + .CE(\blk00000003/sig0000091e ), + .CLK(clk), + .D(\blk00000003/sig0000078d ), + .Q(\blk00000003/sig00000a1f ), + .Q15(\NLW_blk00000003/blk00000994_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000993 ( + .C(clk), + .CE(\blk00000003/sig0000091e ), + .D(\blk00000003/sig00000a1e ), + .Q(\blk00000003/sig000007bc ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000992 ( + .A0(\blk00000003/sig00000049 ), + .A1(\blk00000003/sig00000049 ), + .A2(\blk00000003/sig00000049 ), + .A3(\blk00000003/sig00000049 ), + .CE(\blk00000003/sig0000091e ), + .CLK(clk), + .D(\blk00000003/sig0000078c ), + .Q(\blk00000003/sig00000a1e ), + .Q15(\NLW_blk00000003/blk00000992_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000991 ( + .C(clk), + .CE(\blk00000003/sig0000091e ), + .D(\blk00000003/sig00000a1d ), + .Q(\blk00000003/sig000007be ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000990 ( + .A0(\blk00000003/sig00000049 ), + .A1(\blk00000003/sig00000049 ), + .A2(\blk00000003/sig00000049 ), + .A3(\blk00000003/sig00000049 ), + .CE(\blk00000003/sig0000091e ), + .CLK(clk), + .D(\blk00000003/sig0000078e ), + .Q(\blk00000003/sig00000a1d ), + .Q15(\NLW_blk00000003/blk00000990_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk0000098f ( + .C(clk), + .CE(\blk00000003/sig0000091e ), + .D(\blk00000003/sig00000a1c ), + .Q(\blk00000003/sig000007ba ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk0000098e ( + .A0(\blk00000003/sig00000049 ), + .A1(\blk00000003/sig00000049 ), + .A2(\blk00000003/sig00000049 ), + .A3(\blk00000003/sig00000049 ), + .CE(\blk00000003/sig0000091e ), + .CLK(clk), + .D(\blk00000003/sig0000078a ), + .Q(\blk00000003/sig00000a1c ), + .Q15(\NLW_blk00000003/blk0000098e_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk0000098d ( + .C(clk), + .CE(\blk00000003/sig0000091e ), + .D(\blk00000003/sig00000a1b ), + .Q(\blk00000003/sig000007b9 ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk0000098c ( + .A0(\blk00000003/sig00000049 ), + .A1(\blk00000003/sig00000049 ), + .A2(\blk00000003/sig00000049 ), + .A3(\blk00000003/sig00000049 ), + .CE(\blk00000003/sig0000091e ), + .CLK(clk), + .D(\blk00000003/sig00000789 ), + .Q(\blk00000003/sig00000a1b ), + .Q15(\NLW_blk00000003/blk0000098c_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk0000098b ( + .C(clk), + .CE(\blk00000003/sig0000091e ), + .D(\blk00000003/sig00000a1a ), + .Q(\blk00000003/sig000007bb ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk0000098a ( + .A0(\blk00000003/sig00000049 ), + .A1(\blk00000003/sig00000049 ), + .A2(\blk00000003/sig00000049 ), + .A3(\blk00000003/sig00000049 ), + .CE(\blk00000003/sig0000091e ), + .CLK(clk), + .D(\blk00000003/sig0000078b ), + .Q(\blk00000003/sig00000a1a ), + .Q15(\NLW_blk00000003/blk0000098a_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000989 ( + .C(clk), + .CE(\blk00000003/sig0000091e ), + .D(\blk00000003/sig00000a19 ), + .Q(\blk00000003/sig000007b7 ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000988 ( + .A0(\blk00000003/sig00000049 ), + .A1(\blk00000003/sig00000049 ), + .A2(\blk00000003/sig00000049 ), + .A3(\blk00000003/sig00000049 ), + .CE(\blk00000003/sig0000091e ), + .CLK(clk), + .D(\blk00000003/sig00000787 ), + .Q(\blk00000003/sig00000a19 ), + .Q15(\NLW_blk00000003/blk00000988_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000987 ( + .C(clk), + .CE(\blk00000003/sig0000091e ), + .D(\blk00000003/sig00000a18 ), + .Q(\blk00000003/sig000007b6 ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000986 ( + .A0(\blk00000003/sig00000049 ), + .A1(\blk00000003/sig00000049 ), + .A2(\blk00000003/sig00000049 ), + .A3(\blk00000003/sig00000049 ), + .CE(\blk00000003/sig0000091e ), + .CLK(clk), + .D(\blk00000003/sig00000786 ), + .Q(\blk00000003/sig00000a18 ), + .Q15(\NLW_blk00000003/blk00000986_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000985 ( + .C(clk), + .CE(\blk00000003/sig0000091e ), + .D(\blk00000003/sig00000a17 ), + .Q(\blk00000003/sig000007b8 ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000984 ( + .A0(\blk00000003/sig00000049 ), + .A1(\blk00000003/sig00000049 ), + .A2(\blk00000003/sig00000049 ), + .A3(\blk00000003/sig00000049 ), + .CE(\blk00000003/sig0000091e ), + .CLK(clk), + .D(\blk00000003/sig00000788 ), + .Q(\blk00000003/sig00000a17 ), + .Q15(\NLW_blk00000003/blk00000984_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000983 ( + .C(clk), + .CE(\blk00000003/sig0000091e ), + .D(\blk00000003/sig00000a16 ), + .Q(\blk00000003/sig000007b4 ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000982 ( + .A0(\blk00000003/sig00000049 ), + .A1(\blk00000003/sig00000049 ), + .A2(\blk00000003/sig00000049 ), + .A3(\blk00000003/sig00000049 ), + .CE(\blk00000003/sig0000091e ), + .CLK(clk), + .D(\blk00000003/sig00000784 ), + .Q(\blk00000003/sig00000a16 ), + .Q15(\NLW_blk00000003/blk00000982_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000981 ( + .C(clk), + .CE(\blk00000003/sig0000091e ), + .D(\blk00000003/sig00000a15 ), + .Q(\blk00000003/sig000007b3 ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000980 ( + .A0(\blk00000003/sig00000049 ), + .A1(\blk00000003/sig00000049 ), + .A2(\blk00000003/sig00000049 ), + .A3(\blk00000003/sig00000049 ), + .CE(\blk00000003/sig0000091e ), + .CLK(clk), + .D(\blk00000003/sig00000783 ), + .Q(\blk00000003/sig00000a15 ), + .Q15(\NLW_blk00000003/blk00000980_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk0000097f ( + .C(clk), + .CE(\blk00000003/sig0000091e ), + .D(\blk00000003/sig00000a14 ), + .Q(\blk00000003/sig000007b5 ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk0000097e ( + .A0(\blk00000003/sig00000049 ), + .A1(\blk00000003/sig00000049 ), + .A2(\blk00000003/sig00000049 ), + .A3(\blk00000003/sig00000049 ), + .CE(\blk00000003/sig0000091e ), + .CLK(clk), + .D(\blk00000003/sig00000785 ), + .Q(\blk00000003/sig00000a14 ), + .Q15(\NLW_blk00000003/blk0000097e_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk0000097d ( + .C(clk), + .CE(\blk00000003/sig0000091e ), + .D(\blk00000003/sig00000a13 ), + .Q(\blk00000003/sig000007b2 ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk0000097c ( + .A0(\blk00000003/sig00000049 ), + .A1(\blk00000003/sig00000049 ), + .A2(\blk00000003/sig00000049 ), + .A3(\blk00000003/sig00000049 ), + .CE(\blk00000003/sig0000091e ), + .CLK(clk), + .D(\blk00000003/sig00000782 ), + .Q(\blk00000003/sig00000a13 ), + .Q15(\NLW_blk00000003/blk0000097c_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk0000097b ( + .C(clk), + .CE(\blk00000003/sig0000091e ), + .D(\blk00000003/sig00000a12 ), + .Q(\blk00000003/sig000007b1 ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk0000097a ( + .A0(\blk00000003/sig00000049 ), + .A1(\blk00000003/sig00000049 ), + .A2(\blk00000003/sig00000049 ), + .A3(\blk00000003/sig00000049 ), + .CE(\blk00000003/sig0000091e ), + .CLK(clk), + .D(\blk00000003/sig00000781 ), + .Q(\blk00000003/sig00000a12 ), + .Q15(\NLW_blk00000003/blk0000097a_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000979 ( + .C(clk), + .CE(\blk00000003/sig0000091e ), + .D(\blk00000003/sig00000a11 ), + .Q(\blk00000003/sig000007b0 ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000978 ( + .A0(\blk00000003/sig00000049 ), + .A1(\blk00000003/sig00000049 ), + .A2(\blk00000003/sig00000049 ), + .A3(\blk00000003/sig00000049 ), + .CE(\blk00000003/sig0000091e ), + .CLK(clk), + .D(\blk00000003/sig00000780 ), + .Q(\blk00000003/sig00000a11 ), + .Q15(\NLW_blk00000003/blk00000978_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000977 ( + .C(clk), + .CE(\blk00000003/sig0000091e ), + .D(\blk00000003/sig00000a10 ), + .Q(\blk00000003/sig000007af ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000976 ( + .A0(\blk00000003/sig00000049 ), + .A1(\blk00000003/sig00000049 ), + .A2(\blk00000003/sig00000049 ), + .A3(\blk00000003/sig00000049 ), + .CE(\blk00000003/sig0000091e ), + .CLK(clk), + .D(\blk00000003/sig0000077f ), + .Q(\blk00000003/sig00000a10 ), + .Q15(\NLW_blk00000003/blk00000976_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000975 ( + .C(clk), + .CE(\blk00000003/sig0000091e ), + .D(\blk00000003/sig00000a0f ), + .Q(\blk00000003/sig000007ad ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000974 ( + .A0(\blk00000003/sig00000049 ), + .A1(\blk00000003/sig00000049 ), + .A2(\blk00000003/sig00000049 ), + .A3(\blk00000003/sig00000049 ), + .CE(\blk00000003/sig0000091e ), + .CLK(clk), + .D(\blk00000003/sig0000077d ), + .Q(\blk00000003/sig00000a0f ), + .Q15(\NLW_blk00000003/blk00000974_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000973 ( + .C(clk), + .CE(\blk00000003/sig0000091e ), + .D(\blk00000003/sig00000a0e ), + .Q(\blk00000003/sig000007ac ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000972 ( + .A0(\blk00000003/sig00000049 ), + .A1(\blk00000003/sig00000049 ), + .A2(\blk00000003/sig00000049 ), + .A3(\blk00000003/sig00000049 ), + .CE(\blk00000003/sig0000091e ), + .CLK(clk), + .D(\blk00000003/sig0000077c ), + .Q(\blk00000003/sig00000a0e ), + .Q15(\NLW_blk00000003/blk00000972_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000971 ( + .C(clk), + .CE(\blk00000003/sig0000091e ), + .D(\blk00000003/sig00000a0d ), + .Q(\blk00000003/sig000007ae ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000970 ( + .A0(\blk00000003/sig00000049 ), + .A1(\blk00000003/sig00000049 ), + .A2(\blk00000003/sig00000049 ), + .A3(\blk00000003/sig00000049 ), + .CE(\blk00000003/sig0000091e ), + .CLK(clk), + .D(\blk00000003/sig0000077e ), + .Q(\blk00000003/sig00000a0d ), + .Q15(\NLW_blk00000003/blk00000970_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk0000096f ( + .C(clk), + .CE(\blk00000003/sig0000091e ), + .D(\blk00000003/sig00000a0c ), + .Q(\blk00000003/sig000007aa ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk0000096e ( + .A0(\blk00000003/sig00000049 ), + .A1(\blk00000003/sig00000049 ), + .A2(\blk00000003/sig00000049 ), + .A3(\blk00000003/sig00000049 ), + .CE(\blk00000003/sig0000091e ), + .CLK(clk), + .D(\blk00000003/sig0000077a ), + .Q(\blk00000003/sig00000a0c ), + .Q15(\NLW_blk00000003/blk0000096e_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk0000096d ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig00000a0b ), + .Q(\blk00000003/sig00000869 ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk0000096c ( + .A0(NlwRenamedSig_OI_rfd), + .A1(\blk00000003/sig00000049 ), + .A2(\blk00000003/sig00000049 ), + .A3(\blk00000003/sig00000049 ), + .CE(ce), + .CLK(clk), + .D(\blk00000003/sig00000219 ), + .Q(\blk00000003/sig00000a0b ), + .Q15(\NLW_blk00000003/blk0000096c_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk0000096b ( + .C(clk), + .CE(\blk00000003/sig0000091e ), + .D(\blk00000003/sig00000a0a ), + .Q(\blk00000003/sig000007ab ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk0000096a ( + .A0(\blk00000003/sig00000049 ), + .A1(\blk00000003/sig00000049 ), + .A2(\blk00000003/sig00000049 ), + .A3(\blk00000003/sig00000049 ), + .CE(\blk00000003/sig0000091e ), + .CLK(clk), + .D(\blk00000003/sig0000077b ), + .Q(\blk00000003/sig00000a0a ), + .Q15(\NLW_blk00000003/blk0000096a_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000969 ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig00000a09 ), + .Q(\blk00000003/sig00000867 ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000968 ( + .A0(NlwRenamedSig_OI_rfd), + .A1(\blk00000003/sig00000049 ), + .A2(\blk00000003/sig00000049 ), + .A3(\blk00000003/sig00000049 ), + .CE(ce), + .CLK(clk), + .D(\blk00000003/sig00000217 ), + .Q(\blk00000003/sig00000a09 ), + .Q15(\NLW_blk00000003/blk00000968_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000967 ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig00000a08 ), + .Q(\blk00000003/sig00000866 ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000966 ( + .A0(NlwRenamedSig_OI_rfd), + .A1(\blk00000003/sig00000049 ), + .A2(\blk00000003/sig00000049 ), + .A3(\blk00000003/sig00000049 ), + .CE(ce), + .CLK(clk), + .D(\blk00000003/sig00000216 ), + .Q(\blk00000003/sig00000a08 ), + .Q15(\NLW_blk00000003/blk00000966_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000965 ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig00000a07 ), + .Q(\blk00000003/sig00000868 ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000964 ( + .A0(NlwRenamedSig_OI_rfd), + .A1(\blk00000003/sig00000049 ), + .A2(\blk00000003/sig00000049 ), + .A3(\blk00000003/sig00000049 ), + .CE(ce), + .CLK(clk), + .D(\blk00000003/sig00000218 ), + .Q(\blk00000003/sig00000a07 ), + .Q15(\NLW_blk00000003/blk00000964_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000963 ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig00000a06 ), + .Q(\blk00000003/sig00000865 ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000962 ( + .A0(NlwRenamedSig_OI_rfd), + .A1(\blk00000003/sig00000049 ), + .A2(\blk00000003/sig00000049 ), + .A3(\blk00000003/sig00000049 ), + .CE(ce), + .CLK(clk), + .D(\blk00000003/sig00000215 ), + .Q(\blk00000003/sig00000a06 ), + .Q15(\NLW_blk00000003/blk00000962_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000961 ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig00000a05 ), + .Q(\blk00000003/sig00000864 ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000960 ( + .A0(NlwRenamedSig_OI_rfd), + .A1(\blk00000003/sig00000049 ), + .A2(\blk00000003/sig00000049 ), + .A3(\blk00000003/sig00000049 ), + .CE(ce), + .CLK(clk), + .D(\blk00000003/sig00000214 ), + .Q(\blk00000003/sig00000a05 ), + .Q15(\NLW_blk00000003/blk00000960_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk0000095f ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig00000a04 ), + .Q(\blk00000003/sig00000863 ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk0000095e ( + .A0(NlwRenamedSig_OI_rfd), + .A1(\blk00000003/sig00000049 ), + .A2(\blk00000003/sig00000049 ), + .A3(\blk00000003/sig00000049 ), + .CE(ce), + .CLK(clk), + .D(\blk00000003/sig00000213 ), + .Q(\blk00000003/sig00000a04 ), + .Q15(\NLW_blk00000003/blk0000095e_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk0000095d ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig00000a03 ), + .Q(\blk00000003/sig00000862 ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk0000095c ( + .A0(NlwRenamedSig_OI_rfd), + .A1(\blk00000003/sig00000049 ), + .A2(\blk00000003/sig00000049 ), + .A3(\blk00000003/sig00000049 ), + .CE(ce), + .CLK(clk), + .D(\blk00000003/sig00000212 ), + .Q(\blk00000003/sig00000a03 ), + .Q15(\NLW_blk00000003/blk0000095c_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk0000095b ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig00000a02 ), + .Q(\blk00000003/sig00000860 ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk0000095a ( + .A0(NlwRenamedSig_OI_rfd), + .A1(\blk00000003/sig00000049 ), + .A2(\blk00000003/sig00000049 ), + .A3(\blk00000003/sig00000049 ), + .CE(ce), + .CLK(clk), + .D(\blk00000003/sig00000210 ), + .Q(\blk00000003/sig00000a02 ), + .Q15(\NLW_blk00000003/blk0000095a_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000959 ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig00000a01 ), + .Q(\blk00000003/sig0000085f ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000958 ( + .A0(NlwRenamedSig_OI_rfd), + .A1(\blk00000003/sig00000049 ), + .A2(\blk00000003/sig00000049 ), + .A3(\blk00000003/sig00000049 ), + .CE(ce), + .CLK(clk), + .D(\blk00000003/sig0000020f ), + .Q(\blk00000003/sig00000a01 ), + .Q15(\NLW_blk00000003/blk00000958_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000957 ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig00000a00 ), + .Q(\blk00000003/sig00000861 ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000956 ( + .A0(NlwRenamedSig_OI_rfd), + .A1(\blk00000003/sig00000049 ), + .A2(\blk00000003/sig00000049 ), + .A3(\blk00000003/sig00000049 ), + .CE(ce), + .CLK(clk), + .D(\blk00000003/sig00000211 ), + .Q(\blk00000003/sig00000a00 ), + .Q15(\NLW_blk00000003/blk00000956_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000955 ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig000009ff ), + .Q(\blk00000003/sig0000085d ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000954 ( + .A0(NlwRenamedSig_OI_rfd), + .A1(\blk00000003/sig00000049 ), + .A2(\blk00000003/sig00000049 ), + .A3(\blk00000003/sig00000049 ), + .CE(ce), + .CLK(clk), + .D(\blk00000003/sig0000020d ), + .Q(\blk00000003/sig000009ff ), + .Q15(\NLW_blk00000003/blk00000954_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000953 ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig000009fe ), + .Q(\blk00000003/sig0000085c ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000952 ( + .A0(NlwRenamedSig_OI_rfd), + .A1(\blk00000003/sig00000049 ), + .A2(\blk00000003/sig00000049 ), + .A3(\blk00000003/sig00000049 ), + .CE(ce), + .CLK(clk), + .D(\blk00000003/sig0000020c ), + .Q(\blk00000003/sig000009fe ), + .Q15(\NLW_blk00000003/blk00000952_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000951 ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig000009fd ), + .Q(\blk00000003/sig0000085e ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000950 ( + .A0(NlwRenamedSig_OI_rfd), + .A1(\blk00000003/sig00000049 ), + .A2(\blk00000003/sig00000049 ), + .A3(\blk00000003/sig00000049 ), + .CE(ce), + .CLK(clk), + .D(\blk00000003/sig0000020e ), + .Q(\blk00000003/sig000009fd ), + .Q15(\NLW_blk00000003/blk00000950_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk0000094f ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig000009fc ), + .Q(\blk00000003/sig0000085a ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk0000094e ( + .A0(NlwRenamedSig_OI_rfd), + .A1(\blk00000003/sig00000049 ), + .A2(\blk00000003/sig00000049 ), + .A3(\blk00000003/sig00000049 ), + .CE(ce), + .CLK(clk), + .D(\blk00000003/sig0000020a ), + .Q(\blk00000003/sig000009fc ), + .Q15(\NLW_blk00000003/blk0000094e_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk0000094d ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig000009fb ), + .Q(\blk00000003/sig00000859 ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk0000094c ( + .A0(NlwRenamedSig_OI_rfd), + .A1(\blk00000003/sig00000049 ), + .A2(\blk00000003/sig00000049 ), + .A3(\blk00000003/sig00000049 ), + .CE(ce), + .CLK(clk), + .D(\blk00000003/sig00000209 ), + .Q(\blk00000003/sig000009fb ), + .Q15(\NLW_blk00000003/blk0000094c_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk0000094b ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig000009fa ), + .Q(\blk00000003/sig0000085b ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk0000094a ( + .A0(NlwRenamedSig_OI_rfd), + .A1(\blk00000003/sig00000049 ), + .A2(\blk00000003/sig00000049 ), + .A3(\blk00000003/sig00000049 ), + .CE(ce), + .CLK(clk), + .D(\blk00000003/sig0000020b ), + .Q(\blk00000003/sig000009fa ), + .Q15(\NLW_blk00000003/blk0000094a_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000949 ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig000009f9 ), + .Q(\blk00000003/sig00000858 ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000948 ( + .A0(NlwRenamedSig_OI_rfd), + .A1(\blk00000003/sig00000049 ), + .A2(\blk00000003/sig00000049 ), + .A3(\blk00000003/sig00000049 ), + .CE(ce), + .CLK(clk), + .D(\blk00000003/sig00000208 ), + .Q(\blk00000003/sig000009f9 ), + .Q15(\NLW_blk00000003/blk00000948_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000947 ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig000009f8 ), + .Q(\blk00000003/sig00000857 ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000946 ( + .A0(NlwRenamedSig_OI_rfd), + .A1(\blk00000003/sig00000049 ), + .A2(\blk00000003/sig00000049 ), + .A3(\blk00000003/sig00000049 ), + .CE(ce), + .CLK(clk), + .D(\blk00000003/sig00000207 ), + .Q(\blk00000003/sig000009f8 ), + .Q15(\NLW_blk00000003/blk00000946_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000945 ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig000009f7 ), + .Q(\blk00000003/sig00000856 ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000944 ( + .A0(NlwRenamedSig_OI_rfd), + .A1(\blk00000003/sig00000049 ), + .A2(\blk00000003/sig00000049 ), + .A3(\blk00000003/sig00000049 ), + .CE(ce), + .CLK(clk), + .D(\blk00000003/sig00000206 ), + .Q(\blk00000003/sig000009f7 ), + .Q15(\NLW_blk00000003/blk00000944_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000943 ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig000009f6 ), + .Q(\blk00000003/sig00000855 ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000942 ( + .A0(NlwRenamedSig_OI_rfd), + .A1(\blk00000003/sig00000049 ), + .A2(\blk00000003/sig00000049 ), + .A3(\blk00000003/sig00000049 ), + .CE(ce), + .CLK(clk), + .D(\blk00000003/sig00000205 ), + .Q(\blk00000003/sig000009f6 ), + .Q15(\NLW_blk00000003/blk00000942_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000941 ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig000009f5 ), + .Q(\blk00000003/sig00000853 ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000940 ( + .A0(NlwRenamedSig_OI_rfd), + .A1(\blk00000003/sig00000049 ), + .A2(\blk00000003/sig00000049 ), + .A3(\blk00000003/sig00000049 ), + .CE(ce), + .CLK(clk), + .D(\blk00000003/sig00000203 ), + .Q(\blk00000003/sig000009f5 ), + .Q15(\NLW_blk00000003/blk00000940_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk0000093f ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig000009f4 ), + .Q(\blk00000003/sig00000852 ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk0000093e ( + .A0(NlwRenamedSig_OI_rfd), + .A1(\blk00000003/sig00000049 ), + .A2(\blk00000003/sig00000049 ), + .A3(\blk00000003/sig00000049 ), + .CE(ce), + .CLK(clk), + .D(\blk00000003/sig00000202 ), + .Q(\blk00000003/sig000009f4 ), + .Q15(\NLW_blk00000003/blk0000093e_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk0000093d ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig000009f3 ), + .Q(\blk00000003/sig00000854 ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk0000093c ( + .A0(NlwRenamedSig_OI_rfd), + .A1(\blk00000003/sig00000049 ), + .A2(\blk00000003/sig00000049 ), + .A3(\blk00000003/sig00000049 ), + .CE(ce), + .CLK(clk), + .D(\blk00000003/sig00000204 ), + .Q(\blk00000003/sig000009f3 ), + .Q15(\NLW_blk00000003/blk0000093c_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk0000093b ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig000009f2 ), + .Q(\blk00000003/sig00000898 ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk0000093a ( + .A0(NlwRenamedSig_OI_rfd), + .A1(\blk00000003/sig00000049 ), + .A2(\blk00000003/sig00000049 ), + .A3(\blk00000003/sig00000049 ), + .CE(ce), + .CLK(clk), + .D(\blk00000003/sig00000200 ), + .Q(\blk00000003/sig000009f2 ), + .Q15(\NLW_blk00000003/blk0000093a_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000939 ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig000009f1 ), + .Q(\blk00000003/sig00000897 ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000938 ( + .A0(NlwRenamedSig_OI_rfd), + .A1(\blk00000003/sig00000049 ), + .A2(\blk00000003/sig00000049 ), + .A3(\blk00000003/sig00000049 ), + .CE(ce), + .CLK(clk), + .D(\blk00000003/sig000001ff ), + .Q(\blk00000003/sig000009f1 ), + .Q15(\NLW_blk00000003/blk00000938_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000937 ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig000009f0 ), + .Q(\blk00000003/sig00000899 ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000936 ( + .A0(NlwRenamedSig_OI_rfd), + .A1(\blk00000003/sig00000049 ), + .A2(\blk00000003/sig00000049 ), + .A3(\blk00000003/sig00000049 ), + .CE(ce), + .CLK(clk), + .D(\blk00000003/sig00000201 ), + .Q(\blk00000003/sig000009f0 ), + .Q15(\NLW_blk00000003/blk00000936_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000935 ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig000009ef ), + .Q(\blk00000003/sig00000895 ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000934 ( + .A0(NlwRenamedSig_OI_rfd), + .A1(\blk00000003/sig00000049 ), + .A2(\blk00000003/sig00000049 ), + .A3(\blk00000003/sig00000049 ), + .CE(ce), + .CLK(clk), + .D(\blk00000003/sig000001fd ), + .Q(\blk00000003/sig000009ef ), + .Q15(\NLW_blk00000003/blk00000934_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000933 ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig000009ee ), + .Q(\blk00000003/sig00000894 ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000932 ( + .A0(NlwRenamedSig_OI_rfd), + .A1(\blk00000003/sig00000049 ), + .A2(\blk00000003/sig00000049 ), + .A3(\blk00000003/sig00000049 ), + .CE(ce), + .CLK(clk), + .D(\blk00000003/sig000001fc ), + .Q(\blk00000003/sig000009ee ), + .Q15(\NLW_blk00000003/blk00000932_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000931 ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig000009ed ), + .Q(\blk00000003/sig00000896 ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000930 ( + .A0(NlwRenamedSig_OI_rfd), + .A1(\blk00000003/sig00000049 ), + .A2(\blk00000003/sig00000049 ), + .A3(\blk00000003/sig00000049 ), + .CE(ce), + .CLK(clk), + .D(\blk00000003/sig000001fe ), + .Q(\blk00000003/sig000009ed ), + .Q15(\NLW_blk00000003/blk00000930_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk0000092f ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig000009ec ), + .Q(\blk00000003/sig00000893 ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk0000092e ( + .A0(NlwRenamedSig_OI_rfd), + .A1(\blk00000003/sig00000049 ), + .A2(\blk00000003/sig00000049 ), + .A3(\blk00000003/sig00000049 ), + .CE(ce), + .CLK(clk), + .D(\blk00000003/sig000001fb ), + .Q(\blk00000003/sig000009ec ), + .Q15(\NLW_blk00000003/blk0000092e_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk0000092d ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig000009eb ), + .Q(\blk00000003/sig00000892 ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk0000092c ( + .A0(NlwRenamedSig_OI_rfd), + .A1(\blk00000003/sig00000049 ), + .A2(\blk00000003/sig00000049 ), + .A3(\blk00000003/sig00000049 ), + .CE(ce), + .CLK(clk), + .D(\blk00000003/sig000001fa ), + .Q(\blk00000003/sig000009eb ), + .Q15(\NLW_blk00000003/blk0000092c_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk0000092b ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig000009ea ), + .Q(\blk00000003/sig00000891 ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk0000092a ( + .A0(NlwRenamedSig_OI_rfd), + .A1(\blk00000003/sig00000049 ), + .A2(\blk00000003/sig00000049 ), + .A3(\blk00000003/sig00000049 ), + .CE(ce), + .CLK(clk), + .D(\blk00000003/sig000001f9 ), + .Q(\blk00000003/sig000009ea ), + .Q15(\NLW_blk00000003/blk0000092a_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000929 ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig000009e9 ), + .Q(\blk00000003/sig00000890 ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000928 ( + .A0(NlwRenamedSig_OI_rfd), + .A1(\blk00000003/sig00000049 ), + .A2(\blk00000003/sig00000049 ), + .A3(\blk00000003/sig00000049 ), + .CE(ce), + .CLK(clk), + .D(\blk00000003/sig000001f8 ), + .Q(\blk00000003/sig000009e9 ), + .Q15(\NLW_blk00000003/blk00000928_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000927 ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig000009e8 ), + .Q(\blk00000003/sig0000088e ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000926 ( + .A0(NlwRenamedSig_OI_rfd), + .A1(\blk00000003/sig00000049 ), + .A2(\blk00000003/sig00000049 ), + .A3(\blk00000003/sig00000049 ), + .CE(ce), + .CLK(clk), + .D(\blk00000003/sig000001f6 ), + .Q(\blk00000003/sig000009e8 ), + .Q15(\NLW_blk00000003/blk00000926_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000925 ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig000009e7 ), + .Q(\blk00000003/sig0000088d ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000924 ( + .A0(NlwRenamedSig_OI_rfd), + .A1(\blk00000003/sig00000049 ), + .A2(\blk00000003/sig00000049 ), + .A3(\blk00000003/sig00000049 ), + .CE(ce), + .CLK(clk), + .D(\blk00000003/sig000001f5 ), + .Q(\blk00000003/sig000009e7 ), + .Q15(\NLW_blk00000003/blk00000924_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000923 ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig000009e6 ), + .Q(\blk00000003/sig0000088f ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000922 ( + .A0(NlwRenamedSig_OI_rfd), + .A1(\blk00000003/sig00000049 ), + .A2(\blk00000003/sig00000049 ), + .A3(\blk00000003/sig00000049 ), + .CE(ce), + .CLK(clk), + .D(\blk00000003/sig000001f7 ), + .Q(\blk00000003/sig000009e6 ), + .Q15(\NLW_blk00000003/blk00000922_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000921 ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig000009e5 ), + .Q(\blk00000003/sig0000088b ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000920 ( + .A0(NlwRenamedSig_OI_rfd), + .A1(\blk00000003/sig00000049 ), + .A2(\blk00000003/sig00000049 ), + .A3(\blk00000003/sig00000049 ), + .CE(ce), + .CLK(clk), + .D(\blk00000003/sig000001f3 ), + .Q(\blk00000003/sig000009e5 ), + .Q15(\NLW_blk00000003/blk00000920_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk0000091f ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig000009e4 ), + .Q(\blk00000003/sig0000088a ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk0000091e ( + .A0(NlwRenamedSig_OI_rfd), + .A1(\blk00000003/sig00000049 ), + .A2(\blk00000003/sig00000049 ), + .A3(\blk00000003/sig00000049 ), + .CE(ce), + .CLK(clk), + .D(\blk00000003/sig000001f2 ), + .Q(\blk00000003/sig000009e4 ), + .Q15(\NLW_blk00000003/blk0000091e_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk0000091d ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig000009e3 ), + .Q(\blk00000003/sig0000088c ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk0000091c ( + .A0(NlwRenamedSig_OI_rfd), + .A1(\blk00000003/sig00000049 ), + .A2(\blk00000003/sig00000049 ), + .A3(\blk00000003/sig00000049 ), + .CE(ce), + .CLK(clk), + .D(\blk00000003/sig000001f4 ), + .Q(\blk00000003/sig000009e3 ), + .Q15(\NLW_blk00000003/blk0000091c_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk0000091b ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig000009e2 ), + .Q(\blk00000003/sig00000888 ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk0000091a ( + .A0(NlwRenamedSig_OI_rfd), + .A1(\blk00000003/sig00000049 ), + .A2(\blk00000003/sig00000049 ), + .A3(\blk00000003/sig00000049 ), + .CE(ce), + .CLK(clk), + .D(\blk00000003/sig000001f0 ), + .Q(\blk00000003/sig000009e2 ), + .Q15(\NLW_blk00000003/blk0000091a_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000919 ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig000009e1 ), + .Q(\blk00000003/sig00000887 ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000918 ( + .A0(NlwRenamedSig_OI_rfd), + .A1(\blk00000003/sig00000049 ), + .A2(\blk00000003/sig00000049 ), + .A3(\blk00000003/sig00000049 ), + .CE(ce), + .CLK(clk), + .D(\blk00000003/sig000001ef ), + .Q(\blk00000003/sig000009e1 ), + .Q15(\NLW_blk00000003/blk00000918_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000917 ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig000009e0 ), + .Q(\blk00000003/sig00000889 ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000916 ( + .A0(NlwRenamedSig_OI_rfd), + .A1(\blk00000003/sig00000049 ), + .A2(\blk00000003/sig00000049 ), + .A3(\blk00000003/sig00000049 ), + .CE(ce), + .CLK(clk), + .D(\blk00000003/sig000001f1 ), + .Q(\blk00000003/sig000009e0 ), + .Q15(\NLW_blk00000003/blk00000916_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000915 ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig000009df ), + .Q(\blk00000003/sig00000886 ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000914 ( + .A0(NlwRenamedSig_OI_rfd), + .A1(\blk00000003/sig00000049 ), + .A2(\blk00000003/sig00000049 ), + .A3(\blk00000003/sig00000049 ), + .CE(ce), + .CLK(clk), + .D(\blk00000003/sig000001ee ), + .Q(\blk00000003/sig000009df ), + .Q15(\NLW_blk00000003/blk00000914_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000913 ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig000009de ), + .Q(\blk00000003/sig00000885 ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000912 ( + .A0(NlwRenamedSig_OI_rfd), + .A1(\blk00000003/sig00000049 ), + .A2(\blk00000003/sig00000049 ), + .A3(\blk00000003/sig00000049 ), + .CE(ce), + .CLK(clk), + .D(\blk00000003/sig000001ed ), + .Q(\blk00000003/sig000009de ), + .Q15(\NLW_blk00000003/blk00000912_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000911 ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig000009dd ), + .Q(\blk00000003/sig00000884 ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000910 ( + .A0(NlwRenamedSig_OI_rfd), + .A1(\blk00000003/sig00000049 ), + .A2(\blk00000003/sig00000049 ), + .A3(\blk00000003/sig00000049 ), + .CE(ce), + .CLK(clk), + .D(\blk00000003/sig000001ec ), + .Q(\blk00000003/sig000009dd ), + .Q15(\NLW_blk00000003/blk00000910_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk0000090f ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig000009dc ), + .Q(\blk00000003/sig00000883 ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk0000090e ( + .A0(NlwRenamedSig_OI_rfd), + .A1(\blk00000003/sig00000049 ), + .A2(\blk00000003/sig00000049 ), + .A3(\blk00000003/sig00000049 ), + .CE(ce), + .CLK(clk), + .D(\blk00000003/sig000001eb ), + .Q(\blk00000003/sig000009dc ), + .Q15(\NLW_blk00000003/blk0000090e_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk0000090d ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig000009db ), + .Q(\blk00000003/sig000002a3 ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk0000090c ( + .A0(NlwRenamedSig_OI_rfd), + .A1(NlwRenamedSig_OI_rfd), + .A2(\blk00000003/sig00000049 ), + .A3(\blk00000003/sig00000049 ), + .CE(ce), + .CLK(clk), + .D(\blk00000003/sig000001d5 ), + .Q(\blk00000003/sig000009db ), + .Q15(\NLW_blk00000003/blk0000090c_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk0000090b ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig000009da ), + .Q(\blk00000003/sig000002a4 ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk0000090a ( + .A0(\blk00000003/sig00000049 ), + .A1(NlwRenamedSig_OI_rfd), + .A2(\blk00000003/sig00000049 ), + .A3(\blk00000003/sig00000049 ), + .CE(ce), + .CLK(clk), + .D(\blk00000003/sig0000029e ), + .Q(\blk00000003/sig000009da ), + .Q15(\NLW_blk00000003/blk0000090a_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000909 ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig000009d9 ), + .Q(\blk00000003/sig00000882 ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000908 ( + .A0(NlwRenamedSig_OI_rfd), + .A1(\blk00000003/sig00000049 ), + .A2(\blk00000003/sig00000049 ), + .A3(\blk00000003/sig00000049 ), + .CE(ce), + .CLK(clk), + .D(\blk00000003/sig000001ea ), + .Q(\blk00000003/sig000009d9 ), + .Q15(\NLW_blk00000003/blk00000908_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000907 ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig000009d8 ), + .Q(\blk00000003/sig000008c3 ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000906 ( + .A0(\blk00000003/sig00000049 ), + .A1(\blk00000003/sig00000049 ), + .A2(\blk00000003/sig00000049 ), + .A3(\blk00000003/sig00000049 ), + .CE(ce), + .CLK(clk), + .D(coef_din_0[0]), + .Q(\blk00000003/sig000009d8 ), + .Q15(\NLW_blk00000003/blk00000906_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000905 ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig000009d7 ), + .Q(\blk00000003/sig000008c2 ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000904 ( + .A0(\blk00000003/sig00000049 ), + .A1(\blk00000003/sig00000049 ), + .A2(\blk00000003/sig00000049 ), + .A3(\blk00000003/sig00000049 ), + .CE(ce), + .CLK(clk), + .D(coef_din_0[1]), + .Q(\blk00000003/sig000009d7 ), + .Q15(\NLW_blk00000003/blk00000904_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000903 ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig000009d6 ), + .Q(\blk00000003/sig000009b2 ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000902 ( + .A0(\blk00000003/sig00000049 ), + .A1(NlwRenamedSig_OI_rfd), + .A2(\blk00000003/sig00000049 ), + .A3(\blk00000003/sig00000049 ), + .CE(ce), + .CLK(clk), + .D(\blk00000003/sig000001d1 ), + .Q(\blk00000003/sig000009d6 ), + .Q15(\NLW_blk00000003/blk00000902_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000901 ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig000009d5 ), + .Q(\blk00000003/sig000008c0 ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000900 ( + .A0(\blk00000003/sig00000049 ), + .A1(\blk00000003/sig00000049 ), + .A2(\blk00000003/sig00000049 ), + .A3(\blk00000003/sig00000049 ), + .CE(ce), + .CLK(clk), + .D(coef_din_0[3]), + .Q(\blk00000003/sig000009d5 ), + .Q15(\NLW_blk00000003/blk00000900_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000008ff ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig000009d4 ), + .Q(\blk00000003/sig000008bf ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk000008fe ( + .A0(\blk00000003/sig00000049 ), + .A1(\blk00000003/sig00000049 ), + .A2(\blk00000003/sig00000049 ), + .A3(\blk00000003/sig00000049 ), + .CE(ce), + .CLK(clk), + .D(coef_din_0[4]), + .Q(\blk00000003/sig000009d4 ), + .Q15(\NLW_blk00000003/blk000008fe_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000008fd ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig000009d3 ), + .Q(\blk00000003/sig000008c1 ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk000008fc ( + .A0(\blk00000003/sig00000049 ), + .A1(\blk00000003/sig00000049 ), + .A2(\blk00000003/sig00000049 ), + .A3(\blk00000003/sig00000049 ), + .CE(ce), + .CLK(clk), + .D(coef_din_0[2]), + .Q(\blk00000003/sig000009d3 ), + .Q15(\NLW_blk00000003/blk000008fc_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000008fb ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig000009d2 ), + .Q(\blk00000003/sig000008be ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk000008fa ( + .A0(\blk00000003/sig00000049 ), + .A1(\blk00000003/sig00000049 ), + .A2(\blk00000003/sig00000049 ), + .A3(\blk00000003/sig00000049 ), + .CE(ce), + .CLK(clk), + .D(coef_din_0[5]), + .Q(\blk00000003/sig000009d2 ), + .Q15(\NLW_blk00000003/blk000008fa_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000008f9 ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig000009d1 ), + .Q(\blk00000003/sig000008bd ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk000008f8 ( + .A0(\blk00000003/sig00000049 ), + .A1(\blk00000003/sig00000049 ), + .A2(\blk00000003/sig00000049 ), + .A3(\blk00000003/sig00000049 ), + .CE(ce), + .CLK(clk), + .D(coef_din_0[6]), + .Q(\blk00000003/sig000009d1 ), + .Q15(\NLW_blk00000003/blk000008f8_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000008f7 ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig000009d0 ), + .Q(\blk00000003/sig000008bc ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk000008f6 ( + .A0(\blk00000003/sig00000049 ), + .A1(\blk00000003/sig00000049 ), + .A2(\blk00000003/sig00000049 ), + .A3(\blk00000003/sig00000049 ), + .CE(ce), + .CLK(clk), + .D(coef_din_0[7]), + .Q(\blk00000003/sig000009d0 ), + .Q15(\NLW_blk00000003/blk000008f6_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000008f5 ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig000009cf ), + .Q(\blk00000003/sig000008bb ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk000008f4 ( + .A0(\blk00000003/sig00000049 ), + .A1(\blk00000003/sig00000049 ), + .A2(\blk00000003/sig00000049 ), + .A3(\blk00000003/sig00000049 ), + .CE(ce), + .CLK(clk), + .D(coef_din_0[8]), + .Q(\blk00000003/sig000009cf ), + .Q15(\NLW_blk00000003/blk000008f4_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000008f3 ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig000009ce ), + .Q(\blk00000003/sig000008b9 ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk000008f2 ( + .A0(\blk00000003/sig00000049 ), + .A1(\blk00000003/sig00000049 ), + .A2(\blk00000003/sig00000049 ), + .A3(\blk00000003/sig00000049 ), + .CE(ce), + .CLK(clk), + .D(coef_din_0[10]), + .Q(\blk00000003/sig000009ce ), + .Q15(\NLW_blk00000003/blk000008f2_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000008f1 ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig000009cd ), + .Q(\blk00000003/sig000008b8 ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk000008f0 ( + .A0(\blk00000003/sig00000049 ), + .A1(\blk00000003/sig00000049 ), + .A2(\blk00000003/sig00000049 ), + .A3(\blk00000003/sig00000049 ), + .CE(ce), + .CLK(clk), + .D(coef_din_0[11]), + .Q(\blk00000003/sig000009cd ), + .Q15(\NLW_blk00000003/blk000008f0_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000008ef ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig000009cc ), + .Q(\blk00000003/sig000008ba ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk000008ee ( + .A0(\blk00000003/sig00000049 ), + .A1(\blk00000003/sig00000049 ), + .A2(\blk00000003/sig00000049 ), + .A3(\blk00000003/sig00000049 ), + .CE(ce), + .CLK(clk), + .D(coef_din_0[9]), + .Q(\blk00000003/sig000009cc ), + .Q15(\NLW_blk00000003/blk000008ee_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000008ed ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig000009cb ), + .Q(\blk00000003/sig000008b6 ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk000008ec ( + .A0(\blk00000003/sig00000049 ), + .A1(\blk00000003/sig00000049 ), + .A2(\blk00000003/sig00000049 ), + .A3(\blk00000003/sig00000049 ), + .CE(ce), + .CLK(clk), + .D(coef_din_0[13]), + .Q(\blk00000003/sig000009cb ), + .Q15(\NLW_blk00000003/blk000008ec_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000008eb ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig000009ca ), + .Q(\blk00000003/sig000008b5 ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk000008ea ( + .A0(\blk00000003/sig00000049 ), + .A1(\blk00000003/sig00000049 ), + .A2(\blk00000003/sig00000049 ), + .A3(\blk00000003/sig00000049 ), + .CE(ce), + .CLK(clk), + .D(coef_din_0[14]), + .Q(\blk00000003/sig000009ca ), + .Q15(\NLW_blk00000003/blk000008ea_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000008e9 ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig000009c9 ), + .Q(\blk00000003/sig000008b7 ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk000008e8 ( + .A0(\blk00000003/sig00000049 ), + .A1(\blk00000003/sig00000049 ), + .A2(\blk00000003/sig00000049 ), + .A3(\blk00000003/sig00000049 ), + .CE(ce), + .CLK(clk), + .D(coef_din_0[12]), + .Q(\blk00000003/sig000009c9 ), + .Q15(\NLW_blk00000003/blk000008e8_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000008e7 ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig000009c8 ), + .Q(\blk00000003/sig000008b3 ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk000008e6 ( + .A0(\blk00000003/sig00000049 ), + .A1(\blk00000003/sig00000049 ), + .A2(\blk00000003/sig00000049 ), + .A3(\blk00000003/sig00000049 ), + .CE(ce), + .CLK(clk), + .D(coef_din_0[16]), + .Q(\blk00000003/sig000009c8 ), + .Q15(\NLW_blk00000003/blk000008e6_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000008e5 ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig000009c7 ), + .Q(\blk00000003/sig000008b2 ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk000008e4 ( + .A0(\blk00000003/sig00000049 ), + .A1(\blk00000003/sig00000049 ), + .A2(\blk00000003/sig00000049 ), + .A3(\blk00000003/sig00000049 ), + .CE(ce), + .CLK(clk), + .D(coef_din_0[17]), + .Q(\blk00000003/sig000009c7 ), + .Q15(\NLW_blk00000003/blk000008e4_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000008e3 ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig000009c6 ), + .Q(\blk00000003/sig000008b4 ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk000008e2 ( + .A0(\blk00000003/sig00000049 ), + .A1(\blk00000003/sig00000049 ), + .A2(\blk00000003/sig00000049 ), + .A3(\blk00000003/sig00000049 ), + .CE(ce), + .CLK(clk), + .D(coef_din_0[15]), + .Q(\blk00000003/sig000009c6 ), + .Q15(\NLW_blk00000003/blk000008e2_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000008e1 ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig000009c5 ), + .Q(\blk00000003/sig000001de ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk000008e0 ( + .A0(NlwRenamedSig_OI_rfd), + .A1(\blk00000003/sig00000049 ), + .A2(\blk00000003/sig00000049 ), + .A3(\blk00000003/sig00000049 ), + .CE(ce), + .CLK(clk), + .D(\blk00000003/sig000001e0 ), + .Q(\blk00000003/sig000009c5 ), + .Q15(\NLW_blk00000003/blk000008e0_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000008df ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig000009c4 ), + .Q(\blk00000003/sig00000760 ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk000008de ( + .A0(\blk00000003/sig00000049 ), + .A1(\blk00000003/sig00000049 ), + .A2(NlwRenamedSig_OI_rfd), + .A3(\blk00000003/sig00000049 ), + .CE(ce), + .CLK(clk), + .D(\blk00000003/sig000001d7 ), + .Q(\blk00000003/sig000009c4 ), + .Q15(\NLW_blk00000003/blk000008de_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000008dd ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig000009c3 ), + .Q(\blk00000003/sig0000091f ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk000008dc ( + .A0(NlwRenamedSig_OI_rfd), + .A1(NlwRenamedSig_OI_rfd), + .A2(\blk00000003/sig00000049 ), + .A3(\blk00000003/sig00000049 ), + .CE(ce), + .CLK(clk), + .D(\blk00000003/sig000001cf ), + .Q(\blk00000003/sig000009c3 ), + .Q15(\NLW_blk00000003/blk000008dc_Q15_UNCONNECTED ) + ); + INV \blk00000003/blk000008db ( + .I(\blk00000003/sig00000243 ), + .O(\blk00000003/sig00000275 ) + ); + INV \blk00000003/blk000008da ( + .I(\blk00000003/sig00000223 ), + .O(\blk00000003/sig00000232 ) + ); + INV \blk00000003/blk000008d9 ( + .I(\blk00000003/sig0000027e ), + .O(\blk00000003/sig0000026e ) + ); + INV \blk00000003/blk000008d8 ( + .I(\blk00000003/sig000001cf ), + .O(\blk00000003/sig00000283 ) + ); + INV \blk00000003/blk000008d7 ( + .I(\blk00000003/sig00000285 ), + .O(\blk00000003/sig00000274 ) + ); + INV \blk00000003/blk000008d6 ( + .I(\blk00000003/sig00000931 ), + .O(\blk00000003/sig000009ab ) + ); + INV \blk00000003/blk000008d5 ( + .I(\blk00000003/sig00000247 ), + .O(\blk00000003/sig00000286 ) + ); + INV \blk00000003/blk000008d4 ( + .I(\blk00000003/sig00000243 ), + .O(\blk00000003/sig0000026f ) + ); + INV \blk00000003/blk000008d3 ( + .I(\blk00000003/sig0000021d ), + .O(\blk00000003/sig00000248 ) + ); + INV \blk00000003/blk000008d2 ( + .I(\blk00000003/sig00000223 ), + .O(\blk00000003/sig00000231 ) + ); + INV \blk00000003/blk000008d1 ( + .I(\blk00000003/sig000001cd ), + .O(\blk00000003/sig000000c1 ) + ); + INV \blk00000003/blk000008d0 ( + .I(\blk00000003/sig000000b4 ), + .O(\blk00000003/sig000001cb ) + ); + INV \blk00000003/blk000008cf ( + .I(\blk00000003/sig000000be ), + .O(\blk00000003/sig000000bf ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000008ce ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig00000937 ), + .Q(\blk00000003/sig000009b0 ) + ); + LUT3 #( + .INIT ( 8'h20 )) + \blk00000003/blk000008cd ( + .I0(\blk00000003/sig00000239 ), + .I1(\blk00000003/sig00000250 ), + .I2(coef_ld), + .O(\blk00000003/sig0000024c ) + ); + LUT5 #( + .INIT ( 32'h4F444444 )) + \blk00000003/blk000008cc ( + .I0(\blk00000003/sig0000024d ), + .I1(\blk00000003/sig00000241 ), + .I2(\blk00000003/sig00000250 ), + .I3(coef_ld), + .I4(\blk00000003/sig00000239 ), + .O(\blk00000003/sig00000244 ) + ); + LUT4 #( + .INIT ( 16'h1000 )) + \blk00000003/blk000008cb ( + .I0(coef_ld), + .I1(\blk00000003/sig0000023b ), + .I2(coef_we), + .I3(\blk00000003/sig00000239 ), + .O(\blk00000003/sig0000024b ) + ); + LUT4 #( + .INIT ( 16'hEAAA )) + \blk00000003/blk000008ca ( + .I0(\blk00000003/sig0000025b ), + .I1(\blk00000003/sig00000227 ), + .I2(coef_we), + .I3(\blk00000003/sig0000022f ), + .O(\blk00000003/sig00000255 ) + ); + LUT5 #( + .INIT ( 32'h20AA2020 )) + \blk00000003/blk000008c9 ( + .I0(\blk00000003/sig00000239 ), + .I1(\blk00000003/sig0000023b ), + .I2(coef_we), + .I3(\blk00000003/sig00000250 ), + .I4(coef_ld), + .O(\blk00000003/sig0000024a ) + ); + LUT3 #( + .INIT ( 8'hF4 )) + \blk00000003/blk000008c8 ( + .I0(ce), + .I1(sclr), + .I2(\blk00000003/sig000009b3 ), + .O(\blk00000003/sig000009ba ) + ); + LUT4 #( + .INIT ( 16'hEA2A )) + \blk00000003/blk000008c7 ( + .I0(\blk00000003/sig0000027e ), + .I1(ce), + .I2(\blk00000003/sig00000241 ), + .I3(\blk00000003/sig0000021b ), + .O(\blk00000003/sig000009c2 ) + ); + LUT4 #( + .INIT ( 16'hEA2A )) + \blk00000003/blk000008c6 ( + .I0(\blk00000003/sig00000285 ), + .I1(ce), + .I2(\blk00000003/sig0000023f ), + .I3(\blk00000003/sig00000276 ), + .O(\blk00000003/sig000009c1 ) + ); + LUT4 #( + .INIT ( 16'hEA2A )) + \blk00000003/blk000008c5 ( + .I0(\blk00000003/sig000009af ), + .I1(ce), + .I2(\blk00000003/sig000001d5 ), + .I3(\blk00000003/sig000001d7 ), + .O(\blk00000003/sig000009bc ) + ); + LUT3 #( + .INIT ( 8'hF4 )) + \blk00000003/blk000008c4 ( + .I0(ce), + .I1(\blk00000003/sig00000250 ), + .I2(\blk00000003/sig000009b1 ), + .O(\blk00000003/sig000009b9 ) + ); + LUT5 #( + .INIT ( 32'h6AAAAAAA )) + \blk00000003/blk000008c3 ( + .I0(\blk00000003/sig000001e7 ), + .I1(\blk00000003/sig000009ae ), + .I2(\blk00000003/sig000000ad ), + .I3(ce), + .I4(nd), + .O(\blk00000003/sig000009c0 ) + ); + LUT4 #( + .INIT ( 16'h6AAA )) + \blk00000003/blk000008c2 ( + .I0(\blk00000003/sig000001e2 ), + .I1(\blk00000003/sig000001d7 ), + .I2(\blk00000003/sig000009be ), + .I3(ce), + .O(\blk00000003/sig000009bf ) + ); + LUT3 #( + .INIT ( 8'h6C )) + \blk00000003/blk000008c1 ( + .I0(\blk00000003/sig000001d7 ), + .I1(\blk00000003/sig000009be ), + .I2(ce), + .O(\blk00000003/sig000009bd ) + ); + LUT4 #( + .INIT ( 16'h6AAA )) + \blk00000003/blk000008c0 ( + .I0(\blk00000003/sig000009ae ), + .I1(\blk00000003/sig000000ad ), + .I2(ce), + .I3(nd), + .O(\blk00000003/sig000009bb ) + ); + LUT4 #( + .INIT ( 16'hECCC )) + \blk00000003/blk000008bf ( + .I0(coef_we), + .I1(\blk00000003/sig0000025c ), + .I2(\blk00000003/sig00000227 ), + .I3(\blk00000003/sig0000022f ), + .O(\blk00000003/sig00000258 ) + ); + FD #( + .INIT ( 1'b1 )) + \blk00000003/blk000008be ( + .C(clk), + .D(\blk00000003/sig000009c2 ), + .Q(\blk00000003/sig0000027e ) + ); + FD #( + .INIT ( 1'b1 )) + \blk00000003/blk000008bd ( + .C(clk), + .D(\blk00000003/sig000009c1 ), + .Q(\blk00000003/sig00000285 ) + ); + FDR #( + .INIT ( 1'b0 )) + \blk00000003/blk000008bc ( + .C(clk), + .D(\blk00000003/sig000009c0 ), + .R(sclr), + .Q(\blk00000003/sig000001e7 ) + ); + FDR #( + .INIT ( 1'b0 )) + \blk00000003/blk000008bb ( + .C(clk), + .D(\blk00000003/sig000009bf ), + .R(sclr), + .Q(\blk00000003/sig000001e2 ) + ); + FDR #( + .INIT ( 1'b0 )) + \blk00000003/blk000008ba ( + .C(clk), + .D(\blk00000003/sig000009bd ), + .R(sclr), + .Q(\blk00000003/sig000009be ) + ); + FDR #( + .INIT ( 1'b0 )) + \blk00000003/blk000008b9 ( + .C(clk), + .D(\blk00000003/sig000009bc ), + .R(sclr), + .Q(\blk00000003/sig000009af ) + ); + FDR #( + .INIT ( 1'b0 )) + \blk00000003/blk000008b8 ( + .C(clk), + .D(\blk00000003/sig000009bb ), + .R(sclr), + .Q(\blk00000003/sig000009ae ) + ); + LUT1 #( + .INIT ( 2'h2 )) + \blk00000003/blk000008b7 ( + .I0(\blk00000003/sig00000935 ), + .O(\blk00000003/sig0000092f ) + ); + LUT1 #( + .INIT ( 2'h2 )) + \blk00000003/blk000008b6 ( + .I0(\blk00000003/sig00000934 ), + .O(\blk00000003/sig0000092c ) + ); + LUT1 #( + .INIT ( 2'h2 )) + \blk00000003/blk000008b5 ( + .I0(\blk00000003/sig00000933 ), + .O(\blk00000003/sig00000929 ) + ); + LUT1 #( + .INIT ( 2'h2 )) + \blk00000003/blk000008b4 ( + .I0(\blk00000003/sig00000932 ), + .O(\blk00000003/sig00000926 ) + ); + LUT1 #( + .INIT ( 2'h2 )) + \blk00000003/blk000008b3 ( + .I0(\blk00000003/sig00000931 ), + .O(\blk00000003/sig00000923 ) + ); + LUT1 #( + .INIT ( 2'h2 )) + \blk00000003/blk000008b2 ( + .I0(\blk00000003/sig000002a0 ), + .O(\blk00000003/sig000002a1 ) + ); + LUT1 #( + .INIT ( 2'h2 )) + \blk00000003/blk000008b1 ( + .I0(\blk00000003/sig00000294 ), + .O(\blk00000003/sig0000028e ) + ); + LUT1 #( + .INIT ( 2'h2 )) + \blk00000003/blk000008b0 ( + .I0(\blk00000003/sig0000025f ), + .O(\blk00000003/sig00000260 ) + ); + LUT1 #( + .INIT ( 2'h2 )) + \blk00000003/blk000008af ( + .I0(\blk00000003/sig000001cd ), + .O(\blk00000003/sig000000c2 ) + ); + LUT1 #( + .INIT ( 2'h2 )) + \blk00000003/blk000008ae ( + .I0(\blk00000003/sig000009ae ), + .O(\blk00000003/sig000000b3 ) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk000008ad ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig000009a5 ), + .R(sclr), + .Q(\blk00000003/sig000009aa ) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk000008ac ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig000009a2 ), + .R(sclr), + .Q(\blk00000003/sig000009a9 ) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk000008ab ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig0000099f ), + .R(sclr), + .Q(\blk00000003/sig000009a8 ) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk000008aa ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig0000099c ), + .R(sclr), + .Q(\blk00000003/sig000009a7 ) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk000008a9 ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig00000999 ), + .R(sclr), + .Q(\blk00000003/sig000009a6 ) + ); + FDSE #( + .INIT ( 1'b1 )) + \blk00000003/blk000008a8 ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig00000921 ), + .S(sclr), + .Q(\blk00000003/sig00000936 ) + ); + FDSE #( + .INIT ( 1'b1 )) + \blk00000003/blk000008a7 ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig00000930 ), + .S(sclr), + .Q(\blk00000003/sig00000935 ) + ); + FDSE #( + .INIT ( 1'b1 )) + \blk00000003/blk000008a6 ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig0000092d ), + .S(sclr), + .Q(\blk00000003/sig00000934 ) + ); + FDSE #( + .INIT ( 1'b1 )) + \blk00000003/blk000008a5 ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig0000092a ), + .S(sclr), + .Q(\blk00000003/sig00000933 ) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk000008a4 ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig00000927 ), + .R(sclr), + .Q(\blk00000003/sig00000932 ) + ); + FDSE #( + .INIT ( 1'b1 )) + \blk00000003/blk000008a3 ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig00000924 ), + .S(sclr), + .Q(\blk00000003/sig00000931 ) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk000008a2 ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig000002a2 ), + .R(\blk00000003/sig000002a5 ), + .Q(\blk00000003/sig000002a0 ) + ); + FDR \blk00000003/blk000008a1 ( + .C(clk), + .D(\blk00000003/sig000009ba ), + .R(ce), + .Q(\blk00000003/sig000009b3 ) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk000008a0 ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig0000029c ), + .R(\blk00000003/sig000002a4 ), + .Q(\blk00000003/sig0000029a ) + ); + FDSE #( + .INIT ( 1'b1 )) + \blk00000003/blk0000089f ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig00000297 ), + .S(\blk00000003/sig000002a4 ), + .Q(\blk00000003/sig00000295 ) + ); + FDSE #( + .INIT ( 1'b1 )) + \blk00000003/blk0000089e ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig0000028f ), + .S(sclr), + .Q(\blk00000003/sig00000294 ) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk0000089d ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig00000292 ), + .R(sclr), + .Q(\blk00000003/sig00000293 ) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk0000089c ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig00000289 ), + .R(sclr), + .Q(\blk00000003/sig000001e9 ) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk0000089b ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig0000028c ), + .R(sclr), + .Q(\blk00000003/sig000001e8 ) + ); + FDR \blk00000003/blk0000089a ( + .C(clk), + .D(\blk00000003/sig000009b9 ), + .R(ce), + .Q(\blk00000003/sig000009b1 ) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000899 ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig00000261 ), + .R(\blk00000003/sig00000264 ), + .Q(\blk00000003/sig0000025f ) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000898 ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig00000253 ), + .R(coef_ld), + .Q(\blk00000003/sig0000025d ) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000897 ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig00000259 ), + .R(coef_ld), + .Q(\blk00000003/sig0000025c ) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000896 ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig00000256 ), + .R(coef_ld), + .Q(\blk00000003/sig0000025b ) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000895 ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig00000225 ), + .R(coef_ld), + .Q(\blk00000003/sig00000223 ) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000894 ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig000000b6 ), + .R(sclr), + .Q(\blk00000003/sig000000b4 ) + ); + LUT2 #( + .INIT ( 4'hE )) + \blk00000003/blk00000893 ( + .I0(\blk00000003/sig000009a6 ), + .I1(\blk00000003/sig00000931 ), + .O(\blk00000003/sig00000998 ) + ); + LUT2 #( + .INIT ( 4'hE )) + \blk00000003/blk00000892 ( + .I0(\blk00000003/sig000009a7 ), + .I1(\blk00000003/sig00000931 ), + .O(\blk00000003/sig0000099b ) + ); + LUT2 #( + .INIT ( 4'hE )) + \blk00000003/blk00000891 ( + .I0(\blk00000003/sig000009a8 ), + .I1(\blk00000003/sig00000931 ), + .O(\blk00000003/sig0000099e ) + ); + LUT2 #( + .INIT ( 4'hE )) + \blk00000003/blk00000890 ( + .I0(\blk00000003/sig000009a9 ), + .I1(\blk00000003/sig00000931 ), + .O(\blk00000003/sig000009a1 ) + ); + LUT3 #( + .INIT ( 8'hDE )) + \blk00000003/blk0000088f ( + .I0(\blk00000003/sig000009aa ), + .I1(\blk00000003/sig00000931 ), + .I2(\blk00000003/sig000001dc ), + .O(\blk00000003/sig000009a4 ) + ); + LUT3 #( + .INIT ( 8'h04 )) + \blk00000003/blk0000088e ( + .I0(\blk00000003/sig000001dc ), + .I1(\blk00000003/sig0000004a ), + .I2(\blk00000003/sig00000931 ), + .O(\blk00000003/sig00000996 ) + ); + LUT4 #( + .INIT ( 16'h5140 )) + \blk00000003/blk0000088d ( + .I0(\blk00000003/sig000001cd ), + .I1(\blk00000003/sig000001dc ), + .I2(\blk00000003/sig0000010d ), + .I3(NlwRenamedSig_OI_dout_2[45]), + .O(\blk00000003/sig00000994 ) + ); + LUT4 #( + .INIT ( 16'h5140 )) + \blk00000003/blk0000088c ( + .I0(\blk00000003/sig000001cd ), + .I1(\blk00000003/sig000001dc ), + .I2(\blk00000003/sig0000010c ), + .I3(NlwRenamedSig_OI_dout_2[46]), + .O(\blk00000003/sig00000995 ) + ); + LUT4 #( + .INIT ( 16'h5140 )) + \blk00000003/blk0000088b ( + .I0(\blk00000003/sig000001cd ), + .I1(\blk00000003/sig000001dc ), + .I2(\blk00000003/sig0000010e ), + .I3(NlwRenamedSig_OI_dout_2[44]), + .O(\blk00000003/sig00000993 ) + ); + LUT4 #( + .INIT ( 16'h5140 )) + \blk00000003/blk0000088a ( + .I0(\blk00000003/sig000001cd ), + .I1(\blk00000003/sig000001dc ), + .I2(\blk00000003/sig00000110 ), + .I3(NlwRenamedSig_OI_dout_2[42]), + .O(\blk00000003/sig00000991 ) + ); + LUT4 #( + .INIT ( 16'h5140 )) + \blk00000003/blk00000889 ( + .I0(\blk00000003/sig000001cd ), + .I1(\blk00000003/sig000001dc ), + .I2(\blk00000003/sig0000010f ), + .I3(NlwRenamedSig_OI_dout_2[43]), + .O(\blk00000003/sig00000992 ) + ); + LUT4 #( + .INIT ( 16'h5140 )) + \blk00000003/blk00000888 ( + .I0(\blk00000003/sig000001cd ), + .I1(\blk00000003/sig000001dc ), + .I2(\blk00000003/sig00000111 ), + .I3(NlwRenamedSig_OI_dout_2[41]), + .O(\blk00000003/sig00000990 ) + ); + LUT4 #( + .INIT ( 16'h5140 )) + \blk00000003/blk00000887 ( + .I0(\blk00000003/sig000001cd ), + .I1(\blk00000003/sig000001dc ), + .I2(\blk00000003/sig00000113 ), + .I3(NlwRenamedSig_OI_dout_2[39]), + .O(\blk00000003/sig0000098e ) + ); + LUT4 #( + .INIT ( 16'h5140 )) + \blk00000003/blk00000886 ( + .I0(\blk00000003/sig000001cd ), + .I1(\blk00000003/sig000001dc ), + .I2(\blk00000003/sig00000112 ), + .I3(NlwRenamedSig_OI_dout_2[40]), + .O(\blk00000003/sig0000098f ) + ); + LUT4 #( + .INIT ( 16'h5140 )) + \blk00000003/blk00000885 ( + .I0(\blk00000003/sig000001cd ), + .I1(\blk00000003/sig000001dc ), + .I2(\blk00000003/sig00000114 ), + .I3(NlwRenamedSig_OI_dout_2[38]), + .O(\blk00000003/sig0000098d ) + ); + LUT4 #( + .INIT ( 16'h5140 )) + \blk00000003/blk00000884 ( + .I0(\blk00000003/sig000001cd ), + .I1(\blk00000003/sig000001dc ), + .I2(\blk00000003/sig00000116 ), + .I3(NlwRenamedSig_OI_dout_2[36]), + .O(\blk00000003/sig0000098b ) + ); + LUT4 #( + .INIT ( 16'h5140 )) + \blk00000003/blk00000883 ( + .I0(\blk00000003/sig000001cd ), + .I1(\blk00000003/sig000001dc ), + .I2(\blk00000003/sig00000115 ), + .I3(NlwRenamedSig_OI_dout_2[37]), + .O(\blk00000003/sig0000098c ) + ); + LUT4 #( + .INIT ( 16'h5140 )) + \blk00000003/blk00000882 ( + .I0(\blk00000003/sig000001cd ), + .I1(\blk00000003/sig000001dc ), + .I2(\blk00000003/sig00000117 ), + .I3(NlwRenamedSig_OI_dout_2[35]), + .O(\blk00000003/sig0000098a ) + ); + LUT4 #( + .INIT ( 16'h5140 )) + \blk00000003/blk00000881 ( + .I0(\blk00000003/sig000001cd ), + .I1(\blk00000003/sig000001dc ), + .I2(\blk00000003/sig00000119 ), + .I3(NlwRenamedSig_OI_dout_2[33]), + .O(\blk00000003/sig00000988 ) + ); + LUT4 #( + .INIT ( 16'h5140 )) + \blk00000003/blk00000880 ( + .I0(\blk00000003/sig000001cd ), + .I1(\blk00000003/sig000001dc ), + .I2(\blk00000003/sig00000118 ), + .I3(NlwRenamedSig_OI_dout_2[34]), + .O(\blk00000003/sig00000989 ) + ); + LUT4 #( + .INIT ( 16'h5140 )) + \blk00000003/blk0000087f ( + .I0(\blk00000003/sig000001cd ), + .I1(\blk00000003/sig000001dc ), + .I2(\blk00000003/sig0000011a ), + .I3(NlwRenamedSig_OI_dout_2[32]), + .O(\blk00000003/sig00000987 ) + ); + LUT4 #( + .INIT ( 16'h5140 )) + \blk00000003/blk0000087e ( + .I0(\blk00000003/sig000001cd ), + .I1(\blk00000003/sig000001dc ), + .I2(\blk00000003/sig0000011c ), + .I3(NlwRenamedSig_OI_dout_2[30]), + .O(\blk00000003/sig00000985 ) + ); + LUT4 #( + .INIT ( 16'h5140 )) + \blk00000003/blk0000087d ( + .I0(\blk00000003/sig000001cd ), + .I1(\blk00000003/sig000001dc ), + .I2(\blk00000003/sig0000011b ), + .I3(NlwRenamedSig_OI_dout_2[31]), + .O(\blk00000003/sig00000986 ) + ); + LUT4 #( + .INIT ( 16'h5140 )) + \blk00000003/blk0000087c ( + .I0(\blk00000003/sig000001cd ), + .I1(\blk00000003/sig000001dc ), + .I2(\blk00000003/sig0000011d ), + .I3(NlwRenamedSig_OI_dout_2[29]), + .O(\blk00000003/sig00000984 ) + ); + LUT4 #( + .INIT ( 16'h5140 )) + \blk00000003/blk0000087b ( + .I0(\blk00000003/sig000001cd ), + .I1(\blk00000003/sig000001dc ), + .I2(\blk00000003/sig0000011f ), + .I3(NlwRenamedSig_OI_dout_2[27]), + .O(\blk00000003/sig00000982 ) + ); + LUT4 #( + .INIT ( 16'h5140 )) + \blk00000003/blk0000087a ( + .I0(\blk00000003/sig000001cd ), + .I1(\blk00000003/sig000001dc ), + .I2(\blk00000003/sig0000011e ), + .I3(NlwRenamedSig_OI_dout_2[28]), + .O(\blk00000003/sig00000983 ) + ); + LUT4 #( + .INIT ( 16'h5140 )) + \blk00000003/blk00000879 ( + .I0(\blk00000003/sig000001cd ), + .I1(\blk00000003/sig000001dc ), + .I2(\blk00000003/sig00000120 ), + .I3(NlwRenamedSig_OI_dout_2[26]), + .O(\blk00000003/sig00000981 ) + ); + LUT4 #( + .INIT ( 16'h5140 )) + \blk00000003/blk00000878 ( + .I0(\blk00000003/sig000001cd ), + .I1(\blk00000003/sig000001dc ), + .I2(\blk00000003/sig00000122 ), + .I3(NlwRenamedSig_OI_dout_2[24]), + .O(\blk00000003/sig0000097f ) + ); + LUT4 #( + .INIT ( 16'h5140 )) + \blk00000003/blk00000877 ( + .I0(\blk00000003/sig000001cd ), + .I1(\blk00000003/sig000001dc ), + .I2(\blk00000003/sig00000121 ), + .I3(NlwRenamedSig_OI_dout_2[25]), + .O(\blk00000003/sig00000980 ) + ); + LUT4 #( + .INIT ( 16'h5140 )) + \blk00000003/blk00000876 ( + .I0(\blk00000003/sig000001cd ), + .I1(\blk00000003/sig000001dc ), + .I2(\blk00000003/sig00000123 ), + .I3(NlwRenamedSig_OI_dout_2[23]), + .O(\blk00000003/sig0000097e ) + ); + LUT4 #( + .INIT ( 16'h5140 )) + \blk00000003/blk00000875 ( + .I0(\blk00000003/sig000001cd ), + .I1(\blk00000003/sig000001dc ), + .I2(\blk00000003/sig00000125 ), + .I3(NlwRenamedSig_OI_dout_2[21]), + .O(\blk00000003/sig0000097c ) + ); + LUT4 #( + .INIT ( 16'h5140 )) + \blk00000003/blk00000874 ( + .I0(\blk00000003/sig000001cd ), + .I1(\blk00000003/sig000001dc ), + .I2(\blk00000003/sig00000124 ), + .I3(NlwRenamedSig_OI_dout_2[22]), + .O(\blk00000003/sig0000097d ) + ); + LUT4 #( + .INIT ( 16'h5140 )) + \blk00000003/blk00000873 ( + .I0(\blk00000003/sig000001cd ), + .I1(\blk00000003/sig000001dc ), + .I2(\blk00000003/sig00000126 ), + .I3(NlwRenamedSig_OI_dout_2[20]), + .O(\blk00000003/sig0000097b ) + ); + LUT4 #( + .INIT ( 16'h5140 )) + \blk00000003/blk00000872 ( + .I0(\blk00000003/sig000001cd ), + .I1(\blk00000003/sig000001dc ), + .I2(\blk00000003/sig00000128 ), + .I3(NlwRenamedSig_OI_dout_2[18]), + .O(\blk00000003/sig00000979 ) + ); + LUT4 #( + .INIT ( 16'h5140 )) + \blk00000003/blk00000871 ( + .I0(\blk00000003/sig000001cd ), + .I1(\blk00000003/sig000001dc ), + .I2(\blk00000003/sig00000127 ), + .I3(NlwRenamedSig_OI_dout_2[19]), + .O(\blk00000003/sig0000097a ) + ); + LUT4 #( + .INIT ( 16'h5140 )) + \blk00000003/blk00000870 ( + .I0(\blk00000003/sig000001cd ), + .I1(\blk00000003/sig000001dc ), + .I2(\blk00000003/sig00000129 ), + .I3(NlwRenamedSig_OI_dout_2[17]), + .O(\blk00000003/sig00000978 ) + ); + LUT4 #( + .INIT ( 16'h5140 )) + \blk00000003/blk0000086f ( + .I0(\blk00000003/sig000001cd ), + .I1(\blk00000003/sig000001dc ), + .I2(\blk00000003/sig0000012b ), + .I3(NlwRenamedSig_OI_dout_2[15]), + .O(\blk00000003/sig00000976 ) + ); + LUT4 #( + .INIT ( 16'h5140 )) + \blk00000003/blk0000086e ( + .I0(\blk00000003/sig000001cd ), + .I1(\blk00000003/sig000001dc ), + .I2(\blk00000003/sig0000012a ), + .I3(NlwRenamedSig_OI_dout_2[16]), + .O(\blk00000003/sig00000977 ) + ); + LUT4 #( + .INIT ( 16'h5140 )) + \blk00000003/blk0000086d ( + .I0(\blk00000003/sig000001cd ), + .I1(\blk00000003/sig000001dc ), + .I2(\blk00000003/sig0000012c ), + .I3(NlwRenamedSig_OI_dout_2[14]), + .O(\blk00000003/sig00000975 ) + ); + LUT4 #( + .INIT ( 16'h5140 )) + \blk00000003/blk0000086c ( + .I0(\blk00000003/sig000001cd ), + .I1(\blk00000003/sig000001dc ), + .I2(\blk00000003/sig0000012e ), + .I3(NlwRenamedSig_OI_dout_2[12]), + .O(\blk00000003/sig00000973 ) + ); + LUT4 #( + .INIT ( 16'h5140 )) + \blk00000003/blk0000086b ( + .I0(\blk00000003/sig000001cd ), + .I1(\blk00000003/sig000001dc ), + .I2(\blk00000003/sig0000012d ), + .I3(NlwRenamedSig_OI_dout_2[13]), + .O(\blk00000003/sig00000974 ) + ); + LUT4 #( + .INIT ( 16'h5140 )) + \blk00000003/blk0000086a ( + .I0(\blk00000003/sig000001cd ), + .I1(\blk00000003/sig000001dc ), + .I2(\blk00000003/sig0000012f ), + .I3(NlwRenamedSig_OI_dout_2[11]), + .O(\blk00000003/sig00000972 ) + ); + LUT4 #( + .INIT ( 16'h5140 )) + \blk00000003/blk00000869 ( + .I0(\blk00000003/sig000001cd ), + .I1(\blk00000003/sig000001dc ), + .I2(\blk00000003/sig00000131 ), + .I3(NlwRenamedSig_OI_dout_2[9]), + .O(\blk00000003/sig00000970 ) + ); + LUT4 #( + .INIT ( 16'h5140 )) + \blk00000003/blk00000868 ( + .I0(\blk00000003/sig000001cd ), + .I1(\blk00000003/sig000001dc ), + .I2(\blk00000003/sig00000130 ), + .I3(NlwRenamedSig_OI_dout_2[10]), + .O(\blk00000003/sig00000971 ) + ); + LUT4 #( + .INIT ( 16'h5140 )) + \blk00000003/blk00000867 ( + .I0(\blk00000003/sig000001cd ), + .I1(\blk00000003/sig000001dc ), + .I2(\blk00000003/sig00000132 ), + .I3(NlwRenamedSig_OI_dout_2[8]), + .O(\blk00000003/sig0000096f ) + ); + LUT4 #( + .INIT ( 16'h5140 )) + \blk00000003/blk00000866 ( + .I0(\blk00000003/sig000001cd ), + .I1(\blk00000003/sig000001dc ), + .I2(\blk00000003/sig00000134 ), + .I3(NlwRenamedSig_OI_dout_2[6]), + .O(\blk00000003/sig0000096d ) + ); + LUT4 #( + .INIT ( 16'h5140 )) + \blk00000003/blk00000865 ( + .I0(\blk00000003/sig000001cd ), + .I1(\blk00000003/sig000001dc ), + .I2(\blk00000003/sig00000133 ), + .I3(NlwRenamedSig_OI_dout_2[7]), + .O(\blk00000003/sig0000096e ) + ); + LUT4 #( + .INIT ( 16'h5140 )) + \blk00000003/blk00000864 ( + .I0(\blk00000003/sig000001cd ), + .I1(\blk00000003/sig000001dc ), + .I2(\blk00000003/sig00000135 ), + .I3(NlwRenamedSig_OI_dout_2[5]), + .O(\blk00000003/sig0000096c ) + ); + LUT4 #( + .INIT ( 16'h5140 )) + \blk00000003/blk00000863 ( + .I0(\blk00000003/sig000001cd ), + .I1(\blk00000003/sig000001dc ), + .I2(\blk00000003/sig00000137 ), + .I3(NlwRenamedSig_OI_dout_2[3]), + .O(\blk00000003/sig0000096a ) + ); + LUT4 #( + .INIT ( 16'h5140 )) + \blk00000003/blk00000862 ( + .I0(\blk00000003/sig000001cd ), + .I1(\blk00000003/sig000001dc ), + .I2(\blk00000003/sig00000136 ), + .I3(NlwRenamedSig_OI_dout_2[4]), + .O(\blk00000003/sig0000096b ) + ); + LUT4 #( + .INIT ( 16'h5140 )) + \blk00000003/blk00000861 ( + .I0(\blk00000003/sig000001cd ), + .I1(\blk00000003/sig000001dc ), + .I2(\blk00000003/sig00000138 ), + .I3(NlwRenamedSig_OI_dout_2[2]), + .O(\blk00000003/sig00000969 ) + ); + LUT4 #( + .INIT ( 16'h5140 )) + \blk00000003/blk00000860 ( + .I0(\blk00000003/sig000001cd ), + .I1(\blk00000003/sig000001dc ), + .I2(\blk00000003/sig00000139 ), + .I3(NlwRenamedSig_OI_dout_2[1]), + .O(\blk00000003/sig00000968 ) + ); + LUT4 #( + .INIT ( 16'h5140 )) + \blk00000003/blk0000085f ( + .I0(\blk00000003/sig000001cd ), + .I1(\blk00000003/sig000001dc ), + .I2(\blk00000003/sig00000183 ), + .I3(NlwRenamedSig_OI_dout_1[46]), + .O(\blk00000003/sig00000966 ) + ); + LUT4 #( + .INIT ( 16'h5140 )) + \blk00000003/blk0000085e ( + .I0(\blk00000003/sig000001cd ), + .I1(\blk00000003/sig000001dc ), + .I2(\blk00000003/sig0000013a ), + .I3(NlwRenamedSig_OI_dout_2[0]), + .O(\blk00000003/sig00000967 ) + ); + LUT4 #( + .INIT ( 16'h5140 )) + \blk00000003/blk0000085d ( + .I0(\blk00000003/sig000001cd ), + .I1(\blk00000003/sig000001dc ), + .I2(\blk00000003/sig00000184 ), + .I3(NlwRenamedSig_OI_dout_1[45]), + .O(\blk00000003/sig00000965 ) + ); + LUT4 #( + .INIT ( 16'h5140 )) + \blk00000003/blk0000085c ( + .I0(\blk00000003/sig000001cd ), + .I1(\blk00000003/sig000001dc ), + .I2(\blk00000003/sig00000186 ), + .I3(NlwRenamedSig_OI_dout_1[43]), + .O(\blk00000003/sig00000963 ) + ); + LUT4 #( + .INIT ( 16'h5140 )) + \blk00000003/blk0000085b ( + .I0(\blk00000003/sig000001cd ), + .I1(\blk00000003/sig000001dc ), + .I2(\blk00000003/sig00000185 ), + .I3(NlwRenamedSig_OI_dout_1[44]), + .O(\blk00000003/sig00000964 ) + ); + LUT4 #( + .INIT ( 16'h5140 )) + \blk00000003/blk0000085a ( + .I0(\blk00000003/sig000001cd ), + .I1(\blk00000003/sig000001dc ), + .I2(\blk00000003/sig00000187 ), + .I3(NlwRenamedSig_OI_dout_1[42]), + .O(\blk00000003/sig00000962 ) + ); + LUT4 #( + .INIT ( 16'h5140 )) + \blk00000003/blk00000859 ( + .I0(\blk00000003/sig000001cd ), + .I1(\blk00000003/sig000001dc ), + .I2(\blk00000003/sig00000189 ), + .I3(NlwRenamedSig_OI_dout_1[40]), + .O(\blk00000003/sig00000960 ) + ); + LUT4 #( + .INIT ( 16'h5140 )) + \blk00000003/blk00000858 ( + .I0(\blk00000003/sig000001cd ), + .I1(\blk00000003/sig000001dc ), + .I2(\blk00000003/sig00000188 ), + .I3(NlwRenamedSig_OI_dout_1[41]), + .O(\blk00000003/sig00000961 ) + ); + LUT4 #( + .INIT ( 16'h5140 )) + \blk00000003/blk00000857 ( + .I0(\blk00000003/sig000001cd ), + .I1(\blk00000003/sig000001dc ), + .I2(\blk00000003/sig0000018a ), + .I3(NlwRenamedSig_OI_dout_1[39]), + .O(\blk00000003/sig0000095f ) + ); + LUT4 #( + .INIT ( 16'h5140 )) + \blk00000003/blk00000856 ( + .I0(\blk00000003/sig000001cd ), + .I1(\blk00000003/sig000001dc ), + .I2(\blk00000003/sig0000018c ), + .I3(NlwRenamedSig_OI_dout_1[37]), + .O(\blk00000003/sig0000095d ) + ); + LUT4 #( + .INIT ( 16'h5140 )) + \blk00000003/blk00000855 ( + .I0(\blk00000003/sig000001cd ), + .I1(\blk00000003/sig000001dc ), + .I2(\blk00000003/sig0000018b ), + .I3(NlwRenamedSig_OI_dout_1[38]), + .O(\blk00000003/sig0000095e ) + ); + LUT4 #( + .INIT ( 16'h5140 )) + \blk00000003/blk00000854 ( + .I0(\blk00000003/sig000001cd ), + .I1(\blk00000003/sig000001dc ), + .I2(\blk00000003/sig0000018d ), + .I3(NlwRenamedSig_OI_dout_1[36]), + .O(\blk00000003/sig0000095c ) + ); + LUT4 #( + .INIT ( 16'h5140 )) + \blk00000003/blk00000853 ( + .I0(\blk00000003/sig000001cd ), + .I1(\blk00000003/sig000001dc ), + .I2(\blk00000003/sig0000018f ), + .I3(NlwRenamedSig_OI_dout_1[34]), + .O(\blk00000003/sig0000095a ) + ); + LUT4 #( + .INIT ( 16'h5140 )) + \blk00000003/blk00000852 ( + .I0(\blk00000003/sig000001cd ), + .I1(\blk00000003/sig000001dc ), + .I2(\blk00000003/sig0000018e ), + .I3(NlwRenamedSig_OI_dout_1[35]), + .O(\blk00000003/sig0000095b ) + ); + LUT4 #( + .INIT ( 16'h5140 )) + \blk00000003/blk00000851 ( + .I0(\blk00000003/sig000001cd ), + .I1(\blk00000003/sig000001dc ), + .I2(\blk00000003/sig00000190 ), + .I3(NlwRenamedSig_OI_dout_1[33]), + .O(\blk00000003/sig00000959 ) + ); + LUT4 #( + .INIT ( 16'h5140 )) + \blk00000003/blk00000850 ( + .I0(\blk00000003/sig000001cd ), + .I1(\blk00000003/sig000001dc ), + .I2(\blk00000003/sig00000192 ), + .I3(NlwRenamedSig_OI_dout_1[31]), + .O(\blk00000003/sig00000957 ) + ); + LUT4 #( + .INIT ( 16'h5140 )) + \blk00000003/blk0000084f ( + .I0(\blk00000003/sig000001cd ), + .I1(\blk00000003/sig000001dc ), + .I2(\blk00000003/sig00000191 ), + .I3(NlwRenamedSig_OI_dout_1[32]), + .O(\blk00000003/sig00000958 ) + ); + LUT4 #( + .INIT ( 16'h5140 )) + \blk00000003/blk0000084e ( + .I0(\blk00000003/sig000001cd ), + .I1(\blk00000003/sig000001dc ), + .I2(\blk00000003/sig00000193 ), + .I3(NlwRenamedSig_OI_dout_1[30]), + .O(\blk00000003/sig00000956 ) + ); + LUT4 #( + .INIT ( 16'h5140 )) + \blk00000003/blk0000084d ( + .I0(\blk00000003/sig000001cd ), + .I1(\blk00000003/sig000001dc ), + .I2(\blk00000003/sig00000195 ), + .I3(NlwRenamedSig_OI_dout_1[28]), + .O(\blk00000003/sig00000954 ) + ); + LUT4 #( + .INIT ( 16'h5140 )) + \blk00000003/blk0000084c ( + .I0(\blk00000003/sig000001cd ), + .I1(\blk00000003/sig000001dc ), + .I2(\blk00000003/sig00000194 ), + .I3(NlwRenamedSig_OI_dout_1[29]), + .O(\blk00000003/sig00000955 ) + ); + LUT4 #( + .INIT ( 16'h5140 )) + \blk00000003/blk0000084b ( + .I0(\blk00000003/sig000001cd ), + .I1(\blk00000003/sig000001dc ), + .I2(\blk00000003/sig00000196 ), + .I3(NlwRenamedSig_OI_dout_1[27]), + .O(\blk00000003/sig00000953 ) + ); + LUT4 #( + .INIT ( 16'h5140 )) + \blk00000003/blk0000084a ( + .I0(\blk00000003/sig000001cd ), + .I1(\blk00000003/sig000001dc ), + .I2(\blk00000003/sig00000198 ), + .I3(NlwRenamedSig_OI_dout_1[25]), + .O(\blk00000003/sig00000951 ) + ); + LUT4 #( + .INIT ( 16'h5140 )) + \blk00000003/blk00000849 ( + .I0(\blk00000003/sig000001cd ), + .I1(\blk00000003/sig000001dc ), + .I2(\blk00000003/sig00000197 ), + .I3(NlwRenamedSig_OI_dout_1[26]), + .O(\blk00000003/sig00000952 ) + ); + LUT4 #( + .INIT ( 16'h5140 )) + \blk00000003/blk00000848 ( + .I0(\blk00000003/sig000001cd ), + .I1(\blk00000003/sig000001dc ), + .I2(\blk00000003/sig00000199 ), + .I3(NlwRenamedSig_OI_dout_1[24]), + .O(\blk00000003/sig00000950 ) + ); + LUT4 #( + .INIT ( 16'h5140 )) + \blk00000003/blk00000847 ( + .I0(\blk00000003/sig000001cd ), + .I1(\blk00000003/sig000001dc ), + .I2(\blk00000003/sig0000019b ), + .I3(NlwRenamedSig_OI_dout_1[22]), + .O(\blk00000003/sig0000094e ) + ); + LUT4 #( + .INIT ( 16'h5140 )) + \blk00000003/blk00000846 ( + .I0(\blk00000003/sig000001cd ), + .I1(\blk00000003/sig000001dc ), + .I2(\blk00000003/sig0000019a ), + .I3(NlwRenamedSig_OI_dout_1[23]), + .O(\blk00000003/sig0000094f ) + ); + LUT4 #( + .INIT ( 16'h5140 )) + \blk00000003/blk00000845 ( + .I0(\blk00000003/sig000001cd ), + .I1(\blk00000003/sig000001dc ), + .I2(\blk00000003/sig0000019c ), + .I3(NlwRenamedSig_OI_dout_1[21]), + .O(\blk00000003/sig0000094d ) + ); + LUT4 #( + .INIT ( 16'h5140 )) + \blk00000003/blk00000844 ( + .I0(\blk00000003/sig000001cd ), + .I1(\blk00000003/sig000001dc ), + .I2(\blk00000003/sig0000019e ), + .I3(NlwRenamedSig_OI_dout_1[19]), + .O(\blk00000003/sig0000094b ) + ); + LUT4 #( + .INIT ( 16'h5140 )) + \blk00000003/blk00000843 ( + .I0(\blk00000003/sig000001cd ), + .I1(\blk00000003/sig000001dc ), + .I2(\blk00000003/sig0000019d ), + .I3(NlwRenamedSig_OI_dout_1[20]), + .O(\blk00000003/sig0000094c ) + ); + LUT4 #( + .INIT ( 16'h5140 )) + \blk00000003/blk00000842 ( + .I0(\blk00000003/sig000001cd ), + .I1(\blk00000003/sig000001dc ), + .I2(\blk00000003/sig0000019f ), + .I3(NlwRenamedSig_OI_dout_1[18]), + .O(\blk00000003/sig0000094a ) + ); + LUT4 #( + .INIT ( 16'h5140 )) + \blk00000003/blk00000841 ( + .I0(\blk00000003/sig000001cd ), + .I1(\blk00000003/sig000001dc ), + .I2(\blk00000003/sig000001a1 ), + .I3(NlwRenamedSig_OI_dout_1[16]), + .O(\blk00000003/sig00000948 ) + ); + LUT4 #( + .INIT ( 16'h5140 )) + \blk00000003/blk00000840 ( + .I0(\blk00000003/sig000001cd ), + .I1(\blk00000003/sig000001dc ), + .I2(\blk00000003/sig000001a0 ), + .I3(NlwRenamedSig_OI_dout_1[17]), + .O(\blk00000003/sig00000949 ) + ); + LUT4 #( + .INIT ( 16'h5140 )) + \blk00000003/blk0000083f ( + .I0(\blk00000003/sig000001cd ), + .I1(\blk00000003/sig000001dc ), + .I2(\blk00000003/sig000001a2 ), + .I3(NlwRenamedSig_OI_dout_1[15]), + .O(\blk00000003/sig00000947 ) + ); + LUT4 #( + .INIT ( 16'h5140 )) + \blk00000003/blk0000083e ( + .I0(\blk00000003/sig000001cd ), + .I1(\blk00000003/sig000001dc ), + .I2(\blk00000003/sig000001a4 ), + .I3(NlwRenamedSig_OI_dout_1[13]), + .O(\blk00000003/sig00000945 ) + ); + LUT4 #( + .INIT ( 16'h5140 )) + \blk00000003/blk0000083d ( + .I0(\blk00000003/sig000001cd ), + .I1(\blk00000003/sig000001dc ), + .I2(\blk00000003/sig000001a3 ), + .I3(NlwRenamedSig_OI_dout_1[14]), + .O(\blk00000003/sig00000946 ) + ); + LUT4 #( + .INIT ( 16'h5140 )) + \blk00000003/blk0000083c ( + .I0(\blk00000003/sig000001cd ), + .I1(\blk00000003/sig000001dc ), + .I2(\blk00000003/sig000001a5 ), + .I3(NlwRenamedSig_OI_dout_1[12]), + .O(\blk00000003/sig00000944 ) + ); + LUT4 #( + .INIT ( 16'h5140 )) + \blk00000003/blk0000083b ( + .I0(\blk00000003/sig000001cd ), + .I1(\blk00000003/sig000001dc ), + .I2(\blk00000003/sig000001a7 ), + .I3(NlwRenamedSig_OI_dout_1[10]), + .O(\blk00000003/sig00000942 ) + ); + LUT4 #( + .INIT ( 16'h5140 )) + \blk00000003/blk0000083a ( + .I0(\blk00000003/sig000001cd ), + .I1(\blk00000003/sig000001dc ), + .I2(\blk00000003/sig000001a6 ), + .I3(NlwRenamedSig_OI_dout_1[11]), + .O(\blk00000003/sig00000943 ) + ); + LUT4 #( + .INIT ( 16'h5140 )) + \blk00000003/blk00000839 ( + .I0(\blk00000003/sig000001cd ), + .I1(\blk00000003/sig000001dc ), + .I2(\blk00000003/sig000001a8 ), + .I3(NlwRenamedSig_OI_dout_1[9]), + .O(\blk00000003/sig00000941 ) + ); + LUT4 #( + .INIT ( 16'h5140 )) + \blk00000003/blk00000838 ( + .I0(\blk00000003/sig000001cd ), + .I1(\blk00000003/sig000001dc ), + .I2(\blk00000003/sig000001aa ), + .I3(NlwRenamedSig_OI_dout_1[7]), + .O(\blk00000003/sig0000093f ) + ); + LUT4 #( + .INIT ( 16'h5140 )) + \blk00000003/blk00000837 ( + .I0(\blk00000003/sig000001cd ), + .I1(\blk00000003/sig000001dc ), + .I2(\blk00000003/sig000001a9 ), + .I3(NlwRenamedSig_OI_dout_1[8]), + .O(\blk00000003/sig00000940 ) + ); + LUT4 #( + .INIT ( 16'h5140 )) + \blk00000003/blk00000836 ( + .I0(\blk00000003/sig000001cd ), + .I1(\blk00000003/sig000001dc ), + .I2(\blk00000003/sig000001ab ), + .I3(NlwRenamedSig_OI_dout_1[6]), + .O(\blk00000003/sig0000093e ) + ); + LUT4 #( + .INIT ( 16'h5140 )) + \blk00000003/blk00000835 ( + .I0(\blk00000003/sig000001cd ), + .I1(\blk00000003/sig000001dc ), + .I2(\blk00000003/sig000001ad ), + .I3(NlwRenamedSig_OI_dout_1[4]), + .O(\blk00000003/sig0000093c ) + ); + LUT4 #( + .INIT ( 16'h5140 )) + \blk00000003/blk00000834 ( + .I0(\blk00000003/sig000001cd ), + .I1(\blk00000003/sig000001dc ), + .I2(\blk00000003/sig000001ac ), + .I3(NlwRenamedSig_OI_dout_1[5]), + .O(\blk00000003/sig0000093d ) + ); + LUT4 #( + .INIT ( 16'h5140 )) + \blk00000003/blk00000833 ( + .I0(\blk00000003/sig000001cd ), + .I1(\blk00000003/sig000001dc ), + .I2(\blk00000003/sig000001ae ), + .I3(NlwRenamedSig_OI_dout_1[3]), + .O(\blk00000003/sig0000093b ) + ); + LUT4 #( + .INIT ( 16'h5140 )) + \blk00000003/blk00000832 ( + .I0(\blk00000003/sig000001cd ), + .I1(\blk00000003/sig000001dc ), + .I2(\blk00000003/sig000001b0 ), + .I3(NlwRenamedSig_OI_dout_1[1]), + .O(\blk00000003/sig00000939 ) + ); + LUT4 #( + .INIT ( 16'h5140 )) + \blk00000003/blk00000831 ( + .I0(\blk00000003/sig000001cd ), + .I1(\blk00000003/sig000001dc ), + .I2(\blk00000003/sig000001af ), + .I3(NlwRenamedSig_OI_dout_1[2]), + .O(\blk00000003/sig0000093a ) + ); + LUT4 #( + .INIT ( 16'h5140 )) + \blk00000003/blk00000830 ( + .I0(\blk00000003/sig000001cd ), + .I1(\blk00000003/sig000001dc ), + .I2(\blk00000003/sig000001b1 ), + .I3(NlwRenamedSig_OI_dout_1[0]), + .O(\blk00000003/sig00000938 ) + ); + LUT2 #( + .INIT ( 4'h6 )) + \blk00000003/blk0000082f ( + .I0(\blk00000003/sig00000936 ), + .I1(\blk00000003/sig00000931 ), + .O(\blk00000003/sig00000920 ) + ); + LUT2 #( + .INIT ( 4'h8 )) + \blk00000003/blk0000082e ( + .I0(ce), + .I1(\blk00000003/sig000001de ), + .O(\blk00000003/sig000009b8 ) + ); + LUT2 #( + .INIT ( 4'h8 )) + \blk00000003/blk0000082d ( + .I0(ce), + .I1(\blk00000003/sig0000075a ), + .O(\blk00000003/sig000009b7 ) + ); + LUT2 #( + .INIT ( 4'h8 )) + \blk00000003/blk0000082c ( + .I0(ce), + .I1(\blk00000003/sig00000754 ), + .O(\blk00000003/sig000009b6 ) + ); + LUT2 #( + .INIT ( 4'h8 )) + \blk00000003/blk0000082b ( + .I0(ce), + .I1(\blk00000003/sig0000074f ), + .O(\blk00000003/sig000009b5 ) + ); + LUT2 #( + .INIT ( 4'h8 )) + \blk00000003/blk0000082a ( + .I0(ce), + .I1(\blk00000003/sig00000744 ), + .O(\blk00000003/sig000009b4 ) + ); + LUT2 #( + .INIT ( 4'h8 )) + \blk00000003/blk00000829 ( + .I0(ce), + .I1(\blk00000003/sig00000745 ), + .O(\blk00000003/sig0000091e ) + ); + LUT2 #( + .INIT ( 4'hE )) + \blk00000003/blk00000828 ( + .I0(sclr), + .I1(\blk00000003/sig000009b3 ), + .O(\blk00000003/sig0000029d ) + ); + LUT2 #( + .INIT ( 4'h7 )) + \blk00000003/blk00000827 ( + .I0(\blk00000003/sig000002a3 ), + .I1(\blk00000003/sig000009b2 ), + .O(\blk00000003/sig00000298 ) + ); + LUT2 #( + .INIT ( 4'h6 )) + \blk00000003/blk00000826 ( + .I0(\blk00000003/sig00000295 ), + .I1(\blk00000003/sig000002a3 ), + .O(\blk00000003/sig00000296 ) + ); + LUT3 #( + .INIT ( 8'hDA )) + \blk00000003/blk00000825 ( + .I0(\blk00000003/sig000002a3 ), + .I1(\blk00000003/sig000009b2 ), + .I2(\blk00000003/sig0000029a ), + .O(\blk00000003/sig0000029b ) + ); + LUT2 #( + .INIT ( 4'h6 )) + \blk00000003/blk00000824 ( + .I0(\blk00000003/sig00000293 ), + .I1(\blk00000003/sig000001d7 ), + .O(\blk00000003/sig00000291 ) + ); + LUT2 #( + .INIT ( 4'h7 )) + \blk00000003/blk00000823 ( + .I0(nd), + .I1(\blk00000003/sig000000b2 ), + .O(\blk00000003/sig0000028d ) + ); + LUT3 #( + .INIT ( 8'hEA )) + \blk00000003/blk00000822 ( + .I0(\blk00000003/sig000001e8 ), + .I1(nd), + .I2(\blk00000003/sig000000b2 ), + .O(\blk00000003/sig0000028b ) + ); + LUT3 #( + .INIT ( 8'hDA )) + \blk00000003/blk00000821 ( + .I0(nd), + .I1(\blk00000003/sig000000b2 ), + .I2(\blk00000003/sig000001e9 ), + .O(\blk00000003/sig00000288 ) + ); + LUT2 #( + .INIT ( 4'h7 )) + \blk00000003/blk00000820 ( + .I0(\blk00000003/sig00000240 ), + .I1(\blk00000003/sig00000247 ), + .O(\blk00000003/sig00000284 ) + ); + LUT2 #( + .INIT ( 4'h7 )) + \blk00000003/blk0000081f ( + .I0(\blk00000003/sig00000247 ), + .I1(\blk00000003/sig0000023f ), + .O(\blk00000003/sig00000281 ) + ); + LUT2 #( + .INIT ( 4'h7 )) + \blk00000003/blk0000081e ( + .I0(\blk00000003/sig00000247 ), + .I1(\blk00000003/sig00000243 ), + .O(\blk00000003/sig0000027f ) + ); + LUT3 #( + .INIT ( 8'h7F )) + \blk00000003/blk0000081d ( + .I0(\blk00000003/sig00000245 ), + .I1(\blk00000003/sig0000024d ), + .I2(\blk00000003/sig00000247 ), + .O(\blk00000003/sig0000027a ) + ); + LUT3 #( + .INIT ( 8'h7F )) + \blk00000003/blk0000081c ( + .I0(\blk00000003/sig00000245 ), + .I1(\blk00000003/sig00000243 ), + .I2(\blk00000003/sig00000247 ), + .O(\blk00000003/sig0000027c ) + ); + LUT2 #( + .INIT ( 4'h7 )) + \blk00000003/blk0000081b ( + .I0(\blk00000003/sig00000240 ), + .I1(\blk00000003/sig00000243 ), + .O(\blk00000003/sig00000273 ) + ); + LUT2 #( + .INIT ( 4'h7 )) + \blk00000003/blk0000081a ( + .I0(\blk00000003/sig0000023f ), + .I1(\blk00000003/sig00000243 ), + .O(\blk00000003/sig00000271 ) + ); + LUT3 #( + .INIT ( 8'hDF )) + \blk00000003/blk00000819 ( + .I0(\blk00000003/sig0000023d ), + .I1(\blk00000003/sig00000247 ), + .I2(\blk00000003/sig00000243 ), + .O(\blk00000003/sig0000026c ) + ); + LUT2 #( + .INIT ( 4'h7 )) + \blk00000003/blk00000818 ( + .I0(\blk00000003/sig00000242 ), + .I1(\blk00000003/sig00000243 ), + .O(\blk00000003/sig00000268 ) + ); + LUT3 #( + .INIT ( 8'h7F )) + \blk00000003/blk00000817 ( + .I0(\blk00000003/sig00000241 ), + .I1(\blk00000003/sig00000243 ), + .I2(\blk00000003/sig0000024d ), + .O(\blk00000003/sig0000026a ) + ); + LUT2 #( + .INIT ( 4'hE )) + \blk00000003/blk00000816 ( + .I0(\blk00000003/sig00000250 ), + .I1(\blk00000003/sig000009b1 ), + .O(\blk00000003/sig00000263 ) + ); + LUT3 #( + .INIT ( 8'h7F )) + \blk00000003/blk00000815 ( + .I0(coef_we), + .I1(\blk00000003/sig00000227 ), + .I2(\blk00000003/sig0000022f ), + .O(\blk00000003/sig0000025a ) + ); + LUT4 #( + .INIT ( 16'hE6CC )) + \blk00000003/blk00000814 ( + .I0(coef_we), + .I1(\blk00000003/sig0000025d ), + .I2(\blk00000003/sig00000227 ), + .I3(\blk00000003/sig0000022f ), + .O(\blk00000003/sig00000252 ) + ); + LUT2 #( + .INIT ( 4'h2 )) + \blk00000003/blk00000813 ( + .I0(coef_ld), + .I1(\blk00000003/sig00000250 ), + .O(\blk00000003/sig00000246 ) + ); + LUT2 #( + .INIT ( 4'h8 )) + \blk00000003/blk00000812 ( + .I0(coef_we), + .I1(\blk00000003/sig0000022f ), + .O(\blk00000003/sig00000228 ) + ); + LUT3 #( + .INIT ( 8'h20 )) + \blk00000003/blk00000811 ( + .I0(coef_we), + .I1(coef_ld), + .I2(\blk00000003/sig0000023b ), + .O(\blk00000003/sig0000024e ) + ); + LUT3 #( + .INIT ( 8'h20 )) + \blk00000003/blk00000810 ( + .I0(\blk00000003/sig0000025b ), + .I1(\blk00000003/sig0000025c ), + .I2(\blk00000003/sig0000025d ), + .O(\blk00000003/sig0000022c ) + ); + LUT3 #( + .INIT ( 8'h04 )) + \blk00000003/blk0000080f ( + .I0(\blk00000003/sig0000025c ), + .I1(\blk00000003/sig0000025b ), + .I2(\blk00000003/sig0000025d ), + .O(\blk00000003/sig0000022a ) + ); + LUT3 #( + .INIT ( 8'hDF )) + \blk00000003/blk0000080e ( + .I0(coef_ld), + .I1(\blk00000003/sig00000250 ), + .I2(\blk00000003/sig00000239 ), + .O(\blk00000003/sig00000222 ) + ); + LUT3 #( + .INIT ( 8'hDF )) + \blk00000003/blk0000080d ( + .I0(coef_we), + .I1(\blk00000003/sig0000023b ), + .I2(\blk00000003/sig00000239 ), + .O(\blk00000003/sig0000021f ) + ); + LUT2 #( + .INIT ( 4'h6 )) + \blk00000003/blk0000080c ( + .I0(\blk00000003/sig00000223 ), + .I1(coef_we), + .O(\blk00000003/sig00000224 ) + ); + LUT5 #( + .INIT ( 32'hFFFF2AAA )) + \blk00000003/blk0000080b ( + .I0(\blk00000003/sig0000023b ), + .I1(coef_we), + .I2(\blk00000003/sig0000022f ), + .I3(\blk00000003/sig00000227 ), + .I4(coef_ld), + .O(\blk00000003/sig0000023a ) + ); + LUT4 #( + .INIT ( 16'hFF8A )) + \blk00000003/blk0000080a ( + .I0(\blk00000003/sig00000239 ), + .I1(\blk00000003/sig0000023b ), + .I2(coef_we), + .I3(coef_ld), + .O(\blk00000003/sig00000238 ) + ); + LUT2 #( + .INIT ( 4'h8 )) + \blk00000003/blk00000809 ( + .I0(\blk00000003/sig000000ad ), + .I1(nd), + .O(\blk00000003/sig000001e6 ) + ); + LUT2 #( + .INIT ( 4'h8 )) + \blk00000003/blk00000808 ( + .I0(\blk00000003/sig000000c6 ), + .I1(\blk00000003/sig000001dc ), + .O(\blk00000003/sig000001e4 ) + ); + LUT3 #( + .INIT ( 8'h10 )) + \blk00000003/blk00000807 ( + .I0(\blk00000003/sig000000c6 ), + .I1(\blk00000003/sig00000931 ), + .I2(\blk00000003/sig000009b0 ), + .O(\blk00000003/sig000000c7 ) + ); + LUT3 #( + .INIT ( 8'hEA )) + \blk00000003/blk00000806 ( + .I0(sclr), + .I1(ce), + .I2(\blk00000003/sig00000931 ), + .O(\blk00000003/sig000001dd ) + ); + LUT5 #( + .INIT ( 32'h00002000 )) + \blk00000003/blk00000805 ( + .I0(\blk00000003/sig000009a6 ), + .I1(\blk00000003/sig000009a7 ), + .I2(\blk00000003/sig000009a8 ), + .I3(\blk00000003/sig000009a9 ), + .I4(\blk00000003/sig000009aa ), + .O(\blk00000003/sig000000c9 ) + ); + LUT3 #( + .INIT ( 8'hF4 )) + \blk00000003/blk00000804 ( + .I0(\blk00000003/sig000001d7 ), + .I1(\blk00000003/sig000001ca ), + .I2(\blk00000003/sig000001e5 ), + .O(\blk00000003/sig000001d6 ) + ); + LUT2 #( + .INIT ( 4'h6 )) + \blk00000003/blk00000803 ( + .I0(\blk00000003/sig00000294 ), + .I1(\blk00000003/sig000001e1 ), + .O(\blk00000003/sig000001d8 ) + ); + LUT3 #( + .INIT ( 8'hD8 )) + \blk00000003/blk00000802 ( + .I0(ce), + .I1(\blk00000003/sig000009ac ), + .I2(\blk00000003/sig000000bc ), + .O(\blk00000003/sig000000bb ) + ); + LUT3 #( + .INIT ( 8'h72 )) + \blk00000003/blk00000801 ( + .I0(ce), + .I1(\blk00000003/sig000009ac ), + .I2(\blk00000003/sig000000ba ), + .O(\blk00000003/sig000000b9 ) + ); + LUT2 #( + .INIT ( 4'h6 )) + \blk00000003/blk00000800 ( + .I0(\blk00000003/sig000000b4 ), + .I1(\blk00000003/sig000001ca ), + .O(\blk00000003/sig000000b5 ) + ); + LUT5 #( + .INIT ( 32'hCEEE8AAA )) + \blk00000003/blk000007ff ( + .I0(\blk00000003/sig000001ca ), + .I1(\blk00000003/sig000001e5 ), + .I2(\blk00000003/sig000001d5 ), + .I3(\blk00000003/sig000001d7 ), + .I4(\blk00000003/sig000001d3 ), + .O(\blk00000003/sig000001d4 ) + ); + LUT4 #( + .INIT ( 16'h8808 )) + \blk00000003/blk000007fe ( + .I0(\blk00000003/sig000001d5 ), + .I1(\blk00000003/sig000009af ), + .I2(\blk00000003/sig000001d7 ), + .I3(\blk00000003/sig000001e5 ), + .O(\blk00000003/sig000001d0 ) + ); + LUT3 #( + .INIT ( 8'h09 )) + \blk00000003/blk000007fd ( + .I0(\blk00000003/sig000009ae ), + .I1(\blk00000003/sig000001e8 ), + .I2(\blk00000003/sig000001e9 ), + .O(\blk00000003/sig000000b0 ) + ); + LUT4 #( + .INIT ( 16'h5540 )) + \blk00000003/blk000007fc ( + .I0(\blk00000003/sig000001e5 ), + .I1(\blk00000003/sig000001d5 ), + .I2(\blk00000003/sig000001d7 ), + .I3(\blk00000003/sig000001d3 ), + .O(\blk00000003/sig000001d2 ) + ); + LUT3 #( + .INIT ( 8'h9A )) + \blk00000003/blk000007fb ( + .I0(\blk00000003/sig00000293 ), + .I1(\blk00000003/sig00000294 ), + .I2(\blk00000003/sig000001e1 ), + .O(\blk00000003/sig000001da ) + ); + LUT4 #( + .INIT ( 16'hFDA8 )) + \blk00000003/blk000007fa ( + .I0(ce), + .I1(\blk00000003/sig000009ac ), + .I2(\blk00000003/sig000009ad ), + .I3(\blk00000003/sig000000b8 ), + .O(\blk00000003/sig000000b7 ) + ); + MUXCY \blk00000003/blk000007f9 ( + .CI(\blk00000003/sig00000049 ), + .DI(NlwRenamedSig_OI_rfd), + .S(\blk00000003/sig000009ab ), + .O(\blk00000003/sig000009a3 ) + ); + MUXCY_L \blk00000003/blk000007f8 ( + .CI(\blk00000003/sig000009a3 ), + .DI(\blk00000003/sig000009aa ), + .S(\blk00000003/sig000009a4 ), + .LO(\blk00000003/sig000009a0 ) + ); + MUXCY_L \blk00000003/blk000007f7 ( + .CI(\blk00000003/sig000009a0 ), + .DI(\blk00000003/sig000009a9 ), + .S(\blk00000003/sig000009a1 ), + .LO(\blk00000003/sig0000099d ) + ); + MUXCY_L \blk00000003/blk000007f6 ( + .CI(\blk00000003/sig0000099d ), + .DI(\blk00000003/sig000009a8 ), + .S(\blk00000003/sig0000099e ), + .LO(\blk00000003/sig0000099a ) + ); + MUXCY_L \blk00000003/blk000007f5 ( + .CI(\blk00000003/sig0000099a ), + .DI(\blk00000003/sig000009a7 ), + .S(\blk00000003/sig0000099b ), + .LO(\blk00000003/sig00000997 ) + ); + MUXCY_D \blk00000003/blk000007f4 ( + .CI(\blk00000003/sig00000997 ), + .DI(\blk00000003/sig000009a6 ), + .S(\blk00000003/sig00000998 ), + .O(\NLW_blk00000003/blk000007f4_O_UNCONNECTED ), + .LO(\NLW_blk00000003/blk000007f4_LO_UNCONNECTED ) + ); + XORCY \blk00000003/blk000007f3 ( + .CI(\blk00000003/sig000009a3 ), + .LI(\blk00000003/sig000009a4 ), + .O(\blk00000003/sig000009a5 ) + ); + XORCY \blk00000003/blk000007f2 ( + .CI(\blk00000003/sig000009a0 ), + .LI(\blk00000003/sig000009a1 ), + .O(\blk00000003/sig000009a2 ) + ); + XORCY \blk00000003/blk000007f1 ( + .CI(\blk00000003/sig0000099d ), + .LI(\blk00000003/sig0000099e ), + .O(\blk00000003/sig0000099f ) + ); + XORCY \blk00000003/blk000007f0 ( + .CI(\blk00000003/sig0000099a ), + .LI(\blk00000003/sig0000099b ), + .O(\blk00000003/sig0000099c ) + ); + XORCY \blk00000003/blk000007ef ( + .CI(\blk00000003/sig00000997 ), + .LI(\blk00000003/sig00000998 ), + .O(\blk00000003/sig00000999 ) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk000007ee ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig00000996 ), + .R(sclr), + .Q(\blk00000003/sig0000004a ) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk000007ed ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig00000995 ), + .R(sclr), + .Q(NlwRenamedSig_OI_dout_2[46]) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk000007ec ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig00000994 ), + .R(sclr), + .Q(NlwRenamedSig_OI_dout_2[45]) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk000007eb ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig00000993 ), + .R(sclr), + .Q(NlwRenamedSig_OI_dout_2[44]) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk000007ea ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig00000992 ), + .R(sclr), + .Q(NlwRenamedSig_OI_dout_2[43]) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk000007e9 ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig00000991 ), + .R(sclr), + .Q(NlwRenamedSig_OI_dout_2[42]) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk000007e8 ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig00000990 ), + .R(sclr), + .Q(NlwRenamedSig_OI_dout_2[41]) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk000007e7 ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig0000098f ), + .R(sclr), + .Q(NlwRenamedSig_OI_dout_2[40]) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk000007e6 ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig0000098e ), + .R(sclr), + .Q(NlwRenamedSig_OI_dout_2[39]) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk000007e5 ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig0000098d ), + .R(sclr), + .Q(NlwRenamedSig_OI_dout_2[38]) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk000007e4 ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig0000098c ), + .R(sclr), + .Q(NlwRenamedSig_OI_dout_2[37]) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk000007e3 ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig0000098b ), + .R(sclr), + .Q(NlwRenamedSig_OI_dout_2[36]) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk000007e2 ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig0000098a ), + .R(sclr), + .Q(NlwRenamedSig_OI_dout_2[35]) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk000007e1 ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig00000989 ), + .R(sclr), + .Q(NlwRenamedSig_OI_dout_2[34]) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk000007e0 ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig00000988 ), + .R(sclr), + .Q(NlwRenamedSig_OI_dout_2[33]) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk000007df ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig00000987 ), + .R(sclr), + .Q(NlwRenamedSig_OI_dout_2[32]) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk000007de ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig00000986 ), + .R(sclr), + .Q(NlwRenamedSig_OI_dout_2[31]) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk000007dd ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig00000985 ), + .R(sclr), + .Q(NlwRenamedSig_OI_dout_2[30]) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk000007dc ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig00000984 ), + .R(sclr), + .Q(NlwRenamedSig_OI_dout_2[29]) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk000007db ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig00000983 ), + .R(sclr), + .Q(NlwRenamedSig_OI_dout_2[28]) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk000007da ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig00000982 ), + .R(sclr), + .Q(NlwRenamedSig_OI_dout_2[27]) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk000007d9 ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig00000981 ), + .R(sclr), + .Q(NlwRenamedSig_OI_dout_2[26]) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk000007d8 ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig00000980 ), + .R(sclr), + .Q(NlwRenamedSig_OI_dout_2[25]) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk000007d7 ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig0000097f ), + .R(sclr), + .Q(NlwRenamedSig_OI_dout_2[24]) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk000007d6 ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig0000097e ), + .R(sclr), + .Q(NlwRenamedSig_OI_dout_2[23]) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk000007d5 ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig0000097d ), + .R(sclr), + .Q(NlwRenamedSig_OI_dout_2[22]) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk000007d4 ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig0000097c ), + .R(sclr), + .Q(NlwRenamedSig_OI_dout_2[21]) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk000007d3 ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig0000097b ), + .R(sclr), + .Q(NlwRenamedSig_OI_dout_2[20]) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk000007d2 ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig0000097a ), + .R(sclr), + .Q(NlwRenamedSig_OI_dout_2[19]) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk000007d1 ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig00000979 ), + .R(sclr), + .Q(NlwRenamedSig_OI_dout_2[18]) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk000007d0 ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig00000978 ), + .R(sclr), + .Q(NlwRenamedSig_OI_dout_2[17]) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk000007cf ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig00000977 ), + .R(sclr), + .Q(NlwRenamedSig_OI_dout_2[16]) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk000007ce ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig00000976 ), + .R(sclr), + .Q(NlwRenamedSig_OI_dout_2[15]) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk000007cd ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig00000975 ), + .R(sclr), + .Q(NlwRenamedSig_OI_dout_2[14]) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk000007cc ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig00000974 ), + .R(sclr), + .Q(NlwRenamedSig_OI_dout_2[13]) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk000007cb ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig00000973 ), + .R(sclr), + .Q(NlwRenamedSig_OI_dout_2[12]) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk000007ca ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig00000972 ), + .R(sclr), + .Q(NlwRenamedSig_OI_dout_2[11]) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk000007c9 ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig00000971 ), + .R(sclr), + .Q(NlwRenamedSig_OI_dout_2[10]) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk000007c8 ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig00000970 ), + .R(sclr), + .Q(NlwRenamedSig_OI_dout_2[9]) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk000007c7 ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig0000096f ), + .R(sclr), + .Q(NlwRenamedSig_OI_dout_2[8]) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk000007c6 ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig0000096e ), + .R(sclr), + .Q(NlwRenamedSig_OI_dout_2[7]) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk000007c5 ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig0000096d ), + .R(sclr), + .Q(NlwRenamedSig_OI_dout_2[6]) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk000007c4 ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig0000096c ), + .R(sclr), + .Q(NlwRenamedSig_OI_dout_2[5]) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk000007c3 ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig0000096b ), + .R(sclr), + .Q(NlwRenamedSig_OI_dout_2[4]) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk000007c2 ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig0000096a ), + .R(sclr), + .Q(NlwRenamedSig_OI_dout_2[3]) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk000007c1 ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig00000969 ), + .R(sclr), + .Q(NlwRenamedSig_OI_dout_2[2]) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk000007c0 ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig00000968 ), + .R(sclr), + .Q(NlwRenamedSig_OI_dout_2[1]) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk000007bf ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig00000967 ), + .R(sclr), + .Q(NlwRenamedSig_OI_dout_2[0]) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk000007be ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig00000966 ), + .R(sclr), + .Q(NlwRenamedSig_OI_dout_1[46]) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk000007bd ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig00000965 ), + .R(sclr), + .Q(NlwRenamedSig_OI_dout_1[45]) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk000007bc ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig00000964 ), + .R(sclr), + .Q(NlwRenamedSig_OI_dout_1[44]) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk000007bb ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig00000963 ), + .R(sclr), + .Q(NlwRenamedSig_OI_dout_1[43]) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk000007ba ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig00000962 ), + .R(sclr), + .Q(NlwRenamedSig_OI_dout_1[42]) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk000007b9 ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig00000961 ), + .R(sclr), + .Q(NlwRenamedSig_OI_dout_1[41]) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk000007b8 ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig00000960 ), + .R(sclr), + .Q(NlwRenamedSig_OI_dout_1[40]) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk000007b7 ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig0000095f ), + .R(sclr), + .Q(NlwRenamedSig_OI_dout_1[39]) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk000007b6 ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig0000095e ), + .R(sclr), + .Q(NlwRenamedSig_OI_dout_1[38]) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk000007b5 ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig0000095d ), + .R(sclr), + .Q(NlwRenamedSig_OI_dout_1[37]) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk000007b4 ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig0000095c ), + .R(sclr), + .Q(NlwRenamedSig_OI_dout_1[36]) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk000007b3 ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig0000095b ), + .R(sclr), + .Q(NlwRenamedSig_OI_dout_1[35]) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk000007b2 ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig0000095a ), + .R(sclr), + .Q(NlwRenamedSig_OI_dout_1[34]) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk000007b1 ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig00000959 ), + .R(sclr), + .Q(NlwRenamedSig_OI_dout_1[33]) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk000007b0 ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig00000958 ), + .R(sclr), + .Q(NlwRenamedSig_OI_dout_1[32]) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk000007af ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig00000957 ), + .R(sclr), + .Q(NlwRenamedSig_OI_dout_1[31]) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk000007ae ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig00000956 ), + .R(sclr), + .Q(NlwRenamedSig_OI_dout_1[30]) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk000007ad ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig00000955 ), + .R(sclr), + .Q(NlwRenamedSig_OI_dout_1[29]) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk000007ac ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig00000954 ), + .R(sclr), + .Q(NlwRenamedSig_OI_dout_1[28]) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk000007ab ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig00000953 ), + .R(sclr), + .Q(NlwRenamedSig_OI_dout_1[27]) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk000007aa ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig00000952 ), + .R(sclr), + .Q(NlwRenamedSig_OI_dout_1[26]) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk000007a9 ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig00000951 ), + .R(sclr), + .Q(NlwRenamedSig_OI_dout_1[25]) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk000007a8 ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig00000950 ), + .R(sclr), + .Q(NlwRenamedSig_OI_dout_1[24]) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk000007a7 ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig0000094f ), + .R(sclr), + .Q(NlwRenamedSig_OI_dout_1[23]) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk000007a6 ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig0000094e ), + .R(sclr), + .Q(NlwRenamedSig_OI_dout_1[22]) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk000007a5 ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig0000094d ), + .R(sclr), + .Q(NlwRenamedSig_OI_dout_1[21]) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk000007a4 ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig0000094c ), + .R(sclr), + .Q(NlwRenamedSig_OI_dout_1[20]) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk000007a3 ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig0000094b ), + .R(sclr), + .Q(NlwRenamedSig_OI_dout_1[19]) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk000007a2 ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig0000094a ), + .R(sclr), + .Q(NlwRenamedSig_OI_dout_1[18]) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk000007a1 ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig00000949 ), + .R(sclr), + .Q(NlwRenamedSig_OI_dout_1[17]) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk000007a0 ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig00000948 ), + .R(sclr), + .Q(NlwRenamedSig_OI_dout_1[16]) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk0000079f ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig00000947 ), + .R(sclr), + .Q(NlwRenamedSig_OI_dout_1[15]) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk0000079e ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig00000946 ), + .R(sclr), + .Q(NlwRenamedSig_OI_dout_1[14]) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk0000079d ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig00000945 ), + .R(sclr), + .Q(NlwRenamedSig_OI_dout_1[13]) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk0000079c ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig00000944 ), + .R(sclr), + .Q(NlwRenamedSig_OI_dout_1[12]) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk0000079b ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig00000943 ), + .R(sclr), + .Q(NlwRenamedSig_OI_dout_1[11]) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk0000079a ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig00000942 ), + .R(sclr), + .Q(NlwRenamedSig_OI_dout_1[10]) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000799 ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig00000941 ), + .R(sclr), + .Q(NlwRenamedSig_OI_dout_1[9]) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000798 ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig00000940 ), + .R(sclr), + .Q(NlwRenamedSig_OI_dout_1[8]) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000797 ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig0000093f ), + .R(sclr), + .Q(NlwRenamedSig_OI_dout_1[7]) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000796 ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig0000093e ), + .R(sclr), + .Q(NlwRenamedSig_OI_dout_1[6]) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000795 ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig0000093d ), + .R(sclr), + .Q(NlwRenamedSig_OI_dout_1[5]) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000794 ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig0000093c ), + .R(sclr), + .Q(NlwRenamedSig_OI_dout_1[4]) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000793 ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig0000093b ), + .R(sclr), + .Q(NlwRenamedSig_OI_dout_1[3]) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000792 ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig0000093a ), + .R(sclr), + .Q(NlwRenamedSig_OI_dout_1[2]) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000791 ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig00000939 ), + .R(sclr), + .Q(NlwRenamedSig_OI_dout_1[1]) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000790 ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig00000938 ), + .R(sclr), + .Q(NlwRenamedSig_OI_dout_1[0]) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk0000078f ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig00000937 ), + .Q(\blk00000003/sig000001dc ) + ); + MUXCY_L \blk00000003/blk0000078e ( + .CI(\blk00000003/sig00000049 ), + .DI(\blk00000003/sig00000936 ), + .S(\blk00000003/sig00000920 ), + .LO(\blk00000003/sig0000092e ) + ); + MUXCY_L \blk00000003/blk0000078d ( + .CI(\blk00000003/sig0000092e ), + .DI(\blk00000003/sig00000935 ), + .S(\blk00000003/sig0000092f ), + .LO(\blk00000003/sig0000092b ) + ); + MUXCY_L \blk00000003/blk0000078c ( + .CI(\blk00000003/sig0000092b ), + .DI(\blk00000003/sig00000934 ), + .S(\blk00000003/sig0000092c ), + .LO(\blk00000003/sig00000928 ) + ); + MUXCY_L \blk00000003/blk0000078b ( + .CI(\blk00000003/sig00000928 ), + .DI(\blk00000003/sig00000933 ), + .S(\blk00000003/sig00000929 ), + .LO(\blk00000003/sig00000925 ) + ); + MUXCY_L \blk00000003/blk0000078a ( + .CI(\blk00000003/sig00000925 ), + .DI(\blk00000003/sig00000932 ), + .S(\blk00000003/sig00000926 ), + .LO(\blk00000003/sig00000922 ) + ); + MUXCY_D \blk00000003/blk00000789 ( + .CI(\blk00000003/sig00000922 ), + .DI(\blk00000003/sig00000931 ), + .S(\blk00000003/sig00000923 ), + .O(\NLW_blk00000003/blk00000789_O_UNCONNECTED ), + .LO(\NLW_blk00000003/blk00000789_LO_UNCONNECTED ) + ); + XORCY \blk00000003/blk00000788 ( + .CI(\blk00000003/sig0000092e ), + .LI(\blk00000003/sig0000092f ), + .O(\blk00000003/sig00000930 ) + ); + XORCY \blk00000003/blk00000787 ( + .CI(\blk00000003/sig0000092b ), + .LI(\blk00000003/sig0000092c ), + .O(\blk00000003/sig0000092d ) + ); + XORCY \blk00000003/blk00000786 ( + .CI(\blk00000003/sig00000928 ), + .LI(\blk00000003/sig00000929 ), + .O(\blk00000003/sig0000092a ) + ); + XORCY \blk00000003/blk00000785 ( + .CI(\blk00000003/sig00000925 ), + .LI(\blk00000003/sig00000926 ), + .O(\blk00000003/sig00000927 ) + ); + XORCY \blk00000003/blk00000784 ( + .CI(\blk00000003/sig00000922 ), + .LI(\blk00000003/sig00000923 ), + .O(\blk00000003/sig00000924 ) + ); + XORCY \blk00000003/blk00000783 ( + .CI(\blk00000003/sig00000049 ), + .LI(\blk00000003/sig00000920 ), + .O(\blk00000003/sig00000921 ) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk0000075b ( + .C(clk), + .CE(\blk00000003/sig0000091e ), + .D(\blk00000003/sig000003d2 ), + .R(sclr), + .Q(\blk00000003/sig00000779 ) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk0000075a ( + .C(clk), + .CE(\blk00000003/sig0000091e ), + .D(\blk00000003/sig000003d1 ), + .R(sclr), + .Q(\blk00000003/sig00000778 ) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000759 ( + .C(clk), + .CE(\blk00000003/sig0000091e ), + .D(\blk00000003/sig000003d0 ), + .R(sclr), + .Q(\blk00000003/sig00000777 ) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000758 ( + .C(clk), + .CE(\blk00000003/sig0000091e ), + .D(\blk00000003/sig000003cf ), + .R(sclr), + .Q(\blk00000003/sig00000776 ) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000757 ( + .C(clk), + .CE(\blk00000003/sig0000091e ), + .D(\blk00000003/sig000003ce ), + .R(sclr), + .Q(\blk00000003/sig00000775 ) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000756 ( + .C(clk), + .CE(\blk00000003/sig0000091e ), + .D(\blk00000003/sig000003cd ), + .R(sclr), + .Q(\blk00000003/sig00000774 ) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000755 ( + .C(clk), + .CE(\blk00000003/sig0000091e ), + .D(\blk00000003/sig000003cc ), + .R(sclr), + .Q(\blk00000003/sig00000773 ) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000754 ( + .C(clk), + .CE(\blk00000003/sig0000091e ), + .D(\blk00000003/sig000003cb ), + .R(sclr), + .Q(\blk00000003/sig00000772 ) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000753 ( + .C(clk), + .CE(\blk00000003/sig0000091e ), + .D(\blk00000003/sig000003ca ), + .R(sclr), + .Q(\blk00000003/sig00000771 ) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000752 ( + .C(clk), + .CE(\blk00000003/sig0000091e ), + .D(\blk00000003/sig000003c9 ), + .R(sclr), + .Q(\blk00000003/sig00000770 ) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000751 ( + .C(clk), + .CE(\blk00000003/sig0000091e ), + .D(\blk00000003/sig000003c8 ), + .R(sclr), + .Q(\blk00000003/sig0000076f ) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000750 ( + .C(clk), + .CE(\blk00000003/sig0000091e ), + .D(\blk00000003/sig000003c7 ), + .R(sclr), + .Q(\blk00000003/sig0000076e ) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk0000074f ( + .C(clk), + .CE(\blk00000003/sig0000091e ), + .D(\blk00000003/sig000003c6 ), + .R(sclr), + .Q(\blk00000003/sig0000076d ) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk0000074e ( + .C(clk), + .CE(\blk00000003/sig0000091e ), + .D(\blk00000003/sig000003c5 ), + .R(sclr), + .Q(\blk00000003/sig0000076c ) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk0000074d ( + .C(clk), + .CE(\blk00000003/sig0000091e ), + .D(\blk00000003/sig000003c4 ), + .R(sclr), + .Q(\blk00000003/sig0000076b ) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk0000074c ( + .C(clk), + .CE(\blk00000003/sig0000091e ), + .D(\blk00000003/sig000003c3 ), + .R(sclr), + .Q(\blk00000003/sig0000076a ) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk0000074b ( + .C(clk), + .CE(\blk00000003/sig0000091e ), + .D(\blk00000003/sig000003c2 ), + .R(sclr), + .Q(\blk00000003/sig00000769 ) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk0000074a ( + .C(clk), + .CE(\blk00000003/sig0000091e ), + .D(\blk00000003/sig000003c1 ), + .R(sclr), + .Q(\blk00000003/sig00000768 ) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000749 ( + .C(clk), + .CE(\blk00000003/sig0000091e ), + .D(\blk00000003/sig000003c0 ), + .R(sclr), + .Q(\blk00000003/sig00000767 ) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000748 ( + .C(clk), + .CE(\blk00000003/sig0000091e ), + .D(\blk00000003/sig000003bf ), + .R(sclr), + .Q(\blk00000003/sig00000766 ) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000747 ( + .C(clk), + .CE(\blk00000003/sig0000091e ), + .D(\blk00000003/sig000003be ), + .R(sclr), + .Q(\blk00000003/sig00000765 ) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000746 ( + .C(clk), + .CE(\blk00000003/sig0000091e ), + .D(\blk00000003/sig000003bd ), + .R(sclr), + .Q(\blk00000003/sig00000764 ) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000745 ( + .C(clk), + .CE(\blk00000003/sig0000091e ), + .D(\blk00000003/sig000003bc ), + .R(sclr), + .Q(\blk00000003/sig00000763 ) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000744 ( + .C(clk), + .CE(\blk00000003/sig0000091e ), + .D(\blk00000003/sig000003bb ), + .R(sclr), + .Q(\blk00000003/sig00000762 ) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000743 ( + .C(clk), + .CE(\blk00000003/sig0000091e ), + .D(\blk00000003/sig00000432 ), + .R(sclr), + .Q(\blk00000003/sig00000791 ) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000742 ( + .C(clk), + .CE(\blk00000003/sig0000091e ), + .D(\blk00000003/sig00000431 ), + .R(sclr), + .Q(\blk00000003/sig00000790 ) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000741 ( + .C(clk), + .CE(\blk00000003/sig0000091e ), + .D(\blk00000003/sig00000430 ), + .R(sclr), + .Q(\blk00000003/sig0000078f ) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000740 ( + .C(clk), + .CE(\blk00000003/sig0000091e ), + .D(\blk00000003/sig0000042f ), + .R(sclr), + .Q(\blk00000003/sig0000078e ) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk0000073f ( + .C(clk), + .CE(\blk00000003/sig0000091e ), + .D(\blk00000003/sig0000042e ), + .R(sclr), + .Q(\blk00000003/sig0000078d ) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk0000073e ( + .C(clk), + .CE(\blk00000003/sig0000091e ), + .D(\blk00000003/sig0000042d ), + .R(sclr), + .Q(\blk00000003/sig0000078c ) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk0000073d ( + .C(clk), + .CE(\blk00000003/sig0000091e ), + .D(\blk00000003/sig0000042c ), + .R(sclr), + .Q(\blk00000003/sig0000078b ) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk0000073c ( + .C(clk), + .CE(\blk00000003/sig0000091e ), + .D(\blk00000003/sig0000042b ), + .R(sclr), + .Q(\blk00000003/sig0000078a ) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk0000073b ( + .C(clk), + .CE(\blk00000003/sig0000091e ), + .D(\blk00000003/sig0000042a ), + .R(sclr), + .Q(\blk00000003/sig00000789 ) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk0000073a ( + .C(clk), + .CE(\blk00000003/sig0000091e ), + .D(\blk00000003/sig00000429 ), + .R(sclr), + .Q(\blk00000003/sig00000788 ) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000739 ( + .C(clk), + .CE(\blk00000003/sig0000091e ), + .D(\blk00000003/sig00000428 ), + .R(sclr), + .Q(\blk00000003/sig00000787 ) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000738 ( + .C(clk), + .CE(\blk00000003/sig0000091e ), + .D(\blk00000003/sig00000427 ), + .R(sclr), + .Q(\blk00000003/sig00000786 ) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000737 ( + .C(clk), + .CE(\blk00000003/sig0000091e ), + .D(\blk00000003/sig00000426 ), + .R(sclr), + .Q(\blk00000003/sig00000785 ) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000736 ( + .C(clk), + .CE(\blk00000003/sig0000091e ), + .D(\blk00000003/sig00000425 ), + .R(sclr), + .Q(\blk00000003/sig00000784 ) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000735 ( + .C(clk), + .CE(\blk00000003/sig0000091e ), + .D(\blk00000003/sig00000424 ), + .R(sclr), + .Q(\blk00000003/sig00000783 ) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000734 ( + .C(clk), + .CE(\blk00000003/sig0000091e ), + .D(\blk00000003/sig00000423 ), + .R(sclr), + .Q(\blk00000003/sig00000782 ) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000733 ( + .C(clk), + .CE(\blk00000003/sig0000091e ), + .D(\blk00000003/sig00000422 ), + .R(sclr), + .Q(\blk00000003/sig00000781 ) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000732 ( + .C(clk), + .CE(\blk00000003/sig0000091e ), + .D(\blk00000003/sig00000421 ), + .R(sclr), + .Q(\blk00000003/sig00000780 ) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000731 ( + .C(clk), + .CE(\blk00000003/sig0000091e ), + .D(\blk00000003/sig00000420 ), + .R(sclr), + .Q(\blk00000003/sig0000077f ) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000730 ( + .C(clk), + .CE(\blk00000003/sig0000091e ), + .D(\blk00000003/sig0000041f ), + .R(sclr), + .Q(\blk00000003/sig0000077e ) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk0000072f ( + .C(clk), + .CE(\blk00000003/sig0000091e ), + .D(\blk00000003/sig0000041e ), + .R(sclr), + .Q(\blk00000003/sig0000077d ) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk0000072e ( + .C(clk), + .CE(\blk00000003/sig0000091e ), + .D(\blk00000003/sig0000041d ), + .R(sclr), + .Q(\blk00000003/sig0000077c ) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk0000072d ( + .C(clk), + .CE(\blk00000003/sig0000091e ), + .D(\blk00000003/sig0000041c ), + .R(sclr), + .Q(\blk00000003/sig0000077b ) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk0000072c ( + .C(clk), + .CE(\blk00000003/sig0000091e ), + .D(\blk00000003/sig0000041b ), + .R(sclr), + .Q(\blk00000003/sig0000077a ) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk0000011f ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig00000295 ), + .R(sclr), + .Q(\blk00000003/sig0000075f ) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk0000011e ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig000002a0 ), + .R(sclr), + .Q(\blk00000003/sig0000075c ) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk0000011d ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig000002a6 ), + .R(sclr), + .Q(\blk00000003/sig0000075b ) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk0000011c ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig00000761 ), + .R(sclr), + .Q(\blk00000003/sig0000075d ) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk0000011b ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig00000760 ), + .R(sclr), + .Q(\blk00000003/sig0000075a ) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk0000011a ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig0000029a ), + .R(sclr), + .Q(\blk00000003/sig0000075e ) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000119 ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig0000075f ), + .R(sclr), + .Q(\blk00000003/sig00000759 ) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000118 ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig0000075e ), + .R(sclr), + .Q(\blk00000003/sig00000758 ) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000117 ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig0000075d ), + .R(sclr), + .Q(\blk00000003/sig00000755 ) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000116 ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig0000075c ), + .R(sclr), + .Q(\blk00000003/sig00000757 ) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000115 ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig0000075b ), + .R(sclr), + .Q(\blk00000003/sig00000756 ) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000114 ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig0000075a ), + .R(sclr), + .Q(\blk00000003/sig00000754 ) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000113 ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig00000759 ), + .R(sclr), + .Q(\blk00000003/sig00000750 ) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000112 ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig00000758 ), + .R(sclr), + .Q(\blk00000003/sig00000751 ) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000111 ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig00000757 ), + .R(sclr), + .Q(\blk00000003/sig00000753 ) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000110 ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig00000756 ), + .R(sclr), + .Q(\blk00000003/sig00000752 ) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk0000010f ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig00000755 ), + .R(sclr), + .Q(\blk00000003/sig0000074e ) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk0000010e ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig00000754 ), + .R(sclr), + .Q(\blk00000003/sig0000074f ) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk0000010d ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig00000753 ), + .R(sclr), + .Q(\blk00000003/sig0000074c ) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk0000010c ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig00000752 ), + .R(sclr), + .Q(\blk00000003/sig0000074a ) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk0000010b ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig00000751 ), + .R(sclr), + .Q(\blk00000003/sig00000748 ) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk0000010a ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig00000750 ), + .R(sclr), + .Q(\blk00000003/sig00000746 ) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000109 ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig0000074f ), + .R(sclr), + .Q(\blk00000003/sig00000744 ) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000108 ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig0000074e ), + .R(sclr), + .Q(\blk00000003/sig00000742 ) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000107 ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig0000074c ), + .R(sclr), + .Q(\blk00000003/sig0000074d ) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000106 ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig0000074a ), + .R(sclr), + .Q(\blk00000003/sig0000074b ) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000105 ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig00000748 ), + .R(sclr), + .Q(\blk00000003/sig00000749 ) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000104 ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig00000746 ), + .R(sclr), + .Q(\blk00000003/sig00000747 ) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000103 ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig00000744 ), + .R(sclr), + .Q(\blk00000003/sig00000745 ) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000102 ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig00000742 ), + .R(sclr), + .Q(\blk00000003/sig00000743 ) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000101 ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig00000740 ), + .R(\blk00000003/sig00000049 ), + .Q(\blk00000003/sig00000741 ) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000100 ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig0000073f ), + .R(\blk00000003/sig00000049 ), + .Q(\blk00000003/sig00000740 ) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk000000ff ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig0000073e ), + .R(\blk00000003/sig00000049 ), + .Q(\blk00000003/sig0000073f ) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk000000fe ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig0000073d ), + .R(\blk00000003/sig00000049 ), + .Q(\blk00000003/sig0000073e ) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk000000fd ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig00000237 ), + .R(\blk00000003/sig00000049 ), + .Q(\blk00000003/sig0000073d ) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk000000fc ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig0000073a ), + .R(\blk00000003/sig00000049 ), + .Q(\blk00000003/sig0000073c ) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk000000fb ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig00000739 ), + .R(\blk00000003/sig00000049 ), + .Q(\blk00000003/sig0000073b ) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk000000fa ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig00000738 ), + .R(\blk00000003/sig00000049 ), + .Q(\blk00000003/sig0000073a ) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk000000f9 ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig00000737 ), + .R(\blk00000003/sig00000049 ), + .Q(\blk00000003/sig00000739 ) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk000000f8 ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig00000736 ), + .R(\blk00000003/sig00000049 ), + .Q(\blk00000003/sig00000738 ) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk000000f7 ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig00000735 ), + .R(\blk00000003/sig00000049 ), + .Q(\blk00000003/sig00000737 ) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk000000f6 ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig00000734 ), + .R(\blk00000003/sig00000049 ), + .Q(\blk00000003/sig00000736 ) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk000000f5 ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig00000733 ), + .R(\blk00000003/sig00000049 ), + .Q(\blk00000003/sig00000735 ) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk000000f4 ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig00000262 ), + .R(\blk00000003/sig00000049 ), + .Q(\blk00000003/sig00000734 ) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk000000f3 ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig0000025f ), + .R(\blk00000003/sig00000049 ), + .Q(\blk00000003/sig00000733 ) + ); + DSP48E1 #( + .ACASCREG ( 1 ), + .ADREG ( 1 ), + .ALUMODEREG ( 0 ), + .AREG ( 1 ), + .AUTORESET_PATDET ( "NO_RESET" ), + .A_INPUT ( "DIRECT" ), + .BCASCREG ( 1 ), + .BREG ( 1 ), + .B_INPUT ( "DIRECT" ), + .CARRYINREG ( 1 ), + .CARRYINSELREG ( 1 ), + .CREG ( 1 ), + .DREG ( 1 ), + .INMODEREG ( 1 ), + .MASK ( 48'hFFFFFFFFFFFE ), + .MREG ( 1 ), + .OPMODEREG ( 0 ), + .PATTERN ( 48'h000000000000 ), + .PREG ( 1 ), + .SEL_MASK ( "MASK" ), + .SEL_PATTERN ( "PATTERN" ), + .USE_DPORT ( "TRUE" ), + .USE_MULT ( "MULTIPLY" ), + .USE_PATTERN_DETECT ( "NO_PATDET" ), + .USE_SIMD ( "ONE48" )) + \blk00000003/blk000000f2 ( + .PATTERNBDETECT(\NLW_blk00000003/blk000000f2_PATTERNBDETECT_UNCONNECTED ), + .RSTC(\blk00000003/sig00000049 ), + .CEB1(\blk00000003/sig00000049 ), + .CEAD(ce), + .MULTSIGNOUT(\NLW_blk00000003/blk000000f2_MULTSIGNOUT_UNCONNECTED ), + .CEC(ce), + .RSTM(\blk00000003/sig00000049 ), + .MULTSIGNIN(\blk00000003/sig00000049 ), + .CEB2(ce), + .RSTCTRL(\blk00000003/sig00000049 ), + .CEP(ce), + .CARRYCASCOUT(\NLW_blk00000003/blk000000f2_CARRYCASCOUT_UNCONNECTED ), + .RSTA(\blk00000003/sig00000049 ), + .CECARRYIN(ce), + .UNDERFLOW(\NLW_blk00000003/blk000000f2_UNDERFLOW_UNCONNECTED ), + .PATTERNDETECT(\NLW_blk00000003/blk000000f2_PATTERNDETECT_UNCONNECTED ), + .RSTALUMODE(\blk00000003/sig00000049 ), + .RSTALLCARRYIN(\blk00000003/sig00000049 ), + .CED(ce), + .RSTD(\blk00000003/sig00000049 ), + .CEALUMODE(ce), + .CEA2(ce), + .CLK(clk), + .CEA1(\blk00000003/sig00000049 ), + .RSTB(\blk00000003/sig00000049 ), + .OVERFLOW(\NLW_blk00000003/blk000000f2_OVERFLOW_UNCONNECTED ), + .CECTRL(ce), + .CEM(ce), + .CARRYIN(\blk00000003/sig00000049 ), + .CARRYCASCIN(\blk00000003/sig00000049 ), + .RSTINMODE(\blk00000003/sig00000049 ), + .CEINMODE(ce), + .RSTP(\blk00000003/sig00000049 ), + .ACOUT({\NLW_blk00000003/blk000000f2_ACOUT<29>_UNCONNECTED , \NLW_blk00000003/blk000000f2_ACOUT<28>_UNCONNECTED , +\NLW_blk00000003/blk000000f2_ACOUT<27>_UNCONNECTED , \NLW_blk00000003/blk000000f2_ACOUT<26>_UNCONNECTED , +\NLW_blk00000003/blk000000f2_ACOUT<25>_UNCONNECTED , \NLW_blk00000003/blk000000f2_ACOUT<24>_UNCONNECTED , +\NLW_blk00000003/blk000000f2_ACOUT<23>_UNCONNECTED , \NLW_blk00000003/blk000000f2_ACOUT<22>_UNCONNECTED , +\NLW_blk00000003/blk000000f2_ACOUT<21>_UNCONNECTED , \NLW_blk00000003/blk000000f2_ACOUT<20>_UNCONNECTED , +\NLW_blk00000003/blk000000f2_ACOUT<19>_UNCONNECTED , \NLW_blk00000003/blk000000f2_ACOUT<18>_UNCONNECTED , +\NLW_blk00000003/blk000000f2_ACOUT<17>_UNCONNECTED , \NLW_blk00000003/blk000000f2_ACOUT<16>_UNCONNECTED , +\NLW_blk00000003/blk000000f2_ACOUT<15>_UNCONNECTED , \NLW_blk00000003/blk000000f2_ACOUT<14>_UNCONNECTED , +\NLW_blk00000003/blk000000f2_ACOUT<13>_UNCONNECTED , \NLW_blk00000003/blk000000f2_ACOUT<12>_UNCONNECTED , +\NLW_blk00000003/blk000000f2_ACOUT<11>_UNCONNECTED , \NLW_blk00000003/blk000000f2_ACOUT<10>_UNCONNECTED , +\NLW_blk00000003/blk000000f2_ACOUT<9>_UNCONNECTED , \NLW_blk00000003/blk000000f2_ACOUT<8>_UNCONNECTED , +\NLW_blk00000003/blk000000f2_ACOUT<7>_UNCONNECTED , \NLW_blk00000003/blk000000f2_ACOUT<6>_UNCONNECTED , +\NLW_blk00000003/blk000000f2_ACOUT<5>_UNCONNECTED , \NLW_blk00000003/blk000000f2_ACOUT<4>_UNCONNECTED , +\NLW_blk00000003/blk000000f2_ACOUT<3>_UNCONNECTED , \NLW_blk00000003/blk000000f2_ACOUT<2>_UNCONNECTED , +\NLW_blk00000003/blk000000f2_ACOUT<1>_UNCONNECTED , \NLW_blk00000003/blk000000f2_ACOUT<0>_UNCONNECTED }), + .OPMODE({\blk00000003/sig00000049 , \blk00000003/sig00000049 , NlwRenamedSig_OI_rfd, \blk00000003/sig00000049 , NlwRenamedSig_OI_rfd, +\blk00000003/sig00000049 , NlwRenamedSig_OI_rfd}), + .PCIN({\blk00000003/sig000006d3 , \blk00000003/sig000006d4 , \blk00000003/sig000006d5 , \blk00000003/sig000006d6 , \blk00000003/sig000006d7 , +\blk00000003/sig000006d8 , \blk00000003/sig000006d9 , \blk00000003/sig000006da , \blk00000003/sig000006db , \blk00000003/sig000006dc , +\blk00000003/sig000006dd , \blk00000003/sig000006de , \blk00000003/sig000006df , \blk00000003/sig000006e0 , \blk00000003/sig000006e1 , +\blk00000003/sig000006e2 , \blk00000003/sig000006e3 , \blk00000003/sig000006e4 , \blk00000003/sig000006e5 , \blk00000003/sig000006e6 , +\blk00000003/sig000006e7 , \blk00000003/sig000006e8 , \blk00000003/sig000006e9 , \blk00000003/sig000006ea , \blk00000003/sig000006eb , +\blk00000003/sig000006ec , \blk00000003/sig000006ed , \blk00000003/sig000006ee , \blk00000003/sig000006ef , \blk00000003/sig000006f0 , +\blk00000003/sig000006f1 , \blk00000003/sig000006f2 , \blk00000003/sig000006f3 , \blk00000003/sig000006f4 , \blk00000003/sig000006f5 , +\blk00000003/sig000006f6 , \blk00000003/sig000006f7 , \blk00000003/sig000006f8 , \blk00000003/sig000006f9 , \blk00000003/sig000006fa , +\blk00000003/sig000006fb , \blk00000003/sig000006fc , \blk00000003/sig000006fd , \blk00000003/sig000006fe , \blk00000003/sig000006ff , +\blk00000003/sig00000700 , \blk00000003/sig00000701 , \blk00000003/sig00000702 }), + .ALUMODE({\blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 }), + .C({\blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , +\blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , +\blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , +\blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , +\blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , +\blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , +\blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , +\blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , +\blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , +\blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 }), + .CARRYOUT({\NLW_blk00000003/blk000000f2_CARRYOUT<3>_UNCONNECTED , \NLW_blk00000003/blk000000f2_CARRYOUT<2>_UNCONNECTED , +\NLW_blk00000003/blk000000f2_CARRYOUT<1>_UNCONNECTED , \NLW_blk00000003/blk000000f2_CARRYOUT<0>_UNCONNECTED }), + .INMODE({\blk00000003/sig00000049 , \blk00000003/sig00000049 , NlwRenamedSig_OI_rfd, \blk00000003/sig00000049 , \blk00000003/sig00000049 }), + .BCIN({\blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , +\blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , +\blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , +\blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 }), + .B({\blk00000003/sig000005a1 , \blk00000003/sig000005a2 , \blk00000003/sig000005a3 , \blk00000003/sig000005a4 , \blk00000003/sig000005a5 , +\blk00000003/sig000005a6 , \blk00000003/sig000005a7 , \blk00000003/sig000005a8 , \blk00000003/sig000005a9 , \blk00000003/sig000005aa , +\blk00000003/sig000005ab , \blk00000003/sig000005ac , \blk00000003/sig000005ad , \blk00000003/sig000005ae , \blk00000003/sig000005af , +\blk00000003/sig000005b0 , \blk00000003/sig000005b1 , \blk00000003/sig000005b2 }), + .BCOUT({\NLW_blk00000003/blk000000f2_BCOUT<17>_UNCONNECTED , \NLW_blk00000003/blk000000f2_BCOUT<16>_UNCONNECTED , +\NLW_blk00000003/blk000000f2_BCOUT<15>_UNCONNECTED , \NLW_blk00000003/blk000000f2_BCOUT<14>_UNCONNECTED , +\NLW_blk00000003/blk000000f2_BCOUT<13>_UNCONNECTED , \NLW_blk00000003/blk000000f2_BCOUT<12>_UNCONNECTED , +\NLW_blk00000003/blk000000f2_BCOUT<11>_UNCONNECTED , \NLW_blk00000003/blk000000f2_BCOUT<10>_UNCONNECTED , +\NLW_blk00000003/blk000000f2_BCOUT<9>_UNCONNECTED , \NLW_blk00000003/blk000000f2_BCOUT<8>_UNCONNECTED , +\NLW_blk00000003/blk000000f2_BCOUT<7>_UNCONNECTED , \NLW_blk00000003/blk000000f2_BCOUT<6>_UNCONNECTED , +\NLW_blk00000003/blk000000f2_BCOUT<5>_UNCONNECTED , \NLW_blk00000003/blk000000f2_BCOUT<4>_UNCONNECTED , +\NLW_blk00000003/blk000000f2_BCOUT<3>_UNCONNECTED , \NLW_blk00000003/blk000000f2_BCOUT<2>_UNCONNECTED , +\NLW_blk00000003/blk000000f2_BCOUT<1>_UNCONNECTED , \NLW_blk00000003/blk000000f2_BCOUT<0>_UNCONNECTED }), + .D({\blk00000003/sig00000703 , \blk00000003/sig00000703 , \blk00000003/sig00000704 , \blk00000003/sig00000705 , \blk00000003/sig00000706 , +\blk00000003/sig00000707 , \blk00000003/sig00000708 , \blk00000003/sig00000709 , \blk00000003/sig0000070a , \blk00000003/sig0000070b , +\blk00000003/sig0000070c , \blk00000003/sig0000070d , \blk00000003/sig0000070e , \blk00000003/sig0000070f , \blk00000003/sig00000710 , +\blk00000003/sig00000711 , \blk00000003/sig00000712 , \blk00000003/sig00000713 , \blk00000003/sig00000714 , \blk00000003/sig00000715 , +\blk00000003/sig00000716 , \blk00000003/sig00000717 , \blk00000003/sig00000718 , \blk00000003/sig00000719 , \blk00000003/sig0000071a }), + .P({\NLW_blk00000003/blk000000f2_P<47>_UNCONNECTED , \NLW_blk00000003/blk000000f2_P<46>_UNCONNECTED , +\NLW_blk00000003/blk000000f2_P<45>_UNCONNECTED , \NLW_blk00000003/blk000000f2_P<44>_UNCONNECTED , \NLW_blk00000003/blk000000f2_P<43>_UNCONNECTED , +\NLW_blk00000003/blk000000f2_P<42>_UNCONNECTED , \NLW_blk00000003/blk000000f2_P<41>_UNCONNECTED , \NLW_blk00000003/blk000000f2_P<40>_UNCONNECTED , +\NLW_blk00000003/blk000000f2_P<39>_UNCONNECTED , \NLW_blk00000003/blk000000f2_P<38>_UNCONNECTED , \NLW_blk00000003/blk000000f2_P<37>_UNCONNECTED , +\NLW_blk00000003/blk000000f2_P<36>_UNCONNECTED , \NLW_blk00000003/blk000000f2_P<35>_UNCONNECTED , \NLW_blk00000003/blk000000f2_P<34>_UNCONNECTED , +\NLW_blk00000003/blk000000f2_P<33>_UNCONNECTED , \NLW_blk00000003/blk000000f2_P<32>_UNCONNECTED , \NLW_blk00000003/blk000000f2_P<31>_UNCONNECTED , +\NLW_blk00000003/blk000000f2_P<30>_UNCONNECTED , \NLW_blk00000003/blk000000f2_P<29>_UNCONNECTED , \NLW_blk00000003/blk000000f2_P<28>_UNCONNECTED , +\NLW_blk00000003/blk000000f2_P<27>_UNCONNECTED , \NLW_blk00000003/blk000000f2_P<26>_UNCONNECTED , \NLW_blk00000003/blk000000f2_P<25>_UNCONNECTED , +\NLW_blk00000003/blk000000f2_P<24>_UNCONNECTED , \NLW_blk00000003/blk000000f2_P<23>_UNCONNECTED , \NLW_blk00000003/blk000000f2_P<22>_UNCONNECTED , +\NLW_blk00000003/blk000000f2_P<21>_UNCONNECTED , \NLW_blk00000003/blk000000f2_P<20>_UNCONNECTED , \NLW_blk00000003/blk000000f2_P<19>_UNCONNECTED , +\NLW_blk00000003/blk000000f2_P<18>_UNCONNECTED , \NLW_blk00000003/blk000000f2_P<17>_UNCONNECTED , \NLW_blk00000003/blk000000f2_P<16>_UNCONNECTED , +\NLW_blk00000003/blk000000f2_P<15>_UNCONNECTED , \NLW_blk00000003/blk000000f2_P<14>_UNCONNECTED , \NLW_blk00000003/blk000000f2_P<13>_UNCONNECTED , +\NLW_blk00000003/blk000000f2_P<12>_UNCONNECTED , \NLW_blk00000003/blk000000f2_P<11>_UNCONNECTED , \NLW_blk00000003/blk000000f2_P<10>_UNCONNECTED , +\NLW_blk00000003/blk000000f2_P<9>_UNCONNECTED , \NLW_blk00000003/blk000000f2_P<8>_UNCONNECTED , \NLW_blk00000003/blk000000f2_P<7>_UNCONNECTED , +\NLW_blk00000003/blk000000f2_P<6>_UNCONNECTED , \NLW_blk00000003/blk000000f2_P<5>_UNCONNECTED , \NLW_blk00000003/blk000000f2_P<4>_UNCONNECTED , +\NLW_blk00000003/blk000000f2_P<3>_UNCONNECTED , \NLW_blk00000003/blk000000f2_P<2>_UNCONNECTED , \NLW_blk00000003/blk000000f2_P<1>_UNCONNECTED , +\NLW_blk00000003/blk000000f2_P<0>_UNCONNECTED }), + .A({\blk00000003/sig0000071b , \blk00000003/sig0000071b , \blk00000003/sig0000071b , \blk00000003/sig0000071b , \blk00000003/sig0000071b , +\blk00000003/sig0000071b , \blk00000003/sig0000071b , \blk00000003/sig0000071c , \blk00000003/sig0000071d , \blk00000003/sig0000071e , +\blk00000003/sig0000071f , \blk00000003/sig00000720 , \blk00000003/sig00000721 , \blk00000003/sig00000722 , \blk00000003/sig00000723 , +\blk00000003/sig00000724 , \blk00000003/sig00000725 , \blk00000003/sig00000726 , \blk00000003/sig00000727 , \blk00000003/sig00000728 , +\blk00000003/sig00000729 , \blk00000003/sig0000072a , \blk00000003/sig0000072b , \blk00000003/sig0000072c , \blk00000003/sig0000072d , +\blk00000003/sig0000072e , \blk00000003/sig0000072f , \blk00000003/sig00000730 , \blk00000003/sig00000731 , \blk00000003/sig00000732 }), + .PCOUT({\blk00000003/sig000003eb , \blk00000003/sig000003ec , \blk00000003/sig000003ed , \blk00000003/sig000003ee , \blk00000003/sig000003ef , +\blk00000003/sig000003f0 , \blk00000003/sig000003f1 , \blk00000003/sig000003f2 , \blk00000003/sig000003f3 , \blk00000003/sig000003f4 , +\blk00000003/sig000003f5 , \blk00000003/sig000003f6 , \blk00000003/sig000003f7 , \blk00000003/sig000003f8 , \blk00000003/sig000003f9 , +\blk00000003/sig000003fa , \blk00000003/sig000003fb , \blk00000003/sig000003fc , \blk00000003/sig000003fd , \blk00000003/sig000003fe , +\blk00000003/sig000003ff , \blk00000003/sig00000400 , \blk00000003/sig00000401 , \blk00000003/sig00000402 , \blk00000003/sig00000403 , +\blk00000003/sig00000404 , \blk00000003/sig00000405 , \blk00000003/sig00000406 , \blk00000003/sig00000407 , \blk00000003/sig00000408 , +\blk00000003/sig00000409 , \blk00000003/sig0000040a , \blk00000003/sig0000040b , \blk00000003/sig0000040c , \blk00000003/sig0000040d , +\blk00000003/sig0000040e , \blk00000003/sig0000040f , \blk00000003/sig00000410 , \blk00000003/sig00000411 , \blk00000003/sig00000412 , +\blk00000003/sig00000413 , \blk00000003/sig00000414 , \blk00000003/sig00000415 , \blk00000003/sig00000416 , \blk00000003/sig00000417 , +\blk00000003/sig00000418 , \blk00000003/sig00000419 , \blk00000003/sig0000041a }), + .ACIN({\blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , +\blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , +\blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , +\blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , +\blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , +\blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 }), + .CARRYINSEL({\blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 }) + ); + DSP48E1 #( + .ACASCREG ( 1 ), + .ADREG ( 1 ), + .ALUMODEREG ( 0 ), + .AREG ( 1 ), + .AUTORESET_PATDET ( "NO_RESET" ), + .A_INPUT ( "DIRECT" ), + .BCASCREG ( 1 ), + .BREG ( 1 ), + .B_INPUT ( "DIRECT" ), + .CARRYINREG ( 1 ), + .CARRYINSELREG ( 1 ), + .CREG ( 1 ), + .DREG ( 1 ), + .INMODEREG ( 1 ), + .MASK ( 48'hFFFFFFFFFFFE ), + .MREG ( 1 ), + .OPMODEREG ( 0 ), + .PATTERN ( 48'h000000000000 ), + .PREG ( 1 ), + .SEL_MASK ( "MASK" ), + .SEL_PATTERN ( "PATTERN" ), + .USE_DPORT ( "TRUE" ), + .USE_MULT ( "MULTIPLY" ), + .USE_PATTERN_DETECT ( "NO_PATDET" ), + .USE_SIMD ( "ONE48" )) + \blk00000003/blk000000f1 ( + .PATTERNBDETECT(\NLW_blk00000003/blk000000f1_PATTERNBDETECT_UNCONNECTED ), + .RSTC(\blk00000003/sig00000049 ), + .CEB1(\blk00000003/sig00000049 ), + .CEAD(ce), + .MULTSIGNOUT(\NLW_blk00000003/blk000000f1_MULTSIGNOUT_UNCONNECTED ), + .CEC(ce), + .RSTM(\blk00000003/sig00000049 ), + .MULTSIGNIN(\blk00000003/sig00000049 ), + .CEB2(ce), + .RSTCTRL(\blk00000003/sig00000049 ), + .CEP(ce), + .CARRYCASCOUT(\NLW_blk00000003/blk000000f1_CARRYCASCOUT_UNCONNECTED ), + .RSTA(\blk00000003/sig00000049 ), + .CECARRYIN(ce), + .UNDERFLOW(\NLW_blk00000003/blk000000f1_UNDERFLOW_UNCONNECTED ), + .PATTERNDETECT(\NLW_blk00000003/blk000000f1_PATTERNDETECT_UNCONNECTED ), + .RSTALUMODE(\blk00000003/sig00000049 ), + .RSTALLCARRYIN(\blk00000003/sig00000049 ), + .CED(ce), + .RSTD(\blk00000003/sig00000049 ), + .CEALUMODE(ce), + .CEA2(ce), + .CLK(clk), + .CEA1(\blk00000003/sig00000049 ), + .RSTB(\blk00000003/sig00000049 ), + .OVERFLOW(\NLW_blk00000003/blk000000f1_OVERFLOW_UNCONNECTED ), + .CECTRL(ce), + .CEM(ce), + .CARRYIN(\blk00000003/sig00000049 ), + .CARRYCASCIN(\blk00000003/sig00000049 ), + .RSTINMODE(\blk00000003/sig00000049 ), + .CEINMODE(ce), + .RSTP(\blk00000003/sig00000049 ), + .ACOUT({\NLW_blk00000003/blk000000f1_ACOUT<29>_UNCONNECTED , \NLW_blk00000003/blk000000f1_ACOUT<28>_UNCONNECTED , +\NLW_blk00000003/blk000000f1_ACOUT<27>_UNCONNECTED , \NLW_blk00000003/blk000000f1_ACOUT<26>_UNCONNECTED , +\NLW_blk00000003/blk000000f1_ACOUT<25>_UNCONNECTED , \NLW_blk00000003/blk000000f1_ACOUT<24>_UNCONNECTED , +\NLW_blk00000003/blk000000f1_ACOUT<23>_UNCONNECTED , \NLW_blk00000003/blk000000f1_ACOUT<22>_UNCONNECTED , +\NLW_blk00000003/blk000000f1_ACOUT<21>_UNCONNECTED , \NLW_blk00000003/blk000000f1_ACOUT<20>_UNCONNECTED , +\NLW_blk00000003/blk000000f1_ACOUT<19>_UNCONNECTED , \NLW_blk00000003/blk000000f1_ACOUT<18>_UNCONNECTED , +\NLW_blk00000003/blk000000f1_ACOUT<17>_UNCONNECTED , \NLW_blk00000003/blk000000f1_ACOUT<16>_UNCONNECTED , +\NLW_blk00000003/blk000000f1_ACOUT<15>_UNCONNECTED , \NLW_blk00000003/blk000000f1_ACOUT<14>_UNCONNECTED , +\NLW_blk00000003/blk000000f1_ACOUT<13>_UNCONNECTED , \NLW_blk00000003/blk000000f1_ACOUT<12>_UNCONNECTED , +\NLW_blk00000003/blk000000f1_ACOUT<11>_UNCONNECTED , \NLW_blk00000003/blk000000f1_ACOUT<10>_UNCONNECTED , +\NLW_blk00000003/blk000000f1_ACOUT<9>_UNCONNECTED , \NLW_blk00000003/blk000000f1_ACOUT<8>_UNCONNECTED , +\NLW_blk00000003/blk000000f1_ACOUT<7>_UNCONNECTED , \NLW_blk00000003/blk000000f1_ACOUT<6>_UNCONNECTED , +\NLW_blk00000003/blk000000f1_ACOUT<5>_UNCONNECTED , \NLW_blk00000003/blk000000f1_ACOUT<4>_UNCONNECTED , +\NLW_blk00000003/blk000000f1_ACOUT<3>_UNCONNECTED , \NLW_blk00000003/blk000000f1_ACOUT<2>_UNCONNECTED , +\NLW_blk00000003/blk000000f1_ACOUT<1>_UNCONNECTED , \NLW_blk00000003/blk000000f1_ACOUT<0>_UNCONNECTED }), + .OPMODE({\blk00000003/sig00000049 , \blk00000003/sig00000049 , NlwRenamedSig_OI_rfd, \blk00000003/sig00000049 , NlwRenamedSig_OI_rfd, +\blk00000003/sig00000049 , NlwRenamedSig_OI_rfd}), + .PCIN({\blk00000003/sig00000673 , \blk00000003/sig00000674 , \blk00000003/sig00000675 , \blk00000003/sig00000676 , \blk00000003/sig00000677 , +\blk00000003/sig00000678 , \blk00000003/sig00000679 , \blk00000003/sig0000067a , \blk00000003/sig0000067b , \blk00000003/sig0000067c , +\blk00000003/sig0000067d , \blk00000003/sig0000067e , \blk00000003/sig0000067f , \blk00000003/sig00000680 , \blk00000003/sig00000681 , +\blk00000003/sig00000682 , \blk00000003/sig00000683 , \blk00000003/sig00000684 , \blk00000003/sig00000685 , \blk00000003/sig00000686 , +\blk00000003/sig00000687 , \blk00000003/sig00000688 , \blk00000003/sig00000689 , \blk00000003/sig0000068a , \blk00000003/sig0000068b , +\blk00000003/sig0000068c , \blk00000003/sig0000068d , \blk00000003/sig0000068e , \blk00000003/sig0000068f , \blk00000003/sig00000690 , +\blk00000003/sig00000691 , \blk00000003/sig00000692 , \blk00000003/sig00000693 , \blk00000003/sig00000694 , \blk00000003/sig00000695 , +\blk00000003/sig00000696 , \blk00000003/sig00000697 , \blk00000003/sig00000698 , \blk00000003/sig00000699 , \blk00000003/sig0000069a , +\blk00000003/sig0000069b , \blk00000003/sig0000069c , \blk00000003/sig0000069d , \blk00000003/sig0000069e , \blk00000003/sig0000069f , +\blk00000003/sig000006a0 , \blk00000003/sig000006a1 , \blk00000003/sig000006a2 }), + .ALUMODE({\blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 }), + .C({\blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , +\blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , +\blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , +\blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , +\blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , +\blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , +\blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , +\blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , +\blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , +\blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 }), + .CARRYOUT({\NLW_blk00000003/blk000000f1_CARRYOUT<3>_UNCONNECTED , \NLW_blk00000003/blk000000f1_CARRYOUT<2>_UNCONNECTED , +\NLW_blk00000003/blk000000f1_CARRYOUT<1>_UNCONNECTED , \NLW_blk00000003/blk000000f1_CARRYOUT<0>_UNCONNECTED }), + .INMODE({\blk00000003/sig00000049 , \blk00000003/sig00000049 , NlwRenamedSig_OI_rfd, \blk00000003/sig00000049 , \blk00000003/sig00000049 }), + .BCIN({\blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , +\blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , +\blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , +\blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 }), + .B({\blk00000003/sig0000052f , \blk00000003/sig00000530 , \blk00000003/sig00000531 , \blk00000003/sig00000532 , \blk00000003/sig00000533 , +\blk00000003/sig00000534 , \blk00000003/sig00000535 , \blk00000003/sig00000536 , \blk00000003/sig00000537 , \blk00000003/sig00000538 , +\blk00000003/sig00000539 , \blk00000003/sig0000053a , \blk00000003/sig0000053b , \blk00000003/sig0000053c , \blk00000003/sig0000053d , +\blk00000003/sig0000053e , \blk00000003/sig0000053f , \blk00000003/sig00000540 }), + .BCOUT({\NLW_blk00000003/blk000000f1_BCOUT<17>_UNCONNECTED , \NLW_blk00000003/blk000000f1_BCOUT<16>_UNCONNECTED , +\NLW_blk00000003/blk000000f1_BCOUT<15>_UNCONNECTED , \NLW_blk00000003/blk000000f1_BCOUT<14>_UNCONNECTED , +\NLW_blk00000003/blk000000f1_BCOUT<13>_UNCONNECTED , \NLW_blk00000003/blk000000f1_BCOUT<12>_UNCONNECTED , +\NLW_blk00000003/blk000000f1_BCOUT<11>_UNCONNECTED , \NLW_blk00000003/blk000000f1_BCOUT<10>_UNCONNECTED , +\NLW_blk00000003/blk000000f1_BCOUT<9>_UNCONNECTED , \NLW_blk00000003/blk000000f1_BCOUT<8>_UNCONNECTED , +\NLW_blk00000003/blk000000f1_BCOUT<7>_UNCONNECTED , \NLW_blk00000003/blk000000f1_BCOUT<6>_UNCONNECTED , +\NLW_blk00000003/blk000000f1_BCOUT<5>_UNCONNECTED , \NLW_blk00000003/blk000000f1_BCOUT<4>_UNCONNECTED , +\NLW_blk00000003/blk000000f1_BCOUT<3>_UNCONNECTED , \NLW_blk00000003/blk000000f1_BCOUT<2>_UNCONNECTED , +\NLW_blk00000003/blk000000f1_BCOUT<1>_UNCONNECTED , \NLW_blk00000003/blk000000f1_BCOUT<0>_UNCONNECTED }), + .D({\blk00000003/sig000006a3 , \blk00000003/sig000006a3 , \blk00000003/sig000006a4 , \blk00000003/sig000006a5 , \blk00000003/sig000006a6 , +\blk00000003/sig000006a7 , \blk00000003/sig000006a8 , \blk00000003/sig000006a9 , \blk00000003/sig000006aa , \blk00000003/sig000006ab , +\blk00000003/sig000006ac , \blk00000003/sig000006ad , \blk00000003/sig000006ae , \blk00000003/sig000006af , \blk00000003/sig000006b0 , +\blk00000003/sig000006b1 , \blk00000003/sig000006b2 , \blk00000003/sig000006b3 , \blk00000003/sig000006b4 , \blk00000003/sig000006b5 , +\blk00000003/sig000006b6 , \blk00000003/sig000006b7 , \blk00000003/sig000006b8 , \blk00000003/sig000006b9 , \blk00000003/sig000006ba }), + .P({\NLW_blk00000003/blk000000f1_P<47>_UNCONNECTED , \NLW_blk00000003/blk000000f1_P<46>_UNCONNECTED , +\NLW_blk00000003/blk000000f1_P<45>_UNCONNECTED , \NLW_blk00000003/blk000000f1_P<44>_UNCONNECTED , \NLW_blk00000003/blk000000f1_P<43>_UNCONNECTED , +\NLW_blk00000003/blk000000f1_P<42>_UNCONNECTED , \NLW_blk00000003/blk000000f1_P<41>_UNCONNECTED , \NLW_blk00000003/blk000000f1_P<40>_UNCONNECTED , +\NLW_blk00000003/blk000000f1_P<39>_UNCONNECTED , \NLW_blk00000003/blk000000f1_P<38>_UNCONNECTED , \NLW_blk00000003/blk000000f1_P<37>_UNCONNECTED , +\NLW_blk00000003/blk000000f1_P<36>_UNCONNECTED , \NLW_blk00000003/blk000000f1_P<35>_UNCONNECTED , \NLW_blk00000003/blk000000f1_P<34>_UNCONNECTED , +\NLW_blk00000003/blk000000f1_P<33>_UNCONNECTED , \NLW_blk00000003/blk000000f1_P<32>_UNCONNECTED , \NLW_blk00000003/blk000000f1_P<31>_UNCONNECTED , +\NLW_blk00000003/blk000000f1_P<30>_UNCONNECTED , \NLW_blk00000003/blk000000f1_P<29>_UNCONNECTED , \NLW_blk00000003/blk000000f1_P<28>_UNCONNECTED , +\NLW_blk00000003/blk000000f1_P<27>_UNCONNECTED , \NLW_blk00000003/blk000000f1_P<26>_UNCONNECTED , \NLW_blk00000003/blk000000f1_P<25>_UNCONNECTED , +\NLW_blk00000003/blk000000f1_P<24>_UNCONNECTED , \NLW_blk00000003/blk000000f1_P<23>_UNCONNECTED , \NLW_blk00000003/blk000000f1_P<22>_UNCONNECTED , +\NLW_blk00000003/blk000000f1_P<21>_UNCONNECTED , \NLW_blk00000003/blk000000f1_P<20>_UNCONNECTED , \NLW_blk00000003/blk000000f1_P<19>_UNCONNECTED , +\NLW_blk00000003/blk000000f1_P<18>_UNCONNECTED , \NLW_blk00000003/blk000000f1_P<17>_UNCONNECTED , \NLW_blk00000003/blk000000f1_P<16>_UNCONNECTED , +\NLW_blk00000003/blk000000f1_P<15>_UNCONNECTED , \NLW_blk00000003/blk000000f1_P<14>_UNCONNECTED , \NLW_blk00000003/blk000000f1_P<13>_UNCONNECTED , +\NLW_blk00000003/blk000000f1_P<12>_UNCONNECTED , \NLW_blk00000003/blk000000f1_P<11>_UNCONNECTED , \NLW_blk00000003/blk000000f1_P<10>_UNCONNECTED , +\NLW_blk00000003/blk000000f1_P<9>_UNCONNECTED , \NLW_blk00000003/blk000000f1_P<8>_UNCONNECTED , \NLW_blk00000003/blk000000f1_P<7>_UNCONNECTED , +\NLW_blk00000003/blk000000f1_P<6>_UNCONNECTED , \NLW_blk00000003/blk000000f1_P<5>_UNCONNECTED , \NLW_blk00000003/blk000000f1_P<4>_UNCONNECTED , +\NLW_blk00000003/blk000000f1_P<3>_UNCONNECTED , \NLW_blk00000003/blk000000f1_P<2>_UNCONNECTED , \NLW_blk00000003/blk000000f1_P<1>_UNCONNECTED , +\NLW_blk00000003/blk000000f1_P<0>_UNCONNECTED }), + .A({\blk00000003/sig000006bb , \blk00000003/sig000006bb , \blk00000003/sig000006bb , \blk00000003/sig000006bb , \blk00000003/sig000006bb , +\blk00000003/sig000006bb , \blk00000003/sig000006bb , \blk00000003/sig000006bc , \blk00000003/sig000006bd , \blk00000003/sig000006be , +\blk00000003/sig000006bf , \blk00000003/sig000006c0 , \blk00000003/sig000006c1 , \blk00000003/sig000006c2 , \blk00000003/sig000006c3 , +\blk00000003/sig000006c4 , \blk00000003/sig000006c5 , \blk00000003/sig000006c6 , \blk00000003/sig000006c7 , \blk00000003/sig000006c8 , +\blk00000003/sig000006c9 , \blk00000003/sig000006ca , \blk00000003/sig000006cb , \blk00000003/sig000006cc , \blk00000003/sig000006cd , +\blk00000003/sig000006ce , \blk00000003/sig000006cf , \blk00000003/sig000006d0 , \blk00000003/sig000006d1 , \blk00000003/sig000006d2 }), + .PCOUT({\blk00000003/sig000006d3 , \blk00000003/sig000006d4 , \blk00000003/sig000006d5 , \blk00000003/sig000006d6 , \blk00000003/sig000006d7 , +\blk00000003/sig000006d8 , \blk00000003/sig000006d9 , \blk00000003/sig000006da , \blk00000003/sig000006db , \blk00000003/sig000006dc , +\blk00000003/sig000006dd , \blk00000003/sig000006de , \blk00000003/sig000006df , \blk00000003/sig000006e0 , \blk00000003/sig000006e1 , +\blk00000003/sig000006e2 , \blk00000003/sig000006e3 , \blk00000003/sig000006e4 , \blk00000003/sig000006e5 , \blk00000003/sig000006e6 , +\blk00000003/sig000006e7 , \blk00000003/sig000006e8 , \blk00000003/sig000006e9 , \blk00000003/sig000006ea , \blk00000003/sig000006eb , +\blk00000003/sig000006ec , \blk00000003/sig000006ed , \blk00000003/sig000006ee , \blk00000003/sig000006ef , \blk00000003/sig000006f0 , +\blk00000003/sig000006f1 , \blk00000003/sig000006f2 , \blk00000003/sig000006f3 , \blk00000003/sig000006f4 , \blk00000003/sig000006f5 , +\blk00000003/sig000006f6 , \blk00000003/sig000006f7 , \blk00000003/sig000006f8 , \blk00000003/sig000006f9 , \blk00000003/sig000006fa , +\blk00000003/sig000006fb , \blk00000003/sig000006fc , \blk00000003/sig000006fd , \blk00000003/sig000006fe , \blk00000003/sig000006ff , +\blk00000003/sig00000700 , \blk00000003/sig00000701 , \blk00000003/sig00000702 }), + .ACIN({\blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , +\blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , +\blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , +\blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , +\blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , +\blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 }), + .CARRYINSEL({\blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 }) + ); + DSP48E1 #( + .ACASCREG ( 1 ), + .ADREG ( 1 ), + .ALUMODEREG ( 0 ), + .AREG ( 1 ), + .AUTORESET_PATDET ( "NO_RESET" ), + .A_INPUT ( "DIRECT" ), + .BCASCREG ( 1 ), + .BREG ( 1 ), + .B_INPUT ( "DIRECT" ), + .CARRYINREG ( 1 ), + .CARRYINSELREG ( 1 ), + .CREG ( 1 ), + .DREG ( 1 ), + .INMODEREG ( 1 ), + .MASK ( 48'hFFFFFFFFFFFE ), + .MREG ( 1 ), + .OPMODEREG ( 0 ), + .PATTERN ( 48'h000000000000 ), + .PREG ( 1 ), + .SEL_MASK ( "MASK" ), + .SEL_PATTERN ( "PATTERN" ), + .USE_DPORT ( "TRUE" ), + .USE_MULT ( "MULTIPLY" ), + .USE_PATTERN_DETECT ( "NO_PATDET" ), + .USE_SIMD ( "ONE48" )) + \blk00000003/blk000000f0 ( + .PATTERNBDETECT(\NLW_blk00000003/blk000000f0_PATTERNBDETECT_UNCONNECTED ), + .RSTC(\blk00000003/sig00000049 ), + .CEB1(\blk00000003/sig00000049 ), + .CEAD(ce), + .MULTSIGNOUT(\NLW_blk00000003/blk000000f0_MULTSIGNOUT_UNCONNECTED ), + .CEC(ce), + .RSTM(\blk00000003/sig00000049 ), + .MULTSIGNIN(\blk00000003/sig00000049 ), + .CEB2(ce), + .RSTCTRL(\blk00000003/sig00000049 ), + .CEP(ce), + .CARRYCASCOUT(\NLW_blk00000003/blk000000f0_CARRYCASCOUT_UNCONNECTED ), + .RSTA(\blk00000003/sig00000049 ), + .CECARRYIN(ce), + .UNDERFLOW(\NLW_blk00000003/blk000000f0_UNDERFLOW_UNCONNECTED ), + .PATTERNDETECT(\NLW_blk00000003/blk000000f0_PATTERNDETECT_UNCONNECTED ), + .RSTALUMODE(\blk00000003/sig00000049 ), + .RSTALLCARRYIN(\blk00000003/sig00000049 ), + .CED(ce), + .RSTD(\blk00000003/sig00000049 ), + .CEALUMODE(ce), + .CEA2(ce), + .CLK(clk), + .CEA1(\blk00000003/sig00000049 ), + .RSTB(\blk00000003/sig00000049 ), + .OVERFLOW(\NLW_blk00000003/blk000000f0_OVERFLOW_UNCONNECTED ), + .CECTRL(ce), + .CEM(ce), + .CARRYIN(\blk00000003/sig00000049 ), + .CARRYCASCIN(\blk00000003/sig00000049 ), + .RSTINMODE(\blk00000003/sig00000049 ), + .CEINMODE(ce), + .RSTP(\blk00000003/sig00000049 ), + .ACOUT({\NLW_blk00000003/blk000000f0_ACOUT<29>_UNCONNECTED , \NLW_blk00000003/blk000000f0_ACOUT<28>_UNCONNECTED , +\NLW_blk00000003/blk000000f0_ACOUT<27>_UNCONNECTED , \NLW_blk00000003/blk000000f0_ACOUT<26>_UNCONNECTED , +\NLW_blk00000003/blk000000f0_ACOUT<25>_UNCONNECTED , \NLW_blk00000003/blk000000f0_ACOUT<24>_UNCONNECTED , +\NLW_blk00000003/blk000000f0_ACOUT<23>_UNCONNECTED , \NLW_blk00000003/blk000000f0_ACOUT<22>_UNCONNECTED , +\NLW_blk00000003/blk000000f0_ACOUT<21>_UNCONNECTED , \NLW_blk00000003/blk000000f0_ACOUT<20>_UNCONNECTED , +\NLW_blk00000003/blk000000f0_ACOUT<19>_UNCONNECTED , \NLW_blk00000003/blk000000f0_ACOUT<18>_UNCONNECTED , +\NLW_blk00000003/blk000000f0_ACOUT<17>_UNCONNECTED , \NLW_blk00000003/blk000000f0_ACOUT<16>_UNCONNECTED , +\NLW_blk00000003/blk000000f0_ACOUT<15>_UNCONNECTED , \NLW_blk00000003/blk000000f0_ACOUT<14>_UNCONNECTED , +\NLW_blk00000003/blk000000f0_ACOUT<13>_UNCONNECTED , \NLW_blk00000003/blk000000f0_ACOUT<12>_UNCONNECTED , +\NLW_blk00000003/blk000000f0_ACOUT<11>_UNCONNECTED , \NLW_blk00000003/blk000000f0_ACOUT<10>_UNCONNECTED , +\NLW_blk00000003/blk000000f0_ACOUT<9>_UNCONNECTED , \NLW_blk00000003/blk000000f0_ACOUT<8>_UNCONNECTED , +\NLW_blk00000003/blk000000f0_ACOUT<7>_UNCONNECTED , \NLW_blk00000003/blk000000f0_ACOUT<6>_UNCONNECTED , +\NLW_blk00000003/blk000000f0_ACOUT<5>_UNCONNECTED , \NLW_blk00000003/blk000000f0_ACOUT<4>_UNCONNECTED , +\NLW_blk00000003/blk000000f0_ACOUT<3>_UNCONNECTED , \NLW_blk00000003/blk000000f0_ACOUT<2>_UNCONNECTED , +\NLW_blk00000003/blk000000f0_ACOUT<1>_UNCONNECTED , \NLW_blk00000003/blk000000f0_ACOUT<0>_UNCONNECTED }), + .OPMODE({\blk00000003/sig00000049 , \blk00000003/sig00000049 , NlwRenamedSig_OI_rfd, \blk00000003/sig00000049 , NlwRenamedSig_OI_rfd, +\blk00000003/sig00000049 , NlwRenamedSig_OI_rfd}), + .PCIN({\blk00000003/sig00000613 , \blk00000003/sig00000614 , \blk00000003/sig00000615 , \blk00000003/sig00000616 , \blk00000003/sig00000617 , +\blk00000003/sig00000618 , \blk00000003/sig00000619 , \blk00000003/sig0000061a , \blk00000003/sig0000061b , \blk00000003/sig0000061c , +\blk00000003/sig0000061d , \blk00000003/sig0000061e , \blk00000003/sig0000061f , \blk00000003/sig00000620 , \blk00000003/sig00000621 , +\blk00000003/sig00000622 , \blk00000003/sig00000623 , \blk00000003/sig00000624 , \blk00000003/sig00000625 , \blk00000003/sig00000626 , +\blk00000003/sig00000627 , \blk00000003/sig00000628 , \blk00000003/sig00000629 , \blk00000003/sig0000062a , \blk00000003/sig0000062b , +\blk00000003/sig0000062c , \blk00000003/sig0000062d , \blk00000003/sig0000062e , \blk00000003/sig0000062f , \blk00000003/sig00000630 , +\blk00000003/sig00000631 , \blk00000003/sig00000632 , \blk00000003/sig00000633 , \blk00000003/sig00000634 , \blk00000003/sig00000635 , +\blk00000003/sig00000636 , \blk00000003/sig00000637 , \blk00000003/sig00000638 , \blk00000003/sig00000639 , \blk00000003/sig0000063a , +\blk00000003/sig0000063b , \blk00000003/sig0000063c , \blk00000003/sig0000063d , \blk00000003/sig0000063e , \blk00000003/sig0000063f , +\blk00000003/sig00000640 , \blk00000003/sig00000641 , \blk00000003/sig00000642 }), + .ALUMODE({\blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 }), + .C({\blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , +\blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , +\blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , +\blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , +\blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , +\blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , +\blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , +\blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , +\blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , +\blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 }), + .CARRYOUT({\NLW_blk00000003/blk000000f0_CARRYOUT<3>_UNCONNECTED , \NLW_blk00000003/blk000000f0_CARRYOUT<2>_UNCONNECTED , +\NLW_blk00000003/blk000000f0_CARRYOUT<1>_UNCONNECTED , \NLW_blk00000003/blk000000f0_CARRYOUT<0>_UNCONNECTED }), + .INMODE({\blk00000003/sig00000049 , \blk00000003/sig00000049 , NlwRenamedSig_OI_rfd, \blk00000003/sig00000049 , \blk00000003/sig00000049 }), + .BCIN({\blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , +\blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , +\blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , +\blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 }), + .B({\blk00000003/sig000004bd , \blk00000003/sig000004be , \blk00000003/sig000004bf , \blk00000003/sig000004c0 , \blk00000003/sig000004c1 , +\blk00000003/sig000004c2 , \blk00000003/sig000004c3 , \blk00000003/sig000004c4 , \blk00000003/sig000004c5 , \blk00000003/sig000004c6 , +\blk00000003/sig000004c7 , \blk00000003/sig000004c8 , \blk00000003/sig000004c9 , \blk00000003/sig000004ca , \blk00000003/sig000004cb , +\blk00000003/sig000004cc , \blk00000003/sig000004cd , \blk00000003/sig000004ce }), + .BCOUT({\NLW_blk00000003/blk000000f0_BCOUT<17>_UNCONNECTED , \NLW_blk00000003/blk000000f0_BCOUT<16>_UNCONNECTED , +\NLW_blk00000003/blk000000f0_BCOUT<15>_UNCONNECTED , \NLW_blk00000003/blk000000f0_BCOUT<14>_UNCONNECTED , +\NLW_blk00000003/blk000000f0_BCOUT<13>_UNCONNECTED , \NLW_blk00000003/blk000000f0_BCOUT<12>_UNCONNECTED , +\NLW_blk00000003/blk000000f0_BCOUT<11>_UNCONNECTED , \NLW_blk00000003/blk000000f0_BCOUT<10>_UNCONNECTED , +\NLW_blk00000003/blk000000f0_BCOUT<9>_UNCONNECTED , \NLW_blk00000003/blk000000f0_BCOUT<8>_UNCONNECTED , +\NLW_blk00000003/blk000000f0_BCOUT<7>_UNCONNECTED , \NLW_blk00000003/blk000000f0_BCOUT<6>_UNCONNECTED , +\NLW_blk00000003/blk000000f0_BCOUT<5>_UNCONNECTED , \NLW_blk00000003/blk000000f0_BCOUT<4>_UNCONNECTED , +\NLW_blk00000003/blk000000f0_BCOUT<3>_UNCONNECTED , \NLW_blk00000003/blk000000f0_BCOUT<2>_UNCONNECTED , +\NLW_blk00000003/blk000000f0_BCOUT<1>_UNCONNECTED , \NLW_blk00000003/blk000000f0_BCOUT<0>_UNCONNECTED }), + .D({\blk00000003/sig00000643 , \blk00000003/sig00000643 , \blk00000003/sig00000644 , \blk00000003/sig00000645 , \blk00000003/sig00000646 , +\blk00000003/sig00000647 , \blk00000003/sig00000648 , \blk00000003/sig00000649 , \blk00000003/sig0000064a , \blk00000003/sig0000064b , +\blk00000003/sig0000064c , \blk00000003/sig0000064d , \blk00000003/sig0000064e , \blk00000003/sig0000064f , \blk00000003/sig00000650 , +\blk00000003/sig00000651 , \blk00000003/sig00000652 , \blk00000003/sig00000653 , \blk00000003/sig00000654 , \blk00000003/sig00000655 , +\blk00000003/sig00000656 , \blk00000003/sig00000657 , \blk00000003/sig00000658 , \blk00000003/sig00000659 , \blk00000003/sig0000065a }), + .P({\NLW_blk00000003/blk000000f0_P<47>_UNCONNECTED , \NLW_blk00000003/blk000000f0_P<46>_UNCONNECTED , +\NLW_blk00000003/blk000000f0_P<45>_UNCONNECTED , \NLW_blk00000003/blk000000f0_P<44>_UNCONNECTED , \NLW_blk00000003/blk000000f0_P<43>_UNCONNECTED , +\NLW_blk00000003/blk000000f0_P<42>_UNCONNECTED , \NLW_blk00000003/blk000000f0_P<41>_UNCONNECTED , \NLW_blk00000003/blk000000f0_P<40>_UNCONNECTED , +\NLW_blk00000003/blk000000f0_P<39>_UNCONNECTED , \NLW_blk00000003/blk000000f0_P<38>_UNCONNECTED , \NLW_blk00000003/blk000000f0_P<37>_UNCONNECTED , +\NLW_blk00000003/blk000000f0_P<36>_UNCONNECTED , \NLW_blk00000003/blk000000f0_P<35>_UNCONNECTED , \NLW_blk00000003/blk000000f0_P<34>_UNCONNECTED , +\NLW_blk00000003/blk000000f0_P<33>_UNCONNECTED , \NLW_blk00000003/blk000000f0_P<32>_UNCONNECTED , \NLW_blk00000003/blk000000f0_P<31>_UNCONNECTED , +\NLW_blk00000003/blk000000f0_P<30>_UNCONNECTED , \NLW_blk00000003/blk000000f0_P<29>_UNCONNECTED , \NLW_blk00000003/blk000000f0_P<28>_UNCONNECTED , +\NLW_blk00000003/blk000000f0_P<27>_UNCONNECTED , \NLW_blk00000003/blk000000f0_P<26>_UNCONNECTED , \NLW_blk00000003/blk000000f0_P<25>_UNCONNECTED , +\NLW_blk00000003/blk000000f0_P<24>_UNCONNECTED , \NLW_blk00000003/blk000000f0_P<23>_UNCONNECTED , \NLW_blk00000003/blk000000f0_P<22>_UNCONNECTED , +\NLW_blk00000003/blk000000f0_P<21>_UNCONNECTED , \NLW_blk00000003/blk000000f0_P<20>_UNCONNECTED , \NLW_blk00000003/blk000000f0_P<19>_UNCONNECTED , +\NLW_blk00000003/blk000000f0_P<18>_UNCONNECTED , \NLW_blk00000003/blk000000f0_P<17>_UNCONNECTED , \NLW_blk00000003/blk000000f0_P<16>_UNCONNECTED , +\NLW_blk00000003/blk000000f0_P<15>_UNCONNECTED , \NLW_blk00000003/blk000000f0_P<14>_UNCONNECTED , \NLW_blk00000003/blk000000f0_P<13>_UNCONNECTED , +\NLW_blk00000003/blk000000f0_P<12>_UNCONNECTED , \NLW_blk00000003/blk000000f0_P<11>_UNCONNECTED , \NLW_blk00000003/blk000000f0_P<10>_UNCONNECTED , +\NLW_blk00000003/blk000000f0_P<9>_UNCONNECTED , \NLW_blk00000003/blk000000f0_P<8>_UNCONNECTED , \NLW_blk00000003/blk000000f0_P<7>_UNCONNECTED , +\NLW_blk00000003/blk000000f0_P<6>_UNCONNECTED , \NLW_blk00000003/blk000000f0_P<5>_UNCONNECTED , \NLW_blk00000003/blk000000f0_P<4>_UNCONNECTED , +\NLW_blk00000003/blk000000f0_P<3>_UNCONNECTED , \NLW_blk00000003/blk000000f0_P<2>_UNCONNECTED , \NLW_blk00000003/blk000000f0_P<1>_UNCONNECTED , +\NLW_blk00000003/blk000000f0_P<0>_UNCONNECTED }), + .A({\blk00000003/sig0000065b , \blk00000003/sig0000065b , \blk00000003/sig0000065b , \blk00000003/sig0000065b , \blk00000003/sig0000065b , +\blk00000003/sig0000065b , \blk00000003/sig0000065b , \blk00000003/sig0000065c , \blk00000003/sig0000065d , \blk00000003/sig0000065e , +\blk00000003/sig0000065f , \blk00000003/sig00000660 , \blk00000003/sig00000661 , \blk00000003/sig00000662 , \blk00000003/sig00000663 , +\blk00000003/sig00000664 , \blk00000003/sig00000665 , \blk00000003/sig00000666 , \blk00000003/sig00000667 , \blk00000003/sig00000668 , +\blk00000003/sig00000669 , \blk00000003/sig0000066a , \blk00000003/sig0000066b , \blk00000003/sig0000066c , \blk00000003/sig0000066d , +\blk00000003/sig0000066e , \blk00000003/sig0000066f , \blk00000003/sig00000670 , \blk00000003/sig00000671 , \blk00000003/sig00000672 }), + .PCOUT({\blk00000003/sig00000673 , \blk00000003/sig00000674 , \blk00000003/sig00000675 , \blk00000003/sig00000676 , \blk00000003/sig00000677 , +\blk00000003/sig00000678 , \blk00000003/sig00000679 , \blk00000003/sig0000067a , \blk00000003/sig0000067b , \blk00000003/sig0000067c , +\blk00000003/sig0000067d , \blk00000003/sig0000067e , \blk00000003/sig0000067f , \blk00000003/sig00000680 , \blk00000003/sig00000681 , +\blk00000003/sig00000682 , \blk00000003/sig00000683 , \blk00000003/sig00000684 , \blk00000003/sig00000685 , \blk00000003/sig00000686 , +\blk00000003/sig00000687 , \blk00000003/sig00000688 , \blk00000003/sig00000689 , \blk00000003/sig0000068a , \blk00000003/sig0000068b , +\blk00000003/sig0000068c , \blk00000003/sig0000068d , \blk00000003/sig0000068e , \blk00000003/sig0000068f , \blk00000003/sig00000690 , +\blk00000003/sig00000691 , \blk00000003/sig00000692 , \blk00000003/sig00000693 , \blk00000003/sig00000694 , \blk00000003/sig00000695 , +\blk00000003/sig00000696 , \blk00000003/sig00000697 , \blk00000003/sig00000698 , \blk00000003/sig00000699 , \blk00000003/sig0000069a , +\blk00000003/sig0000069b , \blk00000003/sig0000069c , \blk00000003/sig0000069d , \blk00000003/sig0000069e , \blk00000003/sig0000069f , +\blk00000003/sig000006a0 , \blk00000003/sig000006a1 , \blk00000003/sig000006a2 }), + .ACIN({\blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , +\blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , +\blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , +\blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , +\blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , +\blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 }), + .CARRYINSEL({\blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 }) + ); + DSP48E1 #( + .ACASCREG ( 1 ), + .ADREG ( 1 ), + .ALUMODEREG ( 0 ), + .AREG ( 1 ), + .AUTORESET_PATDET ( "NO_RESET" ), + .A_INPUT ( "DIRECT" ), + .BCASCREG ( 1 ), + .BREG ( 1 ), + .B_INPUT ( "DIRECT" ), + .CARRYINREG ( 1 ), + .CARRYINSELREG ( 1 ), + .CREG ( 1 ), + .DREG ( 1 ), + .INMODEREG ( 1 ), + .MASK ( 48'hFFFFFFFFFFFE ), + .MREG ( 1 ), + .OPMODEREG ( 0 ), + .PATTERN ( 48'h000000000000 ), + .PREG ( 1 ), + .SEL_MASK ( "MASK" ), + .SEL_PATTERN ( "PATTERN" ), + .USE_DPORT ( "TRUE" ), + .USE_MULT ( "MULTIPLY" ), + .USE_PATTERN_DETECT ( "NO_PATDET" ), + .USE_SIMD ( "ONE48" )) + \blk00000003/blk000000ef ( + .PATTERNBDETECT(\NLW_blk00000003/blk000000ef_PATTERNBDETECT_UNCONNECTED ), + .RSTC(\blk00000003/sig00000049 ), + .CEB1(\blk00000003/sig00000049 ), + .CEAD(ce), + .MULTSIGNOUT(\NLW_blk00000003/blk000000ef_MULTSIGNOUT_UNCONNECTED ), + .CEC(ce), + .RSTM(\blk00000003/sig00000049 ), + .MULTSIGNIN(\blk00000003/sig00000049 ), + .CEB2(ce), + .RSTCTRL(\blk00000003/sig00000049 ), + .CEP(ce), + .CARRYCASCOUT(\NLW_blk00000003/blk000000ef_CARRYCASCOUT_UNCONNECTED ), + .RSTA(\blk00000003/sig00000049 ), + .CECARRYIN(ce), + .UNDERFLOW(\NLW_blk00000003/blk000000ef_UNDERFLOW_UNCONNECTED ), + .PATTERNDETECT(\NLW_blk00000003/blk000000ef_PATTERNDETECT_UNCONNECTED ), + .RSTALUMODE(\blk00000003/sig00000049 ), + .RSTALLCARRYIN(\blk00000003/sig00000049 ), + .CED(ce), + .RSTD(\blk00000003/sig00000049 ), + .CEALUMODE(ce), + .CEA2(ce), + .CLK(clk), + .CEA1(\blk00000003/sig00000049 ), + .RSTB(\blk00000003/sig00000049 ), + .OVERFLOW(\NLW_blk00000003/blk000000ef_OVERFLOW_UNCONNECTED ), + .CECTRL(ce), + .CEM(ce), + .CARRYIN(\blk00000003/sig00000049 ), + .CARRYCASCIN(\blk00000003/sig00000049 ), + .RSTINMODE(\blk00000003/sig00000049 ), + .CEINMODE(ce), + .RSTP(\blk00000003/sig00000049 ), + .ACOUT({\NLW_blk00000003/blk000000ef_ACOUT<29>_UNCONNECTED , \NLW_blk00000003/blk000000ef_ACOUT<28>_UNCONNECTED , +\NLW_blk00000003/blk000000ef_ACOUT<27>_UNCONNECTED , \NLW_blk00000003/blk000000ef_ACOUT<26>_UNCONNECTED , +\NLW_blk00000003/blk000000ef_ACOUT<25>_UNCONNECTED , \NLW_blk00000003/blk000000ef_ACOUT<24>_UNCONNECTED , +\NLW_blk00000003/blk000000ef_ACOUT<23>_UNCONNECTED , \NLW_blk00000003/blk000000ef_ACOUT<22>_UNCONNECTED , +\NLW_blk00000003/blk000000ef_ACOUT<21>_UNCONNECTED , \NLW_blk00000003/blk000000ef_ACOUT<20>_UNCONNECTED , +\NLW_blk00000003/blk000000ef_ACOUT<19>_UNCONNECTED , \NLW_blk00000003/blk000000ef_ACOUT<18>_UNCONNECTED , +\NLW_blk00000003/blk000000ef_ACOUT<17>_UNCONNECTED , \NLW_blk00000003/blk000000ef_ACOUT<16>_UNCONNECTED , +\NLW_blk00000003/blk000000ef_ACOUT<15>_UNCONNECTED , \NLW_blk00000003/blk000000ef_ACOUT<14>_UNCONNECTED , +\NLW_blk00000003/blk000000ef_ACOUT<13>_UNCONNECTED , \NLW_blk00000003/blk000000ef_ACOUT<12>_UNCONNECTED , +\NLW_blk00000003/blk000000ef_ACOUT<11>_UNCONNECTED , \NLW_blk00000003/blk000000ef_ACOUT<10>_UNCONNECTED , +\NLW_blk00000003/blk000000ef_ACOUT<9>_UNCONNECTED , \NLW_blk00000003/blk000000ef_ACOUT<8>_UNCONNECTED , +\NLW_blk00000003/blk000000ef_ACOUT<7>_UNCONNECTED , \NLW_blk00000003/blk000000ef_ACOUT<6>_UNCONNECTED , +\NLW_blk00000003/blk000000ef_ACOUT<5>_UNCONNECTED , \NLW_blk00000003/blk000000ef_ACOUT<4>_UNCONNECTED , +\NLW_blk00000003/blk000000ef_ACOUT<3>_UNCONNECTED , \NLW_blk00000003/blk000000ef_ACOUT<2>_UNCONNECTED , +\NLW_blk00000003/blk000000ef_ACOUT<1>_UNCONNECTED , \NLW_blk00000003/blk000000ef_ACOUT<0>_UNCONNECTED }), + .OPMODE({\blk00000003/sig00000049 , \blk00000003/sig00000049 , NlwRenamedSig_OI_rfd, \blk00000003/sig00000049 , NlwRenamedSig_OI_rfd, +\blk00000003/sig00000049 , NlwRenamedSig_OI_rfd}), + .PCIN({\blk00000003/sig00000349 , \blk00000003/sig0000034a , \blk00000003/sig0000034b , \blk00000003/sig0000034c , \blk00000003/sig0000034d , +\blk00000003/sig0000034e , \blk00000003/sig0000034f , \blk00000003/sig00000350 , \blk00000003/sig00000351 , \blk00000003/sig00000352 , +\blk00000003/sig00000353 , \blk00000003/sig00000354 , \blk00000003/sig00000355 , \blk00000003/sig00000356 , \blk00000003/sig00000357 , +\blk00000003/sig00000358 , \blk00000003/sig00000359 , \blk00000003/sig0000035a , \blk00000003/sig0000035b , \blk00000003/sig0000035c , +\blk00000003/sig0000035d , \blk00000003/sig0000035e , \blk00000003/sig0000035f , \blk00000003/sig00000360 , \blk00000003/sig00000361 , +\blk00000003/sig00000362 , \blk00000003/sig00000363 , \blk00000003/sig00000364 , \blk00000003/sig00000365 , \blk00000003/sig00000366 , +\blk00000003/sig00000367 , \blk00000003/sig00000368 , \blk00000003/sig00000369 , \blk00000003/sig0000036a , \blk00000003/sig0000036b , +\blk00000003/sig0000036c , \blk00000003/sig0000036d , \blk00000003/sig0000036e , \blk00000003/sig0000036f , \blk00000003/sig00000370 , +\blk00000003/sig00000371 , \blk00000003/sig00000372 , \blk00000003/sig00000373 , \blk00000003/sig00000374 , \blk00000003/sig00000375 , +\blk00000003/sig00000376 , \blk00000003/sig00000377 , \blk00000003/sig00000378 }), + .ALUMODE({\blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 }), + .C({\blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , +\blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , +\blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , +\blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , +\blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , +\blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , +\blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , +\blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , +\blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , +\blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 }), + .CARRYOUT({\NLW_blk00000003/blk000000ef_CARRYOUT<3>_UNCONNECTED , \NLW_blk00000003/blk000000ef_CARRYOUT<2>_UNCONNECTED , +\NLW_blk00000003/blk000000ef_CARRYOUT<1>_UNCONNECTED , \NLW_blk00000003/blk000000ef_CARRYOUT<0>_UNCONNECTED }), + .INMODE({\blk00000003/sig00000049 , \blk00000003/sig00000049 , NlwRenamedSig_OI_rfd, \blk00000003/sig00000049 , \blk00000003/sig00000049 }), + .BCIN({\blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , +\blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , +\blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , +\blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 }), + .B({\blk00000003/sig0000044b , \blk00000003/sig0000044c , \blk00000003/sig0000044d , \blk00000003/sig0000044e , \blk00000003/sig0000044f , +\blk00000003/sig00000450 , \blk00000003/sig00000451 , \blk00000003/sig00000452 , \blk00000003/sig00000453 , \blk00000003/sig00000454 , +\blk00000003/sig00000455 , \blk00000003/sig00000456 , \blk00000003/sig00000457 , \blk00000003/sig00000458 , \blk00000003/sig00000459 , +\blk00000003/sig0000045a , \blk00000003/sig0000045b , \blk00000003/sig0000045c }), + .BCOUT({\NLW_blk00000003/blk000000ef_BCOUT<17>_UNCONNECTED , \NLW_blk00000003/blk000000ef_BCOUT<16>_UNCONNECTED , +\NLW_blk00000003/blk000000ef_BCOUT<15>_UNCONNECTED , \NLW_blk00000003/blk000000ef_BCOUT<14>_UNCONNECTED , +\NLW_blk00000003/blk000000ef_BCOUT<13>_UNCONNECTED , \NLW_blk00000003/blk000000ef_BCOUT<12>_UNCONNECTED , +\NLW_blk00000003/blk000000ef_BCOUT<11>_UNCONNECTED , \NLW_blk00000003/blk000000ef_BCOUT<10>_UNCONNECTED , +\NLW_blk00000003/blk000000ef_BCOUT<9>_UNCONNECTED , \NLW_blk00000003/blk000000ef_BCOUT<8>_UNCONNECTED , +\NLW_blk00000003/blk000000ef_BCOUT<7>_UNCONNECTED , \NLW_blk00000003/blk000000ef_BCOUT<6>_UNCONNECTED , +\NLW_blk00000003/blk000000ef_BCOUT<5>_UNCONNECTED , \NLW_blk00000003/blk000000ef_BCOUT<4>_UNCONNECTED , +\NLW_blk00000003/blk000000ef_BCOUT<3>_UNCONNECTED , \NLW_blk00000003/blk000000ef_BCOUT<2>_UNCONNECTED , +\NLW_blk00000003/blk000000ef_BCOUT<1>_UNCONNECTED , \NLW_blk00000003/blk000000ef_BCOUT<0>_UNCONNECTED }), + .D({\blk00000003/sig000005e3 , \blk00000003/sig000005e3 , \blk00000003/sig000005e4 , \blk00000003/sig000005e5 , \blk00000003/sig000005e6 , +\blk00000003/sig000005e7 , \blk00000003/sig000005e8 , \blk00000003/sig000005e9 , \blk00000003/sig000005ea , \blk00000003/sig000005eb , +\blk00000003/sig000005ec , \blk00000003/sig000005ed , \blk00000003/sig000005ee , \blk00000003/sig000005ef , \blk00000003/sig000005f0 , +\blk00000003/sig000005f1 , \blk00000003/sig000005f2 , \blk00000003/sig000005f3 , \blk00000003/sig000005f4 , \blk00000003/sig000005f5 , +\blk00000003/sig000005f6 , \blk00000003/sig000005f7 , \blk00000003/sig000005f8 , \blk00000003/sig000005f9 , \blk00000003/sig000005fa }), + .P({\NLW_blk00000003/blk000000ef_P<47>_UNCONNECTED , \NLW_blk00000003/blk000000ef_P<46>_UNCONNECTED , +\NLW_blk00000003/blk000000ef_P<45>_UNCONNECTED , \NLW_blk00000003/blk000000ef_P<44>_UNCONNECTED , \NLW_blk00000003/blk000000ef_P<43>_UNCONNECTED , +\NLW_blk00000003/blk000000ef_P<42>_UNCONNECTED , \NLW_blk00000003/blk000000ef_P<41>_UNCONNECTED , \NLW_blk00000003/blk000000ef_P<40>_UNCONNECTED , +\NLW_blk00000003/blk000000ef_P<39>_UNCONNECTED , \NLW_blk00000003/blk000000ef_P<38>_UNCONNECTED , \NLW_blk00000003/blk000000ef_P<37>_UNCONNECTED , +\NLW_blk00000003/blk000000ef_P<36>_UNCONNECTED , \NLW_blk00000003/blk000000ef_P<35>_UNCONNECTED , \NLW_blk00000003/blk000000ef_P<34>_UNCONNECTED , +\NLW_blk00000003/blk000000ef_P<33>_UNCONNECTED , \NLW_blk00000003/blk000000ef_P<32>_UNCONNECTED , \NLW_blk00000003/blk000000ef_P<31>_UNCONNECTED , +\NLW_blk00000003/blk000000ef_P<30>_UNCONNECTED , \NLW_blk00000003/blk000000ef_P<29>_UNCONNECTED , \NLW_blk00000003/blk000000ef_P<28>_UNCONNECTED , +\NLW_blk00000003/blk000000ef_P<27>_UNCONNECTED , \NLW_blk00000003/blk000000ef_P<26>_UNCONNECTED , \NLW_blk00000003/blk000000ef_P<25>_UNCONNECTED , +\NLW_blk00000003/blk000000ef_P<24>_UNCONNECTED , \NLW_blk00000003/blk000000ef_P<23>_UNCONNECTED , \NLW_blk00000003/blk000000ef_P<22>_UNCONNECTED , +\NLW_blk00000003/blk000000ef_P<21>_UNCONNECTED , \NLW_blk00000003/blk000000ef_P<20>_UNCONNECTED , \NLW_blk00000003/blk000000ef_P<19>_UNCONNECTED , +\NLW_blk00000003/blk000000ef_P<18>_UNCONNECTED , \NLW_blk00000003/blk000000ef_P<17>_UNCONNECTED , \NLW_blk00000003/blk000000ef_P<16>_UNCONNECTED , +\NLW_blk00000003/blk000000ef_P<15>_UNCONNECTED , \NLW_blk00000003/blk000000ef_P<14>_UNCONNECTED , \NLW_blk00000003/blk000000ef_P<13>_UNCONNECTED , +\NLW_blk00000003/blk000000ef_P<12>_UNCONNECTED , \NLW_blk00000003/blk000000ef_P<11>_UNCONNECTED , \NLW_blk00000003/blk000000ef_P<10>_UNCONNECTED , +\NLW_blk00000003/blk000000ef_P<9>_UNCONNECTED , \NLW_blk00000003/blk000000ef_P<8>_UNCONNECTED , \NLW_blk00000003/blk000000ef_P<7>_UNCONNECTED , +\NLW_blk00000003/blk000000ef_P<6>_UNCONNECTED , \NLW_blk00000003/blk000000ef_P<5>_UNCONNECTED , \NLW_blk00000003/blk000000ef_P<4>_UNCONNECTED , +\NLW_blk00000003/blk000000ef_P<3>_UNCONNECTED , \NLW_blk00000003/blk000000ef_P<2>_UNCONNECTED , \NLW_blk00000003/blk000000ef_P<1>_UNCONNECTED , +\NLW_blk00000003/blk000000ef_P<0>_UNCONNECTED }), + .A({\blk00000003/sig000005fb , \blk00000003/sig000005fb , \blk00000003/sig000005fb , \blk00000003/sig000005fb , \blk00000003/sig000005fb , +\blk00000003/sig000005fb , \blk00000003/sig000005fb , \blk00000003/sig000005fc , \blk00000003/sig000005fd , \blk00000003/sig000005fe , +\blk00000003/sig000005ff , \blk00000003/sig00000600 , \blk00000003/sig00000601 , \blk00000003/sig00000602 , \blk00000003/sig00000603 , +\blk00000003/sig00000604 , \blk00000003/sig00000605 , \blk00000003/sig00000606 , \blk00000003/sig00000607 , \blk00000003/sig00000608 , +\blk00000003/sig00000609 , \blk00000003/sig0000060a , \blk00000003/sig0000060b , \blk00000003/sig0000060c , \blk00000003/sig0000060d , +\blk00000003/sig0000060e , \blk00000003/sig0000060f , \blk00000003/sig00000610 , \blk00000003/sig00000611 , \blk00000003/sig00000612 }), + .PCOUT({\blk00000003/sig00000613 , \blk00000003/sig00000614 , \blk00000003/sig00000615 , \blk00000003/sig00000616 , \blk00000003/sig00000617 , +\blk00000003/sig00000618 , \blk00000003/sig00000619 , \blk00000003/sig0000061a , \blk00000003/sig0000061b , \blk00000003/sig0000061c , +\blk00000003/sig0000061d , \blk00000003/sig0000061e , \blk00000003/sig0000061f , \blk00000003/sig00000620 , \blk00000003/sig00000621 , +\blk00000003/sig00000622 , \blk00000003/sig00000623 , \blk00000003/sig00000624 , \blk00000003/sig00000625 , \blk00000003/sig00000626 , +\blk00000003/sig00000627 , \blk00000003/sig00000628 , \blk00000003/sig00000629 , \blk00000003/sig0000062a , \blk00000003/sig0000062b , +\blk00000003/sig0000062c , \blk00000003/sig0000062d , \blk00000003/sig0000062e , \blk00000003/sig0000062f , \blk00000003/sig00000630 , +\blk00000003/sig00000631 , \blk00000003/sig00000632 , \blk00000003/sig00000633 , \blk00000003/sig00000634 , \blk00000003/sig00000635 , +\blk00000003/sig00000636 , \blk00000003/sig00000637 , \blk00000003/sig00000638 , \blk00000003/sig00000639 , \blk00000003/sig0000063a , +\blk00000003/sig0000063b , \blk00000003/sig0000063c , \blk00000003/sig0000063d , \blk00000003/sig0000063e , \blk00000003/sig0000063f , +\blk00000003/sig00000640 , \blk00000003/sig00000641 , \blk00000003/sig00000642 }), + .ACIN({\blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , +\blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , +\blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , +\blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , +\blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , +\blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 }), + .CARRYINSEL({\blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 }) + ); + DSP48E1 #( + .ACASCREG ( 1 ), + .ADREG ( 1 ), + .ALUMODEREG ( 0 ), + .AREG ( 1 ), + .AUTORESET_PATDET ( "NO_RESET" ), + .A_INPUT ( "DIRECT" ), + .BCASCREG ( 1 ), + .BREG ( 1 ), + .B_INPUT ( "DIRECT" ), + .CARRYINREG ( 1 ), + .CARRYINSELREG ( 1 ), + .CREG ( 1 ), + .DREG ( 1 ), + .INMODEREG ( 1 ), + .MASK ( 48'hFFFFFFFFFFFE ), + .MREG ( 1 ), + .OPMODEREG ( 0 ), + .PATTERN ( 48'h000000000000 ), + .PREG ( 1 ), + .SEL_MASK ( "MASK" ), + .SEL_PATTERN ( "PATTERN" ), + .USE_DPORT ( "TRUE" ), + .USE_MULT ( "MULTIPLY" ), + .USE_PATTERN_DETECT ( "NO_PATDET" ), + .USE_SIMD ( "ONE48" )) + \blk00000003/blk000000ee ( + .PATTERNBDETECT(\NLW_blk00000003/blk000000ee_PATTERNBDETECT_UNCONNECTED ), + .RSTC(\blk00000003/sig00000049 ), + .CEB1(\blk00000003/sig00000049 ), + .CEAD(ce), + .MULTSIGNOUT(\NLW_blk00000003/blk000000ee_MULTSIGNOUT_UNCONNECTED ), + .CEC(ce), + .RSTM(\blk00000003/sig00000049 ), + .MULTSIGNIN(\blk00000003/sig00000049 ), + .CEB2(ce), + .RSTCTRL(\blk00000003/sig00000049 ), + .CEP(ce), + .CARRYCASCOUT(\NLW_blk00000003/blk000000ee_CARRYCASCOUT_UNCONNECTED ), + .RSTA(\blk00000003/sig00000049 ), + .CECARRYIN(ce), + .UNDERFLOW(\NLW_blk00000003/blk000000ee_UNDERFLOW_UNCONNECTED ), + .PATTERNDETECT(\NLW_blk00000003/blk000000ee_PATTERNDETECT_UNCONNECTED ), + .RSTALUMODE(\blk00000003/sig00000049 ), + .RSTALLCARRYIN(\blk00000003/sig00000049 ), + .CED(ce), + .RSTD(\blk00000003/sig00000049 ), + .CEALUMODE(ce), + .CEA2(ce), + .CLK(clk), + .CEA1(\blk00000003/sig00000049 ), + .RSTB(\blk00000003/sig00000049 ), + .OVERFLOW(\NLW_blk00000003/blk000000ee_OVERFLOW_UNCONNECTED ), + .CECTRL(ce), + .CEM(ce), + .CARRYIN(\blk00000003/sig00000049 ), + .CARRYCASCIN(\blk00000003/sig00000049 ), + .RSTINMODE(\blk00000003/sig00000049 ), + .CEINMODE(ce), + .RSTP(\blk00000003/sig00000049 ), + .ACOUT({\NLW_blk00000003/blk000000ee_ACOUT<29>_UNCONNECTED , \NLW_blk00000003/blk000000ee_ACOUT<28>_UNCONNECTED , +\NLW_blk00000003/blk000000ee_ACOUT<27>_UNCONNECTED , \NLW_blk00000003/blk000000ee_ACOUT<26>_UNCONNECTED , +\NLW_blk00000003/blk000000ee_ACOUT<25>_UNCONNECTED , \NLW_blk00000003/blk000000ee_ACOUT<24>_UNCONNECTED , +\NLW_blk00000003/blk000000ee_ACOUT<23>_UNCONNECTED , \NLW_blk00000003/blk000000ee_ACOUT<22>_UNCONNECTED , +\NLW_blk00000003/blk000000ee_ACOUT<21>_UNCONNECTED , \NLW_blk00000003/blk000000ee_ACOUT<20>_UNCONNECTED , +\NLW_blk00000003/blk000000ee_ACOUT<19>_UNCONNECTED , \NLW_blk00000003/blk000000ee_ACOUT<18>_UNCONNECTED , +\NLW_blk00000003/blk000000ee_ACOUT<17>_UNCONNECTED , \NLW_blk00000003/blk000000ee_ACOUT<16>_UNCONNECTED , +\NLW_blk00000003/blk000000ee_ACOUT<15>_UNCONNECTED , \NLW_blk00000003/blk000000ee_ACOUT<14>_UNCONNECTED , +\NLW_blk00000003/blk000000ee_ACOUT<13>_UNCONNECTED , \NLW_blk00000003/blk000000ee_ACOUT<12>_UNCONNECTED , +\NLW_blk00000003/blk000000ee_ACOUT<11>_UNCONNECTED , \NLW_blk00000003/blk000000ee_ACOUT<10>_UNCONNECTED , +\NLW_blk00000003/blk000000ee_ACOUT<9>_UNCONNECTED , \NLW_blk00000003/blk000000ee_ACOUT<8>_UNCONNECTED , +\NLW_blk00000003/blk000000ee_ACOUT<7>_UNCONNECTED , \NLW_blk00000003/blk000000ee_ACOUT<6>_UNCONNECTED , +\NLW_blk00000003/blk000000ee_ACOUT<5>_UNCONNECTED , \NLW_blk00000003/blk000000ee_ACOUT<4>_UNCONNECTED , +\NLW_blk00000003/blk000000ee_ACOUT<3>_UNCONNECTED , \NLW_blk00000003/blk000000ee_ACOUT<2>_UNCONNECTED , +\NLW_blk00000003/blk000000ee_ACOUT<1>_UNCONNECTED , \NLW_blk00000003/blk000000ee_ACOUT<0>_UNCONNECTED }), + .OPMODE({\blk00000003/sig00000049 , \blk00000003/sig00000049 , NlwRenamedSig_OI_rfd, \blk00000003/sig00000049 , NlwRenamedSig_OI_rfd, +\blk00000003/sig00000049 , NlwRenamedSig_OI_rfd}), + .PCIN({\blk00000003/sig00000571 , \blk00000003/sig00000572 , \blk00000003/sig00000573 , \blk00000003/sig00000574 , \blk00000003/sig00000575 , +\blk00000003/sig00000576 , \blk00000003/sig00000577 , \blk00000003/sig00000578 , \blk00000003/sig00000579 , \blk00000003/sig0000057a , +\blk00000003/sig0000057b , \blk00000003/sig0000057c , \blk00000003/sig0000057d , \blk00000003/sig0000057e , \blk00000003/sig0000057f , +\blk00000003/sig00000580 , \blk00000003/sig00000581 , \blk00000003/sig00000582 , \blk00000003/sig00000583 , \blk00000003/sig00000584 , +\blk00000003/sig00000585 , \blk00000003/sig00000586 , \blk00000003/sig00000587 , \blk00000003/sig00000588 , \blk00000003/sig00000589 , +\blk00000003/sig0000058a , \blk00000003/sig0000058b , \blk00000003/sig0000058c , \blk00000003/sig0000058d , \blk00000003/sig0000058e , +\blk00000003/sig0000058f , \blk00000003/sig00000590 , \blk00000003/sig00000591 , \blk00000003/sig00000592 , \blk00000003/sig00000593 , +\blk00000003/sig00000594 , \blk00000003/sig00000595 , \blk00000003/sig00000596 , \blk00000003/sig00000597 , \blk00000003/sig00000598 , +\blk00000003/sig00000599 , \blk00000003/sig0000059a , \blk00000003/sig0000059b , \blk00000003/sig0000059c , \blk00000003/sig0000059d , +\blk00000003/sig0000059e , \blk00000003/sig0000059f , \blk00000003/sig000005a0 }), + .ALUMODE({\blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 }), + .C({\blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , +\blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , +\blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , +\blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , +\blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , +\blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , +\blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , +\blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , +\blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , +\blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 }), + .CARRYOUT({\NLW_blk00000003/blk000000ee_CARRYOUT<3>_UNCONNECTED , \NLW_blk00000003/blk000000ee_CARRYOUT<2>_UNCONNECTED , +\NLW_blk00000003/blk000000ee_CARRYOUT<1>_UNCONNECTED , \NLW_blk00000003/blk000000ee_CARRYOUT<0>_UNCONNECTED }), + .INMODE({\blk00000003/sig00000049 , \blk00000003/sig00000049 , NlwRenamedSig_OI_rfd, \blk00000003/sig00000049 , \blk00000003/sig00000049 }), + .BCIN({\blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , +\blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , +\blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , +\blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 }), + .B({\blk00000003/sig000005a1 , \blk00000003/sig000005a2 , \blk00000003/sig000005a3 , \blk00000003/sig000005a4 , \blk00000003/sig000005a5 , +\blk00000003/sig000005a6 , \blk00000003/sig000005a7 , \blk00000003/sig000005a8 , \blk00000003/sig000005a9 , \blk00000003/sig000005aa , +\blk00000003/sig000005ab , \blk00000003/sig000005ac , \blk00000003/sig000005ad , \blk00000003/sig000005ae , \blk00000003/sig000005af , +\blk00000003/sig000005b0 , \blk00000003/sig000005b1 , \blk00000003/sig000005b2 }), + .BCOUT({\NLW_blk00000003/blk000000ee_BCOUT<17>_UNCONNECTED , \NLW_blk00000003/blk000000ee_BCOUT<16>_UNCONNECTED , +\NLW_blk00000003/blk000000ee_BCOUT<15>_UNCONNECTED , \NLW_blk00000003/blk000000ee_BCOUT<14>_UNCONNECTED , +\NLW_blk00000003/blk000000ee_BCOUT<13>_UNCONNECTED , \NLW_blk00000003/blk000000ee_BCOUT<12>_UNCONNECTED , +\NLW_blk00000003/blk000000ee_BCOUT<11>_UNCONNECTED , \NLW_blk00000003/blk000000ee_BCOUT<10>_UNCONNECTED , +\NLW_blk00000003/blk000000ee_BCOUT<9>_UNCONNECTED , \NLW_blk00000003/blk000000ee_BCOUT<8>_UNCONNECTED , +\NLW_blk00000003/blk000000ee_BCOUT<7>_UNCONNECTED , \NLW_blk00000003/blk000000ee_BCOUT<6>_UNCONNECTED , +\NLW_blk00000003/blk000000ee_BCOUT<5>_UNCONNECTED , \NLW_blk00000003/blk000000ee_BCOUT<4>_UNCONNECTED , +\NLW_blk00000003/blk000000ee_BCOUT<3>_UNCONNECTED , \NLW_blk00000003/blk000000ee_BCOUT<2>_UNCONNECTED , +\NLW_blk00000003/blk000000ee_BCOUT<1>_UNCONNECTED , \NLW_blk00000003/blk000000ee_BCOUT<0>_UNCONNECTED }), + .D({\blk00000003/sig000005b3 , \blk00000003/sig000005b3 , \blk00000003/sig000005b4 , \blk00000003/sig000005b5 , \blk00000003/sig000005b6 , +\blk00000003/sig000005b7 , \blk00000003/sig000005b8 , \blk00000003/sig000005b9 , \blk00000003/sig000005ba , \blk00000003/sig000005bb , +\blk00000003/sig000005bc , \blk00000003/sig000005bd , \blk00000003/sig000005be , \blk00000003/sig000005bf , \blk00000003/sig000005c0 , +\blk00000003/sig000005c1 , \blk00000003/sig000005c2 , \blk00000003/sig000005c3 , \blk00000003/sig000005c4 , \blk00000003/sig000005c5 , +\blk00000003/sig000005c6 , \blk00000003/sig000005c7 , \blk00000003/sig000005c8 , \blk00000003/sig000005c9 , \blk00000003/sig000005ca }), + .P({\NLW_blk00000003/blk000000ee_P<47>_UNCONNECTED , \NLW_blk00000003/blk000000ee_P<46>_UNCONNECTED , +\NLW_blk00000003/blk000000ee_P<45>_UNCONNECTED , \NLW_blk00000003/blk000000ee_P<44>_UNCONNECTED , \NLW_blk00000003/blk000000ee_P<43>_UNCONNECTED , +\NLW_blk00000003/blk000000ee_P<42>_UNCONNECTED , \NLW_blk00000003/blk000000ee_P<41>_UNCONNECTED , \NLW_blk00000003/blk000000ee_P<40>_UNCONNECTED , +\NLW_blk00000003/blk000000ee_P<39>_UNCONNECTED , \NLW_blk00000003/blk000000ee_P<38>_UNCONNECTED , \NLW_blk00000003/blk000000ee_P<37>_UNCONNECTED , +\NLW_blk00000003/blk000000ee_P<36>_UNCONNECTED , \NLW_blk00000003/blk000000ee_P<35>_UNCONNECTED , \NLW_blk00000003/blk000000ee_P<34>_UNCONNECTED , +\NLW_blk00000003/blk000000ee_P<33>_UNCONNECTED , \NLW_blk00000003/blk000000ee_P<32>_UNCONNECTED , \NLW_blk00000003/blk000000ee_P<31>_UNCONNECTED , +\NLW_blk00000003/blk000000ee_P<30>_UNCONNECTED , \NLW_blk00000003/blk000000ee_P<29>_UNCONNECTED , \NLW_blk00000003/blk000000ee_P<28>_UNCONNECTED , +\NLW_blk00000003/blk000000ee_P<27>_UNCONNECTED , \NLW_blk00000003/blk000000ee_P<26>_UNCONNECTED , \NLW_blk00000003/blk000000ee_P<25>_UNCONNECTED , +\NLW_blk00000003/blk000000ee_P<24>_UNCONNECTED , \NLW_blk00000003/blk000000ee_P<23>_UNCONNECTED , \NLW_blk00000003/blk000000ee_P<22>_UNCONNECTED , +\NLW_blk00000003/blk000000ee_P<21>_UNCONNECTED , \NLW_blk00000003/blk000000ee_P<20>_UNCONNECTED , \NLW_blk00000003/blk000000ee_P<19>_UNCONNECTED , +\NLW_blk00000003/blk000000ee_P<18>_UNCONNECTED , \NLW_blk00000003/blk000000ee_P<17>_UNCONNECTED , \NLW_blk00000003/blk000000ee_P<16>_UNCONNECTED , +\NLW_blk00000003/blk000000ee_P<15>_UNCONNECTED , \NLW_blk00000003/blk000000ee_P<14>_UNCONNECTED , \NLW_blk00000003/blk000000ee_P<13>_UNCONNECTED , +\NLW_blk00000003/blk000000ee_P<12>_UNCONNECTED , \NLW_blk00000003/blk000000ee_P<11>_UNCONNECTED , \NLW_blk00000003/blk000000ee_P<10>_UNCONNECTED , +\NLW_blk00000003/blk000000ee_P<9>_UNCONNECTED , \NLW_blk00000003/blk000000ee_P<8>_UNCONNECTED , \NLW_blk00000003/blk000000ee_P<7>_UNCONNECTED , +\NLW_blk00000003/blk000000ee_P<6>_UNCONNECTED , \NLW_blk00000003/blk000000ee_P<5>_UNCONNECTED , \NLW_blk00000003/blk000000ee_P<4>_UNCONNECTED , +\NLW_blk00000003/blk000000ee_P<3>_UNCONNECTED , \NLW_blk00000003/blk000000ee_P<2>_UNCONNECTED , \NLW_blk00000003/blk000000ee_P<1>_UNCONNECTED , +\NLW_blk00000003/blk000000ee_P<0>_UNCONNECTED }), + .A({\blk00000003/sig000005cb , \blk00000003/sig000005cb , \blk00000003/sig000005cb , \blk00000003/sig000005cb , \blk00000003/sig000005cb , +\blk00000003/sig000005cb , \blk00000003/sig000005cb , \blk00000003/sig000005cc , \blk00000003/sig000005cd , \blk00000003/sig000005ce , +\blk00000003/sig000005cf , \blk00000003/sig000005d0 , \blk00000003/sig000005d1 , \blk00000003/sig000005d2 , \blk00000003/sig000005d3 , +\blk00000003/sig000005d4 , \blk00000003/sig000005d5 , \blk00000003/sig000005d6 , \blk00000003/sig000005d7 , \blk00000003/sig000005d8 , +\blk00000003/sig000005d9 , \blk00000003/sig000005da , \blk00000003/sig000005db , \blk00000003/sig000005dc , \blk00000003/sig000005dd , +\blk00000003/sig000005de , \blk00000003/sig000005df , \blk00000003/sig000005e0 , \blk00000003/sig000005e1 , \blk00000003/sig000005e2 }), + .PCOUT({\blk00000003/sig00000379 , \blk00000003/sig0000037a , \blk00000003/sig0000037b , \blk00000003/sig0000037c , \blk00000003/sig0000037d , +\blk00000003/sig0000037e , \blk00000003/sig0000037f , \blk00000003/sig00000380 , \blk00000003/sig00000381 , \blk00000003/sig00000382 , +\blk00000003/sig00000383 , \blk00000003/sig00000384 , \blk00000003/sig00000385 , \blk00000003/sig00000386 , \blk00000003/sig00000387 , +\blk00000003/sig00000388 , \blk00000003/sig00000389 , \blk00000003/sig0000038a , \blk00000003/sig0000038b , \blk00000003/sig0000038c , +\blk00000003/sig0000038d , \blk00000003/sig0000038e , \blk00000003/sig0000038f , \blk00000003/sig00000390 , \blk00000003/sig00000391 , +\blk00000003/sig00000392 , \blk00000003/sig00000393 , \blk00000003/sig00000394 , \blk00000003/sig00000395 , \blk00000003/sig00000396 , +\blk00000003/sig00000397 , \blk00000003/sig00000398 , \blk00000003/sig00000399 , \blk00000003/sig0000039a , \blk00000003/sig0000039b , +\blk00000003/sig0000039c , \blk00000003/sig0000039d , \blk00000003/sig0000039e , \blk00000003/sig0000039f , \blk00000003/sig000003a0 , +\blk00000003/sig000003a1 , \blk00000003/sig000003a2 , \blk00000003/sig000003a3 , \blk00000003/sig000003a4 , \blk00000003/sig000003a5 , +\blk00000003/sig000003a6 , \blk00000003/sig000003a7 , \blk00000003/sig000003a8 }), + .ACIN({\blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , +\blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , +\blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , +\blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , +\blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , +\blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 }), + .CARRYINSEL({\blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 }) + ); + DSP48E1 #( + .ACASCREG ( 1 ), + .ADREG ( 1 ), + .ALUMODEREG ( 0 ), + .AREG ( 1 ), + .AUTORESET_PATDET ( "NO_RESET" ), + .A_INPUT ( "DIRECT" ), + .BCASCREG ( 1 ), + .BREG ( 1 ), + .B_INPUT ( "DIRECT" ), + .CARRYINREG ( 1 ), + .CARRYINSELREG ( 1 ), + .CREG ( 1 ), + .DREG ( 1 ), + .INMODEREG ( 1 ), + .MASK ( 48'hFFFFFFFFFFFE ), + .MREG ( 1 ), + .OPMODEREG ( 0 ), + .PATTERN ( 48'h000000000000 ), + .PREG ( 1 ), + .SEL_MASK ( "MASK" ), + .SEL_PATTERN ( "PATTERN" ), + .USE_DPORT ( "TRUE" ), + .USE_MULT ( "MULTIPLY" ), + .USE_PATTERN_DETECT ( "NO_PATDET" ), + .USE_SIMD ( "ONE48" )) + \blk00000003/blk000000ed ( + .PATTERNBDETECT(\NLW_blk00000003/blk000000ed_PATTERNBDETECT_UNCONNECTED ), + .RSTC(\blk00000003/sig00000049 ), + .CEB1(\blk00000003/sig00000049 ), + .CEAD(ce), + .MULTSIGNOUT(\NLW_blk00000003/blk000000ed_MULTSIGNOUT_UNCONNECTED ), + .CEC(ce), + .RSTM(\blk00000003/sig00000049 ), + .MULTSIGNIN(\blk00000003/sig00000049 ), + .CEB2(ce), + .RSTCTRL(\blk00000003/sig00000049 ), + .CEP(ce), + .CARRYCASCOUT(\NLW_blk00000003/blk000000ed_CARRYCASCOUT_UNCONNECTED ), + .RSTA(\blk00000003/sig00000049 ), + .CECARRYIN(ce), + .UNDERFLOW(\NLW_blk00000003/blk000000ed_UNDERFLOW_UNCONNECTED ), + .PATTERNDETECT(\NLW_blk00000003/blk000000ed_PATTERNDETECT_UNCONNECTED ), + .RSTALUMODE(\blk00000003/sig00000049 ), + .RSTALLCARRYIN(\blk00000003/sig00000049 ), + .CED(ce), + .RSTD(\blk00000003/sig00000049 ), + .CEALUMODE(ce), + .CEA2(ce), + .CLK(clk), + .CEA1(\blk00000003/sig00000049 ), + .RSTB(\blk00000003/sig00000049 ), + .OVERFLOW(\NLW_blk00000003/blk000000ed_OVERFLOW_UNCONNECTED ), + .CECTRL(ce), + .CEM(ce), + .CARRYIN(\blk00000003/sig00000049 ), + .CARRYCASCIN(\blk00000003/sig00000049 ), + .RSTINMODE(\blk00000003/sig00000049 ), + .CEINMODE(ce), + .RSTP(\blk00000003/sig00000049 ), + .ACOUT({\NLW_blk00000003/blk000000ed_ACOUT<29>_UNCONNECTED , \NLW_blk00000003/blk000000ed_ACOUT<28>_UNCONNECTED , +\NLW_blk00000003/blk000000ed_ACOUT<27>_UNCONNECTED , \NLW_blk00000003/blk000000ed_ACOUT<26>_UNCONNECTED , +\NLW_blk00000003/blk000000ed_ACOUT<25>_UNCONNECTED , \NLW_blk00000003/blk000000ed_ACOUT<24>_UNCONNECTED , +\NLW_blk00000003/blk000000ed_ACOUT<23>_UNCONNECTED , \NLW_blk00000003/blk000000ed_ACOUT<22>_UNCONNECTED , +\NLW_blk00000003/blk000000ed_ACOUT<21>_UNCONNECTED , \NLW_blk00000003/blk000000ed_ACOUT<20>_UNCONNECTED , +\NLW_blk00000003/blk000000ed_ACOUT<19>_UNCONNECTED , \NLW_blk00000003/blk000000ed_ACOUT<18>_UNCONNECTED , +\NLW_blk00000003/blk000000ed_ACOUT<17>_UNCONNECTED , \NLW_blk00000003/blk000000ed_ACOUT<16>_UNCONNECTED , +\NLW_blk00000003/blk000000ed_ACOUT<15>_UNCONNECTED , \NLW_blk00000003/blk000000ed_ACOUT<14>_UNCONNECTED , +\NLW_blk00000003/blk000000ed_ACOUT<13>_UNCONNECTED , \NLW_blk00000003/blk000000ed_ACOUT<12>_UNCONNECTED , +\NLW_blk00000003/blk000000ed_ACOUT<11>_UNCONNECTED , \NLW_blk00000003/blk000000ed_ACOUT<10>_UNCONNECTED , +\NLW_blk00000003/blk000000ed_ACOUT<9>_UNCONNECTED , \NLW_blk00000003/blk000000ed_ACOUT<8>_UNCONNECTED , +\NLW_blk00000003/blk000000ed_ACOUT<7>_UNCONNECTED , \NLW_blk00000003/blk000000ed_ACOUT<6>_UNCONNECTED , +\NLW_blk00000003/blk000000ed_ACOUT<5>_UNCONNECTED , \NLW_blk00000003/blk000000ed_ACOUT<4>_UNCONNECTED , +\NLW_blk00000003/blk000000ed_ACOUT<3>_UNCONNECTED , \NLW_blk00000003/blk000000ed_ACOUT<2>_UNCONNECTED , +\NLW_blk00000003/blk000000ed_ACOUT<1>_UNCONNECTED , \NLW_blk00000003/blk000000ed_ACOUT<0>_UNCONNECTED }), + .OPMODE({\blk00000003/sig00000049 , \blk00000003/sig00000049 , NlwRenamedSig_OI_rfd, \blk00000003/sig00000049 , NlwRenamedSig_OI_rfd, +\blk00000003/sig00000049 , NlwRenamedSig_OI_rfd}), + .PCIN({\blk00000003/sig000004ff , \blk00000003/sig00000500 , \blk00000003/sig00000501 , \blk00000003/sig00000502 , \blk00000003/sig00000503 , +\blk00000003/sig00000504 , \blk00000003/sig00000505 , \blk00000003/sig00000506 , \blk00000003/sig00000507 , \blk00000003/sig00000508 , +\blk00000003/sig00000509 , \blk00000003/sig0000050a , \blk00000003/sig0000050b , \blk00000003/sig0000050c , \blk00000003/sig0000050d , +\blk00000003/sig0000050e , \blk00000003/sig0000050f , \blk00000003/sig00000510 , \blk00000003/sig00000511 , \blk00000003/sig00000512 , +\blk00000003/sig00000513 , \blk00000003/sig00000514 , \blk00000003/sig00000515 , \blk00000003/sig00000516 , \blk00000003/sig00000517 , +\blk00000003/sig00000518 , \blk00000003/sig00000519 , \blk00000003/sig0000051a , \blk00000003/sig0000051b , \blk00000003/sig0000051c , +\blk00000003/sig0000051d , \blk00000003/sig0000051e , \blk00000003/sig0000051f , \blk00000003/sig00000520 , \blk00000003/sig00000521 , +\blk00000003/sig00000522 , \blk00000003/sig00000523 , \blk00000003/sig00000524 , \blk00000003/sig00000525 , \blk00000003/sig00000526 , +\blk00000003/sig00000527 , \blk00000003/sig00000528 , \blk00000003/sig00000529 , \blk00000003/sig0000052a , \blk00000003/sig0000052b , +\blk00000003/sig0000052c , \blk00000003/sig0000052d , \blk00000003/sig0000052e }), + .ALUMODE({\blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 }), + .C({\blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , +\blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , +\blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , +\blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , +\blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , +\blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , +\blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , +\blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , +\blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , +\blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 }), + .CARRYOUT({\NLW_blk00000003/blk000000ed_CARRYOUT<3>_UNCONNECTED , \NLW_blk00000003/blk000000ed_CARRYOUT<2>_UNCONNECTED , +\NLW_blk00000003/blk000000ed_CARRYOUT<1>_UNCONNECTED , \NLW_blk00000003/blk000000ed_CARRYOUT<0>_UNCONNECTED }), + .INMODE({\blk00000003/sig00000049 , \blk00000003/sig00000049 , NlwRenamedSig_OI_rfd, \blk00000003/sig00000049 , \blk00000003/sig00000049 }), + .BCIN({\blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , +\blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , +\blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , +\blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 }), + .B({\blk00000003/sig0000052f , \blk00000003/sig00000530 , \blk00000003/sig00000531 , \blk00000003/sig00000532 , \blk00000003/sig00000533 , +\blk00000003/sig00000534 , \blk00000003/sig00000535 , \blk00000003/sig00000536 , \blk00000003/sig00000537 , \blk00000003/sig00000538 , +\blk00000003/sig00000539 , \blk00000003/sig0000053a , \blk00000003/sig0000053b , \blk00000003/sig0000053c , \blk00000003/sig0000053d , +\blk00000003/sig0000053e , \blk00000003/sig0000053f , \blk00000003/sig00000540 }), + .BCOUT({\NLW_blk00000003/blk000000ed_BCOUT<17>_UNCONNECTED , \NLW_blk00000003/blk000000ed_BCOUT<16>_UNCONNECTED , +\NLW_blk00000003/blk000000ed_BCOUT<15>_UNCONNECTED , \NLW_blk00000003/blk000000ed_BCOUT<14>_UNCONNECTED , +\NLW_blk00000003/blk000000ed_BCOUT<13>_UNCONNECTED , \NLW_blk00000003/blk000000ed_BCOUT<12>_UNCONNECTED , +\NLW_blk00000003/blk000000ed_BCOUT<11>_UNCONNECTED , \NLW_blk00000003/blk000000ed_BCOUT<10>_UNCONNECTED , +\NLW_blk00000003/blk000000ed_BCOUT<9>_UNCONNECTED , \NLW_blk00000003/blk000000ed_BCOUT<8>_UNCONNECTED , +\NLW_blk00000003/blk000000ed_BCOUT<7>_UNCONNECTED , \NLW_blk00000003/blk000000ed_BCOUT<6>_UNCONNECTED , +\NLW_blk00000003/blk000000ed_BCOUT<5>_UNCONNECTED , \NLW_blk00000003/blk000000ed_BCOUT<4>_UNCONNECTED , +\NLW_blk00000003/blk000000ed_BCOUT<3>_UNCONNECTED , \NLW_blk00000003/blk000000ed_BCOUT<2>_UNCONNECTED , +\NLW_blk00000003/blk000000ed_BCOUT<1>_UNCONNECTED , \NLW_blk00000003/blk000000ed_BCOUT<0>_UNCONNECTED }), + .D({\blk00000003/sig00000541 , \blk00000003/sig00000541 , \blk00000003/sig00000542 , \blk00000003/sig00000543 , \blk00000003/sig00000544 , +\blk00000003/sig00000545 , \blk00000003/sig00000546 , \blk00000003/sig00000547 , \blk00000003/sig00000548 , \blk00000003/sig00000549 , +\blk00000003/sig0000054a , \blk00000003/sig0000054b , \blk00000003/sig0000054c , \blk00000003/sig0000054d , \blk00000003/sig0000054e , +\blk00000003/sig0000054f , \blk00000003/sig00000550 , \blk00000003/sig00000551 , \blk00000003/sig00000552 , \blk00000003/sig00000553 , +\blk00000003/sig00000554 , \blk00000003/sig00000555 , \blk00000003/sig00000556 , \blk00000003/sig00000557 , \blk00000003/sig00000558 }), + .P({\NLW_blk00000003/blk000000ed_P<47>_UNCONNECTED , \NLW_blk00000003/blk000000ed_P<46>_UNCONNECTED , +\NLW_blk00000003/blk000000ed_P<45>_UNCONNECTED , \NLW_blk00000003/blk000000ed_P<44>_UNCONNECTED , \NLW_blk00000003/blk000000ed_P<43>_UNCONNECTED , +\NLW_blk00000003/blk000000ed_P<42>_UNCONNECTED , \NLW_blk00000003/blk000000ed_P<41>_UNCONNECTED , \NLW_blk00000003/blk000000ed_P<40>_UNCONNECTED , +\NLW_blk00000003/blk000000ed_P<39>_UNCONNECTED , \NLW_blk00000003/blk000000ed_P<38>_UNCONNECTED , \NLW_blk00000003/blk000000ed_P<37>_UNCONNECTED , +\NLW_blk00000003/blk000000ed_P<36>_UNCONNECTED , \NLW_blk00000003/blk000000ed_P<35>_UNCONNECTED , \NLW_blk00000003/blk000000ed_P<34>_UNCONNECTED , +\NLW_blk00000003/blk000000ed_P<33>_UNCONNECTED , \NLW_blk00000003/blk000000ed_P<32>_UNCONNECTED , \NLW_blk00000003/blk000000ed_P<31>_UNCONNECTED , +\NLW_blk00000003/blk000000ed_P<30>_UNCONNECTED , \NLW_blk00000003/blk000000ed_P<29>_UNCONNECTED , \NLW_blk00000003/blk000000ed_P<28>_UNCONNECTED , +\NLW_blk00000003/blk000000ed_P<27>_UNCONNECTED , \NLW_blk00000003/blk000000ed_P<26>_UNCONNECTED , \NLW_blk00000003/blk000000ed_P<25>_UNCONNECTED , +\NLW_blk00000003/blk000000ed_P<24>_UNCONNECTED , \NLW_blk00000003/blk000000ed_P<23>_UNCONNECTED , \NLW_blk00000003/blk000000ed_P<22>_UNCONNECTED , +\NLW_blk00000003/blk000000ed_P<21>_UNCONNECTED , \NLW_blk00000003/blk000000ed_P<20>_UNCONNECTED , \NLW_blk00000003/blk000000ed_P<19>_UNCONNECTED , +\NLW_blk00000003/blk000000ed_P<18>_UNCONNECTED , \NLW_blk00000003/blk000000ed_P<17>_UNCONNECTED , \NLW_blk00000003/blk000000ed_P<16>_UNCONNECTED , +\NLW_blk00000003/blk000000ed_P<15>_UNCONNECTED , \NLW_blk00000003/blk000000ed_P<14>_UNCONNECTED , \NLW_blk00000003/blk000000ed_P<13>_UNCONNECTED , +\NLW_blk00000003/blk000000ed_P<12>_UNCONNECTED , \NLW_blk00000003/blk000000ed_P<11>_UNCONNECTED , \NLW_blk00000003/blk000000ed_P<10>_UNCONNECTED , +\NLW_blk00000003/blk000000ed_P<9>_UNCONNECTED , \NLW_blk00000003/blk000000ed_P<8>_UNCONNECTED , \NLW_blk00000003/blk000000ed_P<7>_UNCONNECTED , +\NLW_blk00000003/blk000000ed_P<6>_UNCONNECTED , \NLW_blk00000003/blk000000ed_P<5>_UNCONNECTED , \NLW_blk00000003/blk000000ed_P<4>_UNCONNECTED , +\NLW_blk00000003/blk000000ed_P<3>_UNCONNECTED , \NLW_blk00000003/blk000000ed_P<2>_UNCONNECTED , \NLW_blk00000003/blk000000ed_P<1>_UNCONNECTED , +\NLW_blk00000003/blk000000ed_P<0>_UNCONNECTED }), + .A({\blk00000003/sig00000559 , \blk00000003/sig00000559 , \blk00000003/sig00000559 , \blk00000003/sig00000559 , \blk00000003/sig00000559 , +\blk00000003/sig00000559 , \blk00000003/sig00000559 , \blk00000003/sig0000055a , \blk00000003/sig0000055b , \blk00000003/sig0000055c , +\blk00000003/sig0000055d , \blk00000003/sig0000055e , \blk00000003/sig0000055f , \blk00000003/sig00000560 , \blk00000003/sig00000561 , +\blk00000003/sig00000562 , \blk00000003/sig00000563 , \blk00000003/sig00000564 , \blk00000003/sig00000565 , \blk00000003/sig00000566 , +\blk00000003/sig00000567 , \blk00000003/sig00000568 , \blk00000003/sig00000569 , \blk00000003/sig0000056a , \blk00000003/sig0000056b , +\blk00000003/sig0000056c , \blk00000003/sig0000056d , \blk00000003/sig0000056e , \blk00000003/sig0000056f , \blk00000003/sig00000570 }), + .PCOUT({\blk00000003/sig00000571 , \blk00000003/sig00000572 , \blk00000003/sig00000573 , \blk00000003/sig00000574 , \blk00000003/sig00000575 , +\blk00000003/sig00000576 , \blk00000003/sig00000577 , \blk00000003/sig00000578 , \blk00000003/sig00000579 , \blk00000003/sig0000057a , +\blk00000003/sig0000057b , \blk00000003/sig0000057c , \blk00000003/sig0000057d , \blk00000003/sig0000057e , \blk00000003/sig0000057f , +\blk00000003/sig00000580 , \blk00000003/sig00000581 , \blk00000003/sig00000582 , \blk00000003/sig00000583 , \blk00000003/sig00000584 , +\blk00000003/sig00000585 , \blk00000003/sig00000586 , \blk00000003/sig00000587 , \blk00000003/sig00000588 , \blk00000003/sig00000589 , +\blk00000003/sig0000058a , \blk00000003/sig0000058b , \blk00000003/sig0000058c , \blk00000003/sig0000058d , \blk00000003/sig0000058e , +\blk00000003/sig0000058f , \blk00000003/sig00000590 , \blk00000003/sig00000591 , \blk00000003/sig00000592 , \blk00000003/sig00000593 , +\blk00000003/sig00000594 , \blk00000003/sig00000595 , \blk00000003/sig00000596 , \blk00000003/sig00000597 , \blk00000003/sig00000598 , +\blk00000003/sig00000599 , \blk00000003/sig0000059a , \blk00000003/sig0000059b , \blk00000003/sig0000059c , \blk00000003/sig0000059d , +\blk00000003/sig0000059e , \blk00000003/sig0000059f , \blk00000003/sig000005a0 }), + .ACIN({\blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , +\blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , +\blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , +\blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , +\blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , +\blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 }), + .CARRYINSEL({\blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 }) + ); + DSP48E1 #( + .ACASCREG ( 1 ), + .ADREG ( 1 ), + .ALUMODEREG ( 0 ), + .AREG ( 1 ), + .AUTORESET_PATDET ( "NO_RESET" ), + .A_INPUT ( "DIRECT" ), + .BCASCREG ( 1 ), + .BREG ( 1 ), + .B_INPUT ( "DIRECT" ), + .CARRYINREG ( 1 ), + .CARRYINSELREG ( 1 ), + .CREG ( 1 ), + .DREG ( 1 ), + .INMODEREG ( 1 ), + .MASK ( 48'hFFFFFFFFFFFE ), + .MREG ( 1 ), + .OPMODEREG ( 0 ), + .PATTERN ( 48'h000000000000 ), + .PREG ( 1 ), + .SEL_MASK ( "MASK" ), + .SEL_PATTERN ( "PATTERN" ), + .USE_DPORT ( "TRUE" ), + .USE_MULT ( "MULTIPLY" ), + .USE_PATTERN_DETECT ( "NO_PATDET" ), + .USE_SIMD ( "ONE48" )) + \blk00000003/blk000000ec ( + .PATTERNBDETECT(\NLW_blk00000003/blk000000ec_PATTERNBDETECT_UNCONNECTED ), + .RSTC(\blk00000003/sig00000049 ), + .CEB1(\blk00000003/sig00000049 ), + .CEAD(ce), + .MULTSIGNOUT(\NLW_blk00000003/blk000000ec_MULTSIGNOUT_UNCONNECTED ), + .CEC(ce), + .RSTM(\blk00000003/sig00000049 ), + .MULTSIGNIN(\blk00000003/sig00000049 ), + .CEB2(ce), + .RSTCTRL(\blk00000003/sig00000049 ), + .CEP(ce), + .CARRYCASCOUT(\NLW_blk00000003/blk000000ec_CARRYCASCOUT_UNCONNECTED ), + .RSTA(\blk00000003/sig00000049 ), + .CECARRYIN(ce), + .UNDERFLOW(\NLW_blk00000003/blk000000ec_UNDERFLOW_UNCONNECTED ), + .PATTERNDETECT(\NLW_blk00000003/blk000000ec_PATTERNDETECT_UNCONNECTED ), + .RSTALUMODE(\blk00000003/sig00000049 ), + .RSTALLCARRYIN(\blk00000003/sig00000049 ), + .CED(ce), + .RSTD(\blk00000003/sig00000049 ), + .CEALUMODE(ce), + .CEA2(ce), + .CLK(clk), + .CEA1(\blk00000003/sig00000049 ), + .RSTB(\blk00000003/sig00000049 ), + .OVERFLOW(\NLW_blk00000003/blk000000ec_OVERFLOW_UNCONNECTED ), + .CECTRL(ce), + .CEM(ce), + .CARRYIN(\blk00000003/sig00000049 ), + .CARRYCASCIN(\blk00000003/sig00000049 ), + .RSTINMODE(\blk00000003/sig00000049 ), + .CEINMODE(ce), + .RSTP(\blk00000003/sig00000049 ), + .ACOUT({\NLW_blk00000003/blk000000ec_ACOUT<29>_UNCONNECTED , \NLW_blk00000003/blk000000ec_ACOUT<28>_UNCONNECTED , +\NLW_blk00000003/blk000000ec_ACOUT<27>_UNCONNECTED , \NLW_blk00000003/blk000000ec_ACOUT<26>_UNCONNECTED , +\NLW_blk00000003/blk000000ec_ACOUT<25>_UNCONNECTED , \NLW_blk00000003/blk000000ec_ACOUT<24>_UNCONNECTED , +\NLW_blk00000003/blk000000ec_ACOUT<23>_UNCONNECTED , \NLW_blk00000003/blk000000ec_ACOUT<22>_UNCONNECTED , +\NLW_blk00000003/blk000000ec_ACOUT<21>_UNCONNECTED , \NLW_blk00000003/blk000000ec_ACOUT<20>_UNCONNECTED , +\NLW_blk00000003/blk000000ec_ACOUT<19>_UNCONNECTED , \NLW_blk00000003/blk000000ec_ACOUT<18>_UNCONNECTED , +\NLW_blk00000003/blk000000ec_ACOUT<17>_UNCONNECTED , \NLW_blk00000003/blk000000ec_ACOUT<16>_UNCONNECTED , +\NLW_blk00000003/blk000000ec_ACOUT<15>_UNCONNECTED , \NLW_blk00000003/blk000000ec_ACOUT<14>_UNCONNECTED , +\NLW_blk00000003/blk000000ec_ACOUT<13>_UNCONNECTED , \NLW_blk00000003/blk000000ec_ACOUT<12>_UNCONNECTED , +\NLW_blk00000003/blk000000ec_ACOUT<11>_UNCONNECTED , \NLW_blk00000003/blk000000ec_ACOUT<10>_UNCONNECTED , +\NLW_blk00000003/blk000000ec_ACOUT<9>_UNCONNECTED , \NLW_blk00000003/blk000000ec_ACOUT<8>_UNCONNECTED , +\NLW_blk00000003/blk000000ec_ACOUT<7>_UNCONNECTED , \NLW_blk00000003/blk000000ec_ACOUT<6>_UNCONNECTED , +\NLW_blk00000003/blk000000ec_ACOUT<5>_UNCONNECTED , \NLW_blk00000003/blk000000ec_ACOUT<4>_UNCONNECTED , +\NLW_blk00000003/blk000000ec_ACOUT<3>_UNCONNECTED , \NLW_blk00000003/blk000000ec_ACOUT<2>_UNCONNECTED , +\NLW_blk00000003/blk000000ec_ACOUT<1>_UNCONNECTED , \NLW_blk00000003/blk000000ec_ACOUT<0>_UNCONNECTED }), + .OPMODE({\blk00000003/sig00000049 , \blk00000003/sig00000049 , NlwRenamedSig_OI_rfd, \blk00000003/sig00000049 , NlwRenamedSig_OI_rfd, +\blk00000003/sig00000049 , NlwRenamedSig_OI_rfd}), + .PCIN({\blk00000003/sig0000048d , \blk00000003/sig0000048e , \blk00000003/sig0000048f , \blk00000003/sig00000490 , \blk00000003/sig00000491 , +\blk00000003/sig00000492 , \blk00000003/sig00000493 , \blk00000003/sig00000494 , \blk00000003/sig00000495 , \blk00000003/sig00000496 , +\blk00000003/sig00000497 , \blk00000003/sig00000498 , \blk00000003/sig00000499 , \blk00000003/sig0000049a , \blk00000003/sig0000049b , +\blk00000003/sig0000049c , \blk00000003/sig0000049d , \blk00000003/sig0000049e , \blk00000003/sig0000049f , \blk00000003/sig000004a0 , +\blk00000003/sig000004a1 , \blk00000003/sig000004a2 , \blk00000003/sig000004a3 , \blk00000003/sig000004a4 , \blk00000003/sig000004a5 , +\blk00000003/sig000004a6 , \blk00000003/sig000004a7 , \blk00000003/sig000004a8 , \blk00000003/sig000004a9 , \blk00000003/sig000004aa , +\blk00000003/sig000004ab , \blk00000003/sig000004ac , \blk00000003/sig000004ad , \blk00000003/sig000004ae , \blk00000003/sig000004af , +\blk00000003/sig000004b0 , \blk00000003/sig000004b1 , \blk00000003/sig000004b2 , \blk00000003/sig000004b3 , \blk00000003/sig000004b4 , +\blk00000003/sig000004b5 , \blk00000003/sig000004b6 , \blk00000003/sig000004b7 , \blk00000003/sig000004b8 , \blk00000003/sig000004b9 , +\blk00000003/sig000004ba , \blk00000003/sig000004bb , \blk00000003/sig000004bc }), + .ALUMODE({\blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 }), + .C({\blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , +\blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , +\blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , +\blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , +\blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , +\blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , +\blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , +\blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , +\blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , +\blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 }), + .CARRYOUT({\NLW_blk00000003/blk000000ec_CARRYOUT<3>_UNCONNECTED , \NLW_blk00000003/blk000000ec_CARRYOUT<2>_UNCONNECTED , +\NLW_blk00000003/blk000000ec_CARRYOUT<1>_UNCONNECTED , \NLW_blk00000003/blk000000ec_CARRYOUT<0>_UNCONNECTED }), + .INMODE({\blk00000003/sig00000049 , \blk00000003/sig00000049 , NlwRenamedSig_OI_rfd, \blk00000003/sig00000049 , \blk00000003/sig00000049 }), + .BCIN({\blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , +\blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , +\blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , +\blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 }), + .B({\blk00000003/sig000004bd , \blk00000003/sig000004be , \blk00000003/sig000004bf , \blk00000003/sig000004c0 , \blk00000003/sig000004c1 , +\blk00000003/sig000004c2 , \blk00000003/sig000004c3 , \blk00000003/sig000004c4 , \blk00000003/sig000004c5 , \blk00000003/sig000004c6 , +\blk00000003/sig000004c7 , \blk00000003/sig000004c8 , \blk00000003/sig000004c9 , \blk00000003/sig000004ca , \blk00000003/sig000004cb , +\blk00000003/sig000004cc , \blk00000003/sig000004cd , \blk00000003/sig000004ce }), + .BCOUT({\NLW_blk00000003/blk000000ec_BCOUT<17>_UNCONNECTED , \NLW_blk00000003/blk000000ec_BCOUT<16>_UNCONNECTED , +\NLW_blk00000003/blk000000ec_BCOUT<15>_UNCONNECTED , \NLW_blk00000003/blk000000ec_BCOUT<14>_UNCONNECTED , +\NLW_blk00000003/blk000000ec_BCOUT<13>_UNCONNECTED , \NLW_blk00000003/blk000000ec_BCOUT<12>_UNCONNECTED , +\NLW_blk00000003/blk000000ec_BCOUT<11>_UNCONNECTED , \NLW_blk00000003/blk000000ec_BCOUT<10>_UNCONNECTED , +\NLW_blk00000003/blk000000ec_BCOUT<9>_UNCONNECTED , \NLW_blk00000003/blk000000ec_BCOUT<8>_UNCONNECTED , +\NLW_blk00000003/blk000000ec_BCOUT<7>_UNCONNECTED , \NLW_blk00000003/blk000000ec_BCOUT<6>_UNCONNECTED , +\NLW_blk00000003/blk000000ec_BCOUT<5>_UNCONNECTED , \NLW_blk00000003/blk000000ec_BCOUT<4>_UNCONNECTED , +\NLW_blk00000003/blk000000ec_BCOUT<3>_UNCONNECTED , \NLW_blk00000003/blk000000ec_BCOUT<2>_UNCONNECTED , +\NLW_blk00000003/blk000000ec_BCOUT<1>_UNCONNECTED , \NLW_blk00000003/blk000000ec_BCOUT<0>_UNCONNECTED }), + .D({\blk00000003/sig000004cf , \blk00000003/sig000004cf , \blk00000003/sig000004d0 , \blk00000003/sig000004d1 , \blk00000003/sig000004d2 , +\blk00000003/sig000004d3 , \blk00000003/sig000004d4 , \blk00000003/sig000004d5 , \blk00000003/sig000004d6 , \blk00000003/sig000004d7 , +\blk00000003/sig000004d8 , \blk00000003/sig000004d9 , \blk00000003/sig000004da , \blk00000003/sig000004db , \blk00000003/sig000004dc , +\blk00000003/sig000004dd , \blk00000003/sig000004de , \blk00000003/sig000004df , \blk00000003/sig000004e0 , \blk00000003/sig000004e1 , +\blk00000003/sig000004e2 , \blk00000003/sig000004e3 , \blk00000003/sig000004e4 , \blk00000003/sig000004e5 , \blk00000003/sig000004e6 }), + .P({\NLW_blk00000003/blk000000ec_P<47>_UNCONNECTED , \NLW_blk00000003/blk000000ec_P<46>_UNCONNECTED , +\NLW_blk00000003/blk000000ec_P<45>_UNCONNECTED , \NLW_blk00000003/blk000000ec_P<44>_UNCONNECTED , \NLW_blk00000003/blk000000ec_P<43>_UNCONNECTED , +\NLW_blk00000003/blk000000ec_P<42>_UNCONNECTED , \NLW_blk00000003/blk000000ec_P<41>_UNCONNECTED , \NLW_blk00000003/blk000000ec_P<40>_UNCONNECTED , +\NLW_blk00000003/blk000000ec_P<39>_UNCONNECTED , \NLW_blk00000003/blk000000ec_P<38>_UNCONNECTED , \NLW_blk00000003/blk000000ec_P<37>_UNCONNECTED , +\NLW_blk00000003/blk000000ec_P<36>_UNCONNECTED , \NLW_blk00000003/blk000000ec_P<35>_UNCONNECTED , \NLW_blk00000003/blk000000ec_P<34>_UNCONNECTED , +\NLW_blk00000003/blk000000ec_P<33>_UNCONNECTED , \NLW_blk00000003/blk000000ec_P<32>_UNCONNECTED , \NLW_blk00000003/blk000000ec_P<31>_UNCONNECTED , +\NLW_blk00000003/blk000000ec_P<30>_UNCONNECTED , \NLW_blk00000003/blk000000ec_P<29>_UNCONNECTED , \NLW_blk00000003/blk000000ec_P<28>_UNCONNECTED , +\NLW_blk00000003/blk000000ec_P<27>_UNCONNECTED , \NLW_blk00000003/blk000000ec_P<26>_UNCONNECTED , \NLW_blk00000003/blk000000ec_P<25>_UNCONNECTED , +\NLW_blk00000003/blk000000ec_P<24>_UNCONNECTED , \NLW_blk00000003/blk000000ec_P<23>_UNCONNECTED , \NLW_blk00000003/blk000000ec_P<22>_UNCONNECTED , +\NLW_blk00000003/blk000000ec_P<21>_UNCONNECTED , \NLW_blk00000003/blk000000ec_P<20>_UNCONNECTED , \NLW_blk00000003/blk000000ec_P<19>_UNCONNECTED , +\NLW_blk00000003/blk000000ec_P<18>_UNCONNECTED , \NLW_blk00000003/blk000000ec_P<17>_UNCONNECTED , \NLW_blk00000003/blk000000ec_P<16>_UNCONNECTED , +\NLW_blk00000003/blk000000ec_P<15>_UNCONNECTED , \NLW_blk00000003/blk000000ec_P<14>_UNCONNECTED , \NLW_blk00000003/blk000000ec_P<13>_UNCONNECTED , +\NLW_blk00000003/blk000000ec_P<12>_UNCONNECTED , \NLW_blk00000003/blk000000ec_P<11>_UNCONNECTED , \NLW_blk00000003/blk000000ec_P<10>_UNCONNECTED , +\NLW_blk00000003/blk000000ec_P<9>_UNCONNECTED , \NLW_blk00000003/blk000000ec_P<8>_UNCONNECTED , \NLW_blk00000003/blk000000ec_P<7>_UNCONNECTED , +\NLW_blk00000003/blk000000ec_P<6>_UNCONNECTED , \NLW_blk00000003/blk000000ec_P<5>_UNCONNECTED , \NLW_blk00000003/blk000000ec_P<4>_UNCONNECTED , +\NLW_blk00000003/blk000000ec_P<3>_UNCONNECTED , \NLW_blk00000003/blk000000ec_P<2>_UNCONNECTED , \NLW_blk00000003/blk000000ec_P<1>_UNCONNECTED , +\NLW_blk00000003/blk000000ec_P<0>_UNCONNECTED }), + .A({\blk00000003/sig000004e7 , \blk00000003/sig000004e7 , \blk00000003/sig000004e7 , \blk00000003/sig000004e7 , \blk00000003/sig000004e7 , +\blk00000003/sig000004e7 , \blk00000003/sig000004e7 , \blk00000003/sig000004e8 , \blk00000003/sig000004e9 , \blk00000003/sig000004ea , +\blk00000003/sig000004eb , \blk00000003/sig000004ec , \blk00000003/sig000004ed , \blk00000003/sig000004ee , \blk00000003/sig000004ef , +\blk00000003/sig000004f0 , \blk00000003/sig000004f1 , \blk00000003/sig000004f2 , \blk00000003/sig000004f3 , \blk00000003/sig000004f4 , +\blk00000003/sig000004f5 , \blk00000003/sig000004f6 , \blk00000003/sig000004f7 , \blk00000003/sig000004f8 , \blk00000003/sig000004f9 , +\blk00000003/sig000004fa , \blk00000003/sig000004fb , \blk00000003/sig000004fc , \blk00000003/sig000004fd , \blk00000003/sig000004fe }), + .PCOUT({\blk00000003/sig000004ff , \blk00000003/sig00000500 , \blk00000003/sig00000501 , \blk00000003/sig00000502 , \blk00000003/sig00000503 , +\blk00000003/sig00000504 , \blk00000003/sig00000505 , \blk00000003/sig00000506 , \blk00000003/sig00000507 , \blk00000003/sig00000508 , +\blk00000003/sig00000509 , \blk00000003/sig0000050a , \blk00000003/sig0000050b , \blk00000003/sig0000050c , \blk00000003/sig0000050d , +\blk00000003/sig0000050e , \blk00000003/sig0000050f , \blk00000003/sig00000510 , \blk00000003/sig00000511 , \blk00000003/sig00000512 , +\blk00000003/sig00000513 , \blk00000003/sig00000514 , \blk00000003/sig00000515 , \blk00000003/sig00000516 , \blk00000003/sig00000517 , +\blk00000003/sig00000518 , \blk00000003/sig00000519 , \blk00000003/sig0000051a , \blk00000003/sig0000051b , \blk00000003/sig0000051c , +\blk00000003/sig0000051d , \blk00000003/sig0000051e , \blk00000003/sig0000051f , \blk00000003/sig00000520 , \blk00000003/sig00000521 , +\blk00000003/sig00000522 , \blk00000003/sig00000523 , \blk00000003/sig00000524 , \blk00000003/sig00000525 , \blk00000003/sig00000526 , +\blk00000003/sig00000527 , \blk00000003/sig00000528 , \blk00000003/sig00000529 , \blk00000003/sig0000052a , \blk00000003/sig0000052b , +\blk00000003/sig0000052c , \blk00000003/sig0000052d , \blk00000003/sig0000052e }), + .ACIN({\blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , +\blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , +\blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , +\blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , +\blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , +\blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 }), + .CARRYINSEL({\blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 }) + ); + DSP48E1 #( + .ACASCREG ( 1 ), + .ADREG ( 1 ), + .ALUMODEREG ( 0 ), + .AREG ( 1 ), + .AUTORESET_PATDET ( "NO_RESET" ), + .A_INPUT ( "DIRECT" ), + .BCASCREG ( 1 ), + .BREG ( 1 ), + .B_INPUT ( "DIRECT" ), + .CARRYINREG ( 1 ), + .CARRYINSELREG ( 1 ), + .CREG ( 1 ), + .DREG ( 1 ), + .INMODEREG ( 1 ), + .MASK ( 48'hFFFFFFFFFFFE ), + .MREG ( 1 ), + .OPMODEREG ( 0 ), + .PATTERN ( 48'h000000000000 ), + .PREG ( 1 ), + .SEL_MASK ( "MASK" ), + .SEL_PATTERN ( "PATTERN" ), + .USE_DPORT ( "TRUE" ), + .USE_MULT ( "MULTIPLY" ), + .USE_PATTERN_DETECT ( "NO_PATDET" ), + .USE_SIMD ( "ONE48" )) + \blk00000003/blk000000eb ( + .PATTERNBDETECT(\NLW_blk00000003/blk000000eb_PATTERNBDETECT_UNCONNECTED ), + .RSTC(\blk00000003/sig00000049 ), + .CEB1(\blk00000003/sig00000049 ), + .CEAD(ce), + .MULTSIGNOUT(\NLW_blk00000003/blk000000eb_MULTSIGNOUT_UNCONNECTED ), + .CEC(ce), + .RSTM(\blk00000003/sig00000049 ), + .MULTSIGNIN(\blk00000003/sig00000049 ), + .CEB2(ce), + .RSTCTRL(\blk00000003/sig00000049 ), + .CEP(ce), + .CARRYCASCOUT(\NLW_blk00000003/blk000000eb_CARRYCASCOUT_UNCONNECTED ), + .RSTA(\blk00000003/sig00000049 ), + .CECARRYIN(ce), + .UNDERFLOW(\NLW_blk00000003/blk000000eb_UNDERFLOW_UNCONNECTED ), + .PATTERNDETECT(\NLW_blk00000003/blk000000eb_PATTERNDETECT_UNCONNECTED ), + .RSTALUMODE(\blk00000003/sig00000049 ), + .RSTALLCARRYIN(\blk00000003/sig00000049 ), + .CED(ce), + .RSTD(\blk00000003/sig00000049 ), + .CEALUMODE(ce), + .CEA2(ce), + .CLK(clk), + .CEA1(\blk00000003/sig00000049 ), + .RSTB(\blk00000003/sig00000049 ), + .OVERFLOW(\NLW_blk00000003/blk000000eb_OVERFLOW_UNCONNECTED ), + .CECTRL(ce), + .CEM(ce), + .CARRYIN(\blk00000003/sig00000049 ), + .CARRYCASCIN(\blk00000003/sig00000049 ), + .RSTINMODE(\blk00000003/sig00000049 ), + .CEINMODE(ce), + .RSTP(\blk00000003/sig00000049 ), + .ACOUT({\NLW_blk00000003/blk000000eb_ACOUT<29>_UNCONNECTED , \NLW_blk00000003/blk000000eb_ACOUT<28>_UNCONNECTED , +\NLW_blk00000003/blk000000eb_ACOUT<27>_UNCONNECTED , \NLW_blk00000003/blk000000eb_ACOUT<26>_UNCONNECTED , +\NLW_blk00000003/blk000000eb_ACOUT<25>_UNCONNECTED , \NLW_blk00000003/blk000000eb_ACOUT<24>_UNCONNECTED , +\NLW_blk00000003/blk000000eb_ACOUT<23>_UNCONNECTED , \NLW_blk00000003/blk000000eb_ACOUT<22>_UNCONNECTED , +\NLW_blk00000003/blk000000eb_ACOUT<21>_UNCONNECTED , \NLW_blk00000003/blk000000eb_ACOUT<20>_UNCONNECTED , +\NLW_blk00000003/blk000000eb_ACOUT<19>_UNCONNECTED , \NLW_blk00000003/blk000000eb_ACOUT<18>_UNCONNECTED , +\NLW_blk00000003/blk000000eb_ACOUT<17>_UNCONNECTED , \NLW_blk00000003/blk000000eb_ACOUT<16>_UNCONNECTED , +\NLW_blk00000003/blk000000eb_ACOUT<15>_UNCONNECTED , \NLW_blk00000003/blk000000eb_ACOUT<14>_UNCONNECTED , +\NLW_blk00000003/blk000000eb_ACOUT<13>_UNCONNECTED , \NLW_blk00000003/blk000000eb_ACOUT<12>_UNCONNECTED , +\NLW_blk00000003/blk000000eb_ACOUT<11>_UNCONNECTED , \NLW_blk00000003/blk000000eb_ACOUT<10>_UNCONNECTED , +\NLW_blk00000003/blk000000eb_ACOUT<9>_UNCONNECTED , \NLW_blk00000003/blk000000eb_ACOUT<8>_UNCONNECTED , +\NLW_blk00000003/blk000000eb_ACOUT<7>_UNCONNECTED , \NLW_blk00000003/blk000000eb_ACOUT<6>_UNCONNECTED , +\NLW_blk00000003/blk000000eb_ACOUT<5>_UNCONNECTED , \NLW_blk00000003/blk000000eb_ACOUT<4>_UNCONNECTED , +\NLW_blk00000003/blk000000eb_ACOUT<3>_UNCONNECTED , \NLW_blk00000003/blk000000eb_ACOUT<2>_UNCONNECTED , +\NLW_blk00000003/blk000000eb_ACOUT<1>_UNCONNECTED , \NLW_blk00000003/blk000000eb_ACOUT<0>_UNCONNECTED }), + .OPMODE({\blk00000003/sig00000049 , \blk00000003/sig00000049 , NlwRenamedSig_OI_rfd, \blk00000003/sig00000049 , NlwRenamedSig_OI_rfd, +\blk00000003/sig00000049 , NlwRenamedSig_OI_rfd}), + .PCIN({\blk00000003/sig000002e9 , \blk00000003/sig000002ea , \blk00000003/sig000002eb , \blk00000003/sig000002ec , \blk00000003/sig000002ed , +\blk00000003/sig000002ee , \blk00000003/sig000002ef , \blk00000003/sig000002f0 , \blk00000003/sig000002f1 , \blk00000003/sig000002f2 , +\blk00000003/sig000002f3 , \blk00000003/sig000002f4 , \blk00000003/sig000002f5 , \blk00000003/sig000002f6 , \blk00000003/sig000002f7 , +\blk00000003/sig000002f8 , \blk00000003/sig000002f9 , \blk00000003/sig000002fa , \blk00000003/sig000002fb , \blk00000003/sig000002fc , +\blk00000003/sig000002fd , \blk00000003/sig000002fe , \blk00000003/sig000002ff , \blk00000003/sig00000300 , \blk00000003/sig00000301 , +\blk00000003/sig00000302 , \blk00000003/sig00000303 , \blk00000003/sig00000304 , \blk00000003/sig00000305 , \blk00000003/sig00000306 , +\blk00000003/sig00000307 , \blk00000003/sig00000308 , \blk00000003/sig00000309 , \blk00000003/sig0000030a , \blk00000003/sig0000030b , +\blk00000003/sig0000030c , \blk00000003/sig0000030d , \blk00000003/sig0000030e , \blk00000003/sig0000030f , \blk00000003/sig00000310 , +\blk00000003/sig00000311 , \blk00000003/sig00000312 , \blk00000003/sig00000313 , \blk00000003/sig00000314 , \blk00000003/sig00000315 , +\blk00000003/sig00000316 , \blk00000003/sig00000317 , \blk00000003/sig00000318 }), + .ALUMODE({\blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 }), + .C({\blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , +\blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , +\blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , +\blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , +\blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , +\blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , +\blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , +\blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , +\blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , +\blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 }), + .CARRYOUT({\NLW_blk00000003/blk000000eb_CARRYOUT<3>_UNCONNECTED , \NLW_blk00000003/blk000000eb_CARRYOUT<2>_UNCONNECTED , +\NLW_blk00000003/blk000000eb_CARRYOUT<1>_UNCONNECTED , \NLW_blk00000003/blk000000eb_CARRYOUT<0>_UNCONNECTED }), + .INMODE({\blk00000003/sig00000049 , \blk00000003/sig00000049 , NlwRenamedSig_OI_rfd, \blk00000003/sig00000049 , \blk00000003/sig00000049 }), + .BCIN({\blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , +\blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , +\blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , +\blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 }), + .B({\blk00000003/sig0000044b , \blk00000003/sig0000044c , \blk00000003/sig0000044d , \blk00000003/sig0000044e , \blk00000003/sig0000044f , +\blk00000003/sig00000450 , \blk00000003/sig00000451 , \blk00000003/sig00000452 , \blk00000003/sig00000453 , \blk00000003/sig00000454 , +\blk00000003/sig00000455 , \blk00000003/sig00000456 , \blk00000003/sig00000457 , \blk00000003/sig00000458 , \blk00000003/sig00000459 , +\blk00000003/sig0000045a , \blk00000003/sig0000045b , \blk00000003/sig0000045c }), + .BCOUT({\NLW_blk00000003/blk000000eb_BCOUT<17>_UNCONNECTED , \NLW_blk00000003/blk000000eb_BCOUT<16>_UNCONNECTED , +\NLW_blk00000003/blk000000eb_BCOUT<15>_UNCONNECTED , \NLW_blk00000003/blk000000eb_BCOUT<14>_UNCONNECTED , +\NLW_blk00000003/blk000000eb_BCOUT<13>_UNCONNECTED , \NLW_blk00000003/blk000000eb_BCOUT<12>_UNCONNECTED , +\NLW_blk00000003/blk000000eb_BCOUT<11>_UNCONNECTED , \NLW_blk00000003/blk000000eb_BCOUT<10>_UNCONNECTED , +\NLW_blk00000003/blk000000eb_BCOUT<9>_UNCONNECTED , \NLW_blk00000003/blk000000eb_BCOUT<8>_UNCONNECTED , +\NLW_blk00000003/blk000000eb_BCOUT<7>_UNCONNECTED , \NLW_blk00000003/blk000000eb_BCOUT<6>_UNCONNECTED , +\NLW_blk00000003/blk000000eb_BCOUT<5>_UNCONNECTED , \NLW_blk00000003/blk000000eb_BCOUT<4>_UNCONNECTED , +\NLW_blk00000003/blk000000eb_BCOUT<3>_UNCONNECTED , \NLW_blk00000003/blk000000eb_BCOUT<2>_UNCONNECTED , +\NLW_blk00000003/blk000000eb_BCOUT<1>_UNCONNECTED , \NLW_blk00000003/blk000000eb_BCOUT<0>_UNCONNECTED }), + .D({\blk00000003/sig0000045d , \blk00000003/sig0000045d , \blk00000003/sig0000045e , \blk00000003/sig0000045f , \blk00000003/sig00000460 , +\blk00000003/sig00000461 , \blk00000003/sig00000462 , \blk00000003/sig00000463 , \blk00000003/sig00000464 , \blk00000003/sig00000465 , +\blk00000003/sig00000466 , \blk00000003/sig00000467 , \blk00000003/sig00000468 , \blk00000003/sig00000469 , \blk00000003/sig0000046a , +\blk00000003/sig0000046b , \blk00000003/sig0000046c , \blk00000003/sig0000046d , \blk00000003/sig0000046e , \blk00000003/sig0000046f , +\blk00000003/sig00000470 , \blk00000003/sig00000471 , \blk00000003/sig00000472 , \blk00000003/sig00000473 , \blk00000003/sig00000474 }), + .P({\NLW_blk00000003/blk000000eb_P<47>_UNCONNECTED , \NLW_blk00000003/blk000000eb_P<46>_UNCONNECTED , +\NLW_blk00000003/blk000000eb_P<45>_UNCONNECTED , \NLW_blk00000003/blk000000eb_P<44>_UNCONNECTED , \NLW_blk00000003/blk000000eb_P<43>_UNCONNECTED , +\NLW_blk00000003/blk000000eb_P<42>_UNCONNECTED , \NLW_blk00000003/blk000000eb_P<41>_UNCONNECTED , \NLW_blk00000003/blk000000eb_P<40>_UNCONNECTED , +\NLW_blk00000003/blk000000eb_P<39>_UNCONNECTED , \NLW_blk00000003/blk000000eb_P<38>_UNCONNECTED , \NLW_blk00000003/blk000000eb_P<37>_UNCONNECTED , +\NLW_blk00000003/blk000000eb_P<36>_UNCONNECTED , \NLW_blk00000003/blk000000eb_P<35>_UNCONNECTED , \NLW_blk00000003/blk000000eb_P<34>_UNCONNECTED , +\NLW_blk00000003/blk000000eb_P<33>_UNCONNECTED , \NLW_blk00000003/blk000000eb_P<32>_UNCONNECTED , \NLW_blk00000003/blk000000eb_P<31>_UNCONNECTED , +\NLW_blk00000003/blk000000eb_P<30>_UNCONNECTED , \NLW_blk00000003/blk000000eb_P<29>_UNCONNECTED , \NLW_blk00000003/blk000000eb_P<28>_UNCONNECTED , +\NLW_blk00000003/blk000000eb_P<27>_UNCONNECTED , \NLW_blk00000003/blk000000eb_P<26>_UNCONNECTED , \NLW_blk00000003/blk000000eb_P<25>_UNCONNECTED , +\NLW_blk00000003/blk000000eb_P<24>_UNCONNECTED , \NLW_blk00000003/blk000000eb_P<23>_UNCONNECTED , \NLW_blk00000003/blk000000eb_P<22>_UNCONNECTED , +\NLW_blk00000003/blk000000eb_P<21>_UNCONNECTED , \NLW_blk00000003/blk000000eb_P<20>_UNCONNECTED , \NLW_blk00000003/blk000000eb_P<19>_UNCONNECTED , +\NLW_blk00000003/blk000000eb_P<18>_UNCONNECTED , \NLW_blk00000003/blk000000eb_P<17>_UNCONNECTED , \NLW_blk00000003/blk000000eb_P<16>_UNCONNECTED , +\NLW_blk00000003/blk000000eb_P<15>_UNCONNECTED , \NLW_blk00000003/blk000000eb_P<14>_UNCONNECTED , \NLW_blk00000003/blk000000eb_P<13>_UNCONNECTED , +\NLW_blk00000003/blk000000eb_P<12>_UNCONNECTED , \NLW_blk00000003/blk000000eb_P<11>_UNCONNECTED , \NLW_blk00000003/blk000000eb_P<10>_UNCONNECTED , +\NLW_blk00000003/blk000000eb_P<9>_UNCONNECTED , \NLW_blk00000003/blk000000eb_P<8>_UNCONNECTED , \NLW_blk00000003/blk000000eb_P<7>_UNCONNECTED , +\NLW_blk00000003/blk000000eb_P<6>_UNCONNECTED , \NLW_blk00000003/blk000000eb_P<5>_UNCONNECTED , \NLW_blk00000003/blk000000eb_P<4>_UNCONNECTED , +\NLW_blk00000003/blk000000eb_P<3>_UNCONNECTED , \NLW_blk00000003/blk000000eb_P<2>_UNCONNECTED , \NLW_blk00000003/blk000000eb_P<1>_UNCONNECTED , +\NLW_blk00000003/blk000000eb_P<0>_UNCONNECTED }), + .A({\blk00000003/sig00000475 , \blk00000003/sig00000475 , \blk00000003/sig00000475 , \blk00000003/sig00000475 , \blk00000003/sig00000475 , +\blk00000003/sig00000475 , \blk00000003/sig00000475 , \blk00000003/sig00000476 , \blk00000003/sig00000477 , \blk00000003/sig00000478 , +\blk00000003/sig00000479 , \blk00000003/sig0000047a , \blk00000003/sig0000047b , \blk00000003/sig0000047c , \blk00000003/sig0000047d , +\blk00000003/sig0000047e , \blk00000003/sig0000047f , \blk00000003/sig00000480 , \blk00000003/sig00000481 , \blk00000003/sig00000482 , +\blk00000003/sig00000483 , \blk00000003/sig00000484 , \blk00000003/sig00000485 , \blk00000003/sig00000486 , \blk00000003/sig00000487 , +\blk00000003/sig00000488 , \blk00000003/sig00000489 , \blk00000003/sig0000048a , \blk00000003/sig0000048b , \blk00000003/sig0000048c }), + .PCOUT({\blk00000003/sig0000048d , \blk00000003/sig0000048e , \blk00000003/sig0000048f , \blk00000003/sig00000490 , \blk00000003/sig00000491 , +\blk00000003/sig00000492 , \blk00000003/sig00000493 , \blk00000003/sig00000494 , \blk00000003/sig00000495 , \blk00000003/sig00000496 , +\blk00000003/sig00000497 , \blk00000003/sig00000498 , \blk00000003/sig00000499 , \blk00000003/sig0000049a , \blk00000003/sig0000049b , +\blk00000003/sig0000049c , \blk00000003/sig0000049d , \blk00000003/sig0000049e , \blk00000003/sig0000049f , \blk00000003/sig000004a0 , +\blk00000003/sig000004a1 , \blk00000003/sig000004a2 , \blk00000003/sig000004a3 , \blk00000003/sig000004a4 , \blk00000003/sig000004a5 , +\blk00000003/sig000004a6 , \blk00000003/sig000004a7 , \blk00000003/sig000004a8 , \blk00000003/sig000004a9 , \blk00000003/sig000004aa , +\blk00000003/sig000004ab , \blk00000003/sig000004ac , \blk00000003/sig000004ad , \blk00000003/sig000004ae , \blk00000003/sig000004af , +\blk00000003/sig000004b0 , \blk00000003/sig000004b1 , \blk00000003/sig000004b2 , \blk00000003/sig000004b3 , \blk00000003/sig000004b4 , +\blk00000003/sig000004b5 , \blk00000003/sig000004b6 , \blk00000003/sig000004b7 , \blk00000003/sig000004b8 , \blk00000003/sig000004b9 , +\blk00000003/sig000004ba , \blk00000003/sig000004bb , \blk00000003/sig000004bc }), + .ACIN({\blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , +\blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , +\blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , +\blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , +\blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , +\blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 }), + .CARRYINSEL({\blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 }) + ); + DSP48E1 #( + .ACASCREG ( 1 ), + .ADREG ( 1 ), + .ALUMODEREG ( 0 ), + .AREG ( 1 ), + .AUTORESET_PATDET ( "NO_RESET" ), + .A_INPUT ( "DIRECT" ), + .BCASCREG ( 1 ), + .BREG ( 1 ), + .B_INPUT ( "DIRECT" ), + .CARRYINREG ( 1 ), + .CARRYINSELREG ( 1 ), + .CREG ( 1 ), + .DREG ( 1 ), + .INMODEREG ( 1 ), + .MASK ( 48'hFFFFFFFFFFFE ), + .MREG ( 1 ), + .OPMODEREG ( 0 ), + .PATTERN ( 48'h000000000000 ), + .PREG ( 1 ), + .SEL_MASK ( "MASK" ), + .SEL_PATTERN ( "PATTERN" ), + .USE_DPORT ( "TRUE" ), + .USE_MULT ( "MULTIPLY" ), + .USE_PATTERN_DETECT ( "NO_PATDET" ), + .USE_SIMD ( "ONE48" )) + \blk00000003/blk000000ea ( + .PATTERNBDETECT(\NLW_blk00000003/blk000000ea_PATTERNBDETECT_UNCONNECTED ), + .RSTC(\blk00000003/sig00000049 ), + .CEB1(\blk00000003/sig00000049 ), + .CEAD(ce), + .MULTSIGNOUT(\NLW_blk00000003/blk000000ea_MULTSIGNOUT_UNCONNECTED ), + .CEC(ce), + .RSTM(\blk00000003/sig00000049 ), + .MULTSIGNIN(\blk00000003/sig00000049 ), + .CEB2(ce), + .RSTCTRL(\blk00000003/sig00000049 ), + .CEP(ce), + .CARRYCASCOUT(\NLW_blk00000003/blk000000ea_CARRYCASCOUT_UNCONNECTED ), + .RSTA(\blk00000003/sig00000049 ), + .CECARRYIN(ce), + .UNDERFLOW(\NLW_blk00000003/blk000000ea_UNDERFLOW_UNCONNECTED ), + .PATTERNDETECT(\NLW_blk00000003/blk000000ea_PATTERNDETECT_UNCONNECTED ), + .RSTALUMODE(\blk00000003/sig00000049 ), + .RSTALLCARRYIN(\blk00000003/sig00000049 ), + .CED(ce), + .RSTD(\blk00000003/sig00000049 ), + .CEALUMODE(ce), + .CEA2(ce), + .CLK(clk), + .CEA1(\blk00000003/sig00000049 ), + .RSTB(\blk00000003/sig00000049 ), + .OVERFLOW(\NLW_blk00000003/blk000000ea_OVERFLOW_UNCONNECTED ), + .CECTRL(ce), + .CEM(ce), + .CARRYIN(\blk00000003/sig00000049 ), + .CARRYCASCIN(\blk00000003/sig00000049 ), + .RSTINMODE(\blk00000003/sig00000049 ), + .CEINMODE(ce), + .RSTP(\blk00000003/sig00000049 ), + .ACOUT({\NLW_blk00000003/blk000000ea_ACOUT<29>_UNCONNECTED , \NLW_blk00000003/blk000000ea_ACOUT<28>_UNCONNECTED , +\NLW_blk00000003/blk000000ea_ACOUT<27>_UNCONNECTED , \NLW_blk00000003/blk000000ea_ACOUT<26>_UNCONNECTED , +\NLW_blk00000003/blk000000ea_ACOUT<25>_UNCONNECTED , \NLW_blk00000003/blk000000ea_ACOUT<24>_UNCONNECTED , +\NLW_blk00000003/blk000000ea_ACOUT<23>_UNCONNECTED , \NLW_blk00000003/blk000000ea_ACOUT<22>_UNCONNECTED , +\NLW_blk00000003/blk000000ea_ACOUT<21>_UNCONNECTED , \NLW_blk00000003/blk000000ea_ACOUT<20>_UNCONNECTED , +\NLW_blk00000003/blk000000ea_ACOUT<19>_UNCONNECTED , \NLW_blk00000003/blk000000ea_ACOUT<18>_UNCONNECTED , +\NLW_blk00000003/blk000000ea_ACOUT<17>_UNCONNECTED , \NLW_blk00000003/blk000000ea_ACOUT<16>_UNCONNECTED , +\NLW_blk00000003/blk000000ea_ACOUT<15>_UNCONNECTED , \NLW_blk00000003/blk000000ea_ACOUT<14>_UNCONNECTED , +\NLW_blk00000003/blk000000ea_ACOUT<13>_UNCONNECTED , \NLW_blk00000003/blk000000ea_ACOUT<12>_UNCONNECTED , +\NLW_blk00000003/blk000000ea_ACOUT<11>_UNCONNECTED , \NLW_blk00000003/blk000000ea_ACOUT<10>_UNCONNECTED , +\NLW_blk00000003/blk000000ea_ACOUT<9>_UNCONNECTED , \NLW_blk00000003/blk000000ea_ACOUT<8>_UNCONNECTED , +\NLW_blk00000003/blk000000ea_ACOUT<7>_UNCONNECTED , \NLW_blk00000003/blk000000ea_ACOUT<6>_UNCONNECTED , +\NLW_blk00000003/blk000000ea_ACOUT<5>_UNCONNECTED , \NLW_blk00000003/blk000000ea_ACOUT<4>_UNCONNECTED , +\NLW_blk00000003/blk000000ea_ACOUT<3>_UNCONNECTED , \NLW_blk00000003/blk000000ea_ACOUT<2>_UNCONNECTED , +\NLW_blk00000003/blk000000ea_ACOUT<1>_UNCONNECTED , \NLW_blk00000003/blk000000ea_ACOUT<0>_UNCONNECTED }), + .OPMODE({\blk00000003/sig00000049 , \blk00000003/sig00000049 , NlwRenamedSig_OI_rfd, \blk00000003/sig00000049 , NlwRenamedSig_OI_rfd, +\blk00000003/sig00000049 , NlwRenamedSig_OI_rfd}), + .PCIN({\blk00000003/sig000003eb , \blk00000003/sig000003ec , \blk00000003/sig000003ed , \blk00000003/sig000003ee , \blk00000003/sig000003ef , +\blk00000003/sig000003f0 , \blk00000003/sig000003f1 , \blk00000003/sig000003f2 , \blk00000003/sig000003f3 , \blk00000003/sig000003f4 , +\blk00000003/sig000003f5 , \blk00000003/sig000003f6 , \blk00000003/sig000003f7 , \blk00000003/sig000003f8 , \blk00000003/sig000003f9 , +\blk00000003/sig000003fa , \blk00000003/sig000003fb , \blk00000003/sig000003fc , \blk00000003/sig000003fd , \blk00000003/sig000003fe , +\blk00000003/sig000003ff , \blk00000003/sig00000400 , \blk00000003/sig00000401 , \blk00000003/sig00000402 , \blk00000003/sig00000403 , +\blk00000003/sig00000404 , \blk00000003/sig00000405 , \blk00000003/sig00000406 , \blk00000003/sig00000407 , \blk00000003/sig00000408 , +\blk00000003/sig00000409 , \blk00000003/sig0000040a , \blk00000003/sig0000040b , \blk00000003/sig0000040c , \blk00000003/sig0000040d , +\blk00000003/sig0000040e , \blk00000003/sig0000040f , \blk00000003/sig00000410 , \blk00000003/sig00000411 , \blk00000003/sig00000412 , +\blk00000003/sig00000413 , \blk00000003/sig00000414 , \blk00000003/sig00000415 , \blk00000003/sig00000416 , \blk00000003/sig00000417 , +\blk00000003/sig00000418 , \blk00000003/sig00000419 , \blk00000003/sig0000041a }), + .ALUMODE({\blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 }), + .C({\blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , +\blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , +\blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , +\blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , +\blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , +\blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , +\blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , +\blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , +\blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , +\blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 }), + .CARRYOUT({\NLW_blk00000003/blk000000ea_CARRYOUT<3>_UNCONNECTED , \NLW_blk00000003/blk000000ea_CARRYOUT<2>_UNCONNECTED , +\NLW_blk00000003/blk000000ea_CARRYOUT<1>_UNCONNECTED , \NLW_blk00000003/blk000000ea_CARRYOUT<0>_UNCONNECTED }), + .INMODE({\blk00000003/sig00000049 , \blk00000003/sig00000049 , NlwRenamedSig_OI_rfd, \blk00000003/sig00000049 , \blk00000003/sig00000049 }), + .BCIN({\blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , +\blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , +\blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , +\blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 }), + .B({\blk00000003/sig000003a9 , \blk00000003/sig000003aa , \blk00000003/sig000003ab , \blk00000003/sig000003ac , \blk00000003/sig000003ad , +\blk00000003/sig000003ae , \blk00000003/sig000003af , \blk00000003/sig000003b0 , \blk00000003/sig000003b1 , \blk00000003/sig000003b2 , +\blk00000003/sig000003b3 , \blk00000003/sig000003b4 , \blk00000003/sig000003b5 , \blk00000003/sig000003b6 , \blk00000003/sig000003b7 , +\blk00000003/sig000003b8 , \blk00000003/sig000003b9 , \blk00000003/sig000003ba }), + .BCOUT({\NLW_blk00000003/blk000000ea_BCOUT<17>_UNCONNECTED , \NLW_blk00000003/blk000000ea_BCOUT<16>_UNCONNECTED , +\NLW_blk00000003/blk000000ea_BCOUT<15>_UNCONNECTED , \NLW_blk00000003/blk000000ea_BCOUT<14>_UNCONNECTED , +\NLW_blk00000003/blk000000ea_BCOUT<13>_UNCONNECTED , \NLW_blk00000003/blk000000ea_BCOUT<12>_UNCONNECTED , +\NLW_blk00000003/blk000000ea_BCOUT<11>_UNCONNECTED , \NLW_blk00000003/blk000000ea_BCOUT<10>_UNCONNECTED , +\NLW_blk00000003/blk000000ea_BCOUT<9>_UNCONNECTED , \NLW_blk00000003/blk000000ea_BCOUT<8>_UNCONNECTED , +\NLW_blk00000003/blk000000ea_BCOUT<7>_UNCONNECTED , \NLW_blk00000003/blk000000ea_BCOUT<6>_UNCONNECTED , +\NLW_blk00000003/blk000000ea_BCOUT<5>_UNCONNECTED , \NLW_blk00000003/blk000000ea_BCOUT<4>_UNCONNECTED , +\NLW_blk00000003/blk000000ea_BCOUT<3>_UNCONNECTED , \NLW_blk00000003/blk000000ea_BCOUT<2>_UNCONNECTED , +\NLW_blk00000003/blk000000ea_BCOUT<1>_UNCONNECTED , \NLW_blk00000003/blk000000ea_BCOUT<0>_UNCONNECTED }), + .D({\blk00000003/sig0000041b , \blk00000003/sig0000041b , \blk00000003/sig0000041c , \blk00000003/sig0000041d , \blk00000003/sig0000041e , +\blk00000003/sig0000041f , \blk00000003/sig00000420 , \blk00000003/sig00000421 , \blk00000003/sig00000422 , \blk00000003/sig00000423 , +\blk00000003/sig00000424 , \blk00000003/sig00000425 , \blk00000003/sig00000426 , \blk00000003/sig00000427 , \blk00000003/sig00000428 , +\blk00000003/sig00000429 , \blk00000003/sig0000042a , \blk00000003/sig0000042b , \blk00000003/sig0000042c , \blk00000003/sig0000042d , +\blk00000003/sig0000042e , \blk00000003/sig0000042f , \blk00000003/sig00000430 , \blk00000003/sig00000431 , \blk00000003/sig00000432 }), + .P({\NLW_blk00000003/blk000000ea_P<47>_UNCONNECTED , \NLW_blk00000003/blk000000ea_P<46>_UNCONNECTED , +\NLW_blk00000003/blk000000ea_P<45>_UNCONNECTED , \NLW_blk00000003/blk000000ea_P<44>_UNCONNECTED , \NLW_blk00000003/blk000000ea_P<43>_UNCONNECTED , +\NLW_blk00000003/blk000000ea_P<42>_UNCONNECTED , \NLW_blk00000003/blk000000ea_P<41>_UNCONNECTED , \NLW_blk00000003/blk000000ea_P<40>_UNCONNECTED , +\NLW_blk00000003/blk000000ea_P<39>_UNCONNECTED , \NLW_blk00000003/blk000000ea_P<38>_UNCONNECTED , \NLW_blk00000003/blk000000ea_P<37>_UNCONNECTED , +\NLW_blk00000003/blk000000ea_P<36>_UNCONNECTED , \NLW_blk00000003/blk000000ea_P<35>_UNCONNECTED , \NLW_blk00000003/blk000000ea_P<34>_UNCONNECTED , +\NLW_blk00000003/blk000000ea_P<33>_UNCONNECTED , \NLW_blk00000003/blk000000ea_P<32>_UNCONNECTED , \NLW_blk00000003/blk000000ea_P<31>_UNCONNECTED , +\NLW_blk00000003/blk000000ea_P<30>_UNCONNECTED , \NLW_blk00000003/blk000000ea_P<29>_UNCONNECTED , \NLW_blk00000003/blk000000ea_P<28>_UNCONNECTED , +\NLW_blk00000003/blk000000ea_P<27>_UNCONNECTED , \NLW_blk00000003/blk000000ea_P<26>_UNCONNECTED , \NLW_blk00000003/blk000000ea_P<25>_UNCONNECTED , +\NLW_blk00000003/blk000000ea_P<24>_UNCONNECTED , \NLW_blk00000003/blk000000ea_P<23>_UNCONNECTED , \NLW_blk00000003/blk000000ea_P<22>_UNCONNECTED , +\NLW_blk00000003/blk000000ea_P<21>_UNCONNECTED , \NLW_blk00000003/blk000000ea_P<20>_UNCONNECTED , \NLW_blk00000003/blk000000ea_P<19>_UNCONNECTED , +\NLW_blk00000003/blk000000ea_P<18>_UNCONNECTED , \NLW_blk00000003/blk000000ea_P<17>_UNCONNECTED , \NLW_blk00000003/blk000000ea_P<16>_UNCONNECTED , +\NLW_blk00000003/blk000000ea_P<15>_UNCONNECTED , \NLW_blk00000003/blk000000ea_P<14>_UNCONNECTED , \NLW_blk00000003/blk000000ea_P<13>_UNCONNECTED , +\NLW_blk00000003/blk000000ea_P<12>_UNCONNECTED , \NLW_blk00000003/blk000000ea_P<11>_UNCONNECTED , \NLW_blk00000003/blk000000ea_P<10>_UNCONNECTED , +\NLW_blk00000003/blk000000ea_P<9>_UNCONNECTED , \NLW_blk00000003/blk000000ea_P<8>_UNCONNECTED , \NLW_blk00000003/blk000000ea_P<7>_UNCONNECTED , +\NLW_blk00000003/blk000000ea_P<6>_UNCONNECTED , \NLW_blk00000003/blk000000ea_P<5>_UNCONNECTED , \NLW_blk00000003/blk000000ea_P<4>_UNCONNECTED , +\NLW_blk00000003/blk000000ea_P<3>_UNCONNECTED , \NLW_blk00000003/blk000000ea_P<2>_UNCONNECTED , \NLW_blk00000003/blk000000ea_P<1>_UNCONNECTED , +\NLW_blk00000003/blk000000ea_P<0>_UNCONNECTED }), + .A({\blk00000003/sig00000433 , \blk00000003/sig00000433 , \blk00000003/sig00000433 , \blk00000003/sig00000433 , \blk00000003/sig00000433 , +\blk00000003/sig00000433 , \blk00000003/sig00000433 , \blk00000003/sig00000434 , \blk00000003/sig00000435 , \blk00000003/sig00000436 , +\blk00000003/sig00000437 , \blk00000003/sig00000438 , \blk00000003/sig00000439 , \blk00000003/sig0000043a , \blk00000003/sig0000043b , +\blk00000003/sig0000043c , \blk00000003/sig0000043d , \blk00000003/sig0000043e , \blk00000003/sig0000043f , \blk00000003/sig00000440 , +\blk00000003/sig00000441 , \blk00000003/sig00000442 , \blk00000003/sig00000443 , \blk00000003/sig00000444 , \blk00000003/sig00000445 , +\blk00000003/sig00000446 , \blk00000003/sig00000447 , \blk00000003/sig00000448 , \blk00000003/sig00000449 , \blk00000003/sig0000044a }), + .PCOUT({\blk00000003/sig000000ca , \blk00000003/sig000000cb , \blk00000003/sig000000cc , \blk00000003/sig000000cd , \blk00000003/sig000000ce , +\blk00000003/sig000000cf , \blk00000003/sig000000d0 , \blk00000003/sig000000d1 , \blk00000003/sig000000d2 , \blk00000003/sig000000d3 , +\blk00000003/sig000000d4 , \blk00000003/sig000000d5 , \blk00000003/sig000000d6 , \blk00000003/sig000000d7 , \blk00000003/sig000000d8 , +\blk00000003/sig000000d9 , \blk00000003/sig000000da , \blk00000003/sig000000db , \blk00000003/sig000000dc , \blk00000003/sig000000dd , +\blk00000003/sig000000de , \blk00000003/sig000000df , \blk00000003/sig000000e0 , \blk00000003/sig000000e1 , \blk00000003/sig000000e2 , +\blk00000003/sig000000e3 , \blk00000003/sig000000e4 , \blk00000003/sig000000e5 , \blk00000003/sig000000e6 , \blk00000003/sig000000e7 , +\blk00000003/sig000000e8 , \blk00000003/sig000000e9 , \blk00000003/sig000000ea , \blk00000003/sig000000eb , \blk00000003/sig000000ec , +\blk00000003/sig000000ed , \blk00000003/sig000000ee , \blk00000003/sig000000ef , \blk00000003/sig000000f0 , \blk00000003/sig000000f1 , +\blk00000003/sig000000f2 , \blk00000003/sig000000f3 , \blk00000003/sig000000f4 , \blk00000003/sig000000f5 , \blk00000003/sig000000f6 , +\blk00000003/sig000000f7 , \blk00000003/sig000000f8 , \blk00000003/sig000000f9 }), + .ACIN({\blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , +\blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , +\blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , +\blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , +\blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , +\blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 }), + .CARRYINSEL({\blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 }) + ); + DSP48E1 #( + .ACASCREG ( 1 ), + .ADREG ( 1 ), + .ALUMODEREG ( 0 ), + .AREG ( 1 ), + .AUTORESET_PATDET ( "NO_RESET" ), + .A_INPUT ( "DIRECT" ), + .BCASCREG ( 1 ), + .BREG ( 1 ), + .B_INPUT ( "DIRECT" ), + .CARRYINREG ( 1 ), + .CARRYINSELREG ( 1 ), + .CREG ( 1 ), + .DREG ( 1 ), + .INMODEREG ( 1 ), + .MASK ( 48'hFFFFFFFFFFFE ), + .MREG ( 1 ), + .OPMODEREG ( 0 ), + .PATTERN ( 48'h000000000000 ), + .PREG ( 1 ), + .SEL_MASK ( "MASK" ), + .SEL_PATTERN ( "PATTERN" ), + .USE_DPORT ( "TRUE" ), + .USE_MULT ( "MULTIPLY" ), + .USE_PATTERN_DETECT ( "NO_PATDET" ), + .USE_SIMD ( "ONE48" )) + \blk00000003/blk000000e9 ( + .PATTERNBDETECT(\NLW_blk00000003/blk000000e9_PATTERNBDETECT_UNCONNECTED ), + .RSTC(\blk00000003/sig00000049 ), + .CEB1(\blk00000003/sig00000049 ), + .CEAD(ce), + .MULTSIGNOUT(\NLW_blk00000003/blk000000e9_MULTSIGNOUT_UNCONNECTED ), + .CEC(ce), + .RSTM(\blk00000003/sig00000049 ), + .MULTSIGNIN(\blk00000003/sig00000049 ), + .CEB2(ce), + .RSTCTRL(\blk00000003/sig00000049 ), + .CEP(ce), + .CARRYCASCOUT(\NLW_blk00000003/blk000000e9_CARRYCASCOUT_UNCONNECTED ), + .RSTA(\blk00000003/sig00000049 ), + .CECARRYIN(ce), + .UNDERFLOW(\NLW_blk00000003/blk000000e9_UNDERFLOW_UNCONNECTED ), + .PATTERNDETECT(\NLW_blk00000003/blk000000e9_PATTERNDETECT_UNCONNECTED ), + .RSTALUMODE(\blk00000003/sig00000049 ), + .RSTALLCARRYIN(\blk00000003/sig00000049 ), + .CED(ce), + .RSTD(\blk00000003/sig00000049 ), + .CEALUMODE(ce), + .CEA2(ce), + .CLK(clk), + .CEA1(\blk00000003/sig00000049 ), + .RSTB(\blk00000003/sig00000049 ), + .OVERFLOW(\NLW_blk00000003/blk000000e9_OVERFLOW_UNCONNECTED ), + .CECTRL(ce), + .CEM(ce), + .CARRYIN(\blk00000003/sig00000049 ), + .CARRYCASCIN(\blk00000003/sig00000049 ), + .RSTINMODE(\blk00000003/sig00000049 ), + .CEINMODE(ce), + .RSTP(\blk00000003/sig00000049 ), + .ACOUT({\NLW_blk00000003/blk000000e9_ACOUT<29>_UNCONNECTED , \NLW_blk00000003/blk000000e9_ACOUT<28>_UNCONNECTED , +\NLW_blk00000003/blk000000e9_ACOUT<27>_UNCONNECTED , \NLW_blk00000003/blk000000e9_ACOUT<26>_UNCONNECTED , +\NLW_blk00000003/blk000000e9_ACOUT<25>_UNCONNECTED , \NLW_blk00000003/blk000000e9_ACOUT<24>_UNCONNECTED , +\NLW_blk00000003/blk000000e9_ACOUT<23>_UNCONNECTED , \NLW_blk00000003/blk000000e9_ACOUT<22>_UNCONNECTED , +\NLW_blk00000003/blk000000e9_ACOUT<21>_UNCONNECTED , \NLW_blk00000003/blk000000e9_ACOUT<20>_UNCONNECTED , +\NLW_blk00000003/blk000000e9_ACOUT<19>_UNCONNECTED , \NLW_blk00000003/blk000000e9_ACOUT<18>_UNCONNECTED , +\NLW_blk00000003/blk000000e9_ACOUT<17>_UNCONNECTED , \NLW_blk00000003/blk000000e9_ACOUT<16>_UNCONNECTED , +\NLW_blk00000003/blk000000e9_ACOUT<15>_UNCONNECTED , \NLW_blk00000003/blk000000e9_ACOUT<14>_UNCONNECTED , +\NLW_blk00000003/blk000000e9_ACOUT<13>_UNCONNECTED , \NLW_blk00000003/blk000000e9_ACOUT<12>_UNCONNECTED , +\NLW_blk00000003/blk000000e9_ACOUT<11>_UNCONNECTED , \NLW_blk00000003/blk000000e9_ACOUT<10>_UNCONNECTED , +\NLW_blk00000003/blk000000e9_ACOUT<9>_UNCONNECTED , \NLW_blk00000003/blk000000e9_ACOUT<8>_UNCONNECTED , +\NLW_blk00000003/blk000000e9_ACOUT<7>_UNCONNECTED , \NLW_blk00000003/blk000000e9_ACOUT<6>_UNCONNECTED , +\NLW_blk00000003/blk000000e9_ACOUT<5>_UNCONNECTED , \NLW_blk00000003/blk000000e9_ACOUT<4>_UNCONNECTED , +\NLW_blk00000003/blk000000e9_ACOUT<3>_UNCONNECTED , \NLW_blk00000003/blk000000e9_ACOUT<2>_UNCONNECTED , +\NLW_blk00000003/blk000000e9_ACOUT<1>_UNCONNECTED , \NLW_blk00000003/blk000000e9_ACOUT<0>_UNCONNECTED }), + .OPMODE({\blk00000003/sig00000049 , \blk00000003/sig00000049 , NlwRenamedSig_OI_rfd, \blk00000003/sig00000049 , NlwRenamedSig_OI_rfd, +\blk00000003/sig00000049 , NlwRenamedSig_OI_rfd}), + .PCIN({\blk00000003/sig00000379 , \blk00000003/sig0000037a , \blk00000003/sig0000037b , \blk00000003/sig0000037c , \blk00000003/sig0000037d , +\blk00000003/sig0000037e , \blk00000003/sig0000037f , \blk00000003/sig00000380 , \blk00000003/sig00000381 , \blk00000003/sig00000382 , +\blk00000003/sig00000383 , \blk00000003/sig00000384 , \blk00000003/sig00000385 , \blk00000003/sig00000386 , \blk00000003/sig00000387 , +\blk00000003/sig00000388 , \blk00000003/sig00000389 , \blk00000003/sig0000038a , \blk00000003/sig0000038b , \blk00000003/sig0000038c , +\blk00000003/sig0000038d , \blk00000003/sig0000038e , \blk00000003/sig0000038f , \blk00000003/sig00000390 , \blk00000003/sig00000391 , +\blk00000003/sig00000392 , \blk00000003/sig00000393 , \blk00000003/sig00000394 , \blk00000003/sig00000395 , \blk00000003/sig00000396 , +\blk00000003/sig00000397 , \blk00000003/sig00000398 , \blk00000003/sig00000399 , \blk00000003/sig0000039a , \blk00000003/sig0000039b , +\blk00000003/sig0000039c , \blk00000003/sig0000039d , \blk00000003/sig0000039e , \blk00000003/sig0000039f , \blk00000003/sig000003a0 , +\blk00000003/sig000003a1 , \blk00000003/sig000003a2 , \blk00000003/sig000003a3 , \blk00000003/sig000003a4 , \blk00000003/sig000003a5 , +\blk00000003/sig000003a6 , \blk00000003/sig000003a7 , \blk00000003/sig000003a8 }), + .ALUMODE({\blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 }), + .C({\blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , +\blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , +\blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , +\blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , +\blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , +\blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , +\blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , +\blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , +\blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , +\blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 }), + .CARRYOUT({\NLW_blk00000003/blk000000e9_CARRYOUT<3>_UNCONNECTED , \NLW_blk00000003/blk000000e9_CARRYOUT<2>_UNCONNECTED , +\NLW_blk00000003/blk000000e9_CARRYOUT<1>_UNCONNECTED , \NLW_blk00000003/blk000000e9_CARRYOUT<0>_UNCONNECTED }), + .INMODE({\blk00000003/sig00000049 , \blk00000003/sig00000049 , NlwRenamedSig_OI_rfd, \blk00000003/sig00000049 , \blk00000003/sig00000049 }), + .BCIN({\blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , +\blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , +\blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , +\blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 }), + .B({\blk00000003/sig000003a9 , \blk00000003/sig000003aa , \blk00000003/sig000003ab , \blk00000003/sig000003ac , \blk00000003/sig000003ad , +\blk00000003/sig000003ae , \blk00000003/sig000003af , \blk00000003/sig000003b0 , \blk00000003/sig000003b1 , \blk00000003/sig000003b2 , +\blk00000003/sig000003b3 , \blk00000003/sig000003b4 , \blk00000003/sig000003b5 , \blk00000003/sig000003b6 , \blk00000003/sig000003b7 , +\blk00000003/sig000003b8 , \blk00000003/sig000003b9 , \blk00000003/sig000003ba }), + .BCOUT({\NLW_blk00000003/blk000000e9_BCOUT<17>_UNCONNECTED , \NLW_blk00000003/blk000000e9_BCOUT<16>_UNCONNECTED , +\NLW_blk00000003/blk000000e9_BCOUT<15>_UNCONNECTED , \NLW_blk00000003/blk000000e9_BCOUT<14>_UNCONNECTED , +\NLW_blk00000003/blk000000e9_BCOUT<13>_UNCONNECTED , \NLW_blk00000003/blk000000e9_BCOUT<12>_UNCONNECTED , +\NLW_blk00000003/blk000000e9_BCOUT<11>_UNCONNECTED , \NLW_blk00000003/blk000000e9_BCOUT<10>_UNCONNECTED , +\NLW_blk00000003/blk000000e9_BCOUT<9>_UNCONNECTED , \NLW_blk00000003/blk000000e9_BCOUT<8>_UNCONNECTED , +\NLW_blk00000003/blk000000e9_BCOUT<7>_UNCONNECTED , \NLW_blk00000003/blk000000e9_BCOUT<6>_UNCONNECTED , +\NLW_blk00000003/blk000000e9_BCOUT<5>_UNCONNECTED , \NLW_blk00000003/blk000000e9_BCOUT<4>_UNCONNECTED , +\NLW_blk00000003/blk000000e9_BCOUT<3>_UNCONNECTED , \NLW_blk00000003/blk000000e9_BCOUT<2>_UNCONNECTED , +\NLW_blk00000003/blk000000e9_BCOUT<1>_UNCONNECTED , \NLW_blk00000003/blk000000e9_BCOUT<0>_UNCONNECTED }), + .D({\blk00000003/sig000003bb , \blk00000003/sig000003bb , \blk00000003/sig000003bc , \blk00000003/sig000003bd , \blk00000003/sig000003be , +\blk00000003/sig000003bf , \blk00000003/sig000003c0 , \blk00000003/sig000003c1 , \blk00000003/sig000003c2 , \blk00000003/sig000003c3 , +\blk00000003/sig000003c4 , \blk00000003/sig000003c5 , \blk00000003/sig000003c6 , \blk00000003/sig000003c7 , \blk00000003/sig000003c8 , +\blk00000003/sig000003c9 , \blk00000003/sig000003ca , \blk00000003/sig000003cb , \blk00000003/sig000003cc , \blk00000003/sig000003cd , +\blk00000003/sig000003ce , \blk00000003/sig000003cf , \blk00000003/sig000003d0 , \blk00000003/sig000003d1 , \blk00000003/sig000003d2 }), + .P({\NLW_blk00000003/blk000000e9_P<47>_UNCONNECTED , \NLW_blk00000003/blk000000e9_P<46>_UNCONNECTED , +\NLW_blk00000003/blk000000e9_P<45>_UNCONNECTED , \NLW_blk00000003/blk000000e9_P<44>_UNCONNECTED , \NLW_blk00000003/blk000000e9_P<43>_UNCONNECTED , +\NLW_blk00000003/blk000000e9_P<42>_UNCONNECTED , \NLW_blk00000003/blk000000e9_P<41>_UNCONNECTED , \NLW_blk00000003/blk000000e9_P<40>_UNCONNECTED , +\NLW_blk00000003/blk000000e9_P<39>_UNCONNECTED , \NLW_blk00000003/blk000000e9_P<38>_UNCONNECTED , \NLW_blk00000003/blk000000e9_P<37>_UNCONNECTED , +\NLW_blk00000003/blk000000e9_P<36>_UNCONNECTED , \NLW_blk00000003/blk000000e9_P<35>_UNCONNECTED , \NLW_blk00000003/blk000000e9_P<34>_UNCONNECTED , +\NLW_blk00000003/blk000000e9_P<33>_UNCONNECTED , \NLW_blk00000003/blk000000e9_P<32>_UNCONNECTED , \NLW_blk00000003/blk000000e9_P<31>_UNCONNECTED , +\NLW_blk00000003/blk000000e9_P<30>_UNCONNECTED , \NLW_blk00000003/blk000000e9_P<29>_UNCONNECTED , \NLW_blk00000003/blk000000e9_P<28>_UNCONNECTED , +\NLW_blk00000003/blk000000e9_P<27>_UNCONNECTED , \NLW_blk00000003/blk000000e9_P<26>_UNCONNECTED , \NLW_blk00000003/blk000000e9_P<25>_UNCONNECTED , +\NLW_blk00000003/blk000000e9_P<24>_UNCONNECTED , \NLW_blk00000003/blk000000e9_P<23>_UNCONNECTED , \NLW_blk00000003/blk000000e9_P<22>_UNCONNECTED , +\NLW_blk00000003/blk000000e9_P<21>_UNCONNECTED , \NLW_blk00000003/blk000000e9_P<20>_UNCONNECTED , \NLW_blk00000003/blk000000e9_P<19>_UNCONNECTED , +\NLW_blk00000003/blk000000e9_P<18>_UNCONNECTED , \NLW_blk00000003/blk000000e9_P<17>_UNCONNECTED , \NLW_blk00000003/blk000000e9_P<16>_UNCONNECTED , +\NLW_blk00000003/blk000000e9_P<15>_UNCONNECTED , \NLW_blk00000003/blk000000e9_P<14>_UNCONNECTED , \NLW_blk00000003/blk000000e9_P<13>_UNCONNECTED , +\NLW_blk00000003/blk000000e9_P<12>_UNCONNECTED , \NLW_blk00000003/blk000000e9_P<11>_UNCONNECTED , \NLW_blk00000003/blk000000e9_P<10>_UNCONNECTED , +\NLW_blk00000003/blk000000e9_P<9>_UNCONNECTED , \NLW_blk00000003/blk000000e9_P<8>_UNCONNECTED , \NLW_blk00000003/blk000000e9_P<7>_UNCONNECTED , +\NLW_blk00000003/blk000000e9_P<6>_UNCONNECTED , \NLW_blk00000003/blk000000e9_P<5>_UNCONNECTED , \NLW_blk00000003/blk000000e9_P<4>_UNCONNECTED , +\NLW_blk00000003/blk000000e9_P<3>_UNCONNECTED , \NLW_blk00000003/blk000000e9_P<2>_UNCONNECTED , \NLW_blk00000003/blk000000e9_P<1>_UNCONNECTED , +\NLW_blk00000003/blk000000e9_P<0>_UNCONNECTED }), + .A({\blk00000003/sig000003d3 , \blk00000003/sig000003d3 , \blk00000003/sig000003d3 , \blk00000003/sig000003d3 , \blk00000003/sig000003d3 , +\blk00000003/sig000003d3 , \blk00000003/sig000003d3 , \blk00000003/sig000003d4 , \blk00000003/sig000003d5 , \blk00000003/sig000003d6 , +\blk00000003/sig000003d7 , \blk00000003/sig000003d8 , \blk00000003/sig000003d9 , \blk00000003/sig000003da , \blk00000003/sig000003db , +\blk00000003/sig000003dc , \blk00000003/sig000003dd , \blk00000003/sig000003de , \blk00000003/sig000003df , \blk00000003/sig000003e0 , +\blk00000003/sig000003e1 , \blk00000003/sig000003e2 , \blk00000003/sig000003e3 , \blk00000003/sig000003e4 , \blk00000003/sig000003e5 , +\blk00000003/sig000003e6 , \blk00000003/sig000003e7 , \blk00000003/sig000003e8 , \blk00000003/sig000003e9 , \blk00000003/sig000003ea }), + .PCOUT({\blk00000003/sig00000153 , \blk00000003/sig00000154 , \blk00000003/sig00000155 , \blk00000003/sig00000156 , \blk00000003/sig00000157 , +\blk00000003/sig00000158 , \blk00000003/sig00000159 , \blk00000003/sig0000015a , \blk00000003/sig0000015b , \blk00000003/sig0000015c , +\blk00000003/sig0000015d , \blk00000003/sig0000015e , \blk00000003/sig0000015f , \blk00000003/sig00000160 , \blk00000003/sig00000161 , +\blk00000003/sig00000162 , \blk00000003/sig00000163 , \blk00000003/sig00000164 , \blk00000003/sig00000165 , \blk00000003/sig00000166 , +\blk00000003/sig00000167 , \blk00000003/sig00000168 , \blk00000003/sig00000169 , \blk00000003/sig0000016a , \blk00000003/sig0000016b , +\blk00000003/sig0000016c , \blk00000003/sig0000016d , \blk00000003/sig0000016e , \blk00000003/sig0000016f , \blk00000003/sig00000170 , +\blk00000003/sig00000171 , \blk00000003/sig00000172 , \blk00000003/sig00000173 , \blk00000003/sig00000174 , \blk00000003/sig00000175 , +\blk00000003/sig00000176 , \blk00000003/sig00000177 , \blk00000003/sig00000178 , \blk00000003/sig00000179 , \blk00000003/sig0000017a , +\blk00000003/sig0000017b , \blk00000003/sig0000017c , \blk00000003/sig0000017d , \blk00000003/sig0000017e , \blk00000003/sig0000017f , +\blk00000003/sig00000180 , \blk00000003/sig00000181 , \blk00000003/sig00000182 }), + .ACIN({\blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , +\blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , +\blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , +\blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , +\blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , +\blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 }), + .CARRYINSEL({\blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 }) + ); + DSP48E1 #( + .ACASCREG ( 1 ), + .ADREG ( 1 ), + .ALUMODEREG ( 0 ), + .AREG ( 1 ), + .AUTORESET_PATDET ( "NO_RESET" ), + .A_INPUT ( "DIRECT" ), + .BCASCREG ( 1 ), + .BREG ( 1 ), + .B_INPUT ( "DIRECT" ), + .CARRYINREG ( 1 ), + .CARRYINSELREG ( 1 ), + .CREG ( 1 ), + .DREG ( 1 ), + .INMODEREG ( 1 ), + .MASK ( 48'hFFFFFFFFFFFE ), + .MREG ( 1 ), + .OPMODEREG ( 0 ), + .PATTERN ( 48'h000000000000 ), + .PREG ( 1 ), + .SEL_MASK ( "MASK" ), + .SEL_PATTERN ( "PATTERN" ), + .USE_DPORT ( "TRUE" ), + .USE_MULT ( "MULTIPLY" ), + .USE_PATTERN_DETECT ( "NO_PATDET" ), + .USE_SIMD ( "ONE48" )) + \blk00000003/blk000000e8 ( + .PATTERNBDETECT(\NLW_blk00000003/blk000000e8_PATTERNBDETECT_UNCONNECTED ), + .RSTC(\blk00000003/sig00000049 ), + .CEB1(\blk00000003/sig00000049 ), + .CEAD(ce), + .MULTSIGNOUT(\NLW_blk00000003/blk000000e8_MULTSIGNOUT_UNCONNECTED ), + .CEC(ce), + .RSTM(\blk00000003/sig00000049 ), + .MULTSIGNIN(\blk00000003/sig00000049 ), + .CEB2(ce), + .RSTCTRL(\blk00000003/sig00000049 ), + .CEP(ce), + .CARRYCASCOUT(\NLW_blk00000003/blk000000e8_CARRYCASCOUT_UNCONNECTED ), + .RSTA(\blk00000003/sig00000049 ), + .CECARRYIN(ce), + .UNDERFLOW(\NLW_blk00000003/blk000000e8_UNDERFLOW_UNCONNECTED ), + .PATTERNDETECT(\NLW_blk00000003/blk000000e8_PATTERNDETECT_UNCONNECTED ), + .RSTALUMODE(\blk00000003/sig00000049 ), + .RSTALLCARRYIN(\blk00000003/sig00000049 ), + .CED(ce), + .RSTD(\blk00000003/sig00000049 ), + .CEALUMODE(ce), + .CEA2(ce), + .CLK(clk), + .CEA1(\blk00000003/sig00000049 ), + .RSTB(\blk00000003/sig00000049 ), + .OVERFLOW(\NLW_blk00000003/blk000000e8_OVERFLOW_UNCONNECTED ), + .CECTRL(ce), + .CEM(ce), + .CARRYIN(\blk00000003/sig00000049 ), + .CARRYCASCIN(\blk00000003/sig00000049 ), + .RSTINMODE(\blk00000003/sig00000049 ), + .CEINMODE(ce), + .RSTP(\blk00000003/sig00000049 ), + .ACOUT({\NLW_blk00000003/blk000000e8_ACOUT<29>_UNCONNECTED , \NLW_blk00000003/blk000000e8_ACOUT<28>_UNCONNECTED , +\NLW_blk00000003/blk000000e8_ACOUT<27>_UNCONNECTED , \NLW_blk00000003/blk000000e8_ACOUT<26>_UNCONNECTED , +\NLW_blk00000003/blk000000e8_ACOUT<25>_UNCONNECTED , \NLW_blk00000003/blk000000e8_ACOUT<24>_UNCONNECTED , +\NLW_blk00000003/blk000000e8_ACOUT<23>_UNCONNECTED , \NLW_blk00000003/blk000000e8_ACOUT<22>_UNCONNECTED , +\NLW_blk00000003/blk000000e8_ACOUT<21>_UNCONNECTED , \NLW_blk00000003/blk000000e8_ACOUT<20>_UNCONNECTED , +\NLW_blk00000003/blk000000e8_ACOUT<19>_UNCONNECTED , \NLW_blk00000003/blk000000e8_ACOUT<18>_UNCONNECTED , +\NLW_blk00000003/blk000000e8_ACOUT<17>_UNCONNECTED , \NLW_blk00000003/blk000000e8_ACOUT<16>_UNCONNECTED , +\NLW_blk00000003/blk000000e8_ACOUT<15>_UNCONNECTED , \NLW_blk00000003/blk000000e8_ACOUT<14>_UNCONNECTED , +\NLW_blk00000003/blk000000e8_ACOUT<13>_UNCONNECTED , \NLW_blk00000003/blk000000e8_ACOUT<12>_UNCONNECTED , +\NLW_blk00000003/blk000000e8_ACOUT<11>_UNCONNECTED , \NLW_blk00000003/blk000000e8_ACOUT<10>_UNCONNECTED , +\NLW_blk00000003/blk000000e8_ACOUT<9>_UNCONNECTED , \NLW_blk00000003/blk000000e8_ACOUT<8>_UNCONNECTED , +\NLW_blk00000003/blk000000e8_ACOUT<7>_UNCONNECTED , \NLW_blk00000003/blk000000e8_ACOUT<6>_UNCONNECTED , +\NLW_blk00000003/blk000000e8_ACOUT<5>_UNCONNECTED , \NLW_blk00000003/blk000000e8_ACOUT<4>_UNCONNECTED , +\NLW_blk00000003/blk000000e8_ACOUT<3>_UNCONNECTED , \NLW_blk00000003/blk000000e8_ACOUT<2>_UNCONNECTED , +\NLW_blk00000003/blk000000e8_ACOUT<1>_UNCONNECTED , \NLW_blk00000003/blk000000e8_ACOUT<0>_UNCONNECTED }), + .OPMODE({\blk00000003/sig00000049 , NlwRenamedSig_OI_rfd, NlwRenamedSig_OI_rfd, \blk00000003/sig00000049 , NlwRenamedSig_OI_rfd, +\blk00000003/sig00000049 , NlwRenamedSig_OI_rfd}), + .PCIN({\blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , +\blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , +\blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , +\blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , +\blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , +\blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , +\blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , +\blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , +\blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , +\blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 }), + .ALUMODE({\blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 }), + .C({\blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , +\blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , +\blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , +\blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , +\blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , +\blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , +\blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , +\blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , +\blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , +\blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 }), + .CARRYOUT({\NLW_blk00000003/blk000000e8_CARRYOUT<3>_UNCONNECTED , \NLW_blk00000003/blk000000e8_CARRYOUT<2>_UNCONNECTED , +\NLW_blk00000003/blk000000e8_CARRYOUT<1>_UNCONNECTED , \NLW_blk00000003/blk000000e8_CARRYOUT<0>_UNCONNECTED }), + .INMODE({\blk00000003/sig00000049 , \blk00000003/sig00000049 , NlwRenamedSig_OI_rfd, \blk00000003/sig00000049 , \blk00000003/sig00000049 }), + .BCIN({\blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , +\blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , +\blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , +\blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 }), + .B({\blk00000003/sig000002a7 , \blk00000003/sig000002a8 , \blk00000003/sig000002a9 , \blk00000003/sig000002aa , \blk00000003/sig000002ab , +\blk00000003/sig000002ac , \blk00000003/sig000002ad , \blk00000003/sig000002ae , \blk00000003/sig000002af , \blk00000003/sig000002b0 , +\blk00000003/sig000002b1 , \blk00000003/sig000002b2 , \blk00000003/sig000002b3 , \blk00000003/sig000002b4 , \blk00000003/sig000002b5 , +\blk00000003/sig000002b6 , \blk00000003/sig000002b7 , \blk00000003/sig000002b8 }), + .BCOUT({\NLW_blk00000003/blk000000e8_BCOUT<17>_UNCONNECTED , \NLW_blk00000003/blk000000e8_BCOUT<16>_UNCONNECTED , +\NLW_blk00000003/blk000000e8_BCOUT<15>_UNCONNECTED , \NLW_blk00000003/blk000000e8_BCOUT<14>_UNCONNECTED , +\NLW_blk00000003/blk000000e8_BCOUT<13>_UNCONNECTED , \NLW_blk00000003/blk000000e8_BCOUT<12>_UNCONNECTED , +\NLW_blk00000003/blk000000e8_BCOUT<11>_UNCONNECTED , \NLW_blk00000003/blk000000e8_BCOUT<10>_UNCONNECTED , +\NLW_blk00000003/blk000000e8_BCOUT<9>_UNCONNECTED , \NLW_blk00000003/blk000000e8_BCOUT<8>_UNCONNECTED , +\NLW_blk00000003/blk000000e8_BCOUT<7>_UNCONNECTED , \NLW_blk00000003/blk000000e8_BCOUT<6>_UNCONNECTED , +\NLW_blk00000003/blk000000e8_BCOUT<5>_UNCONNECTED , \NLW_blk00000003/blk000000e8_BCOUT<4>_UNCONNECTED , +\NLW_blk00000003/blk000000e8_BCOUT<3>_UNCONNECTED , \NLW_blk00000003/blk000000e8_BCOUT<2>_UNCONNECTED , +\NLW_blk00000003/blk000000e8_BCOUT<1>_UNCONNECTED , \NLW_blk00000003/blk000000e8_BCOUT<0>_UNCONNECTED }), + .D({\blk00000003/sig00000319 , \blk00000003/sig00000319 , \blk00000003/sig0000031a , \blk00000003/sig0000031b , \blk00000003/sig0000031c , +\blk00000003/sig0000031d , \blk00000003/sig0000031e , \blk00000003/sig0000031f , \blk00000003/sig00000320 , \blk00000003/sig00000321 , +\blk00000003/sig00000322 , \blk00000003/sig00000323 , \blk00000003/sig00000324 , \blk00000003/sig00000325 , \blk00000003/sig00000326 , +\blk00000003/sig00000327 , \blk00000003/sig00000328 , \blk00000003/sig00000329 , \blk00000003/sig0000032a , \blk00000003/sig0000032b , +\blk00000003/sig0000032c , \blk00000003/sig0000032d , \blk00000003/sig0000032e , \blk00000003/sig0000032f , \blk00000003/sig00000330 }), + .P({\NLW_blk00000003/blk000000e8_P<47>_UNCONNECTED , \NLW_blk00000003/blk000000e8_P<46>_UNCONNECTED , +\NLW_blk00000003/blk000000e8_P<45>_UNCONNECTED , \NLW_blk00000003/blk000000e8_P<44>_UNCONNECTED , \NLW_blk00000003/blk000000e8_P<43>_UNCONNECTED , +\NLW_blk00000003/blk000000e8_P<42>_UNCONNECTED , \NLW_blk00000003/blk000000e8_P<41>_UNCONNECTED , \NLW_blk00000003/blk000000e8_P<40>_UNCONNECTED , +\NLW_blk00000003/blk000000e8_P<39>_UNCONNECTED , \NLW_blk00000003/blk000000e8_P<38>_UNCONNECTED , \NLW_blk00000003/blk000000e8_P<37>_UNCONNECTED , +\NLW_blk00000003/blk000000e8_P<36>_UNCONNECTED , \NLW_blk00000003/blk000000e8_P<35>_UNCONNECTED , \NLW_blk00000003/blk000000e8_P<34>_UNCONNECTED , +\NLW_blk00000003/blk000000e8_P<33>_UNCONNECTED , \NLW_blk00000003/blk000000e8_P<32>_UNCONNECTED , \NLW_blk00000003/blk000000e8_P<31>_UNCONNECTED , +\NLW_blk00000003/blk000000e8_P<30>_UNCONNECTED , \NLW_blk00000003/blk000000e8_P<29>_UNCONNECTED , \NLW_blk00000003/blk000000e8_P<28>_UNCONNECTED , +\NLW_blk00000003/blk000000e8_P<27>_UNCONNECTED , \NLW_blk00000003/blk000000e8_P<26>_UNCONNECTED , \NLW_blk00000003/blk000000e8_P<25>_UNCONNECTED , +\NLW_blk00000003/blk000000e8_P<24>_UNCONNECTED , \NLW_blk00000003/blk000000e8_P<23>_UNCONNECTED , \NLW_blk00000003/blk000000e8_P<22>_UNCONNECTED , +\NLW_blk00000003/blk000000e8_P<21>_UNCONNECTED , \NLW_blk00000003/blk000000e8_P<20>_UNCONNECTED , \NLW_blk00000003/blk000000e8_P<19>_UNCONNECTED , +\NLW_blk00000003/blk000000e8_P<18>_UNCONNECTED , \NLW_blk00000003/blk000000e8_P<17>_UNCONNECTED , \NLW_blk00000003/blk000000e8_P<16>_UNCONNECTED , +\NLW_blk00000003/blk000000e8_P<15>_UNCONNECTED , \NLW_blk00000003/blk000000e8_P<14>_UNCONNECTED , \NLW_blk00000003/blk000000e8_P<13>_UNCONNECTED , +\NLW_blk00000003/blk000000e8_P<12>_UNCONNECTED , \NLW_blk00000003/blk000000e8_P<11>_UNCONNECTED , \NLW_blk00000003/blk000000e8_P<10>_UNCONNECTED , +\NLW_blk00000003/blk000000e8_P<9>_UNCONNECTED , \NLW_blk00000003/blk000000e8_P<8>_UNCONNECTED , \NLW_blk00000003/blk000000e8_P<7>_UNCONNECTED , +\NLW_blk00000003/blk000000e8_P<6>_UNCONNECTED , \NLW_blk00000003/blk000000e8_P<5>_UNCONNECTED , \NLW_blk00000003/blk000000e8_P<4>_UNCONNECTED , +\NLW_blk00000003/blk000000e8_P<3>_UNCONNECTED , \NLW_blk00000003/blk000000e8_P<2>_UNCONNECTED , \NLW_blk00000003/blk000000e8_P<1>_UNCONNECTED , +\NLW_blk00000003/blk000000e8_P<0>_UNCONNECTED }), + .A({\blk00000003/sig00000331 , \blk00000003/sig00000331 , \blk00000003/sig00000331 , \blk00000003/sig00000331 , \blk00000003/sig00000331 , +\blk00000003/sig00000331 , \blk00000003/sig00000331 , \blk00000003/sig00000332 , \blk00000003/sig00000333 , \blk00000003/sig00000334 , +\blk00000003/sig00000335 , \blk00000003/sig00000336 , \blk00000003/sig00000337 , \blk00000003/sig00000338 , \blk00000003/sig00000339 , +\blk00000003/sig0000033a , \blk00000003/sig0000033b , \blk00000003/sig0000033c , \blk00000003/sig0000033d , \blk00000003/sig0000033e , +\blk00000003/sig0000033f , \blk00000003/sig00000340 , \blk00000003/sig00000341 , \blk00000003/sig00000342 , \blk00000003/sig00000343 , +\blk00000003/sig00000344 , \blk00000003/sig00000345 , \blk00000003/sig00000346 , \blk00000003/sig00000347 , \blk00000003/sig00000348 }), + .PCOUT({\blk00000003/sig00000349 , \blk00000003/sig0000034a , \blk00000003/sig0000034b , \blk00000003/sig0000034c , \blk00000003/sig0000034d , +\blk00000003/sig0000034e , \blk00000003/sig0000034f , \blk00000003/sig00000350 , \blk00000003/sig00000351 , \blk00000003/sig00000352 , +\blk00000003/sig00000353 , \blk00000003/sig00000354 , \blk00000003/sig00000355 , \blk00000003/sig00000356 , \blk00000003/sig00000357 , +\blk00000003/sig00000358 , \blk00000003/sig00000359 , \blk00000003/sig0000035a , \blk00000003/sig0000035b , \blk00000003/sig0000035c , +\blk00000003/sig0000035d , \blk00000003/sig0000035e , \blk00000003/sig0000035f , \blk00000003/sig00000360 , \blk00000003/sig00000361 , +\blk00000003/sig00000362 , \blk00000003/sig00000363 , \blk00000003/sig00000364 , \blk00000003/sig00000365 , \blk00000003/sig00000366 , +\blk00000003/sig00000367 , \blk00000003/sig00000368 , \blk00000003/sig00000369 , \blk00000003/sig0000036a , \blk00000003/sig0000036b , +\blk00000003/sig0000036c , \blk00000003/sig0000036d , \blk00000003/sig0000036e , \blk00000003/sig0000036f , \blk00000003/sig00000370 , +\blk00000003/sig00000371 , \blk00000003/sig00000372 , \blk00000003/sig00000373 , \blk00000003/sig00000374 , \blk00000003/sig00000375 , +\blk00000003/sig00000376 , \blk00000003/sig00000377 , \blk00000003/sig00000378 }), + .ACIN({\blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , +\blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , +\blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , +\blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , +\blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , +\blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 }), + .CARRYINSEL({\blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 }) + ); + DSP48E1 #( + .ACASCREG ( 1 ), + .ADREG ( 1 ), + .ALUMODEREG ( 0 ), + .AREG ( 1 ), + .AUTORESET_PATDET ( "NO_RESET" ), + .A_INPUT ( "DIRECT" ), + .BCASCREG ( 1 ), + .BREG ( 1 ), + .B_INPUT ( "DIRECT" ), + .CARRYINREG ( 1 ), + .CARRYINSELREG ( 1 ), + .CREG ( 1 ), + .DREG ( 1 ), + .INMODEREG ( 1 ), + .MASK ( 48'hFFFFFFFFFFFE ), + .MREG ( 1 ), + .OPMODEREG ( 0 ), + .PATTERN ( 48'h000000000000 ), + .PREG ( 1 ), + .SEL_MASK ( "MASK" ), + .SEL_PATTERN ( "PATTERN" ), + .USE_DPORT ( "TRUE" ), + .USE_MULT ( "MULTIPLY" ), + .USE_PATTERN_DETECT ( "NO_PATDET" ), + .USE_SIMD ( "ONE48" )) + \blk00000003/blk000000e7 ( + .PATTERNBDETECT(\NLW_blk00000003/blk000000e7_PATTERNBDETECT_UNCONNECTED ), + .RSTC(\blk00000003/sig00000049 ), + .CEB1(\blk00000003/sig00000049 ), + .CEAD(ce), + .MULTSIGNOUT(\NLW_blk00000003/blk000000e7_MULTSIGNOUT_UNCONNECTED ), + .CEC(ce), + .RSTM(\blk00000003/sig00000049 ), + .MULTSIGNIN(\blk00000003/sig00000049 ), + .CEB2(ce), + .RSTCTRL(\blk00000003/sig00000049 ), + .CEP(ce), + .CARRYCASCOUT(\NLW_blk00000003/blk000000e7_CARRYCASCOUT_UNCONNECTED ), + .RSTA(\blk00000003/sig00000049 ), + .CECARRYIN(ce), + .UNDERFLOW(\NLW_blk00000003/blk000000e7_UNDERFLOW_UNCONNECTED ), + .PATTERNDETECT(\NLW_blk00000003/blk000000e7_PATTERNDETECT_UNCONNECTED ), + .RSTALUMODE(\blk00000003/sig00000049 ), + .RSTALLCARRYIN(\blk00000003/sig00000049 ), + .CED(ce), + .RSTD(\blk00000003/sig00000049 ), + .CEALUMODE(ce), + .CEA2(ce), + .CLK(clk), + .CEA1(\blk00000003/sig00000049 ), + .RSTB(\blk00000003/sig00000049 ), + .OVERFLOW(\NLW_blk00000003/blk000000e7_OVERFLOW_UNCONNECTED ), + .CECTRL(ce), + .CEM(ce), + .CARRYIN(\blk00000003/sig00000049 ), + .CARRYCASCIN(\blk00000003/sig00000049 ), + .RSTINMODE(\blk00000003/sig00000049 ), + .CEINMODE(ce), + .RSTP(\blk00000003/sig00000049 ), + .ACOUT({\NLW_blk00000003/blk000000e7_ACOUT<29>_UNCONNECTED , \NLW_blk00000003/blk000000e7_ACOUT<28>_UNCONNECTED , +\NLW_blk00000003/blk000000e7_ACOUT<27>_UNCONNECTED , \NLW_blk00000003/blk000000e7_ACOUT<26>_UNCONNECTED , +\NLW_blk00000003/blk000000e7_ACOUT<25>_UNCONNECTED , \NLW_blk00000003/blk000000e7_ACOUT<24>_UNCONNECTED , +\NLW_blk00000003/blk000000e7_ACOUT<23>_UNCONNECTED , \NLW_blk00000003/blk000000e7_ACOUT<22>_UNCONNECTED , +\NLW_blk00000003/blk000000e7_ACOUT<21>_UNCONNECTED , \NLW_blk00000003/blk000000e7_ACOUT<20>_UNCONNECTED , +\NLW_blk00000003/blk000000e7_ACOUT<19>_UNCONNECTED , \NLW_blk00000003/blk000000e7_ACOUT<18>_UNCONNECTED , +\NLW_blk00000003/blk000000e7_ACOUT<17>_UNCONNECTED , \NLW_blk00000003/blk000000e7_ACOUT<16>_UNCONNECTED , +\NLW_blk00000003/blk000000e7_ACOUT<15>_UNCONNECTED , \NLW_blk00000003/blk000000e7_ACOUT<14>_UNCONNECTED , +\NLW_blk00000003/blk000000e7_ACOUT<13>_UNCONNECTED , \NLW_blk00000003/blk000000e7_ACOUT<12>_UNCONNECTED , +\NLW_blk00000003/blk000000e7_ACOUT<11>_UNCONNECTED , \NLW_blk00000003/blk000000e7_ACOUT<10>_UNCONNECTED , +\NLW_blk00000003/blk000000e7_ACOUT<9>_UNCONNECTED , \NLW_blk00000003/blk000000e7_ACOUT<8>_UNCONNECTED , +\NLW_blk00000003/blk000000e7_ACOUT<7>_UNCONNECTED , \NLW_blk00000003/blk000000e7_ACOUT<6>_UNCONNECTED , +\NLW_blk00000003/blk000000e7_ACOUT<5>_UNCONNECTED , \NLW_blk00000003/blk000000e7_ACOUT<4>_UNCONNECTED , +\NLW_blk00000003/blk000000e7_ACOUT<3>_UNCONNECTED , \NLW_blk00000003/blk000000e7_ACOUT<2>_UNCONNECTED , +\NLW_blk00000003/blk000000e7_ACOUT<1>_UNCONNECTED , \NLW_blk00000003/blk000000e7_ACOUT<0>_UNCONNECTED }), + .OPMODE({\blk00000003/sig00000049 , NlwRenamedSig_OI_rfd, NlwRenamedSig_OI_rfd, \blk00000003/sig00000049 , NlwRenamedSig_OI_rfd, +\blk00000003/sig00000049 , NlwRenamedSig_OI_rfd}), + .PCIN({\blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , +\blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , +\blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , +\blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , +\blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , +\blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , +\blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , +\blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , +\blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , +\blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 }), + .ALUMODE({\blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 }), + .C({\blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , +\blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , +\blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , +\blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , +\blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , +\blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , +\blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , +\blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , +\blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , +\blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 }), + .CARRYOUT({\NLW_blk00000003/blk000000e7_CARRYOUT<3>_UNCONNECTED , \NLW_blk00000003/blk000000e7_CARRYOUT<2>_UNCONNECTED , +\NLW_blk00000003/blk000000e7_CARRYOUT<1>_UNCONNECTED , \NLW_blk00000003/blk000000e7_CARRYOUT<0>_UNCONNECTED }), + .INMODE({\blk00000003/sig00000049 , \blk00000003/sig00000049 , NlwRenamedSig_OI_rfd, \blk00000003/sig00000049 , \blk00000003/sig00000049 }), + .BCIN({\blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , +\blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , +\blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , +\blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 }), + .B({\blk00000003/sig000002a7 , \blk00000003/sig000002a8 , \blk00000003/sig000002a9 , \blk00000003/sig000002aa , \blk00000003/sig000002ab , +\blk00000003/sig000002ac , \blk00000003/sig000002ad , \blk00000003/sig000002ae , \blk00000003/sig000002af , \blk00000003/sig000002b0 , +\blk00000003/sig000002b1 , \blk00000003/sig000002b2 , \blk00000003/sig000002b3 , \blk00000003/sig000002b4 , \blk00000003/sig000002b5 , +\blk00000003/sig000002b6 , \blk00000003/sig000002b7 , \blk00000003/sig000002b8 }), + .BCOUT({\NLW_blk00000003/blk000000e7_BCOUT<17>_UNCONNECTED , \NLW_blk00000003/blk000000e7_BCOUT<16>_UNCONNECTED , +\NLW_blk00000003/blk000000e7_BCOUT<15>_UNCONNECTED , \NLW_blk00000003/blk000000e7_BCOUT<14>_UNCONNECTED , +\NLW_blk00000003/blk000000e7_BCOUT<13>_UNCONNECTED , \NLW_blk00000003/blk000000e7_BCOUT<12>_UNCONNECTED , +\NLW_blk00000003/blk000000e7_BCOUT<11>_UNCONNECTED , \NLW_blk00000003/blk000000e7_BCOUT<10>_UNCONNECTED , +\NLW_blk00000003/blk000000e7_BCOUT<9>_UNCONNECTED , \NLW_blk00000003/blk000000e7_BCOUT<8>_UNCONNECTED , +\NLW_blk00000003/blk000000e7_BCOUT<7>_UNCONNECTED , \NLW_blk00000003/blk000000e7_BCOUT<6>_UNCONNECTED , +\NLW_blk00000003/blk000000e7_BCOUT<5>_UNCONNECTED , \NLW_blk00000003/blk000000e7_BCOUT<4>_UNCONNECTED , +\NLW_blk00000003/blk000000e7_BCOUT<3>_UNCONNECTED , \NLW_blk00000003/blk000000e7_BCOUT<2>_UNCONNECTED , +\NLW_blk00000003/blk000000e7_BCOUT<1>_UNCONNECTED , \NLW_blk00000003/blk000000e7_BCOUT<0>_UNCONNECTED }), + .D({\blk00000003/sig000002b9 , \blk00000003/sig000002b9 , \blk00000003/sig000002ba , \blk00000003/sig000002bb , \blk00000003/sig000002bc , +\blk00000003/sig000002bd , \blk00000003/sig000002be , \blk00000003/sig000002bf , \blk00000003/sig000002c0 , \blk00000003/sig000002c1 , +\blk00000003/sig000002c2 , \blk00000003/sig000002c3 , \blk00000003/sig000002c4 , \blk00000003/sig000002c5 , \blk00000003/sig000002c6 , +\blk00000003/sig000002c7 , \blk00000003/sig000002c8 , \blk00000003/sig000002c9 , \blk00000003/sig000002ca , \blk00000003/sig000002cb , +\blk00000003/sig000002cc , \blk00000003/sig000002cd , \blk00000003/sig000002ce , \blk00000003/sig000002cf , \blk00000003/sig000002d0 }), + .P({\NLW_blk00000003/blk000000e7_P<47>_UNCONNECTED , \NLW_blk00000003/blk000000e7_P<46>_UNCONNECTED , +\NLW_blk00000003/blk000000e7_P<45>_UNCONNECTED , \NLW_blk00000003/blk000000e7_P<44>_UNCONNECTED , \NLW_blk00000003/blk000000e7_P<43>_UNCONNECTED , +\NLW_blk00000003/blk000000e7_P<42>_UNCONNECTED , \NLW_blk00000003/blk000000e7_P<41>_UNCONNECTED , \NLW_blk00000003/blk000000e7_P<40>_UNCONNECTED , +\NLW_blk00000003/blk000000e7_P<39>_UNCONNECTED , \NLW_blk00000003/blk000000e7_P<38>_UNCONNECTED , \NLW_blk00000003/blk000000e7_P<37>_UNCONNECTED , +\NLW_blk00000003/blk000000e7_P<36>_UNCONNECTED , \NLW_blk00000003/blk000000e7_P<35>_UNCONNECTED , \NLW_blk00000003/blk000000e7_P<34>_UNCONNECTED , +\NLW_blk00000003/blk000000e7_P<33>_UNCONNECTED , \NLW_blk00000003/blk000000e7_P<32>_UNCONNECTED , \NLW_blk00000003/blk000000e7_P<31>_UNCONNECTED , +\NLW_blk00000003/blk000000e7_P<30>_UNCONNECTED , \NLW_blk00000003/blk000000e7_P<29>_UNCONNECTED , \NLW_blk00000003/blk000000e7_P<28>_UNCONNECTED , +\NLW_blk00000003/blk000000e7_P<27>_UNCONNECTED , \NLW_blk00000003/blk000000e7_P<26>_UNCONNECTED , \NLW_blk00000003/blk000000e7_P<25>_UNCONNECTED , +\NLW_blk00000003/blk000000e7_P<24>_UNCONNECTED , \NLW_blk00000003/blk000000e7_P<23>_UNCONNECTED , \NLW_blk00000003/blk000000e7_P<22>_UNCONNECTED , +\NLW_blk00000003/blk000000e7_P<21>_UNCONNECTED , \NLW_blk00000003/blk000000e7_P<20>_UNCONNECTED , \NLW_blk00000003/blk000000e7_P<19>_UNCONNECTED , +\NLW_blk00000003/blk000000e7_P<18>_UNCONNECTED , \NLW_blk00000003/blk000000e7_P<17>_UNCONNECTED , \NLW_blk00000003/blk000000e7_P<16>_UNCONNECTED , +\NLW_blk00000003/blk000000e7_P<15>_UNCONNECTED , \NLW_blk00000003/blk000000e7_P<14>_UNCONNECTED , \NLW_blk00000003/blk000000e7_P<13>_UNCONNECTED , +\NLW_blk00000003/blk000000e7_P<12>_UNCONNECTED , \NLW_blk00000003/blk000000e7_P<11>_UNCONNECTED , \NLW_blk00000003/blk000000e7_P<10>_UNCONNECTED , +\NLW_blk00000003/blk000000e7_P<9>_UNCONNECTED , \NLW_blk00000003/blk000000e7_P<8>_UNCONNECTED , \NLW_blk00000003/blk000000e7_P<7>_UNCONNECTED , +\NLW_blk00000003/blk000000e7_P<6>_UNCONNECTED , \NLW_blk00000003/blk000000e7_P<5>_UNCONNECTED , \NLW_blk00000003/blk000000e7_P<4>_UNCONNECTED , +\NLW_blk00000003/blk000000e7_P<3>_UNCONNECTED , \NLW_blk00000003/blk000000e7_P<2>_UNCONNECTED , \NLW_blk00000003/blk000000e7_P<1>_UNCONNECTED , +\NLW_blk00000003/blk000000e7_P<0>_UNCONNECTED }), + .A({\blk00000003/sig000002d1 , \blk00000003/sig000002d1 , \blk00000003/sig000002d1 , \blk00000003/sig000002d1 , \blk00000003/sig000002d1 , +\blk00000003/sig000002d1 , \blk00000003/sig000002d1 , \blk00000003/sig000002d2 , \blk00000003/sig000002d3 , \blk00000003/sig000002d4 , +\blk00000003/sig000002d5 , \blk00000003/sig000002d6 , \blk00000003/sig000002d7 , \blk00000003/sig000002d8 , \blk00000003/sig000002d9 , +\blk00000003/sig000002da , \blk00000003/sig000002db , \blk00000003/sig000002dc , \blk00000003/sig000002dd , \blk00000003/sig000002de , +\blk00000003/sig000002df , \blk00000003/sig000002e0 , \blk00000003/sig000002e1 , \blk00000003/sig000002e2 , \blk00000003/sig000002e3 , +\blk00000003/sig000002e4 , \blk00000003/sig000002e5 , \blk00000003/sig000002e6 , \blk00000003/sig000002e7 , \blk00000003/sig000002e8 }), + .PCOUT({\blk00000003/sig000002e9 , \blk00000003/sig000002ea , \blk00000003/sig000002eb , \blk00000003/sig000002ec , \blk00000003/sig000002ed , +\blk00000003/sig000002ee , \blk00000003/sig000002ef , \blk00000003/sig000002f0 , \blk00000003/sig000002f1 , \blk00000003/sig000002f2 , +\blk00000003/sig000002f3 , \blk00000003/sig000002f4 , \blk00000003/sig000002f5 , \blk00000003/sig000002f6 , \blk00000003/sig000002f7 , +\blk00000003/sig000002f8 , \blk00000003/sig000002f9 , \blk00000003/sig000002fa , \blk00000003/sig000002fb , \blk00000003/sig000002fc , +\blk00000003/sig000002fd , \blk00000003/sig000002fe , \blk00000003/sig000002ff , \blk00000003/sig00000300 , \blk00000003/sig00000301 , +\blk00000003/sig00000302 , \blk00000003/sig00000303 , \blk00000003/sig00000304 , \blk00000003/sig00000305 , \blk00000003/sig00000306 , +\blk00000003/sig00000307 , \blk00000003/sig00000308 , \blk00000003/sig00000309 , \blk00000003/sig0000030a , \blk00000003/sig0000030b , +\blk00000003/sig0000030c , \blk00000003/sig0000030d , \blk00000003/sig0000030e , \blk00000003/sig0000030f , \blk00000003/sig00000310 , +\blk00000003/sig00000311 , \blk00000003/sig00000312 , \blk00000003/sig00000313 , \blk00000003/sig00000314 , \blk00000003/sig00000315 , +\blk00000003/sig00000316 , \blk00000003/sig00000317 , \blk00000003/sig00000318 }), + .ACIN({\blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , +\blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , +\blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , +\blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , +\blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , +\blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 }), + .CARRYINSEL({\blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 }) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk000000e6 ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig000001ce ), + .R(\blk00000003/sig00000049 ), + .Q(\blk00000003/sig000002a6 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000000e5 ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig000002a4 ), + .Q(\blk00000003/sig000002a5 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000000e4 ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig000002a3 ), + .Q(\blk00000003/sig0000029f ) + ); + XORCY \blk00000003/blk000000e3 ( + .CI(\blk00000003/sig0000029f ), + .LI(\blk00000003/sig000002a1 ), + .O(\blk00000003/sig000002a2 ) + ); + MUXCY_D \blk00000003/blk000000e2 ( + .CI(\blk00000003/sig0000029f ), + .DI(\blk00000003/sig000002a0 ), + .S(\blk00000003/sig000002a1 ), + .O(\NLW_blk00000003/blk000000e2_O_UNCONNECTED ), + .LO(\NLW_blk00000003/blk000000e2_LO_UNCONNECTED ) + ); + FDE \blk00000003/blk000000e1 ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig0000029d ), + .Q(\blk00000003/sig0000029e ) + ); + XORCY \blk00000003/blk000000e0 ( + .CI(\blk00000003/sig00000299 ), + .LI(\blk00000003/sig0000029b ), + .O(\blk00000003/sig0000029c ) + ); + MUXCY_D \blk00000003/blk000000df ( + .CI(\blk00000003/sig00000299 ), + .DI(\blk00000003/sig0000029a ), + .S(\blk00000003/sig0000029b ), + .O(\NLW_blk00000003/blk000000df_O_UNCONNECTED ), + .LO(\NLW_blk00000003/blk000000df_LO_UNCONNECTED ) + ); + MUXCY \blk00000003/blk000000de ( + .CI(\blk00000003/sig00000049 ), + .DI(NlwRenamedSig_OI_rfd), + .S(\blk00000003/sig00000298 ), + .O(\blk00000003/sig00000299 ) + ); + XORCY \blk00000003/blk000000dd ( + .CI(\blk00000003/sig00000049 ), + .LI(\blk00000003/sig00000296 ), + .O(\blk00000003/sig00000297 ) + ); + MUXCY_D \blk00000003/blk000000dc ( + .CI(\blk00000003/sig00000049 ), + .DI(\blk00000003/sig00000295 ), + .S(\blk00000003/sig00000296 ), + .O(\NLW_blk00000003/blk000000dc_O_UNCONNECTED ), + .LO(\NLW_blk00000003/blk000000dc_LO_UNCONNECTED ) + ); + MUXCY_L \blk00000003/blk000000db ( + .CI(\blk00000003/sig00000049 ), + .DI(\blk00000003/sig00000294 ), + .S(\blk00000003/sig0000028e ), + .LO(\blk00000003/sig00000290 ) + ); + MUXCY_D \blk00000003/blk000000da ( + .CI(\blk00000003/sig00000290 ), + .DI(\blk00000003/sig00000293 ), + .S(\blk00000003/sig00000291 ), + .O(\NLW_blk00000003/blk000000da_O_UNCONNECTED ), + .LO(\NLW_blk00000003/blk000000da_LO_UNCONNECTED ) + ); + XORCY \blk00000003/blk000000d9 ( + .CI(\blk00000003/sig00000290 ), + .LI(\blk00000003/sig00000291 ), + .O(\blk00000003/sig00000292 ) + ); + XORCY \blk00000003/blk000000d8 ( + .CI(\blk00000003/sig00000049 ), + .LI(\blk00000003/sig0000028e ), + .O(\blk00000003/sig0000028f ) + ); + MUXCY_L \blk00000003/blk000000d7 ( + .CI(\blk00000003/sig00000287 ), + .DI(\blk00000003/sig000001e9 ), + .S(\blk00000003/sig00000288 ), + .LO(\blk00000003/sig0000028a ) + ); + MUXCY_D \blk00000003/blk000000d6 ( + .CI(\blk00000003/sig0000028a ), + .DI(\blk00000003/sig000001e8 ), + .S(\blk00000003/sig0000028b ), + .O(\NLW_blk00000003/blk000000d6_O_UNCONNECTED ), + .LO(\NLW_blk00000003/blk000000d6_LO_UNCONNECTED ) + ); + MUXCY \blk00000003/blk000000d5 ( + .CI(\blk00000003/sig00000049 ), + .DI(NlwRenamedSig_OI_rfd), + .S(\blk00000003/sig0000028d ), + .O(\blk00000003/sig00000287 ) + ); + XORCY \blk00000003/blk000000d4 ( + .CI(\blk00000003/sig0000028a ), + .LI(\blk00000003/sig0000028b ), + .O(\blk00000003/sig0000028c ) + ); + XORCY \blk00000003/blk000000d3 ( + .CI(\blk00000003/sig00000287 ), + .LI(\blk00000003/sig00000288 ), + .O(\blk00000003/sig00000289 ) + ); + FDSE #( + .INIT ( 1'b1 )) + \blk00000003/blk000000d2 ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig00000278 ), + .S(\blk00000003/sig00000049 ), + .Q(\blk00000003/sig00000221 ) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk000000d1 ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig00000277 ), + .R(\blk00000003/sig00000049 ), + .Q(\blk00000003/sig0000021e ) + ); + MUXCY_D \blk00000003/blk000000d0 ( + .CI(\blk00000003/sig0000021e ), + .DI(\blk00000003/sig00000285 ), + .S(\blk00000003/sig00000286 ), + .O(\blk00000003/sig00000282 ), + .LO(\NLW_blk00000003/blk000000d0_LO_UNCONNECTED ) + ); + MUXCY_D \blk00000003/blk000000cf ( + .CI(\blk00000003/sig00000282 ), + .DI(\blk00000003/sig00000283 ), + .S(\blk00000003/sig00000284 ), + .O(\blk00000003/sig00000280 ), + .LO(\NLW_blk00000003/blk000000cf_LO_UNCONNECTED ) + ); + MUXCY_D \blk00000003/blk000000ce ( + .CI(\blk00000003/sig00000280 ), + .DI(\blk00000003/sig00000276 ), + .S(\blk00000003/sig00000281 ), + .O(\blk00000003/sig0000027d ), + .LO(\NLW_blk00000003/blk000000ce_LO_UNCONNECTED ) + ); + MUXCY_D \blk00000003/blk000000cd ( + .CI(\blk00000003/sig0000027d ), + .DI(\blk00000003/sig0000027e ), + .S(\blk00000003/sig0000027f ), + .O(\blk00000003/sig0000027b ), + .LO(\NLW_blk00000003/blk000000cd_LO_UNCONNECTED ) + ); + MUXCY_D \blk00000003/blk000000cc ( + .CI(\blk00000003/sig0000027b ), + .DI(\blk00000003/sig00000249 ), + .S(\blk00000003/sig0000027c ), + .O(\blk00000003/sig00000279 ), + .LO(\NLW_blk00000003/blk000000cc_LO_UNCONNECTED ) + ); + MUXCY_D \blk00000003/blk000000cb ( + .CI(\blk00000003/sig00000279 ), + .DI(\blk00000003/sig0000021b ), + .S(\blk00000003/sig0000027a ), + .O(\NLW_blk00000003/blk000000cb_O_UNCONNECTED ), + .LO(\blk00000003/sig00000277 ) + ); + XORCY \blk00000003/blk000000ca ( + .CI(\blk00000003/sig00000277 ), + .LI(NlwRenamedSig_OI_rfd), + .O(\blk00000003/sig00000278 ) + ); + FDSE #( + .INIT ( 1'b1 )) + \blk00000003/blk000000c9 ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig00000266 ), + .S(\blk00000003/sig00000049 ), + .Q(\blk00000003/sig00000276 ) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk000000c8 ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig00000265 ), + .R(\blk00000003/sig00000049 ), + .Q(\blk00000003/sig000001ce ) + ); + MUXCY_D \blk00000003/blk000000c7 ( + .CI(\blk00000003/sig000001ce ), + .DI(\blk00000003/sig00000274 ), + .S(\blk00000003/sig00000275 ), + .O(\blk00000003/sig00000272 ), + .LO(\NLW_blk00000003/blk000000c7_LO_UNCONNECTED ) + ); + MUXCY_D \blk00000003/blk000000c6 ( + .CI(\blk00000003/sig00000272 ), + .DI(\blk00000003/sig000001cf ), + .S(\blk00000003/sig00000273 ), + .O(\blk00000003/sig00000270 ), + .LO(\NLW_blk00000003/blk000000c6_LO_UNCONNECTED ) + ); + MUXCY_D \blk00000003/blk000000c5 ( + .CI(\blk00000003/sig00000270 ), + .DI(\blk00000003/sig000001ce ), + .S(\blk00000003/sig00000271 ), + .O(\blk00000003/sig0000026d ), + .LO(\NLW_blk00000003/blk000000c5_LO_UNCONNECTED ) + ); + MUXCY_D \blk00000003/blk000000c4 ( + .CI(\blk00000003/sig0000026d ), + .DI(\blk00000003/sig0000026e ), + .S(\blk00000003/sig0000026f ), + .O(\blk00000003/sig0000026b ), + .LO(\NLW_blk00000003/blk000000c4_LO_UNCONNECTED ) + ); + MUXCY_D \blk00000003/blk000000c3 ( + .CI(\blk00000003/sig0000026b ), + .DI(\blk00000003/sig00000221 ), + .S(\blk00000003/sig0000026c ), + .O(\blk00000003/sig00000267 ), + .LO(\NLW_blk00000003/blk000000c3_LO_UNCONNECTED ) + ); + MUXCY_D \blk00000003/blk000000c2 ( + .CI(\blk00000003/sig00000269 ), + .DI(\blk00000003/sig00000221 ), + .S(\blk00000003/sig0000026a ), + .O(\NLW_blk00000003/blk000000c2_O_UNCONNECTED ), + .LO(\blk00000003/sig00000265 ) + ); + MUXCY_D \blk00000003/blk000000c1 ( + .CI(\blk00000003/sig00000267 ), + .DI(\blk00000003/sig0000023e ), + .S(\blk00000003/sig00000268 ), + .O(\blk00000003/sig00000269 ), + .LO(\NLW_blk00000003/blk000000c1_LO_UNCONNECTED ) + ); + XORCY \blk00000003/blk000000c0 ( + .CI(\blk00000003/sig00000265 ), + .LI(NlwRenamedSig_OI_rfd), + .O(\blk00000003/sig00000266 ) + ); + FDE \blk00000003/blk000000bf ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig00000263 ), + .Q(\blk00000003/sig00000264 ) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk000000be ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig0000021e ), + .R(\blk00000003/sig00000049 ), + .Q(\blk00000003/sig00000262 ) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk000000bd ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig0000024f ), + .R(\blk00000003/sig00000049 ), + .Q(\blk00000003/sig0000025e ) + ); + XORCY \blk00000003/blk000000bc ( + .CI(\blk00000003/sig0000025e ), + .LI(\blk00000003/sig00000260 ), + .O(\blk00000003/sig00000261 ) + ); + MUXCY_D \blk00000003/blk000000bb ( + .CI(\blk00000003/sig0000025e ), + .DI(\blk00000003/sig0000025f ), + .S(\blk00000003/sig00000260 ), + .O(\NLW_blk00000003/blk000000bb_O_UNCONNECTED ), + .LO(\NLW_blk00000003/blk000000bb_LO_UNCONNECTED ) + ); + MUXCY_L \blk00000003/blk000000ba ( + .CI(\blk00000003/sig00000251 ), + .DI(\blk00000003/sig0000025d ), + .S(\blk00000003/sig00000252 ), + .LO(\blk00000003/sig00000257 ) + ); + MUXCY_L \blk00000003/blk000000b9 ( + .CI(\blk00000003/sig00000257 ), + .DI(\blk00000003/sig0000025c ), + .S(\blk00000003/sig00000258 ), + .LO(\blk00000003/sig00000254 ) + ); + MUXCY_D \blk00000003/blk000000b8 ( + .CI(\blk00000003/sig00000254 ), + .DI(\blk00000003/sig0000025b ), + .S(\blk00000003/sig00000255 ), + .O(\NLW_blk00000003/blk000000b8_O_UNCONNECTED ), + .LO(\NLW_blk00000003/blk000000b8_LO_UNCONNECTED ) + ); + MUXCY \blk00000003/blk000000b7 ( + .CI(\blk00000003/sig00000049 ), + .DI(NlwRenamedSig_OI_rfd), + .S(\blk00000003/sig0000025a ), + .O(\blk00000003/sig00000251 ) + ); + XORCY \blk00000003/blk000000b6 ( + .CI(\blk00000003/sig00000257 ), + .LI(\blk00000003/sig00000258 ), + .O(\blk00000003/sig00000259 ) + ); + XORCY \blk00000003/blk000000b5 ( + .CI(\blk00000003/sig00000254 ), + .LI(\blk00000003/sig00000255 ), + .O(\blk00000003/sig00000256 ) + ); + XORCY \blk00000003/blk000000b4 ( + .CI(\blk00000003/sig00000251 ), + .LI(\blk00000003/sig00000252 ), + .O(\blk00000003/sig00000253 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000000b3 ( + .C(clk), + .CE(ce), + .D(coef_ld), + .Q(\blk00000003/sig00000250 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000000b2 ( + .C(clk), + .CE(ce), + .D(coef_we), + .Q(\blk00000003/sig0000024f ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000000b1 ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig000001df ), + .Q(\blk00000003/sig00000243 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000000b0 ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig0000024e ), + .Q(\blk00000003/sig00000236 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000000af ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig0000024c ), + .Q(\blk00000003/sig0000024d ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000000ae ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig0000024b ), + .Q(\blk00000003/sig00000234 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000000ad ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig0000024a ), + .Q(\blk00000003/sig00000241 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000000ac ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig00000248 ), + .Q(\blk00000003/sig00000249 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000000ab ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig00000246 ), + .Q(\blk00000003/sig00000247 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000000aa ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig00000244 ), + .Q(\blk00000003/sig00000245 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000000a9 ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig00000243 ), + .Q(\blk00000003/sig0000023f ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000000a8 ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig00000241 ), + .Q(\blk00000003/sig00000242 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000000a7 ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig0000023f ), + .Q(\blk00000003/sig00000240 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000000a6 ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig0000021d ), + .Q(\blk00000003/sig0000023e ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000000a5 ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig00000239 ), + .Q(\blk00000003/sig0000023d ) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk000000a4 ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig00000233 ), + .R(coef_ld), + .Q(\NLW_blk00000003/blk000000a4_Q_UNCONNECTED ) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk000000a3 ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig00000230 ), + .R(coef_ld), + .Q(\blk00000003/sig0000022f ) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk000000a2 ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig0000022d ), + .R(coef_ld), + .Q(\NLW_blk00000003/blk000000a2_Q_UNCONNECTED ) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk000000a1 ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig00000229 ), + .R(coef_ld), + .Q(\blk00000003/sig00000227 ) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk000000a0 ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig0000021e ), + .R(\blk00000003/sig00000049 ), + .Q(\blk00000003/sig0000023c ) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk0000009f ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig0000023a ), + .R(\blk00000003/sig00000049 ), + .Q(\blk00000003/sig0000023b ) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk0000009e ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig00000238 ), + .R(\blk00000003/sig00000049 ), + .Q(\blk00000003/sig00000239 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk0000009d ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig00000236 ), + .Q(\blk00000003/sig00000237 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk0000009c ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig00000234 ), + .Q(\blk00000003/sig00000235 ) + ); + MUXCY_D \blk00000003/blk0000009b ( + .CI(coef_we), + .DI(\blk00000003/sig00000049 ), + .S(\blk00000003/sig00000232 ), + .O(\blk00000003/sig0000022b ), + .LO(\blk00000003/sig00000233 ) + ); + MUXCY_D \blk00000003/blk0000009a ( + .CI(NlwRenamedSig_OI_rfd), + .DI(\blk00000003/sig00000049 ), + .S(\blk00000003/sig00000231 ), + .O(\blk00000003/sig0000022e ), + .LO(\NLW_blk00000003/blk0000009a_LO_UNCONNECTED ) + ); + MUXCY_D \blk00000003/blk00000099 ( + .CI(\blk00000003/sig0000022e ), + .DI(\blk00000003/sig0000022f ), + .S(coef_we), + .O(\NLW_blk00000003/blk00000099_O_UNCONNECTED ), + .LO(\blk00000003/sig00000230 ) + ); + MUXCY_D \blk00000003/blk00000098 ( + .CI(\blk00000003/sig0000022b ), + .DI(\blk00000003/sig00000049 ), + .S(\blk00000003/sig0000022c ), + .O(\NLW_blk00000003/blk00000098_O_UNCONNECTED ), + .LO(\blk00000003/sig0000022d ) + ); + MUXCY_D \blk00000003/blk00000097 ( + .CI(NlwRenamedSig_OI_rfd), + .DI(\blk00000003/sig00000049 ), + .S(\blk00000003/sig0000022a ), + .O(\blk00000003/sig00000226 ), + .LO(\NLW_blk00000003/blk00000097_LO_UNCONNECTED ) + ); + MUXCY_D \blk00000003/blk00000096 ( + .CI(\blk00000003/sig00000226 ), + .DI(\blk00000003/sig00000227 ), + .S(\blk00000003/sig00000228 ), + .O(\NLW_blk00000003/blk00000096_O_UNCONNECTED ), + .LO(\blk00000003/sig00000229 ) + ); + XORCY \blk00000003/blk00000095 ( + .CI(\blk00000003/sig00000049 ), + .LI(\blk00000003/sig00000224 ), + .O(\blk00000003/sig00000225 ) + ); + MUXCY_D \blk00000003/blk00000094 ( + .CI(\blk00000003/sig00000049 ), + .DI(\blk00000003/sig00000223 ), + .S(\blk00000003/sig00000224 ), + .O(\NLW_blk00000003/blk00000094_O_UNCONNECTED ), + .LO(\NLW_blk00000003/blk00000094_LO_UNCONNECTED ) + ); + XORCY \blk00000003/blk00000093 ( + .CI(\blk00000003/sig0000021c ), + .LI(NlwRenamedSig_OI_rfd), + .O(\blk00000003/sig0000021a ) + ); + MUXCY_D \blk00000003/blk00000092 ( + .CI(\blk00000003/sig00000220 ), + .DI(\blk00000003/sig00000221 ), + .S(\blk00000003/sig00000222 ), + .O(\NLW_blk00000003/blk00000092_O_UNCONNECTED ), + .LO(\blk00000003/sig0000021c ) + ); + MUXCY_D \blk00000003/blk00000091 ( + .CI(\blk00000003/sig0000021d ), + .DI(\blk00000003/sig0000021e ), + .S(\blk00000003/sig0000021f ), + .O(\blk00000003/sig00000220 ), + .LO(\NLW_blk00000003/blk00000091_LO_UNCONNECTED ) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000090 ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig0000021c ), + .R(\blk00000003/sig00000049 ), + .Q(\blk00000003/sig0000021d ) + ); + FDSE #( + .INIT ( 1'b1 )) + \blk00000003/blk0000008f ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig0000021a ), + .S(\blk00000003/sig00000049 ), + .Q(\blk00000003/sig0000021b ) + ); + FDR #( + .INIT ( 1'b1 )) + \blk00000003/blk0000002b ( + .C(clk), + .D(\blk00000003/sig000000be ), + .R(sclr), + .Q(\blk00000003/sig000000be ) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk0000002a ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig000001e6 ), + .R(sclr), + .Q(\blk00000003/sig000001e5 ) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000029 ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig000001e5 ), + .R(sclr), + .Q(\blk00000003/sig000001e0 ) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000028 ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig000001e4 ), + .R(\blk00000003/sig000001dd ), + .Q(data_valid) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000027 ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig000001e2 ), + .R(sclr), + .Q(\blk00000003/sig000001e3 ) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000026 ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig000001e0 ), + .R(sclr), + .Q(\blk00000003/sig000001e1 ) + ); + FDRE \blk00000003/blk00000025 ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig000001de ), + .R(sclr), + .Q(\blk00000003/sig000001df ) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000024 ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig000001dc ), + .R(\blk00000003/sig000001dd ), + .Q(rdy) + ); + FDRE \blk00000003/blk00000023 ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig000001da ), + .R(sclr), + .Q(\blk00000003/sig000001db ) + ); + FDSE \blk00000003/blk00000022 ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig000001d8 ), + .S(sclr), + .Q(\blk00000003/sig000001d9 ) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000021 ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig000001cc ), + .R(sclr), + .Q(\blk00000003/sig000001d7 ) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000020 ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig000001d6 ), + .R(sclr), + .Q(\blk00000003/sig000001ca ) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk0000001f ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig000001d4 ), + .R(sclr), + .Q(\blk00000003/sig000001d5 ) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk0000001e ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig000001d2 ), + .R(sclr), + .Q(\blk00000003/sig000001d3 ) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk0000001d ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig000001d0 ), + .R(sclr), + .Q(\NLW_blk00000003/blk0000001d_Q_UNCONNECTED ) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk0000001c ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig000001d0 ), + .R(sclr), + .Q(\blk00000003/sig000001d1 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk0000001b ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig000001ce ), + .Q(\blk00000003/sig000001cf ) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk0000001a ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig000000c8 ), + .R(sclr), + .Q(\blk00000003/sig000000c6 ) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000019 ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig000000c3 ), + .R(sclr), + .Q(\NLW_blk00000003/blk00000019_Q_UNCONNECTED ) + ); + FDSE #( + .INIT ( 1'b1 )) + \blk00000003/blk00000018 ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig000000c4 ), + .S(sclr), + .Q(\blk00000003/sig000001cd ) + ); + MUXCY_D \blk00000003/blk00000017 ( + .CI(\blk00000003/sig000001ca ), + .DI(\blk00000003/sig00000049 ), + .S(\blk00000003/sig000001cb ), + .O(\NLW_blk00000003/blk00000017_O_UNCONNECTED ), + .LO(\blk00000003/sig000001cc ) + ); + DSP48E1 #( + .ACASCREG ( 2 ), + .ADREG ( 0 ), + .ALUMODEREG ( 1 ), + .AREG ( 2 ), + .AUTORESET_PATDET ( "NO_RESET" ), + .A_INPUT ( "DIRECT" ), + .BCASCREG ( 2 ), + .BREG ( 2 ), + .B_INPUT ( "DIRECT" ), + .CARRYINREG ( 1 ), + .CARRYINSELREG ( 1 ), + .CREG ( 1 ), + .DREG ( 0 ), + .INMODEREG ( 0 ), + .MASK ( 48'hFFFFFFFFFFFE ), + .MREG ( 1 ), + .OPMODEREG ( 1 ), + .PATTERN ( 48'h000000000000 ), + .PREG ( 1 ), + .SEL_MASK ( "MASK" ), + .SEL_PATTERN ( "PATTERN" ), + .USE_DPORT ( "FALSE" ), + .USE_MULT ( "MULTIPLY" ), + .USE_PATTERN_DETECT ( "NO_PATDET" ), + .USE_SIMD ( "ONE48" )) + \blk00000003/blk00000016 ( + .PATTERNBDETECT(\NLW_blk00000003/blk00000016_PATTERNBDETECT_UNCONNECTED ), + .RSTC(\blk00000003/sig00000049 ), + .CEB1(ce), + .CEAD(\blk00000003/sig00000049 ), + .MULTSIGNOUT(\NLW_blk00000003/blk00000016_MULTSIGNOUT_UNCONNECTED ), + .CEC(ce), + .RSTM(\blk00000003/sig00000049 ), + .MULTSIGNIN(\blk00000003/sig00000049 ), + .CEB2(ce), + .RSTCTRL(\blk00000003/sig00000049 ), + .CEP(ce), + .CARRYCASCOUT(\NLW_blk00000003/blk00000016_CARRYCASCOUT_UNCONNECTED ), + .RSTA(\blk00000003/sig00000049 ), + .CECARRYIN(ce), + .UNDERFLOW(\NLW_blk00000003/blk00000016_UNDERFLOW_UNCONNECTED ), + .PATTERNDETECT(\NLW_blk00000003/blk00000016_PATTERNDETECT_UNCONNECTED ), + .RSTALUMODE(\blk00000003/sig00000049 ), + .RSTALLCARRYIN(\blk00000003/sig00000049 ), + .CED(\blk00000003/sig00000049 ), + .RSTD(\blk00000003/sig00000049 ), + .CEALUMODE(ce), + .CEA2(ce), + .CLK(clk), + .CEA1(ce), + .RSTB(\blk00000003/sig00000049 ), + .OVERFLOW(\NLW_blk00000003/blk00000016_OVERFLOW_UNCONNECTED ), + .CECTRL(ce), + .CEM(ce), + .CARRYIN(\blk00000003/sig00000049 ), + .CARRYCASCIN(\blk00000003/sig00000049 ), + .RSTINMODE(\blk00000003/sig00000049 ), + .CEINMODE(ce), + .RSTP(\blk00000003/sig00000049 ), + .ACOUT({\NLW_blk00000003/blk00000016_ACOUT<29>_UNCONNECTED , \NLW_blk00000003/blk00000016_ACOUT<28>_UNCONNECTED , +\NLW_blk00000003/blk00000016_ACOUT<27>_UNCONNECTED , \NLW_blk00000003/blk00000016_ACOUT<26>_UNCONNECTED , +\NLW_blk00000003/blk00000016_ACOUT<25>_UNCONNECTED , \NLW_blk00000003/blk00000016_ACOUT<24>_UNCONNECTED , +\NLW_blk00000003/blk00000016_ACOUT<23>_UNCONNECTED , \NLW_blk00000003/blk00000016_ACOUT<22>_UNCONNECTED , +\NLW_blk00000003/blk00000016_ACOUT<21>_UNCONNECTED , \NLW_blk00000003/blk00000016_ACOUT<20>_UNCONNECTED , +\NLW_blk00000003/blk00000016_ACOUT<19>_UNCONNECTED , \NLW_blk00000003/blk00000016_ACOUT<18>_UNCONNECTED , +\NLW_blk00000003/blk00000016_ACOUT<17>_UNCONNECTED , \NLW_blk00000003/blk00000016_ACOUT<16>_UNCONNECTED , +\NLW_blk00000003/blk00000016_ACOUT<15>_UNCONNECTED , \NLW_blk00000003/blk00000016_ACOUT<14>_UNCONNECTED , +\NLW_blk00000003/blk00000016_ACOUT<13>_UNCONNECTED , \NLW_blk00000003/blk00000016_ACOUT<12>_UNCONNECTED , +\NLW_blk00000003/blk00000016_ACOUT<11>_UNCONNECTED , \NLW_blk00000003/blk00000016_ACOUT<10>_UNCONNECTED , +\NLW_blk00000003/blk00000016_ACOUT<9>_UNCONNECTED , \NLW_blk00000003/blk00000016_ACOUT<8>_UNCONNECTED , +\NLW_blk00000003/blk00000016_ACOUT<7>_UNCONNECTED , \NLW_blk00000003/blk00000016_ACOUT<6>_UNCONNECTED , +\NLW_blk00000003/blk00000016_ACOUT<5>_UNCONNECTED , \NLW_blk00000003/blk00000016_ACOUT<4>_UNCONNECTED , +\NLW_blk00000003/blk00000016_ACOUT<3>_UNCONNECTED , \NLW_blk00000003/blk00000016_ACOUT<2>_UNCONNECTED , +\NLW_blk00000003/blk00000016_ACOUT<1>_UNCONNECTED , \NLW_blk00000003/blk00000016_ACOUT<0>_UNCONNECTED }), + .OPMODE({\blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig000000b8 , \blk00000003/sig00000049 , \blk00000003/sig000000bc , +\blk00000003/sig000000ba , \blk00000003/sig000000bc }), + .PCIN({\blk00000003/sig00000153 , \blk00000003/sig00000154 , \blk00000003/sig00000155 , \blk00000003/sig00000156 , \blk00000003/sig00000157 , +\blk00000003/sig00000158 , \blk00000003/sig00000159 , \blk00000003/sig0000015a , \blk00000003/sig0000015b , \blk00000003/sig0000015c , +\blk00000003/sig0000015d , \blk00000003/sig0000015e , \blk00000003/sig0000015f , \blk00000003/sig00000160 , \blk00000003/sig00000161 , +\blk00000003/sig00000162 , \blk00000003/sig00000163 , \blk00000003/sig00000164 , \blk00000003/sig00000165 , \blk00000003/sig00000166 , +\blk00000003/sig00000167 , \blk00000003/sig00000168 , \blk00000003/sig00000169 , \blk00000003/sig0000016a , \blk00000003/sig0000016b , +\blk00000003/sig0000016c , \blk00000003/sig0000016d , \blk00000003/sig0000016e , \blk00000003/sig0000016f , \blk00000003/sig00000170 , +\blk00000003/sig00000171 , \blk00000003/sig00000172 , \blk00000003/sig00000173 , \blk00000003/sig00000174 , \blk00000003/sig00000175 , +\blk00000003/sig00000176 , \blk00000003/sig00000177 , \blk00000003/sig00000178 , \blk00000003/sig00000179 , \blk00000003/sig0000017a , +\blk00000003/sig0000017b , \blk00000003/sig0000017c , \blk00000003/sig0000017d , \blk00000003/sig0000017e , \blk00000003/sig0000017f , +\blk00000003/sig00000180 , \blk00000003/sig00000181 , \blk00000003/sig00000182 }), + .ALUMODE({\blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 }), + .C({\blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , +\blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , +\blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , +\blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , +\blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , +\blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , +\blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , +\blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , +\blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , +\blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 }), + .CARRYOUT({\NLW_blk00000003/blk00000016_CARRYOUT<3>_UNCONNECTED , \NLW_blk00000003/blk00000016_CARRYOUT<2>_UNCONNECTED , +\NLW_blk00000003/blk00000016_CARRYOUT<1>_UNCONNECTED , \NLW_blk00000003/blk00000016_CARRYOUT<0>_UNCONNECTED }), + .INMODE({\blk00000003/sig00000049 , \blk00000003/sig00000049 , NlwRenamedSig_OI_rfd, \blk00000003/sig00000049 , \blk00000003/sig00000049 }), + .BCIN({\blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , +\blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , +\blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , +\blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 }), + .B({\blk00000003/sig000000fa , \blk00000003/sig000000fb , \blk00000003/sig000000fc , \blk00000003/sig000000fd , \blk00000003/sig000000fe , +\blk00000003/sig000000ff , \blk00000003/sig00000100 , \blk00000003/sig00000101 , \blk00000003/sig00000102 , \blk00000003/sig00000103 , +\blk00000003/sig00000104 , \blk00000003/sig00000105 , \blk00000003/sig00000106 , \blk00000003/sig00000107 , \blk00000003/sig00000108 , +\blk00000003/sig00000109 , \blk00000003/sig0000010a , \blk00000003/sig0000010b }), + .BCOUT({\NLW_blk00000003/blk00000016_BCOUT<17>_UNCONNECTED , \NLW_blk00000003/blk00000016_BCOUT<16>_UNCONNECTED , +\NLW_blk00000003/blk00000016_BCOUT<15>_UNCONNECTED , \NLW_blk00000003/blk00000016_BCOUT<14>_UNCONNECTED , +\NLW_blk00000003/blk00000016_BCOUT<13>_UNCONNECTED , \NLW_blk00000003/blk00000016_BCOUT<12>_UNCONNECTED , +\NLW_blk00000003/blk00000016_BCOUT<11>_UNCONNECTED , \NLW_blk00000003/blk00000016_BCOUT<10>_UNCONNECTED , +\NLW_blk00000003/blk00000016_BCOUT<9>_UNCONNECTED , \NLW_blk00000003/blk00000016_BCOUT<8>_UNCONNECTED , +\NLW_blk00000003/blk00000016_BCOUT<7>_UNCONNECTED , \NLW_blk00000003/blk00000016_BCOUT<6>_UNCONNECTED , +\NLW_blk00000003/blk00000016_BCOUT<5>_UNCONNECTED , \NLW_blk00000003/blk00000016_BCOUT<4>_UNCONNECTED , +\NLW_blk00000003/blk00000016_BCOUT<3>_UNCONNECTED , \NLW_blk00000003/blk00000016_BCOUT<2>_UNCONNECTED , +\NLW_blk00000003/blk00000016_BCOUT<1>_UNCONNECTED , \NLW_blk00000003/blk00000016_BCOUT<0>_UNCONNECTED }), + .D({\blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , +\blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , +\blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , +\blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , +\blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 }), + .P({\NLW_blk00000003/blk00000016_P<47>_UNCONNECTED , \blk00000003/sig00000183 , \blk00000003/sig00000184 , \blk00000003/sig00000185 , +\blk00000003/sig00000186 , \blk00000003/sig00000187 , \blk00000003/sig00000188 , \blk00000003/sig00000189 , \blk00000003/sig0000018a , +\blk00000003/sig0000018b , \blk00000003/sig0000018c , \blk00000003/sig0000018d , \blk00000003/sig0000018e , \blk00000003/sig0000018f , +\blk00000003/sig00000190 , \blk00000003/sig00000191 , \blk00000003/sig00000192 , \blk00000003/sig00000193 , \blk00000003/sig00000194 , +\blk00000003/sig00000195 , \blk00000003/sig00000196 , \blk00000003/sig00000197 , \blk00000003/sig00000198 , \blk00000003/sig00000199 , +\blk00000003/sig0000019a , \blk00000003/sig0000019b , \blk00000003/sig0000019c , \blk00000003/sig0000019d , \blk00000003/sig0000019e , +\blk00000003/sig0000019f , \blk00000003/sig000001a0 , \blk00000003/sig000001a1 , \blk00000003/sig000001a2 , \blk00000003/sig000001a3 , +\blk00000003/sig000001a4 , \blk00000003/sig000001a5 , \blk00000003/sig000001a6 , \blk00000003/sig000001a7 , \blk00000003/sig000001a8 , +\blk00000003/sig000001a9 , \blk00000003/sig000001aa , \blk00000003/sig000001ab , \blk00000003/sig000001ac , \blk00000003/sig000001ad , +\blk00000003/sig000001ae , \blk00000003/sig000001af , \blk00000003/sig000001b0 , \blk00000003/sig000001b1 }), + .A({\blk00000003/sig000001b2 , \blk00000003/sig000001b2 , \blk00000003/sig000001b2 , \blk00000003/sig000001b2 , \blk00000003/sig000001b2 , +\blk00000003/sig000001b2 , \blk00000003/sig000001b2 , \blk00000003/sig000001b3 , \blk00000003/sig000001b4 , \blk00000003/sig000001b5 , +\blk00000003/sig000001b6 , \blk00000003/sig000001b7 , \blk00000003/sig000001b8 , \blk00000003/sig000001b9 , \blk00000003/sig000001ba , +\blk00000003/sig000001bb , \blk00000003/sig000001bc , \blk00000003/sig000001bd , \blk00000003/sig000001be , \blk00000003/sig000001bf , +\blk00000003/sig000001c0 , \blk00000003/sig000001c1 , \blk00000003/sig000001c2 , \blk00000003/sig000001c3 , \blk00000003/sig000001c4 , +\blk00000003/sig000001c5 , \blk00000003/sig000001c6 , \blk00000003/sig000001c7 , \blk00000003/sig000001c8 , \blk00000003/sig000001c9 }), + .PCOUT({\NLW_blk00000003/blk00000016_PCOUT<47>_UNCONNECTED , \NLW_blk00000003/blk00000016_PCOUT<46>_UNCONNECTED , +\NLW_blk00000003/blk00000016_PCOUT<45>_UNCONNECTED , \NLW_blk00000003/blk00000016_PCOUT<44>_UNCONNECTED , +\NLW_blk00000003/blk00000016_PCOUT<43>_UNCONNECTED , \NLW_blk00000003/blk00000016_PCOUT<42>_UNCONNECTED , +\NLW_blk00000003/blk00000016_PCOUT<41>_UNCONNECTED , \NLW_blk00000003/blk00000016_PCOUT<40>_UNCONNECTED , +\NLW_blk00000003/blk00000016_PCOUT<39>_UNCONNECTED , \NLW_blk00000003/blk00000016_PCOUT<38>_UNCONNECTED , +\NLW_blk00000003/blk00000016_PCOUT<37>_UNCONNECTED , \NLW_blk00000003/blk00000016_PCOUT<36>_UNCONNECTED , +\NLW_blk00000003/blk00000016_PCOUT<35>_UNCONNECTED , \NLW_blk00000003/blk00000016_PCOUT<34>_UNCONNECTED , +\NLW_blk00000003/blk00000016_PCOUT<33>_UNCONNECTED , \NLW_blk00000003/blk00000016_PCOUT<32>_UNCONNECTED , +\NLW_blk00000003/blk00000016_PCOUT<31>_UNCONNECTED , \NLW_blk00000003/blk00000016_PCOUT<30>_UNCONNECTED , +\NLW_blk00000003/blk00000016_PCOUT<29>_UNCONNECTED , \NLW_blk00000003/blk00000016_PCOUT<28>_UNCONNECTED , +\NLW_blk00000003/blk00000016_PCOUT<27>_UNCONNECTED , \NLW_blk00000003/blk00000016_PCOUT<26>_UNCONNECTED , +\NLW_blk00000003/blk00000016_PCOUT<25>_UNCONNECTED , \NLW_blk00000003/blk00000016_PCOUT<24>_UNCONNECTED , +\NLW_blk00000003/blk00000016_PCOUT<23>_UNCONNECTED , \NLW_blk00000003/blk00000016_PCOUT<22>_UNCONNECTED , +\NLW_blk00000003/blk00000016_PCOUT<21>_UNCONNECTED , \NLW_blk00000003/blk00000016_PCOUT<20>_UNCONNECTED , +\NLW_blk00000003/blk00000016_PCOUT<19>_UNCONNECTED , \NLW_blk00000003/blk00000016_PCOUT<18>_UNCONNECTED , +\NLW_blk00000003/blk00000016_PCOUT<17>_UNCONNECTED , \NLW_blk00000003/blk00000016_PCOUT<16>_UNCONNECTED , +\NLW_blk00000003/blk00000016_PCOUT<15>_UNCONNECTED , \NLW_blk00000003/blk00000016_PCOUT<14>_UNCONNECTED , +\NLW_blk00000003/blk00000016_PCOUT<13>_UNCONNECTED , \NLW_blk00000003/blk00000016_PCOUT<12>_UNCONNECTED , +\NLW_blk00000003/blk00000016_PCOUT<11>_UNCONNECTED , \NLW_blk00000003/blk00000016_PCOUT<10>_UNCONNECTED , +\NLW_blk00000003/blk00000016_PCOUT<9>_UNCONNECTED , \NLW_blk00000003/blk00000016_PCOUT<8>_UNCONNECTED , +\NLW_blk00000003/blk00000016_PCOUT<7>_UNCONNECTED , \NLW_blk00000003/blk00000016_PCOUT<6>_UNCONNECTED , +\NLW_blk00000003/blk00000016_PCOUT<5>_UNCONNECTED , \NLW_blk00000003/blk00000016_PCOUT<4>_UNCONNECTED , +\NLW_blk00000003/blk00000016_PCOUT<3>_UNCONNECTED , \NLW_blk00000003/blk00000016_PCOUT<2>_UNCONNECTED , +\NLW_blk00000003/blk00000016_PCOUT<1>_UNCONNECTED , \NLW_blk00000003/blk00000016_PCOUT<0>_UNCONNECTED }), + .ACIN({\blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , +\blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , +\blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , +\blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , +\blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , +\blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 }), + .CARRYINSEL({\blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 }) + ); + DSP48E1 #( + .ACASCREG ( 2 ), + .ADREG ( 0 ), + .ALUMODEREG ( 1 ), + .AREG ( 2 ), + .AUTORESET_PATDET ( "NO_RESET" ), + .A_INPUT ( "DIRECT" ), + .BCASCREG ( 2 ), + .BREG ( 2 ), + .B_INPUT ( "DIRECT" ), + .CARRYINREG ( 1 ), + .CARRYINSELREG ( 1 ), + .CREG ( 1 ), + .DREG ( 0 ), + .INMODEREG ( 0 ), + .MASK ( 48'hFFFFFFFFFFFE ), + .MREG ( 1 ), + .OPMODEREG ( 1 ), + .PATTERN ( 48'h000000000000 ), + .PREG ( 1 ), + .SEL_MASK ( "MASK" ), + .SEL_PATTERN ( "PATTERN" ), + .USE_DPORT ( "FALSE" ), + .USE_MULT ( "MULTIPLY" ), + .USE_PATTERN_DETECT ( "NO_PATDET" ), + .USE_SIMD ( "ONE48" )) + \blk00000003/blk00000015 ( + .PATTERNBDETECT(\NLW_blk00000003/blk00000015_PATTERNBDETECT_UNCONNECTED ), + .RSTC(\blk00000003/sig00000049 ), + .CEB1(ce), + .CEAD(\blk00000003/sig00000049 ), + .MULTSIGNOUT(\NLW_blk00000003/blk00000015_MULTSIGNOUT_UNCONNECTED ), + .CEC(ce), + .RSTM(\blk00000003/sig00000049 ), + .MULTSIGNIN(\blk00000003/sig00000049 ), + .CEB2(ce), + .RSTCTRL(\blk00000003/sig00000049 ), + .CEP(ce), + .CARRYCASCOUT(\NLW_blk00000003/blk00000015_CARRYCASCOUT_UNCONNECTED ), + .RSTA(\blk00000003/sig00000049 ), + .CECARRYIN(ce), + .UNDERFLOW(\NLW_blk00000003/blk00000015_UNDERFLOW_UNCONNECTED ), + .PATTERNDETECT(\NLW_blk00000003/blk00000015_PATTERNDETECT_UNCONNECTED ), + .RSTALUMODE(\blk00000003/sig00000049 ), + .RSTALLCARRYIN(\blk00000003/sig00000049 ), + .CED(\blk00000003/sig00000049 ), + .RSTD(\blk00000003/sig00000049 ), + .CEALUMODE(ce), + .CEA2(ce), + .CLK(clk), + .CEA1(ce), + .RSTB(\blk00000003/sig00000049 ), + .OVERFLOW(\NLW_blk00000003/blk00000015_OVERFLOW_UNCONNECTED ), + .CECTRL(ce), + .CEM(ce), + .CARRYIN(\blk00000003/sig00000049 ), + .CARRYCASCIN(\blk00000003/sig00000049 ), + .RSTINMODE(\blk00000003/sig00000049 ), + .CEINMODE(ce), + .RSTP(\blk00000003/sig00000049 ), + .ACOUT({\NLW_blk00000003/blk00000015_ACOUT<29>_UNCONNECTED , \NLW_blk00000003/blk00000015_ACOUT<28>_UNCONNECTED , +\NLW_blk00000003/blk00000015_ACOUT<27>_UNCONNECTED , \NLW_blk00000003/blk00000015_ACOUT<26>_UNCONNECTED , +\NLW_blk00000003/blk00000015_ACOUT<25>_UNCONNECTED , \NLW_blk00000003/blk00000015_ACOUT<24>_UNCONNECTED , +\NLW_blk00000003/blk00000015_ACOUT<23>_UNCONNECTED , \NLW_blk00000003/blk00000015_ACOUT<22>_UNCONNECTED , +\NLW_blk00000003/blk00000015_ACOUT<21>_UNCONNECTED , \NLW_blk00000003/blk00000015_ACOUT<20>_UNCONNECTED , +\NLW_blk00000003/blk00000015_ACOUT<19>_UNCONNECTED , \NLW_blk00000003/blk00000015_ACOUT<18>_UNCONNECTED , +\NLW_blk00000003/blk00000015_ACOUT<17>_UNCONNECTED , \NLW_blk00000003/blk00000015_ACOUT<16>_UNCONNECTED , +\NLW_blk00000003/blk00000015_ACOUT<15>_UNCONNECTED , \NLW_blk00000003/blk00000015_ACOUT<14>_UNCONNECTED , +\NLW_blk00000003/blk00000015_ACOUT<13>_UNCONNECTED , \NLW_blk00000003/blk00000015_ACOUT<12>_UNCONNECTED , +\NLW_blk00000003/blk00000015_ACOUT<11>_UNCONNECTED , \NLW_blk00000003/blk00000015_ACOUT<10>_UNCONNECTED , +\NLW_blk00000003/blk00000015_ACOUT<9>_UNCONNECTED , \NLW_blk00000003/blk00000015_ACOUT<8>_UNCONNECTED , +\NLW_blk00000003/blk00000015_ACOUT<7>_UNCONNECTED , \NLW_blk00000003/blk00000015_ACOUT<6>_UNCONNECTED , +\NLW_blk00000003/blk00000015_ACOUT<5>_UNCONNECTED , \NLW_blk00000003/blk00000015_ACOUT<4>_UNCONNECTED , +\NLW_blk00000003/blk00000015_ACOUT<3>_UNCONNECTED , \NLW_blk00000003/blk00000015_ACOUT<2>_UNCONNECTED , +\NLW_blk00000003/blk00000015_ACOUT<1>_UNCONNECTED , \NLW_blk00000003/blk00000015_ACOUT<0>_UNCONNECTED }), + .OPMODE({\blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig000000b8 , \blk00000003/sig00000049 , \blk00000003/sig000000bc , +\blk00000003/sig000000ba , \blk00000003/sig000000bc }), + .PCIN({\blk00000003/sig000000ca , \blk00000003/sig000000cb , \blk00000003/sig000000cc , \blk00000003/sig000000cd , \blk00000003/sig000000ce , +\blk00000003/sig000000cf , \blk00000003/sig000000d0 , \blk00000003/sig000000d1 , \blk00000003/sig000000d2 , \blk00000003/sig000000d3 , +\blk00000003/sig000000d4 , \blk00000003/sig000000d5 , \blk00000003/sig000000d6 , \blk00000003/sig000000d7 , \blk00000003/sig000000d8 , +\blk00000003/sig000000d9 , \blk00000003/sig000000da , \blk00000003/sig000000db , \blk00000003/sig000000dc , \blk00000003/sig000000dd , +\blk00000003/sig000000de , \blk00000003/sig000000df , \blk00000003/sig000000e0 , \blk00000003/sig000000e1 , \blk00000003/sig000000e2 , +\blk00000003/sig000000e3 , \blk00000003/sig000000e4 , \blk00000003/sig000000e5 , \blk00000003/sig000000e6 , \blk00000003/sig000000e7 , +\blk00000003/sig000000e8 , \blk00000003/sig000000e9 , \blk00000003/sig000000ea , \blk00000003/sig000000eb , \blk00000003/sig000000ec , +\blk00000003/sig000000ed , \blk00000003/sig000000ee , \blk00000003/sig000000ef , \blk00000003/sig000000f0 , \blk00000003/sig000000f1 , +\blk00000003/sig000000f2 , \blk00000003/sig000000f3 , \blk00000003/sig000000f4 , \blk00000003/sig000000f5 , \blk00000003/sig000000f6 , +\blk00000003/sig000000f7 , \blk00000003/sig000000f8 , \blk00000003/sig000000f9 }), + .ALUMODE({\blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 }), + .C({\blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , +\blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , +\blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , +\blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , +\blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , +\blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , +\blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , +\blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , +\blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , +\blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 }), + .CARRYOUT({\NLW_blk00000003/blk00000015_CARRYOUT<3>_UNCONNECTED , \NLW_blk00000003/blk00000015_CARRYOUT<2>_UNCONNECTED , +\NLW_blk00000003/blk00000015_CARRYOUT<1>_UNCONNECTED , \NLW_blk00000003/blk00000015_CARRYOUT<0>_UNCONNECTED }), + .INMODE({\blk00000003/sig00000049 , \blk00000003/sig00000049 , NlwRenamedSig_OI_rfd, \blk00000003/sig00000049 , \blk00000003/sig00000049 }), + .BCIN({\blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , +\blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , +\blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , +\blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 }), + .B({\blk00000003/sig000000fa , \blk00000003/sig000000fb , \blk00000003/sig000000fc , \blk00000003/sig000000fd , \blk00000003/sig000000fe , +\blk00000003/sig000000ff , \blk00000003/sig00000100 , \blk00000003/sig00000101 , \blk00000003/sig00000102 , \blk00000003/sig00000103 , +\blk00000003/sig00000104 , \blk00000003/sig00000105 , \blk00000003/sig00000106 , \blk00000003/sig00000107 , \blk00000003/sig00000108 , +\blk00000003/sig00000109 , \blk00000003/sig0000010a , \blk00000003/sig0000010b }), + .BCOUT({\NLW_blk00000003/blk00000015_BCOUT<17>_UNCONNECTED , \NLW_blk00000003/blk00000015_BCOUT<16>_UNCONNECTED , +\NLW_blk00000003/blk00000015_BCOUT<15>_UNCONNECTED , \NLW_blk00000003/blk00000015_BCOUT<14>_UNCONNECTED , +\NLW_blk00000003/blk00000015_BCOUT<13>_UNCONNECTED , \NLW_blk00000003/blk00000015_BCOUT<12>_UNCONNECTED , +\NLW_blk00000003/blk00000015_BCOUT<11>_UNCONNECTED , \NLW_blk00000003/blk00000015_BCOUT<10>_UNCONNECTED , +\NLW_blk00000003/blk00000015_BCOUT<9>_UNCONNECTED , \NLW_blk00000003/blk00000015_BCOUT<8>_UNCONNECTED , +\NLW_blk00000003/blk00000015_BCOUT<7>_UNCONNECTED , \NLW_blk00000003/blk00000015_BCOUT<6>_UNCONNECTED , +\NLW_blk00000003/blk00000015_BCOUT<5>_UNCONNECTED , \NLW_blk00000003/blk00000015_BCOUT<4>_UNCONNECTED , +\NLW_blk00000003/blk00000015_BCOUT<3>_UNCONNECTED , \NLW_blk00000003/blk00000015_BCOUT<2>_UNCONNECTED , +\NLW_blk00000003/blk00000015_BCOUT<1>_UNCONNECTED , \NLW_blk00000003/blk00000015_BCOUT<0>_UNCONNECTED }), + .D({\blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , +\blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , +\blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , +\blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , +\blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 }), + .P({\NLW_blk00000003/blk00000015_P<47>_UNCONNECTED , \blk00000003/sig0000010c , \blk00000003/sig0000010d , \blk00000003/sig0000010e , +\blk00000003/sig0000010f , \blk00000003/sig00000110 , \blk00000003/sig00000111 , \blk00000003/sig00000112 , \blk00000003/sig00000113 , +\blk00000003/sig00000114 , \blk00000003/sig00000115 , \blk00000003/sig00000116 , \blk00000003/sig00000117 , \blk00000003/sig00000118 , +\blk00000003/sig00000119 , \blk00000003/sig0000011a , \blk00000003/sig0000011b , \blk00000003/sig0000011c , \blk00000003/sig0000011d , +\blk00000003/sig0000011e , \blk00000003/sig0000011f , \blk00000003/sig00000120 , \blk00000003/sig00000121 , \blk00000003/sig00000122 , +\blk00000003/sig00000123 , \blk00000003/sig00000124 , \blk00000003/sig00000125 , \blk00000003/sig00000126 , \blk00000003/sig00000127 , +\blk00000003/sig00000128 , \blk00000003/sig00000129 , \blk00000003/sig0000012a , \blk00000003/sig0000012b , \blk00000003/sig0000012c , +\blk00000003/sig0000012d , \blk00000003/sig0000012e , \blk00000003/sig0000012f , \blk00000003/sig00000130 , \blk00000003/sig00000131 , +\blk00000003/sig00000132 , \blk00000003/sig00000133 , \blk00000003/sig00000134 , \blk00000003/sig00000135 , \blk00000003/sig00000136 , +\blk00000003/sig00000137 , \blk00000003/sig00000138 , \blk00000003/sig00000139 , \blk00000003/sig0000013a }), + .A({\blk00000003/sig0000013b , \blk00000003/sig0000013b , \blk00000003/sig0000013b , \blk00000003/sig0000013b , \blk00000003/sig0000013b , +\blk00000003/sig0000013b , \blk00000003/sig0000013b , \blk00000003/sig0000013c , \blk00000003/sig0000013d , \blk00000003/sig0000013e , +\blk00000003/sig0000013f , \blk00000003/sig00000140 , \blk00000003/sig00000141 , \blk00000003/sig00000142 , \blk00000003/sig00000143 , +\blk00000003/sig00000144 , \blk00000003/sig00000145 , \blk00000003/sig00000146 , \blk00000003/sig00000147 , \blk00000003/sig00000148 , +\blk00000003/sig00000149 , \blk00000003/sig0000014a , \blk00000003/sig0000014b , \blk00000003/sig0000014c , \blk00000003/sig0000014d , +\blk00000003/sig0000014e , \blk00000003/sig0000014f , \blk00000003/sig00000150 , \blk00000003/sig00000151 , \blk00000003/sig00000152 }), + .PCOUT({\NLW_blk00000003/blk00000015_PCOUT<47>_UNCONNECTED , \NLW_blk00000003/blk00000015_PCOUT<46>_UNCONNECTED , +\NLW_blk00000003/blk00000015_PCOUT<45>_UNCONNECTED , \NLW_blk00000003/blk00000015_PCOUT<44>_UNCONNECTED , +\NLW_blk00000003/blk00000015_PCOUT<43>_UNCONNECTED , \NLW_blk00000003/blk00000015_PCOUT<42>_UNCONNECTED , +\NLW_blk00000003/blk00000015_PCOUT<41>_UNCONNECTED , \NLW_blk00000003/blk00000015_PCOUT<40>_UNCONNECTED , +\NLW_blk00000003/blk00000015_PCOUT<39>_UNCONNECTED , \NLW_blk00000003/blk00000015_PCOUT<38>_UNCONNECTED , +\NLW_blk00000003/blk00000015_PCOUT<37>_UNCONNECTED , \NLW_blk00000003/blk00000015_PCOUT<36>_UNCONNECTED , +\NLW_blk00000003/blk00000015_PCOUT<35>_UNCONNECTED , \NLW_blk00000003/blk00000015_PCOUT<34>_UNCONNECTED , +\NLW_blk00000003/blk00000015_PCOUT<33>_UNCONNECTED , \NLW_blk00000003/blk00000015_PCOUT<32>_UNCONNECTED , +\NLW_blk00000003/blk00000015_PCOUT<31>_UNCONNECTED , \NLW_blk00000003/blk00000015_PCOUT<30>_UNCONNECTED , +\NLW_blk00000003/blk00000015_PCOUT<29>_UNCONNECTED , \NLW_blk00000003/blk00000015_PCOUT<28>_UNCONNECTED , +\NLW_blk00000003/blk00000015_PCOUT<27>_UNCONNECTED , \NLW_blk00000003/blk00000015_PCOUT<26>_UNCONNECTED , +\NLW_blk00000003/blk00000015_PCOUT<25>_UNCONNECTED , \NLW_blk00000003/blk00000015_PCOUT<24>_UNCONNECTED , +\NLW_blk00000003/blk00000015_PCOUT<23>_UNCONNECTED , \NLW_blk00000003/blk00000015_PCOUT<22>_UNCONNECTED , +\NLW_blk00000003/blk00000015_PCOUT<21>_UNCONNECTED , \NLW_blk00000003/blk00000015_PCOUT<20>_UNCONNECTED , +\NLW_blk00000003/blk00000015_PCOUT<19>_UNCONNECTED , \NLW_blk00000003/blk00000015_PCOUT<18>_UNCONNECTED , +\NLW_blk00000003/blk00000015_PCOUT<17>_UNCONNECTED , \NLW_blk00000003/blk00000015_PCOUT<16>_UNCONNECTED , +\NLW_blk00000003/blk00000015_PCOUT<15>_UNCONNECTED , \NLW_blk00000003/blk00000015_PCOUT<14>_UNCONNECTED , +\NLW_blk00000003/blk00000015_PCOUT<13>_UNCONNECTED , \NLW_blk00000003/blk00000015_PCOUT<12>_UNCONNECTED , +\NLW_blk00000003/blk00000015_PCOUT<11>_UNCONNECTED , \NLW_blk00000003/blk00000015_PCOUT<10>_UNCONNECTED , +\NLW_blk00000003/blk00000015_PCOUT<9>_UNCONNECTED , \NLW_blk00000003/blk00000015_PCOUT<8>_UNCONNECTED , +\NLW_blk00000003/blk00000015_PCOUT<7>_UNCONNECTED , \NLW_blk00000003/blk00000015_PCOUT<6>_UNCONNECTED , +\NLW_blk00000003/blk00000015_PCOUT<5>_UNCONNECTED , \NLW_blk00000003/blk00000015_PCOUT<4>_UNCONNECTED , +\NLW_blk00000003/blk00000015_PCOUT<3>_UNCONNECTED , \NLW_blk00000003/blk00000015_PCOUT<2>_UNCONNECTED , +\NLW_blk00000003/blk00000015_PCOUT<1>_UNCONNECTED , \NLW_blk00000003/blk00000015_PCOUT<0>_UNCONNECTED }), + .ACIN({\blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , +\blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , +\blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , +\blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , +\blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , +\blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 }), + .CARRYINSEL({\blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 }) + ); + MUXCY_D \blk00000003/blk00000014 ( + .CI(NlwRenamedSig_OI_rfd), + .DI(\blk00000003/sig00000049 ), + .S(\blk00000003/sig000000c9 ), + .O(\blk00000003/sig000000c5 ), + .LO(\NLW_blk00000003/blk00000014_LO_UNCONNECTED ) + ); + MUXCY_D \blk00000003/blk00000013 ( + .CI(\blk00000003/sig000000c5 ), + .DI(\blk00000003/sig000000c6 ), + .S(\blk00000003/sig000000c7 ), + .O(\blk00000003/sig000000bd ), + .LO(\blk00000003/sig000000c8 ) + ); + XORCY \blk00000003/blk00000012 ( + .CI(\blk00000003/sig000000c3 ), + .LI(NlwRenamedSig_OI_rfd), + .O(\blk00000003/sig000000c4 ) + ); + MUXCY_D \blk00000003/blk00000011 ( + .CI(\blk00000003/sig000000c0 ), + .DI(\blk00000003/sig000000c1 ), + .S(\blk00000003/sig000000c2 ), + .O(\NLW_blk00000003/blk00000011_O_UNCONNECTED ), + .LO(\blk00000003/sig000000c3 ) + ); + MUXCY_D \blk00000003/blk00000010 ( + .CI(\blk00000003/sig000000bd ), + .DI(\blk00000003/sig000000be ), + .S(\blk00000003/sig000000bf ), + .O(\blk00000003/sig000000c0 ), + .LO(\NLW_blk00000003/blk00000010_LO_UNCONNECTED ) + ); + FD #( + .INIT ( 1'b0 )) + \blk00000003/blk0000000f ( + .C(clk), + .D(\blk00000003/sig000000bb ), + .Q(\blk00000003/sig000000bc ) + ); + FD #( + .INIT ( 1'b0 )) + \blk00000003/blk0000000e ( + .C(clk), + .D(\blk00000003/sig000000b9 ), + .Q(\blk00000003/sig000000ba ) + ); + FD #( + .INIT ( 1'b0 )) + \blk00000003/blk0000000d ( + .C(clk), + .D(\blk00000003/sig000000b7 ), + .Q(\blk00000003/sig000000b8 ) + ); + XORCY \blk00000003/blk0000000c ( + .CI(\blk00000003/sig00000049 ), + .LI(\blk00000003/sig000000b5 ), + .O(\blk00000003/sig000000b6 ) + ); + MUXCY_D \blk00000003/blk0000000b ( + .CI(\blk00000003/sig00000049 ), + .DI(\blk00000003/sig000000b4 ), + .S(\blk00000003/sig000000b5 ), + .O(\NLW_blk00000003/blk0000000b_O_UNCONNECTED ), + .LO(\NLW_blk00000003/blk0000000b_LO_UNCONNECTED ) + ); + MUXCY_D \blk00000003/blk0000000a ( + .CI(\blk00000003/sig000000af ), + .DI(\blk00000003/sig00000049 ), + .S(\blk00000003/sig000000b3 ), + .O(\NLW_blk00000003/blk0000000a_O_UNCONNECTED ), + .LO(\blk00000003/sig000000b1 ) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000009 ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig000000b1 ), + .R(sclr), + .Q(\blk00000003/sig000000b2 ) + ); + MUXCY_D \blk00000003/blk00000008 ( + .CI(NlwRenamedSig_OI_rfd), + .DI(\blk00000003/sig00000049 ), + .S(\blk00000003/sig000000b0 ), + .O(\blk00000003/sig000000ae ), + .LO(\NLW_blk00000003/blk00000008_LO_UNCONNECTED ) + ); + MUXCY_D \blk00000003/blk00000007 ( + .CI(\blk00000003/sig000000ae ), + .DI(\blk00000003/sig000000ad ), + .S(nd), + .O(\blk00000003/sig000000af ), + .LO(\blk00000003/sig000000ac ) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000006 ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig000000ac ), + .R(sclr), + .Q(\blk00000003/sig000000ad ) + ); + VCC \blk00000003/blk00000005 ( + .P(NlwRenamedSig_OI_rfd) + ); + GND \blk00000003/blk00000004 ( + .G(\blk00000003/sig00000049 ) + ); + LUT2 #( + .INIT ( 4'h8 )) + \blk00000003/blk0000002c/blk0000008e ( + .I0(nd), + .I1(ce), + .O(\blk00000003/blk0000002c/sig00000c29 ) + ); + RAM32X1D #( + .INIT ( 32'h00000000 )) + \blk00000003/blk0000002c/blk0000008d ( + .A0(\blk00000003/sig000001e9 ), + .A1(\blk00000003/sig000001e8 ), + .A2(\blk00000003/sig000001e7 ), + .A3(\blk00000003/blk0000002c/sig00000bf8 ), + .A4(\blk00000003/blk0000002c/sig00000bf8 ), + .D(din_2_2[22]), + .DPRA0(\blk00000003/sig000001d9 ), + .DPRA1(\blk00000003/sig000001db ), + .DPRA2(\blk00000003/sig000001e3 ), + .DPRA3(\blk00000003/blk0000002c/sig00000bf8 ), + .DPRA4(\blk00000003/blk0000002c/sig00000bf8 ), + .WCLK(clk), + .WE(\blk00000003/blk0000002c/sig00000c29 ), + .SPO(\NLW_blk00000003/blk0000002c/blk0000008d_SPO_UNCONNECTED ), + .DPO(\blk00000003/blk0000002c/sig00000c27 ) + ); + RAM32X1D #( + .INIT ( 32'h00000000 )) + \blk00000003/blk0000002c/blk0000008c ( + .A0(\blk00000003/sig000001e9 ), + .A1(\blk00000003/sig000001e8 ), + .A2(\blk00000003/sig000001e7 ), + .A3(\blk00000003/blk0000002c/sig00000bf8 ), + .A4(\blk00000003/blk0000002c/sig00000bf8 ), + .D(din_2_2[21]), + .DPRA0(\blk00000003/sig000001d9 ), + .DPRA1(\blk00000003/sig000001db ), + .DPRA2(\blk00000003/sig000001e3 ), + .DPRA3(\blk00000003/blk0000002c/sig00000bf8 ), + .DPRA4(\blk00000003/blk0000002c/sig00000bf8 ), + .WCLK(clk), + .WE(\blk00000003/blk0000002c/sig00000c29 ), + .SPO(\NLW_blk00000003/blk0000002c/blk0000008c_SPO_UNCONNECTED ), + .DPO(\blk00000003/blk0000002c/sig00000c26 ) + ); + RAM32X1D #( + .INIT ( 32'h00000000 )) + \blk00000003/blk0000002c/blk0000008b ( + .A0(\blk00000003/sig000001e9 ), + .A1(\blk00000003/sig000001e8 ), + .A2(\blk00000003/sig000001e7 ), + .A3(\blk00000003/blk0000002c/sig00000bf8 ), + .A4(\blk00000003/blk0000002c/sig00000bf8 ), + .D(din_2_2[23]), + .DPRA0(\blk00000003/sig000001d9 ), + .DPRA1(\blk00000003/sig000001db ), + .DPRA2(\blk00000003/sig000001e3 ), + .DPRA3(\blk00000003/blk0000002c/sig00000bf8 ), + .DPRA4(\blk00000003/blk0000002c/sig00000bf8 ), + .WCLK(clk), + .WE(\blk00000003/blk0000002c/sig00000c29 ), + .SPO(\NLW_blk00000003/blk0000002c/blk0000008b_SPO_UNCONNECTED ), + .DPO(\blk00000003/blk0000002c/sig00000c28 ) + ); + RAM32X1D #( + .INIT ( 32'h00000000 )) + \blk00000003/blk0000002c/blk0000008a ( + .A0(\blk00000003/sig000001e9 ), + .A1(\blk00000003/sig000001e8 ), + .A2(\blk00000003/sig000001e7 ), + .A3(\blk00000003/blk0000002c/sig00000bf8 ), + .A4(\blk00000003/blk0000002c/sig00000bf8 ), + .D(din_2_2[19]), + .DPRA0(\blk00000003/sig000001d9 ), + .DPRA1(\blk00000003/sig000001db ), + .DPRA2(\blk00000003/sig000001e3 ), + .DPRA3(\blk00000003/blk0000002c/sig00000bf8 ), + .DPRA4(\blk00000003/blk0000002c/sig00000bf8 ), + .WCLK(clk), + .WE(\blk00000003/blk0000002c/sig00000c29 ), + .SPO(\NLW_blk00000003/blk0000002c/blk0000008a_SPO_UNCONNECTED ), + .DPO(\blk00000003/blk0000002c/sig00000c24 ) + ); + RAM32X1D #( + .INIT ( 32'h00000000 )) + \blk00000003/blk0000002c/blk00000089 ( + .A0(\blk00000003/sig000001e9 ), + .A1(\blk00000003/sig000001e8 ), + .A2(\blk00000003/sig000001e7 ), + .A3(\blk00000003/blk0000002c/sig00000bf8 ), + .A4(\blk00000003/blk0000002c/sig00000bf8 ), + .D(din_2_2[18]), + .DPRA0(\blk00000003/sig000001d9 ), + .DPRA1(\blk00000003/sig000001db ), + .DPRA2(\blk00000003/sig000001e3 ), + .DPRA3(\blk00000003/blk0000002c/sig00000bf8 ), + .DPRA4(\blk00000003/blk0000002c/sig00000bf8 ), + .WCLK(clk), + .WE(\blk00000003/blk0000002c/sig00000c29 ), + .SPO(\NLW_blk00000003/blk0000002c/blk00000089_SPO_UNCONNECTED ), + .DPO(\blk00000003/blk0000002c/sig00000c23 ) + ); + RAM32X1D #( + .INIT ( 32'h00000000 )) + \blk00000003/blk0000002c/blk00000088 ( + .A0(\blk00000003/sig000001e9 ), + .A1(\blk00000003/sig000001e8 ), + .A2(\blk00000003/sig000001e7 ), + .A3(\blk00000003/blk0000002c/sig00000bf8 ), + .A4(\blk00000003/blk0000002c/sig00000bf8 ), + .D(din_2_2[20]), + .DPRA0(\blk00000003/sig000001d9 ), + .DPRA1(\blk00000003/sig000001db ), + .DPRA2(\blk00000003/sig000001e3 ), + .DPRA3(\blk00000003/blk0000002c/sig00000bf8 ), + .DPRA4(\blk00000003/blk0000002c/sig00000bf8 ), + .WCLK(clk), + .WE(\blk00000003/blk0000002c/sig00000c29 ), + .SPO(\NLW_blk00000003/blk0000002c/blk00000088_SPO_UNCONNECTED ), + .DPO(\blk00000003/blk0000002c/sig00000c25 ) + ); + RAM32X1D #( + .INIT ( 32'h00000000 )) + \blk00000003/blk0000002c/blk00000087 ( + .A0(\blk00000003/sig000001e9 ), + .A1(\blk00000003/sig000001e8 ), + .A2(\blk00000003/sig000001e7 ), + .A3(\blk00000003/blk0000002c/sig00000bf8 ), + .A4(\blk00000003/blk0000002c/sig00000bf8 ), + .D(din_2_2[16]), + .DPRA0(\blk00000003/sig000001d9 ), + .DPRA1(\blk00000003/sig000001db ), + .DPRA2(\blk00000003/sig000001e3 ), + .DPRA3(\blk00000003/blk0000002c/sig00000bf8 ), + .DPRA4(\blk00000003/blk0000002c/sig00000bf8 ), + .WCLK(clk), + .WE(\blk00000003/blk0000002c/sig00000c29 ), + .SPO(\NLW_blk00000003/blk0000002c/blk00000087_SPO_UNCONNECTED ), + .DPO(\blk00000003/blk0000002c/sig00000c21 ) + ); + RAM32X1D #( + .INIT ( 32'h00000000 )) + \blk00000003/blk0000002c/blk00000086 ( + .A0(\blk00000003/sig000001e9 ), + .A1(\blk00000003/sig000001e8 ), + .A2(\blk00000003/sig000001e7 ), + .A3(\blk00000003/blk0000002c/sig00000bf8 ), + .A4(\blk00000003/blk0000002c/sig00000bf8 ), + .D(din_2_2[15]), + .DPRA0(\blk00000003/sig000001d9 ), + .DPRA1(\blk00000003/sig000001db ), + .DPRA2(\blk00000003/sig000001e3 ), + .DPRA3(\blk00000003/blk0000002c/sig00000bf8 ), + .DPRA4(\blk00000003/blk0000002c/sig00000bf8 ), + .WCLK(clk), + .WE(\blk00000003/blk0000002c/sig00000c29 ), + .SPO(\NLW_blk00000003/blk0000002c/blk00000086_SPO_UNCONNECTED ), + .DPO(\blk00000003/blk0000002c/sig00000c20 ) + ); + RAM32X1D #( + .INIT ( 32'h00000000 )) + \blk00000003/blk0000002c/blk00000085 ( + .A0(\blk00000003/sig000001e9 ), + .A1(\blk00000003/sig000001e8 ), + .A2(\blk00000003/sig000001e7 ), + .A3(\blk00000003/blk0000002c/sig00000bf8 ), + .A4(\blk00000003/blk0000002c/sig00000bf8 ), + .D(din_2_2[17]), + .DPRA0(\blk00000003/sig000001d9 ), + .DPRA1(\blk00000003/sig000001db ), + .DPRA2(\blk00000003/sig000001e3 ), + .DPRA3(\blk00000003/blk0000002c/sig00000bf8 ), + .DPRA4(\blk00000003/blk0000002c/sig00000bf8 ), + .WCLK(clk), + .WE(\blk00000003/blk0000002c/sig00000c29 ), + .SPO(\NLW_blk00000003/blk0000002c/blk00000085_SPO_UNCONNECTED ), + .DPO(\blk00000003/blk0000002c/sig00000c22 ) + ); + RAM32X1D #( + .INIT ( 32'h00000000 )) + \blk00000003/blk0000002c/blk00000084 ( + .A0(\blk00000003/sig000001e9 ), + .A1(\blk00000003/sig000001e8 ), + .A2(\blk00000003/sig000001e7 ), + .A3(\blk00000003/blk0000002c/sig00000bf8 ), + .A4(\blk00000003/blk0000002c/sig00000bf8 ), + .D(din_2_2[13]), + .DPRA0(\blk00000003/sig000001d9 ), + .DPRA1(\blk00000003/sig000001db ), + .DPRA2(\blk00000003/sig000001e3 ), + .DPRA3(\blk00000003/blk0000002c/sig00000bf8 ), + .DPRA4(\blk00000003/blk0000002c/sig00000bf8 ), + .WCLK(clk), + .WE(\blk00000003/blk0000002c/sig00000c29 ), + .SPO(\NLW_blk00000003/blk0000002c/blk00000084_SPO_UNCONNECTED ), + .DPO(\blk00000003/blk0000002c/sig00000c1e ) + ); + RAM32X1D #( + .INIT ( 32'h00000000 )) + \blk00000003/blk0000002c/blk00000083 ( + .A0(\blk00000003/sig000001e9 ), + .A1(\blk00000003/sig000001e8 ), + .A2(\blk00000003/sig000001e7 ), + .A3(\blk00000003/blk0000002c/sig00000bf8 ), + .A4(\blk00000003/blk0000002c/sig00000bf8 ), + .D(din_2_2[12]), + .DPRA0(\blk00000003/sig000001d9 ), + .DPRA1(\blk00000003/sig000001db ), + .DPRA2(\blk00000003/sig000001e3 ), + .DPRA3(\blk00000003/blk0000002c/sig00000bf8 ), + .DPRA4(\blk00000003/blk0000002c/sig00000bf8 ), + .WCLK(clk), + .WE(\blk00000003/blk0000002c/sig00000c29 ), + .SPO(\NLW_blk00000003/blk0000002c/blk00000083_SPO_UNCONNECTED ), + .DPO(\blk00000003/blk0000002c/sig00000c1d ) + ); + RAM32X1D #( + .INIT ( 32'h00000000 )) + \blk00000003/blk0000002c/blk00000082 ( + .A0(\blk00000003/sig000001e9 ), + .A1(\blk00000003/sig000001e8 ), + .A2(\blk00000003/sig000001e7 ), + .A3(\blk00000003/blk0000002c/sig00000bf8 ), + .A4(\blk00000003/blk0000002c/sig00000bf8 ), + .D(din_2_2[14]), + .DPRA0(\blk00000003/sig000001d9 ), + .DPRA1(\blk00000003/sig000001db ), + .DPRA2(\blk00000003/sig000001e3 ), + .DPRA3(\blk00000003/blk0000002c/sig00000bf8 ), + .DPRA4(\blk00000003/blk0000002c/sig00000bf8 ), + .WCLK(clk), + .WE(\blk00000003/blk0000002c/sig00000c29 ), + .SPO(\NLW_blk00000003/blk0000002c/blk00000082_SPO_UNCONNECTED ), + .DPO(\blk00000003/blk0000002c/sig00000c1f ) + ); + RAM32X1D #( + .INIT ( 32'h00000000 )) + \blk00000003/blk0000002c/blk00000081 ( + .A0(\blk00000003/sig000001e9 ), + .A1(\blk00000003/sig000001e8 ), + .A2(\blk00000003/sig000001e7 ), + .A3(\blk00000003/blk0000002c/sig00000bf8 ), + .A4(\blk00000003/blk0000002c/sig00000bf8 ), + .D(din_2_2[10]), + .DPRA0(\blk00000003/sig000001d9 ), + .DPRA1(\blk00000003/sig000001db ), + .DPRA2(\blk00000003/sig000001e3 ), + .DPRA3(\blk00000003/blk0000002c/sig00000bf8 ), + .DPRA4(\blk00000003/blk0000002c/sig00000bf8 ), + .WCLK(clk), + .WE(\blk00000003/blk0000002c/sig00000c29 ), + .SPO(\NLW_blk00000003/blk0000002c/blk00000081_SPO_UNCONNECTED ), + .DPO(\blk00000003/blk0000002c/sig00000c1b ) + ); + RAM32X1D #( + .INIT ( 32'h00000000 )) + \blk00000003/blk0000002c/blk00000080 ( + .A0(\blk00000003/sig000001e9 ), + .A1(\blk00000003/sig000001e8 ), + .A2(\blk00000003/sig000001e7 ), + .A3(\blk00000003/blk0000002c/sig00000bf8 ), + .A4(\blk00000003/blk0000002c/sig00000bf8 ), + .D(din_2_2[9]), + .DPRA0(\blk00000003/sig000001d9 ), + .DPRA1(\blk00000003/sig000001db ), + .DPRA2(\blk00000003/sig000001e3 ), + .DPRA3(\blk00000003/blk0000002c/sig00000bf8 ), + .DPRA4(\blk00000003/blk0000002c/sig00000bf8 ), + .WCLK(clk), + .WE(\blk00000003/blk0000002c/sig00000c29 ), + .SPO(\NLW_blk00000003/blk0000002c/blk00000080_SPO_UNCONNECTED ), + .DPO(\blk00000003/blk0000002c/sig00000c1a ) + ); + RAM32X1D #( + .INIT ( 32'h00000000 )) + \blk00000003/blk0000002c/blk0000007f ( + .A0(\blk00000003/sig000001e9 ), + .A1(\blk00000003/sig000001e8 ), + .A2(\blk00000003/sig000001e7 ), + .A3(\blk00000003/blk0000002c/sig00000bf8 ), + .A4(\blk00000003/blk0000002c/sig00000bf8 ), + .D(din_2_2[11]), + .DPRA0(\blk00000003/sig000001d9 ), + .DPRA1(\blk00000003/sig000001db ), + .DPRA2(\blk00000003/sig000001e3 ), + .DPRA3(\blk00000003/blk0000002c/sig00000bf8 ), + .DPRA4(\blk00000003/blk0000002c/sig00000bf8 ), + .WCLK(clk), + .WE(\blk00000003/blk0000002c/sig00000c29 ), + .SPO(\NLW_blk00000003/blk0000002c/blk0000007f_SPO_UNCONNECTED ), + .DPO(\blk00000003/blk0000002c/sig00000c1c ) + ); + RAM32X1D #( + .INIT ( 32'h00000000 )) + \blk00000003/blk0000002c/blk0000007e ( + .A0(\blk00000003/sig000001e9 ), + .A1(\blk00000003/sig000001e8 ), + .A2(\blk00000003/sig000001e7 ), + .A3(\blk00000003/blk0000002c/sig00000bf8 ), + .A4(\blk00000003/blk0000002c/sig00000bf8 ), + .D(din_2_2[7]), + .DPRA0(\blk00000003/sig000001d9 ), + .DPRA1(\blk00000003/sig000001db ), + .DPRA2(\blk00000003/sig000001e3 ), + .DPRA3(\blk00000003/blk0000002c/sig00000bf8 ), + .DPRA4(\blk00000003/blk0000002c/sig00000bf8 ), + .WCLK(clk), + .WE(\blk00000003/blk0000002c/sig00000c29 ), + .SPO(\NLW_blk00000003/blk0000002c/blk0000007e_SPO_UNCONNECTED ), + .DPO(\blk00000003/blk0000002c/sig00000c18 ) + ); + RAM32X1D #( + .INIT ( 32'h00000000 )) + \blk00000003/blk0000002c/blk0000007d ( + .A0(\blk00000003/sig000001e9 ), + .A1(\blk00000003/sig000001e8 ), + .A2(\blk00000003/sig000001e7 ), + .A3(\blk00000003/blk0000002c/sig00000bf8 ), + .A4(\blk00000003/blk0000002c/sig00000bf8 ), + .D(din_2_2[6]), + .DPRA0(\blk00000003/sig000001d9 ), + .DPRA1(\blk00000003/sig000001db ), + .DPRA2(\blk00000003/sig000001e3 ), + .DPRA3(\blk00000003/blk0000002c/sig00000bf8 ), + .DPRA4(\blk00000003/blk0000002c/sig00000bf8 ), + .WCLK(clk), + .WE(\blk00000003/blk0000002c/sig00000c29 ), + .SPO(\NLW_blk00000003/blk0000002c/blk0000007d_SPO_UNCONNECTED ), + .DPO(\blk00000003/blk0000002c/sig00000c17 ) + ); + RAM32X1D #( + .INIT ( 32'h00000000 )) + \blk00000003/blk0000002c/blk0000007c ( + .A0(\blk00000003/sig000001e9 ), + .A1(\blk00000003/sig000001e8 ), + .A2(\blk00000003/sig000001e7 ), + .A3(\blk00000003/blk0000002c/sig00000bf8 ), + .A4(\blk00000003/blk0000002c/sig00000bf8 ), + .D(din_2_2[8]), + .DPRA0(\blk00000003/sig000001d9 ), + .DPRA1(\blk00000003/sig000001db ), + .DPRA2(\blk00000003/sig000001e3 ), + .DPRA3(\blk00000003/blk0000002c/sig00000bf8 ), + .DPRA4(\blk00000003/blk0000002c/sig00000bf8 ), + .WCLK(clk), + .WE(\blk00000003/blk0000002c/sig00000c29 ), + .SPO(\NLW_blk00000003/blk0000002c/blk0000007c_SPO_UNCONNECTED ), + .DPO(\blk00000003/blk0000002c/sig00000c19 ) + ); + RAM32X1D #( + .INIT ( 32'h00000000 )) + \blk00000003/blk0000002c/blk0000007b ( + .A0(\blk00000003/sig000001e9 ), + .A1(\blk00000003/sig000001e8 ), + .A2(\blk00000003/sig000001e7 ), + .A3(\blk00000003/blk0000002c/sig00000bf8 ), + .A4(\blk00000003/blk0000002c/sig00000bf8 ), + .D(din_2_2[4]), + .DPRA0(\blk00000003/sig000001d9 ), + .DPRA1(\blk00000003/sig000001db ), + .DPRA2(\blk00000003/sig000001e3 ), + .DPRA3(\blk00000003/blk0000002c/sig00000bf8 ), + .DPRA4(\blk00000003/blk0000002c/sig00000bf8 ), + .WCLK(clk), + .WE(\blk00000003/blk0000002c/sig00000c29 ), + .SPO(\NLW_blk00000003/blk0000002c/blk0000007b_SPO_UNCONNECTED ), + .DPO(\blk00000003/blk0000002c/sig00000c15 ) + ); + RAM32X1D #( + .INIT ( 32'h00000000 )) + \blk00000003/blk0000002c/blk0000007a ( + .A0(\blk00000003/sig000001e9 ), + .A1(\blk00000003/sig000001e8 ), + .A2(\blk00000003/sig000001e7 ), + .A3(\blk00000003/blk0000002c/sig00000bf8 ), + .A4(\blk00000003/blk0000002c/sig00000bf8 ), + .D(din_2_2[3]), + .DPRA0(\blk00000003/sig000001d9 ), + .DPRA1(\blk00000003/sig000001db ), + .DPRA2(\blk00000003/sig000001e3 ), + .DPRA3(\blk00000003/blk0000002c/sig00000bf8 ), + .DPRA4(\blk00000003/blk0000002c/sig00000bf8 ), + .WCLK(clk), + .WE(\blk00000003/blk0000002c/sig00000c29 ), + .SPO(\NLW_blk00000003/blk0000002c/blk0000007a_SPO_UNCONNECTED ), + .DPO(\blk00000003/blk0000002c/sig00000c14 ) + ); + RAM32X1D #( + .INIT ( 32'h00000000 )) + \blk00000003/blk0000002c/blk00000079 ( + .A0(\blk00000003/sig000001e9 ), + .A1(\blk00000003/sig000001e8 ), + .A2(\blk00000003/sig000001e7 ), + .A3(\blk00000003/blk0000002c/sig00000bf8 ), + .A4(\blk00000003/blk0000002c/sig00000bf8 ), + .D(din_2_2[5]), + .DPRA0(\blk00000003/sig000001d9 ), + .DPRA1(\blk00000003/sig000001db ), + .DPRA2(\blk00000003/sig000001e3 ), + .DPRA3(\blk00000003/blk0000002c/sig00000bf8 ), + .DPRA4(\blk00000003/blk0000002c/sig00000bf8 ), + .WCLK(clk), + .WE(\blk00000003/blk0000002c/sig00000c29 ), + .SPO(\NLW_blk00000003/blk0000002c/blk00000079_SPO_UNCONNECTED ), + .DPO(\blk00000003/blk0000002c/sig00000c16 ) + ); + RAM32X1D #( + .INIT ( 32'h00000000 )) + \blk00000003/blk0000002c/blk00000078 ( + .A0(\blk00000003/sig000001e9 ), + .A1(\blk00000003/sig000001e8 ), + .A2(\blk00000003/sig000001e7 ), + .A3(\blk00000003/blk0000002c/sig00000bf8 ), + .A4(\blk00000003/blk0000002c/sig00000bf8 ), + .D(din_2_2[1]), + .DPRA0(\blk00000003/sig000001d9 ), + .DPRA1(\blk00000003/sig000001db ), + .DPRA2(\blk00000003/sig000001e3 ), + .DPRA3(\blk00000003/blk0000002c/sig00000bf8 ), + .DPRA4(\blk00000003/blk0000002c/sig00000bf8 ), + .WCLK(clk), + .WE(\blk00000003/blk0000002c/sig00000c29 ), + .SPO(\NLW_blk00000003/blk0000002c/blk00000078_SPO_UNCONNECTED ), + .DPO(\blk00000003/blk0000002c/sig00000c12 ) + ); + RAM32X1D #( + .INIT ( 32'h00000000 )) + \blk00000003/blk0000002c/blk00000077 ( + .A0(\blk00000003/sig000001e9 ), + .A1(\blk00000003/sig000001e8 ), + .A2(\blk00000003/sig000001e7 ), + .A3(\blk00000003/blk0000002c/sig00000bf8 ), + .A4(\blk00000003/blk0000002c/sig00000bf8 ), + .D(din_2_2[0]), + .DPRA0(\blk00000003/sig000001d9 ), + .DPRA1(\blk00000003/sig000001db ), + .DPRA2(\blk00000003/sig000001e3 ), + .DPRA3(\blk00000003/blk0000002c/sig00000bf8 ), + .DPRA4(\blk00000003/blk0000002c/sig00000bf8 ), + .WCLK(clk), + .WE(\blk00000003/blk0000002c/sig00000c29 ), + .SPO(\NLW_blk00000003/blk0000002c/blk00000077_SPO_UNCONNECTED ), + .DPO(\blk00000003/blk0000002c/sig00000c11 ) + ); + RAM32X1D #( + .INIT ( 32'h00000000 )) + \blk00000003/blk0000002c/blk00000076 ( + .A0(\blk00000003/sig000001e9 ), + .A1(\blk00000003/sig000001e8 ), + .A2(\blk00000003/sig000001e7 ), + .A3(\blk00000003/blk0000002c/sig00000bf8 ), + .A4(\blk00000003/blk0000002c/sig00000bf8 ), + .D(din_2_2[2]), + .DPRA0(\blk00000003/sig000001d9 ), + .DPRA1(\blk00000003/sig000001db ), + .DPRA2(\blk00000003/sig000001e3 ), + .DPRA3(\blk00000003/blk0000002c/sig00000bf8 ), + .DPRA4(\blk00000003/blk0000002c/sig00000bf8 ), + .WCLK(clk), + .WE(\blk00000003/blk0000002c/sig00000c29 ), + .SPO(\NLW_blk00000003/blk0000002c/blk00000076_SPO_UNCONNECTED ), + .DPO(\blk00000003/blk0000002c/sig00000c13 ) + ); + RAM32X1D #( + .INIT ( 32'h00000000 )) + \blk00000003/blk0000002c/blk00000075 ( + .A0(\blk00000003/sig000001e9 ), + .A1(\blk00000003/sig000001e8 ), + .A2(\blk00000003/sig000001e7 ), + .A3(\blk00000003/blk0000002c/sig00000bf8 ), + .A4(\blk00000003/blk0000002c/sig00000bf8 ), + .D(din_1_1[22]), + .DPRA0(\blk00000003/sig000001d9 ), + .DPRA1(\blk00000003/sig000001db ), + .DPRA2(\blk00000003/sig000001e3 ), + .DPRA3(\blk00000003/blk0000002c/sig00000bf8 ), + .DPRA4(\blk00000003/blk0000002c/sig00000bf8 ), + .WCLK(clk), + .WE(\blk00000003/blk0000002c/sig00000c29 ), + .SPO(\NLW_blk00000003/blk0000002c/blk00000075_SPO_UNCONNECTED ), + .DPO(\blk00000003/blk0000002c/sig00000c0f ) + ); + RAM32X1D #( + .INIT ( 32'h00000000 )) + \blk00000003/blk0000002c/blk00000074 ( + .A0(\blk00000003/sig000001e9 ), + .A1(\blk00000003/sig000001e8 ), + .A2(\blk00000003/sig000001e7 ), + .A3(\blk00000003/blk0000002c/sig00000bf8 ), + .A4(\blk00000003/blk0000002c/sig00000bf8 ), + .D(din_1_1[21]), + .DPRA0(\blk00000003/sig000001d9 ), + .DPRA1(\blk00000003/sig000001db ), + .DPRA2(\blk00000003/sig000001e3 ), + .DPRA3(\blk00000003/blk0000002c/sig00000bf8 ), + .DPRA4(\blk00000003/blk0000002c/sig00000bf8 ), + .WCLK(clk), + .WE(\blk00000003/blk0000002c/sig00000c29 ), + .SPO(\NLW_blk00000003/blk0000002c/blk00000074_SPO_UNCONNECTED ), + .DPO(\blk00000003/blk0000002c/sig00000c0e ) + ); + RAM32X1D #( + .INIT ( 32'h00000000 )) + \blk00000003/blk0000002c/blk00000073 ( + .A0(\blk00000003/sig000001e9 ), + .A1(\blk00000003/sig000001e8 ), + .A2(\blk00000003/sig000001e7 ), + .A3(\blk00000003/blk0000002c/sig00000bf8 ), + .A4(\blk00000003/blk0000002c/sig00000bf8 ), + .D(din_1_1[23]), + .DPRA0(\blk00000003/sig000001d9 ), + .DPRA1(\blk00000003/sig000001db ), + .DPRA2(\blk00000003/sig000001e3 ), + .DPRA3(\blk00000003/blk0000002c/sig00000bf8 ), + .DPRA4(\blk00000003/blk0000002c/sig00000bf8 ), + .WCLK(clk), + .WE(\blk00000003/blk0000002c/sig00000c29 ), + .SPO(\NLW_blk00000003/blk0000002c/blk00000073_SPO_UNCONNECTED ), + .DPO(\blk00000003/blk0000002c/sig00000c10 ) + ); + RAM32X1D #( + .INIT ( 32'h00000000 )) + \blk00000003/blk0000002c/blk00000072 ( + .A0(\blk00000003/sig000001e9 ), + .A1(\blk00000003/sig000001e8 ), + .A2(\blk00000003/sig000001e7 ), + .A3(\blk00000003/blk0000002c/sig00000bf8 ), + .A4(\blk00000003/blk0000002c/sig00000bf8 ), + .D(din_1_1[19]), + .DPRA0(\blk00000003/sig000001d9 ), + .DPRA1(\blk00000003/sig000001db ), + .DPRA2(\blk00000003/sig000001e3 ), + .DPRA3(\blk00000003/blk0000002c/sig00000bf8 ), + .DPRA4(\blk00000003/blk0000002c/sig00000bf8 ), + .WCLK(clk), + .WE(\blk00000003/blk0000002c/sig00000c29 ), + .SPO(\NLW_blk00000003/blk0000002c/blk00000072_SPO_UNCONNECTED ), + .DPO(\blk00000003/blk0000002c/sig00000c0c ) + ); + RAM32X1D #( + .INIT ( 32'h00000000 )) + \blk00000003/blk0000002c/blk00000071 ( + .A0(\blk00000003/sig000001e9 ), + .A1(\blk00000003/sig000001e8 ), + .A2(\blk00000003/sig000001e7 ), + .A3(\blk00000003/blk0000002c/sig00000bf8 ), + .A4(\blk00000003/blk0000002c/sig00000bf8 ), + .D(din_1_1[18]), + .DPRA0(\blk00000003/sig000001d9 ), + .DPRA1(\blk00000003/sig000001db ), + .DPRA2(\blk00000003/sig000001e3 ), + .DPRA3(\blk00000003/blk0000002c/sig00000bf8 ), + .DPRA4(\blk00000003/blk0000002c/sig00000bf8 ), + .WCLK(clk), + .WE(\blk00000003/blk0000002c/sig00000c29 ), + .SPO(\NLW_blk00000003/blk0000002c/blk00000071_SPO_UNCONNECTED ), + .DPO(\blk00000003/blk0000002c/sig00000c0b ) + ); + RAM32X1D #( + .INIT ( 32'h00000000 )) + \blk00000003/blk0000002c/blk00000070 ( + .A0(\blk00000003/sig000001e9 ), + .A1(\blk00000003/sig000001e8 ), + .A2(\blk00000003/sig000001e7 ), + .A3(\blk00000003/blk0000002c/sig00000bf8 ), + .A4(\blk00000003/blk0000002c/sig00000bf8 ), + .D(din_1_1[20]), + .DPRA0(\blk00000003/sig000001d9 ), + .DPRA1(\blk00000003/sig000001db ), + .DPRA2(\blk00000003/sig000001e3 ), + .DPRA3(\blk00000003/blk0000002c/sig00000bf8 ), + .DPRA4(\blk00000003/blk0000002c/sig00000bf8 ), + .WCLK(clk), + .WE(\blk00000003/blk0000002c/sig00000c29 ), + .SPO(\NLW_blk00000003/blk0000002c/blk00000070_SPO_UNCONNECTED ), + .DPO(\blk00000003/blk0000002c/sig00000c0d ) + ); + RAM32X1D #( + .INIT ( 32'h00000000 )) + \blk00000003/blk0000002c/blk0000006f ( + .A0(\blk00000003/sig000001e9 ), + .A1(\blk00000003/sig000001e8 ), + .A2(\blk00000003/sig000001e7 ), + .A3(\blk00000003/blk0000002c/sig00000bf8 ), + .A4(\blk00000003/blk0000002c/sig00000bf8 ), + .D(din_1_1[16]), + .DPRA0(\blk00000003/sig000001d9 ), + .DPRA1(\blk00000003/sig000001db ), + .DPRA2(\blk00000003/sig000001e3 ), + .DPRA3(\blk00000003/blk0000002c/sig00000bf8 ), + .DPRA4(\blk00000003/blk0000002c/sig00000bf8 ), + .WCLK(clk), + .WE(\blk00000003/blk0000002c/sig00000c29 ), + .SPO(\NLW_blk00000003/blk0000002c/blk0000006f_SPO_UNCONNECTED ), + .DPO(\blk00000003/blk0000002c/sig00000c09 ) + ); + RAM32X1D #( + .INIT ( 32'h00000000 )) + \blk00000003/blk0000002c/blk0000006e ( + .A0(\blk00000003/sig000001e9 ), + .A1(\blk00000003/sig000001e8 ), + .A2(\blk00000003/sig000001e7 ), + .A3(\blk00000003/blk0000002c/sig00000bf8 ), + .A4(\blk00000003/blk0000002c/sig00000bf8 ), + .D(din_1_1[15]), + .DPRA0(\blk00000003/sig000001d9 ), + .DPRA1(\blk00000003/sig000001db ), + .DPRA2(\blk00000003/sig000001e3 ), + .DPRA3(\blk00000003/blk0000002c/sig00000bf8 ), + .DPRA4(\blk00000003/blk0000002c/sig00000bf8 ), + .WCLK(clk), + .WE(\blk00000003/blk0000002c/sig00000c29 ), + .SPO(\NLW_blk00000003/blk0000002c/blk0000006e_SPO_UNCONNECTED ), + .DPO(\blk00000003/blk0000002c/sig00000c08 ) + ); + RAM32X1D #( + .INIT ( 32'h00000000 )) + \blk00000003/blk0000002c/blk0000006d ( + .A0(\blk00000003/sig000001e9 ), + .A1(\blk00000003/sig000001e8 ), + .A2(\blk00000003/sig000001e7 ), + .A3(\blk00000003/blk0000002c/sig00000bf8 ), + .A4(\blk00000003/blk0000002c/sig00000bf8 ), + .D(din_1_1[17]), + .DPRA0(\blk00000003/sig000001d9 ), + .DPRA1(\blk00000003/sig000001db ), + .DPRA2(\blk00000003/sig000001e3 ), + .DPRA3(\blk00000003/blk0000002c/sig00000bf8 ), + .DPRA4(\blk00000003/blk0000002c/sig00000bf8 ), + .WCLK(clk), + .WE(\blk00000003/blk0000002c/sig00000c29 ), + .SPO(\NLW_blk00000003/blk0000002c/blk0000006d_SPO_UNCONNECTED ), + .DPO(\blk00000003/blk0000002c/sig00000c0a ) + ); + RAM32X1D #( + .INIT ( 32'h00000000 )) + \blk00000003/blk0000002c/blk0000006c ( + .A0(\blk00000003/sig000001e9 ), + .A1(\blk00000003/sig000001e8 ), + .A2(\blk00000003/sig000001e7 ), + .A3(\blk00000003/blk0000002c/sig00000bf8 ), + .A4(\blk00000003/blk0000002c/sig00000bf8 ), + .D(din_1_1[13]), + .DPRA0(\blk00000003/sig000001d9 ), + .DPRA1(\blk00000003/sig000001db ), + .DPRA2(\blk00000003/sig000001e3 ), + .DPRA3(\blk00000003/blk0000002c/sig00000bf8 ), + .DPRA4(\blk00000003/blk0000002c/sig00000bf8 ), + .WCLK(clk), + .WE(\blk00000003/blk0000002c/sig00000c29 ), + .SPO(\NLW_blk00000003/blk0000002c/blk0000006c_SPO_UNCONNECTED ), + .DPO(\blk00000003/blk0000002c/sig00000c06 ) + ); + RAM32X1D #( + .INIT ( 32'h00000000 )) + \blk00000003/blk0000002c/blk0000006b ( + .A0(\blk00000003/sig000001e9 ), + .A1(\blk00000003/sig000001e8 ), + .A2(\blk00000003/sig000001e7 ), + .A3(\blk00000003/blk0000002c/sig00000bf8 ), + .A4(\blk00000003/blk0000002c/sig00000bf8 ), + .D(din_1_1[12]), + .DPRA0(\blk00000003/sig000001d9 ), + .DPRA1(\blk00000003/sig000001db ), + .DPRA2(\blk00000003/sig000001e3 ), + .DPRA3(\blk00000003/blk0000002c/sig00000bf8 ), + .DPRA4(\blk00000003/blk0000002c/sig00000bf8 ), + .WCLK(clk), + .WE(\blk00000003/blk0000002c/sig00000c29 ), + .SPO(\NLW_blk00000003/blk0000002c/blk0000006b_SPO_UNCONNECTED ), + .DPO(\blk00000003/blk0000002c/sig00000c05 ) + ); + RAM32X1D #( + .INIT ( 32'h00000000 )) + \blk00000003/blk0000002c/blk0000006a ( + .A0(\blk00000003/sig000001e9 ), + .A1(\blk00000003/sig000001e8 ), + .A2(\blk00000003/sig000001e7 ), + .A3(\blk00000003/blk0000002c/sig00000bf8 ), + .A4(\blk00000003/blk0000002c/sig00000bf8 ), + .D(din_1_1[14]), + .DPRA0(\blk00000003/sig000001d9 ), + .DPRA1(\blk00000003/sig000001db ), + .DPRA2(\blk00000003/sig000001e3 ), + .DPRA3(\blk00000003/blk0000002c/sig00000bf8 ), + .DPRA4(\blk00000003/blk0000002c/sig00000bf8 ), + .WCLK(clk), + .WE(\blk00000003/blk0000002c/sig00000c29 ), + .SPO(\NLW_blk00000003/blk0000002c/blk0000006a_SPO_UNCONNECTED ), + .DPO(\blk00000003/blk0000002c/sig00000c07 ) + ); + RAM32X1D #( + .INIT ( 32'h00000000 )) + \blk00000003/blk0000002c/blk00000069 ( + .A0(\blk00000003/sig000001e9 ), + .A1(\blk00000003/sig000001e8 ), + .A2(\blk00000003/sig000001e7 ), + .A3(\blk00000003/blk0000002c/sig00000bf8 ), + .A4(\blk00000003/blk0000002c/sig00000bf8 ), + .D(din_1_1[10]), + .DPRA0(\blk00000003/sig000001d9 ), + .DPRA1(\blk00000003/sig000001db ), + .DPRA2(\blk00000003/sig000001e3 ), + .DPRA3(\blk00000003/blk0000002c/sig00000bf8 ), + .DPRA4(\blk00000003/blk0000002c/sig00000bf8 ), + .WCLK(clk), + .WE(\blk00000003/blk0000002c/sig00000c29 ), + .SPO(\NLW_blk00000003/blk0000002c/blk00000069_SPO_UNCONNECTED ), + .DPO(\blk00000003/blk0000002c/sig00000c03 ) + ); + RAM32X1D #( + .INIT ( 32'h00000000 )) + \blk00000003/blk0000002c/blk00000068 ( + .A0(\blk00000003/sig000001e9 ), + .A1(\blk00000003/sig000001e8 ), + .A2(\blk00000003/sig000001e7 ), + .A3(\blk00000003/blk0000002c/sig00000bf8 ), + .A4(\blk00000003/blk0000002c/sig00000bf8 ), + .D(din_1_1[9]), + .DPRA0(\blk00000003/sig000001d9 ), + .DPRA1(\blk00000003/sig000001db ), + .DPRA2(\blk00000003/sig000001e3 ), + .DPRA3(\blk00000003/blk0000002c/sig00000bf8 ), + .DPRA4(\blk00000003/blk0000002c/sig00000bf8 ), + .WCLK(clk), + .WE(\blk00000003/blk0000002c/sig00000c29 ), + .SPO(\NLW_blk00000003/blk0000002c/blk00000068_SPO_UNCONNECTED ), + .DPO(\blk00000003/blk0000002c/sig00000c02 ) + ); + RAM32X1D #( + .INIT ( 32'h00000000 )) + \blk00000003/blk0000002c/blk00000067 ( + .A0(\blk00000003/sig000001e9 ), + .A1(\blk00000003/sig000001e8 ), + .A2(\blk00000003/sig000001e7 ), + .A3(\blk00000003/blk0000002c/sig00000bf8 ), + .A4(\blk00000003/blk0000002c/sig00000bf8 ), + .D(din_1_1[11]), + .DPRA0(\blk00000003/sig000001d9 ), + .DPRA1(\blk00000003/sig000001db ), + .DPRA2(\blk00000003/sig000001e3 ), + .DPRA3(\blk00000003/blk0000002c/sig00000bf8 ), + .DPRA4(\blk00000003/blk0000002c/sig00000bf8 ), + .WCLK(clk), + .WE(\blk00000003/blk0000002c/sig00000c29 ), + .SPO(\NLW_blk00000003/blk0000002c/blk00000067_SPO_UNCONNECTED ), + .DPO(\blk00000003/blk0000002c/sig00000c04 ) + ); + RAM32X1D #( + .INIT ( 32'h00000000 )) + \blk00000003/blk0000002c/blk00000066 ( + .A0(\blk00000003/sig000001e9 ), + .A1(\blk00000003/sig000001e8 ), + .A2(\blk00000003/sig000001e7 ), + .A3(\blk00000003/blk0000002c/sig00000bf8 ), + .A4(\blk00000003/blk0000002c/sig00000bf8 ), + .D(din_1_1[7]), + .DPRA0(\blk00000003/sig000001d9 ), + .DPRA1(\blk00000003/sig000001db ), + .DPRA2(\blk00000003/sig000001e3 ), + .DPRA3(\blk00000003/blk0000002c/sig00000bf8 ), + .DPRA4(\blk00000003/blk0000002c/sig00000bf8 ), + .WCLK(clk), + .WE(\blk00000003/blk0000002c/sig00000c29 ), + .SPO(\NLW_blk00000003/blk0000002c/blk00000066_SPO_UNCONNECTED ), + .DPO(\blk00000003/blk0000002c/sig00000c00 ) + ); + RAM32X1D #( + .INIT ( 32'h00000000 )) + \blk00000003/blk0000002c/blk00000065 ( + .A0(\blk00000003/sig000001e9 ), + .A1(\blk00000003/sig000001e8 ), + .A2(\blk00000003/sig000001e7 ), + .A3(\blk00000003/blk0000002c/sig00000bf8 ), + .A4(\blk00000003/blk0000002c/sig00000bf8 ), + .D(din_1_1[6]), + .DPRA0(\blk00000003/sig000001d9 ), + .DPRA1(\blk00000003/sig000001db ), + .DPRA2(\blk00000003/sig000001e3 ), + .DPRA3(\blk00000003/blk0000002c/sig00000bf8 ), + .DPRA4(\blk00000003/blk0000002c/sig00000bf8 ), + .WCLK(clk), + .WE(\blk00000003/blk0000002c/sig00000c29 ), + .SPO(\NLW_blk00000003/blk0000002c/blk00000065_SPO_UNCONNECTED ), + .DPO(\blk00000003/blk0000002c/sig00000bff ) + ); + RAM32X1D #( + .INIT ( 32'h00000000 )) + \blk00000003/blk0000002c/blk00000064 ( + .A0(\blk00000003/sig000001e9 ), + .A1(\blk00000003/sig000001e8 ), + .A2(\blk00000003/sig000001e7 ), + .A3(\blk00000003/blk0000002c/sig00000bf8 ), + .A4(\blk00000003/blk0000002c/sig00000bf8 ), + .D(din_1_1[8]), + .DPRA0(\blk00000003/sig000001d9 ), + .DPRA1(\blk00000003/sig000001db ), + .DPRA2(\blk00000003/sig000001e3 ), + .DPRA3(\blk00000003/blk0000002c/sig00000bf8 ), + .DPRA4(\blk00000003/blk0000002c/sig00000bf8 ), + .WCLK(clk), + .WE(\blk00000003/blk0000002c/sig00000c29 ), + .SPO(\NLW_blk00000003/blk0000002c/blk00000064_SPO_UNCONNECTED ), + .DPO(\blk00000003/blk0000002c/sig00000c01 ) + ); + RAM32X1D #( + .INIT ( 32'h00000000 )) + \blk00000003/blk0000002c/blk00000063 ( + .A0(\blk00000003/sig000001e9 ), + .A1(\blk00000003/sig000001e8 ), + .A2(\blk00000003/sig000001e7 ), + .A3(\blk00000003/blk0000002c/sig00000bf8 ), + .A4(\blk00000003/blk0000002c/sig00000bf8 ), + .D(din_1_1[4]), + .DPRA0(\blk00000003/sig000001d9 ), + .DPRA1(\blk00000003/sig000001db ), + .DPRA2(\blk00000003/sig000001e3 ), + .DPRA3(\blk00000003/blk0000002c/sig00000bf8 ), + .DPRA4(\blk00000003/blk0000002c/sig00000bf8 ), + .WCLK(clk), + .WE(\blk00000003/blk0000002c/sig00000c29 ), + .SPO(\NLW_blk00000003/blk0000002c/blk00000063_SPO_UNCONNECTED ), + .DPO(\blk00000003/blk0000002c/sig00000bfd ) + ); + RAM32X1D #( + .INIT ( 32'h00000000 )) + \blk00000003/blk0000002c/blk00000062 ( + .A0(\blk00000003/sig000001e9 ), + .A1(\blk00000003/sig000001e8 ), + .A2(\blk00000003/sig000001e7 ), + .A3(\blk00000003/blk0000002c/sig00000bf8 ), + .A4(\blk00000003/blk0000002c/sig00000bf8 ), + .D(din_1_1[3]), + .DPRA0(\blk00000003/sig000001d9 ), + .DPRA1(\blk00000003/sig000001db ), + .DPRA2(\blk00000003/sig000001e3 ), + .DPRA3(\blk00000003/blk0000002c/sig00000bf8 ), + .DPRA4(\blk00000003/blk0000002c/sig00000bf8 ), + .WCLK(clk), + .WE(\blk00000003/blk0000002c/sig00000c29 ), + .SPO(\NLW_blk00000003/blk0000002c/blk00000062_SPO_UNCONNECTED ), + .DPO(\blk00000003/blk0000002c/sig00000bfc ) + ); + RAM32X1D #( + .INIT ( 32'h00000000 )) + \blk00000003/blk0000002c/blk00000061 ( + .A0(\blk00000003/sig000001e9 ), + .A1(\blk00000003/sig000001e8 ), + .A2(\blk00000003/sig000001e7 ), + .A3(\blk00000003/blk0000002c/sig00000bf8 ), + .A4(\blk00000003/blk0000002c/sig00000bf8 ), + .D(din_1_1[5]), + .DPRA0(\blk00000003/sig000001d9 ), + .DPRA1(\blk00000003/sig000001db ), + .DPRA2(\blk00000003/sig000001e3 ), + .DPRA3(\blk00000003/blk0000002c/sig00000bf8 ), + .DPRA4(\blk00000003/blk0000002c/sig00000bf8 ), + .WCLK(clk), + .WE(\blk00000003/blk0000002c/sig00000c29 ), + .SPO(\NLW_blk00000003/blk0000002c/blk00000061_SPO_UNCONNECTED ), + .DPO(\blk00000003/blk0000002c/sig00000bfe ) + ); + RAM32X1D #( + .INIT ( 32'h00000000 )) + \blk00000003/blk0000002c/blk00000060 ( + .A0(\blk00000003/sig000001e9 ), + .A1(\blk00000003/sig000001e8 ), + .A2(\blk00000003/sig000001e7 ), + .A3(\blk00000003/blk0000002c/sig00000bf8 ), + .A4(\blk00000003/blk0000002c/sig00000bf8 ), + .D(din_1_1[1]), + .DPRA0(\blk00000003/sig000001d9 ), + .DPRA1(\blk00000003/sig000001db ), + .DPRA2(\blk00000003/sig000001e3 ), + .DPRA3(\blk00000003/blk0000002c/sig00000bf8 ), + .DPRA4(\blk00000003/blk0000002c/sig00000bf8 ), + .WCLK(clk), + .WE(\blk00000003/blk0000002c/sig00000c29 ), + .SPO(\NLW_blk00000003/blk0000002c/blk00000060_SPO_UNCONNECTED ), + .DPO(\blk00000003/blk0000002c/sig00000bfa ) + ); + RAM32X1D #( + .INIT ( 32'h00000000 )) + \blk00000003/blk0000002c/blk0000005f ( + .A0(\blk00000003/sig000001e9 ), + .A1(\blk00000003/sig000001e8 ), + .A2(\blk00000003/sig000001e7 ), + .A3(\blk00000003/blk0000002c/sig00000bf8 ), + .A4(\blk00000003/blk0000002c/sig00000bf8 ), + .D(din_1_1[0]), + .DPRA0(\blk00000003/sig000001d9 ), + .DPRA1(\blk00000003/sig000001db ), + .DPRA2(\blk00000003/sig000001e3 ), + .DPRA3(\blk00000003/blk0000002c/sig00000bf8 ), + .DPRA4(\blk00000003/blk0000002c/sig00000bf8 ), + .WCLK(clk), + .WE(\blk00000003/blk0000002c/sig00000c29 ), + .SPO(\NLW_blk00000003/blk0000002c/blk0000005f_SPO_UNCONNECTED ), + .DPO(\blk00000003/blk0000002c/sig00000bf9 ) + ); + RAM32X1D #( + .INIT ( 32'h00000000 )) + \blk00000003/blk0000002c/blk0000005e ( + .A0(\blk00000003/sig000001e9 ), + .A1(\blk00000003/sig000001e8 ), + .A2(\blk00000003/sig000001e7 ), + .A3(\blk00000003/blk0000002c/sig00000bf8 ), + .A4(\blk00000003/blk0000002c/sig00000bf8 ), + .D(din_1_1[2]), + .DPRA0(\blk00000003/sig000001d9 ), + .DPRA1(\blk00000003/sig000001db ), + .DPRA2(\blk00000003/sig000001e3 ), + .DPRA3(\blk00000003/blk0000002c/sig00000bf8 ), + .DPRA4(\blk00000003/blk0000002c/sig00000bf8 ), + .WCLK(clk), + .WE(\blk00000003/blk0000002c/sig00000c29 ), + .SPO(\NLW_blk00000003/blk0000002c/blk0000005e_SPO_UNCONNECTED ), + .DPO(\blk00000003/blk0000002c/sig00000bfb ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk0000002c/blk0000005d ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk0000002c/sig00000c28 ), + .Q(\blk00000003/sig000001ea ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk0000002c/blk0000005c ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk0000002c/sig00000c27 ), + .Q(\blk00000003/sig000001eb ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk0000002c/blk0000005b ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk0000002c/sig00000c26 ), + .Q(\blk00000003/sig000001ec ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk0000002c/blk0000005a ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk0000002c/sig00000c25 ), + .Q(\blk00000003/sig000001ed ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk0000002c/blk00000059 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk0000002c/sig00000c24 ), + .Q(\blk00000003/sig000001ee ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk0000002c/blk00000058 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk0000002c/sig00000c23 ), + .Q(\blk00000003/sig000001ef ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk0000002c/blk00000057 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk0000002c/sig00000c22 ), + .Q(\blk00000003/sig000001f0 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk0000002c/blk00000056 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk0000002c/sig00000c21 ), + .Q(\blk00000003/sig000001f1 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk0000002c/blk00000055 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk0000002c/sig00000c20 ), + .Q(\blk00000003/sig000001f2 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk0000002c/blk00000054 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk0000002c/sig00000c1f ), + .Q(\blk00000003/sig000001f3 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk0000002c/blk00000053 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk0000002c/sig00000c1e ), + .Q(\blk00000003/sig000001f4 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk0000002c/blk00000052 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk0000002c/sig00000c1d ), + .Q(\blk00000003/sig000001f5 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk0000002c/blk00000051 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk0000002c/sig00000c1c ), + .Q(\blk00000003/sig000001f6 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk0000002c/blk00000050 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk0000002c/sig00000c1b ), + .Q(\blk00000003/sig000001f7 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk0000002c/blk0000004f ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk0000002c/sig00000c1a ), + .Q(\blk00000003/sig000001f8 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk0000002c/blk0000004e ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk0000002c/sig00000c19 ), + .Q(\blk00000003/sig000001f9 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk0000002c/blk0000004d ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk0000002c/sig00000c18 ), + .Q(\blk00000003/sig000001fa ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk0000002c/blk0000004c ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk0000002c/sig00000c17 ), + .Q(\blk00000003/sig000001fb ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk0000002c/blk0000004b ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk0000002c/sig00000c16 ), + .Q(\blk00000003/sig000001fc ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk0000002c/blk0000004a ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk0000002c/sig00000c15 ), + .Q(\blk00000003/sig000001fd ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk0000002c/blk00000049 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk0000002c/sig00000c14 ), + .Q(\blk00000003/sig000001fe ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk0000002c/blk00000048 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk0000002c/sig00000c13 ), + .Q(\blk00000003/sig000001ff ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk0000002c/blk00000047 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk0000002c/sig00000c12 ), + .Q(\blk00000003/sig00000200 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk0000002c/blk00000046 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk0000002c/sig00000c11 ), + .Q(\blk00000003/sig00000201 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk0000002c/blk00000045 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk0000002c/sig00000c10 ), + .Q(\blk00000003/sig00000202 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk0000002c/blk00000044 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk0000002c/sig00000c0f ), + .Q(\blk00000003/sig00000203 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk0000002c/blk00000043 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk0000002c/sig00000c0e ), + .Q(\blk00000003/sig00000204 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk0000002c/blk00000042 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk0000002c/sig00000c0d ), + .Q(\blk00000003/sig00000205 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk0000002c/blk00000041 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk0000002c/sig00000c0c ), + .Q(\blk00000003/sig00000206 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk0000002c/blk00000040 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk0000002c/sig00000c0b ), + .Q(\blk00000003/sig00000207 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk0000002c/blk0000003f ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk0000002c/sig00000c0a ), + .Q(\blk00000003/sig00000208 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk0000002c/blk0000003e ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk0000002c/sig00000c09 ), + .Q(\blk00000003/sig00000209 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk0000002c/blk0000003d ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk0000002c/sig00000c08 ), + .Q(\blk00000003/sig0000020a ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk0000002c/blk0000003c ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk0000002c/sig00000c07 ), + .Q(\blk00000003/sig0000020b ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk0000002c/blk0000003b ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk0000002c/sig00000c06 ), + .Q(\blk00000003/sig0000020c ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk0000002c/blk0000003a ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk0000002c/sig00000c05 ), + .Q(\blk00000003/sig0000020d ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk0000002c/blk00000039 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk0000002c/sig00000c04 ), + .Q(\blk00000003/sig0000020e ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk0000002c/blk00000038 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk0000002c/sig00000c03 ), + .Q(\blk00000003/sig0000020f ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk0000002c/blk00000037 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk0000002c/sig00000c02 ), + .Q(\blk00000003/sig00000210 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk0000002c/blk00000036 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk0000002c/sig00000c01 ), + .Q(\blk00000003/sig00000211 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk0000002c/blk00000035 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk0000002c/sig00000c00 ), + .Q(\blk00000003/sig00000212 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk0000002c/blk00000034 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk0000002c/sig00000bff ), + .Q(\blk00000003/sig00000213 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk0000002c/blk00000033 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk0000002c/sig00000bfe ), + .Q(\blk00000003/sig00000214 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk0000002c/blk00000032 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk0000002c/sig00000bfd ), + .Q(\blk00000003/sig00000215 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk0000002c/blk00000031 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk0000002c/sig00000bfc ), + .Q(\blk00000003/sig00000216 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk0000002c/blk00000030 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk0000002c/sig00000bfb ), + .Q(\blk00000003/sig00000217 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk0000002c/blk0000002f ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk0000002c/sig00000bfa ), + .Q(\blk00000003/sig00000218 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk0000002c/blk0000002e ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk0000002c/sig00000bf9 ), + .Q(\blk00000003/sig00000219 ) + ); + GND \blk00000003/blk0000002c/blk0000002d ( + .G(\blk00000003/blk0000002c/sig00000bf8 ) + ); + LUT2 #( + .INIT ( 4'h8 )) + \blk00000003/blk00000120/blk00000152 ( + .I0(ce), + .I1(\blk00000003/sig00000743 ), + .O(\blk00000003/blk00000120/sig00000c77 ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000120/blk00000151 ( + .A0(\blk00000003/sig00000749 ), + .A1(\blk00000003/blk00000120/sig00000c5e ), + .A2(\blk00000003/blk00000120/sig00000c5e ), + .A3(\blk00000003/blk00000120/sig00000c5e ), + .CE(\blk00000003/blk00000120/sig00000c77 ), + .CLK(clk), + .D(\blk00000003/sig000005b4 ), + .Q(\blk00000003/blk00000120/sig00000c75 ), + .Q15(\NLW_blk00000003/blk00000120/blk00000151_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000120/blk00000150 ( + .A0(\blk00000003/sig00000749 ), + .A1(\blk00000003/blk00000120/sig00000c5e ), + .A2(\blk00000003/blk00000120/sig00000c5e ), + .A3(\blk00000003/blk00000120/sig00000c5e ), + .CE(\blk00000003/blk00000120/sig00000c77 ), + .CLK(clk), + .D(\blk00000003/sig000005b5 ), + .Q(\blk00000003/blk00000120/sig00000c74 ), + .Q15(\NLW_blk00000003/blk00000120/blk00000150_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000120/blk0000014f ( + .A0(\blk00000003/sig00000749 ), + .A1(\blk00000003/blk00000120/sig00000c5e ), + .A2(\blk00000003/blk00000120/sig00000c5e ), + .A3(\blk00000003/blk00000120/sig00000c5e ), + .CE(\blk00000003/blk00000120/sig00000c77 ), + .CLK(clk), + .D(\blk00000003/sig000005b3 ), + .Q(\blk00000003/blk00000120/sig00000c76 ), + .Q15(\NLW_blk00000003/blk00000120/blk0000014f_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000120/blk0000014e ( + .A0(\blk00000003/sig00000749 ), + .A1(\blk00000003/blk00000120/sig00000c5e ), + .A2(\blk00000003/blk00000120/sig00000c5e ), + .A3(\blk00000003/blk00000120/sig00000c5e ), + .CE(\blk00000003/blk00000120/sig00000c77 ), + .CLK(clk), + .D(\blk00000003/sig000005b7 ), + .Q(\blk00000003/blk00000120/sig00000c72 ), + .Q15(\NLW_blk00000003/blk00000120/blk0000014e_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000120/blk0000014d ( + .A0(\blk00000003/sig00000749 ), + .A1(\blk00000003/blk00000120/sig00000c5e ), + .A2(\blk00000003/blk00000120/sig00000c5e ), + .A3(\blk00000003/blk00000120/sig00000c5e ), + .CE(\blk00000003/blk00000120/sig00000c77 ), + .CLK(clk), + .D(\blk00000003/sig000005b8 ), + .Q(\blk00000003/blk00000120/sig00000c71 ), + .Q15(\NLW_blk00000003/blk00000120/blk0000014d_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000120/blk0000014c ( + .A0(\blk00000003/sig00000749 ), + .A1(\blk00000003/blk00000120/sig00000c5e ), + .A2(\blk00000003/blk00000120/sig00000c5e ), + .A3(\blk00000003/blk00000120/sig00000c5e ), + .CE(\blk00000003/blk00000120/sig00000c77 ), + .CLK(clk), + .D(\blk00000003/sig000005b6 ), + .Q(\blk00000003/blk00000120/sig00000c73 ), + .Q15(\NLW_blk00000003/blk00000120/blk0000014c_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000120/blk0000014b ( + .A0(\blk00000003/sig00000749 ), + .A1(\blk00000003/blk00000120/sig00000c5e ), + .A2(\blk00000003/blk00000120/sig00000c5e ), + .A3(\blk00000003/blk00000120/sig00000c5e ), + .CE(\blk00000003/blk00000120/sig00000c77 ), + .CLK(clk), + .D(\blk00000003/sig000005ba ), + .Q(\blk00000003/blk00000120/sig00000c6f ), + .Q15(\NLW_blk00000003/blk00000120/blk0000014b_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000120/blk0000014a ( + .A0(\blk00000003/sig00000749 ), + .A1(\blk00000003/blk00000120/sig00000c5e ), + .A2(\blk00000003/blk00000120/sig00000c5e ), + .A3(\blk00000003/blk00000120/sig00000c5e ), + .CE(\blk00000003/blk00000120/sig00000c77 ), + .CLK(clk), + .D(\blk00000003/sig000005bb ), + .Q(\blk00000003/blk00000120/sig00000c6e ), + .Q15(\NLW_blk00000003/blk00000120/blk0000014a_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000120/blk00000149 ( + .A0(\blk00000003/sig00000749 ), + .A1(\blk00000003/blk00000120/sig00000c5e ), + .A2(\blk00000003/blk00000120/sig00000c5e ), + .A3(\blk00000003/blk00000120/sig00000c5e ), + .CE(\blk00000003/blk00000120/sig00000c77 ), + .CLK(clk), + .D(\blk00000003/sig000005b9 ), + .Q(\blk00000003/blk00000120/sig00000c70 ), + .Q15(\NLW_blk00000003/blk00000120/blk00000149_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000120/blk00000148 ( + .A0(\blk00000003/sig00000749 ), + .A1(\blk00000003/blk00000120/sig00000c5e ), + .A2(\blk00000003/blk00000120/sig00000c5e ), + .A3(\blk00000003/blk00000120/sig00000c5e ), + .CE(\blk00000003/blk00000120/sig00000c77 ), + .CLK(clk), + .D(\blk00000003/sig000005bd ), + .Q(\blk00000003/blk00000120/sig00000c6c ), + .Q15(\NLW_blk00000003/blk00000120/blk00000148_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000120/blk00000147 ( + .A0(\blk00000003/sig00000749 ), + .A1(\blk00000003/blk00000120/sig00000c5e ), + .A2(\blk00000003/blk00000120/sig00000c5e ), + .A3(\blk00000003/blk00000120/sig00000c5e ), + .CE(\blk00000003/blk00000120/sig00000c77 ), + .CLK(clk), + .D(\blk00000003/sig000005be ), + .Q(\blk00000003/blk00000120/sig00000c6b ), + .Q15(\NLW_blk00000003/blk00000120/blk00000147_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000120/blk00000146 ( + .A0(\blk00000003/sig00000749 ), + .A1(\blk00000003/blk00000120/sig00000c5e ), + .A2(\blk00000003/blk00000120/sig00000c5e ), + .A3(\blk00000003/blk00000120/sig00000c5e ), + .CE(\blk00000003/blk00000120/sig00000c77 ), + .CLK(clk), + .D(\blk00000003/sig000005bc ), + .Q(\blk00000003/blk00000120/sig00000c6d ), + .Q15(\NLW_blk00000003/blk00000120/blk00000146_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000120/blk00000145 ( + .A0(\blk00000003/sig00000749 ), + .A1(\blk00000003/blk00000120/sig00000c5e ), + .A2(\blk00000003/blk00000120/sig00000c5e ), + .A3(\blk00000003/blk00000120/sig00000c5e ), + .CE(\blk00000003/blk00000120/sig00000c77 ), + .CLK(clk), + .D(\blk00000003/sig000005c0 ), + .Q(\blk00000003/blk00000120/sig00000c69 ), + .Q15(\NLW_blk00000003/blk00000120/blk00000145_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000120/blk00000144 ( + .A0(\blk00000003/sig00000749 ), + .A1(\blk00000003/blk00000120/sig00000c5e ), + .A2(\blk00000003/blk00000120/sig00000c5e ), + .A3(\blk00000003/blk00000120/sig00000c5e ), + .CE(\blk00000003/blk00000120/sig00000c77 ), + .CLK(clk), + .D(\blk00000003/sig000005c1 ), + .Q(\blk00000003/blk00000120/sig00000c68 ), + .Q15(\NLW_blk00000003/blk00000120/blk00000144_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000120/blk00000143 ( + .A0(\blk00000003/sig00000749 ), + .A1(\blk00000003/blk00000120/sig00000c5e ), + .A2(\blk00000003/blk00000120/sig00000c5e ), + .A3(\blk00000003/blk00000120/sig00000c5e ), + .CE(\blk00000003/blk00000120/sig00000c77 ), + .CLK(clk), + .D(\blk00000003/sig000005bf ), + .Q(\blk00000003/blk00000120/sig00000c6a ), + .Q15(\NLW_blk00000003/blk00000120/blk00000143_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000120/blk00000142 ( + .A0(\blk00000003/sig00000749 ), + .A1(\blk00000003/blk00000120/sig00000c5e ), + .A2(\blk00000003/blk00000120/sig00000c5e ), + .A3(\blk00000003/blk00000120/sig00000c5e ), + .CE(\blk00000003/blk00000120/sig00000c77 ), + .CLK(clk), + .D(\blk00000003/sig000005c3 ), + .Q(\blk00000003/blk00000120/sig00000c66 ), + .Q15(\NLW_blk00000003/blk00000120/blk00000142_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000120/blk00000141 ( + .A0(\blk00000003/sig00000749 ), + .A1(\blk00000003/blk00000120/sig00000c5e ), + .A2(\blk00000003/blk00000120/sig00000c5e ), + .A3(\blk00000003/blk00000120/sig00000c5e ), + .CE(\blk00000003/blk00000120/sig00000c77 ), + .CLK(clk), + .D(\blk00000003/sig000005c4 ), + .Q(\blk00000003/blk00000120/sig00000c65 ), + .Q15(\NLW_blk00000003/blk00000120/blk00000141_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000120/blk00000140 ( + .A0(\blk00000003/sig00000749 ), + .A1(\blk00000003/blk00000120/sig00000c5e ), + .A2(\blk00000003/blk00000120/sig00000c5e ), + .A3(\blk00000003/blk00000120/sig00000c5e ), + .CE(\blk00000003/blk00000120/sig00000c77 ), + .CLK(clk), + .D(\blk00000003/sig000005c2 ), + .Q(\blk00000003/blk00000120/sig00000c67 ), + .Q15(\NLW_blk00000003/blk00000120/blk00000140_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000120/blk0000013f ( + .A0(\blk00000003/sig00000749 ), + .A1(\blk00000003/blk00000120/sig00000c5e ), + .A2(\blk00000003/blk00000120/sig00000c5e ), + .A3(\blk00000003/blk00000120/sig00000c5e ), + .CE(\blk00000003/blk00000120/sig00000c77 ), + .CLK(clk), + .D(\blk00000003/sig000005c6 ), + .Q(\blk00000003/blk00000120/sig00000c63 ), + .Q15(\NLW_blk00000003/blk00000120/blk0000013f_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000120/blk0000013e ( + .A0(\blk00000003/sig00000749 ), + .A1(\blk00000003/blk00000120/sig00000c5e ), + .A2(\blk00000003/blk00000120/sig00000c5e ), + .A3(\blk00000003/blk00000120/sig00000c5e ), + .CE(\blk00000003/blk00000120/sig00000c77 ), + .CLK(clk), + .D(\blk00000003/sig000005c7 ), + .Q(\blk00000003/blk00000120/sig00000c62 ), + .Q15(\NLW_blk00000003/blk00000120/blk0000013e_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000120/blk0000013d ( + .A0(\blk00000003/sig00000749 ), + .A1(\blk00000003/blk00000120/sig00000c5e ), + .A2(\blk00000003/blk00000120/sig00000c5e ), + .A3(\blk00000003/blk00000120/sig00000c5e ), + .CE(\blk00000003/blk00000120/sig00000c77 ), + .CLK(clk), + .D(\blk00000003/sig000005c5 ), + .Q(\blk00000003/blk00000120/sig00000c64 ), + .Q15(\NLW_blk00000003/blk00000120/blk0000013d_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000120/blk0000013c ( + .A0(\blk00000003/sig00000749 ), + .A1(\blk00000003/blk00000120/sig00000c5e ), + .A2(\blk00000003/blk00000120/sig00000c5e ), + .A3(\blk00000003/blk00000120/sig00000c5e ), + .CE(\blk00000003/blk00000120/sig00000c77 ), + .CLK(clk), + .D(\blk00000003/sig000005c9 ), + .Q(\blk00000003/blk00000120/sig00000c60 ), + .Q15(\NLW_blk00000003/blk00000120/blk0000013c_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000120/blk0000013b ( + .A0(\blk00000003/sig00000749 ), + .A1(\blk00000003/blk00000120/sig00000c5e ), + .A2(\blk00000003/blk00000120/sig00000c5e ), + .A3(\blk00000003/blk00000120/sig00000c5e ), + .CE(\blk00000003/blk00000120/sig00000c77 ), + .CLK(clk), + .D(\blk00000003/sig000005ca ), + .Q(\blk00000003/blk00000120/sig00000c5f ), + .Q15(\NLW_blk00000003/blk00000120/blk0000013b_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000120/blk0000013a ( + .A0(\blk00000003/sig00000749 ), + .A1(\blk00000003/blk00000120/sig00000c5e ), + .A2(\blk00000003/blk00000120/sig00000c5e ), + .A3(\blk00000003/blk00000120/sig00000c5e ), + .CE(\blk00000003/blk00000120/sig00000c77 ), + .CLK(clk), + .D(\blk00000003/sig000005c8 ), + .Q(\blk00000003/blk00000120/sig00000c61 ), + .Q15(\NLW_blk00000003/blk00000120/blk0000013a_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000120/blk00000139 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk00000120/sig00000c76 ), + .Q(\blk00000003/sig000003bb ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000120/blk00000138 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk00000120/sig00000c75 ), + .Q(\blk00000003/sig000003bc ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000120/blk00000137 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk00000120/sig00000c74 ), + .Q(\blk00000003/sig000003bd ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000120/blk00000136 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk00000120/sig00000c73 ), + .Q(\blk00000003/sig000003be ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000120/blk00000135 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk00000120/sig00000c72 ), + .Q(\blk00000003/sig000003bf ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000120/blk00000134 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk00000120/sig00000c71 ), + .Q(\blk00000003/sig000003c0 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000120/blk00000133 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk00000120/sig00000c70 ), + .Q(\blk00000003/sig000003c1 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000120/blk00000132 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk00000120/sig00000c6f ), + .Q(\blk00000003/sig000003c2 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000120/blk00000131 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk00000120/sig00000c6e ), + .Q(\blk00000003/sig000003c3 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000120/blk00000130 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk00000120/sig00000c6d ), + .Q(\blk00000003/sig000003c4 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000120/blk0000012f ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk00000120/sig00000c6c ), + .Q(\blk00000003/sig000003c5 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000120/blk0000012e ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk00000120/sig00000c6b ), + .Q(\blk00000003/sig000003c6 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000120/blk0000012d ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk00000120/sig00000c6a ), + .Q(\blk00000003/sig000003c7 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000120/blk0000012c ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk00000120/sig00000c69 ), + .Q(\blk00000003/sig000003c8 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000120/blk0000012b ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk00000120/sig00000c68 ), + .Q(\blk00000003/sig000003c9 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000120/blk0000012a ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk00000120/sig00000c67 ), + .Q(\blk00000003/sig000003ca ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000120/blk00000129 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk00000120/sig00000c66 ), + .Q(\blk00000003/sig000003cb ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000120/blk00000128 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk00000120/sig00000c65 ), + .Q(\blk00000003/sig000003cc ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000120/blk00000127 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk00000120/sig00000c64 ), + .Q(\blk00000003/sig000003cd ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000120/blk00000126 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk00000120/sig00000c63 ), + .Q(\blk00000003/sig000003ce ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000120/blk00000125 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk00000120/sig00000c62 ), + .Q(\blk00000003/sig000003cf ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000120/blk00000124 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk00000120/sig00000c61 ), + .Q(\blk00000003/sig000003d0 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000120/blk00000123 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk00000120/sig00000c60 ), + .Q(\blk00000003/sig000003d1 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000120/blk00000122 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk00000120/sig00000c5f ), + .Q(\blk00000003/sig000003d2 ) + ); + GND \blk00000003/blk00000120/blk00000121 ( + .G(\blk00000003/blk00000120/sig00000c5e ) + ); + LUT2 #( + .INIT ( 4'h8 )) + \blk00000003/blk00000153/blk00000185 ( + .I0(ce), + .I1(\blk00000003/sig00000745 ), + .O(\blk00000003/blk00000153/sig00000cc5 ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000153/blk00000184 ( + .A0(\blk00000003/sig00000747 ), + .A1(\blk00000003/blk00000153/sig00000cac ), + .A2(\blk00000003/blk00000153/sig00000cac ), + .A3(\blk00000003/blk00000153/sig00000cac ), + .CE(\blk00000003/blk00000153/sig00000cc5 ), + .CLK(clk), + .D(\blk00000003/sig00000763 ), + .Q(\blk00000003/blk00000153/sig00000cc3 ), + .Q15(\NLW_blk00000003/blk00000153/blk00000184_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000153/blk00000183 ( + .A0(\blk00000003/sig00000747 ), + .A1(\blk00000003/blk00000153/sig00000cac ), + .A2(\blk00000003/blk00000153/sig00000cac ), + .A3(\blk00000003/blk00000153/sig00000cac ), + .CE(\blk00000003/blk00000153/sig00000cc5 ), + .CLK(clk), + .D(\blk00000003/sig00000764 ), + .Q(\blk00000003/blk00000153/sig00000cc2 ), + .Q15(\NLW_blk00000003/blk00000153/blk00000183_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000153/blk00000182 ( + .A0(\blk00000003/sig00000747 ), + .A1(\blk00000003/blk00000153/sig00000cac ), + .A2(\blk00000003/blk00000153/sig00000cac ), + .A3(\blk00000003/blk00000153/sig00000cac ), + .CE(\blk00000003/blk00000153/sig00000cc5 ), + .CLK(clk), + .D(\blk00000003/sig00000762 ), + .Q(\blk00000003/blk00000153/sig00000cc4 ), + .Q15(\NLW_blk00000003/blk00000153/blk00000182_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000153/blk00000181 ( + .A0(\blk00000003/sig00000747 ), + .A1(\blk00000003/blk00000153/sig00000cac ), + .A2(\blk00000003/blk00000153/sig00000cac ), + .A3(\blk00000003/blk00000153/sig00000cac ), + .CE(\blk00000003/blk00000153/sig00000cc5 ), + .CLK(clk), + .D(\blk00000003/sig00000766 ), + .Q(\blk00000003/blk00000153/sig00000cc0 ), + .Q15(\NLW_blk00000003/blk00000153/blk00000181_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000153/blk00000180 ( + .A0(\blk00000003/sig00000747 ), + .A1(\blk00000003/blk00000153/sig00000cac ), + .A2(\blk00000003/blk00000153/sig00000cac ), + .A3(\blk00000003/blk00000153/sig00000cac ), + .CE(\blk00000003/blk00000153/sig00000cc5 ), + .CLK(clk), + .D(\blk00000003/sig00000767 ), + .Q(\blk00000003/blk00000153/sig00000cbf ), + .Q15(\NLW_blk00000003/blk00000153/blk00000180_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000153/blk0000017f ( + .A0(\blk00000003/sig00000747 ), + .A1(\blk00000003/blk00000153/sig00000cac ), + .A2(\blk00000003/blk00000153/sig00000cac ), + .A3(\blk00000003/blk00000153/sig00000cac ), + .CE(\blk00000003/blk00000153/sig00000cc5 ), + .CLK(clk), + .D(\blk00000003/sig00000765 ), + .Q(\blk00000003/blk00000153/sig00000cc1 ), + .Q15(\NLW_blk00000003/blk00000153/blk0000017f_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000153/blk0000017e ( + .A0(\blk00000003/sig00000747 ), + .A1(\blk00000003/blk00000153/sig00000cac ), + .A2(\blk00000003/blk00000153/sig00000cac ), + .A3(\blk00000003/blk00000153/sig00000cac ), + .CE(\blk00000003/blk00000153/sig00000cc5 ), + .CLK(clk), + .D(\blk00000003/sig00000769 ), + .Q(\blk00000003/blk00000153/sig00000cbd ), + .Q15(\NLW_blk00000003/blk00000153/blk0000017e_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000153/blk0000017d ( + .A0(\blk00000003/sig00000747 ), + .A1(\blk00000003/blk00000153/sig00000cac ), + .A2(\blk00000003/blk00000153/sig00000cac ), + .A3(\blk00000003/blk00000153/sig00000cac ), + .CE(\blk00000003/blk00000153/sig00000cc5 ), + .CLK(clk), + .D(\blk00000003/sig0000076a ), + .Q(\blk00000003/blk00000153/sig00000cbc ), + .Q15(\NLW_blk00000003/blk00000153/blk0000017d_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000153/blk0000017c ( + .A0(\blk00000003/sig00000747 ), + .A1(\blk00000003/blk00000153/sig00000cac ), + .A2(\blk00000003/blk00000153/sig00000cac ), + .A3(\blk00000003/blk00000153/sig00000cac ), + .CE(\blk00000003/blk00000153/sig00000cc5 ), + .CLK(clk), + .D(\blk00000003/sig00000768 ), + .Q(\blk00000003/blk00000153/sig00000cbe ), + .Q15(\NLW_blk00000003/blk00000153/blk0000017c_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000153/blk0000017b ( + .A0(\blk00000003/sig00000747 ), + .A1(\blk00000003/blk00000153/sig00000cac ), + .A2(\blk00000003/blk00000153/sig00000cac ), + .A3(\blk00000003/blk00000153/sig00000cac ), + .CE(\blk00000003/blk00000153/sig00000cc5 ), + .CLK(clk), + .D(\blk00000003/sig0000076c ), + .Q(\blk00000003/blk00000153/sig00000cba ), + .Q15(\NLW_blk00000003/blk00000153/blk0000017b_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000153/blk0000017a ( + .A0(\blk00000003/sig00000747 ), + .A1(\blk00000003/blk00000153/sig00000cac ), + .A2(\blk00000003/blk00000153/sig00000cac ), + .A3(\blk00000003/blk00000153/sig00000cac ), + .CE(\blk00000003/blk00000153/sig00000cc5 ), + .CLK(clk), + .D(\blk00000003/sig0000076d ), + .Q(\blk00000003/blk00000153/sig00000cb9 ), + .Q15(\NLW_blk00000003/blk00000153/blk0000017a_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000153/blk00000179 ( + .A0(\blk00000003/sig00000747 ), + .A1(\blk00000003/blk00000153/sig00000cac ), + .A2(\blk00000003/blk00000153/sig00000cac ), + .A3(\blk00000003/blk00000153/sig00000cac ), + .CE(\blk00000003/blk00000153/sig00000cc5 ), + .CLK(clk), + .D(\blk00000003/sig0000076b ), + .Q(\blk00000003/blk00000153/sig00000cbb ), + .Q15(\NLW_blk00000003/blk00000153/blk00000179_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000153/blk00000178 ( + .A0(\blk00000003/sig00000747 ), + .A1(\blk00000003/blk00000153/sig00000cac ), + .A2(\blk00000003/blk00000153/sig00000cac ), + .A3(\blk00000003/blk00000153/sig00000cac ), + .CE(\blk00000003/blk00000153/sig00000cc5 ), + .CLK(clk), + .D(\blk00000003/sig0000076f ), + .Q(\blk00000003/blk00000153/sig00000cb7 ), + .Q15(\NLW_blk00000003/blk00000153/blk00000178_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000153/blk00000177 ( + .A0(\blk00000003/sig00000747 ), + .A1(\blk00000003/blk00000153/sig00000cac ), + .A2(\blk00000003/blk00000153/sig00000cac ), + .A3(\blk00000003/blk00000153/sig00000cac ), + .CE(\blk00000003/blk00000153/sig00000cc5 ), + .CLK(clk), + .D(\blk00000003/sig00000770 ), + .Q(\blk00000003/blk00000153/sig00000cb6 ), + .Q15(\NLW_blk00000003/blk00000153/blk00000177_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000153/blk00000176 ( + .A0(\blk00000003/sig00000747 ), + .A1(\blk00000003/blk00000153/sig00000cac ), + .A2(\blk00000003/blk00000153/sig00000cac ), + .A3(\blk00000003/blk00000153/sig00000cac ), + .CE(\blk00000003/blk00000153/sig00000cc5 ), + .CLK(clk), + .D(\blk00000003/sig0000076e ), + .Q(\blk00000003/blk00000153/sig00000cb8 ), + .Q15(\NLW_blk00000003/blk00000153/blk00000176_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000153/blk00000175 ( + .A0(\blk00000003/sig00000747 ), + .A1(\blk00000003/blk00000153/sig00000cac ), + .A2(\blk00000003/blk00000153/sig00000cac ), + .A3(\blk00000003/blk00000153/sig00000cac ), + .CE(\blk00000003/blk00000153/sig00000cc5 ), + .CLK(clk), + .D(\blk00000003/sig00000772 ), + .Q(\blk00000003/blk00000153/sig00000cb4 ), + .Q15(\NLW_blk00000003/blk00000153/blk00000175_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000153/blk00000174 ( + .A0(\blk00000003/sig00000747 ), + .A1(\blk00000003/blk00000153/sig00000cac ), + .A2(\blk00000003/blk00000153/sig00000cac ), + .A3(\blk00000003/blk00000153/sig00000cac ), + .CE(\blk00000003/blk00000153/sig00000cc5 ), + .CLK(clk), + .D(\blk00000003/sig00000773 ), + .Q(\blk00000003/blk00000153/sig00000cb3 ), + .Q15(\NLW_blk00000003/blk00000153/blk00000174_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000153/blk00000173 ( + .A0(\blk00000003/sig00000747 ), + .A1(\blk00000003/blk00000153/sig00000cac ), + .A2(\blk00000003/blk00000153/sig00000cac ), + .A3(\blk00000003/blk00000153/sig00000cac ), + .CE(\blk00000003/blk00000153/sig00000cc5 ), + .CLK(clk), + .D(\blk00000003/sig00000771 ), + .Q(\blk00000003/blk00000153/sig00000cb5 ), + .Q15(\NLW_blk00000003/blk00000153/blk00000173_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000153/blk00000172 ( + .A0(\blk00000003/sig00000747 ), + .A1(\blk00000003/blk00000153/sig00000cac ), + .A2(\blk00000003/blk00000153/sig00000cac ), + .A3(\blk00000003/blk00000153/sig00000cac ), + .CE(\blk00000003/blk00000153/sig00000cc5 ), + .CLK(clk), + .D(\blk00000003/sig00000775 ), + .Q(\blk00000003/blk00000153/sig00000cb1 ), + .Q15(\NLW_blk00000003/blk00000153/blk00000172_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000153/blk00000171 ( + .A0(\blk00000003/sig00000747 ), + .A1(\blk00000003/blk00000153/sig00000cac ), + .A2(\blk00000003/blk00000153/sig00000cac ), + .A3(\blk00000003/blk00000153/sig00000cac ), + .CE(\blk00000003/blk00000153/sig00000cc5 ), + .CLK(clk), + .D(\blk00000003/sig00000776 ), + .Q(\blk00000003/blk00000153/sig00000cb0 ), + .Q15(\NLW_blk00000003/blk00000153/blk00000171_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000153/blk00000170 ( + .A0(\blk00000003/sig00000747 ), + .A1(\blk00000003/blk00000153/sig00000cac ), + .A2(\blk00000003/blk00000153/sig00000cac ), + .A3(\blk00000003/blk00000153/sig00000cac ), + .CE(\blk00000003/blk00000153/sig00000cc5 ), + .CLK(clk), + .D(\blk00000003/sig00000774 ), + .Q(\blk00000003/blk00000153/sig00000cb2 ), + .Q15(\NLW_blk00000003/blk00000153/blk00000170_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000153/blk0000016f ( + .A0(\blk00000003/sig00000747 ), + .A1(\blk00000003/blk00000153/sig00000cac ), + .A2(\blk00000003/blk00000153/sig00000cac ), + .A3(\blk00000003/blk00000153/sig00000cac ), + .CE(\blk00000003/blk00000153/sig00000cc5 ), + .CLK(clk), + .D(\blk00000003/sig00000778 ), + .Q(\blk00000003/blk00000153/sig00000cae ), + .Q15(\NLW_blk00000003/blk00000153/blk0000016f_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000153/blk0000016e ( + .A0(\blk00000003/sig00000747 ), + .A1(\blk00000003/blk00000153/sig00000cac ), + .A2(\blk00000003/blk00000153/sig00000cac ), + .A3(\blk00000003/blk00000153/sig00000cac ), + .CE(\blk00000003/blk00000153/sig00000cc5 ), + .CLK(clk), + .D(\blk00000003/sig00000779 ), + .Q(\blk00000003/blk00000153/sig00000cad ), + .Q15(\NLW_blk00000003/blk00000153/blk0000016e_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000153/blk0000016d ( + .A0(\blk00000003/sig00000747 ), + .A1(\blk00000003/blk00000153/sig00000cac ), + .A2(\blk00000003/blk00000153/sig00000cac ), + .A3(\blk00000003/blk00000153/sig00000cac ), + .CE(\blk00000003/blk00000153/sig00000cc5 ), + .CLK(clk), + .D(\blk00000003/sig00000777 ), + .Q(\blk00000003/blk00000153/sig00000caf ), + .Q15(\NLW_blk00000003/blk00000153/blk0000016d_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000153/blk0000016c ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk00000153/sig00000cc4 ), + .Q(\blk00000003/sig000003d3 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000153/blk0000016b ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk00000153/sig00000cc3 ), + .Q(\blk00000003/sig000003d4 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000153/blk0000016a ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk00000153/sig00000cc2 ), + .Q(\blk00000003/sig000003d5 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000153/blk00000169 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk00000153/sig00000cc1 ), + .Q(\blk00000003/sig000003d6 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000153/blk00000168 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk00000153/sig00000cc0 ), + .Q(\blk00000003/sig000003d7 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000153/blk00000167 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk00000153/sig00000cbf ), + .Q(\blk00000003/sig000003d8 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000153/blk00000166 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk00000153/sig00000cbe ), + .Q(\blk00000003/sig000003d9 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000153/blk00000165 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk00000153/sig00000cbd ), + .Q(\blk00000003/sig000003da ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000153/blk00000164 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk00000153/sig00000cbc ), + .Q(\blk00000003/sig000003db ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000153/blk00000163 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk00000153/sig00000cbb ), + .Q(\blk00000003/sig000003dc ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000153/blk00000162 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk00000153/sig00000cba ), + .Q(\blk00000003/sig000003dd ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000153/blk00000161 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk00000153/sig00000cb9 ), + .Q(\blk00000003/sig000003de ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000153/blk00000160 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk00000153/sig00000cb8 ), + .Q(\blk00000003/sig000003df ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000153/blk0000015f ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk00000153/sig00000cb7 ), + .Q(\blk00000003/sig000003e0 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000153/blk0000015e ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk00000153/sig00000cb6 ), + .Q(\blk00000003/sig000003e1 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000153/blk0000015d ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk00000153/sig00000cb5 ), + .Q(\blk00000003/sig000003e2 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000153/blk0000015c ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk00000153/sig00000cb4 ), + .Q(\blk00000003/sig000003e3 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000153/blk0000015b ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk00000153/sig00000cb3 ), + .Q(\blk00000003/sig000003e4 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000153/blk0000015a ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk00000153/sig00000cb2 ), + .Q(\blk00000003/sig000003e5 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000153/blk00000159 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk00000153/sig00000cb1 ), + .Q(\blk00000003/sig000003e6 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000153/blk00000158 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk00000153/sig00000cb0 ), + .Q(\blk00000003/sig000003e7 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000153/blk00000157 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk00000153/sig00000caf ), + .Q(\blk00000003/sig000003e8 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000153/blk00000156 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk00000153/sig00000cae ), + .Q(\blk00000003/sig000003e9 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000153/blk00000155 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk00000153/sig00000cad ), + .Q(\blk00000003/sig000003ea ) + ); + GND \blk00000003/blk00000153/blk00000154 ( + .G(\blk00000003/blk00000153/sig00000cac ) + ); + LUT2 #( + .INIT ( 4'h8 )) + \blk00000003/blk00000186/blk000001b8 ( + .I0(ce), + .I1(\blk00000003/sig00000743 ), + .O(\blk00000003/blk00000186/sig00000d13 ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000186/blk000001b7 ( + .A0(\blk00000003/sig00000749 ), + .A1(\blk00000003/blk00000186/sig00000cfa ), + .A2(\blk00000003/blk00000186/sig00000cfa ), + .A3(\blk00000003/blk00000186/sig00000cfa ), + .CE(\blk00000003/blk00000186/sig00000d13 ), + .CLK(clk), + .D(\blk00000003/sig00000704 ), + .Q(\blk00000003/blk00000186/sig00000d11 ), + .Q15(\NLW_blk00000003/blk00000186/blk000001b7_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000186/blk000001b6 ( + .A0(\blk00000003/sig00000749 ), + .A1(\blk00000003/blk00000186/sig00000cfa ), + .A2(\blk00000003/blk00000186/sig00000cfa ), + .A3(\blk00000003/blk00000186/sig00000cfa ), + .CE(\blk00000003/blk00000186/sig00000d13 ), + .CLK(clk), + .D(\blk00000003/sig00000705 ), + .Q(\blk00000003/blk00000186/sig00000d10 ), + .Q15(\NLW_blk00000003/blk00000186/blk000001b6_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000186/blk000001b5 ( + .A0(\blk00000003/sig00000749 ), + .A1(\blk00000003/blk00000186/sig00000cfa ), + .A2(\blk00000003/blk00000186/sig00000cfa ), + .A3(\blk00000003/blk00000186/sig00000cfa ), + .CE(\blk00000003/blk00000186/sig00000d13 ), + .CLK(clk), + .D(\blk00000003/sig00000703 ), + .Q(\blk00000003/blk00000186/sig00000d12 ), + .Q15(\NLW_blk00000003/blk00000186/blk000001b5_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000186/blk000001b4 ( + .A0(\blk00000003/sig00000749 ), + .A1(\blk00000003/blk00000186/sig00000cfa ), + .A2(\blk00000003/blk00000186/sig00000cfa ), + .A3(\blk00000003/blk00000186/sig00000cfa ), + .CE(\blk00000003/blk00000186/sig00000d13 ), + .CLK(clk), + .D(\blk00000003/sig00000707 ), + .Q(\blk00000003/blk00000186/sig00000d0e ), + .Q15(\NLW_blk00000003/blk00000186/blk000001b4_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000186/blk000001b3 ( + .A0(\blk00000003/sig00000749 ), + .A1(\blk00000003/blk00000186/sig00000cfa ), + .A2(\blk00000003/blk00000186/sig00000cfa ), + .A3(\blk00000003/blk00000186/sig00000cfa ), + .CE(\blk00000003/blk00000186/sig00000d13 ), + .CLK(clk), + .D(\blk00000003/sig00000708 ), + .Q(\blk00000003/blk00000186/sig00000d0d ), + .Q15(\NLW_blk00000003/blk00000186/blk000001b3_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000186/blk000001b2 ( + .A0(\blk00000003/sig00000749 ), + .A1(\blk00000003/blk00000186/sig00000cfa ), + .A2(\blk00000003/blk00000186/sig00000cfa ), + .A3(\blk00000003/blk00000186/sig00000cfa ), + .CE(\blk00000003/blk00000186/sig00000d13 ), + .CLK(clk), + .D(\blk00000003/sig00000706 ), + .Q(\blk00000003/blk00000186/sig00000d0f ), + .Q15(\NLW_blk00000003/blk00000186/blk000001b2_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000186/blk000001b1 ( + .A0(\blk00000003/sig00000749 ), + .A1(\blk00000003/blk00000186/sig00000cfa ), + .A2(\blk00000003/blk00000186/sig00000cfa ), + .A3(\blk00000003/blk00000186/sig00000cfa ), + .CE(\blk00000003/blk00000186/sig00000d13 ), + .CLK(clk), + .D(\blk00000003/sig0000070a ), + .Q(\blk00000003/blk00000186/sig00000d0b ), + .Q15(\NLW_blk00000003/blk00000186/blk000001b1_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000186/blk000001b0 ( + .A0(\blk00000003/sig00000749 ), + .A1(\blk00000003/blk00000186/sig00000cfa ), + .A2(\blk00000003/blk00000186/sig00000cfa ), + .A3(\blk00000003/blk00000186/sig00000cfa ), + .CE(\blk00000003/blk00000186/sig00000d13 ), + .CLK(clk), + .D(\blk00000003/sig0000070b ), + .Q(\blk00000003/blk00000186/sig00000d0a ), + .Q15(\NLW_blk00000003/blk00000186/blk000001b0_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000186/blk000001af ( + .A0(\blk00000003/sig00000749 ), + .A1(\blk00000003/blk00000186/sig00000cfa ), + .A2(\blk00000003/blk00000186/sig00000cfa ), + .A3(\blk00000003/blk00000186/sig00000cfa ), + .CE(\blk00000003/blk00000186/sig00000d13 ), + .CLK(clk), + .D(\blk00000003/sig00000709 ), + .Q(\blk00000003/blk00000186/sig00000d0c ), + .Q15(\NLW_blk00000003/blk00000186/blk000001af_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000186/blk000001ae ( + .A0(\blk00000003/sig00000749 ), + .A1(\blk00000003/blk00000186/sig00000cfa ), + .A2(\blk00000003/blk00000186/sig00000cfa ), + .A3(\blk00000003/blk00000186/sig00000cfa ), + .CE(\blk00000003/blk00000186/sig00000d13 ), + .CLK(clk), + .D(\blk00000003/sig0000070d ), + .Q(\blk00000003/blk00000186/sig00000d08 ), + .Q15(\NLW_blk00000003/blk00000186/blk000001ae_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000186/blk000001ad ( + .A0(\blk00000003/sig00000749 ), + .A1(\blk00000003/blk00000186/sig00000cfa ), + .A2(\blk00000003/blk00000186/sig00000cfa ), + .A3(\blk00000003/blk00000186/sig00000cfa ), + .CE(\blk00000003/blk00000186/sig00000d13 ), + .CLK(clk), + .D(\blk00000003/sig0000070e ), + .Q(\blk00000003/blk00000186/sig00000d07 ), + .Q15(\NLW_blk00000003/blk00000186/blk000001ad_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000186/blk000001ac ( + .A0(\blk00000003/sig00000749 ), + .A1(\blk00000003/blk00000186/sig00000cfa ), + .A2(\blk00000003/blk00000186/sig00000cfa ), + .A3(\blk00000003/blk00000186/sig00000cfa ), + .CE(\blk00000003/blk00000186/sig00000d13 ), + .CLK(clk), + .D(\blk00000003/sig0000070c ), + .Q(\blk00000003/blk00000186/sig00000d09 ), + .Q15(\NLW_blk00000003/blk00000186/blk000001ac_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000186/blk000001ab ( + .A0(\blk00000003/sig00000749 ), + .A1(\blk00000003/blk00000186/sig00000cfa ), + .A2(\blk00000003/blk00000186/sig00000cfa ), + .A3(\blk00000003/blk00000186/sig00000cfa ), + .CE(\blk00000003/blk00000186/sig00000d13 ), + .CLK(clk), + .D(\blk00000003/sig00000710 ), + .Q(\blk00000003/blk00000186/sig00000d05 ), + .Q15(\NLW_blk00000003/blk00000186/blk000001ab_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000186/blk000001aa ( + .A0(\blk00000003/sig00000749 ), + .A1(\blk00000003/blk00000186/sig00000cfa ), + .A2(\blk00000003/blk00000186/sig00000cfa ), + .A3(\blk00000003/blk00000186/sig00000cfa ), + .CE(\blk00000003/blk00000186/sig00000d13 ), + .CLK(clk), + .D(\blk00000003/sig00000711 ), + .Q(\blk00000003/blk00000186/sig00000d04 ), + .Q15(\NLW_blk00000003/blk00000186/blk000001aa_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000186/blk000001a9 ( + .A0(\blk00000003/sig00000749 ), + .A1(\blk00000003/blk00000186/sig00000cfa ), + .A2(\blk00000003/blk00000186/sig00000cfa ), + .A3(\blk00000003/blk00000186/sig00000cfa ), + .CE(\blk00000003/blk00000186/sig00000d13 ), + .CLK(clk), + .D(\blk00000003/sig0000070f ), + .Q(\blk00000003/blk00000186/sig00000d06 ), + .Q15(\NLW_blk00000003/blk00000186/blk000001a9_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000186/blk000001a8 ( + .A0(\blk00000003/sig00000749 ), + .A1(\blk00000003/blk00000186/sig00000cfa ), + .A2(\blk00000003/blk00000186/sig00000cfa ), + .A3(\blk00000003/blk00000186/sig00000cfa ), + .CE(\blk00000003/blk00000186/sig00000d13 ), + .CLK(clk), + .D(\blk00000003/sig00000713 ), + .Q(\blk00000003/blk00000186/sig00000d02 ), + .Q15(\NLW_blk00000003/blk00000186/blk000001a8_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000186/blk000001a7 ( + .A0(\blk00000003/sig00000749 ), + .A1(\blk00000003/blk00000186/sig00000cfa ), + .A2(\blk00000003/blk00000186/sig00000cfa ), + .A3(\blk00000003/blk00000186/sig00000cfa ), + .CE(\blk00000003/blk00000186/sig00000d13 ), + .CLK(clk), + .D(\blk00000003/sig00000714 ), + .Q(\blk00000003/blk00000186/sig00000d01 ), + .Q15(\NLW_blk00000003/blk00000186/blk000001a7_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000186/blk000001a6 ( + .A0(\blk00000003/sig00000749 ), + .A1(\blk00000003/blk00000186/sig00000cfa ), + .A2(\blk00000003/blk00000186/sig00000cfa ), + .A3(\blk00000003/blk00000186/sig00000cfa ), + .CE(\blk00000003/blk00000186/sig00000d13 ), + .CLK(clk), + .D(\blk00000003/sig00000712 ), + .Q(\blk00000003/blk00000186/sig00000d03 ), + .Q15(\NLW_blk00000003/blk00000186/blk000001a6_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000186/blk000001a5 ( + .A0(\blk00000003/sig00000749 ), + .A1(\blk00000003/blk00000186/sig00000cfa ), + .A2(\blk00000003/blk00000186/sig00000cfa ), + .A3(\blk00000003/blk00000186/sig00000cfa ), + .CE(\blk00000003/blk00000186/sig00000d13 ), + .CLK(clk), + .D(\blk00000003/sig00000716 ), + .Q(\blk00000003/blk00000186/sig00000cff ), + .Q15(\NLW_blk00000003/blk00000186/blk000001a5_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000186/blk000001a4 ( + .A0(\blk00000003/sig00000749 ), + .A1(\blk00000003/blk00000186/sig00000cfa ), + .A2(\blk00000003/blk00000186/sig00000cfa ), + .A3(\blk00000003/blk00000186/sig00000cfa ), + .CE(\blk00000003/blk00000186/sig00000d13 ), + .CLK(clk), + .D(\blk00000003/sig00000717 ), + .Q(\blk00000003/blk00000186/sig00000cfe ), + .Q15(\NLW_blk00000003/blk00000186/blk000001a4_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000186/blk000001a3 ( + .A0(\blk00000003/sig00000749 ), + .A1(\blk00000003/blk00000186/sig00000cfa ), + .A2(\blk00000003/blk00000186/sig00000cfa ), + .A3(\blk00000003/blk00000186/sig00000cfa ), + .CE(\blk00000003/blk00000186/sig00000d13 ), + .CLK(clk), + .D(\blk00000003/sig00000715 ), + .Q(\blk00000003/blk00000186/sig00000d00 ), + .Q15(\NLW_blk00000003/blk00000186/blk000001a3_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000186/blk000001a2 ( + .A0(\blk00000003/sig00000749 ), + .A1(\blk00000003/blk00000186/sig00000cfa ), + .A2(\blk00000003/blk00000186/sig00000cfa ), + .A3(\blk00000003/blk00000186/sig00000cfa ), + .CE(\blk00000003/blk00000186/sig00000d13 ), + .CLK(clk), + .D(\blk00000003/sig00000719 ), + .Q(\blk00000003/blk00000186/sig00000cfc ), + .Q15(\NLW_blk00000003/blk00000186/blk000001a2_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000186/blk000001a1 ( + .A0(\blk00000003/sig00000749 ), + .A1(\blk00000003/blk00000186/sig00000cfa ), + .A2(\blk00000003/blk00000186/sig00000cfa ), + .A3(\blk00000003/blk00000186/sig00000cfa ), + .CE(\blk00000003/blk00000186/sig00000d13 ), + .CLK(clk), + .D(\blk00000003/sig0000071a ), + .Q(\blk00000003/blk00000186/sig00000cfb ), + .Q15(\NLW_blk00000003/blk00000186/blk000001a1_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000186/blk000001a0 ( + .A0(\blk00000003/sig00000749 ), + .A1(\blk00000003/blk00000186/sig00000cfa ), + .A2(\blk00000003/blk00000186/sig00000cfa ), + .A3(\blk00000003/blk00000186/sig00000cfa ), + .CE(\blk00000003/blk00000186/sig00000d13 ), + .CLK(clk), + .D(\blk00000003/sig00000718 ), + .Q(\blk00000003/blk00000186/sig00000cfd ), + .Q15(\NLW_blk00000003/blk00000186/blk000001a0_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000186/blk0000019f ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk00000186/sig00000d12 ), + .Q(\blk00000003/sig0000041b ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000186/blk0000019e ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk00000186/sig00000d11 ), + .Q(\blk00000003/sig0000041c ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000186/blk0000019d ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk00000186/sig00000d10 ), + .Q(\blk00000003/sig0000041d ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000186/blk0000019c ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk00000186/sig00000d0f ), + .Q(\blk00000003/sig0000041e ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000186/blk0000019b ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk00000186/sig00000d0e ), + .Q(\blk00000003/sig0000041f ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000186/blk0000019a ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk00000186/sig00000d0d ), + .Q(\blk00000003/sig00000420 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000186/blk00000199 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk00000186/sig00000d0c ), + .Q(\blk00000003/sig00000421 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000186/blk00000198 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk00000186/sig00000d0b ), + .Q(\blk00000003/sig00000422 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000186/blk00000197 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk00000186/sig00000d0a ), + .Q(\blk00000003/sig00000423 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000186/blk00000196 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk00000186/sig00000d09 ), + .Q(\blk00000003/sig00000424 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000186/blk00000195 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk00000186/sig00000d08 ), + .Q(\blk00000003/sig00000425 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000186/blk00000194 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk00000186/sig00000d07 ), + .Q(\blk00000003/sig00000426 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000186/blk00000193 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk00000186/sig00000d06 ), + .Q(\blk00000003/sig00000427 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000186/blk00000192 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk00000186/sig00000d05 ), + .Q(\blk00000003/sig00000428 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000186/blk00000191 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk00000186/sig00000d04 ), + .Q(\blk00000003/sig00000429 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000186/blk00000190 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk00000186/sig00000d03 ), + .Q(\blk00000003/sig0000042a ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000186/blk0000018f ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk00000186/sig00000d02 ), + .Q(\blk00000003/sig0000042b ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000186/blk0000018e ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk00000186/sig00000d01 ), + .Q(\blk00000003/sig0000042c ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000186/blk0000018d ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk00000186/sig00000d00 ), + .Q(\blk00000003/sig0000042d ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000186/blk0000018c ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk00000186/sig00000cff ), + .Q(\blk00000003/sig0000042e ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000186/blk0000018b ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk00000186/sig00000cfe ), + .Q(\blk00000003/sig0000042f ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000186/blk0000018a ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk00000186/sig00000cfd ), + .Q(\blk00000003/sig00000430 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000186/blk00000189 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk00000186/sig00000cfc ), + .Q(\blk00000003/sig00000431 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000186/blk00000188 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk00000186/sig00000cfb ), + .Q(\blk00000003/sig00000432 ) + ); + GND \blk00000003/blk00000186/blk00000187 ( + .G(\blk00000003/blk00000186/sig00000cfa ) + ); + LUT2 #( + .INIT ( 4'h8 )) + \blk00000003/blk000001b9/blk000001eb ( + .I0(ce), + .I1(\blk00000003/sig00000745 ), + .O(\blk00000003/blk000001b9/sig00000d61 ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk000001b9/blk000001ea ( + .A0(\blk00000003/sig00000747 ), + .A1(\blk00000003/blk000001b9/sig00000d48 ), + .A2(\blk00000003/blk000001b9/sig00000d48 ), + .A3(\blk00000003/blk000001b9/sig00000d48 ), + .CE(\blk00000003/blk000001b9/sig00000d61 ), + .CLK(clk), + .D(\blk00000003/sig0000077b ), + .Q(\blk00000003/blk000001b9/sig00000d5f ), + .Q15(\NLW_blk00000003/blk000001b9/blk000001ea_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk000001b9/blk000001e9 ( + .A0(\blk00000003/sig00000747 ), + .A1(\blk00000003/blk000001b9/sig00000d48 ), + .A2(\blk00000003/blk000001b9/sig00000d48 ), + .A3(\blk00000003/blk000001b9/sig00000d48 ), + .CE(\blk00000003/blk000001b9/sig00000d61 ), + .CLK(clk), + .D(\blk00000003/sig0000077c ), + .Q(\blk00000003/blk000001b9/sig00000d5e ), + .Q15(\NLW_blk00000003/blk000001b9/blk000001e9_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk000001b9/blk000001e8 ( + .A0(\blk00000003/sig00000747 ), + .A1(\blk00000003/blk000001b9/sig00000d48 ), + .A2(\blk00000003/blk000001b9/sig00000d48 ), + .A3(\blk00000003/blk000001b9/sig00000d48 ), + .CE(\blk00000003/blk000001b9/sig00000d61 ), + .CLK(clk), + .D(\blk00000003/sig0000077a ), + .Q(\blk00000003/blk000001b9/sig00000d60 ), + .Q15(\NLW_blk00000003/blk000001b9/blk000001e8_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk000001b9/blk000001e7 ( + .A0(\blk00000003/sig00000747 ), + .A1(\blk00000003/blk000001b9/sig00000d48 ), + .A2(\blk00000003/blk000001b9/sig00000d48 ), + .A3(\blk00000003/blk000001b9/sig00000d48 ), + .CE(\blk00000003/blk000001b9/sig00000d61 ), + .CLK(clk), + .D(\blk00000003/sig0000077e ), + .Q(\blk00000003/blk000001b9/sig00000d5c ), + .Q15(\NLW_blk00000003/blk000001b9/blk000001e7_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk000001b9/blk000001e6 ( + .A0(\blk00000003/sig00000747 ), + .A1(\blk00000003/blk000001b9/sig00000d48 ), + .A2(\blk00000003/blk000001b9/sig00000d48 ), + .A3(\blk00000003/blk000001b9/sig00000d48 ), + .CE(\blk00000003/blk000001b9/sig00000d61 ), + .CLK(clk), + .D(\blk00000003/sig0000077f ), + .Q(\blk00000003/blk000001b9/sig00000d5b ), + .Q15(\NLW_blk00000003/blk000001b9/blk000001e6_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk000001b9/blk000001e5 ( + .A0(\blk00000003/sig00000747 ), + .A1(\blk00000003/blk000001b9/sig00000d48 ), + .A2(\blk00000003/blk000001b9/sig00000d48 ), + .A3(\blk00000003/blk000001b9/sig00000d48 ), + .CE(\blk00000003/blk000001b9/sig00000d61 ), + .CLK(clk), + .D(\blk00000003/sig0000077d ), + .Q(\blk00000003/blk000001b9/sig00000d5d ), + .Q15(\NLW_blk00000003/blk000001b9/blk000001e5_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk000001b9/blk000001e4 ( + .A0(\blk00000003/sig00000747 ), + .A1(\blk00000003/blk000001b9/sig00000d48 ), + .A2(\blk00000003/blk000001b9/sig00000d48 ), + .A3(\blk00000003/blk000001b9/sig00000d48 ), + .CE(\blk00000003/blk000001b9/sig00000d61 ), + .CLK(clk), + .D(\blk00000003/sig00000781 ), + .Q(\blk00000003/blk000001b9/sig00000d59 ), + .Q15(\NLW_blk00000003/blk000001b9/blk000001e4_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk000001b9/blk000001e3 ( + .A0(\blk00000003/sig00000747 ), + .A1(\blk00000003/blk000001b9/sig00000d48 ), + .A2(\blk00000003/blk000001b9/sig00000d48 ), + .A3(\blk00000003/blk000001b9/sig00000d48 ), + .CE(\blk00000003/blk000001b9/sig00000d61 ), + .CLK(clk), + .D(\blk00000003/sig00000782 ), + .Q(\blk00000003/blk000001b9/sig00000d58 ), + .Q15(\NLW_blk00000003/blk000001b9/blk000001e3_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk000001b9/blk000001e2 ( + .A0(\blk00000003/sig00000747 ), + .A1(\blk00000003/blk000001b9/sig00000d48 ), + .A2(\blk00000003/blk000001b9/sig00000d48 ), + .A3(\blk00000003/blk000001b9/sig00000d48 ), + .CE(\blk00000003/blk000001b9/sig00000d61 ), + .CLK(clk), + .D(\blk00000003/sig00000780 ), + .Q(\blk00000003/blk000001b9/sig00000d5a ), + .Q15(\NLW_blk00000003/blk000001b9/blk000001e2_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk000001b9/blk000001e1 ( + .A0(\blk00000003/sig00000747 ), + .A1(\blk00000003/blk000001b9/sig00000d48 ), + .A2(\blk00000003/blk000001b9/sig00000d48 ), + .A3(\blk00000003/blk000001b9/sig00000d48 ), + .CE(\blk00000003/blk000001b9/sig00000d61 ), + .CLK(clk), + .D(\blk00000003/sig00000784 ), + .Q(\blk00000003/blk000001b9/sig00000d56 ), + .Q15(\NLW_blk00000003/blk000001b9/blk000001e1_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk000001b9/blk000001e0 ( + .A0(\blk00000003/sig00000747 ), + .A1(\blk00000003/blk000001b9/sig00000d48 ), + .A2(\blk00000003/blk000001b9/sig00000d48 ), + .A3(\blk00000003/blk000001b9/sig00000d48 ), + .CE(\blk00000003/blk000001b9/sig00000d61 ), + .CLK(clk), + .D(\blk00000003/sig00000785 ), + .Q(\blk00000003/blk000001b9/sig00000d55 ), + .Q15(\NLW_blk00000003/blk000001b9/blk000001e0_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk000001b9/blk000001df ( + .A0(\blk00000003/sig00000747 ), + .A1(\blk00000003/blk000001b9/sig00000d48 ), + .A2(\blk00000003/blk000001b9/sig00000d48 ), + .A3(\blk00000003/blk000001b9/sig00000d48 ), + .CE(\blk00000003/blk000001b9/sig00000d61 ), + .CLK(clk), + .D(\blk00000003/sig00000783 ), + .Q(\blk00000003/blk000001b9/sig00000d57 ), + .Q15(\NLW_blk00000003/blk000001b9/blk000001df_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk000001b9/blk000001de ( + .A0(\blk00000003/sig00000747 ), + .A1(\blk00000003/blk000001b9/sig00000d48 ), + .A2(\blk00000003/blk000001b9/sig00000d48 ), + .A3(\blk00000003/blk000001b9/sig00000d48 ), + .CE(\blk00000003/blk000001b9/sig00000d61 ), + .CLK(clk), + .D(\blk00000003/sig00000787 ), + .Q(\blk00000003/blk000001b9/sig00000d53 ), + .Q15(\NLW_blk00000003/blk000001b9/blk000001de_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk000001b9/blk000001dd ( + .A0(\blk00000003/sig00000747 ), + .A1(\blk00000003/blk000001b9/sig00000d48 ), + .A2(\blk00000003/blk000001b9/sig00000d48 ), + .A3(\blk00000003/blk000001b9/sig00000d48 ), + .CE(\blk00000003/blk000001b9/sig00000d61 ), + .CLK(clk), + .D(\blk00000003/sig00000788 ), + .Q(\blk00000003/blk000001b9/sig00000d52 ), + .Q15(\NLW_blk00000003/blk000001b9/blk000001dd_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk000001b9/blk000001dc ( + .A0(\blk00000003/sig00000747 ), + .A1(\blk00000003/blk000001b9/sig00000d48 ), + .A2(\blk00000003/blk000001b9/sig00000d48 ), + .A3(\blk00000003/blk000001b9/sig00000d48 ), + .CE(\blk00000003/blk000001b9/sig00000d61 ), + .CLK(clk), + .D(\blk00000003/sig00000786 ), + .Q(\blk00000003/blk000001b9/sig00000d54 ), + .Q15(\NLW_blk00000003/blk000001b9/blk000001dc_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk000001b9/blk000001db ( + .A0(\blk00000003/sig00000747 ), + .A1(\blk00000003/blk000001b9/sig00000d48 ), + .A2(\blk00000003/blk000001b9/sig00000d48 ), + .A3(\blk00000003/blk000001b9/sig00000d48 ), + .CE(\blk00000003/blk000001b9/sig00000d61 ), + .CLK(clk), + .D(\blk00000003/sig0000078a ), + .Q(\blk00000003/blk000001b9/sig00000d50 ), + .Q15(\NLW_blk00000003/blk000001b9/blk000001db_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk000001b9/blk000001da ( + .A0(\blk00000003/sig00000747 ), + .A1(\blk00000003/blk000001b9/sig00000d48 ), + .A2(\blk00000003/blk000001b9/sig00000d48 ), + .A3(\blk00000003/blk000001b9/sig00000d48 ), + .CE(\blk00000003/blk000001b9/sig00000d61 ), + .CLK(clk), + .D(\blk00000003/sig0000078b ), + .Q(\blk00000003/blk000001b9/sig00000d4f ), + .Q15(\NLW_blk00000003/blk000001b9/blk000001da_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk000001b9/blk000001d9 ( + .A0(\blk00000003/sig00000747 ), + .A1(\blk00000003/blk000001b9/sig00000d48 ), + .A2(\blk00000003/blk000001b9/sig00000d48 ), + .A3(\blk00000003/blk000001b9/sig00000d48 ), + .CE(\blk00000003/blk000001b9/sig00000d61 ), + .CLK(clk), + .D(\blk00000003/sig00000789 ), + .Q(\blk00000003/blk000001b9/sig00000d51 ), + .Q15(\NLW_blk00000003/blk000001b9/blk000001d9_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk000001b9/blk000001d8 ( + .A0(\blk00000003/sig00000747 ), + .A1(\blk00000003/blk000001b9/sig00000d48 ), + .A2(\blk00000003/blk000001b9/sig00000d48 ), + .A3(\blk00000003/blk000001b9/sig00000d48 ), + .CE(\blk00000003/blk000001b9/sig00000d61 ), + .CLK(clk), + .D(\blk00000003/sig0000078d ), + .Q(\blk00000003/blk000001b9/sig00000d4d ), + .Q15(\NLW_blk00000003/blk000001b9/blk000001d8_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk000001b9/blk000001d7 ( + .A0(\blk00000003/sig00000747 ), + .A1(\blk00000003/blk000001b9/sig00000d48 ), + .A2(\blk00000003/blk000001b9/sig00000d48 ), + .A3(\blk00000003/blk000001b9/sig00000d48 ), + .CE(\blk00000003/blk000001b9/sig00000d61 ), + .CLK(clk), + .D(\blk00000003/sig0000078e ), + .Q(\blk00000003/blk000001b9/sig00000d4c ), + .Q15(\NLW_blk00000003/blk000001b9/blk000001d7_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk000001b9/blk000001d6 ( + .A0(\blk00000003/sig00000747 ), + .A1(\blk00000003/blk000001b9/sig00000d48 ), + .A2(\blk00000003/blk000001b9/sig00000d48 ), + .A3(\blk00000003/blk000001b9/sig00000d48 ), + .CE(\blk00000003/blk000001b9/sig00000d61 ), + .CLK(clk), + .D(\blk00000003/sig0000078c ), + .Q(\blk00000003/blk000001b9/sig00000d4e ), + .Q15(\NLW_blk00000003/blk000001b9/blk000001d6_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk000001b9/blk000001d5 ( + .A0(\blk00000003/sig00000747 ), + .A1(\blk00000003/blk000001b9/sig00000d48 ), + .A2(\blk00000003/blk000001b9/sig00000d48 ), + .A3(\blk00000003/blk000001b9/sig00000d48 ), + .CE(\blk00000003/blk000001b9/sig00000d61 ), + .CLK(clk), + .D(\blk00000003/sig00000790 ), + .Q(\blk00000003/blk000001b9/sig00000d4a ), + .Q15(\NLW_blk00000003/blk000001b9/blk000001d5_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk000001b9/blk000001d4 ( + .A0(\blk00000003/sig00000747 ), + .A1(\blk00000003/blk000001b9/sig00000d48 ), + .A2(\blk00000003/blk000001b9/sig00000d48 ), + .A3(\blk00000003/blk000001b9/sig00000d48 ), + .CE(\blk00000003/blk000001b9/sig00000d61 ), + .CLK(clk), + .D(\blk00000003/sig00000791 ), + .Q(\blk00000003/blk000001b9/sig00000d49 ), + .Q15(\NLW_blk00000003/blk000001b9/blk000001d4_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk000001b9/blk000001d3 ( + .A0(\blk00000003/sig00000747 ), + .A1(\blk00000003/blk000001b9/sig00000d48 ), + .A2(\blk00000003/blk000001b9/sig00000d48 ), + .A3(\blk00000003/blk000001b9/sig00000d48 ), + .CE(\blk00000003/blk000001b9/sig00000d61 ), + .CLK(clk), + .D(\blk00000003/sig0000078f ), + .Q(\blk00000003/blk000001b9/sig00000d4b ), + .Q15(\NLW_blk00000003/blk000001b9/blk000001d3_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000001b9/blk000001d2 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk000001b9/sig00000d60 ), + .Q(\blk00000003/sig00000433 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000001b9/blk000001d1 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk000001b9/sig00000d5f ), + .Q(\blk00000003/sig00000434 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000001b9/blk000001d0 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk000001b9/sig00000d5e ), + .Q(\blk00000003/sig00000435 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000001b9/blk000001cf ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk000001b9/sig00000d5d ), + .Q(\blk00000003/sig00000436 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000001b9/blk000001ce ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk000001b9/sig00000d5c ), + .Q(\blk00000003/sig00000437 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000001b9/blk000001cd ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk000001b9/sig00000d5b ), + .Q(\blk00000003/sig00000438 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000001b9/blk000001cc ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk000001b9/sig00000d5a ), + .Q(\blk00000003/sig00000439 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000001b9/blk000001cb ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk000001b9/sig00000d59 ), + .Q(\blk00000003/sig0000043a ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000001b9/blk000001ca ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk000001b9/sig00000d58 ), + .Q(\blk00000003/sig0000043b ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000001b9/blk000001c9 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk000001b9/sig00000d57 ), + .Q(\blk00000003/sig0000043c ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000001b9/blk000001c8 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk000001b9/sig00000d56 ), + .Q(\blk00000003/sig0000043d ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000001b9/blk000001c7 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk000001b9/sig00000d55 ), + .Q(\blk00000003/sig0000043e ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000001b9/blk000001c6 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk000001b9/sig00000d54 ), + .Q(\blk00000003/sig0000043f ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000001b9/blk000001c5 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk000001b9/sig00000d53 ), + .Q(\blk00000003/sig00000440 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000001b9/blk000001c4 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk000001b9/sig00000d52 ), + .Q(\blk00000003/sig00000441 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000001b9/blk000001c3 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk000001b9/sig00000d51 ), + .Q(\blk00000003/sig00000442 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000001b9/blk000001c2 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk000001b9/sig00000d50 ), + .Q(\blk00000003/sig00000443 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000001b9/blk000001c1 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk000001b9/sig00000d4f ), + .Q(\blk00000003/sig00000444 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000001b9/blk000001c0 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk000001b9/sig00000d4e ), + .Q(\blk00000003/sig00000445 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000001b9/blk000001bf ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk000001b9/sig00000d4d ), + .Q(\blk00000003/sig00000446 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000001b9/blk000001be ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk000001b9/sig00000d4c ), + .Q(\blk00000003/sig00000447 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000001b9/blk000001bd ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk000001b9/sig00000d4b ), + .Q(\blk00000003/sig00000448 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000001b9/blk000001bc ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk000001b9/sig00000d4a ), + .Q(\blk00000003/sig00000449 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000001b9/blk000001bb ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk000001b9/sig00000d49 ), + .Q(\blk00000003/sig0000044a ) + ); + GND \blk00000003/blk000001b9/blk000001ba ( + .G(\blk00000003/blk000001b9/sig00000d48 ) + ); + LUT2 #( + .INIT ( 4'h8 )) + \blk00000003/blk000001ec/blk0000021e ( + .I0(ce), + .I1(\blk00000003/sig00000742 ), + .O(\blk00000003/blk000001ec/sig00000daf ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk000001ec/blk0000021d ( + .A0(\blk00000003/sig00000748 ), + .A1(\blk00000003/blk000001ec/sig00000d96 ), + .A2(\blk00000003/blk000001ec/sig00000d96 ), + .A3(\blk00000003/blk000001ec/sig00000d96 ), + .CE(\blk00000003/blk000001ec/sig00000daf ), + .CLK(clk), + .D(\blk00000003/sig00000542 ), + .Q(\blk00000003/blk000001ec/sig00000dad ), + .Q15(\NLW_blk00000003/blk000001ec/blk0000021d_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk000001ec/blk0000021c ( + .A0(\blk00000003/sig00000748 ), + .A1(\blk00000003/blk000001ec/sig00000d96 ), + .A2(\blk00000003/blk000001ec/sig00000d96 ), + .A3(\blk00000003/blk000001ec/sig00000d96 ), + .CE(\blk00000003/blk000001ec/sig00000daf ), + .CLK(clk), + .D(\blk00000003/sig00000543 ), + .Q(\blk00000003/blk000001ec/sig00000dac ), + .Q15(\NLW_blk00000003/blk000001ec/blk0000021c_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk000001ec/blk0000021b ( + .A0(\blk00000003/sig00000748 ), + .A1(\blk00000003/blk000001ec/sig00000d96 ), + .A2(\blk00000003/blk000001ec/sig00000d96 ), + .A3(\blk00000003/blk000001ec/sig00000d96 ), + .CE(\blk00000003/blk000001ec/sig00000daf ), + .CLK(clk), + .D(\blk00000003/sig00000541 ), + .Q(\blk00000003/blk000001ec/sig00000dae ), + .Q15(\NLW_blk00000003/blk000001ec/blk0000021b_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk000001ec/blk0000021a ( + .A0(\blk00000003/sig00000748 ), + .A1(\blk00000003/blk000001ec/sig00000d96 ), + .A2(\blk00000003/blk000001ec/sig00000d96 ), + .A3(\blk00000003/blk000001ec/sig00000d96 ), + .CE(\blk00000003/blk000001ec/sig00000daf ), + .CLK(clk), + .D(\blk00000003/sig00000545 ), + .Q(\blk00000003/blk000001ec/sig00000daa ), + .Q15(\NLW_blk00000003/blk000001ec/blk0000021a_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk000001ec/blk00000219 ( + .A0(\blk00000003/sig00000748 ), + .A1(\blk00000003/blk000001ec/sig00000d96 ), + .A2(\blk00000003/blk000001ec/sig00000d96 ), + .A3(\blk00000003/blk000001ec/sig00000d96 ), + .CE(\blk00000003/blk000001ec/sig00000daf ), + .CLK(clk), + .D(\blk00000003/sig00000546 ), + .Q(\blk00000003/blk000001ec/sig00000da9 ), + .Q15(\NLW_blk00000003/blk000001ec/blk00000219_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk000001ec/blk00000218 ( + .A0(\blk00000003/sig00000748 ), + .A1(\blk00000003/blk000001ec/sig00000d96 ), + .A2(\blk00000003/blk000001ec/sig00000d96 ), + .A3(\blk00000003/blk000001ec/sig00000d96 ), + .CE(\blk00000003/blk000001ec/sig00000daf ), + .CLK(clk), + .D(\blk00000003/sig00000544 ), + .Q(\blk00000003/blk000001ec/sig00000dab ), + .Q15(\NLW_blk00000003/blk000001ec/blk00000218_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk000001ec/blk00000217 ( + .A0(\blk00000003/sig00000748 ), + .A1(\blk00000003/blk000001ec/sig00000d96 ), + .A2(\blk00000003/blk000001ec/sig00000d96 ), + .A3(\blk00000003/blk000001ec/sig00000d96 ), + .CE(\blk00000003/blk000001ec/sig00000daf ), + .CLK(clk), + .D(\blk00000003/sig00000548 ), + .Q(\blk00000003/blk000001ec/sig00000da7 ), + .Q15(\NLW_blk00000003/blk000001ec/blk00000217_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk000001ec/blk00000216 ( + .A0(\blk00000003/sig00000748 ), + .A1(\blk00000003/blk000001ec/sig00000d96 ), + .A2(\blk00000003/blk000001ec/sig00000d96 ), + .A3(\blk00000003/blk000001ec/sig00000d96 ), + .CE(\blk00000003/blk000001ec/sig00000daf ), + .CLK(clk), + .D(\blk00000003/sig00000549 ), + .Q(\blk00000003/blk000001ec/sig00000da6 ), + .Q15(\NLW_blk00000003/blk000001ec/blk00000216_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk000001ec/blk00000215 ( + .A0(\blk00000003/sig00000748 ), + .A1(\blk00000003/blk000001ec/sig00000d96 ), + .A2(\blk00000003/blk000001ec/sig00000d96 ), + .A3(\blk00000003/blk000001ec/sig00000d96 ), + .CE(\blk00000003/blk000001ec/sig00000daf ), + .CLK(clk), + .D(\blk00000003/sig00000547 ), + .Q(\blk00000003/blk000001ec/sig00000da8 ), + .Q15(\NLW_blk00000003/blk000001ec/blk00000215_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk000001ec/blk00000214 ( + .A0(\blk00000003/sig00000748 ), + .A1(\blk00000003/blk000001ec/sig00000d96 ), + .A2(\blk00000003/blk000001ec/sig00000d96 ), + .A3(\blk00000003/blk000001ec/sig00000d96 ), + .CE(\blk00000003/blk000001ec/sig00000daf ), + .CLK(clk), + .D(\blk00000003/sig0000054b ), + .Q(\blk00000003/blk000001ec/sig00000da4 ), + .Q15(\NLW_blk00000003/blk000001ec/blk00000214_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk000001ec/blk00000213 ( + .A0(\blk00000003/sig00000748 ), + .A1(\blk00000003/blk000001ec/sig00000d96 ), + .A2(\blk00000003/blk000001ec/sig00000d96 ), + .A3(\blk00000003/blk000001ec/sig00000d96 ), + .CE(\blk00000003/blk000001ec/sig00000daf ), + .CLK(clk), + .D(\blk00000003/sig0000054c ), + .Q(\blk00000003/blk000001ec/sig00000da3 ), + .Q15(\NLW_blk00000003/blk000001ec/blk00000213_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk000001ec/blk00000212 ( + .A0(\blk00000003/sig00000748 ), + .A1(\blk00000003/blk000001ec/sig00000d96 ), + .A2(\blk00000003/blk000001ec/sig00000d96 ), + .A3(\blk00000003/blk000001ec/sig00000d96 ), + .CE(\blk00000003/blk000001ec/sig00000daf ), + .CLK(clk), + .D(\blk00000003/sig0000054a ), + .Q(\blk00000003/blk000001ec/sig00000da5 ), + .Q15(\NLW_blk00000003/blk000001ec/blk00000212_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk000001ec/blk00000211 ( + .A0(\blk00000003/sig00000748 ), + .A1(\blk00000003/blk000001ec/sig00000d96 ), + .A2(\blk00000003/blk000001ec/sig00000d96 ), + .A3(\blk00000003/blk000001ec/sig00000d96 ), + .CE(\blk00000003/blk000001ec/sig00000daf ), + .CLK(clk), + .D(\blk00000003/sig0000054e ), + .Q(\blk00000003/blk000001ec/sig00000da1 ), + .Q15(\NLW_blk00000003/blk000001ec/blk00000211_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk000001ec/blk00000210 ( + .A0(\blk00000003/sig00000748 ), + .A1(\blk00000003/blk000001ec/sig00000d96 ), + .A2(\blk00000003/blk000001ec/sig00000d96 ), + .A3(\blk00000003/blk000001ec/sig00000d96 ), + .CE(\blk00000003/blk000001ec/sig00000daf ), + .CLK(clk), + .D(\blk00000003/sig0000054f ), + .Q(\blk00000003/blk000001ec/sig00000da0 ), + .Q15(\NLW_blk00000003/blk000001ec/blk00000210_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk000001ec/blk0000020f ( + .A0(\blk00000003/sig00000748 ), + .A1(\blk00000003/blk000001ec/sig00000d96 ), + .A2(\blk00000003/blk000001ec/sig00000d96 ), + .A3(\blk00000003/blk000001ec/sig00000d96 ), + .CE(\blk00000003/blk000001ec/sig00000daf ), + .CLK(clk), + .D(\blk00000003/sig0000054d ), + .Q(\blk00000003/blk000001ec/sig00000da2 ), + .Q15(\NLW_blk00000003/blk000001ec/blk0000020f_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk000001ec/blk0000020e ( + .A0(\blk00000003/sig00000748 ), + .A1(\blk00000003/blk000001ec/sig00000d96 ), + .A2(\blk00000003/blk000001ec/sig00000d96 ), + .A3(\blk00000003/blk000001ec/sig00000d96 ), + .CE(\blk00000003/blk000001ec/sig00000daf ), + .CLK(clk), + .D(\blk00000003/sig00000551 ), + .Q(\blk00000003/blk000001ec/sig00000d9e ), + .Q15(\NLW_blk00000003/blk000001ec/blk0000020e_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk000001ec/blk0000020d ( + .A0(\blk00000003/sig00000748 ), + .A1(\blk00000003/blk000001ec/sig00000d96 ), + .A2(\blk00000003/blk000001ec/sig00000d96 ), + .A3(\blk00000003/blk000001ec/sig00000d96 ), + .CE(\blk00000003/blk000001ec/sig00000daf ), + .CLK(clk), + .D(\blk00000003/sig00000552 ), + .Q(\blk00000003/blk000001ec/sig00000d9d ), + .Q15(\NLW_blk00000003/blk000001ec/blk0000020d_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk000001ec/blk0000020c ( + .A0(\blk00000003/sig00000748 ), + .A1(\blk00000003/blk000001ec/sig00000d96 ), + .A2(\blk00000003/blk000001ec/sig00000d96 ), + .A3(\blk00000003/blk000001ec/sig00000d96 ), + .CE(\blk00000003/blk000001ec/sig00000daf ), + .CLK(clk), + .D(\blk00000003/sig00000550 ), + .Q(\blk00000003/blk000001ec/sig00000d9f ), + .Q15(\NLW_blk00000003/blk000001ec/blk0000020c_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk000001ec/blk0000020b ( + .A0(\blk00000003/sig00000748 ), + .A1(\blk00000003/blk000001ec/sig00000d96 ), + .A2(\blk00000003/blk000001ec/sig00000d96 ), + .A3(\blk00000003/blk000001ec/sig00000d96 ), + .CE(\blk00000003/blk000001ec/sig00000daf ), + .CLK(clk), + .D(\blk00000003/sig00000554 ), + .Q(\blk00000003/blk000001ec/sig00000d9b ), + .Q15(\NLW_blk00000003/blk000001ec/blk0000020b_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk000001ec/blk0000020a ( + .A0(\blk00000003/sig00000748 ), + .A1(\blk00000003/blk000001ec/sig00000d96 ), + .A2(\blk00000003/blk000001ec/sig00000d96 ), + .A3(\blk00000003/blk000001ec/sig00000d96 ), + .CE(\blk00000003/blk000001ec/sig00000daf ), + .CLK(clk), + .D(\blk00000003/sig00000555 ), + .Q(\blk00000003/blk000001ec/sig00000d9a ), + .Q15(\NLW_blk00000003/blk000001ec/blk0000020a_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk000001ec/blk00000209 ( + .A0(\blk00000003/sig00000748 ), + .A1(\blk00000003/blk000001ec/sig00000d96 ), + .A2(\blk00000003/blk000001ec/sig00000d96 ), + .A3(\blk00000003/blk000001ec/sig00000d96 ), + .CE(\blk00000003/blk000001ec/sig00000daf ), + .CLK(clk), + .D(\blk00000003/sig00000553 ), + .Q(\blk00000003/blk000001ec/sig00000d9c ), + .Q15(\NLW_blk00000003/blk000001ec/blk00000209_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk000001ec/blk00000208 ( + .A0(\blk00000003/sig00000748 ), + .A1(\blk00000003/blk000001ec/sig00000d96 ), + .A2(\blk00000003/blk000001ec/sig00000d96 ), + .A3(\blk00000003/blk000001ec/sig00000d96 ), + .CE(\blk00000003/blk000001ec/sig00000daf ), + .CLK(clk), + .D(\blk00000003/sig00000557 ), + .Q(\blk00000003/blk000001ec/sig00000d98 ), + .Q15(\NLW_blk00000003/blk000001ec/blk00000208_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk000001ec/blk00000207 ( + .A0(\blk00000003/sig00000748 ), + .A1(\blk00000003/blk000001ec/sig00000d96 ), + .A2(\blk00000003/blk000001ec/sig00000d96 ), + .A3(\blk00000003/blk000001ec/sig00000d96 ), + .CE(\blk00000003/blk000001ec/sig00000daf ), + .CLK(clk), + .D(\blk00000003/sig00000558 ), + .Q(\blk00000003/blk000001ec/sig00000d97 ), + .Q15(\NLW_blk00000003/blk000001ec/blk00000207_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk000001ec/blk00000206 ( + .A0(\blk00000003/sig00000748 ), + .A1(\blk00000003/blk000001ec/sig00000d96 ), + .A2(\blk00000003/blk000001ec/sig00000d96 ), + .A3(\blk00000003/blk000001ec/sig00000d96 ), + .CE(\blk00000003/blk000001ec/sig00000daf ), + .CLK(clk), + .D(\blk00000003/sig00000556 ), + .Q(\blk00000003/blk000001ec/sig00000d99 ), + .Q15(\NLW_blk00000003/blk000001ec/blk00000206_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000001ec/blk00000205 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk000001ec/sig00000dae ), + .Q(\blk00000003/sig000005b3 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000001ec/blk00000204 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk000001ec/sig00000dad ), + .Q(\blk00000003/sig000005b4 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000001ec/blk00000203 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk000001ec/sig00000dac ), + .Q(\blk00000003/sig000005b5 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000001ec/blk00000202 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk000001ec/sig00000dab ), + .Q(\blk00000003/sig000005b6 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000001ec/blk00000201 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk000001ec/sig00000daa ), + .Q(\blk00000003/sig000005b7 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000001ec/blk00000200 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk000001ec/sig00000da9 ), + .Q(\blk00000003/sig000005b8 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000001ec/blk000001ff ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk000001ec/sig00000da8 ), + .Q(\blk00000003/sig000005b9 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000001ec/blk000001fe ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk000001ec/sig00000da7 ), + .Q(\blk00000003/sig000005ba ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000001ec/blk000001fd ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk000001ec/sig00000da6 ), + .Q(\blk00000003/sig000005bb ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000001ec/blk000001fc ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk000001ec/sig00000da5 ), + .Q(\blk00000003/sig000005bc ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000001ec/blk000001fb ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk000001ec/sig00000da4 ), + .Q(\blk00000003/sig000005bd ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000001ec/blk000001fa ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk000001ec/sig00000da3 ), + .Q(\blk00000003/sig000005be ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000001ec/blk000001f9 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk000001ec/sig00000da2 ), + .Q(\blk00000003/sig000005bf ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000001ec/blk000001f8 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk000001ec/sig00000da1 ), + .Q(\blk00000003/sig000005c0 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000001ec/blk000001f7 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk000001ec/sig00000da0 ), + .Q(\blk00000003/sig000005c1 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000001ec/blk000001f6 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk000001ec/sig00000d9f ), + .Q(\blk00000003/sig000005c2 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000001ec/blk000001f5 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk000001ec/sig00000d9e ), + .Q(\blk00000003/sig000005c3 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000001ec/blk000001f4 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk000001ec/sig00000d9d ), + .Q(\blk00000003/sig000005c4 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000001ec/blk000001f3 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk000001ec/sig00000d9c ), + .Q(\blk00000003/sig000005c5 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000001ec/blk000001f2 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk000001ec/sig00000d9b ), + .Q(\blk00000003/sig000005c6 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000001ec/blk000001f1 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk000001ec/sig00000d9a ), + .Q(\blk00000003/sig000005c7 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000001ec/blk000001f0 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk000001ec/sig00000d99 ), + .Q(\blk00000003/sig000005c8 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000001ec/blk000001ef ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk000001ec/sig00000d98 ), + .Q(\blk00000003/sig000005c9 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000001ec/blk000001ee ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk000001ec/sig00000d97 ), + .Q(\blk00000003/sig000005ca ) + ); + GND \blk00000003/blk000001ec/blk000001ed ( + .G(\blk00000003/blk000001ec/sig00000d96 ) + ); + LUT2 #( + .INIT ( 4'h8 )) + \blk00000003/blk0000021f/blk00000251 ( + .I0(ce), + .I1(\blk00000003/sig00000744 ), + .O(\blk00000003/blk0000021f/sig00000dfd ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk0000021f/blk00000250 ( + .A0(\blk00000003/sig00000746 ), + .A1(\blk00000003/blk0000021f/sig00000de4 ), + .A2(\blk00000003/blk0000021f/sig00000de4 ), + .A3(\blk00000003/blk0000021f/sig00000de4 ), + .CE(\blk00000003/blk0000021f/sig00000dfd ), + .CLK(clk), + .D(\blk00000003/sig00000793 ), + .Q(\blk00000003/blk0000021f/sig00000dfb ), + .Q15(\NLW_blk00000003/blk0000021f/blk00000250_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk0000021f/blk0000024f ( + .A0(\blk00000003/sig00000746 ), + .A1(\blk00000003/blk0000021f/sig00000de4 ), + .A2(\blk00000003/blk0000021f/sig00000de4 ), + .A3(\blk00000003/blk0000021f/sig00000de4 ), + .CE(\blk00000003/blk0000021f/sig00000dfd ), + .CLK(clk), + .D(\blk00000003/sig00000794 ), + .Q(\blk00000003/blk0000021f/sig00000dfa ), + .Q15(\NLW_blk00000003/blk0000021f/blk0000024f_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk0000021f/blk0000024e ( + .A0(\blk00000003/sig00000746 ), + .A1(\blk00000003/blk0000021f/sig00000de4 ), + .A2(\blk00000003/blk0000021f/sig00000de4 ), + .A3(\blk00000003/blk0000021f/sig00000de4 ), + .CE(\blk00000003/blk0000021f/sig00000dfd ), + .CLK(clk), + .D(\blk00000003/sig00000792 ), + .Q(\blk00000003/blk0000021f/sig00000dfc ), + .Q15(\NLW_blk00000003/blk0000021f/blk0000024e_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk0000021f/blk0000024d ( + .A0(\blk00000003/sig00000746 ), + .A1(\blk00000003/blk0000021f/sig00000de4 ), + .A2(\blk00000003/blk0000021f/sig00000de4 ), + .A3(\blk00000003/blk0000021f/sig00000de4 ), + .CE(\blk00000003/blk0000021f/sig00000dfd ), + .CLK(clk), + .D(\blk00000003/sig00000796 ), + .Q(\blk00000003/blk0000021f/sig00000df8 ), + .Q15(\NLW_blk00000003/blk0000021f/blk0000024d_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk0000021f/blk0000024c ( + .A0(\blk00000003/sig00000746 ), + .A1(\blk00000003/blk0000021f/sig00000de4 ), + .A2(\blk00000003/blk0000021f/sig00000de4 ), + .A3(\blk00000003/blk0000021f/sig00000de4 ), + .CE(\blk00000003/blk0000021f/sig00000dfd ), + .CLK(clk), + .D(\blk00000003/sig00000797 ), + .Q(\blk00000003/blk0000021f/sig00000df7 ), + .Q15(\NLW_blk00000003/blk0000021f/blk0000024c_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk0000021f/blk0000024b ( + .A0(\blk00000003/sig00000746 ), + .A1(\blk00000003/blk0000021f/sig00000de4 ), + .A2(\blk00000003/blk0000021f/sig00000de4 ), + .A3(\blk00000003/blk0000021f/sig00000de4 ), + .CE(\blk00000003/blk0000021f/sig00000dfd ), + .CLK(clk), + .D(\blk00000003/sig00000795 ), + .Q(\blk00000003/blk0000021f/sig00000df9 ), + .Q15(\NLW_blk00000003/blk0000021f/blk0000024b_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk0000021f/blk0000024a ( + .A0(\blk00000003/sig00000746 ), + .A1(\blk00000003/blk0000021f/sig00000de4 ), + .A2(\blk00000003/blk0000021f/sig00000de4 ), + .A3(\blk00000003/blk0000021f/sig00000de4 ), + .CE(\blk00000003/blk0000021f/sig00000dfd ), + .CLK(clk), + .D(\blk00000003/sig00000799 ), + .Q(\blk00000003/blk0000021f/sig00000df5 ), + .Q15(\NLW_blk00000003/blk0000021f/blk0000024a_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk0000021f/blk00000249 ( + .A0(\blk00000003/sig00000746 ), + .A1(\blk00000003/blk0000021f/sig00000de4 ), + .A2(\blk00000003/blk0000021f/sig00000de4 ), + .A3(\blk00000003/blk0000021f/sig00000de4 ), + .CE(\blk00000003/blk0000021f/sig00000dfd ), + .CLK(clk), + .D(\blk00000003/sig0000079a ), + .Q(\blk00000003/blk0000021f/sig00000df4 ), + .Q15(\NLW_blk00000003/blk0000021f/blk00000249_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk0000021f/blk00000248 ( + .A0(\blk00000003/sig00000746 ), + .A1(\blk00000003/blk0000021f/sig00000de4 ), + .A2(\blk00000003/blk0000021f/sig00000de4 ), + .A3(\blk00000003/blk0000021f/sig00000de4 ), + .CE(\blk00000003/blk0000021f/sig00000dfd ), + .CLK(clk), + .D(\blk00000003/sig00000798 ), + .Q(\blk00000003/blk0000021f/sig00000df6 ), + .Q15(\NLW_blk00000003/blk0000021f/blk00000248_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk0000021f/blk00000247 ( + .A0(\blk00000003/sig00000746 ), + .A1(\blk00000003/blk0000021f/sig00000de4 ), + .A2(\blk00000003/blk0000021f/sig00000de4 ), + .A3(\blk00000003/blk0000021f/sig00000de4 ), + .CE(\blk00000003/blk0000021f/sig00000dfd ), + .CLK(clk), + .D(\blk00000003/sig0000079c ), + .Q(\blk00000003/blk0000021f/sig00000df2 ), + .Q15(\NLW_blk00000003/blk0000021f/blk00000247_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk0000021f/blk00000246 ( + .A0(\blk00000003/sig00000746 ), + .A1(\blk00000003/blk0000021f/sig00000de4 ), + .A2(\blk00000003/blk0000021f/sig00000de4 ), + .A3(\blk00000003/blk0000021f/sig00000de4 ), + .CE(\blk00000003/blk0000021f/sig00000dfd ), + .CLK(clk), + .D(\blk00000003/sig0000079d ), + .Q(\blk00000003/blk0000021f/sig00000df1 ), + .Q15(\NLW_blk00000003/blk0000021f/blk00000246_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk0000021f/blk00000245 ( + .A0(\blk00000003/sig00000746 ), + .A1(\blk00000003/blk0000021f/sig00000de4 ), + .A2(\blk00000003/blk0000021f/sig00000de4 ), + .A3(\blk00000003/blk0000021f/sig00000de4 ), + .CE(\blk00000003/blk0000021f/sig00000dfd ), + .CLK(clk), + .D(\blk00000003/sig0000079b ), + .Q(\blk00000003/blk0000021f/sig00000df3 ), + .Q15(\NLW_blk00000003/blk0000021f/blk00000245_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk0000021f/blk00000244 ( + .A0(\blk00000003/sig00000746 ), + .A1(\blk00000003/blk0000021f/sig00000de4 ), + .A2(\blk00000003/blk0000021f/sig00000de4 ), + .A3(\blk00000003/blk0000021f/sig00000de4 ), + .CE(\blk00000003/blk0000021f/sig00000dfd ), + .CLK(clk), + .D(\blk00000003/sig0000079f ), + .Q(\blk00000003/blk0000021f/sig00000def ), + .Q15(\NLW_blk00000003/blk0000021f/blk00000244_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk0000021f/blk00000243 ( + .A0(\blk00000003/sig00000746 ), + .A1(\blk00000003/blk0000021f/sig00000de4 ), + .A2(\blk00000003/blk0000021f/sig00000de4 ), + .A3(\blk00000003/blk0000021f/sig00000de4 ), + .CE(\blk00000003/blk0000021f/sig00000dfd ), + .CLK(clk), + .D(\blk00000003/sig000007a0 ), + .Q(\blk00000003/blk0000021f/sig00000dee ), + .Q15(\NLW_blk00000003/blk0000021f/blk00000243_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk0000021f/blk00000242 ( + .A0(\blk00000003/sig00000746 ), + .A1(\blk00000003/blk0000021f/sig00000de4 ), + .A2(\blk00000003/blk0000021f/sig00000de4 ), + .A3(\blk00000003/blk0000021f/sig00000de4 ), + .CE(\blk00000003/blk0000021f/sig00000dfd ), + .CLK(clk), + .D(\blk00000003/sig0000079e ), + .Q(\blk00000003/blk0000021f/sig00000df0 ), + .Q15(\NLW_blk00000003/blk0000021f/blk00000242_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk0000021f/blk00000241 ( + .A0(\blk00000003/sig00000746 ), + .A1(\blk00000003/blk0000021f/sig00000de4 ), + .A2(\blk00000003/blk0000021f/sig00000de4 ), + .A3(\blk00000003/blk0000021f/sig00000de4 ), + .CE(\blk00000003/blk0000021f/sig00000dfd ), + .CLK(clk), + .D(\blk00000003/sig000007a2 ), + .Q(\blk00000003/blk0000021f/sig00000dec ), + .Q15(\NLW_blk00000003/blk0000021f/blk00000241_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk0000021f/blk00000240 ( + .A0(\blk00000003/sig00000746 ), + .A1(\blk00000003/blk0000021f/sig00000de4 ), + .A2(\blk00000003/blk0000021f/sig00000de4 ), + .A3(\blk00000003/blk0000021f/sig00000de4 ), + .CE(\blk00000003/blk0000021f/sig00000dfd ), + .CLK(clk), + .D(\blk00000003/sig000007a3 ), + .Q(\blk00000003/blk0000021f/sig00000deb ), + .Q15(\NLW_blk00000003/blk0000021f/blk00000240_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk0000021f/blk0000023f ( + .A0(\blk00000003/sig00000746 ), + .A1(\blk00000003/blk0000021f/sig00000de4 ), + .A2(\blk00000003/blk0000021f/sig00000de4 ), + .A3(\blk00000003/blk0000021f/sig00000de4 ), + .CE(\blk00000003/blk0000021f/sig00000dfd ), + .CLK(clk), + .D(\blk00000003/sig000007a1 ), + .Q(\blk00000003/blk0000021f/sig00000ded ), + .Q15(\NLW_blk00000003/blk0000021f/blk0000023f_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk0000021f/blk0000023e ( + .A0(\blk00000003/sig00000746 ), + .A1(\blk00000003/blk0000021f/sig00000de4 ), + .A2(\blk00000003/blk0000021f/sig00000de4 ), + .A3(\blk00000003/blk0000021f/sig00000de4 ), + .CE(\blk00000003/blk0000021f/sig00000dfd ), + .CLK(clk), + .D(\blk00000003/sig000007a5 ), + .Q(\blk00000003/blk0000021f/sig00000de9 ), + .Q15(\NLW_blk00000003/blk0000021f/blk0000023e_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk0000021f/blk0000023d ( + .A0(\blk00000003/sig00000746 ), + .A1(\blk00000003/blk0000021f/sig00000de4 ), + .A2(\blk00000003/blk0000021f/sig00000de4 ), + .A3(\blk00000003/blk0000021f/sig00000de4 ), + .CE(\blk00000003/blk0000021f/sig00000dfd ), + .CLK(clk), + .D(\blk00000003/sig000007a6 ), + .Q(\blk00000003/blk0000021f/sig00000de8 ), + .Q15(\NLW_blk00000003/blk0000021f/blk0000023d_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk0000021f/blk0000023c ( + .A0(\blk00000003/sig00000746 ), + .A1(\blk00000003/blk0000021f/sig00000de4 ), + .A2(\blk00000003/blk0000021f/sig00000de4 ), + .A3(\blk00000003/blk0000021f/sig00000de4 ), + .CE(\blk00000003/blk0000021f/sig00000dfd ), + .CLK(clk), + .D(\blk00000003/sig000007a4 ), + .Q(\blk00000003/blk0000021f/sig00000dea ), + .Q15(\NLW_blk00000003/blk0000021f/blk0000023c_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk0000021f/blk0000023b ( + .A0(\blk00000003/sig00000746 ), + .A1(\blk00000003/blk0000021f/sig00000de4 ), + .A2(\blk00000003/blk0000021f/sig00000de4 ), + .A3(\blk00000003/blk0000021f/sig00000de4 ), + .CE(\blk00000003/blk0000021f/sig00000dfd ), + .CLK(clk), + .D(\blk00000003/sig000007a8 ), + .Q(\blk00000003/blk0000021f/sig00000de6 ), + .Q15(\NLW_blk00000003/blk0000021f/blk0000023b_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk0000021f/blk0000023a ( + .A0(\blk00000003/sig00000746 ), + .A1(\blk00000003/blk0000021f/sig00000de4 ), + .A2(\blk00000003/blk0000021f/sig00000de4 ), + .A3(\blk00000003/blk0000021f/sig00000de4 ), + .CE(\blk00000003/blk0000021f/sig00000dfd ), + .CLK(clk), + .D(\blk00000003/sig000007a9 ), + .Q(\blk00000003/blk0000021f/sig00000de5 ), + .Q15(\NLW_blk00000003/blk0000021f/blk0000023a_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk0000021f/blk00000239 ( + .A0(\blk00000003/sig00000746 ), + .A1(\blk00000003/blk0000021f/sig00000de4 ), + .A2(\blk00000003/blk0000021f/sig00000de4 ), + .A3(\blk00000003/blk0000021f/sig00000de4 ), + .CE(\blk00000003/blk0000021f/sig00000dfd ), + .CLK(clk), + .D(\blk00000003/sig000007a7 ), + .Q(\blk00000003/blk0000021f/sig00000de7 ), + .Q15(\NLW_blk00000003/blk0000021f/blk00000239_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk0000021f/blk00000238 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk0000021f/sig00000dfc ), + .Q(\blk00000003/sig000005cb ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk0000021f/blk00000237 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk0000021f/sig00000dfb ), + .Q(\blk00000003/sig000005cc ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk0000021f/blk00000236 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk0000021f/sig00000dfa ), + .Q(\blk00000003/sig000005cd ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk0000021f/blk00000235 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk0000021f/sig00000df9 ), + .Q(\blk00000003/sig000005ce ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk0000021f/blk00000234 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk0000021f/sig00000df8 ), + .Q(\blk00000003/sig000005cf ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk0000021f/blk00000233 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk0000021f/sig00000df7 ), + .Q(\blk00000003/sig000005d0 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk0000021f/blk00000232 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk0000021f/sig00000df6 ), + .Q(\blk00000003/sig000005d1 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk0000021f/blk00000231 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk0000021f/sig00000df5 ), + .Q(\blk00000003/sig000005d2 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk0000021f/blk00000230 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk0000021f/sig00000df4 ), + .Q(\blk00000003/sig000005d3 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk0000021f/blk0000022f ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk0000021f/sig00000df3 ), + .Q(\blk00000003/sig000005d4 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk0000021f/blk0000022e ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk0000021f/sig00000df2 ), + .Q(\blk00000003/sig000005d5 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk0000021f/blk0000022d ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk0000021f/sig00000df1 ), + .Q(\blk00000003/sig000005d6 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk0000021f/blk0000022c ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk0000021f/sig00000df0 ), + .Q(\blk00000003/sig000005d7 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk0000021f/blk0000022b ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk0000021f/sig00000def ), + .Q(\blk00000003/sig000005d8 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk0000021f/blk0000022a ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk0000021f/sig00000dee ), + .Q(\blk00000003/sig000005d9 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk0000021f/blk00000229 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk0000021f/sig00000ded ), + .Q(\blk00000003/sig000005da ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk0000021f/blk00000228 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk0000021f/sig00000dec ), + .Q(\blk00000003/sig000005db ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk0000021f/blk00000227 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk0000021f/sig00000deb ), + .Q(\blk00000003/sig000005dc ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk0000021f/blk00000226 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk0000021f/sig00000dea ), + .Q(\blk00000003/sig000005dd ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk0000021f/blk00000225 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk0000021f/sig00000de9 ), + .Q(\blk00000003/sig000005de ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk0000021f/blk00000224 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk0000021f/sig00000de8 ), + .Q(\blk00000003/sig000005df ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk0000021f/blk00000223 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk0000021f/sig00000de7 ), + .Q(\blk00000003/sig000005e0 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk0000021f/blk00000222 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk0000021f/sig00000de6 ), + .Q(\blk00000003/sig000005e1 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk0000021f/blk00000221 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk0000021f/sig00000de5 ), + .Q(\blk00000003/sig000005e2 ) + ); + GND \blk00000003/blk0000021f/blk00000220 ( + .G(\blk00000003/blk0000021f/sig00000de4 ) + ); + LUT2 #( + .INIT ( 4'h8 )) + \blk00000003/blk00000252/blk00000284 ( + .I0(ce), + .I1(\blk00000003/sig00000742 ), + .O(\blk00000003/blk00000252/sig00000e4b ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000252/blk00000283 ( + .A0(\blk00000003/sig00000748 ), + .A1(\blk00000003/blk00000252/sig00000e32 ), + .A2(\blk00000003/blk00000252/sig00000e32 ), + .A3(\blk00000003/blk00000252/sig00000e32 ), + .CE(\blk00000003/blk00000252/sig00000e4b ), + .CLK(clk), + .D(\blk00000003/sig000006a4 ), + .Q(\blk00000003/blk00000252/sig00000e49 ), + .Q15(\NLW_blk00000003/blk00000252/blk00000283_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000252/blk00000282 ( + .A0(\blk00000003/sig00000748 ), + .A1(\blk00000003/blk00000252/sig00000e32 ), + .A2(\blk00000003/blk00000252/sig00000e32 ), + .A3(\blk00000003/blk00000252/sig00000e32 ), + .CE(\blk00000003/blk00000252/sig00000e4b ), + .CLK(clk), + .D(\blk00000003/sig000006a5 ), + .Q(\blk00000003/blk00000252/sig00000e48 ), + .Q15(\NLW_blk00000003/blk00000252/blk00000282_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000252/blk00000281 ( + .A0(\blk00000003/sig00000748 ), + .A1(\blk00000003/blk00000252/sig00000e32 ), + .A2(\blk00000003/blk00000252/sig00000e32 ), + .A3(\blk00000003/blk00000252/sig00000e32 ), + .CE(\blk00000003/blk00000252/sig00000e4b ), + .CLK(clk), + .D(\blk00000003/sig000006a3 ), + .Q(\blk00000003/blk00000252/sig00000e4a ), + .Q15(\NLW_blk00000003/blk00000252/blk00000281_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000252/blk00000280 ( + .A0(\blk00000003/sig00000748 ), + .A1(\blk00000003/blk00000252/sig00000e32 ), + .A2(\blk00000003/blk00000252/sig00000e32 ), + .A3(\blk00000003/blk00000252/sig00000e32 ), + .CE(\blk00000003/blk00000252/sig00000e4b ), + .CLK(clk), + .D(\blk00000003/sig000006a7 ), + .Q(\blk00000003/blk00000252/sig00000e46 ), + .Q15(\NLW_blk00000003/blk00000252/blk00000280_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000252/blk0000027f ( + .A0(\blk00000003/sig00000748 ), + .A1(\blk00000003/blk00000252/sig00000e32 ), + .A2(\blk00000003/blk00000252/sig00000e32 ), + .A3(\blk00000003/blk00000252/sig00000e32 ), + .CE(\blk00000003/blk00000252/sig00000e4b ), + .CLK(clk), + .D(\blk00000003/sig000006a8 ), + .Q(\blk00000003/blk00000252/sig00000e45 ), + .Q15(\NLW_blk00000003/blk00000252/blk0000027f_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000252/blk0000027e ( + .A0(\blk00000003/sig00000748 ), + .A1(\blk00000003/blk00000252/sig00000e32 ), + .A2(\blk00000003/blk00000252/sig00000e32 ), + .A3(\blk00000003/blk00000252/sig00000e32 ), + .CE(\blk00000003/blk00000252/sig00000e4b ), + .CLK(clk), + .D(\blk00000003/sig000006a6 ), + .Q(\blk00000003/blk00000252/sig00000e47 ), + .Q15(\NLW_blk00000003/blk00000252/blk0000027e_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000252/blk0000027d ( + .A0(\blk00000003/sig00000748 ), + .A1(\blk00000003/blk00000252/sig00000e32 ), + .A2(\blk00000003/blk00000252/sig00000e32 ), + .A3(\blk00000003/blk00000252/sig00000e32 ), + .CE(\blk00000003/blk00000252/sig00000e4b ), + .CLK(clk), + .D(\blk00000003/sig000006aa ), + .Q(\blk00000003/blk00000252/sig00000e43 ), + .Q15(\NLW_blk00000003/blk00000252/blk0000027d_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000252/blk0000027c ( + .A0(\blk00000003/sig00000748 ), + .A1(\blk00000003/blk00000252/sig00000e32 ), + .A2(\blk00000003/blk00000252/sig00000e32 ), + .A3(\blk00000003/blk00000252/sig00000e32 ), + .CE(\blk00000003/blk00000252/sig00000e4b ), + .CLK(clk), + .D(\blk00000003/sig000006ab ), + .Q(\blk00000003/blk00000252/sig00000e42 ), + .Q15(\NLW_blk00000003/blk00000252/blk0000027c_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000252/blk0000027b ( + .A0(\blk00000003/sig00000748 ), + .A1(\blk00000003/blk00000252/sig00000e32 ), + .A2(\blk00000003/blk00000252/sig00000e32 ), + .A3(\blk00000003/blk00000252/sig00000e32 ), + .CE(\blk00000003/blk00000252/sig00000e4b ), + .CLK(clk), + .D(\blk00000003/sig000006a9 ), + .Q(\blk00000003/blk00000252/sig00000e44 ), + .Q15(\NLW_blk00000003/blk00000252/blk0000027b_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000252/blk0000027a ( + .A0(\blk00000003/sig00000748 ), + .A1(\blk00000003/blk00000252/sig00000e32 ), + .A2(\blk00000003/blk00000252/sig00000e32 ), + .A3(\blk00000003/blk00000252/sig00000e32 ), + .CE(\blk00000003/blk00000252/sig00000e4b ), + .CLK(clk), + .D(\blk00000003/sig000006ad ), + .Q(\blk00000003/blk00000252/sig00000e40 ), + .Q15(\NLW_blk00000003/blk00000252/blk0000027a_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000252/blk00000279 ( + .A0(\blk00000003/sig00000748 ), + .A1(\blk00000003/blk00000252/sig00000e32 ), + .A2(\blk00000003/blk00000252/sig00000e32 ), + .A3(\blk00000003/blk00000252/sig00000e32 ), + .CE(\blk00000003/blk00000252/sig00000e4b ), + .CLK(clk), + .D(\blk00000003/sig000006ae ), + .Q(\blk00000003/blk00000252/sig00000e3f ), + .Q15(\NLW_blk00000003/blk00000252/blk00000279_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000252/blk00000278 ( + .A0(\blk00000003/sig00000748 ), + .A1(\blk00000003/blk00000252/sig00000e32 ), + .A2(\blk00000003/blk00000252/sig00000e32 ), + .A3(\blk00000003/blk00000252/sig00000e32 ), + .CE(\blk00000003/blk00000252/sig00000e4b ), + .CLK(clk), + .D(\blk00000003/sig000006ac ), + .Q(\blk00000003/blk00000252/sig00000e41 ), + .Q15(\NLW_blk00000003/blk00000252/blk00000278_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000252/blk00000277 ( + .A0(\blk00000003/sig00000748 ), + .A1(\blk00000003/blk00000252/sig00000e32 ), + .A2(\blk00000003/blk00000252/sig00000e32 ), + .A3(\blk00000003/blk00000252/sig00000e32 ), + .CE(\blk00000003/blk00000252/sig00000e4b ), + .CLK(clk), + .D(\blk00000003/sig000006b0 ), + .Q(\blk00000003/blk00000252/sig00000e3d ), + .Q15(\NLW_blk00000003/blk00000252/blk00000277_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000252/blk00000276 ( + .A0(\blk00000003/sig00000748 ), + .A1(\blk00000003/blk00000252/sig00000e32 ), + .A2(\blk00000003/blk00000252/sig00000e32 ), + .A3(\blk00000003/blk00000252/sig00000e32 ), + .CE(\blk00000003/blk00000252/sig00000e4b ), + .CLK(clk), + .D(\blk00000003/sig000006b1 ), + .Q(\blk00000003/blk00000252/sig00000e3c ), + .Q15(\NLW_blk00000003/blk00000252/blk00000276_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000252/blk00000275 ( + .A0(\blk00000003/sig00000748 ), + .A1(\blk00000003/blk00000252/sig00000e32 ), + .A2(\blk00000003/blk00000252/sig00000e32 ), + .A3(\blk00000003/blk00000252/sig00000e32 ), + .CE(\blk00000003/blk00000252/sig00000e4b ), + .CLK(clk), + .D(\blk00000003/sig000006af ), + .Q(\blk00000003/blk00000252/sig00000e3e ), + .Q15(\NLW_blk00000003/blk00000252/blk00000275_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000252/blk00000274 ( + .A0(\blk00000003/sig00000748 ), + .A1(\blk00000003/blk00000252/sig00000e32 ), + .A2(\blk00000003/blk00000252/sig00000e32 ), + .A3(\blk00000003/blk00000252/sig00000e32 ), + .CE(\blk00000003/blk00000252/sig00000e4b ), + .CLK(clk), + .D(\blk00000003/sig000006b3 ), + .Q(\blk00000003/blk00000252/sig00000e3a ), + .Q15(\NLW_blk00000003/blk00000252/blk00000274_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000252/blk00000273 ( + .A0(\blk00000003/sig00000748 ), + .A1(\blk00000003/blk00000252/sig00000e32 ), + .A2(\blk00000003/blk00000252/sig00000e32 ), + .A3(\blk00000003/blk00000252/sig00000e32 ), + .CE(\blk00000003/blk00000252/sig00000e4b ), + .CLK(clk), + .D(\blk00000003/sig000006b4 ), + .Q(\blk00000003/blk00000252/sig00000e39 ), + .Q15(\NLW_blk00000003/blk00000252/blk00000273_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000252/blk00000272 ( + .A0(\blk00000003/sig00000748 ), + .A1(\blk00000003/blk00000252/sig00000e32 ), + .A2(\blk00000003/blk00000252/sig00000e32 ), + .A3(\blk00000003/blk00000252/sig00000e32 ), + .CE(\blk00000003/blk00000252/sig00000e4b ), + .CLK(clk), + .D(\blk00000003/sig000006b2 ), + .Q(\blk00000003/blk00000252/sig00000e3b ), + .Q15(\NLW_blk00000003/blk00000252/blk00000272_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000252/blk00000271 ( + .A0(\blk00000003/sig00000748 ), + .A1(\blk00000003/blk00000252/sig00000e32 ), + .A2(\blk00000003/blk00000252/sig00000e32 ), + .A3(\blk00000003/blk00000252/sig00000e32 ), + .CE(\blk00000003/blk00000252/sig00000e4b ), + .CLK(clk), + .D(\blk00000003/sig000006b6 ), + .Q(\blk00000003/blk00000252/sig00000e37 ), + .Q15(\NLW_blk00000003/blk00000252/blk00000271_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000252/blk00000270 ( + .A0(\blk00000003/sig00000748 ), + .A1(\blk00000003/blk00000252/sig00000e32 ), + .A2(\blk00000003/blk00000252/sig00000e32 ), + .A3(\blk00000003/blk00000252/sig00000e32 ), + .CE(\blk00000003/blk00000252/sig00000e4b ), + .CLK(clk), + .D(\blk00000003/sig000006b7 ), + .Q(\blk00000003/blk00000252/sig00000e36 ), + .Q15(\NLW_blk00000003/blk00000252/blk00000270_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000252/blk0000026f ( + .A0(\blk00000003/sig00000748 ), + .A1(\blk00000003/blk00000252/sig00000e32 ), + .A2(\blk00000003/blk00000252/sig00000e32 ), + .A3(\blk00000003/blk00000252/sig00000e32 ), + .CE(\blk00000003/blk00000252/sig00000e4b ), + .CLK(clk), + .D(\blk00000003/sig000006b5 ), + .Q(\blk00000003/blk00000252/sig00000e38 ), + .Q15(\NLW_blk00000003/blk00000252/blk0000026f_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000252/blk0000026e ( + .A0(\blk00000003/sig00000748 ), + .A1(\blk00000003/blk00000252/sig00000e32 ), + .A2(\blk00000003/blk00000252/sig00000e32 ), + .A3(\blk00000003/blk00000252/sig00000e32 ), + .CE(\blk00000003/blk00000252/sig00000e4b ), + .CLK(clk), + .D(\blk00000003/sig000006b9 ), + .Q(\blk00000003/blk00000252/sig00000e34 ), + .Q15(\NLW_blk00000003/blk00000252/blk0000026e_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000252/blk0000026d ( + .A0(\blk00000003/sig00000748 ), + .A1(\blk00000003/blk00000252/sig00000e32 ), + .A2(\blk00000003/blk00000252/sig00000e32 ), + .A3(\blk00000003/blk00000252/sig00000e32 ), + .CE(\blk00000003/blk00000252/sig00000e4b ), + .CLK(clk), + .D(\blk00000003/sig000006ba ), + .Q(\blk00000003/blk00000252/sig00000e33 ), + .Q15(\NLW_blk00000003/blk00000252/blk0000026d_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000252/blk0000026c ( + .A0(\blk00000003/sig00000748 ), + .A1(\blk00000003/blk00000252/sig00000e32 ), + .A2(\blk00000003/blk00000252/sig00000e32 ), + .A3(\blk00000003/blk00000252/sig00000e32 ), + .CE(\blk00000003/blk00000252/sig00000e4b ), + .CLK(clk), + .D(\blk00000003/sig000006b8 ), + .Q(\blk00000003/blk00000252/sig00000e35 ), + .Q15(\NLW_blk00000003/blk00000252/blk0000026c_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000252/blk0000026b ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk00000252/sig00000e4a ), + .Q(\blk00000003/sig00000703 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000252/blk0000026a ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk00000252/sig00000e49 ), + .Q(\blk00000003/sig00000704 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000252/blk00000269 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk00000252/sig00000e48 ), + .Q(\blk00000003/sig00000705 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000252/blk00000268 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk00000252/sig00000e47 ), + .Q(\blk00000003/sig00000706 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000252/blk00000267 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk00000252/sig00000e46 ), + .Q(\blk00000003/sig00000707 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000252/blk00000266 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk00000252/sig00000e45 ), + .Q(\blk00000003/sig00000708 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000252/blk00000265 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk00000252/sig00000e44 ), + .Q(\blk00000003/sig00000709 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000252/blk00000264 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk00000252/sig00000e43 ), + .Q(\blk00000003/sig0000070a ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000252/blk00000263 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk00000252/sig00000e42 ), + .Q(\blk00000003/sig0000070b ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000252/blk00000262 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk00000252/sig00000e41 ), + .Q(\blk00000003/sig0000070c ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000252/blk00000261 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk00000252/sig00000e40 ), + .Q(\blk00000003/sig0000070d ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000252/blk00000260 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk00000252/sig00000e3f ), + .Q(\blk00000003/sig0000070e ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000252/blk0000025f ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk00000252/sig00000e3e ), + .Q(\blk00000003/sig0000070f ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000252/blk0000025e ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk00000252/sig00000e3d ), + .Q(\blk00000003/sig00000710 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000252/blk0000025d ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk00000252/sig00000e3c ), + .Q(\blk00000003/sig00000711 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000252/blk0000025c ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk00000252/sig00000e3b ), + .Q(\blk00000003/sig00000712 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000252/blk0000025b ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk00000252/sig00000e3a ), + .Q(\blk00000003/sig00000713 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000252/blk0000025a ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk00000252/sig00000e39 ), + .Q(\blk00000003/sig00000714 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000252/blk00000259 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk00000252/sig00000e38 ), + .Q(\blk00000003/sig00000715 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000252/blk00000258 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk00000252/sig00000e37 ), + .Q(\blk00000003/sig00000716 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000252/blk00000257 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk00000252/sig00000e36 ), + .Q(\blk00000003/sig00000717 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000252/blk00000256 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk00000252/sig00000e35 ), + .Q(\blk00000003/sig00000718 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000252/blk00000255 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk00000252/sig00000e34 ), + .Q(\blk00000003/sig00000719 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000252/blk00000254 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk00000252/sig00000e33 ), + .Q(\blk00000003/sig0000071a ) + ); + GND \blk00000003/blk00000252/blk00000253 ( + .G(\blk00000003/blk00000252/sig00000e32 ) + ); + LUT2 #( + .INIT ( 4'h8 )) + \blk00000003/blk00000285/blk000002b7 ( + .I0(ce), + .I1(\blk00000003/sig00000744 ), + .O(\blk00000003/blk00000285/sig00000e99 ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000285/blk000002b6 ( + .A0(\blk00000003/sig00000746 ), + .A1(\blk00000003/blk00000285/sig00000e80 ), + .A2(\blk00000003/blk00000285/sig00000e80 ), + .A3(\blk00000003/blk00000285/sig00000e80 ), + .CE(\blk00000003/blk00000285/sig00000e99 ), + .CLK(clk), + .D(\blk00000003/sig000007ab ), + .Q(\blk00000003/blk00000285/sig00000e97 ), + .Q15(\NLW_blk00000003/blk00000285/blk000002b6_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000285/blk000002b5 ( + .A0(\blk00000003/sig00000746 ), + .A1(\blk00000003/blk00000285/sig00000e80 ), + .A2(\blk00000003/blk00000285/sig00000e80 ), + .A3(\blk00000003/blk00000285/sig00000e80 ), + .CE(\blk00000003/blk00000285/sig00000e99 ), + .CLK(clk), + .D(\blk00000003/sig000007ac ), + .Q(\blk00000003/blk00000285/sig00000e96 ), + .Q15(\NLW_blk00000003/blk00000285/blk000002b5_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000285/blk000002b4 ( + .A0(\blk00000003/sig00000746 ), + .A1(\blk00000003/blk00000285/sig00000e80 ), + .A2(\blk00000003/blk00000285/sig00000e80 ), + .A3(\blk00000003/blk00000285/sig00000e80 ), + .CE(\blk00000003/blk00000285/sig00000e99 ), + .CLK(clk), + .D(\blk00000003/sig000007aa ), + .Q(\blk00000003/blk00000285/sig00000e98 ), + .Q15(\NLW_blk00000003/blk00000285/blk000002b4_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000285/blk000002b3 ( + .A0(\blk00000003/sig00000746 ), + .A1(\blk00000003/blk00000285/sig00000e80 ), + .A2(\blk00000003/blk00000285/sig00000e80 ), + .A3(\blk00000003/blk00000285/sig00000e80 ), + .CE(\blk00000003/blk00000285/sig00000e99 ), + .CLK(clk), + .D(\blk00000003/sig000007ae ), + .Q(\blk00000003/blk00000285/sig00000e94 ), + .Q15(\NLW_blk00000003/blk00000285/blk000002b3_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000285/blk000002b2 ( + .A0(\blk00000003/sig00000746 ), + .A1(\blk00000003/blk00000285/sig00000e80 ), + .A2(\blk00000003/blk00000285/sig00000e80 ), + .A3(\blk00000003/blk00000285/sig00000e80 ), + .CE(\blk00000003/blk00000285/sig00000e99 ), + .CLK(clk), + .D(\blk00000003/sig000007af ), + .Q(\blk00000003/blk00000285/sig00000e93 ), + .Q15(\NLW_blk00000003/blk00000285/blk000002b2_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000285/blk000002b1 ( + .A0(\blk00000003/sig00000746 ), + .A1(\blk00000003/blk00000285/sig00000e80 ), + .A2(\blk00000003/blk00000285/sig00000e80 ), + .A3(\blk00000003/blk00000285/sig00000e80 ), + .CE(\blk00000003/blk00000285/sig00000e99 ), + .CLK(clk), + .D(\blk00000003/sig000007ad ), + .Q(\blk00000003/blk00000285/sig00000e95 ), + .Q15(\NLW_blk00000003/blk00000285/blk000002b1_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000285/blk000002b0 ( + .A0(\blk00000003/sig00000746 ), + .A1(\blk00000003/blk00000285/sig00000e80 ), + .A2(\blk00000003/blk00000285/sig00000e80 ), + .A3(\blk00000003/blk00000285/sig00000e80 ), + .CE(\blk00000003/blk00000285/sig00000e99 ), + .CLK(clk), + .D(\blk00000003/sig000007b1 ), + .Q(\blk00000003/blk00000285/sig00000e91 ), + .Q15(\NLW_blk00000003/blk00000285/blk000002b0_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000285/blk000002af ( + .A0(\blk00000003/sig00000746 ), + .A1(\blk00000003/blk00000285/sig00000e80 ), + .A2(\blk00000003/blk00000285/sig00000e80 ), + .A3(\blk00000003/blk00000285/sig00000e80 ), + .CE(\blk00000003/blk00000285/sig00000e99 ), + .CLK(clk), + .D(\blk00000003/sig000007b2 ), + .Q(\blk00000003/blk00000285/sig00000e90 ), + .Q15(\NLW_blk00000003/blk00000285/blk000002af_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000285/blk000002ae ( + .A0(\blk00000003/sig00000746 ), + .A1(\blk00000003/blk00000285/sig00000e80 ), + .A2(\blk00000003/blk00000285/sig00000e80 ), + .A3(\blk00000003/blk00000285/sig00000e80 ), + .CE(\blk00000003/blk00000285/sig00000e99 ), + .CLK(clk), + .D(\blk00000003/sig000007b0 ), + .Q(\blk00000003/blk00000285/sig00000e92 ), + .Q15(\NLW_blk00000003/blk00000285/blk000002ae_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000285/blk000002ad ( + .A0(\blk00000003/sig00000746 ), + .A1(\blk00000003/blk00000285/sig00000e80 ), + .A2(\blk00000003/blk00000285/sig00000e80 ), + .A3(\blk00000003/blk00000285/sig00000e80 ), + .CE(\blk00000003/blk00000285/sig00000e99 ), + .CLK(clk), + .D(\blk00000003/sig000007b4 ), + .Q(\blk00000003/blk00000285/sig00000e8e ), + .Q15(\NLW_blk00000003/blk00000285/blk000002ad_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000285/blk000002ac ( + .A0(\blk00000003/sig00000746 ), + .A1(\blk00000003/blk00000285/sig00000e80 ), + .A2(\blk00000003/blk00000285/sig00000e80 ), + .A3(\blk00000003/blk00000285/sig00000e80 ), + .CE(\blk00000003/blk00000285/sig00000e99 ), + .CLK(clk), + .D(\blk00000003/sig000007b5 ), + .Q(\blk00000003/blk00000285/sig00000e8d ), + .Q15(\NLW_blk00000003/blk00000285/blk000002ac_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000285/blk000002ab ( + .A0(\blk00000003/sig00000746 ), + .A1(\blk00000003/blk00000285/sig00000e80 ), + .A2(\blk00000003/blk00000285/sig00000e80 ), + .A3(\blk00000003/blk00000285/sig00000e80 ), + .CE(\blk00000003/blk00000285/sig00000e99 ), + .CLK(clk), + .D(\blk00000003/sig000007b3 ), + .Q(\blk00000003/blk00000285/sig00000e8f ), + .Q15(\NLW_blk00000003/blk00000285/blk000002ab_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000285/blk000002aa ( + .A0(\blk00000003/sig00000746 ), + .A1(\blk00000003/blk00000285/sig00000e80 ), + .A2(\blk00000003/blk00000285/sig00000e80 ), + .A3(\blk00000003/blk00000285/sig00000e80 ), + .CE(\blk00000003/blk00000285/sig00000e99 ), + .CLK(clk), + .D(\blk00000003/sig000007b7 ), + .Q(\blk00000003/blk00000285/sig00000e8b ), + .Q15(\NLW_blk00000003/blk00000285/blk000002aa_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000285/blk000002a9 ( + .A0(\blk00000003/sig00000746 ), + .A1(\blk00000003/blk00000285/sig00000e80 ), + .A2(\blk00000003/blk00000285/sig00000e80 ), + .A3(\blk00000003/blk00000285/sig00000e80 ), + .CE(\blk00000003/blk00000285/sig00000e99 ), + .CLK(clk), + .D(\blk00000003/sig000007b8 ), + .Q(\blk00000003/blk00000285/sig00000e8a ), + .Q15(\NLW_blk00000003/blk00000285/blk000002a9_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000285/blk000002a8 ( + .A0(\blk00000003/sig00000746 ), + .A1(\blk00000003/blk00000285/sig00000e80 ), + .A2(\blk00000003/blk00000285/sig00000e80 ), + .A3(\blk00000003/blk00000285/sig00000e80 ), + .CE(\blk00000003/blk00000285/sig00000e99 ), + .CLK(clk), + .D(\blk00000003/sig000007b6 ), + .Q(\blk00000003/blk00000285/sig00000e8c ), + .Q15(\NLW_blk00000003/blk00000285/blk000002a8_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000285/blk000002a7 ( + .A0(\blk00000003/sig00000746 ), + .A1(\blk00000003/blk00000285/sig00000e80 ), + .A2(\blk00000003/blk00000285/sig00000e80 ), + .A3(\blk00000003/blk00000285/sig00000e80 ), + .CE(\blk00000003/blk00000285/sig00000e99 ), + .CLK(clk), + .D(\blk00000003/sig000007ba ), + .Q(\blk00000003/blk00000285/sig00000e88 ), + .Q15(\NLW_blk00000003/blk00000285/blk000002a7_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000285/blk000002a6 ( + .A0(\blk00000003/sig00000746 ), + .A1(\blk00000003/blk00000285/sig00000e80 ), + .A2(\blk00000003/blk00000285/sig00000e80 ), + .A3(\blk00000003/blk00000285/sig00000e80 ), + .CE(\blk00000003/blk00000285/sig00000e99 ), + .CLK(clk), + .D(\blk00000003/sig000007bb ), + .Q(\blk00000003/blk00000285/sig00000e87 ), + .Q15(\NLW_blk00000003/blk00000285/blk000002a6_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000285/blk000002a5 ( + .A0(\blk00000003/sig00000746 ), + .A1(\blk00000003/blk00000285/sig00000e80 ), + .A2(\blk00000003/blk00000285/sig00000e80 ), + .A3(\blk00000003/blk00000285/sig00000e80 ), + .CE(\blk00000003/blk00000285/sig00000e99 ), + .CLK(clk), + .D(\blk00000003/sig000007b9 ), + .Q(\blk00000003/blk00000285/sig00000e89 ), + .Q15(\NLW_blk00000003/blk00000285/blk000002a5_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000285/blk000002a4 ( + .A0(\blk00000003/sig00000746 ), + .A1(\blk00000003/blk00000285/sig00000e80 ), + .A2(\blk00000003/blk00000285/sig00000e80 ), + .A3(\blk00000003/blk00000285/sig00000e80 ), + .CE(\blk00000003/blk00000285/sig00000e99 ), + .CLK(clk), + .D(\blk00000003/sig000007bd ), + .Q(\blk00000003/blk00000285/sig00000e85 ), + .Q15(\NLW_blk00000003/blk00000285/blk000002a4_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000285/blk000002a3 ( + .A0(\blk00000003/sig00000746 ), + .A1(\blk00000003/blk00000285/sig00000e80 ), + .A2(\blk00000003/blk00000285/sig00000e80 ), + .A3(\blk00000003/blk00000285/sig00000e80 ), + .CE(\blk00000003/blk00000285/sig00000e99 ), + .CLK(clk), + .D(\blk00000003/sig000007be ), + .Q(\blk00000003/blk00000285/sig00000e84 ), + .Q15(\NLW_blk00000003/blk00000285/blk000002a3_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000285/blk000002a2 ( + .A0(\blk00000003/sig00000746 ), + .A1(\blk00000003/blk00000285/sig00000e80 ), + .A2(\blk00000003/blk00000285/sig00000e80 ), + .A3(\blk00000003/blk00000285/sig00000e80 ), + .CE(\blk00000003/blk00000285/sig00000e99 ), + .CLK(clk), + .D(\blk00000003/sig000007bc ), + .Q(\blk00000003/blk00000285/sig00000e86 ), + .Q15(\NLW_blk00000003/blk00000285/blk000002a2_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000285/blk000002a1 ( + .A0(\blk00000003/sig00000746 ), + .A1(\blk00000003/blk00000285/sig00000e80 ), + .A2(\blk00000003/blk00000285/sig00000e80 ), + .A3(\blk00000003/blk00000285/sig00000e80 ), + .CE(\blk00000003/blk00000285/sig00000e99 ), + .CLK(clk), + .D(\blk00000003/sig000007c0 ), + .Q(\blk00000003/blk00000285/sig00000e82 ), + .Q15(\NLW_blk00000003/blk00000285/blk000002a1_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000285/blk000002a0 ( + .A0(\blk00000003/sig00000746 ), + .A1(\blk00000003/blk00000285/sig00000e80 ), + .A2(\blk00000003/blk00000285/sig00000e80 ), + .A3(\blk00000003/blk00000285/sig00000e80 ), + .CE(\blk00000003/blk00000285/sig00000e99 ), + .CLK(clk), + .D(\blk00000003/sig000007c1 ), + .Q(\blk00000003/blk00000285/sig00000e81 ), + .Q15(\NLW_blk00000003/blk00000285/blk000002a0_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000285/blk0000029f ( + .A0(\blk00000003/sig00000746 ), + .A1(\blk00000003/blk00000285/sig00000e80 ), + .A2(\blk00000003/blk00000285/sig00000e80 ), + .A3(\blk00000003/blk00000285/sig00000e80 ), + .CE(\blk00000003/blk00000285/sig00000e99 ), + .CLK(clk), + .D(\blk00000003/sig000007bf ), + .Q(\blk00000003/blk00000285/sig00000e83 ), + .Q15(\NLW_blk00000003/blk00000285/blk0000029f_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000285/blk0000029e ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk00000285/sig00000e98 ), + .Q(\blk00000003/sig0000071b ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000285/blk0000029d ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk00000285/sig00000e97 ), + .Q(\blk00000003/sig0000071c ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000285/blk0000029c ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk00000285/sig00000e96 ), + .Q(\blk00000003/sig0000071d ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000285/blk0000029b ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk00000285/sig00000e95 ), + .Q(\blk00000003/sig0000071e ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000285/blk0000029a ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk00000285/sig00000e94 ), + .Q(\blk00000003/sig0000071f ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000285/blk00000299 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk00000285/sig00000e93 ), + .Q(\blk00000003/sig00000720 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000285/blk00000298 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk00000285/sig00000e92 ), + .Q(\blk00000003/sig00000721 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000285/blk00000297 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk00000285/sig00000e91 ), + .Q(\blk00000003/sig00000722 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000285/blk00000296 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk00000285/sig00000e90 ), + .Q(\blk00000003/sig00000723 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000285/blk00000295 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk00000285/sig00000e8f ), + .Q(\blk00000003/sig00000724 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000285/blk00000294 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk00000285/sig00000e8e ), + .Q(\blk00000003/sig00000725 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000285/blk00000293 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk00000285/sig00000e8d ), + .Q(\blk00000003/sig00000726 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000285/blk00000292 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk00000285/sig00000e8c ), + .Q(\blk00000003/sig00000727 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000285/blk00000291 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk00000285/sig00000e8b ), + .Q(\blk00000003/sig00000728 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000285/blk00000290 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk00000285/sig00000e8a ), + .Q(\blk00000003/sig00000729 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000285/blk0000028f ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk00000285/sig00000e89 ), + .Q(\blk00000003/sig0000072a ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000285/blk0000028e ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk00000285/sig00000e88 ), + .Q(\blk00000003/sig0000072b ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000285/blk0000028d ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk00000285/sig00000e87 ), + .Q(\blk00000003/sig0000072c ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000285/blk0000028c ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk00000285/sig00000e86 ), + .Q(\blk00000003/sig0000072d ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000285/blk0000028b ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk00000285/sig00000e85 ), + .Q(\blk00000003/sig0000072e ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000285/blk0000028a ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk00000285/sig00000e84 ), + .Q(\blk00000003/sig0000072f ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000285/blk00000289 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk00000285/sig00000e83 ), + .Q(\blk00000003/sig00000730 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000285/blk00000288 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk00000285/sig00000e82 ), + .Q(\blk00000003/sig00000731 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000285/blk00000287 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk00000285/sig00000e81 ), + .Q(\blk00000003/sig00000732 ) + ); + GND \blk00000003/blk00000285/blk00000286 ( + .G(\blk00000003/blk00000285/sig00000e80 ) + ); + LUT2 #( + .INIT ( 4'h8 )) + \blk00000003/blk000002b8/blk000002ea ( + .I0(ce), + .I1(\blk00000003/sig0000074e ), + .O(\blk00000003/blk000002b8/sig00000ee7 ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk000002b8/blk000002e9 ( + .A0(\blk00000003/sig00000751 ), + .A1(\blk00000003/blk000002b8/sig00000ece ), + .A2(\blk00000003/blk000002b8/sig00000ece ), + .A3(\blk00000003/blk000002b8/sig00000ece ), + .CE(\blk00000003/blk000002b8/sig00000ee7 ), + .CLK(clk), + .D(\blk00000003/sig000004d0 ), + .Q(\blk00000003/blk000002b8/sig00000ee5 ), + .Q15(\NLW_blk00000003/blk000002b8/blk000002e9_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk000002b8/blk000002e8 ( + .A0(\blk00000003/sig00000751 ), + .A1(\blk00000003/blk000002b8/sig00000ece ), + .A2(\blk00000003/blk000002b8/sig00000ece ), + .A3(\blk00000003/blk000002b8/sig00000ece ), + .CE(\blk00000003/blk000002b8/sig00000ee7 ), + .CLK(clk), + .D(\blk00000003/sig000004d1 ), + .Q(\blk00000003/blk000002b8/sig00000ee4 ), + .Q15(\NLW_blk00000003/blk000002b8/blk000002e8_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk000002b8/blk000002e7 ( + .A0(\blk00000003/sig00000751 ), + .A1(\blk00000003/blk000002b8/sig00000ece ), + .A2(\blk00000003/blk000002b8/sig00000ece ), + .A3(\blk00000003/blk000002b8/sig00000ece ), + .CE(\blk00000003/blk000002b8/sig00000ee7 ), + .CLK(clk), + .D(\blk00000003/sig000004cf ), + .Q(\blk00000003/blk000002b8/sig00000ee6 ), + .Q15(\NLW_blk00000003/blk000002b8/blk000002e7_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk000002b8/blk000002e6 ( + .A0(\blk00000003/sig00000751 ), + .A1(\blk00000003/blk000002b8/sig00000ece ), + .A2(\blk00000003/blk000002b8/sig00000ece ), + .A3(\blk00000003/blk000002b8/sig00000ece ), + .CE(\blk00000003/blk000002b8/sig00000ee7 ), + .CLK(clk), + .D(\blk00000003/sig000004d3 ), + .Q(\blk00000003/blk000002b8/sig00000ee2 ), + .Q15(\NLW_blk00000003/blk000002b8/blk000002e6_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk000002b8/blk000002e5 ( + .A0(\blk00000003/sig00000751 ), + .A1(\blk00000003/blk000002b8/sig00000ece ), + .A2(\blk00000003/blk000002b8/sig00000ece ), + .A3(\blk00000003/blk000002b8/sig00000ece ), + .CE(\blk00000003/blk000002b8/sig00000ee7 ), + .CLK(clk), + .D(\blk00000003/sig000004d4 ), + .Q(\blk00000003/blk000002b8/sig00000ee1 ), + .Q15(\NLW_blk00000003/blk000002b8/blk000002e5_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk000002b8/blk000002e4 ( + .A0(\blk00000003/sig00000751 ), + .A1(\blk00000003/blk000002b8/sig00000ece ), + .A2(\blk00000003/blk000002b8/sig00000ece ), + .A3(\blk00000003/blk000002b8/sig00000ece ), + .CE(\blk00000003/blk000002b8/sig00000ee7 ), + .CLK(clk), + .D(\blk00000003/sig000004d2 ), + .Q(\blk00000003/blk000002b8/sig00000ee3 ), + .Q15(\NLW_blk00000003/blk000002b8/blk000002e4_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk000002b8/blk000002e3 ( + .A0(\blk00000003/sig00000751 ), + .A1(\blk00000003/blk000002b8/sig00000ece ), + .A2(\blk00000003/blk000002b8/sig00000ece ), + .A3(\blk00000003/blk000002b8/sig00000ece ), + .CE(\blk00000003/blk000002b8/sig00000ee7 ), + .CLK(clk), + .D(\blk00000003/sig000004d6 ), + .Q(\blk00000003/blk000002b8/sig00000edf ), + .Q15(\NLW_blk00000003/blk000002b8/blk000002e3_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk000002b8/blk000002e2 ( + .A0(\blk00000003/sig00000751 ), + .A1(\blk00000003/blk000002b8/sig00000ece ), + .A2(\blk00000003/blk000002b8/sig00000ece ), + .A3(\blk00000003/blk000002b8/sig00000ece ), + .CE(\blk00000003/blk000002b8/sig00000ee7 ), + .CLK(clk), + .D(\blk00000003/sig000004d7 ), + .Q(\blk00000003/blk000002b8/sig00000ede ), + .Q15(\NLW_blk00000003/blk000002b8/blk000002e2_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk000002b8/blk000002e1 ( + .A0(\blk00000003/sig00000751 ), + .A1(\blk00000003/blk000002b8/sig00000ece ), + .A2(\blk00000003/blk000002b8/sig00000ece ), + .A3(\blk00000003/blk000002b8/sig00000ece ), + .CE(\blk00000003/blk000002b8/sig00000ee7 ), + .CLK(clk), + .D(\blk00000003/sig000004d5 ), + .Q(\blk00000003/blk000002b8/sig00000ee0 ), + .Q15(\NLW_blk00000003/blk000002b8/blk000002e1_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk000002b8/blk000002e0 ( + .A0(\blk00000003/sig00000751 ), + .A1(\blk00000003/blk000002b8/sig00000ece ), + .A2(\blk00000003/blk000002b8/sig00000ece ), + .A3(\blk00000003/blk000002b8/sig00000ece ), + .CE(\blk00000003/blk000002b8/sig00000ee7 ), + .CLK(clk), + .D(\blk00000003/sig000004d9 ), + .Q(\blk00000003/blk000002b8/sig00000edc ), + .Q15(\NLW_blk00000003/blk000002b8/blk000002e0_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk000002b8/blk000002df ( + .A0(\blk00000003/sig00000751 ), + .A1(\blk00000003/blk000002b8/sig00000ece ), + .A2(\blk00000003/blk000002b8/sig00000ece ), + .A3(\blk00000003/blk000002b8/sig00000ece ), + .CE(\blk00000003/blk000002b8/sig00000ee7 ), + .CLK(clk), + .D(\blk00000003/sig000004da ), + .Q(\blk00000003/blk000002b8/sig00000edb ), + .Q15(\NLW_blk00000003/blk000002b8/blk000002df_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk000002b8/blk000002de ( + .A0(\blk00000003/sig00000751 ), + .A1(\blk00000003/blk000002b8/sig00000ece ), + .A2(\blk00000003/blk000002b8/sig00000ece ), + .A3(\blk00000003/blk000002b8/sig00000ece ), + .CE(\blk00000003/blk000002b8/sig00000ee7 ), + .CLK(clk), + .D(\blk00000003/sig000004d8 ), + .Q(\blk00000003/blk000002b8/sig00000edd ), + .Q15(\NLW_blk00000003/blk000002b8/blk000002de_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk000002b8/blk000002dd ( + .A0(\blk00000003/sig00000751 ), + .A1(\blk00000003/blk000002b8/sig00000ece ), + .A2(\blk00000003/blk000002b8/sig00000ece ), + .A3(\blk00000003/blk000002b8/sig00000ece ), + .CE(\blk00000003/blk000002b8/sig00000ee7 ), + .CLK(clk), + .D(\blk00000003/sig000004dc ), + .Q(\blk00000003/blk000002b8/sig00000ed9 ), + .Q15(\NLW_blk00000003/blk000002b8/blk000002dd_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk000002b8/blk000002dc ( + .A0(\blk00000003/sig00000751 ), + .A1(\blk00000003/blk000002b8/sig00000ece ), + .A2(\blk00000003/blk000002b8/sig00000ece ), + .A3(\blk00000003/blk000002b8/sig00000ece ), + .CE(\blk00000003/blk000002b8/sig00000ee7 ), + .CLK(clk), + .D(\blk00000003/sig000004dd ), + .Q(\blk00000003/blk000002b8/sig00000ed8 ), + .Q15(\NLW_blk00000003/blk000002b8/blk000002dc_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk000002b8/blk000002db ( + .A0(\blk00000003/sig00000751 ), + .A1(\blk00000003/blk000002b8/sig00000ece ), + .A2(\blk00000003/blk000002b8/sig00000ece ), + .A3(\blk00000003/blk000002b8/sig00000ece ), + .CE(\blk00000003/blk000002b8/sig00000ee7 ), + .CLK(clk), + .D(\blk00000003/sig000004db ), + .Q(\blk00000003/blk000002b8/sig00000eda ), + .Q15(\NLW_blk00000003/blk000002b8/blk000002db_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk000002b8/blk000002da ( + .A0(\blk00000003/sig00000751 ), + .A1(\blk00000003/blk000002b8/sig00000ece ), + .A2(\blk00000003/blk000002b8/sig00000ece ), + .A3(\blk00000003/blk000002b8/sig00000ece ), + .CE(\blk00000003/blk000002b8/sig00000ee7 ), + .CLK(clk), + .D(\blk00000003/sig000004df ), + .Q(\blk00000003/blk000002b8/sig00000ed6 ), + .Q15(\NLW_blk00000003/blk000002b8/blk000002da_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk000002b8/blk000002d9 ( + .A0(\blk00000003/sig00000751 ), + .A1(\blk00000003/blk000002b8/sig00000ece ), + .A2(\blk00000003/blk000002b8/sig00000ece ), + .A3(\blk00000003/blk000002b8/sig00000ece ), + .CE(\blk00000003/blk000002b8/sig00000ee7 ), + .CLK(clk), + .D(\blk00000003/sig000004e0 ), + .Q(\blk00000003/blk000002b8/sig00000ed5 ), + .Q15(\NLW_blk00000003/blk000002b8/blk000002d9_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk000002b8/blk000002d8 ( + .A0(\blk00000003/sig00000751 ), + .A1(\blk00000003/blk000002b8/sig00000ece ), + .A2(\blk00000003/blk000002b8/sig00000ece ), + .A3(\blk00000003/blk000002b8/sig00000ece ), + .CE(\blk00000003/blk000002b8/sig00000ee7 ), + .CLK(clk), + .D(\blk00000003/sig000004de ), + .Q(\blk00000003/blk000002b8/sig00000ed7 ), + .Q15(\NLW_blk00000003/blk000002b8/blk000002d8_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk000002b8/blk000002d7 ( + .A0(\blk00000003/sig00000751 ), + .A1(\blk00000003/blk000002b8/sig00000ece ), + .A2(\blk00000003/blk000002b8/sig00000ece ), + .A3(\blk00000003/blk000002b8/sig00000ece ), + .CE(\blk00000003/blk000002b8/sig00000ee7 ), + .CLK(clk), + .D(\blk00000003/sig000004e2 ), + .Q(\blk00000003/blk000002b8/sig00000ed3 ), + .Q15(\NLW_blk00000003/blk000002b8/blk000002d7_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk000002b8/blk000002d6 ( + .A0(\blk00000003/sig00000751 ), + .A1(\blk00000003/blk000002b8/sig00000ece ), + .A2(\blk00000003/blk000002b8/sig00000ece ), + .A3(\blk00000003/blk000002b8/sig00000ece ), + .CE(\blk00000003/blk000002b8/sig00000ee7 ), + .CLK(clk), + .D(\blk00000003/sig000004e3 ), + .Q(\blk00000003/blk000002b8/sig00000ed2 ), + .Q15(\NLW_blk00000003/blk000002b8/blk000002d6_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk000002b8/blk000002d5 ( + .A0(\blk00000003/sig00000751 ), + .A1(\blk00000003/blk000002b8/sig00000ece ), + .A2(\blk00000003/blk000002b8/sig00000ece ), + .A3(\blk00000003/blk000002b8/sig00000ece ), + .CE(\blk00000003/blk000002b8/sig00000ee7 ), + .CLK(clk), + .D(\blk00000003/sig000004e1 ), + .Q(\blk00000003/blk000002b8/sig00000ed4 ), + .Q15(\NLW_blk00000003/blk000002b8/blk000002d5_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk000002b8/blk000002d4 ( + .A0(\blk00000003/sig00000751 ), + .A1(\blk00000003/blk000002b8/sig00000ece ), + .A2(\blk00000003/blk000002b8/sig00000ece ), + .A3(\blk00000003/blk000002b8/sig00000ece ), + .CE(\blk00000003/blk000002b8/sig00000ee7 ), + .CLK(clk), + .D(\blk00000003/sig000004e5 ), + .Q(\blk00000003/blk000002b8/sig00000ed0 ), + .Q15(\NLW_blk00000003/blk000002b8/blk000002d4_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk000002b8/blk000002d3 ( + .A0(\blk00000003/sig00000751 ), + .A1(\blk00000003/blk000002b8/sig00000ece ), + .A2(\blk00000003/blk000002b8/sig00000ece ), + .A3(\blk00000003/blk000002b8/sig00000ece ), + .CE(\blk00000003/blk000002b8/sig00000ee7 ), + .CLK(clk), + .D(\blk00000003/sig000004e6 ), + .Q(\blk00000003/blk000002b8/sig00000ecf ), + .Q15(\NLW_blk00000003/blk000002b8/blk000002d3_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk000002b8/blk000002d2 ( + .A0(\blk00000003/sig00000751 ), + .A1(\blk00000003/blk000002b8/sig00000ece ), + .A2(\blk00000003/blk000002b8/sig00000ece ), + .A3(\blk00000003/blk000002b8/sig00000ece ), + .CE(\blk00000003/blk000002b8/sig00000ee7 ), + .CLK(clk), + .D(\blk00000003/sig000004e4 ), + .Q(\blk00000003/blk000002b8/sig00000ed1 ), + .Q15(\NLW_blk00000003/blk000002b8/blk000002d2_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000002b8/blk000002d1 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk000002b8/sig00000ee6 ), + .Q(\blk00000003/sig00000541 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000002b8/blk000002d0 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk000002b8/sig00000ee5 ), + .Q(\blk00000003/sig00000542 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000002b8/blk000002cf ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk000002b8/sig00000ee4 ), + .Q(\blk00000003/sig00000543 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000002b8/blk000002ce ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk000002b8/sig00000ee3 ), + .Q(\blk00000003/sig00000544 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000002b8/blk000002cd ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk000002b8/sig00000ee2 ), + .Q(\blk00000003/sig00000545 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000002b8/blk000002cc ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk000002b8/sig00000ee1 ), + .Q(\blk00000003/sig00000546 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000002b8/blk000002cb ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk000002b8/sig00000ee0 ), + .Q(\blk00000003/sig00000547 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000002b8/blk000002ca ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk000002b8/sig00000edf ), + .Q(\blk00000003/sig00000548 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000002b8/blk000002c9 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk000002b8/sig00000ede ), + .Q(\blk00000003/sig00000549 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000002b8/blk000002c8 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk000002b8/sig00000edd ), + .Q(\blk00000003/sig0000054a ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000002b8/blk000002c7 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk000002b8/sig00000edc ), + .Q(\blk00000003/sig0000054b ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000002b8/blk000002c6 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk000002b8/sig00000edb ), + .Q(\blk00000003/sig0000054c ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000002b8/blk000002c5 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk000002b8/sig00000eda ), + .Q(\blk00000003/sig0000054d ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000002b8/blk000002c4 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk000002b8/sig00000ed9 ), + .Q(\blk00000003/sig0000054e ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000002b8/blk000002c3 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk000002b8/sig00000ed8 ), + .Q(\blk00000003/sig0000054f ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000002b8/blk000002c2 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk000002b8/sig00000ed7 ), + .Q(\blk00000003/sig00000550 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000002b8/blk000002c1 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk000002b8/sig00000ed6 ), + .Q(\blk00000003/sig00000551 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000002b8/blk000002c0 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk000002b8/sig00000ed5 ), + .Q(\blk00000003/sig00000552 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000002b8/blk000002bf ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk000002b8/sig00000ed4 ), + .Q(\blk00000003/sig00000553 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000002b8/blk000002be ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk000002b8/sig00000ed3 ), + .Q(\blk00000003/sig00000554 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000002b8/blk000002bd ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk000002b8/sig00000ed2 ), + .Q(\blk00000003/sig00000555 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000002b8/blk000002bc ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk000002b8/sig00000ed1 ), + .Q(\blk00000003/sig00000556 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000002b8/blk000002bb ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk000002b8/sig00000ed0 ), + .Q(\blk00000003/sig00000557 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000002b8/blk000002ba ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk000002b8/sig00000ecf ), + .Q(\blk00000003/sig00000558 ) + ); + GND \blk00000003/blk000002b8/blk000002b9 ( + .G(\blk00000003/blk000002b8/sig00000ece ) + ); + LUT2 #( + .INIT ( 4'h8 )) + \blk00000003/blk000002eb/blk0000031d ( + .I0(ce), + .I1(\blk00000003/sig0000074f ), + .O(\blk00000003/blk000002eb/sig00000f35 ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk000002eb/blk0000031c ( + .A0(\blk00000003/sig00000750 ), + .A1(\blk00000003/blk000002eb/sig00000f1c ), + .A2(\blk00000003/blk000002eb/sig00000f1c ), + .A3(\blk00000003/blk000002eb/sig00000f1c ), + .CE(\blk00000003/blk000002eb/sig00000f35 ), + .CLK(clk), + .D(\blk00000003/sig000007c3 ), + .Q(\blk00000003/blk000002eb/sig00000f33 ), + .Q15(\NLW_blk00000003/blk000002eb/blk0000031c_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk000002eb/blk0000031b ( + .A0(\blk00000003/sig00000750 ), + .A1(\blk00000003/blk000002eb/sig00000f1c ), + .A2(\blk00000003/blk000002eb/sig00000f1c ), + .A3(\blk00000003/blk000002eb/sig00000f1c ), + .CE(\blk00000003/blk000002eb/sig00000f35 ), + .CLK(clk), + .D(\blk00000003/sig000007c4 ), + .Q(\blk00000003/blk000002eb/sig00000f32 ), + .Q15(\NLW_blk00000003/blk000002eb/blk0000031b_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk000002eb/blk0000031a ( + .A0(\blk00000003/sig00000750 ), + .A1(\blk00000003/blk000002eb/sig00000f1c ), + .A2(\blk00000003/blk000002eb/sig00000f1c ), + .A3(\blk00000003/blk000002eb/sig00000f1c ), + .CE(\blk00000003/blk000002eb/sig00000f35 ), + .CLK(clk), + .D(\blk00000003/sig000007c2 ), + .Q(\blk00000003/blk000002eb/sig00000f34 ), + .Q15(\NLW_blk00000003/blk000002eb/blk0000031a_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk000002eb/blk00000319 ( + .A0(\blk00000003/sig00000750 ), + .A1(\blk00000003/blk000002eb/sig00000f1c ), + .A2(\blk00000003/blk000002eb/sig00000f1c ), + .A3(\blk00000003/blk000002eb/sig00000f1c ), + .CE(\blk00000003/blk000002eb/sig00000f35 ), + .CLK(clk), + .D(\blk00000003/sig000007c6 ), + .Q(\blk00000003/blk000002eb/sig00000f30 ), + .Q15(\NLW_blk00000003/blk000002eb/blk00000319_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk000002eb/blk00000318 ( + .A0(\blk00000003/sig00000750 ), + .A1(\blk00000003/blk000002eb/sig00000f1c ), + .A2(\blk00000003/blk000002eb/sig00000f1c ), + .A3(\blk00000003/blk000002eb/sig00000f1c ), + .CE(\blk00000003/blk000002eb/sig00000f35 ), + .CLK(clk), + .D(\blk00000003/sig000007c7 ), + .Q(\blk00000003/blk000002eb/sig00000f2f ), + .Q15(\NLW_blk00000003/blk000002eb/blk00000318_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk000002eb/blk00000317 ( + .A0(\blk00000003/sig00000750 ), + .A1(\blk00000003/blk000002eb/sig00000f1c ), + .A2(\blk00000003/blk000002eb/sig00000f1c ), + .A3(\blk00000003/blk000002eb/sig00000f1c ), + .CE(\blk00000003/blk000002eb/sig00000f35 ), + .CLK(clk), + .D(\blk00000003/sig000007c5 ), + .Q(\blk00000003/blk000002eb/sig00000f31 ), + .Q15(\NLW_blk00000003/blk000002eb/blk00000317_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk000002eb/blk00000316 ( + .A0(\blk00000003/sig00000750 ), + .A1(\blk00000003/blk000002eb/sig00000f1c ), + .A2(\blk00000003/blk000002eb/sig00000f1c ), + .A3(\blk00000003/blk000002eb/sig00000f1c ), + .CE(\blk00000003/blk000002eb/sig00000f35 ), + .CLK(clk), + .D(\blk00000003/sig000007c9 ), + .Q(\blk00000003/blk000002eb/sig00000f2d ), + .Q15(\NLW_blk00000003/blk000002eb/blk00000316_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk000002eb/blk00000315 ( + .A0(\blk00000003/sig00000750 ), + .A1(\blk00000003/blk000002eb/sig00000f1c ), + .A2(\blk00000003/blk000002eb/sig00000f1c ), + .A3(\blk00000003/blk000002eb/sig00000f1c ), + .CE(\blk00000003/blk000002eb/sig00000f35 ), + .CLK(clk), + .D(\blk00000003/sig000007ca ), + .Q(\blk00000003/blk000002eb/sig00000f2c ), + .Q15(\NLW_blk00000003/blk000002eb/blk00000315_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk000002eb/blk00000314 ( + .A0(\blk00000003/sig00000750 ), + .A1(\blk00000003/blk000002eb/sig00000f1c ), + .A2(\blk00000003/blk000002eb/sig00000f1c ), + .A3(\blk00000003/blk000002eb/sig00000f1c ), + .CE(\blk00000003/blk000002eb/sig00000f35 ), + .CLK(clk), + .D(\blk00000003/sig000007c8 ), + .Q(\blk00000003/blk000002eb/sig00000f2e ), + .Q15(\NLW_blk00000003/blk000002eb/blk00000314_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk000002eb/blk00000313 ( + .A0(\blk00000003/sig00000750 ), + .A1(\blk00000003/blk000002eb/sig00000f1c ), + .A2(\blk00000003/blk000002eb/sig00000f1c ), + .A3(\blk00000003/blk000002eb/sig00000f1c ), + .CE(\blk00000003/blk000002eb/sig00000f35 ), + .CLK(clk), + .D(\blk00000003/sig000007cc ), + .Q(\blk00000003/blk000002eb/sig00000f2a ), + .Q15(\NLW_blk00000003/blk000002eb/blk00000313_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk000002eb/blk00000312 ( + .A0(\blk00000003/sig00000750 ), + .A1(\blk00000003/blk000002eb/sig00000f1c ), + .A2(\blk00000003/blk000002eb/sig00000f1c ), + .A3(\blk00000003/blk000002eb/sig00000f1c ), + .CE(\blk00000003/blk000002eb/sig00000f35 ), + .CLK(clk), + .D(\blk00000003/sig000007cd ), + .Q(\blk00000003/blk000002eb/sig00000f29 ), + .Q15(\NLW_blk00000003/blk000002eb/blk00000312_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk000002eb/blk00000311 ( + .A0(\blk00000003/sig00000750 ), + .A1(\blk00000003/blk000002eb/sig00000f1c ), + .A2(\blk00000003/blk000002eb/sig00000f1c ), + .A3(\blk00000003/blk000002eb/sig00000f1c ), + .CE(\blk00000003/blk000002eb/sig00000f35 ), + .CLK(clk), + .D(\blk00000003/sig000007cb ), + .Q(\blk00000003/blk000002eb/sig00000f2b ), + .Q15(\NLW_blk00000003/blk000002eb/blk00000311_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk000002eb/blk00000310 ( + .A0(\blk00000003/sig00000750 ), + .A1(\blk00000003/blk000002eb/sig00000f1c ), + .A2(\blk00000003/blk000002eb/sig00000f1c ), + .A3(\blk00000003/blk000002eb/sig00000f1c ), + .CE(\blk00000003/blk000002eb/sig00000f35 ), + .CLK(clk), + .D(\blk00000003/sig000007cf ), + .Q(\blk00000003/blk000002eb/sig00000f27 ), + .Q15(\NLW_blk00000003/blk000002eb/blk00000310_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk000002eb/blk0000030f ( + .A0(\blk00000003/sig00000750 ), + .A1(\blk00000003/blk000002eb/sig00000f1c ), + .A2(\blk00000003/blk000002eb/sig00000f1c ), + .A3(\blk00000003/blk000002eb/sig00000f1c ), + .CE(\blk00000003/blk000002eb/sig00000f35 ), + .CLK(clk), + .D(\blk00000003/sig000007d0 ), + .Q(\blk00000003/blk000002eb/sig00000f26 ), + .Q15(\NLW_blk00000003/blk000002eb/blk0000030f_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk000002eb/blk0000030e ( + .A0(\blk00000003/sig00000750 ), + .A1(\blk00000003/blk000002eb/sig00000f1c ), + .A2(\blk00000003/blk000002eb/sig00000f1c ), + .A3(\blk00000003/blk000002eb/sig00000f1c ), + .CE(\blk00000003/blk000002eb/sig00000f35 ), + .CLK(clk), + .D(\blk00000003/sig000007ce ), + .Q(\blk00000003/blk000002eb/sig00000f28 ), + .Q15(\NLW_blk00000003/blk000002eb/blk0000030e_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk000002eb/blk0000030d ( + .A0(\blk00000003/sig00000750 ), + .A1(\blk00000003/blk000002eb/sig00000f1c ), + .A2(\blk00000003/blk000002eb/sig00000f1c ), + .A3(\blk00000003/blk000002eb/sig00000f1c ), + .CE(\blk00000003/blk000002eb/sig00000f35 ), + .CLK(clk), + .D(\blk00000003/sig000007d2 ), + .Q(\blk00000003/blk000002eb/sig00000f24 ), + .Q15(\NLW_blk00000003/blk000002eb/blk0000030d_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk000002eb/blk0000030c ( + .A0(\blk00000003/sig00000750 ), + .A1(\blk00000003/blk000002eb/sig00000f1c ), + .A2(\blk00000003/blk000002eb/sig00000f1c ), + .A3(\blk00000003/blk000002eb/sig00000f1c ), + .CE(\blk00000003/blk000002eb/sig00000f35 ), + .CLK(clk), + .D(\blk00000003/sig000007d3 ), + .Q(\blk00000003/blk000002eb/sig00000f23 ), + .Q15(\NLW_blk00000003/blk000002eb/blk0000030c_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk000002eb/blk0000030b ( + .A0(\blk00000003/sig00000750 ), + .A1(\blk00000003/blk000002eb/sig00000f1c ), + .A2(\blk00000003/blk000002eb/sig00000f1c ), + .A3(\blk00000003/blk000002eb/sig00000f1c ), + .CE(\blk00000003/blk000002eb/sig00000f35 ), + .CLK(clk), + .D(\blk00000003/sig000007d1 ), + .Q(\blk00000003/blk000002eb/sig00000f25 ), + .Q15(\NLW_blk00000003/blk000002eb/blk0000030b_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk000002eb/blk0000030a ( + .A0(\blk00000003/sig00000750 ), + .A1(\blk00000003/blk000002eb/sig00000f1c ), + .A2(\blk00000003/blk000002eb/sig00000f1c ), + .A3(\blk00000003/blk000002eb/sig00000f1c ), + .CE(\blk00000003/blk000002eb/sig00000f35 ), + .CLK(clk), + .D(\blk00000003/sig000007d5 ), + .Q(\blk00000003/blk000002eb/sig00000f21 ), + .Q15(\NLW_blk00000003/blk000002eb/blk0000030a_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk000002eb/blk00000309 ( + .A0(\blk00000003/sig00000750 ), + .A1(\blk00000003/blk000002eb/sig00000f1c ), + .A2(\blk00000003/blk000002eb/sig00000f1c ), + .A3(\blk00000003/blk000002eb/sig00000f1c ), + .CE(\blk00000003/blk000002eb/sig00000f35 ), + .CLK(clk), + .D(\blk00000003/sig000007d6 ), + .Q(\blk00000003/blk000002eb/sig00000f20 ), + .Q15(\NLW_blk00000003/blk000002eb/blk00000309_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk000002eb/blk00000308 ( + .A0(\blk00000003/sig00000750 ), + .A1(\blk00000003/blk000002eb/sig00000f1c ), + .A2(\blk00000003/blk000002eb/sig00000f1c ), + .A3(\blk00000003/blk000002eb/sig00000f1c ), + .CE(\blk00000003/blk000002eb/sig00000f35 ), + .CLK(clk), + .D(\blk00000003/sig000007d4 ), + .Q(\blk00000003/blk000002eb/sig00000f22 ), + .Q15(\NLW_blk00000003/blk000002eb/blk00000308_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk000002eb/blk00000307 ( + .A0(\blk00000003/sig00000750 ), + .A1(\blk00000003/blk000002eb/sig00000f1c ), + .A2(\blk00000003/blk000002eb/sig00000f1c ), + .A3(\blk00000003/blk000002eb/sig00000f1c ), + .CE(\blk00000003/blk000002eb/sig00000f35 ), + .CLK(clk), + .D(\blk00000003/sig000007d8 ), + .Q(\blk00000003/blk000002eb/sig00000f1e ), + .Q15(\NLW_blk00000003/blk000002eb/blk00000307_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk000002eb/blk00000306 ( + .A0(\blk00000003/sig00000750 ), + .A1(\blk00000003/blk000002eb/sig00000f1c ), + .A2(\blk00000003/blk000002eb/sig00000f1c ), + .A3(\blk00000003/blk000002eb/sig00000f1c ), + .CE(\blk00000003/blk000002eb/sig00000f35 ), + .CLK(clk), + .D(\blk00000003/sig000007d9 ), + .Q(\blk00000003/blk000002eb/sig00000f1d ), + .Q15(\NLW_blk00000003/blk000002eb/blk00000306_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk000002eb/blk00000305 ( + .A0(\blk00000003/sig00000750 ), + .A1(\blk00000003/blk000002eb/sig00000f1c ), + .A2(\blk00000003/blk000002eb/sig00000f1c ), + .A3(\blk00000003/blk000002eb/sig00000f1c ), + .CE(\blk00000003/blk000002eb/sig00000f35 ), + .CLK(clk), + .D(\blk00000003/sig000007d7 ), + .Q(\blk00000003/blk000002eb/sig00000f1f ), + .Q15(\NLW_blk00000003/blk000002eb/blk00000305_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000002eb/blk00000304 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk000002eb/sig00000f34 ), + .Q(\blk00000003/sig00000559 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000002eb/blk00000303 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk000002eb/sig00000f33 ), + .Q(\blk00000003/sig0000055a ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000002eb/blk00000302 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk000002eb/sig00000f32 ), + .Q(\blk00000003/sig0000055b ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000002eb/blk00000301 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk000002eb/sig00000f31 ), + .Q(\blk00000003/sig0000055c ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000002eb/blk00000300 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk000002eb/sig00000f30 ), + .Q(\blk00000003/sig0000055d ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000002eb/blk000002ff ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk000002eb/sig00000f2f ), + .Q(\blk00000003/sig0000055e ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000002eb/blk000002fe ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk000002eb/sig00000f2e ), + .Q(\blk00000003/sig0000055f ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000002eb/blk000002fd ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk000002eb/sig00000f2d ), + .Q(\blk00000003/sig00000560 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000002eb/blk000002fc ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk000002eb/sig00000f2c ), + .Q(\blk00000003/sig00000561 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000002eb/blk000002fb ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk000002eb/sig00000f2b ), + .Q(\blk00000003/sig00000562 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000002eb/blk000002fa ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk000002eb/sig00000f2a ), + .Q(\blk00000003/sig00000563 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000002eb/blk000002f9 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk000002eb/sig00000f29 ), + .Q(\blk00000003/sig00000564 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000002eb/blk000002f8 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk000002eb/sig00000f28 ), + .Q(\blk00000003/sig00000565 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000002eb/blk000002f7 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk000002eb/sig00000f27 ), + .Q(\blk00000003/sig00000566 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000002eb/blk000002f6 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk000002eb/sig00000f26 ), + .Q(\blk00000003/sig00000567 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000002eb/blk000002f5 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk000002eb/sig00000f25 ), + .Q(\blk00000003/sig00000568 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000002eb/blk000002f4 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk000002eb/sig00000f24 ), + .Q(\blk00000003/sig00000569 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000002eb/blk000002f3 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk000002eb/sig00000f23 ), + .Q(\blk00000003/sig0000056a ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000002eb/blk000002f2 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk000002eb/sig00000f22 ), + .Q(\blk00000003/sig0000056b ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000002eb/blk000002f1 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk000002eb/sig00000f21 ), + .Q(\blk00000003/sig0000056c ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000002eb/blk000002f0 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk000002eb/sig00000f20 ), + .Q(\blk00000003/sig0000056d ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000002eb/blk000002ef ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk000002eb/sig00000f1f ), + .Q(\blk00000003/sig0000056e ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000002eb/blk000002ee ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk000002eb/sig00000f1e ), + .Q(\blk00000003/sig0000056f ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000002eb/blk000002ed ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk000002eb/sig00000f1d ), + .Q(\blk00000003/sig00000570 ) + ); + GND \blk00000003/blk000002eb/blk000002ec ( + .G(\blk00000003/blk000002eb/sig00000f1c ) + ); + LUT2 #( + .INIT ( 4'h8 )) + \blk00000003/blk0000031e/blk00000350 ( + .I0(ce), + .I1(\blk00000003/sig0000074e ), + .O(\blk00000003/blk0000031e/sig00000f83 ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk0000031e/blk0000034f ( + .A0(\blk00000003/sig00000751 ), + .A1(\blk00000003/blk0000031e/sig00000f6a ), + .A2(\blk00000003/blk0000031e/sig00000f6a ), + .A3(\blk00000003/blk0000031e/sig00000f6a ), + .CE(\blk00000003/blk0000031e/sig00000f83 ), + .CLK(clk), + .D(\blk00000003/sig00000644 ), + .Q(\blk00000003/blk0000031e/sig00000f81 ), + .Q15(\NLW_blk00000003/blk0000031e/blk0000034f_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk0000031e/blk0000034e ( + .A0(\blk00000003/sig00000751 ), + .A1(\blk00000003/blk0000031e/sig00000f6a ), + .A2(\blk00000003/blk0000031e/sig00000f6a ), + .A3(\blk00000003/blk0000031e/sig00000f6a ), + .CE(\blk00000003/blk0000031e/sig00000f83 ), + .CLK(clk), + .D(\blk00000003/sig00000645 ), + .Q(\blk00000003/blk0000031e/sig00000f80 ), + .Q15(\NLW_blk00000003/blk0000031e/blk0000034e_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk0000031e/blk0000034d ( + .A0(\blk00000003/sig00000751 ), + .A1(\blk00000003/blk0000031e/sig00000f6a ), + .A2(\blk00000003/blk0000031e/sig00000f6a ), + .A3(\blk00000003/blk0000031e/sig00000f6a ), + .CE(\blk00000003/blk0000031e/sig00000f83 ), + .CLK(clk), + .D(\blk00000003/sig00000643 ), + .Q(\blk00000003/blk0000031e/sig00000f82 ), + .Q15(\NLW_blk00000003/blk0000031e/blk0000034d_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk0000031e/blk0000034c ( + .A0(\blk00000003/sig00000751 ), + .A1(\blk00000003/blk0000031e/sig00000f6a ), + .A2(\blk00000003/blk0000031e/sig00000f6a ), + .A3(\blk00000003/blk0000031e/sig00000f6a ), + .CE(\blk00000003/blk0000031e/sig00000f83 ), + .CLK(clk), + .D(\blk00000003/sig00000647 ), + .Q(\blk00000003/blk0000031e/sig00000f7e ), + .Q15(\NLW_blk00000003/blk0000031e/blk0000034c_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk0000031e/blk0000034b ( + .A0(\blk00000003/sig00000751 ), + .A1(\blk00000003/blk0000031e/sig00000f6a ), + .A2(\blk00000003/blk0000031e/sig00000f6a ), + .A3(\blk00000003/blk0000031e/sig00000f6a ), + .CE(\blk00000003/blk0000031e/sig00000f83 ), + .CLK(clk), + .D(\blk00000003/sig00000648 ), + .Q(\blk00000003/blk0000031e/sig00000f7d ), + .Q15(\NLW_blk00000003/blk0000031e/blk0000034b_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk0000031e/blk0000034a ( + .A0(\blk00000003/sig00000751 ), + .A1(\blk00000003/blk0000031e/sig00000f6a ), + .A2(\blk00000003/blk0000031e/sig00000f6a ), + .A3(\blk00000003/blk0000031e/sig00000f6a ), + .CE(\blk00000003/blk0000031e/sig00000f83 ), + .CLK(clk), + .D(\blk00000003/sig00000646 ), + .Q(\blk00000003/blk0000031e/sig00000f7f ), + .Q15(\NLW_blk00000003/blk0000031e/blk0000034a_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk0000031e/blk00000349 ( + .A0(\blk00000003/sig00000751 ), + .A1(\blk00000003/blk0000031e/sig00000f6a ), + .A2(\blk00000003/blk0000031e/sig00000f6a ), + .A3(\blk00000003/blk0000031e/sig00000f6a ), + .CE(\blk00000003/blk0000031e/sig00000f83 ), + .CLK(clk), + .D(\blk00000003/sig0000064a ), + .Q(\blk00000003/blk0000031e/sig00000f7b ), + .Q15(\NLW_blk00000003/blk0000031e/blk00000349_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk0000031e/blk00000348 ( + .A0(\blk00000003/sig00000751 ), + .A1(\blk00000003/blk0000031e/sig00000f6a ), + .A2(\blk00000003/blk0000031e/sig00000f6a ), + .A3(\blk00000003/blk0000031e/sig00000f6a ), + .CE(\blk00000003/blk0000031e/sig00000f83 ), + .CLK(clk), + .D(\blk00000003/sig0000064b ), + .Q(\blk00000003/blk0000031e/sig00000f7a ), + .Q15(\NLW_blk00000003/blk0000031e/blk00000348_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk0000031e/blk00000347 ( + .A0(\blk00000003/sig00000751 ), + .A1(\blk00000003/blk0000031e/sig00000f6a ), + .A2(\blk00000003/blk0000031e/sig00000f6a ), + .A3(\blk00000003/blk0000031e/sig00000f6a ), + .CE(\blk00000003/blk0000031e/sig00000f83 ), + .CLK(clk), + .D(\blk00000003/sig00000649 ), + .Q(\blk00000003/blk0000031e/sig00000f7c ), + .Q15(\NLW_blk00000003/blk0000031e/blk00000347_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk0000031e/blk00000346 ( + .A0(\blk00000003/sig00000751 ), + .A1(\blk00000003/blk0000031e/sig00000f6a ), + .A2(\blk00000003/blk0000031e/sig00000f6a ), + .A3(\blk00000003/blk0000031e/sig00000f6a ), + .CE(\blk00000003/blk0000031e/sig00000f83 ), + .CLK(clk), + .D(\blk00000003/sig0000064d ), + .Q(\blk00000003/blk0000031e/sig00000f78 ), + .Q15(\NLW_blk00000003/blk0000031e/blk00000346_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk0000031e/blk00000345 ( + .A0(\blk00000003/sig00000751 ), + .A1(\blk00000003/blk0000031e/sig00000f6a ), + .A2(\blk00000003/blk0000031e/sig00000f6a ), + .A3(\blk00000003/blk0000031e/sig00000f6a ), + .CE(\blk00000003/blk0000031e/sig00000f83 ), + .CLK(clk), + .D(\blk00000003/sig0000064e ), + .Q(\blk00000003/blk0000031e/sig00000f77 ), + .Q15(\NLW_blk00000003/blk0000031e/blk00000345_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk0000031e/blk00000344 ( + .A0(\blk00000003/sig00000751 ), + .A1(\blk00000003/blk0000031e/sig00000f6a ), + .A2(\blk00000003/blk0000031e/sig00000f6a ), + .A3(\blk00000003/blk0000031e/sig00000f6a ), + .CE(\blk00000003/blk0000031e/sig00000f83 ), + .CLK(clk), + .D(\blk00000003/sig0000064c ), + .Q(\blk00000003/blk0000031e/sig00000f79 ), + .Q15(\NLW_blk00000003/blk0000031e/blk00000344_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk0000031e/blk00000343 ( + .A0(\blk00000003/sig00000751 ), + .A1(\blk00000003/blk0000031e/sig00000f6a ), + .A2(\blk00000003/blk0000031e/sig00000f6a ), + .A3(\blk00000003/blk0000031e/sig00000f6a ), + .CE(\blk00000003/blk0000031e/sig00000f83 ), + .CLK(clk), + .D(\blk00000003/sig00000650 ), + .Q(\blk00000003/blk0000031e/sig00000f75 ), + .Q15(\NLW_blk00000003/blk0000031e/blk00000343_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk0000031e/blk00000342 ( + .A0(\blk00000003/sig00000751 ), + .A1(\blk00000003/blk0000031e/sig00000f6a ), + .A2(\blk00000003/blk0000031e/sig00000f6a ), + .A3(\blk00000003/blk0000031e/sig00000f6a ), + .CE(\blk00000003/blk0000031e/sig00000f83 ), + .CLK(clk), + .D(\blk00000003/sig00000651 ), + .Q(\blk00000003/blk0000031e/sig00000f74 ), + .Q15(\NLW_blk00000003/blk0000031e/blk00000342_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk0000031e/blk00000341 ( + .A0(\blk00000003/sig00000751 ), + .A1(\blk00000003/blk0000031e/sig00000f6a ), + .A2(\blk00000003/blk0000031e/sig00000f6a ), + .A3(\blk00000003/blk0000031e/sig00000f6a ), + .CE(\blk00000003/blk0000031e/sig00000f83 ), + .CLK(clk), + .D(\blk00000003/sig0000064f ), + .Q(\blk00000003/blk0000031e/sig00000f76 ), + .Q15(\NLW_blk00000003/blk0000031e/blk00000341_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk0000031e/blk00000340 ( + .A0(\blk00000003/sig00000751 ), + .A1(\blk00000003/blk0000031e/sig00000f6a ), + .A2(\blk00000003/blk0000031e/sig00000f6a ), + .A3(\blk00000003/blk0000031e/sig00000f6a ), + .CE(\blk00000003/blk0000031e/sig00000f83 ), + .CLK(clk), + .D(\blk00000003/sig00000653 ), + .Q(\blk00000003/blk0000031e/sig00000f72 ), + .Q15(\NLW_blk00000003/blk0000031e/blk00000340_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk0000031e/blk0000033f ( + .A0(\blk00000003/sig00000751 ), + .A1(\blk00000003/blk0000031e/sig00000f6a ), + .A2(\blk00000003/blk0000031e/sig00000f6a ), + .A3(\blk00000003/blk0000031e/sig00000f6a ), + .CE(\blk00000003/blk0000031e/sig00000f83 ), + .CLK(clk), + .D(\blk00000003/sig00000654 ), + .Q(\blk00000003/blk0000031e/sig00000f71 ), + .Q15(\NLW_blk00000003/blk0000031e/blk0000033f_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk0000031e/blk0000033e ( + .A0(\blk00000003/sig00000751 ), + .A1(\blk00000003/blk0000031e/sig00000f6a ), + .A2(\blk00000003/blk0000031e/sig00000f6a ), + .A3(\blk00000003/blk0000031e/sig00000f6a ), + .CE(\blk00000003/blk0000031e/sig00000f83 ), + .CLK(clk), + .D(\blk00000003/sig00000652 ), + .Q(\blk00000003/blk0000031e/sig00000f73 ), + .Q15(\NLW_blk00000003/blk0000031e/blk0000033e_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk0000031e/blk0000033d ( + .A0(\blk00000003/sig00000751 ), + .A1(\blk00000003/blk0000031e/sig00000f6a ), + .A2(\blk00000003/blk0000031e/sig00000f6a ), + .A3(\blk00000003/blk0000031e/sig00000f6a ), + .CE(\blk00000003/blk0000031e/sig00000f83 ), + .CLK(clk), + .D(\blk00000003/sig00000656 ), + .Q(\blk00000003/blk0000031e/sig00000f6f ), + .Q15(\NLW_blk00000003/blk0000031e/blk0000033d_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk0000031e/blk0000033c ( + .A0(\blk00000003/sig00000751 ), + .A1(\blk00000003/blk0000031e/sig00000f6a ), + .A2(\blk00000003/blk0000031e/sig00000f6a ), + .A3(\blk00000003/blk0000031e/sig00000f6a ), + .CE(\blk00000003/blk0000031e/sig00000f83 ), + .CLK(clk), + .D(\blk00000003/sig00000657 ), + .Q(\blk00000003/blk0000031e/sig00000f6e ), + .Q15(\NLW_blk00000003/blk0000031e/blk0000033c_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk0000031e/blk0000033b ( + .A0(\blk00000003/sig00000751 ), + .A1(\blk00000003/blk0000031e/sig00000f6a ), + .A2(\blk00000003/blk0000031e/sig00000f6a ), + .A3(\blk00000003/blk0000031e/sig00000f6a ), + .CE(\blk00000003/blk0000031e/sig00000f83 ), + .CLK(clk), + .D(\blk00000003/sig00000655 ), + .Q(\blk00000003/blk0000031e/sig00000f70 ), + .Q15(\NLW_blk00000003/blk0000031e/blk0000033b_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk0000031e/blk0000033a ( + .A0(\blk00000003/sig00000751 ), + .A1(\blk00000003/blk0000031e/sig00000f6a ), + .A2(\blk00000003/blk0000031e/sig00000f6a ), + .A3(\blk00000003/blk0000031e/sig00000f6a ), + .CE(\blk00000003/blk0000031e/sig00000f83 ), + .CLK(clk), + .D(\blk00000003/sig00000659 ), + .Q(\blk00000003/blk0000031e/sig00000f6c ), + .Q15(\NLW_blk00000003/blk0000031e/blk0000033a_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk0000031e/blk00000339 ( + .A0(\blk00000003/sig00000751 ), + .A1(\blk00000003/blk0000031e/sig00000f6a ), + .A2(\blk00000003/blk0000031e/sig00000f6a ), + .A3(\blk00000003/blk0000031e/sig00000f6a ), + .CE(\blk00000003/blk0000031e/sig00000f83 ), + .CLK(clk), + .D(\blk00000003/sig0000065a ), + .Q(\blk00000003/blk0000031e/sig00000f6b ), + .Q15(\NLW_blk00000003/blk0000031e/blk00000339_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk0000031e/blk00000338 ( + .A0(\blk00000003/sig00000751 ), + .A1(\blk00000003/blk0000031e/sig00000f6a ), + .A2(\blk00000003/blk0000031e/sig00000f6a ), + .A3(\blk00000003/blk0000031e/sig00000f6a ), + .CE(\blk00000003/blk0000031e/sig00000f83 ), + .CLK(clk), + .D(\blk00000003/sig00000658 ), + .Q(\blk00000003/blk0000031e/sig00000f6d ), + .Q15(\NLW_blk00000003/blk0000031e/blk00000338_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk0000031e/blk00000337 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk0000031e/sig00000f82 ), + .Q(\blk00000003/sig000006a3 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk0000031e/blk00000336 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk0000031e/sig00000f81 ), + .Q(\blk00000003/sig000006a4 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk0000031e/blk00000335 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk0000031e/sig00000f80 ), + .Q(\blk00000003/sig000006a5 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk0000031e/blk00000334 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk0000031e/sig00000f7f ), + .Q(\blk00000003/sig000006a6 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk0000031e/blk00000333 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk0000031e/sig00000f7e ), + .Q(\blk00000003/sig000006a7 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk0000031e/blk00000332 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk0000031e/sig00000f7d ), + .Q(\blk00000003/sig000006a8 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk0000031e/blk00000331 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk0000031e/sig00000f7c ), + .Q(\blk00000003/sig000006a9 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk0000031e/blk00000330 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk0000031e/sig00000f7b ), + .Q(\blk00000003/sig000006aa ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk0000031e/blk0000032f ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk0000031e/sig00000f7a ), + .Q(\blk00000003/sig000006ab ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk0000031e/blk0000032e ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk0000031e/sig00000f79 ), + .Q(\blk00000003/sig000006ac ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk0000031e/blk0000032d ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk0000031e/sig00000f78 ), + .Q(\blk00000003/sig000006ad ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk0000031e/blk0000032c ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk0000031e/sig00000f77 ), + .Q(\blk00000003/sig000006ae ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk0000031e/blk0000032b ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk0000031e/sig00000f76 ), + .Q(\blk00000003/sig000006af ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk0000031e/blk0000032a ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk0000031e/sig00000f75 ), + .Q(\blk00000003/sig000006b0 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk0000031e/blk00000329 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk0000031e/sig00000f74 ), + .Q(\blk00000003/sig000006b1 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk0000031e/blk00000328 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk0000031e/sig00000f73 ), + .Q(\blk00000003/sig000006b2 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk0000031e/blk00000327 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk0000031e/sig00000f72 ), + .Q(\blk00000003/sig000006b3 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk0000031e/blk00000326 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk0000031e/sig00000f71 ), + .Q(\blk00000003/sig000006b4 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk0000031e/blk00000325 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk0000031e/sig00000f70 ), + .Q(\blk00000003/sig000006b5 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk0000031e/blk00000324 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk0000031e/sig00000f6f ), + .Q(\blk00000003/sig000006b6 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk0000031e/blk00000323 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk0000031e/sig00000f6e ), + .Q(\blk00000003/sig000006b7 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk0000031e/blk00000322 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk0000031e/sig00000f6d ), + .Q(\blk00000003/sig000006b8 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk0000031e/blk00000321 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk0000031e/sig00000f6c ), + .Q(\blk00000003/sig000006b9 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk0000031e/blk00000320 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk0000031e/sig00000f6b ), + .Q(\blk00000003/sig000006ba ) + ); + GND \blk00000003/blk0000031e/blk0000031f ( + .G(\blk00000003/blk0000031e/sig00000f6a ) + ); + LUT2 #( + .INIT ( 4'h8 )) + \blk00000003/blk00000351/blk00000383 ( + .I0(ce), + .I1(\blk00000003/sig0000074f ), + .O(\blk00000003/blk00000351/sig00000fd1 ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000351/blk00000382 ( + .A0(\blk00000003/sig00000750 ), + .A1(\blk00000003/blk00000351/sig00000fb8 ), + .A2(\blk00000003/blk00000351/sig00000fb8 ), + .A3(\blk00000003/blk00000351/sig00000fb8 ), + .CE(\blk00000003/blk00000351/sig00000fd1 ), + .CLK(clk), + .D(\blk00000003/sig000007db ), + .Q(\blk00000003/blk00000351/sig00000fcf ), + .Q15(\NLW_blk00000003/blk00000351/blk00000382_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000351/blk00000381 ( + .A0(\blk00000003/sig00000750 ), + .A1(\blk00000003/blk00000351/sig00000fb8 ), + .A2(\blk00000003/blk00000351/sig00000fb8 ), + .A3(\blk00000003/blk00000351/sig00000fb8 ), + .CE(\blk00000003/blk00000351/sig00000fd1 ), + .CLK(clk), + .D(\blk00000003/sig000007dc ), + .Q(\blk00000003/blk00000351/sig00000fce ), + .Q15(\NLW_blk00000003/blk00000351/blk00000381_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000351/blk00000380 ( + .A0(\blk00000003/sig00000750 ), + .A1(\blk00000003/blk00000351/sig00000fb8 ), + .A2(\blk00000003/blk00000351/sig00000fb8 ), + .A3(\blk00000003/blk00000351/sig00000fb8 ), + .CE(\blk00000003/blk00000351/sig00000fd1 ), + .CLK(clk), + .D(\blk00000003/sig000007da ), + .Q(\blk00000003/blk00000351/sig00000fd0 ), + .Q15(\NLW_blk00000003/blk00000351/blk00000380_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000351/blk0000037f ( + .A0(\blk00000003/sig00000750 ), + .A1(\blk00000003/blk00000351/sig00000fb8 ), + .A2(\blk00000003/blk00000351/sig00000fb8 ), + .A3(\blk00000003/blk00000351/sig00000fb8 ), + .CE(\blk00000003/blk00000351/sig00000fd1 ), + .CLK(clk), + .D(\blk00000003/sig000007de ), + .Q(\blk00000003/blk00000351/sig00000fcc ), + .Q15(\NLW_blk00000003/blk00000351/blk0000037f_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000351/blk0000037e ( + .A0(\blk00000003/sig00000750 ), + .A1(\blk00000003/blk00000351/sig00000fb8 ), + .A2(\blk00000003/blk00000351/sig00000fb8 ), + .A3(\blk00000003/blk00000351/sig00000fb8 ), + .CE(\blk00000003/blk00000351/sig00000fd1 ), + .CLK(clk), + .D(\blk00000003/sig000007df ), + .Q(\blk00000003/blk00000351/sig00000fcb ), + .Q15(\NLW_blk00000003/blk00000351/blk0000037e_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000351/blk0000037d ( + .A0(\blk00000003/sig00000750 ), + .A1(\blk00000003/blk00000351/sig00000fb8 ), + .A2(\blk00000003/blk00000351/sig00000fb8 ), + .A3(\blk00000003/blk00000351/sig00000fb8 ), + .CE(\blk00000003/blk00000351/sig00000fd1 ), + .CLK(clk), + .D(\blk00000003/sig000007dd ), + .Q(\blk00000003/blk00000351/sig00000fcd ), + .Q15(\NLW_blk00000003/blk00000351/blk0000037d_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000351/blk0000037c ( + .A0(\blk00000003/sig00000750 ), + .A1(\blk00000003/blk00000351/sig00000fb8 ), + .A2(\blk00000003/blk00000351/sig00000fb8 ), + .A3(\blk00000003/blk00000351/sig00000fb8 ), + .CE(\blk00000003/blk00000351/sig00000fd1 ), + .CLK(clk), + .D(\blk00000003/sig000007e1 ), + .Q(\blk00000003/blk00000351/sig00000fc9 ), + .Q15(\NLW_blk00000003/blk00000351/blk0000037c_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000351/blk0000037b ( + .A0(\blk00000003/sig00000750 ), + .A1(\blk00000003/blk00000351/sig00000fb8 ), + .A2(\blk00000003/blk00000351/sig00000fb8 ), + .A3(\blk00000003/blk00000351/sig00000fb8 ), + .CE(\blk00000003/blk00000351/sig00000fd1 ), + .CLK(clk), + .D(\blk00000003/sig000007e2 ), + .Q(\blk00000003/blk00000351/sig00000fc8 ), + .Q15(\NLW_blk00000003/blk00000351/blk0000037b_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000351/blk0000037a ( + .A0(\blk00000003/sig00000750 ), + .A1(\blk00000003/blk00000351/sig00000fb8 ), + .A2(\blk00000003/blk00000351/sig00000fb8 ), + .A3(\blk00000003/blk00000351/sig00000fb8 ), + .CE(\blk00000003/blk00000351/sig00000fd1 ), + .CLK(clk), + .D(\blk00000003/sig000007e0 ), + .Q(\blk00000003/blk00000351/sig00000fca ), + .Q15(\NLW_blk00000003/blk00000351/blk0000037a_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000351/blk00000379 ( + .A0(\blk00000003/sig00000750 ), + .A1(\blk00000003/blk00000351/sig00000fb8 ), + .A2(\blk00000003/blk00000351/sig00000fb8 ), + .A3(\blk00000003/blk00000351/sig00000fb8 ), + .CE(\blk00000003/blk00000351/sig00000fd1 ), + .CLK(clk), + .D(\blk00000003/sig000007e4 ), + .Q(\blk00000003/blk00000351/sig00000fc6 ), + .Q15(\NLW_blk00000003/blk00000351/blk00000379_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000351/blk00000378 ( + .A0(\blk00000003/sig00000750 ), + .A1(\blk00000003/blk00000351/sig00000fb8 ), + .A2(\blk00000003/blk00000351/sig00000fb8 ), + .A3(\blk00000003/blk00000351/sig00000fb8 ), + .CE(\blk00000003/blk00000351/sig00000fd1 ), + .CLK(clk), + .D(\blk00000003/sig000007e5 ), + .Q(\blk00000003/blk00000351/sig00000fc5 ), + .Q15(\NLW_blk00000003/blk00000351/blk00000378_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000351/blk00000377 ( + .A0(\blk00000003/sig00000750 ), + .A1(\blk00000003/blk00000351/sig00000fb8 ), + .A2(\blk00000003/blk00000351/sig00000fb8 ), + .A3(\blk00000003/blk00000351/sig00000fb8 ), + .CE(\blk00000003/blk00000351/sig00000fd1 ), + .CLK(clk), + .D(\blk00000003/sig000007e3 ), + .Q(\blk00000003/blk00000351/sig00000fc7 ), + .Q15(\NLW_blk00000003/blk00000351/blk00000377_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000351/blk00000376 ( + .A0(\blk00000003/sig00000750 ), + .A1(\blk00000003/blk00000351/sig00000fb8 ), + .A2(\blk00000003/blk00000351/sig00000fb8 ), + .A3(\blk00000003/blk00000351/sig00000fb8 ), + .CE(\blk00000003/blk00000351/sig00000fd1 ), + .CLK(clk), + .D(\blk00000003/sig000007e7 ), + .Q(\blk00000003/blk00000351/sig00000fc3 ), + .Q15(\NLW_blk00000003/blk00000351/blk00000376_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000351/blk00000375 ( + .A0(\blk00000003/sig00000750 ), + .A1(\blk00000003/blk00000351/sig00000fb8 ), + .A2(\blk00000003/blk00000351/sig00000fb8 ), + .A3(\blk00000003/blk00000351/sig00000fb8 ), + .CE(\blk00000003/blk00000351/sig00000fd1 ), + .CLK(clk), + .D(\blk00000003/sig000007e8 ), + .Q(\blk00000003/blk00000351/sig00000fc2 ), + .Q15(\NLW_blk00000003/blk00000351/blk00000375_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000351/blk00000374 ( + .A0(\blk00000003/sig00000750 ), + .A1(\blk00000003/blk00000351/sig00000fb8 ), + .A2(\blk00000003/blk00000351/sig00000fb8 ), + .A3(\blk00000003/blk00000351/sig00000fb8 ), + .CE(\blk00000003/blk00000351/sig00000fd1 ), + .CLK(clk), + .D(\blk00000003/sig000007e6 ), + .Q(\blk00000003/blk00000351/sig00000fc4 ), + .Q15(\NLW_blk00000003/blk00000351/blk00000374_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000351/blk00000373 ( + .A0(\blk00000003/sig00000750 ), + .A1(\blk00000003/blk00000351/sig00000fb8 ), + .A2(\blk00000003/blk00000351/sig00000fb8 ), + .A3(\blk00000003/blk00000351/sig00000fb8 ), + .CE(\blk00000003/blk00000351/sig00000fd1 ), + .CLK(clk), + .D(\blk00000003/sig000007ea ), + .Q(\blk00000003/blk00000351/sig00000fc0 ), + .Q15(\NLW_blk00000003/blk00000351/blk00000373_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000351/blk00000372 ( + .A0(\blk00000003/sig00000750 ), + .A1(\blk00000003/blk00000351/sig00000fb8 ), + .A2(\blk00000003/blk00000351/sig00000fb8 ), + .A3(\blk00000003/blk00000351/sig00000fb8 ), + .CE(\blk00000003/blk00000351/sig00000fd1 ), + .CLK(clk), + .D(\blk00000003/sig000007eb ), + .Q(\blk00000003/blk00000351/sig00000fbf ), + .Q15(\NLW_blk00000003/blk00000351/blk00000372_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000351/blk00000371 ( + .A0(\blk00000003/sig00000750 ), + .A1(\blk00000003/blk00000351/sig00000fb8 ), + .A2(\blk00000003/blk00000351/sig00000fb8 ), + .A3(\blk00000003/blk00000351/sig00000fb8 ), + .CE(\blk00000003/blk00000351/sig00000fd1 ), + .CLK(clk), + .D(\blk00000003/sig000007e9 ), + .Q(\blk00000003/blk00000351/sig00000fc1 ), + .Q15(\NLW_blk00000003/blk00000351/blk00000371_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000351/blk00000370 ( + .A0(\blk00000003/sig00000750 ), + .A1(\blk00000003/blk00000351/sig00000fb8 ), + .A2(\blk00000003/blk00000351/sig00000fb8 ), + .A3(\blk00000003/blk00000351/sig00000fb8 ), + .CE(\blk00000003/blk00000351/sig00000fd1 ), + .CLK(clk), + .D(\blk00000003/sig000007ed ), + .Q(\blk00000003/blk00000351/sig00000fbd ), + .Q15(\NLW_blk00000003/blk00000351/blk00000370_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000351/blk0000036f ( + .A0(\blk00000003/sig00000750 ), + .A1(\blk00000003/blk00000351/sig00000fb8 ), + .A2(\blk00000003/blk00000351/sig00000fb8 ), + .A3(\blk00000003/blk00000351/sig00000fb8 ), + .CE(\blk00000003/blk00000351/sig00000fd1 ), + .CLK(clk), + .D(\blk00000003/sig000007ee ), + .Q(\blk00000003/blk00000351/sig00000fbc ), + .Q15(\NLW_blk00000003/blk00000351/blk0000036f_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000351/blk0000036e ( + .A0(\blk00000003/sig00000750 ), + .A1(\blk00000003/blk00000351/sig00000fb8 ), + .A2(\blk00000003/blk00000351/sig00000fb8 ), + .A3(\blk00000003/blk00000351/sig00000fb8 ), + .CE(\blk00000003/blk00000351/sig00000fd1 ), + .CLK(clk), + .D(\blk00000003/sig000007ec ), + .Q(\blk00000003/blk00000351/sig00000fbe ), + .Q15(\NLW_blk00000003/blk00000351/blk0000036e_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000351/blk0000036d ( + .A0(\blk00000003/sig00000750 ), + .A1(\blk00000003/blk00000351/sig00000fb8 ), + .A2(\blk00000003/blk00000351/sig00000fb8 ), + .A3(\blk00000003/blk00000351/sig00000fb8 ), + .CE(\blk00000003/blk00000351/sig00000fd1 ), + .CLK(clk), + .D(\blk00000003/sig000007f0 ), + .Q(\blk00000003/blk00000351/sig00000fba ), + .Q15(\NLW_blk00000003/blk00000351/blk0000036d_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000351/blk0000036c ( + .A0(\blk00000003/sig00000750 ), + .A1(\blk00000003/blk00000351/sig00000fb8 ), + .A2(\blk00000003/blk00000351/sig00000fb8 ), + .A3(\blk00000003/blk00000351/sig00000fb8 ), + .CE(\blk00000003/blk00000351/sig00000fd1 ), + .CLK(clk), + .D(\blk00000003/sig000007f1 ), + .Q(\blk00000003/blk00000351/sig00000fb9 ), + .Q15(\NLW_blk00000003/blk00000351/blk0000036c_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000351/blk0000036b ( + .A0(\blk00000003/sig00000750 ), + .A1(\blk00000003/blk00000351/sig00000fb8 ), + .A2(\blk00000003/blk00000351/sig00000fb8 ), + .A3(\blk00000003/blk00000351/sig00000fb8 ), + .CE(\blk00000003/blk00000351/sig00000fd1 ), + .CLK(clk), + .D(\blk00000003/sig000007ef ), + .Q(\blk00000003/blk00000351/sig00000fbb ), + .Q15(\NLW_blk00000003/blk00000351/blk0000036b_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000351/blk0000036a ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk00000351/sig00000fd0 ), + .Q(\blk00000003/sig000006bb ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000351/blk00000369 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk00000351/sig00000fcf ), + .Q(\blk00000003/sig000006bc ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000351/blk00000368 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk00000351/sig00000fce ), + .Q(\blk00000003/sig000006bd ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000351/blk00000367 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk00000351/sig00000fcd ), + .Q(\blk00000003/sig000006be ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000351/blk00000366 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk00000351/sig00000fcc ), + .Q(\blk00000003/sig000006bf ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000351/blk00000365 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk00000351/sig00000fcb ), + .Q(\blk00000003/sig000006c0 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000351/blk00000364 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk00000351/sig00000fca ), + .Q(\blk00000003/sig000006c1 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000351/blk00000363 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk00000351/sig00000fc9 ), + .Q(\blk00000003/sig000006c2 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000351/blk00000362 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk00000351/sig00000fc8 ), + .Q(\blk00000003/sig000006c3 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000351/blk00000361 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk00000351/sig00000fc7 ), + .Q(\blk00000003/sig000006c4 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000351/blk00000360 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk00000351/sig00000fc6 ), + .Q(\blk00000003/sig000006c5 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000351/blk0000035f ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk00000351/sig00000fc5 ), + .Q(\blk00000003/sig000006c6 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000351/blk0000035e ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk00000351/sig00000fc4 ), + .Q(\blk00000003/sig000006c7 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000351/blk0000035d ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk00000351/sig00000fc3 ), + .Q(\blk00000003/sig000006c8 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000351/blk0000035c ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk00000351/sig00000fc2 ), + .Q(\blk00000003/sig000006c9 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000351/blk0000035b ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk00000351/sig00000fc1 ), + .Q(\blk00000003/sig000006ca ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000351/blk0000035a ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk00000351/sig00000fc0 ), + .Q(\blk00000003/sig000006cb ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000351/blk00000359 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk00000351/sig00000fbf ), + .Q(\blk00000003/sig000006cc ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000351/blk00000358 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk00000351/sig00000fbe ), + .Q(\blk00000003/sig000006cd ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000351/blk00000357 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk00000351/sig00000fbd ), + .Q(\blk00000003/sig000006ce ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000351/blk00000356 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk00000351/sig00000fbc ), + .Q(\blk00000003/sig000006cf ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000351/blk00000355 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk00000351/sig00000fbb ), + .Q(\blk00000003/sig000006d0 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000351/blk00000354 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk00000351/sig00000fba ), + .Q(\blk00000003/sig000006d1 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000351/blk00000353 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk00000351/sig00000fb9 ), + .Q(\blk00000003/sig000006d2 ) + ); + GND \blk00000003/blk00000351/blk00000352 ( + .G(\blk00000003/blk00000351/sig00000fb8 ) + ); + LUT2 #( + .INIT ( 4'h8 )) + \blk00000003/blk00000384/blk000003b6 ( + .I0(ce), + .I1(\blk00000003/sig00000755 ), + .O(\blk00000003/blk00000384/sig0000101f ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000384/blk000003b5 ( + .A0(\blk00000003/sig00000758 ), + .A1(\blk00000003/blk00000384/sig00001006 ), + .A2(\blk00000003/blk00000384/sig00001006 ), + .A3(\blk00000003/blk00000384/sig00001006 ), + .CE(\blk00000003/blk00000384/sig0000101f ), + .CLK(clk), + .D(\blk00000003/sig0000045e ), + .Q(\blk00000003/blk00000384/sig0000101d ), + .Q15(\NLW_blk00000003/blk00000384/blk000003b5_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000384/blk000003b4 ( + .A0(\blk00000003/sig00000758 ), + .A1(\blk00000003/blk00000384/sig00001006 ), + .A2(\blk00000003/blk00000384/sig00001006 ), + .A3(\blk00000003/blk00000384/sig00001006 ), + .CE(\blk00000003/blk00000384/sig0000101f ), + .CLK(clk), + .D(\blk00000003/sig0000045f ), + .Q(\blk00000003/blk00000384/sig0000101c ), + .Q15(\NLW_blk00000003/blk00000384/blk000003b4_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000384/blk000003b3 ( + .A0(\blk00000003/sig00000758 ), + .A1(\blk00000003/blk00000384/sig00001006 ), + .A2(\blk00000003/blk00000384/sig00001006 ), + .A3(\blk00000003/blk00000384/sig00001006 ), + .CE(\blk00000003/blk00000384/sig0000101f ), + .CLK(clk), + .D(\blk00000003/sig0000045d ), + .Q(\blk00000003/blk00000384/sig0000101e ), + .Q15(\NLW_blk00000003/blk00000384/blk000003b3_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000384/blk000003b2 ( + .A0(\blk00000003/sig00000758 ), + .A1(\blk00000003/blk00000384/sig00001006 ), + .A2(\blk00000003/blk00000384/sig00001006 ), + .A3(\blk00000003/blk00000384/sig00001006 ), + .CE(\blk00000003/blk00000384/sig0000101f ), + .CLK(clk), + .D(\blk00000003/sig00000461 ), + .Q(\blk00000003/blk00000384/sig0000101a ), + .Q15(\NLW_blk00000003/blk00000384/blk000003b2_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000384/blk000003b1 ( + .A0(\blk00000003/sig00000758 ), + .A1(\blk00000003/blk00000384/sig00001006 ), + .A2(\blk00000003/blk00000384/sig00001006 ), + .A3(\blk00000003/blk00000384/sig00001006 ), + .CE(\blk00000003/blk00000384/sig0000101f ), + .CLK(clk), + .D(\blk00000003/sig00000462 ), + .Q(\blk00000003/blk00000384/sig00001019 ), + .Q15(\NLW_blk00000003/blk00000384/blk000003b1_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000384/blk000003b0 ( + .A0(\blk00000003/sig00000758 ), + .A1(\blk00000003/blk00000384/sig00001006 ), + .A2(\blk00000003/blk00000384/sig00001006 ), + .A3(\blk00000003/blk00000384/sig00001006 ), + .CE(\blk00000003/blk00000384/sig0000101f ), + .CLK(clk), + .D(\blk00000003/sig00000460 ), + .Q(\blk00000003/blk00000384/sig0000101b ), + .Q15(\NLW_blk00000003/blk00000384/blk000003b0_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000384/blk000003af ( + .A0(\blk00000003/sig00000758 ), + .A1(\blk00000003/blk00000384/sig00001006 ), + .A2(\blk00000003/blk00000384/sig00001006 ), + .A3(\blk00000003/blk00000384/sig00001006 ), + .CE(\blk00000003/blk00000384/sig0000101f ), + .CLK(clk), + .D(\blk00000003/sig00000464 ), + .Q(\blk00000003/blk00000384/sig00001017 ), + .Q15(\NLW_blk00000003/blk00000384/blk000003af_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000384/blk000003ae ( + .A0(\blk00000003/sig00000758 ), + .A1(\blk00000003/blk00000384/sig00001006 ), + .A2(\blk00000003/blk00000384/sig00001006 ), + .A3(\blk00000003/blk00000384/sig00001006 ), + .CE(\blk00000003/blk00000384/sig0000101f ), + .CLK(clk), + .D(\blk00000003/sig00000465 ), + .Q(\blk00000003/blk00000384/sig00001016 ), + .Q15(\NLW_blk00000003/blk00000384/blk000003ae_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000384/blk000003ad ( + .A0(\blk00000003/sig00000758 ), + .A1(\blk00000003/blk00000384/sig00001006 ), + .A2(\blk00000003/blk00000384/sig00001006 ), + .A3(\blk00000003/blk00000384/sig00001006 ), + .CE(\blk00000003/blk00000384/sig0000101f ), + .CLK(clk), + .D(\blk00000003/sig00000463 ), + .Q(\blk00000003/blk00000384/sig00001018 ), + .Q15(\NLW_blk00000003/blk00000384/blk000003ad_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000384/blk000003ac ( + .A0(\blk00000003/sig00000758 ), + .A1(\blk00000003/blk00000384/sig00001006 ), + .A2(\blk00000003/blk00000384/sig00001006 ), + .A3(\blk00000003/blk00000384/sig00001006 ), + .CE(\blk00000003/blk00000384/sig0000101f ), + .CLK(clk), + .D(\blk00000003/sig00000467 ), + .Q(\blk00000003/blk00000384/sig00001014 ), + .Q15(\NLW_blk00000003/blk00000384/blk000003ac_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000384/blk000003ab ( + .A0(\blk00000003/sig00000758 ), + .A1(\blk00000003/blk00000384/sig00001006 ), + .A2(\blk00000003/blk00000384/sig00001006 ), + .A3(\blk00000003/blk00000384/sig00001006 ), + .CE(\blk00000003/blk00000384/sig0000101f ), + .CLK(clk), + .D(\blk00000003/sig00000468 ), + .Q(\blk00000003/blk00000384/sig00001013 ), + .Q15(\NLW_blk00000003/blk00000384/blk000003ab_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000384/blk000003aa ( + .A0(\blk00000003/sig00000758 ), + .A1(\blk00000003/blk00000384/sig00001006 ), + .A2(\blk00000003/blk00000384/sig00001006 ), + .A3(\blk00000003/blk00000384/sig00001006 ), + .CE(\blk00000003/blk00000384/sig0000101f ), + .CLK(clk), + .D(\blk00000003/sig00000466 ), + .Q(\blk00000003/blk00000384/sig00001015 ), + .Q15(\NLW_blk00000003/blk00000384/blk000003aa_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000384/blk000003a9 ( + .A0(\blk00000003/sig00000758 ), + .A1(\blk00000003/blk00000384/sig00001006 ), + .A2(\blk00000003/blk00000384/sig00001006 ), + .A3(\blk00000003/blk00000384/sig00001006 ), + .CE(\blk00000003/blk00000384/sig0000101f ), + .CLK(clk), + .D(\blk00000003/sig0000046a ), + .Q(\blk00000003/blk00000384/sig00001011 ), + .Q15(\NLW_blk00000003/blk00000384/blk000003a9_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000384/blk000003a8 ( + .A0(\blk00000003/sig00000758 ), + .A1(\blk00000003/blk00000384/sig00001006 ), + .A2(\blk00000003/blk00000384/sig00001006 ), + .A3(\blk00000003/blk00000384/sig00001006 ), + .CE(\blk00000003/blk00000384/sig0000101f ), + .CLK(clk), + .D(\blk00000003/sig0000046b ), + .Q(\blk00000003/blk00000384/sig00001010 ), + .Q15(\NLW_blk00000003/blk00000384/blk000003a8_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000384/blk000003a7 ( + .A0(\blk00000003/sig00000758 ), + .A1(\blk00000003/blk00000384/sig00001006 ), + .A2(\blk00000003/blk00000384/sig00001006 ), + .A3(\blk00000003/blk00000384/sig00001006 ), + .CE(\blk00000003/blk00000384/sig0000101f ), + .CLK(clk), + .D(\blk00000003/sig00000469 ), + .Q(\blk00000003/blk00000384/sig00001012 ), + .Q15(\NLW_blk00000003/blk00000384/blk000003a7_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000384/blk000003a6 ( + .A0(\blk00000003/sig00000758 ), + .A1(\blk00000003/blk00000384/sig00001006 ), + .A2(\blk00000003/blk00000384/sig00001006 ), + .A3(\blk00000003/blk00000384/sig00001006 ), + .CE(\blk00000003/blk00000384/sig0000101f ), + .CLK(clk), + .D(\blk00000003/sig0000046d ), + .Q(\blk00000003/blk00000384/sig0000100e ), + .Q15(\NLW_blk00000003/blk00000384/blk000003a6_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000384/blk000003a5 ( + .A0(\blk00000003/sig00000758 ), + .A1(\blk00000003/blk00000384/sig00001006 ), + .A2(\blk00000003/blk00000384/sig00001006 ), + .A3(\blk00000003/blk00000384/sig00001006 ), + .CE(\blk00000003/blk00000384/sig0000101f ), + .CLK(clk), + .D(\blk00000003/sig0000046e ), + .Q(\blk00000003/blk00000384/sig0000100d ), + .Q15(\NLW_blk00000003/blk00000384/blk000003a5_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000384/blk000003a4 ( + .A0(\blk00000003/sig00000758 ), + .A1(\blk00000003/blk00000384/sig00001006 ), + .A2(\blk00000003/blk00000384/sig00001006 ), + .A3(\blk00000003/blk00000384/sig00001006 ), + .CE(\blk00000003/blk00000384/sig0000101f ), + .CLK(clk), + .D(\blk00000003/sig0000046c ), + .Q(\blk00000003/blk00000384/sig0000100f ), + .Q15(\NLW_blk00000003/blk00000384/blk000003a4_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000384/blk000003a3 ( + .A0(\blk00000003/sig00000758 ), + .A1(\blk00000003/blk00000384/sig00001006 ), + .A2(\blk00000003/blk00000384/sig00001006 ), + .A3(\blk00000003/blk00000384/sig00001006 ), + .CE(\blk00000003/blk00000384/sig0000101f ), + .CLK(clk), + .D(\blk00000003/sig00000470 ), + .Q(\blk00000003/blk00000384/sig0000100b ), + .Q15(\NLW_blk00000003/blk00000384/blk000003a3_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000384/blk000003a2 ( + .A0(\blk00000003/sig00000758 ), + .A1(\blk00000003/blk00000384/sig00001006 ), + .A2(\blk00000003/blk00000384/sig00001006 ), + .A3(\blk00000003/blk00000384/sig00001006 ), + .CE(\blk00000003/blk00000384/sig0000101f ), + .CLK(clk), + .D(\blk00000003/sig00000471 ), + .Q(\blk00000003/blk00000384/sig0000100a ), + .Q15(\NLW_blk00000003/blk00000384/blk000003a2_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000384/blk000003a1 ( + .A0(\blk00000003/sig00000758 ), + .A1(\blk00000003/blk00000384/sig00001006 ), + .A2(\blk00000003/blk00000384/sig00001006 ), + .A3(\blk00000003/blk00000384/sig00001006 ), + .CE(\blk00000003/blk00000384/sig0000101f ), + .CLK(clk), + .D(\blk00000003/sig0000046f ), + .Q(\blk00000003/blk00000384/sig0000100c ), + .Q15(\NLW_blk00000003/blk00000384/blk000003a1_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000384/blk000003a0 ( + .A0(\blk00000003/sig00000758 ), + .A1(\blk00000003/blk00000384/sig00001006 ), + .A2(\blk00000003/blk00000384/sig00001006 ), + .A3(\blk00000003/blk00000384/sig00001006 ), + .CE(\blk00000003/blk00000384/sig0000101f ), + .CLK(clk), + .D(\blk00000003/sig00000473 ), + .Q(\blk00000003/blk00000384/sig00001008 ), + .Q15(\NLW_blk00000003/blk00000384/blk000003a0_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000384/blk0000039f ( + .A0(\blk00000003/sig00000758 ), + .A1(\blk00000003/blk00000384/sig00001006 ), + .A2(\blk00000003/blk00000384/sig00001006 ), + .A3(\blk00000003/blk00000384/sig00001006 ), + .CE(\blk00000003/blk00000384/sig0000101f ), + .CLK(clk), + .D(\blk00000003/sig00000474 ), + .Q(\blk00000003/blk00000384/sig00001007 ), + .Q15(\NLW_blk00000003/blk00000384/blk0000039f_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000384/blk0000039e ( + .A0(\blk00000003/sig00000758 ), + .A1(\blk00000003/blk00000384/sig00001006 ), + .A2(\blk00000003/blk00000384/sig00001006 ), + .A3(\blk00000003/blk00000384/sig00001006 ), + .CE(\blk00000003/blk00000384/sig0000101f ), + .CLK(clk), + .D(\blk00000003/sig00000472 ), + .Q(\blk00000003/blk00000384/sig00001009 ), + .Q15(\NLW_blk00000003/blk00000384/blk0000039e_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000384/blk0000039d ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk00000384/sig0000101e ), + .Q(\blk00000003/sig000004cf ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000384/blk0000039c ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk00000384/sig0000101d ), + .Q(\blk00000003/sig000004d0 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000384/blk0000039b ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk00000384/sig0000101c ), + .Q(\blk00000003/sig000004d1 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000384/blk0000039a ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk00000384/sig0000101b ), + .Q(\blk00000003/sig000004d2 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000384/blk00000399 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk00000384/sig0000101a ), + .Q(\blk00000003/sig000004d3 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000384/blk00000398 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk00000384/sig00001019 ), + .Q(\blk00000003/sig000004d4 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000384/blk00000397 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk00000384/sig00001018 ), + .Q(\blk00000003/sig000004d5 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000384/blk00000396 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk00000384/sig00001017 ), + .Q(\blk00000003/sig000004d6 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000384/blk00000395 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk00000384/sig00001016 ), + .Q(\blk00000003/sig000004d7 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000384/blk00000394 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk00000384/sig00001015 ), + .Q(\blk00000003/sig000004d8 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000384/blk00000393 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk00000384/sig00001014 ), + .Q(\blk00000003/sig000004d9 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000384/blk00000392 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk00000384/sig00001013 ), + .Q(\blk00000003/sig000004da ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000384/blk00000391 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk00000384/sig00001012 ), + .Q(\blk00000003/sig000004db ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000384/blk00000390 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk00000384/sig00001011 ), + .Q(\blk00000003/sig000004dc ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000384/blk0000038f ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk00000384/sig00001010 ), + .Q(\blk00000003/sig000004dd ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000384/blk0000038e ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk00000384/sig0000100f ), + .Q(\blk00000003/sig000004de ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000384/blk0000038d ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk00000384/sig0000100e ), + .Q(\blk00000003/sig000004df ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000384/blk0000038c ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk00000384/sig0000100d ), + .Q(\blk00000003/sig000004e0 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000384/blk0000038b ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk00000384/sig0000100c ), + .Q(\blk00000003/sig000004e1 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000384/blk0000038a ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk00000384/sig0000100b ), + .Q(\blk00000003/sig000004e2 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000384/blk00000389 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk00000384/sig0000100a ), + .Q(\blk00000003/sig000004e3 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000384/blk00000388 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk00000384/sig00001009 ), + .Q(\blk00000003/sig000004e4 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000384/blk00000387 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk00000384/sig00001008 ), + .Q(\blk00000003/sig000004e5 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000384/blk00000386 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk00000384/sig00001007 ), + .Q(\blk00000003/sig000004e6 ) + ); + GND \blk00000003/blk00000384/blk00000385 ( + .G(\blk00000003/blk00000384/sig00001006 ) + ); + LUT2 #( + .INIT ( 4'h8 )) + \blk00000003/blk000003b7/blk000003e9 ( + .I0(ce), + .I1(\blk00000003/sig00000754 ), + .O(\blk00000003/blk000003b7/sig0000106d ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk000003b7/blk000003e8 ( + .A0(\blk00000003/sig00000759 ), + .A1(\blk00000003/blk000003b7/sig00001054 ), + .A2(\blk00000003/blk000003b7/sig00001054 ), + .A3(\blk00000003/blk000003b7/sig00001054 ), + .CE(\blk00000003/blk000003b7/sig0000106d ), + .CLK(clk), + .D(\blk00000003/sig000007f3 ), + .Q(\blk00000003/blk000003b7/sig0000106b ), + .Q15(\NLW_blk00000003/blk000003b7/blk000003e8_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk000003b7/blk000003e7 ( + .A0(\blk00000003/sig00000759 ), + .A1(\blk00000003/blk000003b7/sig00001054 ), + .A2(\blk00000003/blk000003b7/sig00001054 ), + .A3(\blk00000003/blk000003b7/sig00001054 ), + .CE(\blk00000003/blk000003b7/sig0000106d ), + .CLK(clk), + .D(\blk00000003/sig000007f4 ), + .Q(\blk00000003/blk000003b7/sig0000106a ), + .Q15(\NLW_blk00000003/blk000003b7/blk000003e7_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk000003b7/blk000003e6 ( + .A0(\blk00000003/sig00000759 ), + .A1(\blk00000003/blk000003b7/sig00001054 ), + .A2(\blk00000003/blk000003b7/sig00001054 ), + .A3(\blk00000003/blk000003b7/sig00001054 ), + .CE(\blk00000003/blk000003b7/sig0000106d ), + .CLK(clk), + .D(\blk00000003/sig000007f2 ), + .Q(\blk00000003/blk000003b7/sig0000106c ), + .Q15(\NLW_blk00000003/blk000003b7/blk000003e6_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk000003b7/blk000003e5 ( + .A0(\blk00000003/sig00000759 ), + .A1(\blk00000003/blk000003b7/sig00001054 ), + .A2(\blk00000003/blk000003b7/sig00001054 ), + .A3(\blk00000003/blk000003b7/sig00001054 ), + .CE(\blk00000003/blk000003b7/sig0000106d ), + .CLK(clk), + .D(\blk00000003/sig000007f6 ), + .Q(\blk00000003/blk000003b7/sig00001068 ), + .Q15(\NLW_blk00000003/blk000003b7/blk000003e5_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk000003b7/blk000003e4 ( + .A0(\blk00000003/sig00000759 ), + .A1(\blk00000003/blk000003b7/sig00001054 ), + .A2(\blk00000003/blk000003b7/sig00001054 ), + .A3(\blk00000003/blk000003b7/sig00001054 ), + .CE(\blk00000003/blk000003b7/sig0000106d ), + .CLK(clk), + .D(\blk00000003/sig000007f7 ), + .Q(\blk00000003/blk000003b7/sig00001067 ), + .Q15(\NLW_blk00000003/blk000003b7/blk000003e4_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk000003b7/blk000003e3 ( + .A0(\blk00000003/sig00000759 ), + .A1(\blk00000003/blk000003b7/sig00001054 ), + .A2(\blk00000003/blk000003b7/sig00001054 ), + .A3(\blk00000003/blk000003b7/sig00001054 ), + .CE(\blk00000003/blk000003b7/sig0000106d ), + .CLK(clk), + .D(\blk00000003/sig000007f5 ), + .Q(\blk00000003/blk000003b7/sig00001069 ), + .Q15(\NLW_blk00000003/blk000003b7/blk000003e3_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk000003b7/blk000003e2 ( + .A0(\blk00000003/sig00000759 ), + .A1(\blk00000003/blk000003b7/sig00001054 ), + .A2(\blk00000003/blk000003b7/sig00001054 ), + .A3(\blk00000003/blk000003b7/sig00001054 ), + .CE(\blk00000003/blk000003b7/sig0000106d ), + .CLK(clk), + .D(\blk00000003/sig000007f9 ), + .Q(\blk00000003/blk000003b7/sig00001065 ), + .Q15(\NLW_blk00000003/blk000003b7/blk000003e2_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk000003b7/blk000003e1 ( + .A0(\blk00000003/sig00000759 ), + .A1(\blk00000003/blk000003b7/sig00001054 ), + .A2(\blk00000003/blk000003b7/sig00001054 ), + .A3(\blk00000003/blk000003b7/sig00001054 ), + .CE(\blk00000003/blk000003b7/sig0000106d ), + .CLK(clk), + .D(\blk00000003/sig000007fa ), + .Q(\blk00000003/blk000003b7/sig00001064 ), + .Q15(\NLW_blk00000003/blk000003b7/blk000003e1_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk000003b7/blk000003e0 ( + .A0(\blk00000003/sig00000759 ), + .A1(\blk00000003/blk000003b7/sig00001054 ), + .A2(\blk00000003/blk000003b7/sig00001054 ), + .A3(\blk00000003/blk000003b7/sig00001054 ), + .CE(\blk00000003/blk000003b7/sig0000106d ), + .CLK(clk), + .D(\blk00000003/sig000007f8 ), + .Q(\blk00000003/blk000003b7/sig00001066 ), + .Q15(\NLW_blk00000003/blk000003b7/blk000003e0_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk000003b7/blk000003df ( + .A0(\blk00000003/sig00000759 ), + .A1(\blk00000003/blk000003b7/sig00001054 ), + .A2(\blk00000003/blk000003b7/sig00001054 ), + .A3(\blk00000003/blk000003b7/sig00001054 ), + .CE(\blk00000003/blk000003b7/sig0000106d ), + .CLK(clk), + .D(\blk00000003/sig000007fc ), + .Q(\blk00000003/blk000003b7/sig00001062 ), + .Q15(\NLW_blk00000003/blk000003b7/blk000003df_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk000003b7/blk000003de ( + .A0(\blk00000003/sig00000759 ), + .A1(\blk00000003/blk000003b7/sig00001054 ), + .A2(\blk00000003/blk000003b7/sig00001054 ), + .A3(\blk00000003/blk000003b7/sig00001054 ), + .CE(\blk00000003/blk000003b7/sig0000106d ), + .CLK(clk), + .D(\blk00000003/sig000007fd ), + .Q(\blk00000003/blk000003b7/sig00001061 ), + .Q15(\NLW_blk00000003/blk000003b7/blk000003de_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk000003b7/blk000003dd ( + .A0(\blk00000003/sig00000759 ), + .A1(\blk00000003/blk000003b7/sig00001054 ), + .A2(\blk00000003/blk000003b7/sig00001054 ), + .A3(\blk00000003/blk000003b7/sig00001054 ), + .CE(\blk00000003/blk000003b7/sig0000106d ), + .CLK(clk), + .D(\blk00000003/sig000007fb ), + .Q(\blk00000003/blk000003b7/sig00001063 ), + .Q15(\NLW_blk00000003/blk000003b7/blk000003dd_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk000003b7/blk000003dc ( + .A0(\blk00000003/sig00000759 ), + .A1(\blk00000003/blk000003b7/sig00001054 ), + .A2(\blk00000003/blk000003b7/sig00001054 ), + .A3(\blk00000003/blk000003b7/sig00001054 ), + .CE(\blk00000003/blk000003b7/sig0000106d ), + .CLK(clk), + .D(\blk00000003/sig000007ff ), + .Q(\blk00000003/blk000003b7/sig0000105f ), + .Q15(\NLW_blk00000003/blk000003b7/blk000003dc_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk000003b7/blk000003db ( + .A0(\blk00000003/sig00000759 ), + .A1(\blk00000003/blk000003b7/sig00001054 ), + .A2(\blk00000003/blk000003b7/sig00001054 ), + .A3(\blk00000003/blk000003b7/sig00001054 ), + .CE(\blk00000003/blk000003b7/sig0000106d ), + .CLK(clk), + .D(\blk00000003/sig00000800 ), + .Q(\blk00000003/blk000003b7/sig0000105e ), + .Q15(\NLW_blk00000003/blk000003b7/blk000003db_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk000003b7/blk000003da ( + .A0(\blk00000003/sig00000759 ), + .A1(\blk00000003/blk000003b7/sig00001054 ), + .A2(\blk00000003/blk000003b7/sig00001054 ), + .A3(\blk00000003/blk000003b7/sig00001054 ), + .CE(\blk00000003/blk000003b7/sig0000106d ), + .CLK(clk), + .D(\blk00000003/sig000007fe ), + .Q(\blk00000003/blk000003b7/sig00001060 ), + .Q15(\NLW_blk00000003/blk000003b7/blk000003da_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk000003b7/blk000003d9 ( + .A0(\blk00000003/sig00000759 ), + .A1(\blk00000003/blk000003b7/sig00001054 ), + .A2(\blk00000003/blk000003b7/sig00001054 ), + .A3(\blk00000003/blk000003b7/sig00001054 ), + .CE(\blk00000003/blk000003b7/sig0000106d ), + .CLK(clk), + .D(\blk00000003/sig00000802 ), + .Q(\blk00000003/blk000003b7/sig0000105c ), + .Q15(\NLW_blk00000003/blk000003b7/blk000003d9_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk000003b7/blk000003d8 ( + .A0(\blk00000003/sig00000759 ), + .A1(\blk00000003/blk000003b7/sig00001054 ), + .A2(\blk00000003/blk000003b7/sig00001054 ), + .A3(\blk00000003/blk000003b7/sig00001054 ), + .CE(\blk00000003/blk000003b7/sig0000106d ), + .CLK(clk), + .D(\blk00000003/sig00000803 ), + .Q(\blk00000003/blk000003b7/sig0000105b ), + .Q15(\NLW_blk00000003/blk000003b7/blk000003d8_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk000003b7/blk000003d7 ( + .A0(\blk00000003/sig00000759 ), + .A1(\blk00000003/blk000003b7/sig00001054 ), + .A2(\blk00000003/blk000003b7/sig00001054 ), + .A3(\blk00000003/blk000003b7/sig00001054 ), + .CE(\blk00000003/blk000003b7/sig0000106d ), + .CLK(clk), + .D(\blk00000003/sig00000801 ), + .Q(\blk00000003/blk000003b7/sig0000105d ), + .Q15(\NLW_blk00000003/blk000003b7/blk000003d7_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk000003b7/blk000003d6 ( + .A0(\blk00000003/sig00000759 ), + .A1(\blk00000003/blk000003b7/sig00001054 ), + .A2(\blk00000003/blk000003b7/sig00001054 ), + .A3(\blk00000003/blk000003b7/sig00001054 ), + .CE(\blk00000003/blk000003b7/sig0000106d ), + .CLK(clk), + .D(\blk00000003/sig00000805 ), + .Q(\blk00000003/blk000003b7/sig00001059 ), + .Q15(\NLW_blk00000003/blk000003b7/blk000003d6_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk000003b7/blk000003d5 ( + .A0(\blk00000003/sig00000759 ), + .A1(\blk00000003/blk000003b7/sig00001054 ), + .A2(\blk00000003/blk000003b7/sig00001054 ), + .A3(\blk00000003/blk000003b7/sig00001054 ), + .CE(\blk00000003/blk000003b7/sig0000106d ), + .CLK(clk), + .D(\blk00000003/sig00000806 ), + .Q(\blk00000003/blk000003b7/sig00001058 ), + .Q15(\NLW_blk00000003/blk000003b7/blk000003d5_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk000003b7/blk000003d4 ( + .A0(\blk00000003/sig00000759 ), + .A1(\blk00000003/blk000003b7/sig00001054 ), + .A2(\blk00000003/blk000003b7/sig00001054 ), + .A3(\blk00000003/blk000003b7/sig00001054 ), + .CE(\blk00000003/blk000003b7/sig0000106d ), + .CLK(clk), + .D(\blk00000003/sig00000804 ), + .Q(\blk00000003/blk000003b7/sig0000105a ), + .Q15(\NLW_blk00000003/blk000003b7/blk000003d4_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk000003b7/blk000003d3 ( + .A0(\blk00000003/sig00000759 ), + .A1(\blk00000003/blk000003b7/sig00001054 ), + .A2(\blk00000003/blk000003b7/sig00001054 ), + .A3(\blk00000003/blk000003b7/sig00001054 ), + .CE(\blk00000003/blk000003b7/sig0000106d ), + .CLK(clk), + .D(\blk00000003/sig00000808 ), + .Q(\blk00000003/blk000003b7/sig00001056 ), + .Q15(\NLW_blk00000003/blk000003b7/blk000003d3_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk000003b7/blk000003d2 ( + .A0(\blk00000003/sig00000759 ), + .A1(\blk00000003/blk000003b7/sig00001054 ), + .A2(\blk00000003/blk000003b7/sig00001054 ), + .A3(\blk00000003/blk000003b7/sig00001054 ), + .CE(\blk00000003/blk000003b7/sig0000106d ), + .CLK(clk), + .D(\blk00000003/sig00000809 ), + .Q(\blk00000003/blk000003b7/sig00001055 ), + .Q15(\NLW_blk00000003/blk000003b7/blk000003d2_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk000003b7/blk000003d1 ( + .A0(\blk00000003/sig00000759 ), + .A1(\blk00000003/blk000003b7/sig00001054 ), + .A2(\blk00000003/blk000003b7/sig00001054 ), + .A3(\blk00000003/blk000003b7/sig00001054 ), + .CE(\blk00000003/blk000003b7/sig0000106d ), + .CLK(clk), + .D(\blk00000003/sig00000807 ), + .Q(\blk00000003/blk000003b7/sig00001057 ), + .Q15(\NLW_blk00000003/blk000003b7/blk000003d1_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000003b7/blk000003d0 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk000003b7/sig0000106c ), + .Q(\blk00000003/sig000004e7 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000003b7/blk000003cf ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk000003b7/sig0000106b ), + .Q(\blk00000003/sig000004e8 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000003b7/blk000003ce ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk000003b7/sig0000106a ), + .Q(\blk00000003/sig000004e9 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000003b7/blk000003cd ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk000003b7/sig00001069 ), + .Q(\blk00000003/sig000004ea ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000003b7/blk000003cc ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk000003b7/sig00001068 ), + .Q(\blk00000003/sig000004eb ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000003b7/blk000003cb ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk000003b7/sig00001067 ), + .Q(\blk00000003/sig000004ec ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000003b7/blk000003ca ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk000003b7/sig00001066 ), + .Q(\blk00000003/sig000004ed ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000003b7/blk000003c9 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk000003b7/sig00001065 ), + .Q(\blk00000003/sig000004ee ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000003b7/blk000003c8 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk000003b7/sig00001064 ), + .Q(\blk00000003/sig000004ef ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000003b7/blk000003c7 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk000003b7/sig00001063 ), + .Q(\blk00000003/sig000004f0 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000003b7/blk000003c6 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk000003b7/sig00001062 ), + .Q(\blk00000003/sig000004f1 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000003b7/blk000003c5 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk000003b7/sig00001061 ), + .Q(\blk00000003/sig000004f2 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000003b7/blk000003c4 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk000003b7/sig00001060 ), + .Q(\blk00000003/sig000004f3 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000003b7/blk000003c3 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk000003b7/sig0000105f ), + .Q(\blk00000003/sig000004f4 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000003b7/blk000003c2 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk000003b7/sig0000105e ), + .Q(\blk00000003/sig000004f5 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000003b7/blk000003c1 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk000003b7/sig0000105d ), + .Q(\blk00000003/sig000004f6 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000003b7/blk000003c0 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk000003b7/sig0000105c ), + .Q(\blk00000003/sig000004f7 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000003b7/blk000003bf ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk000003b7/sig0000105b ), + .Q(\blk00000003/sig000004f8 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000003b7/blk000003be ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk000003b7/sig0000105a ), + .Q(\blk00000003/sig000004f9 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000003b7/blk000003bd ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk000003b7/sig00001059 ), + .Q(\blk00000003/sig000004fa ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000003b7/blk000003bc ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk000003b7/sig00001058 ), + .Q(\blk00000003/sig000004fb ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000003b7/blk000003bb ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk000003b7/sig00001057 ), + .Q(\blk00000003/sig000004fc ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000003b7/blk000003ba ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk000003b7/sig00001056 ), + .Q(\blk00000003/sig000004fd ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000003b7/blk000003b9 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk000003b7/sig00001055 ), + .Q(\blk00000003/sig000004fe ) + ); + GND \blk00000003/blk000003b7/blk000003b8 ( + .G(\blk00000003/blk000003b7/sig00001054 ) + ); + LUT2 #( + .INIT ( 4'h8 )) + \blk00000003/blk000003ea/blk0000041c ( + .I0(ce), + .I1(\blk00000003/sig00000755 ), + .O(\blk00000003/blk000003ea/sig000010bb ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk000003ea/blk0000041b ( + .A0(\blk00000003/sig00000758 ), + .A1(\blk00000003/blk000003ea/sig000010a2 ), + .A2(\blk00000003/blk000003ea/sig000010a2 ), + .A3(\blk00000003/blk000003ea/sig000010a2 ), + .CE(\blk00000003/blk000003ea/sig000010bb ), + .CLK(clk), + .D(\blk00000003/sig000005e4 ), + .Q(\blk00000003/blk000003ea/sig000010b9 ), + .Q15(\NLW_blk00000003/blk000003ea/blk0000041b_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk000003ea/blk0000041a ( + .A0(\blk00000003/sig00000758 ), + .A1(\blk00000003/blk000003ea/sig000010a2 ), + .A2(\blk00000003/blk000003ea/sig000010a2 ), + .A3(\blk00000003/blk000003ea/sig000010a2 ), + .CE(\blk00000003/blk000003ea/sig000010bb ), + .CLK(clk), + .D(\blk00000003/sig000005e5 ), + .Q(\blk00000003/blk000003ea/sig000010b8 ), + .Q15(\NLW_blk00000003/blk000003ea/blk0000041a_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk000003ea/blk00000419 ( + .A0(\blk00000003/sig00000758 ), + .A1(\blk00000003/blk000003ea/sig000010a2 ), + .A2(\blk00000003/blk000003ea/sig000010a2 ), + .A3(\blk00000003/blk000003ea/sig000010a2 ), + .CE(\blk00000003/blk000003ea/sig000010bb ), + .CLK(clk), + .D(\blk00000003/sig000005e3 ), + .Q(\blk00000003/blk000003ea/sig000010ba ), + .Q15(\NLW_blk00000003/blk000003ea/blk00000419_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk000003ea/blk00000418 ( + .A0(\blk00000003/sig00000758 ), + .A1(\blk00000003/blk000003ea/sig000010a2 ), + .A2(\blk00000003/blk000003ea/sig000010a2 ), + .A3(\blk00000003/blk000003ea/sig000010a2 ), + .CE(\blk00000003/blk000003ea/sig000010bb ), + .CLK(clk), + .D(\blk00000003/sig000005e7 ), + .Q(\blk00000003/blk000003ea/sig000010b6 ), + .Q15(\NLW_blk00000003/blk000003ea/blk00000418_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk000003ea/blk00000417 ( + .A0(\blk00000003/sig00000758 ), + .A1(\blk00000003/blk000003ea/sig000010a2 ), + .A2(\blk00000003/blk000003ea/sig000010a2 ), + .A3(\blk00000003/blk000003ea/sig000010a2 ), + .CE(\blk00000003/blk000003ea/sig000010bb ), + .CLK(clk), + .D(\blk00000003/sig000005e8 ), + .Q(\blk00000003/blk000003ea/sig000010b5 ), + .Q15(\NLW_blk00000003/blk000003ea/blk00000417_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk000003ea/blk00000416 ( + .A0(\blk00000003/sig00000758 ), + .A1(\blk00000003/blk000003ea/sig000010a2 ), + .A2(\blk00000003/blk000003ea/sig000010a2 ), + .A3(\blk00000003/blk000003ea/sig000010a2 ), + .CE(\blk00000003/blk000003ea/sig000010bb ), + .CLK(clk), + .D(\blk00000003/sig000005e6 ), + .Q(\blk00000003/blk000003ea/sig000010b7 ), + .Q15(\NLW_blk00000003/blk000003ea/blk00000416_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk000003ea/blk00000415 ( + .A0(\blk00000003/sig00000758 ), + .A1(\blk00000003/blk000003ea/sig000010a2 ), + .A2(\blk00000003/blk000003ea/sig000010a2 ), + .A3(\blk00000003/blk000003ea/sig000010a2 ), + .CE(\blk00000003/blk000003ea/sig000010bb ), + .CLK(clk), + .D(\blk00000003/sig000005ea ), + .Q(\blk00000003/blk000003ea/sig000010b3 ), + .Q15(\NLW_blk00000003/blk000003ea/blk00000415_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk000003ea/blk00000414 ( + .A0(\blk00000003/sig00000758 ), + .A1(\blk00000003/blk000003ea/sig000010a2 ), + .A2(\blk00000003/blk000003ea/sig000010a2 ), + .A3(\blk00000003/blk000003ea/sig000010a2 ), + .CE(\blk00000003/blk000003ea/sig000010bb ), + .CLK(clk), + .D(\blk00000003/sig000005eb ), + .Q(\blk00000003/blk000003ea/sig000010b2 ), + .Q15(\NLW_blk00000003/blk000003ea/blk00000414_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk000003ea/blk00000413 ( + .A0(\blk00000003/sig00000758 ), + .A1(\blk00000003/blk000003ea/sig000010a2 ), + .A2(\blk00000003/blk000003ea/sig000010a2 ), + .A3(\blk00000003/blk000003ea/sig000010a2 ), + .CE(\blk00000003/blk000003ea/sig000010bb ), + .CLK(clk), + .D(\blk00000003/sig000005e9 ), + .Q(\blk00000003/blk000003ea/sig000010b4 ), + .Q15(\NLW_blk00000003/blk000003ea/blk00000413_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk000003ea/blk00000412 ( + .A0(\blk00000003/sig00000758 ), + .A1(\blk00000003/blk000003ea/sig000010a2 ), + .A2(\blk00000003/blk000003ea/sig000010a2 ), + .A3(\blk00000003/blk000003ea/sig000010a2 ), + .CE(\blk00000003/blk000003ea/sig000010bb ), + .CLK(clk), + .D(\blk00000003/sig000005ed ), + .Q(\blk00000003/blk000003ea/sig000010b0 ), + .Q15(\NLW_blk00000003/blk000003ea/blk00000412_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk000003ea/blk00000411 ( + .A0(\blk00000003/sig00000758 ), + .A1(\blk00000003/blk000003ea/sig000010a2 ), + .A2(\blk00000003/blk000003ea/sig000010a2 ), + .A3(\blk00000003/blk000003ea/sig000010a2 ), + .CE(\blk00000003/blk000003ea/sig000010bb ), + .CLK(clk), + .D(\blk00000003/sig000005ee ), + .Q(\blk00000003/blk000003ea/sig000010af ), + .Q15(\NLW_blk00000003/blk000003ea/blk00000411_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk000003ea/blk00000410 ( + .A0(\blk00000003/sig00000758 ), + .A1(\blk00000003/blk000003ea/sig000010a2 ), + .A2(\blk00000003/blk000003ea/sig000010a2 ), + .A3(\blk00000003/blk000003ea/sig000010a2 ), + .CE(\blk00000003/blk000003ea/sig000010bb ), + .CLK(clk), + .D(\blk00000003/sig000005ec ), + .Q(\blk00000003/blk000003ea/sig000010b1 ), + .Q15(\NLW_blk00000003/blk000003ea/blk00000410_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk000003ea/blk0000040f ( + .A0(\blk00000003/sig00000758 ), + .A1(\blk00000003/blk000003ea/sig000010a2 ), + .A2(\blk00000003/blk000003ea/sig000010a2 ), + .A3(\blk00000003/blk000003ea/sig000010a2 ), + .CE(\blk00000003/blk000003ea/sig000010bb ), + .CLK(clk), + .D(\blk00000003/sig000005f0 ), + .Q(\blk00000003/blk000003ea/sig000010ad ), + .Q15(\NLW_blk00000003/blk000003ea/blk0000040f_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk000003ea/blk0000040e ( + .A0(\blk00000003/sig00000758 ), + .A1(\blk00000003/blk000003ea/sig000010a2 ), + .A2(\blk00000003/blk000003ea/sig000010a2 ), + .A3(\blk00000003/blk000003ea/sig000010a2 ), + .CE(\blk00000003/blk000003ea/sig000010bb ), + .CLK(clk), + .D(\blk00000003/sig000005f1 ), + .Q(\blk00000003/blk000003ea/sig000010ac ), + .Q15(\NLW_blk00000003/blk000003ea/blk0000040e_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk000003ea/blk0000040d ( + .A0(\blk00000003/sig00000758 ), + .A1(\blk00000003/blk000003ea/sig000010a2 ), + .A2(\blk00000003/blk000003ea/sig000010a2 ), + .A3(\blk00000003/blk000003ea/sig000010a2 ), + .CE(\blk00000003/blk000003ea/sig000010bb ), + .CLK(clk), + .D(\blk00000003/sig000005ef ), + .Q(\blk00000003/blk000003ea/sig000010ae ), + .Q15(\NLW_blk00000003/blk000003ea/blk0000040d_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk000003ea/blk0000040c ( + .A0(\blk00000003/sig00000758 ), + .A1(\blk00000003/blk000003ea/sig000010a2 ), + .A2(\blk00000003/blk000003ea/sig000010a2 ), + .A3(\blk00000003/blk000003ea/sig000010a2 ), + .CE(\blk00000003/blk000003ea/sig000010bb ), + .CLK(clk), + .D(\blk00000003/sig000005f3 ), + .Q(\blk00000003/blk000003ea/sig000010aa ), + .Q15(\NLW_blk00000003/blk000003ea/blk0000040c_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk000003ea/blk0000040b ( + .A0(\blk00000003/sig00000758 ), + .A1(\blk00000003/blk000003ea/sig000010a2 ), + .A2(\blk00000003/blk000003ea/sig000010a2 ), + .A3(\blk00000003/blk000003ea/sig000010a2 ), + .CE(\blk00000003/blk000003ea/sig000010bb ), + .CLK(clk), + .D(\blk00000003/sig000005f4 ), + .Q(\blk00000003/blk000003ea/sig000010a9 ), + .Q15(\NLW_blk00000003/blk000003ea/blk0000040b_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk000003ea/blk0000040a ( + .A0(\blk00000003/sig00000758 ), + .A1(\blk00000003/blk000003ea/sig000010a2 ), + .A2(\blk00000003/blk000003ea/sig000010a2 ), + .A3(\blk00000003/blk000003ea/sig000010a2 ), + .CE(\blk00000003/blk000003ea/sig000010bb ), + .CLK(clk), + .D(\blk00000003/sig000005f2 ), + .Q(\blk00000003/blk000003ea/sig000010ab ), + .Q15(\NLW_blk00000003/blk000003ea/blk0000040a_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk000003ea/blk00000409 ( + .A0(\blk00000003/sig00000758 ), + .A1(\blk00000003/blk000003ea/sig000010a2 ), + .A2(\blk00000003/blk000003ea/sig000010a2 ), + .A3(\blk00000003/blk000003ea/sig000010a2 ), + .CE(\blk00000003/blk000003ea/sig000010bb ), + .CLK(clk), + .D(\blk00000003/sig000005f6 ), + .Q(\blk00000003/blk000003ea/sig000010a7 ), + .Q15(\NLW_blk00000003/blk000003ea/blk00000409_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk000003ea/blk00000408 ( + .A0(\blk00000003/sig00000758 ), + .A1(\blk00000003/blk000003ea/sig000010a2 ), + .A2(\blk00000003/blk000003ea/sig000010a2 ), + .A3(\blk00000003/blk000003ea/sig000010a2 ), + .CE(\blk00000003/blk000003ea/sig000010bb ), + .CLK(clk), + .D(\blk00000003/sig000005f7 ), + .Q(\blk00000003/blk000003ea/sig000010a6 ), + .Q15(\NLW_blk00000003/blk000003ea/blk00000408_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk000003ea/blk00000407 ( + .A0(\blk00000003/sig00000758 ), + .A1(\blk00000003/blk000003ea/sig000010a2 ), + .A2(\blk00000003/blk000003ea/sig000010a2 ), + .A3(\blk00000003/blk000003ea/sig000010a2 ), + .CE(\blk00000003/blk000003ea/sig000010bb ), + .CLK(clk), + .D(\blk00000003/sig000005f5 ), + .Q(\blk00000003/blk000003ea/sig000010a8 ), + .Q15(\NLW_blk00000003/blk000003ea/blk00000407_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk000003ea/blk00000406 ( + .A0(\blk00000003/sig00000758 ), + .A1(\blk00000003/blk000003ea/sig000010a2 ), + .A2(\blk00000003/blk000003ea/sig000010a2 ), + .A3(\blk00000003/blk000003ea/sig000010a2 ), + .CE(\blk00000003/blk000003ea/sig000010bb ), + .CLK(clk), + .D(\blk00000003/sig000005f9 ), + .Q(\blk00000003/blk000003ea/sig000010a4 ), + .Q15(\NLW_blk00000003/blk000003ea/blk00000406_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk000003ea/blk00000405 ( + .A0(\blk00000003/sig00000758 ), + .A1(\blk00000003/blk000003ea/sig000010a2 ), + .A2(\blk00000003/blk000003ea/sig000010a2 ), + .A3(\blk00000003/blk000003ea/sig000010a2 ), + .CE(\blk00000003/blk000003ea/sig000010bb ), + .CLK(clk), + .D(\blk00000003/sig000005fa ), + .Q(\blk00000003/blk000003ea/sig000010a3 ), + .Q15(\NLW_blk00000003/blk000003ea/blk00000405_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk000003ea/blk00000404 ( + .A0(\blk00000003/sig00000758 ), + .A1(\blk00000003/blk000003ea/sig000010a2 ), + .A2(\blk00000003/blk000003ea/sig000010a2 ), + .A3(\blk00000003/blk000003ea/sig000010a2 ), + .CE(\blk00000003/blk000003ea/sig000010bb ), + .CLK(clk), + .D(\blk00000003/sig000005f8 ), + .Q(\blk00000003/blk000003ea/sig000010a5 ), + .Q15(\NLW_blk00000003/blk000003ea/blk00000404_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000003ea/blk00000403 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk000003ea/sig000010ba ), + .Q(\blk00000003/sig00000643 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000003ea/blk00000402 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk000003ea/sig000010b9 ), + .Q(\blk00000003/sig00000644 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000003ea/blk00000401 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk000003ea/sig000010b8 ), + .Q(\blk00000003/sig00000645 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000003ea/blk00000400 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk000003ea/sig000010b7 ), + .Q(\blk00000003/sig00000646 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000003ea/blk000003ff ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk000003ea/sig000010b6 ), + .Q(\blk00000003/sig00000647 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000003ea/blk000003fe ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk000003ea/sig000010b5 ), + .Q(\blk00000003/sig00000648 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000003ea/blk000003fd ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk000003ea/sig000010b4 ), + .Q(\blk00000003/sig00000649 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000003ea/blk000003fc ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk000003ea/sig000010b3 ), + .Q(\blk00000003/sig0000064a ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000003ea/blk000003fb ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk000003ea/sig000010b2 ), + .Q(\blk00000003/sig0000064b ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000003ea/blk000003fa ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk000003ea/sig000010b1 ), + .Q(\blk00000003/sig0000064c ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000003ea/blk000003f9 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk000003ea/sig000010b0 ), + .Q(\blk00000003/sig0000064d ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000003ea/blk000003f8 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk000003ea/sig000010af ), + .Q(\blk00000003/sig0000064e ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000003ea/blk000003f7 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk000003ea/sig000010ae ), + .Q(\blk00000003/sig0000064f ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000003ea/blk000003f6 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk000003ea/sig000010ad ), + .Q(\blk00000003/sig00000650 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000003ea/blk000003f5 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk000003ea/sig000010ac ), + .Q(\blk00000003/sig00000651 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000003ea/blk000003f4 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk000003ea/sig000010ab ), + .Q(\blk00000003/sig00000652 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000003ea/blk000003f3 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk000003ea/sig000010aa ), + .Q(\blk00000003/sig00000653 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000003ea/blk000003f2 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk000003ea/sig000010a9 ), + .Q(\blk00000003/sig00000654 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000003ea/blk000003f1 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk000003ea/sig000010a8 ), + .Q(\blk00000003/sig00000655 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000003ea/blk000003f0 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk000003ea/sig000010a7 ), + .Q(\blk00000003/sig00000656 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000003ea/blk000003ef ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk000003ea/sig000010a6 ), + .Q(\blk00000003/sig00000657 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000003ea/blk000003ee ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk000003ea/sig000010a5 ), + .Q(\blk00000003/sig00000658 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000003ea/blk000003ed ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk000003ea/sig000010a4 ), + .Q(\blk00000003/sig00000659 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000003ea/blk000003ec ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk000003ea/sig000010a3 ), + .Q(\blk00000003/sig0000065a ) + ); + GND \blk00000003/blk000003ea/blk000003eb ( + .G(\blk00000003/blk000003ea/sig000010a2 ) + ); + LUT2 #( + .INIT ( 4'h8 )) + \blk00000003/blk0000041d/blk0000044f ( + .I0(ce), + .I1(\blk00000003/sig00000754 ), + .O(\blk00000003/blk0000041d/sig00001109 ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk0000041d/blk0000044e ( + .A0(\blk00000003/sig00000759 ), + .A1(\blk00000003/blk0000041d/sig000010f0 ), + .A2(\blk00000003/blk0000041d/sig000010f0 ), + .A3(\blk00000003/blk0000041d/sig000010f0 ), + .CE(\blk00000003/blk0000041d/sig00001109 ), + .CLK(clk), + .D(\blk00000003/sig0000080b ), + .Q(\blk00000003/blk0000041d/sig00001107 ), + .Q15(\NLW_blk00000003/blk0000041d/blk0000044e_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk0000041d/blk0000044d ( + .A0(\blk00000003/sig00000759 ), + .A1(\blk00000003/blk0000041d/sig000010f0 ), + .A2(\blk00000003/blk0000041d/sig000010f0 ), + .A3(\blk00000003/blk0000041d/sig000010f0 ), + .CE(\blk00000003/blk0000041d/sig00001109 ), + .CLK(clk), + .D(\blk00000003/sig0000080c ), + .Q(\blk00000003/blk0000041d/sig00001106 ), + .Q15(\NLW_blk00000003/blk0000041d/blk0000044d_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk0000041d/blk0000044c ( + .A0(\blk00000003/sig00000759 ), + .A1(\blk00000003/blk0000041d/sig000010f0 ), + .A2(\blk00000003/blk0000041d/sig000010f0 ), + .A3(\blk00000003/blk0000041d/sig000010f0 ), + .CE(\blk00000003/blk0000041d/sig00001109 ), + .CLK(clk), + .D(\blk00000003/sig0000080a ), + .Q(\blk00000003/blk0000041d/sig00001108 ), + .Q15(\NLW_blk00000003/blk0000041d/blk0000044c_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk0000041d/blk0000044b ( + .A0(\blk00000003/sig00000759 ), + .A1(\blk00000003/blk0000041d/sig000010f0 ), + .A2(\blk00000003/blk0000041d/sig000010f0 ), + .A3(\blk00000003/blk0000041d/sig000010f0 ), + .CE(\blk00000003/blk0000041d/sig00001109 ), + .CLK(clk), + .D(\blk00000003/sig0000080e ), + .Q(\blk00000003/blk0000041d/sig00001104 ), + .Q15(\NLW_blk00000003/blk0000041d/blk0000044b_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk0000041d/blk0000044a ( + .A0(\blk00000003/sig00000759 ), + .A1(\blk00000003/blk0000041d/sig000010f0 ), + .A2(\blk00000003/blk0000041d/sig000010f0 ), + .A3(\blk00000003/blk0000041d/sig000010f0 ), + .CE(\blk00000003/blk0000041d/sig00001109 ), + .CLK(clk), + .D(\blk00000003/sig0000080f ), + .Q(\blk00000003/blk0000041d/sig00001103 ), + .Q15(\NLW_blk00000003/blk0000041d/blk0000044a_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk0000041d/blk00000449 ( + .A0(\blk00000003/sig00000759 ), + .A1(\blk00000003/blk0000041d/sig000010f0 ), + .A2(\blk00000003/blk0000041d/sig000010f0 ), + .A3(\blk00000003/blk0000041d/sig000010f0 ), + .CE(\blk00000003/blk0000041d/sig00001109 ), + .CLK(clk), + .D(\blk00000003/sig0000080d ), + .Q(\blk00000003/blk0000041d/sig00001105 ), + .Q15(\NLW_blk00000003/blk0000041d/blk00000449_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk0000041d/blk00000448 ( + .A0(\blk00000003/sig00000759 ), + .A1(\blk00000003/blk0000041d/sig000010f0 ), + .A2(\blk00000003/blk0000041d/sig000010f0 ), + .A3(\blk00000003/blk0000041d/sig000010f0 ), + .CE(\blk00000003/blk0000041d/sig00001109 ), + .CLK(clk), + .D(\blk00000003/sig00000811 ), + .Q(\blk00000003/blk0000041d/sig00001101 ), + .Q15(\NLW_blk00000003/blk0000041d/blk00000448_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk0000041d/blk00000447 ( + .A0(\blk00000003/sig00000759 ), + .A1(\blk00000003/blk0000041d/sig000010f0 ), + .A2(\blk00000003/blk0000041d/sig000010f0 ), + .A3(\blk00000003/blk0000041d/sig000010f0 ), + .CE(\blk00000003/blk0000041d/sig00001109 ), + .CLK(clk), + .D(\blk00000003/sig00000812 ), + .Q(\blk00000003/blk0000041d/sig00001100 ), + .Q15(\NLW_blk00000003/blk0000041d/blk00000447_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk0000041d/blk00000446 ( + .A0(\blk00000003/sig00000759 ), + .A1(\blk00000003/blk0000041d/sig000010f0 ), + .A2(\blk00000003/blk0000041d/sig000010f0 ), + .A3(\blk00000003/blk0000041d/sig000010f0 ), + .CE(\blk00000003/blk0000041d/sig00001109 ), + .CLK(clk), + .D(\blk00000003/sig00000810 ), + .Q(\blk00000003/blk0000041d/sig00001102 ), + .Q15(\NLW_blk00000003/blk0000041d/blk00000446_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk0000041d/blk00000445 ( + .A0(\blk00000003/sig00000759 ), + .A1(\blk00000003/blk0000041d/sig000010f0 ), + .A2(\blk00000003/blk0000041d/sig000010f0 ), + .A3(\blk00000003/blk0000041d/sig000010f0 ), + .CE(\blk00000003/blk0000041d/sig00001109 ), + .CLK(clk), + .D(\blk00000003/sig00000814 ), + .Q(\blk00000003/blk0000041d/sig000010fe ), + .Q15(\NLW_blk00000003/blk0000041d/blk00000445_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk0000041d/blk00000444 ( + .A0(\blk00000003/sig00000759 ), + .A1(\blk00000003/blk0000041d/sig000010f0 ), + .A2(\blk00000003/blk0000041d/sig000010f0 ), + .A3(\blk00000003/blk0000041d/sig000010f0 ), + .CE(\blk00000003/blk0000041d/sig00001109 ), + .CLK(clk), + .D(\blk00000003/sig00000815 ), + .Q(\blk00000003/blk0000041d/sig000010fd ), + .Q15(\NLW_blk00000003/blk0000041d/blk00000444_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk0000041d/blk00000443 ( + .A0(\blk00000003/sig00000759 ), + .A1(\blk00000003/blk0000041d/sig000010f0 ), + .A2(\blk00000003/blk0000041d/sig000010f0 ), + .A3(\blk00000003/blk0000041d/sig000010f0 ), + .CE(\blk00000003/blk0000041d/sig00001109 ), + .CLK(clk), + .D(\blk00000003/sig00000813 ), + .Q(\blk00000003/blk0000041d/sig000010ff ), + .Q15(\NLW_blk00000003/blk0000041d/blk00000443_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk0000041d/blk00000442 ( + .A0(\blk00000003/sig00000759 ), + .A1(\blk00000003/blk0000041d/sig000010f0 ), + .A2(\blk00000003/blk0000041d/sig000010f0 ), + .A3(\blk00000003/blk0000041d/sig000010f0 ), + .CE(\blk00000003/blk0000041d/sig00001109 ), + .CLK(clk), + .D(\blk00000003/sig00000817 ), + .Q(\blk00000003/blk0000041d/sig000010fb ), + .Q15(\NLW_blk00000003/blk0000041d/blk00000442_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk0000041d/blk00000441 ( + .A0(\blk00000003/sig00000759 ), + .A1(\blk00000003/blk0000041d/sig000010f0 ), + .A2(\blk00000003/blk0000041d/sig000010f0 ), + .A3(\blk00000003/blk0000041d/sig000010f0 ), + .CE(\blk00000003/blk0000041d/sig00001109 ), + .CLK(clk), + .D(\blk00000003/sig00000818 ), + .Q(\blk00000003/blk0000041d/sig000010fa ), + .Q15(\NLW_blk00000003/blk0000041d/blk00000441_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk0000041d/blk00000440 ( + .A0(\blk00000003/sig00000759 ), + .A1(\blk00000003/blk0000041d/sig000010f0 ), + .A2(\blk00000003/blk0000041d/sig000010f0 ), + .A3(\blk00000003/blk0000041d/sig000010f0 ), + .CE(\blk00000003/blk0000041d/sig00001109 ), + .CLK(clk), + .D(\blk00000003/sig00000816 ), + .Q(\blk00000003/blk0000041d/sig000010fc ), + .Q15(\NLW_blk00000003/blk0000041d/blk00000440_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk0000041d/blk0000043f ( + .A0(\blk00000003/sig00000759 ), + .A1(\blk00000003/blk0000041d/sig000010f0 ), + .A2(\blk00000003/blk0000041d/sig000010f0 ), + .A3(\blk00000003/blk0000041d/sig000010f0 ), + .CE(\blk00000003/blk0000041d/sig00001109 ), + .CLK(clk), + .D(\blk00000003/sig0000081a ), + .Q(\blk00000003/blk0000041d/sig000010f8 ), + .Q15(\NLW_blk00000003/blk0000041d/blk0000043f_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk0000041d/blk0000043e ( + .A0(\blk00000003/sig00000759 ), + .A1(\blk00000003/blk0000041d/sig000010f0 ), + .A2(\blk00000003/blk0000041d/sig000010f0 ), + .A3(\blk00000003/blk0000041d/sig000010f0 ), + .CE(\blk00000003/blk0000041d/sig00001109 ), + .CLK(clk), + .D(\blk00000003/sig0000081b ), + .Q(\blk00000003/blk0000041d/sig000010f7 ), + .Q15(\NLW_blk00000003/blk0000041d/blk0000043e_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk0000041d/blk0000043d ( + .A0(\blk00000003/sig00000759 ), + .A1(\blk00000003/blk0000041d/sig000010f0 ), + .A2(\blk00000003/blk0000041d/sig000010f0 ), + .A3(\blk00000003/blk0000041d/sig000010f0 ), + .CE(\blk00000003/blk0000041d/sig00001109 ), + .CLK(clk), + .D(\blk00000003/sig00000819 ), + .Q(\blk00000003/blk0000041d/sig000010f9 ), + .Q15(\NLW_blk00000003/blk0000041d/blk0000043d_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk0000041d/blk0000043c ( + .A0(\blk00000003/sig00000759 ), + .A1(\blk00000003/blk0000041d/sig000010f0 ), + .A2(\blk00000003/blk0000041d/sig000010f0 ), + .A3(\blk00000003/blk0000041d/sig000010f0 ), + .CE(\blk00000003/blk0000041d/sig00001109 ), + .CLK(clk), + .D(\blk00000003/sig0000081d ), + .Q(\blk00000003/blk0000041d/sig000010f5 ), + .Q15(\NLW_blk00000003/blk0000041d/blk0000043c_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk0000041d/blk0000043b ( + .A0(\blk00000003/sig00000759 ), + .A1(\blk00000003/blk0000041d/sig000010f0 ), + .A2(\blk00000003/blk0000041d/sig000010f0 ), + .A3(\blk00000003/blk0000041d/sig000010f0 ), + .CE(\blk00000003/blk0000041d/sig00001109 ), + .CLK(clk), + .D(\blk00000003/sig0000081e ), + .Q(\blk00000003/blk0000041d/sig000010f4 ), + .Q15(\NLW_blk00000003/blk0000041d/blk0000043b_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk0000041d/blk0000043a ( + .A0(\blk00000003/sig00000759 ), + .A1(\blk00000003/blk0000041d/sig000010f0 ), + .A2(\blk00000003/blk0000041d/sig000010f0 ), + .A3(\blk00000003/blk0000041d/sig000010f0 ), + .CE(\blk00000003/blk0000041d/sig00001109 ), + .CLK(clk), + .D(\blk00000003/sig0000081c ), + .Q(\blk00000003/blk0000041d/sig000010f6 ), + .Q15(\NLW_blk00000003/blk0000041d/blk0000043a_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk0000041d/blk00000439 ( + .A0(\blk00000003/sig00000759 ), + .A1(\blk00000003/blk0000041d/sig000010f0 ), + .A2(\blk00000003/blk0000041d/sig000010f0 ), + .A3(\blk00000003/blk0000041d/sig000010f0 ), + .CE(\blk00000003/blk0000041d/sig00001109 ), + .CLK(clk), + .D(\blk00000003/sig00000820 ), + .Q(\blk00000003/blk0000041d/sig000010f2 ), + .Q15(\NLW_blk00000003/blk0000041d/blk00000439_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk0000041d/blk00000438 ( + .A0(\blk00000003/sig00000759 ), + .A1(\blk00000003/blk0000041d/sig000010f0 ), + .A2(\blk00000003/blk0000041d/sig000010f0 ), + .A3(\blk00000003/blk0000041d/sig000010f0 ), + .CE(\blk00000003/blk0000041d/sig00001109 ), + .CLK(clk), + .D(\blk00000003/sig00000821 ), + .Q(\blk00000003/blk0000041d/sig000010f1 ), + .Q15(\NLW_blk00000003/blk0000041d/blk00000438_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk0000041d/blk00000437 ( + .A0(\blk00000003/sig00000759 ), + .A1(\blk00000003/blk0000041d/sig000010f0 ), + .A2(\blk00000003/blk0000041d/sig000010f0 ), + .A3(\blk00000003/blk0000041d/sig000010f0 ), + .CE(\blk00000003/blk0000041d/sig00001109 ), + .CLK(clk), + .D(\blk00000003/sig0000081f ), + .Q(\blk00000003/blk0000041d/sig000010f3 ), + .Q15(\NLW_blk00000003/blk0000041d/blk00000437_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk0000041d/blk00000436 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk0000041d/sig00001108 ), + .Q(\blk00000003/sig0000065b ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk0000041d/blk00000435 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk0000041d/sig00001107 ), + .Q(\blk00000003/sig0000065c ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk0000041d/blk00000434 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk0000041d/sig00001106 ), + .Q(\blk00000003/sig0000065d ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk0000041d/blk00000433 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk0000041d/sig00001105 ), + .Q(\blk00000003/sig0000065e ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk0000041d/blk00000432 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk0000041d/sig00001104 ), + .Q(\blk00000003/sig0000065f ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk0000041d/blk00000431 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk0000041d/sig00001103 ), + .Q(\blk00000003/sig00000660 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk0000041d/blk00000430 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk0000041d/sig00001102 ), + .Q(\blk00000003/sig00000661 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk0000041d/blk0000042f ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk0000041d/sig00001101 ), + .Q(\blk00000003/sig00000662 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk0000041d/blk0000042e ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk0000041d/sig00001100 ), + .Q(\blk00000003/sig00000663 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk0000041d/blk0000042d ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk0000041d/sig000010ff ), + .Q(\blk00000003/sig00000664 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk0000041d/blk0000042c ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk0000041d/sig000010fe ), + .Q(\blk00000003/sig00000665 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk0000041d/blk0000042b ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk0000041d/sig000010fd ), + .Q(\blk00000003/sig00000666 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk0000041d/blk0000042a ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk0000041d/sig000010fc ), + .Q(\blk00000003/sig00000667 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk0000041d/blk00000429 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk0000041d/sig000010fb ), + .Q(\blk00000003/sig00000668 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk0000041d/blk00000428 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk0000041d/sig000010fa ), + .Q(\blk00000003/sig00000669 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk0000041d/blk00000427 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk0000041d/sig000010f9 ), + .Q(\blk00000003/sig0000066a ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk0000041d/blk00000426 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk0000041d/sig000010f8 ), + .Q(\blk00000003/sig0000066b ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk0000041d/blk00000425 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk0000041d/sig000010f7 ), + .Q(\blk00000003/sig0000066c ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk0000041d/blk00000424 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk0000041d/sig000010f6 ), + .Q(\blk00000003/sig0000066d ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk0000041d/blk00000423 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk0000041d/sig000010f5 ), + .Q(\blk00000003/sig0000066e ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk0000041d/blk00000422 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk0000041d/sig000010f4 ), + .Q(\blk00000003/sig0000066f ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk0000041d/blk00000421 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk0000041d/sig000010f3 ), + .Q(\blk00000003/sig00000670 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk0000041d/blk00000420 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk0000041d/sig000010f2 ), + .Q(\blk00000003/sig00000671 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk0000041d/blk0000041f ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk0000041d/sig000010f1 ), + .Q(\blk00000003/sig00000672 ) + ); + GND \blk00000003/blk0000041d/blk0000041e ( + .G(\blk00000003/blk0000041d/sig000010f0 ) + ); + LUT2 #( + .INIT ( 4'h8 )) + \blk00000003/blk00000450/blk00000482 ( + .I0(ce), + .I1(\blk00000003/sig0000075d ), + .O(\blk00000003/blk00000450/sig00001157 ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000450/blk00000481 ( + .A0(\blk00000003/sig0000075e ), + .A1(\blk00000003/blk00000450/sig0000113e ), + .A2(\blk00000003/blk00000450/sig0000113e ), + .A3(\blk00000003/blk00000450/sig0000113e ), + .CE(\blk00000003/blk00000450/sig00001157 ), + .CLK(clk), + .D(\blk00000003/sig000002ba ), + .Q(\blk00000003/blk00000450/sig00001155 ), + .Q15(\NLW_blk00000003/blk00000450/blk00000481_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000450/blk00000480 ( + .A0(\blk00000003/sig0000075e ), + .A1(\blk00000003/blk00000450/sig0000113e ), + .A2(\blk00000003/blk00000450/sig0000113e ), + .A3(\blk00000003/blk00000450/sig0000113e ), + .CE(\blk00000003/blk00000450/sig00001157 ), + .CLK(clk), + .D(\blk00000003/sig000002bb ), + .Q(\blk00000003/blk00000450/sig00001154 ), + .Q15(\NLW_blk00000003/blk00000450/blk00000480_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000450/blk0000047f ( + .A0(\blk00000003/sig0000075e ), + .A1(\blk00000003/blk00000450/sig0000113e ), + .A2(\blk00000003/blk00000450/sig0000113e ), + .A3(\blk00000003/blk00000450/sig0000113e ), + .CE(\blk00000003/blk00000450/sig00001157 ), + .CLK(clk), + .D(\blk00000003/sig000002b9 ), + .Q(\blk00000003/blk00000450/sig00001156 ), + .Q15(\NLW_blk00000003/blk00000450/blk0000047f_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000450/blk0000047e ( + .A0(\blk00000003/sig0000075e ), + .A1(\blk00000003/blk00000450/sig0000113e ), + .A2(\blk00000003/blk00000450/sig0000113e ), + .A3(\blk00000003/blk00000450/sig0000113e ), + .CE(\blk00000003/blk00000450/sig00001157 ), + .CLK(clk), + .D(\blk00000003/sig000002bd ), + .Q(\blk00000003/blk00000450/sig00001152 ), + .Q15(\NLW_blk00000003/blk00000450/blk0000047e_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000450/blk0000047d ( + .A0(\blk00000003/sig0000075e ), + .A1(\blk00000003/blk00000450/sig0000113e ), + .A2(\blk00000003/blk00000450/sig0000113e ), + .A3(\blk00000003/blk00000450/sig0000113e ), + .CE(\blk00000003/blk00000450/sig00001157 ), + .CLK(clk), + .D(\blk00000003/sig000002be ), + .Q(\blk00000003/blk00000450/sig00001151 ), + .Q15(\NLW_blk00000003/blk00000450/blk0000047d_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000450/blk0000047c ( + .A0(\blk00000003/sig0000075e ), + .A1(\blk00000003/blk00000450/sig0000113e ), + .A2(\blk00000003/blk00000450/sig0000113e ), + .A3(\blk00000003/blk00000450/sig0000113e ), + .CE(\blk00000003/blk00000450/sig00001157 ), + .CLK(clk), + .D(\blk00000003/sig000002bc ), + .Q(\blk00000003/blk00000450/sig00001153 ), + .Q15(\NLW_blk00000003/blk00000450/blk0000047c_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000450/blk0000047b ( + .A0(\blk00000003/sig0000075e ), + .A1(\blk00000003/blk00000450/sig0000113e ), + .A2(\blk00000003/blk00000450/sig0000113e ), + .A3(\blk00000003/blk00000450/sig0000113e ), + .CE(\blk00000003/blk00000450/sig00001157 ), + .CLK(clk), + .D(\blk00000003/sig000002c0 ), + .Q(\blk00000003/blk00000450/sig0000114f ), + .Q15(\NLW_blk00000003/blk00000450/blk0000047b_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000450/blk0000047a ( + .A0(\blk00000003/sig0000075e ), + .A1(\blk00000003/blk00000450/sig0000113e ), + .A2(\blk00000003/blk00000450/sig0000113e ), + .A3(\blk00000003/blk00000450/sig0000113e ), + .CE(\blk00000003/blk00000450/sig00001157 ), + .CLK(clk), + .D(\blk00000003/sig000002c1 ), + .Q(\blk00000003/blk00000450/sig0000114e ), + .Q15(\NLW_blk00000003/blk00000450/blk0000047a_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000450/blk00000479 ( + .A0(\blk00000003/sig0000075e ), + .A1(\blk00000003/blk00000450/sig0000113e ), + .A2(\blk00000003/blk00000450/sig0000113e ), + .A3(\blk00000003/blk00000450/sig0000113e ), + .CE(\blk00000003/blk00000450/sig00001157 ), + .CLK(clk), + .D(\blk00000003/sig000002bf ), + .Q(\blk00000003/blk00000450/sig00001150 ), + .Q15(\NLW_blk00000003/blk00000450/blk00000479_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000450/blk00000478 ( + .A0(\blk00000003/sig0000075e ), + .A1(\blk00000003/blk00000450/sig0000113e ), + .A2(\blk00000003/blk00000450/sig0000113e ), + .A3(\blk00000003/blk00000450/sig0000113e ), + .CE(\blk00000003/blk00000450/sig00001157 ), + .CLK(clk), + .D(\blk00000003/sig000002c3 ), + .Q(\blk00000003/blk00000450/sig0000114c ), + .Q15(\NLW_blk00000003/blk00000450/blk00000478_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000450/blk00000477 ( + .A0(\blk00000003/sig0000075e ), + .A1(\blk00000003/blk00000450/sig0000113e ), + .A2(\blk00000003/blk00000450/sig0000113e ), + .A3(\blk00000003/blk00000450/sig0000113e ), + .CE(\blk00000003/blk00000450/sig00001157 ), + .CLK(clk), + .D(\blk00000003/sig000002c4 ), + .Q(\blk00000003/blk00000450/sig0000114b ), + .Q15(\NLW_blk00000003/blk00000450/blk00000477_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000450/blk00000476 ( + .A0(\blk00000003/sig0000075e ), + .A1(\blk00000003/blk00000450/sig0000113e ), + .A2(\blk00000003/blk00000450/sig0000113e ), + .A3(\blk00000003/blk00000450/sig0000113e ), + .CE(\blk00000003/blk00000450/sig00001157 ), + .CLK(clk), + .D(\blk00000003/sig000002c2 ), + .Q(\blk00000003/blk00000450/sig0000114d ), + .Q15(\NLW_blk00000003/blk00000450/blk00000476_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000450/blk00000475 ( + .A0(\blk00000003/sig0000075e ), + .A1(\blk00000003/blk00000450/sig0000113e ), + .A2(\blk00000003/blk00000450/sig0000113e ), + .A3(\blk00000003/blk00000450/sig0000113e ), + .CE(\blk00000003/blk00000450/sig00001157 ), + .CLK(clk), + .D(\blk00000003/sig000002c6 ), + .Q(\blk00000003/blk00000450/sig00001149 ), + .Q15(\NLW_blk00000003/blk00000450/blk00000475_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000450/blk00000474 ( + .A0(\blk00000003/sig0000075e ), + .A1(\blk00000003/blk00000450/sig0000113e ), + .A2(\blk00000003/blk00000450/sig0000113e ), + .A3(\blk00000003/blk00000450/sig0000113e ), + .CE(\blk00000003/blk00000450/sig00001157 ), + .CLK(clk), + .D(\blk00000003/sig000002c7 ), + .Q(\blk00000003/blk00000450/sig00001148 ), + .Q15(\NLW_blk00000003/blk00000450/blk00000474_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000450/blk00000473 ( + .A0(\blk00000003/sig0000075e ), + .A1(\blk00000003/blk00000450/sig0000113e ), + .A2(\blk00000003/blk00000450/sig0000113e ), + .A3(\blk00000003/blk00000450/sig0000113e ), + .CE(\blk00000003/blk00000450/sig00001157 ), + .CLK(clk), + .D(\blk00000003/sig000002c5 ), + .Q(\blk00000003/blk00000450/sig0000114a ), + .Q15(\NLW_blk00000003/blk00000450/blk00000473_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000450/blk00000472 ( + .A0(\blk00000003/sig0000075e ), + .A1(\blk00000003/blk00000450/sig0000113e ), + .A2(\blk00000003/blk00000450/sig0000113e ), + .A3(\blk00000003/blk00000450/sig0000113e ), + .CE(\blk00000003/blk00000450/sig00001157 ), + .CLK(clk), + .D(\blk00000003/sig000002c9 ), + .Q(\blk00000003/blk00000450/sig00001146 ), + .Q15(\NLW_blk00000003/blk00000450/blk00000472_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000450/blk00000471 ( + .A0(\blk00000003/sig0000075e ), + .A1(\blk00000003/blk00000450/sig0000113e ), + .A2(\blk00000003/blk00000450/sig0000113e ), + .A3(\blk00000003/blk00000450/sig0000113e ), + .CE(\blk00000003/blk00000450/sig00001157 ), + .CLK(clk), + .D(\blk00000003/sig000002ca ), + .Q(\blk00000003/blk00000450/sig00001145 ), + .Q15(\NLW_blk00000003/blk00000450/blk00000471_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000450/blk00000470 ( + .A0(\blk00000003/sig0000075e ), + .A1(\blk00000003/blk00000450/sig0000113e ), + .A2(\blk00000003/blk00000450/sig0000113e ), + .A3(\blk00000003/blk00000450/sig0000113e ), + .CE(\blk00000003/blk00000450/sig00001157 ), + .CLK(clk), + .D(\blk00000003/sig000002c8 ), + .Q(\blk00000003/blk00000450/sig00001147 ), + .Q15(\NLW_blk00000003/blk00000450/blk00000470_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000450/blk0000046f ( + .A0(\blk00000003/sig0000075e ), + .A1(\blk00000003/blk00000450/sig0000113e ), + .A2(\blk00000003/blk00000450/sig0000113e ), + .A3(\blk00000003/blk00000450/sig0000113e ), + .CE(\blk00000003/blk00000450/sig00001157 ), + .CLK(clk), + .D(\blk00000003/sig000002cc ), + .Q(\blk00000003/blk00000450/sig00001143 ), + .Q15(\NLW_blk00000003/blk00000450/blk0000046f_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000450/blk0000046e ( + .A0(\blk00000003/sig0000075e ), + .A1(\blk00000003/blk00000450/sig0000113e ), + .A2(\blk00000003/blk00000450/sig0000113e ), + .A3(\blk00000003/blk00000450/sig0000113e ), + .CE(\blk00000003/blk00000450/sig00001157 ), + .CLK(clk), + .D(\blk00000003/sig000002cd ), + .Q(\blk00000003/blk00000450/sig00001142 ), + .Q15(\NLW_blk00000003/blk00000450/blk0000046e_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000450/blk0000046d ( + .A0(\blk00000003/sig0000075e ), + .A1(\blk00000003/blk00000450/sig0000113e ), + .A2(\blk00000003/blk00000450/sig0000113e ), + .A3(\blk00000003/blk00000450/sig0000113e ), + .CE(\blk00000003/blk00000450/sig00001157 ), + .CLK(clk), + .D(\blk00000003/sig000002cb ), + .Q(\blk00000003/blk00000450/sig00001144 ), + .Q15(\NLW_blk00000003/blk00000450/blk0000046d_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000450/blk0000046c ( + .A0(\blk00000003/sig0000075e ), + .A1(\blk00000003/blk00000450/sig0000113e ), + .A2(\blk00000003/blk00000450/sig0000113e ), + .A3(\blk00000003/blk00000450/sig0000113e ), + .CE(\blk00000003/blk00000450/sig00001157 ), + .CLK(clk), + .D(\blk00000003/sig000002cf ), + .Q(\blk00000003/blk00000450/sig00001140 ), + .Q15(\NLW_blk00000003/blk00000450/blk0000046c_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000450/blk0000046b ( + .A0(\blk00000003/sig0000075e ), + .A1(\blk00000003/blk00000450/sig0000113e ), + .A2(\blk00000003/blk00000450/sig0000113e ), + .A3(\blk00000003/blk00000450/sig0000113e ), + .CE(\blk00000003/blk00000450/sig00001157 ), + .CLK(clk), + .D(\blk00000003/sig000002d0 ), + .Q(\blk00000003/blk00000450/sig0000113f ), + .Q15(\NLW_blk00000003/blk00000450/blk0000046b_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000450/blk0000046a ( + .A0(\blk00000003/sig0000075e ), + .A1(\blk00000003/blk00000450/sig0000113e ), + .A2(\blk00000003/blk00000450/sig0000113e ), + .A3(\blk00000003/blk00000450/sig0000113e ), + .CE(\blk00000003/blk00000450/sig00001157 ), + .CLK(clk), + .D(\blk00000003/sig000002ce ), + .Q(\blk00000003/blk00000450/sig00001141 ), + .Q15(\NLW_blk00000003/blk00000450/blk0000046a_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000450/blk00000469 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk00000450/sig00001156 ), + .Q(\blk00000003/sig0000045d ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000450/blk00000468 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk00000450/sig00001155 ), + .Q(\blk00000003/sig0000045e ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000450/blk00000467 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk00000450/sig00001154 ), + .Q(\blk00000003/sig0000045f ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000450/blk00000466 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk00000450/sig00001153 ), + .Q(\blk00000003/sig00000460 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000450/blk00000465 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk00000450/sig00001152 ), + .Q(\blk00000003/sig00000461 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000450/blk00000464 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk00000450/sig00001151 ), + .Q(\blk00000003/sig00000462 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000450/blk00000463 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk00000450/sig00001150 ), + .Q(\blk00000003/sig00000463 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000450/blk00000462 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk00000450/sig0000114f ), + .Q(\blk00000003/sig00000464 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000450/blk00000461 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk00000450/sig0000114e ), + .Q(\blk00000003/sig00000465 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000450/blk00000460 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk00000450/sig0000114d ), + .Q(\blk00000003/sig00000466 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000450/blk0000045f ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk00000450/sig0000114c ), + .Q(\blk00000003/sig00000467 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000450/blk0000045e ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk00000450/sig0000114b ), + .Q(\blk00000003/sig00000468 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000450/blk0000045d ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk00000450/sig0000114a ), + .Q(\blk00000003/sig00000469 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000450/blk0000045c ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk00000450/sig00001149 ), + .Q(\blk00000003/sig0000046a ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000450/blk0000045b ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk00000450/sig00001148 ), + .Q(\blk00000003/sig0000046b ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000450/blk0000045a ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk00000450/sig00001147 ), + .Q(\blk00000003/sig0000046c ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000450/blk00000459 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk00000450/sig00001146 ), + .Q(\blk00000003/sig0000046d ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000450/blk00000458 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk00000450/sig00001145 ), + .Q(\blk00000003/sig0000046e ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000450/blk00000457 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk00000450/sig00001144 ), + .Q(\blk00000003/sig0000046f ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000450/blk00000456 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk00000450/sig00001143 ), + .Q(\blk00000003/sig00000470 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000450/blk00000455 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk00000450/sig00001142 ), + .Q(\blk00000003/sig00000471 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000450/blk00000454 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk00000450/sig00001141 ), + .Q(\blk00000003/sig00000472 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000450/blk00000453 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk00000450/sig00001140 ), + .Q(\blk00000003/sig00000473 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000450/blk00000452 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk00000450/sig0000113f ), + .Q(\blk00000003/sig00000474 ) + ); + GND \blk00000003/blk00000450/blk00000451 ( + .G(\blk00000003/blk00000450/sig0000113e ) + ); + LUT2 #( + .INIT ( 4'h8 )) + \blk00000003/blk00000483/blk000004b5 ( + .I0(ce), + .I1(\blk00000003/sig0000075a ), + .O(\blk00000003/blk00000483/sig000011a5 ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000483/blk000004b4 ( + .A0(\blk00000003/sig0000075f ), + .A1(\blk00000003/blk00000483/sig0000118c ), + .A2(\blk00000003/blk00000483/sig0000118c ), + .A3(\blk00000003/blk00000483/sig0000118c ), + .CE(\blk00000003/blk00000483/sig000011a5 ), + .CLK(clk), + .D(\blk00000003/sig00000823 ), + .Q(\blk00000003/blk00000483/sig000011a3 ), + .Q15(\NLW_blk00000003/blk00000483/blk000004b4_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000483/blk000004b3 ( + .A0(\blk00000003/sig0000075f ), + .A1(\blk00000003/blk00000483/sig0000118c ), + .A2(\blk00000003/blk00000483/sig0000118c ), + .A3(\blk00000003/blk00000483/sig0000118c ), + .CE(\blk00000003/blk00000483/sig000011a5 ), + .CLK(clk), + .D(\blk00000003/sig00000824 ), + .Q(\blk00000003/blk00000483/sig000011a2 ), + .Q15(\NLW_blk00000003/blk00000483/blk000004b3_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000483/blk000004b2 ( + .A0(\blk00000003/sig0000075f ), + .A1(\blk00000003/blk00000483/sig0000118c ), + .A2(\blk00000003/blk00000483/sig0000118c ), + .A3(\blk00000003/blk00000483/sig0000118c ), + .CE(\blk00000003/blk00000483/sig000011a5 ), + .CLK(clk), + .D(\blk00000003/sig00000822 ), + .Q(\blk00000003/blk00000483/sig000011a4 ), + .Q15(\NLW_blk00000003/blk00000483/blk000004b2_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000483/blk000004b1 ( + .A0(\blk00000003/sig0000075f ), + .A1(\blk00000003/blk00000483/sig0000118c ), + .A2(\blk00000003/blk00000483/sig0000118c ), + .A3(\blk00000003/blk00000483/sig0000118c ), + .CE(\blk00000003/blk00000483/sig000011a5 ), + .CLK(clk), + .D(\blk00000003/sig00000826 ), + .Q(\blk00000003/blk00000483/sig000011a0 ), + .Q15(\NLW_blk00000003/blk00000483/blk000004b1_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000483/blk000004b0 ( + .A0(\blk00000003/sig0000075f ), + .A1(\blk00000003/blk00000483/sig0000118c ), + .A2(\blk00000003/blk00000483/sig0000118c ), + .A3(\blk00000003/blk00000483/sig0000118c ), + .CE(\blk00000003/blk00000483/sig000011a5 ), + .CLK(clk), + .D(\blk00000003/sig00000827 ), + .Q(\blk00000003/blk00000483/sig0000119f ), + .Q15(\NLW_blk00000003/blk00000483/blk000004b0_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000483/blk000004af ( + .A0(\blk00000003/sig0000075f ), + .A1(\blk00000003/blk00000483/sig0000118c ), + .A2(\blk00000003/blk00000483/sig0000118c ), + .A3(\blk00000003/blk00000483/sig0000118c ), + .CE(\blk00000003/blk00000483/sig000011a5 ), + .CLK(clk), + .D(\blk00000003/sig00000825 ), + .Q(\blk00000003/blk00000483/sig000011a1 ), + .Q15(\NLW_blk00000003/blk00000483/blk000004af_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000483/blk000004ae ( + .A0(\blk00000003/sig0000075f ), + .A1(\blk00000003/blk00000483/sig0000118c ), + .A2(\blk00000003/blk00000483/sig0000118c ), + .A3(\blk00000003/blk00000483/sig0000118c ), + .CE(\blk00000003/blk00000483/sig000011a5 ), + .CLK(clk), + .D(\blk00000003/sig00000829 ), + .Q(\blk00000003/blk00000483/sig0000119d ), + .Q15(\NLW_blk00000003/blk00000483/blk000004ae_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000483/blk000004ad ( + .A0(\blk00000003/sig0000075f ), + .A1(\blk00000003/blk00000483/sig0000118c ), + .A2(\blk00000003/blk00000483/sig0000118c ), + .A3(\blk00000003/blk00000483/sig0000118c ), + .CE(\blk00000003/blk00000483/sig000011a5 ), + .CLK(clk), + .D(\blk00000003/sig0000082a ), + .Q(\blk00000003/blk00000483/sig0000119c ), + .Q15(\NLW_blk00000003/blk00000483/blk000004ad_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000483/blk000004ac ( + .A0(\blk00000003/sig0000075f ), + .A1(\blk00000003/blk00000483/sig0000118c ), + .A2(\blk00000003/blk00000483/sig0000118c ), + .A3(\blk00000003/blk00000483/sig0000118c ), + .CE(\blk00000003/blk00000483/sig000011a5 ), + .CLK(clk), + .D(\blk00000003/sig00000828 ), + .Q(\blk00000003/blk00000483/sig0000119e ), + .Q15(\NLW_blk00000003/blk00000483/blk000004ac_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000483/blk000004ab ( + .A0(\blk00000003/sig0000075f ), + .A1(\blk00000003/blk00000483/sig0000118c ), + .A2(\blk00000003/blk00000483/sig0000118c ), + .A3(\blk00000003/blk00000483/sig0000118c ), + .CE(\blk00000003/blk00000483/sig000011a5 ), + .CLK(clk), + .D(\blk00000003/sig0000082c ), + .Q(\blk00000003/blk00000483/sig0000119a ), + .Q15(\NLW_blk00000003/blk00000483/blk000004ab_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000483/blk000004aa ( + .A0(\blk00000003/sig0000075f ), + .A1(\blk00000003/blk00000483/sig0000118c ), + .A2(\blk00000003/blk00000483/sig0000118c ), + .A3(\blk00000003/blk00000483/sig0000118c ), + .CE(\blk00000003/blk00000483/sig000011a5 ), + .CLK(clk), + .D(\blk00000003/sig0000082d ), + .Q(\blk00000003/blk00000483/sig00001199 ), + .Q15(\NLW_blk00000003/blk00000483/blk000004aa_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000483/blk000004a9 ( + .A0(\blk00000003/sig0000075f ), + .A1(\blk00000003/blk00000483/sig0000118c ), + .A2(\blk00000003/blk00000483/sig0000118c ), + .A3(\blk00000003/blk00000483/sig0000118c ), + .CE(\blk00000003/blk00000483/sig000011a5 ), + .CLK(clk), + .D(\blk00000003/sig0000082b ), + .Q(\blk00000003/blk00000483/sig0000119b ), + .Q15(\NLW_blk00000003/blk00000483/blk000004a9_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000483/blk000004a8 ( + .A0(\blk00000003/sig0000075f ), + .A1(\blk00000003/blk00000483/sig0000118c ), + .A2(\blk00000003/blk00000483/sig0000118c ), + .A3(\blk00000003/blk00000483/sig0000118c ), + .CE(\blk00000003/blk00000483/sig000011a5 ), + .CLK(clk), + .D(\blk00000003/sig0000082f ), + .Q(\blk00000003/blk00000483/sig00001197 ), + .Q15(\NLW_blk00000003/blk00000483/blk000004a8_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000483/blk000004a7 ( + .A0(\blk00000003/sig0000075f ), + .A1(\blk00000003/blk00000483/sig0000118c ), + .A2(\blk00000003/blk00000483/sig0000118c ), + .A3(\blk00000003/blk00000483/sig0000118c ), + .CE(\blk00000003/blk00000483/sig000011a5 ), + .CLK(clk), + .D(\blk00000003/sig00000830 ), + .Q(\blk00000003/blk00000483/sig00001196 ), + .Q15(\NLW_blk00000003/blk00000483/blk000004a7_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000483/blk000004a6 ( + .A0(\blk00000003/sig0000075f ), + .A1(\blk00000003/blk00000483/sig0000118c ), + .A2(\blk00000003/blk00000483/sig0000118c ), + .A3(\blk00000003/blk00000483/sig0000118c ), + .CE(\blk00000003/blk00000483/sig000011a5 ), + .CLK(clk), + .D(\blk00000003/sig0000082e ), + .Q(\blk00000003/blk00000483/sig00001198 ), + .Q15(\NLW_blk00000003/blk00000483/blk000004a6_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000483/blk000004a5 ( + .A0(\blk00000003/sig0000075f ), + .A1(\blk00000003/blk00000483/sig0000118c ), + .A2(\blk00000003/blk00000483/sig0000118c ), + .A3(\blk00000003/blk00000483/sig0000118c ), + .CE(\blk00000003/blk00000483/sig000011a5 ), + .CLK(clk), + .D(\blk00000003/sig00000832 ), + .Q(\blk00000003/blk00000483/sig00001194 ), + .Q15(\NLW_blk00000003/blk00000483/blk000004a5_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000483/blk000004a4 ( + .A0(\blk00000003/sig0000075f ), + .A1(\blk00000003/blk00000483/sig0000118c ), + .A2(\blk00000003/blk00000483/sig0000118c ), + .A3(\blk00000003/blk00000483/sig0000118c ), + .CE(\blk00000003/blk00000483/sig000011a5 ), + .CLK(clk), + .D(\blk00000003/sig00000833 ), + .Q(\blk00000003/blk00000483/sig00001193 ), + .Q15(\NLW_blk00000003/blk00000483/blk000004a4_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000483/blk000004a3 ( + .A0(\blk00000003/sig0000075f ), + .A1(\blk00000003/blk00000483/sig0000118c ), + .A2(\blk00000003/blk00000483/sig0000118c ), + .A3(\blk00000003/blk00000483/sig0000118c ), + .CE(\blk00000003/blk00000483/sig000011a5 ), + .CLK(clk), + .D(\blk00000003/sig00000831 ), + .Q(\blk00000003/blk00000483/sig00001195 ), + .Q15(\NLW_blk00000003/blk00000483/blk000004a3_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000483/blk000004a2 ( + .A0(\blk00000003/sig0000075f ), + .A1(\blk00000003/blk00000483/sig0000118c ), + .A2(\blk00000003/blk00000483/sig0000118c ), + .A3(\blk00000003/blk00000483/sig0000118c ), + .CE(\blk00000003/blk00000483/sig000011a5 ), + .CLK(clk), + .D(\blk00000003/sig00000835 ), + .Q(\blk00000003/blk00000483/sig00001191 ), + .Q15(\NLW_blk00000003/blk00000483/blk000004a2_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000483/blk000004a1 ( + .A0(\blk00000003/sig0000075f ), + .A1(\blk00000003/blk00000483/sig0000118c ), + .A2(\blk00000003/blk00000483/sig0000118c ), + .A3(\blk00000003/blk00000483/sig0000118c ), + .CE(\blk00000003/blk00000483/sig000011a5 ), + .CLK(clk), + .D(\blk00000003/sig00000836 ), + .Q(\blk00000003/blk00000483/sig00001190 ), + .Q15(\NLW_blk00000003/blk00000483/blk000004a1_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000483/blk000004a0 ( + .A0(\blk00000003/sig0000075f ), + .A1(\blk00000003/blk00000483/sig0000118c ), + .A2(\blk00000003/blk00000483/sig0000118c ), + .A3(\blk00000003/blk00000483/sig0000118c ), + .CE(\blk00000003/blk00000483/sig000011a5 ), + .CLK(clk), + .D(\blk00000003/sig00000834 ), + .Q(\blk00000003/blk00000483/sig00001192 ), + .Q15(\NLW_blk00000003/blk00000483/blk000004a0_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000483/blk0000049f ( + .A0(\blk00000003/sig0000075f ), + .A1(\blk00000003/blk00000483/sig0000118c ), + .A2(\blk00000003/blk00000483/sig0000118c ), + .A3(\blk00000003/blk00000483/sig0000118c ), + .CE(\blk00000003/blk00000483/sig000011a5 ), + .CLK(clk), + .D(\blk00000003/sig00000838 ), + .Q(\blk00000003/blk00000483/sig0000118e ), + .Q15(\NLW_blk00000003/blk00000483/blk0000049f_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000483/blk0000049e ( + .A0(\blk00000003/sig0000075f ), + .A1(\blk00000003/blk00000483/sig0000118c ), + .A2(\blk00000003/blk00000483/sig0000118c ), + .A3(\blk00000003/blk00000483/sig0000118c ), + .CE(\blk00000003/blk00000483/sig000011a5 ), + .CLK(clk), + .D(\blk00000003/sig00000839 ), + .Q(\blk00000003/blk00000483/sig0000118d ), + .Q15(\NLW_blk00000003/blk00000483/blk0000049e_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000483/blk0000049d ( + .A0(\blk00000003/sig0000075f ), + .A1(\blk00000003/blk00000483/sig0000118c ), + .A2(\blk00000003/blk00000483/sig0000118c ), + .A3(\blk00000003/blk00000483/sig0000118c ), + .CE(\blk00000003/blk00000483/sig000011a5 ), + .CLK(clk), + .D(\blk00000003/sig00000837 ), + .Q(\blk00000003/blk00000483/sig0000118f ), + .Q15(\NLW_blk00000003/blk00000483/blk0000049d_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000483/blk0000049c ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk00000483/sig000011a4 ), + .Q(\blk00000003/sig00000475 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000483/blk0000049b ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk00000483/sig000011a3 ), + .Q(\blk00000003/sig00000476 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000483/blk0000049a ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk00000483/sig000011a2 ), + .Q(\blk00000003/sig00000477 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000483/blk00000499 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk00000483/sig000011a1 ), + .Q(\blk00000003/sig00000478 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000483/blk00000498 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk00000483/sig000011a0 ), + .Q(\blk00000003/sig00000479 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000483/blk00000497 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk00000483/sig0000119f ), + .Q(\blk00000003/sig0000047a ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000483/blk00000496 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk00000483/sig0000119e ), + .Q(\blk00000003/sig0000047b ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000483/blk00000495 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk00000483/sig0000119d ), + .Q(\blk00000003/sig0000047c ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000483/blk00000494 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk00000483/sig0000119c ), + .Q(\blk00000003/sig0000047d ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000483/blk00000493 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk00000483/sig0000119b ), + .Q(\blk00000003/sig0000047e ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000483/blk00000492 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk00000483/sig0000119a ), + .Q(\blk00000003/sig0000047f ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000483/blk00000491 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk00000483/sig00001199 ), + .Q(\blk00000003/sig00000480 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000483/blk00000490 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk00000483/sig00001198 ), + .Q(\blk00000003/sig00000481 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000483/blk0000048f ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk00000483/sig00001197 ), + .Q(\blk00000003/sig00000482 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000483/blk0000048e ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk00000483/sig00001196 ), + .Q(\blk00000003/sig00000483 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000483/blk0000048d ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk00000483/sig00001195 ), + .Q(\blk00000003/sig00000484 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000483/blk0000048c ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk00000483/sig00001194 ), + .Q(\blk00000003/sig00000485 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000483/blk0000048b ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk00000483/sig00001193 ), + .Q(\blk00000003/sig00000486 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000483/blk0000048a ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk00000483/sig00001192 ), + .Q(\blk00000003/sig00000487 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000483/blk00000489 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk00000483/sig00001191 ), + .Q(\blk00000003/sig00000488 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000483/blk00000488 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk00000483/sig00001190 ), + .Q(\blk00000003/sig00000489 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000483/blk00000487 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk00000483/sig0000118f ), + .Q(\blk00000003/sig0000048a ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000483/blk00000486 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk00000483/sig0000118e ), + .Q(\blk00000003/sig0000048b ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000483/blk00000485 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk00000483/sig0000118d ), + .Q(\blk00000003/sig0000048c ) + ); + GND \blk00000003/blk00000483/blk00000484 ( + .G(\blk00000003/blk00000483/sig0000118c ) + ); + LUT2 #( + .INIT ( 4'h8 )) + \blk00000003/blk000004b6/blk000004e8 ( + .I0(ce), + .I1(\blk00000003/sig0000075d ), + .O(\blk00000003/blk000004b6/sig000011f3 ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk000004b6/blk000004e7 ( + .A0(\blk00000003/sig0000075e ), + .A1(\blk00000003/blk000004b6/sig000011da ), + .A2(\blk00000003/blk000004b6/sig000011da ), + .A3(\blk00000003/blk000004b6/sig000011da ), + .CE(\blk00000003/blk000004b6/sig000011f3 ), + .CLK(clk), + .D(\blk00000003/sig0000031a ), + .Q(\blk00000003/blk000004b6/sig000011f1 ), + .Q15(\NLW_blk00000003/blk000004b6/blk000004e7_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk000004b6/blk000004e6 ( + .A0(\blk00000003/sig0000075e ), + .A1(\blk00000003/blk000004b6/sig000011da ), + .A2(\blk00000003/blk000004b6/sig000011da ), + .A3(\blk00000003/blk000004b6/sig000011da ), + .CE(\blk00000003/blk000004b6/sig000011f3 ), + .CLK(clk), + .D(\blk00000003/sig0000031b ), + .Q(\blk00000003/blk000004b6/sig000011f0 ), + .Q15(\NLW_blk00000003/blk000004b6/blk000004e6_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk000004b6/blk000004e5 ( + .A0(\blk00000003/sig0000075e ), + .A1(\blk00000003/blk000004b6/sig000011da ), + .A2(\blk00000003/blk000004b6/sig000011da ), + .A3(\blk00000003/blk000004b6/sig000011da ), + .CE(\blk00000003/blk000004b6/sig000011f3 ), + .CLK(clk), + .D(\blk00000003/sig00000319 ), + .Q(\blk00000003/blk000004b6/sig000011f2 ), + .Q15(\NLW_blk00000003/blk000004b6/blk000004e5_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk000004b6/blk000004e4 ( + .A0(\blk00000003/sig0000075e ), + .A1(\blk00000003/blk000004b6/sig000011da ), + .A2(\blk00000003/blk000004b6/sig000011da ), + .A3(\blk00000003/blk000004b6/sig000011da ), + .CE(\blk00000003/blk000004b6/sig000011f3 ), + .CLK(clk), + .D(\blk00000003/sig0000031d ), + .Q(\blk00000003/blk000004b6/sig000011ee ), + .Q15(\NLW_blk00000003/blk000004b6/blk000004e4_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk000004b6/blk000004e3 ( + .A0(\blk00000003/sig0000075e ), + .A1(\blk00000003/blk000004b6/sig000011da ), + .A2(\blk00000003/blk000004b6/sig000011da ), + .A3(\blk00000003/blk000004b6/sig000011da ), + .CE(\blk00000003/blk000004b6/sig000011f3 ), + .CLK(clk), + .D(\blk00000003/sig0000031e ), + .Q(\blk00000003/blk000004b6/sig000011ed ), + .Q15(\NLW_blk00000003/blk000004b6/blk000004e3_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk000004b6/blk000004e2 ( + .A0(\blk00000003/sig0000075e ), + .A1(\blk00000003/blk000004b6/sig000011da ), + .A2(\blk00000003/blk000004b6/sig000011da ), + .A3(\blk00000003/blk000004b6/sig000011da ), + .CE(\blk00000003/blk000004b6/sig000011f3 ), + .CLK(clk), + .D(\blk00000003/sig0000031c ), + .Q(\blk00000003/blk000004b6/sig000011ef ), + .Q15(\NLW_blk00000003/blk000004b6/blk000004e2_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk000004b6/blk000004e1 ( + .A0(\blk00000003/sig0000075e ), + .A1(\blk00000003/blk000004b6/sig000011da ), + .A2(\blk00000003/blk000004b6/sig000011da ), + .A3(\blk00000003/blk000004b6/sig000011da ), + .CE(\blk00000003/blk000004b6/sig000011f3 ), + .CLK(clk), + .D(\blk00000003/sig00000320 ), + .Q(\blk00000003/blk000004b6/sig000011eb ), + .Q15(\NLW_blk00000003/blk000004b6/blk000004e1_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk000004b6/blk000004e0 ( + .A0(\blk00000003/sig0000075e ), + .A1(\blk00000003/blk000004b6/sig000011da ), + .A2(\blk00000003/blk000004b6/sig000011da ), + .A3(\blk00000003/blk000004b6/sig000011da ), + .CE(\blk00000003/blk000004b6/sig000011f3 ), + .CLK(clk), + .D(\blk00000003/sig00000321 ), + .Q(\blk00000003/blk000004b6/sig000011ea ), + .Q15(\NLW_blk00000003/blk000004b6/blk000004e0_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk000004b6/blk000004df ( + .A0(\blk00000003/sig0000075e ), + .A1(\blk00000003/blk000004b6/sig000011da ), + .A2(\blk00000003/blk000004b6/sig000011da ), + .A3(\blk00000003/blk000004b6/sig000011da ), + .CE(\blk00000003/blk000004b6/sig000011f3 ), + .CLK(clk), + .D(\blk00000003/sig0000031f ), + .Q(\blk00000003/blk000004b6/sig000011ec ), + .Q15(\NLW_blk00000003/blk000004b6/blk000004df_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk000004b6/blk000004de ( + .A0(\blk00000003/sig0000075e ), + .A1(\blk00000003/blk000004b6/sig000011da ), + .A2(\blk00000003/blk000004b6/sig000011da ), + .A3(\blk00000003/blk000004b6/sig000011da ), + .CE(\blk00000003/blk000004b6/sig000011f3 ), + .CLK(clk), + .D(\blk00000003/sig00000323 ), + .Q(\blk00000003/blk000004b6/sig000011e8 ), + .Q15(\NLW_blk00000003/blk000004b6/blk000004de_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk000004b6/blk000004dd ( + .A0(\blk00000003/sig0000075e ), + .A1(\blk00000003/blk000004b6/sig000011da ), + .A2(\blk00000003/blk000004b6/sig000011da ), + .A3(\blk00000003/blk000004b6/sig000011da ), + .CE(\blk00000003/blk000004b6/sig000011f3 ), + .CLK(clk), + .D(\blk00000003/sig00000324 ), + .Q(\blk00000003/blk000004b6/sig000011e7 ), + .Q15(\NLW_blk00000003/blk000004b6/blk000004dd_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk000004b6/blk000004dc ( + .A0(\blk00000003/sig0000075e ), + .A1(\blk00000003/blk000004b6/sig000011da ), + .A2(\blk00000003/blk000004b6/sig000011da ), + .A3(\blk00000003/blk000004b6/sig000011da ), + .CE(\blk00000003/blk000004b6/sig000011f3 ), + .CLK(clk), + .D(\blk00000003/sig00000322 ), + .Q(\blk00000003/blk000004b6/sig000011e9 ), + .Q15(\NLW_blk00000003/blk000004b6/blk000004dc_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk000004b6/blk000004db ( + .A0(\blk00000003/sig0000075e ), + .A1(\blk00000003/blk000004b6/sig000011da ), + .A2(\blk00000003/blk000004b6/sig000011da ), + .A3(\blk00000003/blk000004b6/sig000011da ), + .CE(\blk00000003/blk000004b6/sig000011f3 ), + .CLK(clk), + .D(\blk00000003/sig00000326 ), + .Q(\blk00000003/blk000004b6/sig000011e5 ), + .Q15(\NLW_blk00000003/blk000004b6/blk000004db_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk000004b6/blk000004da ( + .A0(\blk00000003/sig0000075e ), + .A1(\blk00000003/blk000004b6/sig000011da ), + .A2(\blk00000003/blk000004b6/sig000011da ), + .A3(\blk00000003/blk000004b6/sig000011da ), + .CE(\blk00000003/blk000004b6/sig000011f3 ), + .CLK(clk), + .D(\blk00000003/sig00000327 ), + .Q(\blk00000003/blk000004b6/sig000011e4 ), + .Q15(\NLW_blk00000003/blk000004b6/blk000004da_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk000004b6/blk000004d9 ( + .A0(\blk00000003/sig0000075e ), + .A1(\blk00000003/blk000004b6/sig000011da ), + .A2(\blk00000003/blk000004b6/sig000011da ), + .A3(\blk00000003/blk000004b6/sig000011da ), + .CE(\blk00000003/blk000004b6/sig000011f3 ), + .CLK(clk), + .D(\blk00000003/sig00000325 ), + .Q(\blk00000003/blk000004b6/sig000011e6 ), + .Q15(\NLW_blk00000003/blk000004b6/blk000004d9_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk000004b6/blk000004d8 ( + .A0(\blk00000003/sig0000075e ), + .A1(\blk00000003/blk000004b6/sig000011da ), + .A2(\blk00000003/blk000004b6/sig000011da ), + .A3(\blk00000003/blk000004b6/sig000011da ), + .CE(\blk00000003/blk000004b6/sig000011f3 ), + .CLK(clk), + .D(\blk00000003/sig00000329 ), + .Q(\blk00000003/blk000004b6/sig000011e2 ), + .Q15(\NLW_blk00000003/blk000004b6/blk000004d8_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk000004b6/blk000004d7 ( + .A0(\blk00000003/sig0000075e ), + .A1(\blk00000003/blk000004b6/sig000011da ), + .A2(\blk00000003/blk000004b6/sig000011da ), + .A3(\blk00000003/blk000004b6/sig000011da ), + .CE(\blk00000003/blk000004b6/sig000011f3 ), + .CLK(clk), + .D(\blk00000003/sig0000032a ), + .Q(\blk00000003/blk000004b6/sig000011e1 ), + .Q15(\NLW_blk00000003/blk000004b6/blk000004d7_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk000004b6/blk000004d6 ( + .A0(\blk00000003/sig0000075e ), + .A1(\blk00000003/blk000004b6/sig000011da ), + .A2(\blk00000003/blk000004b6/sig000011da ), + .A3(\blk00000003/blk000004b6/sig000011da ), + .CE(\blk00000003/blk000004b6/sig000011f3 ), + .CLK(clk), + .D(\blk00000003/sig00000328 ), + .Q(\blk00000003/blk000004b6/sig000011e3 ), + .Q15(\NLW_blk00000003/blk000004b6/blk000004d6_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk000004b6/blk000004d5 ( + .A0(\blk00000003/sig0000075e ), + .A1(\blk00000003/blk000004b6/sig000011da ), + .A2(\blk00000003/blk000004b6/sig000011da ), + .A3(\blk00000003/blk000004b6/sig000011da ), + .CE(\blk00000003/blk000004b6/sig000011f3 ), + .CLK(clk), + .D(\blk00000003/sig0000032c ), + .Q(\blk00000003/blk000004b6/sig000011df ), + .Q15(\NLW_blk00000003/blk000004b6/blk000004d5_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk000004b6/blk000004d4 ( + .A0(\blk00000003/sig0000075e ), + .A1(\blk00000003/blk000004b6/sig000011da ), + .A2(\blk00000003/blk000004b6/sig000011da ), + .A3(\blk00000003/blk000004b6/sig000011da ), + .CE(\blk00000003/blk000004b6/sig000011f3 ), + .CLK(clk), + .D(\blk00000003/sig0000032d ), + .Q(\blk00000003/blk000004b6/sig000011de ), + .Q15(\NLW_blk00000003/blk000004b6/blk000004d4_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk000004b6/blk000004d3 ( + .A0(\blk00000003/sig0000075e ), + .A1(\blk00000003/blk000004b6/sig000011da ), + .A2(\blk00000003/blk000004b6/sig000011da ), + .A3(\blk00000003/blk000004b6/sig000011da ), + .CE(\blk00000003/blk000004b6/sig000011f3 ), + .CLK(clk), + .D(\blk00000003/sig0000032b ), + .Q(\blk00000003/blk000004b6/sig000011e0 ), + .Q15(\NLW_blk00000003/blk000004b6/blk000004d3_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk000004b6/blk000004d2 ( + .A0(\blk00000003/sig0000075e ), + .A1(\blk00000003/blk000004b6/sig000011da ), + .A2(\blk00000003/blk000004b6/sig000011da ), + .A3(\blk00000003/blk000004b6/sig000011da ), + .CE(\blk00000003/blk000004b6/sig000011f3 ), + .CLK(clk), + .D(\blk00000003/sig0000032f ), + .Q(\blk00000003/blk000004b6/sig000011dc ), + .Q15(\NLW_blk00000003/blk000004b6/blk000004d2_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk000004b6/blk000004d1 ( + .A0(\blk00000003/sig0000075e ), + .A1(\blk00000003/blk000004b6/sig000011da ), + .A2(\blk00000003/blk000004b6/sig000011da ), + .A3(\blk00000003/blk000004b6/sig000011da ), + .CE(\blk00000003/blk000004b6/sig000011f3 ), + .CLK(clk), + .D(\blk00000003/sig00000330 ), + .Q(\blk00000003/blk000004b6/sig000011db ), + .Q15(\NLW_blk00000003/blk000004b6/blk000004d1_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk000004b6/blk000004d0 ( + .A0(\blk00000003/sig0000075e ), + .A1(\blk00000003/blk000004b6/sig000011da ), + .A2(\blk00000003/blk000004b6/sig000011da ), + .A3(\blk00000003/blk000004b6/sig000011da ), + .CE(\blk00000003/blk000004b6/sig000011f3 ), + .CLK(clk), + .D(\blk00000003/sig0000032e ), + .Q(\blk00000003/blk000004b6/sig000011dd ), + .Q15(\NLW_blk00000003/blk000004b6/blk000004d0_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000004b6/blk000004cf ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk000004b6/sig000011f2 ), + .Q(\blk00000003/sig000005e3 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000004b6/blk000004ce ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk000004b6/sig000011f1 ), + .Q(\blk00000003/sig000005e4 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000004b6/blk000004cd ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk000004b6/sig000011f0 ), + .Q(\blk00000003/sig000005e5 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000004b6/blk000004cc ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk000004b6/sig000011ef ), + .Q(\blk00000003/sig000005e6 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000004b6/blk000004cb ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk000004b6/sig000011ee ), + .Q(\blk00000003/sig000005e7 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000004b6/blk000004ca ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk000004b6/sig000011ed ), + .Q(\blk00000003/sig000005e8 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000004b6/blk000004c9 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk000004b6/sig000011ec ), + .Q(\blk00000003/sig000005e9 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000004b6/blk000004c8 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk000004b6/sig000011eb ), + .Q(\blk00000003/sig000005ea ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000004b6/blk000004c7 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk000004b6/sig000011ea ), + .Q(\blk00000003/sig000005eb ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000004b6/blk000004c6 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk000004b6/sig000011e9 ), + .Q(\blk00000003/sig000005ec ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000004b6/blk000004c5 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk000004b6/sig000011e8 ), + .Q(\blk00000003/sig000005ed ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000004b6/blk000004c4 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk000004b6/sig000011e7 ), + .Q(\blk00000003/sig000005ee ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000004b6/blk000004c3 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk000004b6/sig000011e6 ), + .Q(\blk00000003/sig000005ef ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000004b6/blk000004c2 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk000004b6/sig000011e5 ), + .Q(\blk00000003/sig000005f0 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000004b6/blk000004c1 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk000004b6/sig000011e4 ), + .Q(\blk00000003/sig000005f1 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000004b6/blk000004c0 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk000004b6/sig000011e3 ), + .Q(\blk00000003/sig000005f2 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000004b6/blk000004bf ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk000004b6/sig000011e2 ), + .Q(\blk00000003/sig000005f3 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000004b6/blk000004be ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk000004b6/sig000011e1 ), + .Q(\blk00000003/sig000005f4 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000004b6/blk000004bd ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk000004b6/sig000011e0 ), + .Q(\blk00000003/sig000005f5 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000004b6/blk000004bc ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk000004b6/sig000011df ), + .Q(\blk00000003/sig000005f6 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000004b6/blk000004bb ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk000004b6/sig000011de ), + .Q(\blk00000003/sig000005f7 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000004b6/blk000004ba ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk000004b6/sig000011dd ), + .Q(\blk00000003/sig000005f8 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000004b6/blk000004b9 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk000004b6/sig000011dc ), + .Q(\blk00000003/sig000005f9 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000004b6/blk000004b8 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk000004b6/sig000011db ), + .Q(\blk00000003/sig000005fa ) + ); + GND \blk00000003/blk000004b6/blk000004b7 ( + .G(\blk00000003/blk000004b6/sig000011da ) + ); + LUT2 #( + .INIT ( 4'h8 )) + \blk00000003/blk000004e9/blk0000051b ( + .I0(ce), + .I1(\blk00000003/sig0000075a ), + .O(\blk00000003/blk000004e9/sig00001241 ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk000004e9/blk0000051a ( + .A0(\blk00000003/sig0000075f ), + .A1(\blk00000003/blk000004e9/sig00001228 ), + .A2(\blk00000003/blk000004e9/sig00001228 ), + .A3(\blk00000003/blk000004e9/sig00001228 ), + .CE(\blk00000003/blk000004e9/sig00001241 ), + .CLK(clk), + .D(\blk00000003/sig0000083b ), + .Q(\blk00000003/blk000004e9/sig0000123f ), + .Q15(\NLW_blk00000003/blk000004e9/blk0000051a_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk000004e9/blk00000519 ( + .A0(\blk00000003/sig0000075f ), + .A1(\blk00000003/blk000004e9/sig00001228 ), + .A2(\blk00000003/blk000004e9/sig00001228 ), + .A3(\blk00000003/blk000004e9/sig00001228 ), + .CE(\blk00000003/blk000004e9/sig00001241 ), + .CLK(clk), + .D(\blk00000003/sig0000083c ), + .Q(\blk00000003/blk000004e9/sig0000123e ), + .Q15(\NLW_blk00000003/blk000004e9/blk00000519_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk000004e9/blk00000518 ( + .A0(\blk00000003/sig0000075f ), + .A1(\blk00000003/blk000004e9/sig00001228 ), + .A2(\blk00000003/blk000004e9/sig00001228 ), + .A3(\blk00000003/blk000004e9/sig00001228 ), + .CE(\blk00000003/blk000004e9/sig00001241 ), + .CLK(clk), + .D(\blk00000003/sig0000083a ), + .Q(\blk00000003/blk000004e9/sig00001240 ), + .Q15(\NLW_blk00000003/blk000004e9/blk00000518_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk000004e9/blk00000517 ( + .A0(\blk00000003/sig0000075f ), + .A1(\blk00000003/blk000004e9/sig00001228 ), + .A2(\blk00000003/blk000004e9/sig00001228 ), + .A3(\blk00000003/blk000004e9/sig00001228 ), + .CE(\blk00000003/blk000004e9/sig00001241 ), + .CLK(clk), + .D(\blk00000003/sig0000083e ), + .Q(\blk00000003/blk000004e9/sig0000123c ), + .Q15(\NLW_blk00000003/blk000004e9/blk00000517_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk000004e9/blk00000516 ( + .A0(\blk00000003/sig0000075f ), + .A1(\blk00000003/blk000004e9/sig00001228 ), + .A2(\blk00000003/blk000004e9/sig00001228 ), + .A3(\blk00000003/blk000004e9/sig00001228 ), + .CE(\blk00000003/blk000004e9/sig00001241 ), + .CLK(clk), + .D(\blk00000003/sig0000083f ), + .Q(\blk00000003/blk000004e9/sig0000123b ), + .Q15(\NLW_blk00000003/blk000004e9/blk00000516_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk000004e9/blk00000515 ( + .A0(\blk00000003/sig0000075f ), + .A1(\blk00000003/blk000004e9/sig00001228 ), + .A2(\blk00000003/blk000004e9/sig00001228 ), + .A3(\blk00000003/blk000004e9/sig00001228 ), + .CE(\blk00000003/blk000004e9/sig00001241 ), + .CLK(clk), + .D(\blk00000003/sig0000083d ), + .Q(\blk00000003/blk000004e9/sig0000123d ), + .Q15(\NLW_blk00000003/blk000004e9/blk00000515_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk000004e9/blk00000514 ( + .A0(\blk00000003/sig0000075f ), + .A1(\blk00000003/blk000004e9/sig00001228 ), + .A2(\blk00000003/blk000004e9/sig00001228 ), + .A3(\blk00000003/blk000004e9/sig00001228 ), + .CE(\blk00000003/blk000004e9/sig00001241 ), + .CLK(clk), + .D(\blk00000003/sig00000841 ), + .Q(\blk00000003/blk000004e9/sig00001239 ), + .Q15(\NLW_blk00000003/blk000004e9/blk00000514_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk000004e9/blk00000513 ( + .A0(\blk00000003/sig0000075f ), + .A1(\blk00000003/blk000004e9/sig00001228 ), + .A2(\blk00000003/blk000004e9/sig00001228 ), + .A3(\blk00000003/blk000004e9/sig00001228 ), + .CE(\blk00000003/blk000004e9/sig00001241 ), + .CLK(clk), + .D(\blk00000003/sig00000842 ), + .Q(\blk00000003/blk000004e9/sig00001238 ), + .Q15(\NLW_blk00000003/blk000004e9/blk00000513_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk000004e9/blk00000512 ( + .A0(\blk00000003/sig0000075f ), + .A1(\blk00000003/blk000004e9/sig00001228 ), + .A2(\blk00000003/blk000004e9/sig00001228 ), + .A3(\blk00000003/blk000004e9/sig00001228 ), + .CE(\blk00000003/blk000004e9/sig00001241 ), + .CLK(clk), + .D(\blk00000003/sig00000840 ), + .Q(\blk00000003/blk000004e9/sig0000123a ), + .Q15(\NLW_blk00000003/blk000004e9/blk00000512_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk000004e9/blk00000511 ( + .A0(\blk00000003/sig0000075f ), + .A1(\blk00000003/blk000004e9/sig00001228 ), + .A2(\blk00000003/blk000004e9/sig00001228 ), + .A3(\blk00000003/blk000004e9/sig00001228 ), + .CE(\blk00000003/blk000004e9/sig00001241 ), + .CLK(clk), + .D(\blk00000003/sig00000844 ), + .Q(\blk00000003/blk000004e9/sig00001236 ), + .Q15(\NLW_blk00000003/blk000004e9/blk00000511_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk000004e9/blk00000510 ( + .A0(\blk00000003/sig0000075f ), + .A1(\blk00000003/blk000004e9/sig00001228 ), + .A2(\blk00000003/blk000004e9/sig00001228 ), + .A3(\blk00000003/blk000004e9/sig00001228 ), + .CE(\blk00000003/blk000004e9/sig00001241 ), + .CLK(clk), + .D(\blk00000003/sig00000845 ), + .Q(\blk00000003/blk000004e9/sig00001235 ), + .Q15(\NLW_blk00000003/blk000004e9/blk00000510_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk000004e9/blk0000050f ( + .A0(\blk00000003/sig0000075f ), + .A1(\blk00000003/blk000004e9/sig00001228 ), + .A2(\blk00000003/blk000004e9/sig00001228 ), + .A3(\blk00000003/blk000004e9/sig00001228 ), + .CE(\blk00000003/blk000004e9/sig00001241 ), + .CLK(clk), + .D(\blk00000003/sig00000843 ), + .Q(\blk00000003/blk000004e9/sig00001237 ), + .Q15(\NLW_blk00000003/blk000004e9/blk0000050f_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk000004e9/blk0000050e ( + .A0(\blk00000003/sig0000075f ), + .A1(\blk00000003/blk000004e9/sig00001228 ), + .A2(\blk00000003/blk000004e9/sig00001228 ), + .A3(\blk00000003/blk000004e9/sig00001228 ), + .CE(\blk00000003/blk000004e9/sig00001241 ), + .CLK(clk), + .D(\blk00000003/sig00000847 ), + .Q(\blk00000003/blk000004e9/sig00001233 ), + .Q15(\NLW_blk00000003/blk000004e9/blk0000050e_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk000004e9/blk0000050d ( + .A0(\blk00000003/sig0000075f ), + .A1(\blk00000003/blk000004e9/sig00001228 ), + .A2(\blk00000003/blk000004e9/sig00001228 ), + .A3(\blk00000003/blk000004e9/sig00001228 ), + .CE(\blk00000003/blk000004e9/sig00001241 ), + .CLK(clk), + .D(\blk00000003/sig00000848 ), + .Q(\blk00000003/blk000004e9/sig00001232 ), + .Q15(\NLW_blk00000003/blk000004e9/blk0000050d_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk000004e9/blk0000050c ( + .A0(\blk00000003/sig0000075f ), + .A1(\blk00000003/blk000004e9/sig00001228 ), + .A2(\blk00000003/blk000004e9/sig00001228 ), + .A3(\blk00000003/blk000004e9/sig00001228 ), + .CE(\blk00000003/blk000004e9/sig00001241 ), + .CLK(clk), + .D(\blk00000003/sig00000846 ), + .Q(\blk00000003/blk000004e9/sig00001234 ), + .Q15(\NLW_blk00000003/blk000004e9/blk0000050c_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk000004e9/blk0000050b ( + .A0(\blk00000003/sig0000075f ), + .A1(\blk00000003/blk000004e9/sig00001228 ), + .A2(\blk00000003/blk000004e9/sig00001228 ), + .A3(\blk00000003/blk000004e9/sig00001228 ), + .CE(\blk00000003/blk000004e9/sig00001241 ), + .CLK(clk), + .D(\blk00000003/sig0000084a ), + .Q(\blk00000003/blk000004e9/sig00001230 ), + .Q15(\NLW_blk00000003/blk000004e9/blk0000050b_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk000004e9/blk0000050a ( + .A0(\blk00000003/sig0000075f ), + .A1(\blk00000003/blk000004e9/sig00001228 ), + .A2(\blk00000003/blk000004e9/sig00001228 ), + .A3(\blk00000003/blk000004e9/sig00001228 ), + .CE(\blk00000003/blk000004e9/sig00001241 ), + .CLK(clk), + .D(\blk00000003/sig0000084b ), + .Q(\blk00000003/blk000004e9/sig0000122f ), + .Q15(\NLW_blk00000003/blk000004e9/blk0000050a_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk000004e9/blk00000509 ( + .A0(\blk00000003/sig0000075f ), + .A1(\blk00000003/blk000004e9/sig00001228 ), + .A2(\blk00000003/blk000004e9/sig00001228 ), + .A3(\blk00000003/blk000004e9/sig00001228 ), + .CE(\blk00000003/blk000004e9/sig00001241 ), + .CLK(clk), + .D(\blk00000003/sig00000849 ), + .Q(\blk00000003/blk000004e9/sig00001231 ), + .Q15(\NLW_blk00000003/blk000004e9/blk00000509_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk000004e9/blk00000508 ( + .A0(\blk00000003/sig0000075f ), + .A1(\blk00000003/blk000004e9/sig00001228 ), + .A2(\blk00000003/blk000004e9/sig00001228 ), + .A3(\blk00000003/blk000004e9/sig00001228 ), + .CE(\blk00000003/blk000004e9/sig00001241 ), + .CLK(clk), + .D(\blk00000003/sig0000084d ), + .Q(\blk00000003/blk000004e9/sig0000122d ), + .Q15(\NLW_blk00000003/blk000004e9/blk00000508_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk000004e9/blk00000507 ( + .A0(\blk00000003/sig0000075f ), + .A1(\blk00000003/blk000004e9/sig00001228 ), + .A2(\blk00000003/blk000004e9/sig00001228 ), + .A3(\blk00000003/blk000004e9/sig00001228 ), + .CE(\blk00000003/blk000004e9/sig00001241 ), + .CLK(clk), + .D(\blk00000003/sig0000084e ), + .Q(\blk00000003/blk000004e9/sig0000122c ), + .Q15(\NLW_blk00000003/blk000004e9/blk00000507_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk000004e9/blk00000506 ( + .A0(\blk00000003/sig0000075f ), + .A1(\blk00000003/blk000004e9/sig00001228 ), + .A2(\blk00000003/blk000004e9/sig00001228 ), + .A3(\blk00000003/blk000004e9/sig00001228 ), + .CE(\blk00000003/blk000004e9/sig00001241 ), + .CLK(clk), + .D(\blk00000003/sig0000084c ), + .Q(\blk00000003/blk000004e9/sig0000122e ), + .Q15(\NLW_blk00000003/blk000004e9/blk00000506_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk000004e9/blk00000505 ( + .A0(\blk00000003/sig0000075f ), + .A1(\blk00000003/blk000004e9/sig00001228 ), + .A2(\blk00000003/blk000004e9/sig00001228 ), + .A3(\blk00000003/blk000004e9/sig00001228 ), + .CE(\blk00000003/blk000004e9/sig00001241 ), + .CLK(clk), + .D(\blk00000003/sig00000850 ), + .Q(\blk00000003/blk000004e9/sig0000122a ), + .Q15(\NLW_blk00000003/blk000004e9/blk00000505_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk000004e9/blk00000504 ( + .A0(\blk00000003/sig0000075f ), + .A1(\blk00000003/blk000004e9/sig00001228 ), + .A2(\blk00000003/blk000004e9/sig00001228 ), + .A3(\blk00000003/blk000004e9/sig00001228 ), + .CE(\blk00000003/blk000004e9/sig00001241 ), + .CLK(clk), + .D(\blk00000003/sig00000851 ), + .Q(\blk00000003/blk000004e9/sig00001229 ), + .Q15(\NLW_blk00000003/blk000004e9/blk00000504_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk000004e9/blk00000503 ( + .A0(\blk00000003/sig0000075f ), + .A1(\blk00000003/blk000004e9/sig00001228 ), + .A2(\blk00000003/blk000004e9/sig00001228 ), + .A3(\blk00000003/blk000004e9/sig00001228 ), + .CE(\blk00000003/blk000004e9/sig00001241 ), + .CLK(clk), + .D(\blk00000003/sig0000084f ), + .Q(\blk00000003/blk000004e9/sig0000122b ), + .Q15(\NLW_blk00000003/blk000004e9/blk00000503_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000004e9/blk00000502 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk000004e9/sig00001240 ), + .Q(\blk00000003/sig000005fb ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000004e9/blk00000501 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk000004e9/sig0000123f ), + .Q(\blk00000003/sig000005fc ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000004e9/blk00000500 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk000004e9/sig0000123e ), + .Q(\blk00000003/sig000005fd ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000004e9/blk000004ff ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk000004e9/sig0000123d ), + .Q(\blk00000003/sig000005fe ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000004e9/blk000004fe ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk000004e9/sig0000123c ), + .Q(\blk00000003/sig000005ff ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000004e9/blk000004fd ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk000004e9/sig0000123b ), + .Q(\blk00000003/sig00000600 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000004e9/blk000004fc ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk000004e9/sig0000123a ), + .Q(\blk00000003/sig00000601 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000004e9/blk000004fb ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk000004e9/sig00001239 ), + .Q(\blk00000003/sig00000602 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000004e9/blk000004fa ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk000004e9/sig00001238 ), + .Q(\blk00000003/sig00000603 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000004e9/blk000004f9 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk000004e9/sig00001237 ), + .Q(\blk00000003/sig00000604 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000004e9/blk000004f8 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk000004e9/sig00001236 ), + .Q(\blk00000003/sig00000605 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000004e9/blk000004f7 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk000004e9/sig00001235 ), + .Q(\blk00000003/sig00000606 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000004e9/blk000004f6 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk000004e9/sig00001234 ), + .Q(\blk00000003/sig00000607 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000004e9/blk000004f5 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk000004e9/sig00001233 ), + .Q(\blk00000003/sig00000608 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000004e9/blk000004f4 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk000004e9/sig00001232 ), + .Q(\blk00000003/sig00000609 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000004e9/blk000004f3 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk000004e9/sig00001231 ), + .Q(\blk00000003/sig0000060a ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000004e9/blk000004f2 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk000004e9/sig00001230 ), + .Q(\blk00000003/sig0000060b ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000004e9/blk000004f1 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk000004e9/sig0000122f ), + .Q(\blk00000003/sig0000060c ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000004e9/blk000004f0 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk000004e9/sig0000122e ), + .Q(\blk00000003/sig0000060d ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000004e9/blk000004ef ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk000004e9/sig0000122d ), + .Q(\blk00000003/sig0000060e ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000004e9/blk000004ee ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk000004e9/sig0000122c ), + .Q(\blk00000003/sig0000060f ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000004e9/blk000004ed ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk000004e9/sig0000122b ), + .Q(\blk00000003/sig00000610 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000004e9/blk000004ec ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk000004e9/sig0000122a ), + .Q(\blk00000003/sig00000611 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000004e9/blk000004eb ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk000004e9/sig00001229 ), + .Q(\blk00000003/sig00000612 ) + ); + GND \blk00000003/blk000004e9/blk000004ea ( + .G(\blk00000003/blk000004e9/sig00001228 ) + ); + LUT2 #( + .INIT ( 4'h8 )) + \blk00000003/blk0000051c/blk0000054e ( + .I0(ce), + .I1(\blk00000003/sig00000761 ), + .O(\blk00000003/blk0000051c/sig0000128f ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk0000051c/blk0000054d ( + .A0(\blk00000003/sig0000029a ), + .A1(\blk00000003/blk0000051c/sig00001276 ), + .A2(\blk00000003/blk0000051c/sig00001276 ), + .A3(\blk00000003/blk0000051c/sig00001276 ), + .CE(\blk00000003/blk0000051c/sig0000128f ), + .CLK(clk), + .D(\blk00000003/sig00000853 ), + .Q(\blk00000003/blk0000051c/sig0000128d ), + .Q15(\NLW_blk00000003/blk0000051c/blk0000054d_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk0000051c/blk0000054c ( + .A0(\blk00000003/sig0000029a ), + .A1(\blk00000003/blk0000051c/sig00001276 ), + .A2(\blk00000003/blk0000051c/sig00001276 ), + .A3(\blk00000003/blk0000051c/sig00001276 ), + .CE(\blk00000003/blk0000051c/sig0000128f ), + .CLK(clk), + .D(\blk00000003/sig00000854 ), + .Q(\blk00000003/blk0000051c/sig0000128c ), + .Q15(\NLW_blk00000003/blk0000051c/blk0000054c_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk0000051c/blk0000054b ( + .A0(\blk00000003/sig0000029a ), + .A1(\blk00000003/blk0000051c/sig00001276 ), + .A2(\blk00000003/blk0000051c/sig00001276 ), + .A3(\blk00000003/blk0000051c/sig00001276 ), + .CE(\blk00000003/blk0000051c/sig0000128f ), + .CLK(clk), + .D(\blk00000003/sig00000852 ), + .Q(\blk00000003/blk0000051c/sig0000128e ), + .Q15(\NLW_blk00000003/blk0000051c/blk0000054b_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk0000051c/blk0000054a ( + .A0(\blk00000003/sig0000029a ), + .A1(\blk00000003/blk0000051c/sig00001276 ), + .A2(\blk00000003/blk0000051c/sig00001276 ), + .A3(\blk00000003/blk0000051c/sig00001276 ), + .CE(\blk00000003/blk0000051c/sig0000128f ), + .CLK(clk), + .D(\blk00000003/sig00000856 ), + .Q(\blk00000003/blk0000051c/sig0000128a ), + .Q15(\NLW_blk00000003/blk0000051c/blk0000054a_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk0000051c/blk00000549 ( + .A0(\blk00000003/sig0000029a ), + .A1(\blk00000003/blk0000051c/sig00001276 ), + .A2(\blk00000003/blk0000051c/sig00001276 ), + .A3(\blk00000003/blk0000051c/sig00001276 ), + .CE(\blk00000003/blk0000051c/sig0000128f ), + .CLK(clk), + .D(\blk00000003/sig00000857 ), + .Q(\blk00000003/blk0000051c/sig00001289 ), + .Q15(\NLW_blk00000003/blk0000051c/blk00000549_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk0000051c/blk00000548 ( + .A0(\blk00000003/sig0000029a ), + .A1(\blk00000003/blk0000051c/sig00001276 ), + .A2(\blk00000003/blk0000051c/sig00001276 ), + .A3(\blk00000003/blk0000051c/sig00001276 ), + .CE(\blk00000003/blk0000051c/sig0000128f ), + .CLK(clk), + .D(\blk00000003/sig00000855 ), + .Q(\blk00000003/blk0000051c/sig0000128b ), + .Q15(\NLW_blk00000003/blk0000051c/blk00000548_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk0000051c/blk00000547 ( + .A0(\blk00000003/sig0000029a ), + .A1(\blk00000003/blk0000051c/sig00001276 ), + .A2(\blk00000003/blk0000051c/sig00001276 ), + .A3(\blk00000003/blk0000051c/sig00001276 ), + .CE(\blk00000003/blk0000051c/sig0000128f ), + .CLK(clk), + .D(\blk00000003/sig00000859 ), + .Q(\blk00000003/blk0000051c/sig00001287 ), + .Q15(\NLW_blk00000003/blk0000051c/blk00000547_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk0000051c/blk00000546 ( + .A0(\blk00000003/sig0000029a ), + .A1(\blk00000003/blk0000051c/sig00001276 ), + .A2(\blk00000003/blk0000051c/sig00001276 ), + .A3(\blk00000003/blk0000051c/sig00001276 ), + .CE(\blk00000003/blk0000051c/sig0000128f ), + .CLK(clk), + .D(\blk00000003/sig0000085a ), + .Q(\blk00000003/blk0000051c/sig00001286 ), + .Q15(\NLW_blk00000003/blk0000051c/blk00000546_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk0000051c/blk00000545 ( + .A0(\blk00000003/sig0000029a ), + .A1(\blk00000003/blk0000051c/sig00001276 ), + .A2(\blk00000003/blk0000051c/sig00001276 ), + .A3(\blk00000003/blk0000051c/sig00001276 ), + .CE(\blk00000003/blk0000051c/sig0000128f ), + .CLK(clk), + .D(\blk00000003/sig00000858 ), + .Q(\blk00000003/blk0000051c/sig00001288 ), + .Q15(\NLW_blk00000003/blk0000051c/blk00000545_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk0000051c/blk00000544 ( + .A0(\blk00000003/sig0000029a ), + .A1(\blk00000003/blk0000051c/sig00001276 ), + .A2(\blk00000003/blk0000051c/sig00001276 ), + .A3(\blk00000003/blk0000051c/sig00001276 ), + .CE(\blk00000003/blk0000051c/sig0000128f ), + .CLK(clk), + .D(\blk00000003/sig0000085c ), + .Q(\blk00000003/blk0000051c/sig00001284 ), + .Q15(\NLW_blk00000003/blk0000051c/blk00000544_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk0000051c/blk00000543 ( + .A0(\blk00000003/sig0000029a ), + .A1(\blk00000003/blk0000051c/sig00001276 ), + .A2(\blk00000003/blk0000051c/sig00001276 ), + .A3(\blk00000003/blk0000051c/sig00001276 ), + .CE(\blk00000003/blk0000051c/sig0000128f ), + .CLK(clk), + .D(\blk00000003/sig0000085d ), + .Q(\blk00000003/blk0000051c/sig00001283 ), + .Q15(\NLW_blk00000003/blk0000051c/blk00000543_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk0000051c/blk00000542 ( + .A0(\blk00000003/sig0000029a ), + .A1(\blk00000003/blk0000051c/sig00001276 ), + .A2(\blk00000003/blk0000051c/sig00001276 ), + .A3(\blk00000003/blk0000051c/sig00001276 ), + .CE(\blk00000003/blk0000051c/sig0000128f ), + .CLK(clk), + .D(\blk00000003/sig0000085b ), + .Q(\blk00000003/blk0000051c/sig00001285 ), + .Q15(\NLW_blk00000003/blk0000051c/blk00000542_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk0000051c/blk00000541 ( + .A0(\blk00000003/sig0000029a ), + .A1(\blk00000003/blk0000051c/sig00001276 ), + .A2(\blk00000003/blk0000051c/sig00001276 ), + .A3(\blk00000003/blk0000051c/sig00001276 ), + .CE(\blk00000003/blk0000051c/sig0000128f ), + .CLK(clk), + .D(\blk00000003/sig0000085f ), + .Q(\blk00000003/blk0000051c/sig00001281 ), + .Q15(\NLW_blk00000003/blk0000051c/blk00000541_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk0000051c/blk00000540 ( + .A0(\blk00000003/sig0000029a ), + .A1(\blk00000003/blk0000051c/sig00001276 ), + .A2(\blk00000003/blk0000051c/sig00001276 ), + .A3(\blk00000003/blk0000051c/sig00001276 ), + .CE(\blk00000003/blk0000051c/sig0000128f ), + .CLK(clk), + .D(\blk00000003/sig00000860 ), + .Q(\blk00000003/blk0000051c/sig00001280 ), + .Q15(\NLW_blk00000003/blk0000051c/blk00000540_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk0000051c/blk0000053f ( + .A0(\blk00000003/sig0000029a ), + .A1(\blk00000003/blk0000051c/sig00001276 ), + .A2(\blk00000003/blk0000051c/sig00001276 ), + .A3(\blk00000003/blk0000051c/sig00001276 ), + .CE(\blk00000003/blk0000051c/sig0000128f ), + .CLK(clk), + .D(\blk00000003/sig0000085e ), + .Q(\blk00000003/blk0000051c/sig00001282 ), + .Q15(\NLW_blk00000003/blk0000051c/blk0000053f_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk0000051c/blk0000053e ( + .A0(\blk00000003/sig0000029a ), + .A1(\blk00000003/blk0000051c/sig00001276 ), + .A2(\blk00000003/blk0000051c/sig00001276 ), + .A3(\blk00000003/blk0000051c/sig00001276 ), + .CE(\blk00000003/blk0000051c/sig0000128f ), + .CLK(clk), + .D(\blk00000003/sig00000862 ), + .Q(\blk00000003/blk0000051c/sig0000127e ), + .Q15(\NLW_blk00000003/blk0000051c/blk0000053e_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk0000051c/blk0000053d ( + .A0(\blk00000003/sig0000029a ), + .A1(\blk00000003/blk0000051c/sig00001276 ), + .A2(\blk00000003/blk0000051c/sig00001276 ), + .A3(\blk00000003/blk0000051c/sig00001276 ), + .CE(\blk00000003/blk0000051c/sig0000128f ), + .CLK(clk), + .D(\blk00000003/sig00000863 ), + .Q(\blk00000003/blk0000051c/sig0000127d ), + .Q15(\NLW_blk00000003/blk0000051c/blk0000053d_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk0000051c/blk0000053c ( + .A0(\blk00000003/sig0000029a ), + .A1(\blk00000003/blk0000051c/sig00001276 ), + .A2(\blk00000003/blk0000051c/sig00001276 ), + .A3(\blk00000003/blk0000051c/sig00001276 ), + .CE(\blk00000003/blk0000051c/sig0000128f ), + .CLK(clk), + .D(\blk00000003/sig00000861 ), + .Q(\blk00000003/blk0000051c/sig0000127f ), + .Q15(\NLW_blk00000003/blk0000051c/blk0000053c_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk0000051c/blk0000053b ( + .A0(\blk00000003/sig0000029a ), + .A1(\blk00000003/blk0000051c/sig00001276 ), + .A2(\blk00000003/blk0000051c/sig00001276 ), + .A3(\blk00000003/blk0000051c/sig00001276 ), + .CE(\blk00000003/blk0000051c/sig0000128f ), + .CLK(clk), + .D(\blk00000003/sig00000865 ), + .Q(\blk00000003/blk0000051c/sig0000127b ), + .Q15(\NLW_blk00000003/blk0000051c/blk0000053b_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk0000051c/blk0000053a ( + .A0(\blk00000003/sig0000029a ), + .A1(\blk00000003/blk0000051c/sig00001276 ), + .A2(\blk00000003/blk0000051c/sig00001276 ), + .A3(\blk00000003/blk0000051c/sig00001276 ), + .CE(\blk00000003/blk0000051c/sig0000128f ), + .CLK(clk), + .D(\blk00000003/sig00000866 ), + .Q(\blk00000003/blk0000051c/sig0000127a ), + .Q15(\NLW_blk00000003/blk0000051c/blk0000053a_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk0000051c/blk00000539 ( + .A0(\blk00000003/sig0000029a ), + .A1(\blk00000003/blk0000051c/sig00001276 ), + .A2(\blk00000003/blk0000051c/sig00001276 ), + .A3(\blk00000003/blk0000051c/sig00001276 ), + .CE(\blk00000003/blk0000051c/sig0000128f ), + .CLK(clk), + .D(\blk00000003/sig00000864 ), + .Q(\blk00000003/blk0000051c/sig0000127c ), + .Q15(\NLW_blk00000003/blk0000051c/blk00000539_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk0000051c/blk00000538 ( + .A0(\blk00000003/sig0000029a ), + .A1(\blk00000003/blk0000051c/sig00001276 ), + .A2(\blk00000003/blk0000051c/sig00001276 ), + .A3(\blk00000003/blk0000051c/sig00001276 ), + .CE(\blk00000003/blk0000051c/sig0000128f ), + .CLK(clk), + .D(\blk00000003/sig00000868 ), + .Q(\blk00000003/blk0000051c/sig00001278 ), + .Q15(\NLW_blk00000003/blk0000051c/blk00000538_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk0000051c/blk00000537 ( + .A0(\blk00000003/sig0000029a ), + .A1(\blk00000003/blk0000051c/sig00001276 ), + .A2(\blk00000003/blk0000051c/sig00001276 ), + .A3(\blk00000003/blk0000051c/sig00001276 ), + .CE(\blk00000003/blk0000051c/sig0000128f ), + .CLK(clk), + .D(\blk00000003/sig00000869 ), + .Q(\blk00000003/blk0000051c/sig00001277 ), + .Q15(\NLW_blk00000003/blk0000051c/blk00000537_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk0000051c/blk00000536 ( + .A0(\blk00000003/sig0000029a ), + .A1(\blk00000003/blk0000051c/sig00001276 ), + .A2(\blk00000003/blk0000051c/sig00001276 ), + .A3(\blk00000003/blk0000051c/sig00001276 ), + .CE(\blk00000003/blk0000051c/sig0000128f ), + .CLK(clk), + .D(\blk00000003/sig00000867 ), + .Q(\blk00000003/blk0000051c/sig00001279 ), + .Q15(\NLW_blk00000003/blk0000051c/blk00000536_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk0000051c/blk00000535 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk0000051c/sig0000128e ), + .Q(\blk00000003/sig000002b9 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk0000051c/blk00000534 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk0000051c/sig0000128d ), + .Q(\blk00000003/sig000002ba ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk0000051c/blk00000533 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk0000051c/sig0000128c ), + .Q(\blk00000003/sig000002bb ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk0000051c/blk00000532 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk0000051c/sig0000128b ), + .Q(\blk00000003/sig000002bc ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk0000051c/blk00000531 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk0000051c/sig0000128a ), + .Q(\blk00000003/sig000002bd ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk0000051c/blk00000530 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk0000051c/sig00001289 ), + .Q(\blk00000003/sig000002be ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk0000051c/blk0000052f ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk0000051c/sig00001288 ), + .Q(\blk00000003/sig000002bf ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk0000051c/blk0000052e ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk0000051c/sig00001287 ), + .Q(\blk00000003/sig000002c0 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk0000051c/blk0000052d ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk0000051c/sig00001286 ), + .Q(\blk00000003/sig000002c1 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk0000051c/blk0000052c ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk0000051c/sig00001285 ), + .Q(\blk00000003/sig000002c2 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk0000051c/blk0000052b ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk0000051c/sig00001284 ), + .Q(\blk00000003/sig000002c3 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk0000051c/blk0000052a ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk0000051c/sig00001283 ), + .Q(\blk00000003/sig000002c4 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk0000051c/blk00000529 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk0000051c/sig00001282 ), + .Q(\blk00000003/sig000002c5 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk0000051c/blk00000528 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk0000051c/sig00001281 ), + .Q(\blk00000003/sig000002c6 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk0000051c/blk00000527 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk0000051c/sig00001280 ), + .Q(\blk00000003/sig000002c7 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk0000051c/blk00000526 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk0000051c/sig0000127f ), + .Q(\blk00000003/sig000002c8 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk0000051c/blk00000525 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk0000051c/sig0000127e ), + .Q(\blk00000003/sig000002c9 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk0000051c/blk00000524 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk0000051c/sig0000127d ), + .Q(\blk00000003/sig000002ca ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk0000051c/blk00000523 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk0000051c/sig0000127c ), + .Q(\blk00000003/sig000002cb ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk0000051c/blk00000522 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk0000051c/sig0000127b ), + .Q(\blk00000003/sig000002cc ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk0000051c/blk00000521 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk0000051c/sig0000127a ), + .Q(\blk00000003/sig000002cd ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk0000051c/blk00000520 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk0000051c/sig00001279 ), + .Q(\blk00000003/sig000002ce ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk0000051c/blk0000051f ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk0000051c/sig00001278 ), + .Q(\blk00000003/sig000002cf ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk0000051c/blk0000051e ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk0000051c/sig00001277 ), + .Q(\blk00000003/sig000002d0 ) + ); + GND \blk00000003/blk0000051c/blk0000051d ( + .G(\blk00000003/blk0000051c/sig00001276 ) + ); + LUT2 #( + .INIT ( 4'h8 )) + \blk00000003/blk0000054f/blk00000581 ( + .I0(ce), + .I1(\blk00000003/sig00000760 ), + .O(\blk00000003/blk0000054f/sig000012dd ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk0000054f/blk00000580 ( + .A0(\blk00000003/sig00000295 ), + .A1(\blk00000003/blk0000054f/sig000012c4 ), + .A2(\blk00000003/blk0000054f/sig000012c4 ), + .A3(\blk00000003/blk0000054f/sig000012c4 ), + .CE(\blk00000003/blk0000054f/sig000012dd ), + .CLK(clk), + .D(\blk00000003/sig0000086b ), + .Q(\blk00000003/blk0000054f/sig000012db ), + .Q15(\NLW_blk00000003/blk0000054f/blk00000580_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk0000054f/blk0000057f ( + .A0(\blk00000003/sig00000295 ), + .A1(\blk00000003/blk0000054f/sig000012c4 ), + .A2(\blk00000003/blk0000054f/sig000012c4 ), + .A3(\blk00000003/blk0000054f/sig000012c4 ), + .CE(\blk00000003/blk0000054f/sig000012dd ), + .CLK(clk), + .D(\blk00000003/sig0000086c ), + .Q(\blk00000003/blk0000054f/sig000012da ), + .Q15(\NLW_blk00000003/blk0000054f/blk0000057f_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk0000054f/blk0000057e ( + .A0(\blk00000003/sig00000295 ), + .A1(\blk00000003/blk0000054f/sig000012c4 ), + .A2(\blk00000003/blk0000054f/sig000012c4 ), + .A3(\blk00000003/blk0000054f/sig000012c4 ), + .CE(\blk00000003/blk0000054f/sig000012dd ), + .CLK(clk), + .D(\blk00000003/sig0000086a ), + .Q(\blk00000003/blk0000054f/sig000012dc ), + .Q15(\NLW_blk00000003/blk0000054f/blk0000057e_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk0000054f/blk0000057d ( + .A0(\blk00000003/sig00000295 ), + .A1(\blk00000003/blk0000054f/sig000012c4 ), + .A2(\blk00000003/blk0000054f/sig000012c4 ), + .A3(\blk00000003/blk0000054f/sig000012c4 ), + .CE(\blk00000003/blk0000054f/sig000012dd ), + .CLK(clk), + .D(\blk00000003/sig0000086e ), + .Q(\blk00000003/blk0000054f/sig000012d8 ), + .Q15(\NLW_blk00000003/blk0000054f/blk0000057d_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk0000054f/blk0000057c ( + .A0(\blk00000003/sig00000295 ), + .A1(\blk00000003/blk0000054f/sig000012c4 ), + .A2(\blk00000003/blk0000054f/sig000012c4 ), + .A3(\blk00000003/blk0000054f/sig000012c4 ), + .CE(\blk00000003/blk0000054f/sig000012dd ), + .CLK(clk), + .D(\blk00000003/sig0000086f ), + .Q(\blk00000003/blk0000054f/sig000012d7 ), + .Q15(\NLW_blk00000003/blk0000054f/blk0000057c_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk0000054f/blk0000057b ( + .A0(\blk00000003/sig00000295 ), + .A1(\blk00000003/blk0000054f/sig000012c4 ), + .A2(\blk00000003/blk0000054f/sig000012c4 ), + .A3(\blk00000003/blk0000054f/sig000012c4 ), + .CE(\blk00000003/blk0000054f/sig000012dd ), + .CLK(clk), + .D(\blk00000003/sig0000086d ), + .Q(\blk00000003/blk0000054f/sig000012d9 ), + .Q15(\NLW_blk00000003/blk0000054f/blk0000057b_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk0000054f/blk0000057a ( + .A0(\blk00000003/sig00000295 ), + .A1(\blk00000003/blk0000054f/sig000012c4 ), + .A2(\blk00000003/blk0000054f/sig000012c4 ), + .A3(\blk00000003/blk0000054f/sig000012c4 ), + .CE(\blk00000003/blk0000054f/sig000012dd ), + .CLK(clk), + .D(\blk00000003/sig00000871 ), + .Q(\blk00000003/blk0000054f/sig000012d5 ), + .Q15(\NLW_blk00000003/blk0000054f/blk0000057a_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk0000054f/blk00000579 ( + .A0(\blk00000003/sig00000295 ), + .A1(\blk00000003/blk0000054f/sig000012c4 ), + .A2(\blk00000003/blk0000054f/sig000012c4 ), + .A3(\blk00000003/blk0000054f/sig000012c4 ), + .CE(\blk00000003/blk0000054f/sig000012dd ), + .CLK(clk), + .D(\blk00000003/sig00000872 ), + .Q(\blk00000003/blk0000054f/sig000012d4 ), + .Q15(\NLW_blk00000003/blk0000054f/blk00000579_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk0000054f/blk00000578 ( + .A0(\blk00000003/sig00000295 ), + .A1(\blk00000003/blk0000054f/sig000012c4 ), + .A2(\blk00000003/blk0000054f/sig000012c4 ), + .A3(\blk00000003/blk0000054f/sig000012c4 ), + .CE(\blk00000003/blk0000054f/sig000012dd ), + .CLK(clk), + .D(\blk00000003/sig00000870 ), + .Q(\blk00000003/blk0000054f/sig000012d6 ), + .Q15(\NLW_blk00000003/blk0000054f/blk00000578_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk0000054f/blk00000577 ( + .A0(\blk00000003/sig00000295 ), + .A1(\blk00000003/blk0000054f/sig000012c4 ), + .A2(\blk00000003/blk0000054f/sig000012c4 ), + .A3(\blk00000003/blk0000054f/sig000012c4 ), + .CE(\blk00000003/blk0000054f/sig000012dd ), + .CLK(clk), + .D(\blk00000003/sig00000874 ), + .Q(\blk00000003/blk0000054f/sig000012d2 ), + .Q15(\NLW_blk00000003/blk0000054f/blk00000577_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk0000054f/blk00000576 ( + .A0(\blk00000003/sig00000295 ), + .A1(\blk00000003/blk0000054f/sig000012c4 ), + .A2(\blk00000003/blk0000054f/sig000012c4 ), + .A3(\blk00000003/blk0000054f/sig000012c4 ), + .CE(\blk00000003/blk0000054f/sig000012dd ), + .CLK(clk), + .D(\blk00000003/sig00000875 ), + .Q(\blk00000003/blk0000054f/sig000012d1 ), + .Q15(\NLW_blk00000003/blk0000054f/blk00000576_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk0000054f/blk00000575 ( + .A0(\blk00000003/sig00000295 ), + .A1(\blk00000003/blk0000054f/sig000012c4 ), + .A2(\blk00000003/blk0000054f/sig000012c4 ), + .A3(\blk00000003/blk0000054f/sig000012c4 ), + .CE(\blk00000003/blk0000054f/sig000012dd ), + .CLK(clk), + .D(\blk00000003/sig00000873 ), + .Q(\blk00000003/blk0000054f/sig000012d3 ), + .Q15(\NLW_blk00000003/blk0000054f/blk00000575_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk0000054f/blk00000574 ( + .A0(\blk00000003/sig00000295 ), + .A1(\blk00000003/blk0000054f/sig000012c4 ), + .A2(\blk00000003/blk0000054f/sig000012c4 ), + .A3(\blk00000003/blk0000054f/sig000012c4 ), + .CE(\blk00000003/blk0000054f/sig000012dd ), + .CLK(clk), + .D(\blk00000003/sig00000877 ), + .Q(\blk00000003/blk0000054f/sig000012cf ), + .Q15(\NLW_blk00000003/blk0000054f/blk00000574_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk0000054f/blk00000573 ( + .A0(\blk00000003/sig00000295 ), + .A1(\blk00000003/blk0000054f/sig000012c4 ), + .A2(\blk00000003/blk0000054f/sig000012c4 ), + .A3(\blk00000003/blk0000054f/sig000012c4 ), + .CE(\blk00000003/blk0000054f/sig000012dd ), + .CLK(clk), + .D(\blk00000003/sig00000878 ), + .Q(\blk00000003/blk0000054f/sig000012ce ), + .Q15(\NLW_blk00000003/blk0000054f/blk00000573_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk0000054f/blk00000572 ( + .A0(\blk00000003/sig00000295 ), + .A1(\blk00000003/blk0000054f/sig000012c4 ), + .A2(\blk00000003/blk0000054f/sig000012c4 ), + .A3(\blk00000003/blk0000054f/sig000012c4 ), + .CE(\blk00000003/blk0000054f/sig000012dd ), + .CLK(clk), + .D(\blk00000003/sig00000876 ), + .Q(\blk00000003/blk0000054f/sig000012d0 ), + .Q15(\NLW_blk00000003/blk0000054f/blk00000572_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk0000054f/blk00000571 ( + .A0(\blk00000003/sig00000295 ), + .A1(\blk00000003/blk0000054f/sig000012c4 ), + .A2(\blk00000003/blk0000054f/sig000012c4 ), + .A3(\blk00000003/blk0000054f/sig000012c4 ), + .CE(\blk00000003/blk0000054f/sig000012dd ), + .CLK(clk), + .D(\blk00000003/sig0000087a ), + .Q(\blk00000003/blk0000054f/sig000012cc ), + .Q15(\NLW_blk00000003/blk0000054f/blk00000571_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk0000054f/blk00000570 ( + .A0(\blk00000003/sig00000295 ), + .A1(\blk00000003/blk0000054f/sig000012c4 ), + .A2(\blk00000003/blk0000054f/sig000012c4 ), + .A3(\blk00000003/blk0000054f/sig000012c4 ), + .CE(\blk00000003/blk0000054f/sig000012dd ), + .CLK(clk), + .D(\blk00000003/sig0000087b ), + .Q(\blk00000003/blk0000054f/sig000012cb ), + .Q15(\NLW_blk00000003/blk0000054f/blk00000570_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk0000054f/blk0000056f ( + .A0(\blk00000003/sig00000295 ), + .A1(\blk00000003/blk0000054f/sig000012c4 ), + .A2(\blk00000003/blk0000054f/sig000012c4 ), + .A3(\blk00000003/blk0000054f/sig000012c4 ), + .CE(\blk00000003/blk0000054f/sig000012dd ), + .CLK(clk), + .D(\blk00000003/sig00000879 ), + .Q(\blk00000003/blk0000054f/sig000012cd ), + .Q15(\NLW_blk00000003/blk0000054f/blk0000056f_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk0000054f/blk0000056e ( + .A0(\blk00000003/sig00000295 ), + .A1(\blk00000003/blk0000054f/sig000012c4 ), + .A2(\blk00000003/blk0000054f/sig000012c4 ), + .A3(\blk00000003/blk0000054f/sig000012c4 ), + .CE(\blk00000003/blk0000054f/sig000012dd ), + .CLK(clk), + .D(\blk00000003/sig0000087d ), + .Q(\blk00000003/blk0000054f/sig000012c9 ), + .Q15(\NLW_blk00000003/blk0000054f/blk0000056e_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk0000054f/blk0000056d ( + .A0(\blk00000003/sig00000295 ), + .A1(\blk00000003/blk0000054f/sig000012c4 ), + .A2(\blk00000003/blk0000054f/sig000012c4 ), + .A3(\blk00000003/blk0000054f/sig000012c4 ), + .CE(\blk00000003/blk0000054f/sig000012dd ), + .CLK(clk), + .D(\blk00000003/sig0000087e ), + .Q(\blk00000003/blk0000054f/sig000012c8 ), + .Q15(\NLW_blk00000003/blk0000054f/blk0000056d_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk0000054f/blk0000056c ( + .A0(\blk00000003/sig00000295 ), + .A1(\blk00000003/blk0000054f/sig000012c4 ), + .A2(\blk00000003/blk0000054f/sig000012c4 ), + .A3(\blk00000003/blk0000054f/sig000012c4 ), + .CE(\blk00000003/blk0000054f/sig000012dd ), + .CLK(clk), + .D(\blk00000003/sig0000087c ), + .Q(\blk00000003/blk0000054f/sig000012ca ), + .Q15(\NLW_blk00000003/blk0000054f/blk0000056c_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk0000054f/blk0000056b ( + .A0(\blk00000003/sig00000295 ), + .A1(\blk00000003/blk0000054f/sig000012c4 ), + .A2(\blk00000003/blk0000054f/sig000012c4 ), + .A3(\blk00000003/blk0000054f/sig000012c4 ), + .CE(\blk00000003/blk0000054f/sig000012dd ), + .CLK(clk), + .D(\blk00000003/sig00000880 ), + .Q(\blk00000003/blk0000054f/sig000012c6 ), + .Q15(\NLW_blk00000003/blk0000054f/blk0000056b_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk0000054f/blk0000056a ( + .A0(\blk00000003/sig00000295 ), + .A1(\blk00000003/blk0000054f/sig000012c4 ), + .A2(\blk00000003/blk0000054f/sig000012c4 ), + .A3(\blk00000003/blk0000054f/sig000012c4 ), + .CE(\blk00000003/blk0000054f/sig000012dd ), + .CLK(clk), + .D(\blk00000003/sig00000881 ), + .Q(\blk00000003/blk0000054f/sig000012c5 ), + .Q15(\NLW_blk00000003/blk0000054f/blk0000056a_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk0000054f/blk00000569 ( + .A0(\blk00000003/sig00000295 ), + .A1(\blk00000003/blk0000054f/sig000012c4 ), + .A2(\blk00000003/blk0000054f/sig000012c4 ), + .A3(\blk00000003/blk0000054f/sig000012c4 ), + .CE(\blk00000003/blk0000054f/sig000012dd ), + .CLK(clk), + .D(\blk00000003/sig0000087f ), + .Q(\blk00000003/blk0000054f/sig000012c7 ), + .Q15(\NLW_blk00000003/blk0000054f/blk00000569_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk0000054f/blk00000568 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk0000054f/sig000012dc ), + .Q(\blk00000003/sig000002d1 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk0000054f/blk00000567 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk0000054f/sig000012db ), + .Q(\blk00000003/sig000002d2 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk0000054f/blk00000566 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk0000054f/sig000012da ), + .Q(\blk00000003/sig000002d3 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk0000054f/blk00000565 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk0000054f/sig000012d9 ), + .Q(\blk00000003/sig000002d4 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk0000054f/blk00000564 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk0000054f/sig000012d8 ), + .Q(\blk00000003/sig000002d5 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk0000054f/blk00000563 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk0000054f/sig000012d7 ), + .Q(\blk00000003/sig000002d6 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk0000054f/blk00000562 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk0000054f/sig000012d6 ), + .Q(\blk00000003/sig000002d7 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk0000054f/blk00000561 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk0000054f/sig000012d5 ), + .Q(\blk00000003/sig000002d8 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk0000054f/blk00000560 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk0000054f/sig000012d4 ), + .Q(\blk00000003/sig000002d9 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk0000054f/blk0000055f ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk0000054f/sig000012d3 ), + .Q(\blk00000003/sig000002da ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk0000054f/blk0000055e ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk0000054f/sig000012d2 ), + .Q(\blk00000003/sig000002db ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk0000054f/blk0000055d ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk0000054f/sig000012d1 ), + .Q(\blk00000003/sig000002dc ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk0000054f/blk0000055c ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk0000054f/sig000012d0 ), + .Q(\blk00000003/sig000002dd ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk0000054f/blk0000055b ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk0000054f/sig000012cf ), + .Q(\blk00000003/sig000002de ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk0000054f/blk0000055a ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk0000054f/sig000012ce ), + .Q(\blk00000003/sig000002df ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk0000054f/blk00000559 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk0000054f/sig000012cd ), + .Q(\blk00000003/sig000002e0 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk0000054f/blk00000558 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk0000054f/sig000012cc ), + .Q(\blk00000003/sig000002e1 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk0000054f/blk00000557 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk0000054f/sig000012cb ), + .Q(\blk00000003/sig000002e2 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk0000054f/blk00000556 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk0000054f/sig000012ca ), + .Q(\blk00000003/sig000002e3 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk0000054f/blk00000555 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk0000054f/sig000012c9 ), + .Q(\blk00000003/sig000002e4 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk0000054f/blk00000554 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk0000054f/sig000012c8 ), + .Q(\blk00000003/sig000002e5 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk0000054f/blk00000553 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk0000054f/sig000012c7 ), + .Q(\blk00000003/sig000002e6 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk0000054f/blk00000552 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk0000054f/sig000012c6 ), + .Q(\blk00000003/sig000002e7 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk0000054f/blk00000551 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk0000054f/sig000012c5 ), + .Q(\blk00000003/sig000002e8 ) + ); + GND \blk00000003/blk0000054f/blk00000550 ( + .G(\blk00000003/blk0000054f/sig000012c4 ) + ); + LUT2 #( + .INIT ( 4'h8 )) + \blk00000003/blk00000582/blk000005b4 ( + .I0(ce), + .I1(\blk00000003/sig00000761 ), + .O(\blk00000003/blk00000582/sig0000132b ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000582/blk000005b3 ( + .A0(\blk00000003/sig0000029a ), + .A1(\blk00000003/blk00000582/sig00001312 ), + .A2(\blk00000003/blk00000582/sig00001312 ), + .A3(\blk00000003/blk00000582/sig00001312 ), + .CE(\blk00000003/blk00000582/sig0000132b ), + .CLK(clk), + .D(\blk00000003/sig00000883 ), + .Q(\blk00000003/blk00000582/sig00001329 ), + .Q15(\NLW_blk00000003/blk00000582/blk000005b3_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000582/blk000005b2 ( + .A0(\blk00000003/sig0000029a ), + .A1(\blk00000003/blk00000582/sig00001312 ), + .A2(\blk00000003/blk00000582/sig00001312 ), + .A3(\blk00000003/blk00000582/sig00001312 ), + .CE(\blk00000003/blk00000582/sig0000132b ), + .CLK(clk), + .D(\blk00000003/sig00000884 ), + .Q(\blk00000003/blk00000582/sig00001328 ), + .Q15(\NLW_blk00000003/blk00000582/blk000005b2_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000582/blk000005b1 ( + .A0(\blk00000003/sig0000029a ), + .A1(\blk00000003/blk00000582/sig00001312 ), + .A2(\blk00000003/blk00000582/sig00001312 ), + .A3(\blk00000003/blk00000582/sig00001312 ), + .CE(\blk00000003/blk00000582/sig0000132b ), + .CLK(clk), + .D(\blk00000003/sig00000882 ), + .Q(\blk00000003/blk00000582/sig0000132a ), + .Q15(\NLW_blk00000003/blk00000582/blk000005b1_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000582/blk000005b0 ( + .A0(\blk00000003/sig0000029a ), + .A1(\blk00000003/blk00000582/sig00001312 ), + .A2(\blk00000003/blk00000582/sig00001312 ), + .A3(\blk00000003/blk00000582/sig00001312 ), + .CE(\blk00000003/blk00000582/sig0000132b ), + .CLK(clk), + .D(\blk00000003/sig00000886 ), + .Q(\blk00000003/blk00000582/sig00001326 ), + .Q15(\NLW_blk00000003/blk00000582/blk000005b0_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000582/blk000005af ( + .A0(\blk00000003/sig0000029a ), + .A1(\blk00000003/blk00000582/sig00001312 ), + .A2(\blk00000003/blk00000582/sig00001312 ), + .A3(\blk00000003/blk00000582/sig00001312 ), + .CE(\blk00000003/blk00000582/sig0000132b ), + .CLK(clk), + .D(\blk00000003/sig00000887 ), + .Q(\blk00000003/blk00000582/sig00001325 ), + .Q15(\NLW_blk00000003/blk00000582/blk000005af_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000582/blk000005ae ( + .A0(\blk00000003/sig0000029a ), + .A1(\blk00000003/blk00000582/sig00001312 ), + .A2(\blk00000003/blk00000582/sig00001312 ), + .A3(\blk00000003/blk00000582/sig00001312 ), + .CE(\blk00000003/blk00000582/sig0000132b ), + .CLK(clk), + .D(\blk00000003/sig00000885 ), + .Q(\blk00000003/blk00000582/sig00001327 ), + .Q15(\NLW_blk00000003/blk00000582/blk000005ae_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000582/blk000005ad ( + .A0(\blk00000003/sig0000029a ), + .A1(\blk00000003/blk00000582/sig00001312 ), + .A2(\blk00000003/blk00000582/sig00001312 ), + .A3(\blk00000003/blk00000582/sig00001312 ), + .CE(\blk00000003/blk00000582/sig0000132b ), + .CLK(clk), + .D(\blk00000003/sig00000889 ), + .Q(\blk00000003/blk00000582/sig00001323 ), + .Q15(\NLW_blk00000003/blk00000582/blk000005ad_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000582/blk000005ac ( + .A0(\blk00000003/sig0000029a ), + .A1(\blk00000003/blk00000582/sig00001312 ), + .A2(\blk00000003/blk00000582/sig00001312 ), + .A3(\blk00000003/blk00000582/sig00001312 ), + .CE(\blk00000003/blk00000582/sig0000132b ), + .CLK(clk), + .D(\blk00000003/sig0000088a ), + .Q(\blk00000003/blk00000582/sig00001322 ), + .Q15(\NLW_blk00000003/blk00000582/blk000005ac_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000582/blk000005ab ( + .A0(\blk00000003/sig0000029a ), + .A1(\blk00000003/blk00000582/sig00001312 ), + .A2(\blk00000003/blk00000582/sig00001312 ), + .A3(\blk00000003/blk00000582/sig00001312 ), + .CE(\blk00000003/blk00000582/sig0000132b ), + .CLK(clk), + .D(\blk00000003/sig00000888 ), + .Q(\blk00000003/blk00000582/sig00001324 ), + .Q15(\NLW_blk00000003/blk00000582/blk000005ab_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000582/blk000005aa ( + .A0(\blk00000003/sig0000029a ), + .A1(\blk00000003/blk00000582/sig00001312 ), + .A2(\blk00000003/blk00000582/sig00001312 ), + .A3(\blk00000003/blk00000582/sig00001312 ), + .CE(\blk00000003/blk00000582/sig0000132b ), + .CLK(clk), + .D(\blk00000003/sig0000088c ), + .Q(\blk00000003/blk00000582/sig00001320 ), + .Q15(\NLW_blk00000003/blk00000582/blk000005aa_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000582/blk000005a9 ( + .A0(\blk00000003/sig0000029a ), + .A1(\blk00000003/blk00000582/sig00001312 ), + .A2(\blk00000003/blk00000582/sig00001312 ), + .A3(\blk00000003/blk00000582/sig00001312 ), + .CE(\blk00000003/blk00000582/sig0000132b ), + .CLK(clk), + .D(\blk00000003/sig0000088d ), + .Q(\blk00000003/blk00000582/sig0000131f ), + .Q15(\NLW_blk00000003/blk00000582/blk000005a9_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000582/blk000005a8 ( + .A0(\blk00000003/sig0000029a ), + .A1(\blk00000003/blk00000582/sig00001312 ), + .A2(\blk00000003/blk00000582/sig00001312 ), + .A3(\blk00000003/blk00000582/sig00001312 ), + .CE(\blk00000003/blk00000582/sig0000132b ), + .CLK(clk), + .D(\blk00000003/sig0000088b ), + .Q(\blk00000003/blk00000582/sig00001321 ), + .Q15(\NLW_blk00000003/blk00000582/blk000005a8_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000582/blk000005a7 ( + .A0(\blk00000003/sig0000029a ), + .A1(\blk00000003/blk00000582/sig00001312 ), + .A2(\blk00000003/blk00000582/sig00001312 ), + .A3(\blk00000003/blk00000582/sig00001312 ), + .CE(\blk00000003/blk00000582/sig0000132b ), + .CLK(clk), + .D(\blk00000003/sig0000088f ), + .Q(\blk00000003/blk00000582/sig0000131d ), + .Q15(\NLW_blk00000003/blk00000582/blk000005a7_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000582/blk000005a6 ( + .A0(\blk00000003/sig0000029a ), + .A1(\blk00000003/blk00000582/sig00001312 ), + .A2(\blk00000003/blk00000582/sig00001312 ), + .A3(\blk00000003/blk00000582/sig00001312 ), + .CE(\blk00000003/blk00000582/sig0000132b ), + .CLK(clk), + .D(\blk00000003/sig00000890 ), + .Q(\blk00000003/blk00000582/sig0000131c ), + .Q15(\NLW_blk00000003/blk00000582/blk000005a6_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000582/blk000005a5 ( + .A0(\blk00000003/sig0000029a ), + .A1(\blk00000003/blk00000582/sig00001312 ), + .A2(\blk00000003/blk00000582/sig00001312 ), + .A3(\blk00000003/blk00000582/sig00001312 ), + .CE(\blk00000003/blk00000582/sig0000132b ), + .CLK(clk), + .D(\blk00000003/sig0000088e ), + .Q(\blk00000003/blk00000582/sig0000131e ), + .Q15(\NLW_blk00000003/blk00000582/blk000005a5_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000582/blk000005a4 ( + .A0(\blk00000003/sig0000029a ), + .A1(\blk00000003/blk00000582/sig00001312 ), + .A2(\blk00000003/blk00000582/sig00001312 ), + .A3(\blk00000003/blk00000582/sig00001312 ), + .CE(\blk00000003/blk00000582/sig0000132b ), + .CLK(clk), + .D(\blk00000003/sig00000892 ), + .Q(\blk00000003/blk00000582/sig0000131a ), + .Q15(\NLW_blk00000003/blk00000582/blk000005a4_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000582/blk000005a3 ( + .A0(\blk00000003/sig0000029a ), + .A1(\blk00000003/blk00000582/sig00001312 ), + .A2(\blk00000003/blk00000582/sig00001312 ), + .A3(\blk00000003/blk00000582/sig00001312 ), + .CE(\blk00000003/blk00000582/sig0000132b ), + .CLK(clk), + .D(\blk00000003/sig00000893 ), + .Q(\blk00000003/blk00000582/sig00001319 ), + .Q15(\NLW_blk00000003/blk00000582/blk000005a3_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000582/blk000005a2 ( + .A0(\blk00000003/sig0000029a ), + .A1(\blk00000003/blk00000582/sig00001312 ), + .A2(\blk00000003/blk00000582/sig00001312 ), + .A3(\blk00000003/blk00000582/sig00001312 ), + .CE(\blk00000003/blk00000582/sig0000132b ), + .CLK(clk), + .D(\blk00000003/sig00000891 ), + .Q(\blk00000003/blk00000582/sig0000131b ), + .Q15(\NLW_blk00000003/blk00000582/blk000005a2_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000582/blk000005a1 ( + .A0(\blk00000003/sig0000029a ), + .A1(\blk00000003/blk00000582/sig00001312 ), + .A2(\blk00000003/blk00000582/sig00001312 ), + .A3(\blk00000003/blk00000582/sig00001312 ), + .CE(\blk00000003/blk00000582/sig0000132b ), + .CLK(clk), + .D(\blk00000003/sig00000895 ), + .Q(\blk00000003/blk00000582/sig00001317 ), + .Q15(\NLW_blk00000003/blk00000582/blk000005a1_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000582/blk000005a0 ( + .A0(\blk00000003/sig0000029a ), + .A1(\blk00000003/blk00000582/sig00001312 ), + .A2(\blk00000003/blk00000582/sig00001312 ), + .A3(\blk00000003/blk00000582/sig00001312 ), + .CE(\blk00000003/blk00000582/sig0000132b ), + .CLK(clk), + .D(\blk00000003/sig00000896 ), + .Q(\blk00000003/blk00000582/sig00001316 ), + .Q15(\NLW_blk00000003/blk00000582/blk000005a0_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000582/blk0000059f ( + .A0(\blk00000003/sig0000029a ), + .A1(\blk00000003/blk00000582/sig00001312 ), + .A2(\blk00000003/blk00000582/sig00001312 ), + .A3(\blk00000003/blk00000582/sig00001312 ), + .CE(\blk00000003/blk00000582/sig0000132b ), + .CLK(clk), + .D(\blk00000003/sig00000894 ), + .Q(\blk00000003/blk00000582/sig00001318 ), + .Q15(\NLW_blk00000003/blk00000582/blk0000059f_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000582/blk0000059e ( + .A0(\blk00000003/sig0000029a ), + .A1(\blk00000003/blk00000582/sig00001312 ), + .A2(\blk00000003/blk00000582/sig00001312 ), + .A3(\blk00000003/blk00000582/sig00001312 ), + .CE(\blk00000003/blk00000582/sig0000132b ), + .CLK(clk), + .D(\blk00000003/sig00000898 ), + .Q(\blk00000003/blk00000582/sig00001314 ), + .Q15(\NLW_blk00000003/blk00000582/blk0000059e_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000582/blk0000059d ( + .A0(\blk00000003/sig0000029a ), + .A1(\blk00000003/blk00000582/sig00001312 ), + .A2(\blk00000003/blk00000582/sig00001312 ), + .A3(\blk00000003/blk00000582/sig00001312 ), + .CE(\blk00000003/blk00000582/sig0000132b ), + .CLK(clk), + .D(\blk00000003/sig00000899 ), + .Q(\blk00000003/blk00000582/sig00001313 ), + .Q15(\NLW_blk00000003/blk00000582/blk0000059d_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000582/blk0000059c ( + .A0(\blk00000003/sig0000029a ), + .A1(\blk00000003/blk00000582/sig00001312 ), + .A2(\blk00000003/blk00000582/sig00001312 ), + .A3(\blk00000003/blk00000582/sig00001312 ), + .CE(\blk00000003/blk00000582/sig0000132b ), + .CLK(clk), + .D(\blk00000003/sig00000897 ), + .Q(\blk00000003/blk00000582/sig00001315 ), + .Q15(\NLW_blk00000003/blk00000582/blk0000059c_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000582/blk0000059b ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk00000582/sig0000132a ), + .Q(\blk00000003/sig00000319 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000582/blk0000059a ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk00000582/sig00001329 ), + .Q(\blk00000003/sig0000031a ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000582/blk00000599 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk00000582/sig00001328 ), + .Q(\blk00000003/sig0000031b ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000582/blk00000598 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk00000582/sig00001327 ), + .Q(\blk00000003/sig0000031c ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000582/blk00000597 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk00000582/sig00001326 ), + .Q(\blk00000003/sig0000031d ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000582/blk00000596 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk00000582/sig00001325 ), + .Q(\blk00000003/sig0000031e ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000582/blk00000595 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk00000582/sig00001324 ), + .Q(\blk00000003/sig0000031f ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000582/blk00000594 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk00000582/sig00001323 ), + .Q(\blk00000003/sig00000320 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000582/blk00000593 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk00000582/sig00001322 ), + .Q(\blk00000003/sig00000321 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000582/blk00000592 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk00000582/sig00001321 ), + .Q(\blk00000003/sig00000322 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000582/blk00000591 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk00000582/sig00001320 ), + .Q(\blk00000003/sig00000323 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000582/blk00000590 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk00000582/sig0000131f ), + .Q(\blk00000003/sig00000324 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000582/blk0000058f ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk00000582/sig0000131e ), + .Q(\blk00000003/sig00000325 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000582/blk0000058e ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk00000582/sig0000131d ), + .Q(\blk00000003/sig00000326 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000582/blk0000058d ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk00000582/sig0000131c ), + .Q(\blk00000003/sig00000327 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000582/blk0000058c ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk00000582/sig0000131b ), + .Q(\blk00000003/sig00000328 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000582/blk0000058b ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk00000582/sig0000131a ), + .Q(\blk00000003/sig00000329 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000582/blk0000058a ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk00000582/sig00001319 ), + .Q(\blk00000003/sig0000032a ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000582/blk00000589 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk00000582/sig00001318 ), + .Q(\blk00000003/sig0000032b ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000582/blk00000588 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk00000582/sig00001317 ), + .Q(\blk00000003/sig0000032c ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000582/blk00000587 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk00000582/sig00001316 ), + .Q(\blk00000003/sig0000032d ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000582/blk00000586 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk00000582/sig00001315 ), + .Q(\blk00000003/sig0000032e ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000582/blk00000585 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk00000582/sig00001314 ), + .Q(\blk00000003/sig0000032f ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000582/blk00000584 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk00000582/sig00001313 ), + .Q(\blk00000003/sig00000330 ) + ); + GND \blk00000003/blk00000582/blk00000583 ( + .G(\blk00000003/blk00000582/sig00001312 ) + ); + LUT2 #( + .INIT ( 4'h8 )) + \blk00000003/blk000005b5/blk000005e7 ( + .I0(ce), + .I1(\blk00000003/sig00000760 ), + .O(\blk00000003/blk000005b5/sig00001379 ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk000005b5/blk000005e6 ( + .A0(\blk00000003/sig00000295 ), + .A1(\blk00000003/blk000005b5/sig00001360 ), + .A2(\blk00000003/blk000005b5/sig00001360 ), + .A3(\blk00000003/blk000005b5/sig00001360 ), + .CE(\blk00000003/blk000005b5/sig00001379 ), + .CLK(clk), + .D(\blk00000003/sig0000089b ), + .Q(\blk00000003/blk000005b5/sig00001377 ), + .Q15(\NLW_blk00000003/blk000005b5/blk000005e6_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk000005b5/blk000005e5 ( + .A0(\blk00000003/sig00000295 ), + .A1(\blk00000003/blk000005b5/sig00001360 ), + .A2(\blk00000003/blk000005b5/sig00001360 ), + .A3(\blk00000003/blk000005b5/sig00001360 ), + .CE(\blk00000003/blk000005b5/sig00001379 ), + .CLK(clk), + .D(\blk00000003/sig0000089c ), + .Q(\blk00000003/blk000005b5/sig00001376 ), + .Q15(\NLW_blk00000003/blk000005b5/blk000005e5_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk000005b5/blk000005e4 ( + .A0(\blk00000003/sig00000295 ), + .A1(\blk00000003/blk000005b5/sig00001360 ), + .A2(\blk00000003/blk000005b5/sig00001360 ), + .A3(\blk00000003/blk000005b5/sig00001360 ), + .CE(\blk00000003/blk000005b5/sig00001379 ), + .CLK(clk), + .D(\blk00000003/sig0000089a ), + .Q(\blk00000003/blk000005b5/sig00001378 ), + .Q15(\NLW_blk00000003/blk000005b5/blk000005e4_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk000005b5/blk000005e3 ( + .A0(\blk00000003/sig00000295 ), + .A1(\blk00000003/blk000005b5/sig00001360 ), + .A2(\blk00000003/blk000005b5/sig00001360 ), + .A3(\blk00000003/blk000005b5/sig00001360 ), + .CE(\blk00000003/blk000005b5/sig00001379 ), + .CLK(clk), + .D(\blk00000003/sig0000089e ), + .Q(\blk00000003/blk000005b5/sig00001374 ), + .Q15(\NLW_blk00000003/blk000005b5/blk000005e3_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk000005b5/blk000005e2 ( + .A0(\blk00000003/sig00000295 ), + .A1(\blk00000003/blk000005b5/sig00001360 ), + .A2(\blk00000003/blk000005b5/sig00001360 ), + .A3(\blk00000003/blk000005b5/sig00001360 ), + .CE(\blk00000003/blk000005b5/sig00001379 ), + .CLK(clk), + .D(\blk00000003/sig0000089f ), + .Q(\blk00000003/blk000005b5/sig00001373 ), + .Q15(\NLW_blk00000003/blk000005b5/blk000005e2_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk000005b5/blk000005e1 ( + .A0(\blk00000003/sig00000295 ), + .A1(\blk00000003/blk000005b5/sig00001360 ), + .A2(\blk00000003/blk000005b5/sig00001360 ), + .A3(\blk00000003/blk000005b5/sig00001360 ), + .CE(\blk00000003/blk000005b5/sig00001379 ), + .CLK(clk), + .D(\blk00000003/sig0000089d ), + .Q(\blk00000003/blk000005b5/sig00001375 ), + .Q15(\NLW_blk00000003/blk000005b5/blk000005e1_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk000005b5/blk000005e0 ( + .A0(\blk00000003/sig00000295 ), + .A1(\blk00000003/blk000005b5/sig00001360 ), + .A2(\blk00000003/blk000005b5/sig00001360 ), + .A3(\blk00000003/blk000005b5/sig00001360 ), + .CE(\blk00000003/blk000005b5/sig00001379 ), + .CLK(clk), + .D(\blk00000003/sig000008a1 ), + .Q(\blk00000003/blk000005b5/sig00001371 ), + .Q15(\NLW_blk00000003/blk000005b5/blk000005e0_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk000005b5/blk000005df ( + .A0(\blk00000003/sig00000295 ), + .A1(\blk00000003/blk000005b5/sig00001360 ), + .A2(\blk00000003/blk000005b5/sig00001360 ), + .A3(\blk00000003/blk000005b5/sig00001360 ), + .CE(\blk00000003/blk000005b5/sig00001379 ), + .CLK(clk), + .D(\blk00000003/sig000008a2 ), + .Q(\blk00000003/blk000005b5/sig00001370 ), + .Q15(\NLW_blk00000003/blk000005b5/blk000005df_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk000005b5/blk000005de ( + .A0(\blk00000003/sig00000295 ), + .A1(\blk00000003/blk000005b5/sig00001360 ), + .A2(\blk00000003/blk000005b5/sig00001360 ), + .A3(\blk00000003/blk000005b5/sig00001360 ), + .CE(\blk00000003/blk000005b5/sig00001379 ), + .CLK(clk), + .D(\blk00000003/sig000008a0 ), + .Q(\blk00000003/blk000005b5/sig00001372 ), + .Q15(\NLW_blk00000003/blk000005b5/blk000005de_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk000005b5/blk000005dd ( + .A0(\blk00000003/sig00000295 ), + .A1(\blk00000003/blk000005b5/sig00001360 ), + .A2(\blk00000003/blk000005b5/sig00001360 ), + .A3(\blk00000003/blk000005b5/sig00001360 ), + .CE(\blk00000003/blk000005b5/sig00001379 ), + .CLK(clk), + .D(\blk00000003/sig000008a4 ), + .Q(\blk00000003/blk000005b5/sig0000136e ), + .Q15(\NLW_blk00000003/blk000005b5/blk000005dd_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk000005b5/blk000005dc ( + .A0(\blk00000003/sig00000295 ), + .A1(\blk00000003/blk000005b5/sig00001360 ), + .A2(\blk00000003/blk000005b5/sig00001360 ), + .A3(\blk00000003/blk000005b5/sig00001360 ), + .CE(\blk00000003/blk000005b5/sig00001379 ), + .CLK(clk), + .D(\blk00000003/sig000008a5 ), + .Q(\blk00000003/blk000005b5/sig0000136d ), + .Q15(\NLW_blk00000003/blk000005b5/blk000005dc_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk000005b5/blk000005db ( + .A0(\blk00000003/sig00000295 ), + .A1(\blk00000003/blk000005b5/sig00001360 ), + .A2(\blk00000003/blk000005b5/sig00001360 ), + .A3(\blk00000003/blk000005b5/sig00001360 ), + .CE(\blk00000003/blk000005b5/sig00001379 ), + .CLK(clk), + .D(\blk00000003/sig000008a3 ), + .Q(\blk00000003/blk000005b5/sig0000136f ), + .Q15(\NLW_blk00000003/blk000005b5/blk000005db_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk000005b5/blk000005da ( + .A0(\blk00000003/sig00000295 ), + .A1(\blk00000003/blk000005b5/sig00001360 ), + .A2(\blk00000003/blk000005b5/sig00001360 ), + .A3(\blk00000003/blk000005b5/sig00001360 ), + .CE(\blk00000003/blk000005b5/sig00001379 ), + .CLK(clk), + .D(\blk00000003/sig000008a7 ), + .Q(\blk00000003/blk000005b5/sig0000136b ), + .Q15(\NLW_blk00000003/blk000005b5/blk000005da_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk000005b5/blk000005d9 ( + .A0(\blk00000003/sig00000295 ), + .A1(\blk00000003/blk000005b5/sig00001360 ), + .A2(\blk00000003/blk000005b5/sig00001360 ), + .A3(\blk00000003/blk000005b5/sig00001360 ), + .CE(\blk00000003/blk000005b5/sig00001379 ), + .CLK(clk), + .D(\blk00000003/sig000008a8 ), + .Q(\blk00000003/blk000005b5/sig0000136a ), + .Q15(\NLW_blk00000003/blk000005b5/blk000005d9_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk000005b5/blk000005d8 ( + .A0(\blk00000003/sig00000295 ), + .A1(\blk00000003/blk000005b5/sig00001360 ), + .A2(\blk00000003/blk000005b5/sig00001360 ), + .A3(\blk00000003/blk000005b5/sig00001360 ), + .CE(\blk00000003/blk000005b5/sig00001379 ), + .CLK(clk), + .D(\blk00000003/sig000008a6 ), + .Q(\blk00000003/blk000005b5/sig0000136c ), + .Q15(\NLW_blk00000003/blk000005b5/blk000005d8_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk000005b5/blk000005d7 ( + .A0(\blk00000003/sig00000295 ), + .A1(\blk00000003/blk000005b5/sig00001360 ), + .A2(\blk00000003/blk000005b5/sig00001360 ), + .A3(\blk00000003/blk000005b5/sig00001360 ), + .CE(\blk00000003/blk000005b5/sig00001379 ), + .CLK(clk), + .D(\blk00000003/sig000008aa ), + .Q(\blk00000003/blk000005b5/sig00001368 ), + .Q15(\NLW_blk00000003/blk000005b5/blk000005d7_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk000005b5/blk000005d6 ( + .A0(\blk00000003/sig00000295 ), + .A1(\blk00000003/blk000005b5/sig00001360 ), + .A2(\blk00000003/blk000005b5/sig00001360 ), + .A3(\blk00000003/blk000005b5/sig00001360 ), + .CE(\blk00000003/blk000005b5/sig00001379 ), + .CLK(clk), + .D(\blk00000003/sig000008ab ), + .Q(\blk00000003/blk000005b5/sig00001367 ), + .Q15(\NLW_blk00000003/blk000005b5/blk000005d6_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk000005b5/blk000005d5 ( + .A0(\blk00000003/sig00000295 ), + .A1(\blk00000003/blk000005b5/sig00001360 ), + .A2(\blk00000003/blk000005b5/sig00001360 ), + .A3(\blk00000003/blk000005b5/sig00001360 ), + .CE(\blk00000003/blk000005b5/sig00001379 ), + .CLK(clk), + .D(\blk00000003/sig000008a9 ), + .Q(\blk00000003/blk000005b5/sig00001369 ), + .Q15(\NLW_blk00000003/blk000005b5/blk000005d5_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk000005b5/blk000005d4 ( + .A0(\blk00000003/sig00000295 ), + .A1(\blk00000003/blk000005b5/sig00001360 ), + .A2(\blk00000003/blk000005b5/sig00001360 ), + .A3(\blk00000003/blk000005b5/sig00001360 ), + .CE(\blk00000003/blk000005b5/sig00001379 ), + .CLK(clk), + .D(\blk00000003/sig000008ad ), + .Q(\blk00000003/blk000005b5/sig00001365 ), + .Q15(\NLW_blk00000003/blk000005b5/blk000005d4_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk000005b5/blk000005d3 ( + .A0(\blk00000003/sig00000295 ), + .A1(\blk00000003/blk000005b5/sig00001360 ), + .A2(\blk00000003/blk000005b5/sig00001360 ), + .A3(\blk00000003/blk000005b5/sig00001360 ), + .CE(\blk00000003/blk000005b5/sig00001379 ), + .CLK(clk), + .D(\blk00000003/sig000008ae ), + .Q(\blk00000003/blk000005b5/sig00001364 ), + .Q15(\NLW_blk00000003/blk000005b5/blk000005d3_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk000005b5/blk000005d2 ( + .A0(\blk00000003/sig00000295 ), + .A1(\blk00000003/blk000005b5/sig00001360 ), + .A2(\blk00000003/blk000005b5/sig00001360 ), + .A3(\blk00000003/blk000005b5/sig00001360 ), + .CE(\blk00000003/blk000005b5/sig00001379 ), + .CLK(clk), + .D(\blk00000003/sig000008ac ), + .Q(\blk00000003/blk000005b5/sig00001366 ), + .Q15(\NLW_blk00000003/blk000005b5/blk000005d2_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk000005b5/blk000005d1 ( + .A0(\blk00000003/sig00000295 ), + .A1(\blk00000003/blk000005b5/sig00001360 ), + .A2(\blk00000003/blk000005b5/sig00001360 ), + .A3(\blk00000003/blk000005b5/sig00001360 ), + .CE(\blk00000003/blk000005b5/sig00001379 ), + .CLK(clk), + .D(\blk00000003/sig000008b0 ), + .Q(\blk00000003/blk000005b5/sig00001362 ), + .Q15(\NLW_blk00000003/blk000005b5/blk000005d1_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk000005b5/blk000005d0 ( + .A0(\blk00000003/sig00000295 ), + .A1(\blk00000003/blk000005b5/sig00001360 ), + .A2(\blk00000003/blk000005b5/sig00001360 ), + .A3(\blk00000003/blk000005b5/sig00001360 ), + .CE(\blk00000003/blk000005b5/sig00001379 ), + .CLK(clk), + .D(\blk00000003/sig000008b1 ), + .Q(\blk00000003/blk000005b5/sig00001361 ), + .Q15(\NLW_blk00000003/blk000005b5/blk000005d0_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk000005b5/blk000005cf ( + .A0(\blk00000003/sig00000295 ), + .A1(\blk00000003/blk000005b5/sig00001360 ), + .A2(\blk00000003/blk000005b5/sig00001360 ), + .A3(\blk00000003/blk000005b5/sig00001360 ), + .CE(\blk00000003/blk000005b5/sig00001379 ), + .CLK(clk), + .D(\blk00000003/sig000008af ), + .Q(\blk00000003/blk000005b5/sig00001363 ), + .Q15(\NLW_blk00000003/blk000005b5/blk000005cf_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000005b5/blk000005ce ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk000005b5/sig00001378 ), + .Q(\blk00000003/sig00000331 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000005b5/blk000005cd ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk000005b5/sig00001377 ), + .Q(\blk00000003/sig00000332 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000005b5/blk000005cc ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk000005b5/sig00001376 ), + .Q(\blk00000003/sig00000333 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000005b5/blk000005cb ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk000005b5/sig00001375 ), + .Q(\blk00000003/sig00000334 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000005b5/blk000005ca ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk000005b5/sig00001374 ), + .Q(\blk00000003/sig00000335 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000005b5/blk000005c9 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk000005b5/sig00001373 ), + .Q(\blk00000003/sig00000336 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000005b5/blk000005c8 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk000005b5/sig00001372 ), + .Q(\blk00000003/sig00000337 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000005b5/blk000005c7 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk000005b5/sig00001371 ), + .Q(\blk00000003/sig00000338 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000005b5/blk000005c6 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk000005b5/sig00001370 ), + .Q(\blk00000003/sig00000339 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000005b5/blk000005c5 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk000005b5/sig0000136f ), + .Q(\blk00000003/sig0000033a ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000005b5/blk000005c4 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk000005b5/sig0000136e ), + .Q(\blk00000003/sig0000033b ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000005b5/blk000005c3 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk000005b5/sig0000136d ), + .Q(\blk00000003/sig0000033c ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000005b5/blk000005c2 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk000005b5/sig0000136c ), + .Q(\blk00000003/sig0000033d ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000005b5/blk000005c1 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk000005b5/sig0000136b ), + .Q(\blk00000003/sig0000033e ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000005b5/blk000005c0 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk000005b5/sig0000136a ), + .Q(\blk00000003/sig0000033f ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000005b5/blk000005bf ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk000005b5/sig00001369 ), + .Q(\blk00000003/sig00000340 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000005b5/blk000005be ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk000005b5/sig00001368 ), + .Q(\blk00000003/sig00000341 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000005b5/blk000005bd ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk000005b5/sig00001367 ), + .Q(\blk00000003/sig00000342 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000005b5/blk000005bc ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk000005b5/sig00001366 ), + .Q(\blk00000003/sig00000343 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000005b5/blk000005bb ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk000005b5/sig00001365 ), + .Q(\blk00000003/sig00000344 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000005b5/blk000005ba ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk000005b5/sig00001364 ), + .Q(\blk00000003/sig00000345 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000005b5/blk000005b9 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk000005b5/sig00001363 ), + .Q(\blk00000003/sig00000346 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000005b5/blk000005b8 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk000005b5/sig00001362 ), + .Q(\blk00000003/sig00000347 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000005b5/blk000005b7 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk000005b5/sig00001361 ), + .Q(\blk00000003/sig00000348 ) + ); + GND \blk00000003/blk000005b5/blk000005b6 ( + .G(\blk00000003/blk000005b5/sig00001360 ) + ); + LUT2 #( + .INIT ( 4'h8 )) + \blk00000003/blk000005e8/blk00000620 ( + .I0(ce), + .I1(\blk00000003/sig00000237 ), + .O(\blk00000003/blk000005e8/sig000013dc ) + ); + RAM32X1D #( + .INIT ( 32'h00000001 )) + \blk00000003/blk000005e8/blk0000061f ( + .A0(\blk00000003/sig0000025f ), + .A1(\blk00000003/sig00000262 ), + .A2(\blk00000003/blk000005e8/sig000013b7 ), + .A3(\blk00000003/blk000005e8/sig000013b7 ), + .A4(\blk00000003/blk000005e8/sig000013b7 ), + .D(\blk00000003/sig000008b2 ), + .DPRA0(\blk00000003/sig000002a0 ), + .DPRA1(\blk00000003/sig000002a6 ), + .DPRA2(\blk00000003/blk000005e8/sig000013b7 ), + .DPRA3(\blk00000003/blk000005e8/sig000013b7 ), + .DPRA4(\blk00000003/blk000005e8/sig000013b7 ), + .WCLK(clk), + .WE(\blk00000003/blk000005e8/sig000013dc ), + .SPO(\blk00000003/blk000005e8/sig000013c9 ), + .DPO(\blk00000003/blk000005e8/sig000013db ) + ); + RAM32X1D #( + .INIT ( 32'h00000001 )) + \blk00000003/blk000005e8/blk0000061e ( + .A0(\blk00000003/sig0000025f ), + .A1(\blk00000003/sig00000262 ), + .A2(\blk00000003/blk000005e8/sig000013b7 ), + .A3(\blk00000003/blk000005e8/sig000013b7 ), + .A4(\blk00000003/blk000005e8/sig000013b7 ), + .D(\blk00000003/sig000008b3 ), + .DPRA0(\blk00000003/sig000002a0 ), + .DPRA1(\blk00000003/sig000002a6 ), + .DPRA2(\blk00000003/blk000005e8/sig000013b7 ), + .DPRA3(\blk00000003/blk000005e8/sig000013b7 ), + .DPRA4(\blk00000003/blk000005e8/sig000013b7 ), + .WCLK(clk), + .WE(\blk00000003/blk000005e8/sig000013dc ), + .SPO(\blk00000003/blk000005e8/sig000013c8 ), + .DPO(\blk00000003/blk000005e8/sig000013da ) + ); + RAM32X1D #( + .INIT ( 32'h00000001 )) + \blk00000003/blk000005e8/blk0000061d ( + .A0(\blk00000003/sig0000025f ), + .A1(\blk00000003/sig00000262 ), + .A2(\blk00000003/blk000005e8/sig000013b7 ), + .A3(\blk00000003/blk000005e8/sig000013b7 ), + .A4(\blk00000003/blk000005e8/sig000013b7 ), + .D(\blk00000003/sig000008b4 ), + .DPRA0(\blk00000003/sig000002a0 ), + .DPRA1(\blk00000003/sig000002a6 ), + .DPRA2(\blk00000003/blk000005e8/sig000013b7 ), + .DPRA3(\blk00000003/blk000005e8/sig000013b7 ), + .DPRA4(\blk00000003/blk000005e8/sig000013b7 ), + .WCLK(clk), + .WE(\blk00000003/blk000005e8/sig000013dc ), + .SPO(\blk00000003/blk000005e8/sig000013c7 ), + .DPO(\blk00000003/blk000005e8/sig000013d9 ) + ); + RAM32X1D #( + .INIT ( 32'h00000001 )) + \blk00000003/blk000005e8/blk0000061c ( + .A0(\blk00000003/sig0000025f ), + .A1(\blk00000003/sig00000262 ), + .A2(\blk00000003/blk000005e8/sig000013b7 ), + .A3(\blk00000003/blk000005e8/sig000013b7 ), + .A4(\blk00000003/blk000005e8/sig000013b7 ), + .D(\blk00000003/sig000008b5 ), + .DPRA0(\blk00000003/sig000002a0 ), + .DPRA1(\blk00000003/sig000002a6 ), + .DPRA2(\blk00000003/blk000005e8/sig000013b7 ), + .DPRA3(\blk00000003/blk000005e8/sig000013b7 ), + .DPRA4(\blk00000003/blk000005e8/sig000013b7 ), + .WCLK(clk), + .WE(\blk00000003/blk000005e8/sig000013dc ), + .SPO(\blk00000003/blk000005e8/sig000013c6 ), + .DPO(\blk00000003/blk000005e8/sig000013d8 ) + ); + RAM32X1D #( + .INIT ( 32'h00000001 )) + \blk00000003/blk000005e8/blk0000061b ( + .A0(\blk00000003/sig0000025f ), + .A1(\blk00000003/sig00000262 ), + .A2(\blk00000003/blk000005e8/sig000013b7 ), + .A3(\blk00000003/blk000005e8/sig000013b7 ), + .A4(\blk00000003/blk000005e8/sig000013b7 ), + .D(\blk00000003/sig000008b6 ), + .DPRA0(\blk00000003/sig000002a0 ), + .DPRA1(\blk00000003/sig000002a6 ), + .DPRA2(\blk00000003/blk000005e8/sig000013b7 ), + .DPRA3(\blk00000003/blk000005e8/sig000013b7 ), + .DPRA4(\blk00000003/blk000005e8/sig000013b7 ), + .WCLK(clk), + .WE(\blk00000003/blk000005e8/sig000013dc ), + .SPO(\blk00000003/blk000005e8/sig000013c5 ), + .DPO(\blk00000003/blk000005e8/sig000013d7 ) + ); + RAM32X1D #( + .INIT ( 32'h00000001 )) + \blk00000003/blk000005e8/blk0000061a ( + .A0(\blk00000003/sig0000025f ), + .A1(\blk00000003/sig00000262 ), + .A2(\blk00000003/blk000005e8/sig000013b7 ), + .A3(\blk00000003/blk000005e8/sig000013b7 ), + .A4(\blk00000003/blk000005e8/sig000013b7 ), + .D(\blk00000003/sig000008b7 ), + .DPRA0(\blk00000003/sig000002a0 ), + .DPRA1(\blk00000003/sig000002a6 ), + .DPRA2(\blk00000003/blk000005e8/sig000013b7 ), + .DPRA3(\blk00000003/blk000005e8/sig000013b7 ), + .DPRA4(\blk00000003/blk000005e8/sig000013b7 ), + .WCLK(clk), + .WE(\blk00000003/blk000005e8/sig000013dc ), + .SPO(\blk00000003/blk000005e8/sig000013c4 ), + .DPO(\blk00000003/blk000005e8/sig000013d6 ) + ); + RAM32X1D #( + .INIT ( 32'h00000001 )) + \blk00000003/blk000005e8/blk00000619 ( + .A0(\blk00000003/sig0000025f ), + .A1(\blk00000003/sig00000262 ), + .A2(\blk00000003/blk000005e8/sig000013b7 ), + .A3(\blk00000003/blk000005e8/sig000013b7 ), + .A4(\blk00000003/blk000005e8/sig000013b7 ), + .D(\blk00000003/sig000008b9 ), + .DPRA0(\blk00000003/sig000002a0 ), + .DPRA1(\blk00000003/sig000002a6 ), + .DPRA2(\blk00000003/blk000005e8/sig000013b7 ), + .DPRA3(\blk00000003/blk000005e8/sig000013b7 ), + .DPRA4(\blk00000003/blk000005e8/sig000013b7 ), + .WCLK(clk), + .WE(\blk00000003/blk000005e8/sig000013dc ), + .SPO(\blk00000003/blk000005e8/sig000013c2 ), + .DPO(\blk00000003/blk000005e8/sig000013d4 ) + ); + RAM32X1D #( + .INIT ( 32'h00000001 )) + \blk00000003/blk000005e8/blk00000618 ( + .A0(\blk00000003/sig0000025f ), + .A1(\blk00000003/sig00000262 ), + .A2(\blk00000003/blk000005e8/sig000013b7 ), + .A3(\blk00000003/blk000005e8/sig000013b7 ), + .A4(\blk00000003/blk000005e8/sig000013b7 ), + .D(\blk00000003/sig000008ba ), + .DPRA0(\blk00000003/sig000002a0 ), + .DPRA1(\blk00000003/sig000002a6 ), + .DPRA2(\blk00000003/blk000005e8/sig000013b7 ), + .DPRA3(\blk00000003/blk000005e8/sig000013b7 ), + .DPRA4(\blk00000003/blk000005e8/sig000013b7 ), + .WCLK(clk), + .WE(\blk00000003/blk000005e8/sig000013dc ), + .SPO(\blk00000003/blk000005e8/sig000013c1 ), + .DPO(\blk00000003/blk000005e8/sig000013d3 ) + ); + RAM32X1D #( + .INIT ( 32'h00000001 )) + \blk00000003/blk000005e8/blk00000617 ( + .A0(\blk00000003/sig0000025f ), + .A1(\blk00000003/sig00000262 ), + .A2(\blk00000003/blk000005e8/sig000013b7 ), + .A3(\blk00000003/blk000005e8/sig000013b7 ), + .A4(\blk00000003/blk000005e8/sig000013b7 ), + .D(\blk00000003/sig000008b8 ), + .DPRA0(\blk00000003/sig000002a0 ), + .DPRA1(\blk00000003/sig000002a6 ), + .DPRA2(\blk00000003/blk000005e8/sig000013b7 ), + .DPRA3(\blk00000003/blk000005e8/sig000013b7 ), + .DPRA4(\blk00000003/blk000005e8/sig000013b7 ), + .WCLK(clk), + .WE(\blk00000003/blk000005e8/sig000013dc ), + .SPO(\blk00000003/blk000005e8/sig000013c3 ), + .DPO(\blk00000003/blk000005e8/sig000013d5 ) + ); + RAM32X1D #( + .INIT ( 32'h00000001 )) + \blk00000003/blk000005e8/blk00000616 ( + .A0(\blk00000003/sig0000025f ), + .A1(\blk00000003/sig00000262 ), + .A2(\blk00000003/blk000005e8/sig000013b7 ), + .A3(\blk00000003/blk000005e8/sig000013b7 ), + .A4(\blk00000003/blk000005e8/sig000013b7 ), + .D(\blk00000003/sig000008bb ), + .DPRA0(\blk00000003/sig000002a0 ), + .DPRA1(\blk00000003/sig000002a6 ), + .DPRA2(\blk00000003/blk000005e8/sig000013b7 ), + .DPRA3(\blk00000003/blk000005e8/sig000013b7 ), + .DPRA4(\blk00000003/blk000005e8/sig000013b7 ), + .WCLK(clk), + .WE(\blk00000003/blk000005e8/sig000013dc ), + .SPO(\blk00000003/blk000005e8/sig000013c0 ), + .DPO(\blk00000003/blk000005e8/sig000013d2 ) + ); + RAM32X1D #( + .INIT ( 32'h00000003 )) + \blk00000003/blk000005e8/blk00000615 ( + .A0(\blk00000003/sig0000025f ), + .A1(\blk00000003/sig00000262 ), + .A2(\blk00000003/blk000005e8/sig000013b7 ), + .A3(\blk00000003/blk000005e8/sig000013b7 ), + .A4(\blk00000003/blk000005e8/sig000013b7 ), + .D(\blk00000003/sig000008bc ), + .DPRA0(\blk00000003/sig000002a0 ), + .DPRA1(\blk00000003/sig000002a6 ), + .DPRA2(\blk00000003/blk000005e8/sig000013b7 ), + .DPRA3(\blk00000003/blk000005e8/sig000013b7 ), + .DPRA4(\blk00000003/blk000005e8/sig000013b7 ), + .WCLK(clk), + .WE(\blk00000003/blk000005e8/sig000013dc ), + .SPO(\blk00000003/blk000005e8/sig000013bf ), + .DPO(\blk00000003/blk000005e8/sig000013d1 ) + ); + RAM32X1D #( + .INIT ( 32'h00000003 )) + \blk00000003/blk000005e8/blk00000614 ( + .A0(\blk00000003/sig0000025f ), + .A1(\blk00000003/sig00000262 ), + .A2(\blk00000003/blk000005e8/sig000013b7 ), + .A3(\blk00000003/blk000005e8/sig000013b7 ), + .A4(\blk00000003/blk000005e8/sig000013b7 ), + .D(\blk00000003/sig000008bd ), + .DPRA0(\blk00000003/sig000002a0 ), + .DPRA1(\blk00000003/sig000002a6 ), + .DPRA2(\blk00000003/blk000005e8/sig000013b7 ), + .DPRA3(\blk00000003/blk000005e8/sig000013b7 ), + .DPRA4(\blk00000003/blk000005e8/sig000013b7 ), + .WCLK(clk), + .WE(\blk00000003/blk000005e8/sig000013dc ), + .SPO(\blk00000003/blk000005e8/sig000013be ), + .DPO(\blk00000003/blk000005e8/sig000013d0 ) + ); + RAM32X1D #( + .INIT ( 32'h00000000 )) + \blk00000003/blk000005e8/blk00000613 ( + .A0(\blk00000003/sig0000025f ), + .A1(\blk00000003/sig00000262 ), + .A2(\blk00000003/blk000005e8/sig000013b7 ), + .A3(\blk00000003/blk000005e8/sig000013b7 ), + .A4(\blk00000003/blk000005e8/sig000013b7 ), + .D(\blk00000003/sig000008be ), + .DPRA0(\blk00000003/sig000002a0 ), + .DPRA1(\blk00000003/sig000002a6 ), + .DPRA2(\blk00000003/blk000005e8/sig000013b7 ), + .DPRA3(\blk00000003/blk000005e8/sig000013b7 ), + .DPRA4(\blk00000003/blk000005e8/sig000013b7 ), + .WCLK(clk), + .WE(\blk00000003/blk000005e8/sig000013dc ), + .SPO(\blk00000003/blk000005e8/sig000013bd ), + .DPO(\blk00000003/blk000005e8/sig000013cf ) + ); + RAM32X1D #( + .INIT ( 32'h00000000 )) + \blk00000003/blk000005e8/blk00000612 ( + .A0(\blk00000003/sig0000025f ), + .A1(\blk00000003/sig00000262 ), + .A2(\blk00000003/blk000005e8/sig000013b7 ), + .A3(\blk00000003/blk000005e8/sig000013b7 ), + .A4(\blk00000003/blk000005e8/sig000013b7 ), + .D(\blk00000003/sig000008bf ), + .DPRA0(\blk00000003/sig000002a0 ), + .DPRA1(\blk00000003/sig000002a6 ), + .DPRA2(\blk00000003/blk000005e8/sig000013b7 ), + .DPRA3(\blk00000003/blk000005e8/sig000013b7 ), + .DPRA4(\blk00000003/blk000005e8/sig000013b7 ), + .WCLK(clk), + .WE(\blk00000003/blk000005e8/sig000013dc ), + .SPO(\blk00000003/blk000005e8/sig000013bc ), + .DPO(\blk00000003/blk000005e8/sig000013ce ) + ); + RAM32X1D #( + .INIT ( 32'h00000000 )) + \blk00000003/blk000005e8/blk00000611 ( + .A0(\blk00000003/sig0000025f ), + .A1(\blk00000003/sig00000262 ), + .A2(\blk00000003/blk000005e8/sig000013b7 ), + .A3(\blk00000003/blk000005e8/sig000013b7 ), + .A4(\blk00000003/blk000005e8/sig000013b7 ), + .D(\blk00000003/sig000008c0 ), + .DPRA0(\blk00000003/sig000002a0 ), + .DPRA1(\blk00000003/sig000002a6 ), + .DPRA2(\blk00000003/blk000005e8/sig000013b7 ), + .DPRA3(\blk00000003/blk000005e8/sig000013b7 ), + .DPRA4(\blk00000003/blk000005e8/sig000013b7 ), + .WCLK(clk), + .WE(\blk00000003/blk000005e8/sig000013dc ), + .SPO(\blk00000003/blk000005e8/sig000013bb ), + .DPO(\blk00000003/blk000005e8/sig000013cd ) + ); + RAM32X1D #( + .INIT ( 32'h00000003 )) + \blk00000003/blk000005e8/blk00000610 ( + .A0(\blk00000003/sig0000025f ), + .A1(\blk00000003/sig00000262 ), + .A2(\blk00000003/blk000005e8/sig000013b7 ), + .A3(\blk00000003/blk000005e8/sig000013b7 ), + .A4(\blk00000003/blk000005e8/sig000013b7 ), + .D(\blk00000003/sig000008c2 ), + .DPRA0(\blk00000003/sig000002a0 ), + .DPRA1(\blk00000003/sig000002a6 ), + .DPRA2(\blk00000003/blk000005e8/sig000013b7 ), + .DPRA3(\blk00000003/blk000005e8/sig000013b7 ), + .DPRA4(\blk00000003/blk000005e8/sig000013b7 ), + .WCLK(clk), + .WE(\blk00000003/blk000005e8/sig000013dc ), + .SPO(\blk00000003/blk000005e8/sig000013b9 ), + .DPO(\blk00000003/blk000005e8/sig000013cb ) + ); + RAM32X1D #( + .INIT ( 32'h00000000 )) + \blk00000003/blk000005e8/blk0000060f ( + .A0(\blk00000003/sig0000025f ), + .A1(\blk00000003/sig00000262 ), + .A2(\blk00000003/blk000005e8/sig000013b7 ), + .A3(\blk00000003/blk000005e8/sig000013b7 ), + .A4(\blk00000003/blk000005e8/sig000013b7 ), + .D(\blk00000003/sig000008c3 ), + .DPRA0(\blk00000003/sig000002a0 ), + .DPRA1(\blk00000003/sig000002a6 ), + .DPRA2(\blk00000003/blk000005e8/sig000013b7 ), + .DPRA3(\blk00000003/blk000005e8/sig000013b7 ), + .DPRA4(\blk00000003/blk000005e8/sig000013b7 ), + .WCLK(clk), + .WE(\blk00000003/blk000005e8/sig000013dc ), + .SPO(\blk00000003/blk000005e8/sig000013b8 ), + .DPO(\blk00000003/blk000005e8/sig000013ca ) + ); + RAM32X1D #( + .INIT ( 32'h00000000 )) + \blk00000003/blk000005e8/blk0000060e ( + .A0(\blk00000003/sig0000025f ), + .A1(\blk00000003/sig00000262 ), + .A2(\blk00000003/blk000005e8/sig000013b7 ), + .A3(\blk00000003/blk000005e8/sig000013b7 ), + .A4(\blk00000003/blk000005e8/sig000013b7 ), + .D(\blk00000003/sig000008c1 ), + .DPRA0(\blk00000003/sig000002a0 ), + .DPRA1(\blk00000003/sig000002a6 ), + .DPRA2(\blk00000003/blk000005e8/sig000013b7 ), + .DPRA3(\blk00000003/blk000005e8/sig000013b7 ), + .DPRA4(\blk00000003/blk000005e8/sig000013b7 ), + .WCLK(clk), + .WE(\blk00000003/blk000005e8/sig000013dc ), + .SPO(\blk00000003/blk000005e8/sig000013ba ), + .DPO(\blk00000003/blk000005e8/sig000013cc ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000005e8/blk0000060d ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk000005e8/sig000013db ), + .Q(\blk00000003/sig000002a7 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000005e8/blk0000060c ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk000005e8/sig000013da ), + .Q(\blk00000003/sig000002a8 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000005e8/blk0000060b ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk000005e8/sig000013d9 ), + .Q(\blk00000003/sig000002a9 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000005e8/blk0000060a ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk000005e8/sig000013d8 ), + .Q(\blk00000003/sig000002aa ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000005e8/blk00000609 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk000005e8/sig000013d7 ), + .Q(\blk00000003/sig000002ab ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000005e8/blk00000608 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk000005e8/sig000013d6 ), + .Q(\blk00000003/sig000002ac ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000005e8/blk00000607 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk000005e8/sig000013d5 ), + .Q(\blk00000003/sig000002ad ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000005e8/blk00000606 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk000005e8/sig000013d4 ), + .Q(\blk00000003/sig000002ae ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000005e8/blk00000605 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk000005e8/sig000013d3 ), + .Q(\blk00000003/sig000002af ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000005e8/blk00000604 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk000005e8/sig000013d2 ), + .Q(\blk00000003/sig000002b0 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000005e8/blk00000603 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk000005e8/sig000013d1 ), + .Q(\blk00000003/sig000002b1 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000005e8/blk00000602 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk000005e8/sig000013d0 ), + .Q(\blk00000003/sig000002b2 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000005e8/blk00000601 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk000005e8/sig000013cf ), + .Q(\blk00000003/sig000002b3 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000005e8/blk00000600 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk000005e8/sig000013ce ), + .Q(\blk00000003/sig000002b4 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000005e8/blk000005ff ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk000005e8/sig000013cd ), + .Q(\blk00000003/sig000002b5 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000005e8/blk000005fe ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk000005e8/sig000013cc ), + .Q(\blk00000003/sig000002b6 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000005e8/blk000005fd ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk000005e8/sig000013cb ), + .Q(\blk00000003/sig000002b7 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000005e8/blk000005fc ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk000005e8/sig000013ca ), + .Q(\blk00000003/sig000002b8 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000005e8/blk000005fb ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk000005e8/sig000013c9 ), + .Q(\blk00000003/sig000008c4 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000005e8/blk000005fa ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk000005e8/sig000013c8 ), + .Q(\blk00000003/sig000008c5 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000005e8/blk000005f9 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk000005e8/sig000013c7 ), + .Q(\blk00000003/sig000008c6 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000005e8/blk000005f8 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk000005e8/sig000013c6 ), + .Q(\blk00000003/sig000008c7 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000005e8/blk000005f7 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk000005e8/sig000013c5 ), + .Q(\blk00000003/sig000008c8 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000005e8/blk000005f6 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk000005e8/sig000013c4 ), + .Q(\blk00000003/sig000008c9 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000005e8/blk000005f5 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk000005e8/sig000013c3 ), + .Q(\blk00000003/sig000008ca ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000005e8/blk000005f4 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk000005e8/sig000013c2 ), + .Q(\blk00000003/sig000008cb ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000005e8/blk000005f3 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk000005e8/sig000013c1 ), + .Q(\blk00000003/sig000008cc ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000005e8/blk000005f2 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk000005e8/sig000013c0 ), + .Q(\blk00000003/sig000008cd ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000005e8/blk000005f1 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk000005e8/sig000013bf ), + .Q(\blk00000003/sig000008ce ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000005e8/blk000005f0 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk000005e8/sig000013be ), + .Q(\blk00000003/sig000008cf ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000005e8/blk000005ef ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk000005e8/sig000013bd ), + .Q(\blk00000003/sig000008d0 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000005e8/blk000005ee ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk000005e8/sig000013bc ), + .Q(\blk00000003/sig000008d1 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000005e8/blk000005ed ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk000005e8/sig000013bb ), + .Q(\blk00000003/sig000008d2 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000005e8/blk000005ec ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk000005e8/sig000013ba ), + .Q(\blk00000003/sig000008d3 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000005e8/blk000005eb ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk000005e8/sig000013b9 ), + .Q(\blk00000003/sig000008d4 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000005e8/blk000005ea ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk000005e8/sig000013b8 ), + .Q(\blk00000003/sig000008d5 ) + ); + GND \blk00000003/blk000005e8/blk000005e9 ( + .G(\blk00000003/blk000005e8/sig000013b7 ) + ); + LUT2 #( + .INIT ( 4'h8 )) + \blk00000003/blk00000621/blk00000659 ( + .I0(ce), + .I1(\blk00000003/sig0000073d ), + .O(\blk00000003/blk00000621/sig0000143f ) + ); + RAM32X1D #( + .INIT ( 32'h00000001 )) + \blk00000003/blk00000621/blk00000658 ( + .A0(\blk00000003/sig00000733 ), + .A1(\blk00000003/sig00000734 ), + .A2(\blk00000003/blk00000621/sig0000141a ), + .A3(\blk00000003/blk00000621/sig0000141a ), + .A4(\blk00000003/blk00000621/sig0000141a ), + .D(\blk00000003/sig000008c4 ), + .DPRA0(\blk00000003/sig0000075c ), + .DPRA1(\blk00000003/sig0000075b ), + .DPRA2(\blk00000003/blk00000621/sig0000141a ), + .DPRA3(\blk00000003/blk00000621/sig0000141a ), + .DPRA4(\blk00000003/blk00000621/sig0000141a ), + .WCLK(clk), + .WE(\blk00000003/blk00000621/sig0000143f ), + .SPO(\blk00000003/blk00000621/sig0000142c ), + .DPO(\blk00000003/blk00000621/sig0000143e ) + ); + RAM32X1D #( + .INIT ( 32'h00000001 )) + \blk00000003/blk00000621/blk00000657 ( + .A0(\blk00000003/sig00000733 ), + .A1(\blk00000003/sig00000734 ), + .A2(\blk00000003/blk00000621/sig0000141a ), + .A3(\blk00000003/blk00000621/sig0000141a ), + .A4(\blk00000003/blk00000621/sig0000141a ), + .D(\blk00000003/sig000008c5 ), + .DPRA0(\blk00000003/sig0000075c ), + .DPRA1(\blk00000003/sig0000075b ), + .DPRA2(\blk00000003/blk00000621/sig0000141a ), + .DPRA3(\blk00000003/blk00000621/sig0000141a ), + .DPRA4(\blk00000003/blk00000621/sig0000141a ), + .WCLK(clk), + .WE(\blk00000003/blk00000621/sig0000143f ), + .SPO(\blk00000003/blk00000621/sig0000142b ), + .DPO(\blk00000003/blk00000621/sig0000143d ) + ); + RAM32X1D #( + .INIT ( 32'h00000001 )) + \blk00000003/blk00000621/blk00000656 ( + .A0(\blk00000003/sig00000733 ), + .A1(\blk00000003/sig00000734 ), + .A2(\blk00000003/blk00000621/sig0000141a ), + .A3(\blk00000003/blk00000621/sig0000141a ), + .A4(\blk00000003/blk00000621/sig0000141a ), + .D(\blk00000003/sig000008c6 ), + .DPRA0(\blk00000003/sig0000075c ), + .DPRA1(\blk00000003/sig0000075b ), + .DPRA2(\blk00000003/blk00000621/sig0000141a ), + .DPRA3(\blk00000003/blk00000621/sig0000141a ), + .DPRA4(\blk00000003/blk00000621/sig0000141a ), + .WCLK(clk), + .WE(\blk00000003/blk00000621/sig0000143f ), + .SPO(\blk00000003/blk00000621/sig0000142a ), + .DPO(\blk00000003/blk00000621/sig0000143c ) + ); + RAM32X1D #( + .INIT ( 32'h00000001 )) + \blk00000003/blk00000621/blk00000655 ( + .A0(\blk00000003/sig00000733 ), + .A1(\blk00000003/sig00000734 ), + .A2(\blk00000003/blk00000621/sig0000141a ), + .A3(\blk00000003/blk00000621/sig0000141a ), + .A4(\blk00000003/blk00000621/sig0000141a ), + .D(\blk00000003/sig000008c7 ), + .DPRA0(\blk00000003/sig0000075c ), + .DPRA1(\blk00000003/sig0000075b ), + .DPRA2(\blk00000003/blk00000621/sig0000141a ), + .DPRA3(\blk00000003/blk00000621/sig0000141a ), + .DPRA4(\blk00000003/blk00000621/sig0000141a ), + .WCLK(clk), + .WE(\blk00000003/blk00000621/sig0000143f ), + .SPO(\blk00000003/blk00000621/sig00001429 ), + .DPO(\blk00000003/blk00000621/sig0000143b ) + ); + RAM32X1D #( + .INIT ( 32'h00000001 )) + \blk00000003/blk00000621/blk00000654 ( + .A0(\blk00000003/sig00000733 ), + .A1(\blk00000003/sig00000734 ), + .A2(\blk00000003/blk00000621/sig0000141a ), + .A3(\blk00000003/blk00000621/sig0000141a ), + .A4(\blk00000003/blk00000621/sig0000141a ), + .D(\blk00000003/sig000008c8 ), + .DPRA0(\blk00000003/sig0000075c ), + .DPRA1(\blk00000003/sig0000075b ), + .DPRA2(\blk00000003/blk00000621/sig0000141a ), + .DPRA3(\blk00000003/blk00000621/sig0000141a ), + .DPRA4(\blk00000003/blk00000621/sig0000141a ), + .WCLK(clk), + .WE(\blk00000003/blk00000621/sig0000143f ), + .SPO(\blk00000003/blk00000621/sig00001428 ), + .DPO(\blk00000003/blk00000621/sig0000143a ) + ); + RAM32X1D #( + .INIT ( 32'h00000001 )) + \blk00000003/blk00000621/blk00000653 ( + .A0(\blk00000003/sig00000733 ), + .A1(\blk00000003/sig00000734 ), + .A2(\blk00000003/blk00000621/sig0000141a ), + .A3(\blk00000003/blk00000621/sig0000141a ), + .A4(\blk00000003/blk00000621/sig0000141a ), + .D(\blk00000003/sig000008c9 ), + .DPRA0(\blk00000003/sig0000075c ), + .DPRA1(\blk00000003/sig0000075b ), + .DPRA2(\blk00000003/blk00000621/sig0000141a ), + .DPRA3(\blk00000003/blk00000621/sig0000141a ), + .DPRA4(\blk00000003/blk00000621/sig0000141a ), + .WCLK(clk), + .WE(\blk00000003/blk00000621/sig0000143f ), + .SPO(\blk00000003/blk00000621/sig00001427 ), + .DPO(\blk00000003/blk00000621/sig00001439 ) + ); + RAM32X1D #( + .INIT ( 32'h00000001 )) + \blk00000003/blk00000621/blk00000652 ( + .A0(\blk00000003/sig00000733 ), + .A1(\blk00000003/sig00000734 ), + .A2(\blk00000003/blk00000621/sig0000141a ), + .A3(\blk00000003/blk00000621/sig0000141a ), + .A4(\blk00000003/blk00000621/sig0000141a ), + .D(\blk00000003/sig000008cb ), + .DPRA0(\blk00000003/sig0000075c ), + .DPRA1(\blk00000003/sig0000075b ), + .DPRA2(\blk00000003/blk00000621/sig0000141a ), + .DPRA3(\blk00000003/blk00000621/sig0000141a ), + .DPRA4(\blk00000003/blk00000621/sig0000141a ), + .WCLK(clk), + .WE(\blk00000003/blk00000621/sig0000143f ), + .SPO(\blk00000003/blk00000621/sig00001425 ), + .DPO(\blk00000003/blk00000621/sig00001437 ) + ); + RAM32X1D #( + .INIT ( 32'h00000003 )) + \blk00000003/blk00000621/blk00000651 ( + .A0(\blk00000003/sig00000733 ), + .A1(\blk00000003/sig00000734 ), + .A2(\blk00000003/blk00000621/sig0000141a ), + .A3(\blk00000003/blk00000621/sig0000141a ), + .A4(\blk00000003/blk00000621/sig0000141a ), + .D(\blk00000003/sig000008cc ), + .DPRA0(\blk00000003/sig0000075c ), + .DPRA1(\blk00000003/sig0000075b ), + .DPRA2(\blk00000003/blk00000621/sig0000141a ), + .DPRA3(\blk00000003/blk00000621/sig0000141a ), + .DPRA4(\blk00000003/blk00000621/sig0000141a ), + .WCLK(clk), + .WE(\blk00000003/blk00000621/sig0000143f ), + .SPO(\blk00000003/blk00000621/sig00001424 ), + .DPO(\blk00000003/blk00000621/sig00001436 ) + ); + RAM32X1D #( + .INIT ( 32'h00000001 )) + \blk00000003/blk00000621/blk00000650 ( + .A0(\blk00000003/sig00000733 ), + .A1(\blk00000003/sig00000734 ), + .A2(\blk00000003/blk00000621/sig0000141a ), + .A3(\blk00000003/blk00000621/sig0000141a ), + .A4(\blk00000003/blk00000621/sig0000141a ), + .D(\blk00000003/sig000008ca ), + .DPRA0(\blk00000003/sig0000075c ), + .DPRA1(\blk00000003/sig0000075b ), + .DPRA2(\blk00000003/blk00000621/sig0000141a ), + .DPRA3(\blk00000003/blk00000621/sig0000141a ), + .DPRA4(\blk00000003/blk00000621/sig0000141a ), + .WCLK(clk), + .WE(\blk00000003/blk00000621/sig0000143f ), + .SPO(\blk00000003/blk00000621/sig00001426 ), + .DPO(\blk00000003/blk00000621/sig00001438 ) + ); + RAM32X1D #( + .INIT ( 32'h00000002 )) + \blk00000003/blk00000621/blk0000064f ( + .A0(\blk00000003/sig00000733 ), + .A1(\blk00000003/sig00000734 ), + .A2(\blk00000003/blk00000621/sig0000141a ), + .A3(\blk00000003/blk00000621/sig0000141a ), + .A4(\blk00000003/blk00000621/sig0000141a ), + .D(\blk00000003/sig000008cd ), + .DPRA0(\blk00000003/sig0000075c ), + .DPRA1(\blk00000003/sig0000075b ), + .DPRA2(\blk00000003/blk00000621/sig0000141a ), + .DPRA3(\blk00000003/blk00000621/sig0000141a ), + .DPRA4(\blk00000003/blk00000621/sig0000141a ), + .WCLK(clk), + .WE(\blk00000003/blk00000621/sig0000143f ), + .SPO(\blk00000003/blk00000621/sig00001423 ), + .DPO(\blk00000003/blk00000621/sig00001435 ) + ); + RAM32X1D #( + .INIT ( 32'h00000000 )) + \blk00000003/blk00000621/blk0000064e ( + .A0(\blk00000003/sig00000733 ), + .A1(\blk00000003/sig00000734 ), + .A2(\blk00000003/blk00000621/sig0000141a ), + .A3(\blk00000003/blk00000621/sig0000141a ), + .A4(\blk00000003/blk00000621/sig0000141a ), + .D(\blk00000003/sig000008ce ), + .DPRA0(\blk00000003/sig0000075c ), + .DPRA1(\blk00000003/sig0000075b ), + .DPRA2(\blk00000003/blk00000621/sig0000141a ), + .DPRA3(\blk00000003/blk00000621/sig0000141a ), + .DPRA4(\blk00000003/blk00000621/sig0000141a ), + .WCLK(clk), + .WE(\blk00000003/blk00000621/sig0000143f ), + .SPO(\blk00000003/blk00000621/sig00001422 ), + .DPO(\blk00000003/blk00000621/sig00001434 ) + ); + RAM32X1D #( + .INIT ( 32'h00000003 )) + \blk00000003/blk00000621/blk0000064d ( + .A0(\blk00000003/sig00000733 ), + .A1(\blk00000003/sig00000734 ), + .A2(\blk00000003/blk00000621/sig0000141a ), + .A3(\blk00000003/blk00000621/sig0000141a ), + .A4(\blk00000003/blk00000621/sig0000141a ), + .D(\blk00000003/sig000008cf ), + .DPRA0(\blk00000003/sig0000075c ), + .DPRA1(\blk00000003/sig0000075b ), + .DPRA2(\blk00000003/blk00000621/sig0000141a ), + .DPRA3(\blk00000003/blk00000621/sig0000141a ), + .DPRA4(\blk00000003/blk00000621/sig0000141a ), + .WCLK(clk), + .WE(\blk00000003/blk00000621/sig0000143f ), + .SPO(\blk00000003/blk00000621/sig00001421 ), + .DPO(\blk00000003/blk00000621/sig00001433 ) + ); + RAM32X1D #( + .INIT ( 32'h00000000 )) + \blk00000003/blk00000621/blk0000064c ( + .A0(\blk00000003/sig00000733 ), + .A1(\blk00000003/sig00000734 ), + .A2(\blk00000003/blk00000621/sig0000141a ), + .A3(\blk00000003/blk00000621/sig0000141a ), + .A4(\blk00000003/blk00000621/sig0000141a ), + .D(\blk00000003/sig000008d0 ), + .DPRA0(\blk00000003/sig0000075c ), + .DPRA1(\blk00000003/sig0000075b ), + .DPRA2(\blk00000003/blk00000621/sig0000141a ), + .DPRA3(\blk00000003/blk00000621/sig0000141a ), + .DPRA4(\blk00000003/blk00000621/sig0000141a ), + .WCLK(clk), + .WE(\blk00000003/blk00000621/sig0000143f ), + .SPO(\blk00000003/blk00000621/sig00001420 ), + .DPO(\blk00000003/blk00000621/sig00001432 ) + ); + RAM32X1D #( + .INIT ( 32'h00000002 )) + \blk00000003/blk00000621/blk0000064b ( + .A0(\blk00000003/sig00000733 ), + .A1(\blk00000003/sig00000734 ), + .A2(\blk00000003/blk00000621/sig0000141a ), + .A3(\blk00000003/blk00000621/sig0000141a ), + .A4(\blk00000003/blk00000621/sig0000141a ), + .D(\blk00000003/sig000008d1 ), + .DPRA0(\blk00000003/sig0000075c ), + .DPRA1(\blk00000003/sig0000075b ), + .DPRA2(\blk00000003/blk00000621/sig0000141a ), + .DPRA3(\blk00000003/blk00000621/sig0000141a ), + .DPRA4(\blk00000003/blk00000621/sig0000141a ), + .WCLK(clk), + .WE(\blk00000003/blk00000621/sig0000143f ), + .SPO(\blk00000003/blk00000621/sig0000141f ), + .DPO(\blk00000003/blk00000621/sig00001431 ) + ); + RAM32X1D #( + .INIT ( 32'h00000001 )) + \blk00000003/blk00000621/blk0000064a ( + .A0(\blk00000003/sig00000733 ), + .A1(\blk00000003/sig00000734 ), + .A2(\blk00000003/blk00000621/sig0000141a ), + .A3(\blk00000003/blk00000621/sig0000141a ), + .A4(\blk00000003/blk00000621/sig0000141a ), + .D(\blk00000003/sig000008d2 ), + .DPRA0(\blk00000003/sig0000075c ), + .DPRA1(\blk00000003/sig0000075b ), + .DPRA2(\blk00000003/blk00000621/sig0000141a ), + .DPRA3(\blk00000003/blk00000621/sig0000141a ), + .DPRA4(\blk00000003/blk00000621/sig0000141a ), + .WCLK(clk), + .WE(\blk00000003/blk00000621/sig0000143f ), + .SPO(\blk00000003/blk00000621/sig0000141e ), + .DPO(\blk00000003/blk00000621/sig00001430 ) + ); + RAM32X1D #( + .INIT ( 32'h00000002 )) + \blk00000003/blk00000621/blk00000649 ( + .A0(\blk00000003/sig00000733 ), + .A1(\blk00000003/sig00000734 ), + .A2(\blk00000003/blk00000621/sig0000141a ), + .A3(\blk00000003/blk00000621/sig0000141a ), + .A4(\blk00000003/blk00000621/sig0000141a ), + .D(\blk00000003/sig000008d4 ), + .DPRA0(\blk00000003/sig0000075c ), + .DPRA1(\blk00000003/sig0000075b ), + .DPRA2(\blk00000003/blk00000621/sig0000141a ), + .DPRA3(\blk00000003/blk00000621/sig0000141a ), + .DPRA4(\blk00000003/blk00000621/sig0000141a ), + .WCLK(clk), + .WE(\blk00000003/blk00000621/sig0000143f ), + .SPO(\blk00000003/blk00000621/sig0000141c ), + .DPO(\blk00000003/blk00000621/sig0000142e ) + ); + RAM32X1D #( + .INIT ( 32'h00000002 )) + \blk00000003/blk00000621/blk00000648 ( + .A0(\blk00000003/sig00000733 ), + .A1(\blk00000003/sig00000734 ), + .A2(\blk00000003/blk00000621/sig0000141a ), + .A3(\blk00000003/blk00000621/sig0000141a ), + .A4(\blk00000003/blk00000621/sig0000141a ), + .D(\blk00000003/sig000008d5 ), + .DPRA0(\blk00000003/sig0000075c ), + .DPRA1(\blk00000003/sig0000075b ), + .DPRA2(\blk00000003/blk00000621/sig0000141a ), + .DPRA3(\blk00000003/blk00000621/sig0000141a ), + .DPRA4(\blk00000003/blk00000621/sig0000141a ), + .WCLK(clk), + .WE(\blk00000003/blk00000621/sig0000143f ), + .SPO(\blk00000003/blk00000621/sig0000141b ), + .DPO(\blk00000003/blk00000621/sig0000142d ) + ); + RAM32X1D #( + .INIT ( 32'h00000002 )) + \blk00000003/blk00000621/blk00000647 ( + .A0(\blk00000003/sig00000733 ), + .A1(\blk00000003/sig00000734 ), + .A2(\blk00000003/blk00000621/sig0000141a ), + .A3(\blk00000003/blk00000621/sig0000141a ), + .A4(\blk00000003/blk00000621/sig0000141a ), + .D(\blk00000003/sig000008d3 ), + .DPRA0(\blk00000003/sig0000075c ), + .DPRA1(\blk00000003/sig0000075b ), + .DPRA2(\blk00000003/blk00000621/sig0000141a ), + .DPRA3(\blk00000003/blk00000621/sig0000141a ), + .DPRA4(\blk00000003/blk00000621/sig0000141a ), + .WCLK(clk), + .WE(\blk00000003/blk00000621/sig0000143f ), + .SPO(\blk00000003/blk00000621/sig0000141d ), + .DPO(\blk00000003/blk00000621/sig0000142f ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000621/blk00000646 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk00000621/sig0000143e ), + .Q(\blk00000003/sig0000044b ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000621/blk00000645 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk00000621/sig0000143d ), + .Q(\blk00000003/sig0000044c ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000621/blk00000644 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk00000621/sig0000143c ), + .Q(\blk00000003/sig0000044d ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000621/blk00000643 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk00000621/sig0000143b ), + .Q(\blk00000003/sig0000044e ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000621/blk00000642 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk00000621/sig0000143a ), + .Q(\blk00000003/sig0000044f ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000621/blk00000641 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk00000621/sig00001439 ), + .Q(\blk00000003/sig00000450 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000621/blk00000640 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk00000621/sig00001438 ), + .Q(\blk00000003/sig00000451 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000621/blk0000063f ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk00000621/sig00001437 ), + .Q(\blk00000003/sig00000452 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000621/blk0000063e ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk00000621/sig00001436 ), + .Q(\blk00000003/sig00000453 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000621/blk0000063d ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk00000621/sig00001435 ), + .Q(\blk00000003/sig00000454 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000621/blk0000063c ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk00000621/sig00001434 ), + .Q(\blk00000003/sig00000455 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000621/blk0000063b ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk00000621/sig00001433 ), + .Q(\blk00000003/sig00000456 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000621/blk0000063a ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk00000621/sig00001432 ), + .Q(\blk00000003/sig00000457 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000621/blk00000639 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk00000621/sig00001431 ), + .Q(\blk00000003/sig00000458 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000621/blk00000638 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk00000621/sig00001430 ), + .Q(\blk00000003/sig00000459 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000621/blk00000637 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk00000621/sig0000142f ), + .Q(\blk00000003/sig0000045a ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000621/blk00000636 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk00000621/sig0000142e ), + .Q(\blk00000003/sig0000045b ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000621/blk00000635 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk00000621/sig0000142d ), + .Q(\blk00000003/sig0000045c ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000621/blk00000634 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk00000621/sig0000142c ), + .Q(\blk00000003/sig000008d6 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000621/blk00000633 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk00000621/sig0000142b ), + .Q(\blk00000003/sig000008d7 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000621/blk00000632 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk00000621/sig0000142a ), + .Q(\blk00000003/sig000008d8 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000621/blk00000631 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk00000621/sig00001429 ), + .Q(\blk00000003/sig000008d9 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000621/blk00000630 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk00000621/sig00001428 ), + .Q(\blk00000003/sig000008da ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000621/blk0000062f ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk00000621/sig00001427 ), + .Q(\blk00000003/sig000008db ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000621/blk0000062e ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk00000621/sig00001426 ), + .Q(\blk00000003/sig000008dc ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000621/blk0000062d ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk00000621/sig00001425 ), + .Q(\blk00000003/sig000008dd ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000621/blk0000062c ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk00000621/sig00001424 ), + .Q(\blk00000003/sig000008de ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000621/blk0000062b ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk00000621/sig00001423 ), + .Q(\blk00000003/sig000008df ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000621/blk0000062a ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk00000621/sig00001422 ), + .Q(\blk00000003/sig000008e0 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000621/blk00000629 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk00000621/sig00001421 ), + .Q(\blk00000003/sig000008e1 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000621/blk00000628 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk00000621/sig00001420 ), + .Q(\blk00000003/sig000008e2 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000621/blk00000627 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk00000621/sig0000141f ), + .Q(\blk00000003/sig000008e3 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000621/blk00000626 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk00000621/sig0000141e ), + .Q(\blk00000003/sig000008e4 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000621/blk00000625 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk00000621/sig0000141d ), + .Q(\blk00000003/sig000008e5 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000621/blk00000624 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk00000621/sig0000141c ), + .Q(\blk00000003/sig000008e6 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000621/blk00000623 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk00000621/sig0000141b ), + .Q(\blk00000003/sig000008e7 ) + ); + GND \blk00000003/blk00000621/blk00000622 ( + .G(\blk00000003/blk00000621/sig0000141a ) + ); + LUT2 #( + .INIT ( 4'h8 )) + \blk00000003/blk0000065a/blk00000692 ( + .I0(ce), + .I1(\blk00000003/sig0000073e ), + .O(\blk00000003/blk0000065a/sig000014a2 ) + ); + RAM32X1D #( + .INIT ( 32'h00000001 )) + \blk00000003/blk0000065a/blk00000691 ( + .A0(\blk00000003/sig00000735 ), + .A1(\blk00000003/sig00000736 ), + .A2(\blk00000003/blk0000065a/sig0000147d ), + .A3(\blk00000003/blk0000065a/sig0000147d ), + .A4(\blk00000003/blk0000065a/sig0000147d ), + .D(\blk00000003/sig000008d6 ), + .DPRA0(\blk00000003/sig00000757 ), + .DPRA1(\blk00000003/sig00000756 ), + .DPRA2(\blk00000003/blk0000065a/sig0000147d ), + .DPRA3(\blk00000003/blk0000065a/sig0000147d ), + .DPRA4(\blk00000003/blk0000065a/sig0000147d ), + .WCLK(clk), + .WE(\blk00000003/blk0000065a/sig000014a2 ), + .SPO(\blk00000003/blk0000065a/sig0000148f ), + .DPO(\blk00000003/blk0000065a/sig000014a1 ) + ); + RAM32X1D #( + .INIT ( 32'h00000001 )) + \blk00000003/blk0000065a/blk00000690 ( + .A0(\blk00000003/sig00000735 ), + .A1(\blk00000003/sig00000736 ), + .A2(\blk00000003/blk0000065a/sig0000147d ), + .A3(\blk00000003/blk0000065a/sig0000147d ), + .A4(\blk00000003/blk0000065a/sig0000147d ), + .D(\blk00000003/sig000008d7 ), + .DPRA0(\blk00000003/sig00000757 ), + .DPRA1(\blk00000003/sig00000756 ), + .DPRA2(\blk00000003/blk0000065a/sig0000147d ), + .DPRA3(\blk00000003/blk0000065a/sig0000147d ), + .DPRA4(\blk00000003/blk0000065a/sig0000147d ), + .WCLK(clk), + .WE(\blk00000003/blk0000065a/sig000014a2 ), + .SPO(\blk00000003/blk0000065a/sig0000148e ), + .DPO(\blk00000003/blk0000065a/sig000014a0 ) + ); + RAM32X1D #( + .INIT ( 32'h00000001 )) + \blk00000003/blk0000065a/blk0000068f ( + .A0(\blk00000003/sig00000735 ), + .A1(\blk00000003/sig00000736 ), + .A2(\blk00000003/blk0000065a/sig0000147d ), + .A3(\blk00000003/blk0000065a/sig0000147d ), + .A4(\blk00000003/blk0000065a/sig0000147d ), + .D(\blk00000003/sig000008d8 ), + .DPRA0(\blk00000003/sig00000757 ), + .DPRA1(\blk00000003/sig00000756 ), + .DPRA2(\blk00000003/blk0000065a/sig0000147d ), + .DPRA3(\blk00000003/blk0000065a/sig0000147d ), + .DPRA4(\blk00000003/blk0000065a/sig0000147d ), + .WCLK(clk), + .WE(\blk00000003/blk0000065a/sig000014a2 ), + .SPO(\blk00000003/blk0000065a/sig0000148d ), + .DPO(\blk00000003/blk0000065a/sig0000149f ) + ); + RAM32X1D #( + .INIT ( 32'h00000001 )) + \blk00000003/blk0000065a/blk0000068e ( + .A0(\blk00000003/sig00000735 ), + .A1(\blk00000003/sig00000736 ), + .A2(\blk00000003/blk0000065a/sig0000147d ), + .A3(\blk00000003/blk0000065a/sig0000147d ), + .A4(\blk00000003/blk0000065a/sig0000147d ), + .D(\blk00000003/sig000008d9 ), + .DPRA0(\blk00000003/sig00000757 ), + .DPRA1(\blk00000003/sig00000756 ), + .DPRA2(\blk00000003/blk0000065a/sig0000147d ), + .DPRA3(\blk00000003/blk0000065a/sig0000147d ), + .DPRA4(\blk00000003/blk0000065a/sig0000147d ), + .WCLK(clk), + .WE(\blk00000003/blk0000065a/sig000014a2 ), + .SPO(\blk00000003/blk0000065a/sig0000148c ), + .DPO(\blk00000003/blk0000065a/sig0000149e ) + ); + RAM32X1D #( + .INIT ( 32'h00000001 )) + \blk00000003/blk0000065a/blk0000068d ( + .A0(\blk00000003/sig00000735 ), + .A1(\blk00000003/sig00000736 ), + .A2(\blk00000003/blk0000065a/sig0000147d ), + .A3(\blk00000003/blk0000065a/sig0000147d ), + .A4(\blk00000003/blk0000065a/sig0000147d ), + .D(\blk00000003/sig000008da ), + .DPRA0(\blk00000003/sig00000757 ), + .DPRA1(\blk00000003/sig00000756 ), + .DPRA2(\blk00000003/blk0000065a/sig0000147d ), + .DPRA3(\blk00000003/blk0000065a/sig0000147d ), + .DPRA4(\blk00000003/blk0000065a/sig0000147d ), + .WCLK(clk), + .WE(\blk00000003/blk0000065a/sig000014a2 ), + .SPO(\blk00000003/blk0000065a/sig0000148b ), + .DPO(\blk00000003/blk0000065a/sig0000149d ) + ); + RAM32X1D #( + .INIT ( 32'h00000001 )) + \blk00000003/blk0000065a/blk0000068c ( + .A0(\blk00000003/sig00000735 ), + .A1(\blk00000003/sig00000736 ), + .A2(\blk00000003/blk0000065a/sig0000147d ), + .A3(\blk00000003/blk0000065a/sig0000147d ), + .A4(\blk00000003/blk0000065a/sig0000147d ), + .D(\blk00000003/sig000008db ), + .DPRA0(\blk00000003/sig00000757 ), + .DPRA1(\blk00000003/sig00000756 ), + .DPRA2(\blk00000003/blk0000065a/sig0000147d ), + .DPRA3(\blk00000003/blk0000065a/sig0000147d ), + .DPRA4(\blk00000003/blk0000065a/sig0000147d ), + .WCLK(clk), + .WE(\blk00000003/blk0000065a/sig000014a2 ), + .SPO(\blk00000003/blk0000065a/sig0000148a ), + .DPO(\blk00000003/blk0000065a/sig0000149c ) + ); + RAM32X1D #( + .INIT ( 32'h00000000 )) + \blk00000003/blk0000065a/blk0000068b ( + .A0(\blk00000003/sig00000735 ), + .A1(\blk00000003/sig00000736 ), + .A2(\blk00000003/blk0000065a/sig0000147d ), + .A3(\blk00000003/blk0000065a/sig0000147d ), + .A4(\blk00000003/blk0000065a/sig0000147d ), + .D(\blk00000003/sig000008dd ), + .DPRA0(\blk00000003/sig00000757 ), + .DPRA1(\blk00000003/sig00000756 ), + .DPRA2(\blk00000003/blk0000065a/sig0000147d ), + .DPRA3(\blk00000003/blk0000065a/sig0000147d ), + .DPRA4(\blk00000003/blk0000065a/sig0000147d ), + .WCLK(clk), + .WE(\blk00000003/blk0000065a/sig000014a2 ), + .SPO(\blk00000003/blk0000065a/sig00001488 ), + .DPO(\blk00000003/blk0000065a/sig0000149a ) + ); + RAM32X1D #( + .INIT ( 32'h00000001 )) + \blk00000003/blk0000065a/blk0000068a ( + .A0(\blk00000003/sig00000735 ), + .A1(\blk00000003/sig00000736 ), + .A2(\blk00000003/blk0000065a/sig0000147d ), + .A3(\blk00000003/blk0000065a/sig0000147d ), + .A4(\blk00000003/blk0000065a/sig0000147d ), + .D(\blk00000003/sig000008de ), + .DPRA0(\blk00000003/sig00000757 ), + .DPRA1(\blk00000003/sig00000756 ), + .DPRA2(\blk00000003/blk0000065a/sig0000147d ), + .DPRA3(\blk00000003/blk0000065a/sig0000147d ), + .DPRA4(\blk00000003/blk0000065a/sig0000147d ), + .WCLK(clk), + .WE(\blk00000003/blk0000065a/sig000014a2 ), + .SPO(\blk00000003/blk0000065a/sig00001487 ), + .DPO(\blk00000003/blk0000065a/sig00001499 ) + ); + RAM32X1D #( + .INIT ( 32'h00000003 )) + \blk00000003/blk0000065a/blk00000689 ( + .A0(\blk00000003/sig00000735 ), + .A1(\blk00000003/sig00000736 ), + .A2(\blk00000003/blk0000065a/sig0000147d ), + .A3(\blk00000003/blk0000065a/sig0000147d ), + .A4(\blk00000003/blk0000065a/sig0000147d ), + .D(\blk00000003/sig000008dc ), + .DPRA0(\blk00000003/sig00000757 ), + .DPRA1(\blk00000003/sig00000756 ), + .DPRA2(\blk00000003/blk0000065a/sig0000147d ), + .DPRA3(\blk00000003/blk0000065a/sig0000147d ), + .DPRA4(\blk00000003/blk0000065a/sig0000147d ), + .WCLK(clk), + .WE(\blk00000003/blk0000065a/sig000014a2 ), + .SPO(\blk00000003/blk0000065a/sig00001489 ), + .DPO(\blk00000003/blk0000065a/sig0000149b ) + ); + RAM32X1D #( + .INIT ( 32'h00000002 )) + \blk00000003/blk0000065a/blk00000688 ( + .A0(\blk00000003/sig00000735 ), + .A1(\blk00000003/sig00000736 ), + .A2(\blk00000003/blk0000065a/sig0000147d ), + .A3(\blk00000003/blk0000065a/sig0000147d ), + .A4(\blk00000003/blk0000065a/sig0000147d ), + .D(\blk00000003/sig000008df ), + .DPRA0(\blk00000003/sig00000757 ), + .DPRA1(\blk00000003/sig00000756 ), + .DPRA2(\blk00000003/blk0000065a/sig0000147d ), + .DPRA3(\blk00000003/blk0000065a/sig0000147d ), + .DPRA4(\blk00000003/blk0000065a/sig0000147d ), + .WCLK(clk), + .WE(\blk00000003/blk0000065a/sig000014a2 ), + .SPO(\blk00000003/blk0000065a/sig00001486 ), + .DPO(\blk00000003/blk0000065a/sig00001498 ) + ); + RAM32X1D #( + .INIT ( 32'h00000002 )) + \blk00000003/blk0000065a/blk00000687 ( + .A0(\blk00000003/sig00000735 ), + .A1(\blk00000003/sig00000736 ), + .A2(\blk00000003/blk0000065a/sig0000147d ), + .A3(\blk00000003/blk0000065a/sig0000147d ), + .A4(\blk00000003/blk0000065a/sig0000147d ), + .D(\blk00000003/sig000008e0 ), + .DPRA0(\blk00000003/sig00000757 ), + .DPRA1(\blk00000003/sig00000756 ), + .DPRA2(\blk00000003/blk0000065a/sig0000147d ), + .DPRA3(\blk00000003/blk0000065a/sig0000147d ), + .DPRA4(\blk00000003/blk0000065a/sig0000147d ), + .WCLK(clk), + .WE(\blk00000003/blk0000065a/sig000014a2 ), + .SPO(\blk00000003/blk0000065a/sig00001485 ), + .DPO(\blk00000003/blk0000065a/sig00001497 ) + ); + RAM32X1D #( + .INIT ( 32'h00000000 )) + \blk00000003/blk0000065a/blk00000686 ( + .A0(\blk00000003/sig00000735 ), + .A1(\blk00000003/sig00000736 ), + .A2(\blk00000003/blk0000065a/sig0000147d ), + .A3(\blk00000003/blk0000065a/sig0000147d ), + .A4(\blk00000003/blk0000065a/sig0000147d ), + .D(\blk00000003/sig000008e1 ), + .DPRA0(\blk00000003/sig00000757 ), + .DPRA1(\blk00000003/sig00000756 ), + .DPRA2(\blk00000003/blk0000065a/sig0000147d ), + .DPRA3(\blk00000003/blk0000065a/sig0000147d ), + .DPRA4(\blk00000003/blk0000065a/sig0000147d ), + .WCLK(clk), + .WE(\blk00000003/blk0000065a/sig000014a2 ), + .SPO(\blk00000003/blk0000065a/sig00001484 ), + .DPO(\blk00000003/blk0000065a/sig00001496 ) + ); + RAM32X1D #( + .INIT ( 32'h00000002 )) + \blk00000003/blk0000065a/blk00000685 ( + .A0(\blk00000003/sig00000735 ), + .A1(\blk00000003/sig00000736 ), + .A2(\blk00000003/blk0000065a/sig0000147d ), + .A3(\blk00000003/blk0000065a/sig0000147d ), + .A4(\blk00000003/blk0000065a/sig0000147d ), + .D(\blk00000003/sig000008e2 ), + .DPRA0(\blk00000003/sig00000757 ), + .DPRA1(\blk00000003/sig00000756 ), + .DPRA2(\blk00000003/blk0000065a/sig0000147d ), + .DPRA3(\blk00000003/blk0000065a/sig0000147d ), + .DPRA4(\blk00000003/blk0000065a/sig0000147d ), + .WCLK(clk), + .WE(\blk00000003/blk0000065a/sig000014a2 ), + .SPO(\blk00000003/blk0000065a/sig00001483 ), + .DPO(\blk00000003/blk0000065a/sig00001495 ) + ); + RAM32X1D #( + .INIT ( 32'h00000001 )) + \blk00000003/blk0000065a/blk00000684 ( + .A0(\blk00000003/sig00000735 ), + .A1(\blk00000003/sig00000736 ), + .A2(\blk00000003/blk0000065a/sig0000147d ), + .A3(\blk00000003/blk0000065a/sig0000147d ), + .A4(\blk00000003/blk0000065a/sig0000147d ), + .D(\blk00000003/sig000008e3 ), + .DPRA0(\blk00000003/sig00000757 ), + .DPRA1(\blk00000003/sig00000756 ), + .DPRA2(\blk00000003/blk0000065a/sig0000147d ), + .DPRA3(\blk00000003/blk0000065a/sig0000147d ), + .DPRA4(\blk00000003/blk0000065a/sig0000147d ), + .WCLK(clk), + .WE(\blk00000003/blk0000065a/sig000014a2 ), + .SPO(\blk00000003/blk0000065a/sig00001482 ), + .DPO(\blk00000003/blk0000065a/sig00001494 ) + ); + RAM32X1D #( + .INIT ( 32'h00000003 )) + \blk00000003/blk0000065a/blk00000683 ( + .A0(\blk00000003/sig00000735 ), + .A1(\blk00000003/sig00000736 ), + .A2(\blk00000003/blk0000065a/sig0000147d ), + .A3(\blk00000003/blk0000065a/sig0000147d ), + .A4(\blk00000003/blk0000065a/sig0000147d ), + .D(\blk00000003/sig000008e4 ), + .DPRA0(\blk00000003/sig00000757 ), + .DPRA1(\blk00000003/sig00000756 ), + .DPRA2(\blk00000003/blk0000065a/sig0000147d ), + .DPRA3(\blk00000003/blk0000065a/sig0000147d ), + .DPRA4(\blk00000003/blk0000065a/sig0000147d ), + .WCLK(clk), + .WE(\blk00000003/blk0000065a/sig000014a2 ), + .SPO(\blk00000003/blk0000065a/sig00001481 ), + .DPO(\blk00000003/blk0000065a/sig00001493 ) + ); + RAM32X1D #( + .INIT ( 32'h00000003 )) + \blk00000003/blk0000065a/blk00000682 ( + .A0(\blk00000003/sig00000735 ), + .A1(\blk00000003/sig00000736 ), + .A2(\blk00000003/blk0000065a/sig0000147d ), + .A3(\blk00000003/blk0000065a/sig0000147d ), + .A4(\blk00000003/blk0000065a/sig0000147d ), + .D(\blk00000003/sig000008e6 ), + .DPRA0(\blk00000003/sig00000757 ), + .DPRA1(\blk00000003/sig00000756 ), + .DPRA2(\blk00000003/blk0000065a/sig0000147d ), + .DPRA3(\blk00000003/blk0000065a/sig0000147d ), + .DPRA4(\blk00000003/blk0000065a/sig0000147d ), + .WCLK(clk), + .WE(\blk00000003/blk0000065a/sig000014a2 ), + .SPO(\blk00000003/blk0000065a/sig0000147f ), + .DPO(\blk00000003/blk0000065a/sig00001491 ) + ); + RAM32X1D #( + .INIT ( 32'h00000001 )) + \blk00000003/blk0000065a/blk00000681 ( + .A0(\blk00000003/sig00000735 ), + .A1(\blk00000003/sig00000736 ), + .A2(\blk00000003/blk0000065a/sig0000147d ), + .A3(\blk00000003/blk0000065a/sig0000147d ), + .A4(\blk00000003/blk0000065a/sig0000147d ), + .D(\blk00000003/sig000008e7 ), + .DPRA0(\blk00000003/sig00000757 ), + .DPRA1(\blk00000003/sig00000756 ), + .DPRA2(\blk00000003/blk0000065a/sig0000147d ), + .DPRA3(\blk00000003/blk0000065a/sig0000147d ), + .DPRA4(\blk00000003/blk0000065a/sig0000147d ), + .WCLK(clk), + .WE(\blk00000003/blk0000065a/sig000014a2 ), + .SPO(\blk00000003/blk0000065a/sig0000147e ), + .DPO(\blk00000003/blk0000065a/sig00001490 ) + ); + RAM32X1D #( + .INIT ( 32'h00000003 )) + \blk00000003/blk0000065a/blk00000680 ( + .A0(\blk00000003/sig00000735 ), + .A1(\blk00000003/sig00000736 ), + .A2(\blk00000003/blk0000065a/sig0000147d ), + .A3(\blk00000003/blk0000065a/sig0000147d ), + .A4(\blk00000003/blk0000065a/sig0000147d ), + .D(\blk00000003/sig000008e5 ), + .DPRA0(\blk00000003/sig00000757 ), + .DPRA1(\blk00000003/sig00000756 ), + .DPRA2(\blk00000003/blk0000065a/sig0000147d ), + .DPRA3(\blk00000003/blk0000065a/sig0000147d ), + .DPRA4(\blk00000003/blk0000065a/sig0000147d ), + .WCLK(clk), + .WE(\blk00000003/blk0000065a/sig000014a2 ), + .SPO(\blk00000003/blk0000065a/sig00001480 ), + .DPO(\blk00000003/blk0000065a/sig00001492 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk0000065a/blk0000067f ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk0000065a/sig000014a1 ), + .Q(\blk00000003/sig000004bd ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk0000065a/blk0000067e ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk0000065a/sig000014a0 ), + .Q(\blk00000003/sig000004be ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk0000065a/blk0000067d ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk0000065a/sig0000149f ), + .Q(\blk00000003/sig000004bf ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk0000065a/blk0000067c ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk0000065a/sig0000149e ), + .Q(\blk00000003/sig000004c0 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk0000065a/blk0000067b ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk0000065a/sig0000149d ), + .Q(\blk00000003/sig000004c1 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk0000065a/blk0000067a ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk0000065a/sig0000149c ), + .Q(\blk00000003/sig000004c2 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk0000065a/blk00000679 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk0000065a/sig0000149b ), + .Q(\blk00000003/sig000004c3 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk0000065a/blk00000678 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk0000065a/sig0000149a ), + .Q(\blk00000003/sig000004c4 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk0000065a/blk00000677 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk0000065a/sig00001499 ), + .Q(\blk00000003/sig000004c5 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk0000065a/blk00000676 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk0000065a/sig00001498 ), + .Q(\blk00000003/sig000004c6 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk0000065a/blk00000675 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk0000065a/sig00001497 ), + .Q(\blk00000003/sig000004c7 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk0000065a/blk00000674 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk0000065a/sig00001496 ), + .Q(\blk00000003/sig000004c8 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk0000065a/blk00000673 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk0000065a/sig00001495 ), + .Q(\blk00000003/sig000004c9 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk0000065a/blk00000672 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk0000065a/sig00001494 ), + .Q(\blk00000003/sig000004ca ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk0000065a/blk00000671 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk0000065a/sig00001493 ), + .Q(\blk00000003/sig000004cb ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk0000065a/blk00000670 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk0000065a/sig00001492 ), + .Q(\blk00000003/sig000004cc ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk0000065a/blk0000066f ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk0000065a/sig00001491 ), + .Q(\blk00000003/sig000004cd ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk0000065a/blk0000066e ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk0000065a/sig00001490 ), + .Q(\blk00000003/sig000004ce ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk0000065a/blk0000066d ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk0000065a/sig0000148f ), + .Q(\blk00000003/sig000008e8 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk0000065a/blk0000066c ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk0000065a/sig0000148e ), + .Q(\blk00000003/sig000008e9 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk0000065a/blk0000066b ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk0000065a/sig0000148d ), + .Q(\blk00000003/sig000008ea ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk0000065a/blk0000066a ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk0000065a/sig0000148c ), + .Q(\blk00000003/sig000008eb ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk0000065a/blk00000669 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk0000065a/sig0000148b ), + .Q(\blk00000003/sig000008ec ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk0000065a/blk00000668 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk0000065a/sig0000148a ), + .Q(\blk00000003/sig000008ed ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk0000065a/blk00000667 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk0000065a/sig00001489 ), + .Q(\blk00000003/sig000008ee ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk0000065a/blk00000666 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk0000065a/sig00001488 ), + .Q(\blk00000003/sig000008ef ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk0000065a/blk00000665 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk0000065a/sig00001487 ), + .Q(\blk00000003/sig000008f0 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk0000065a/blk00000664 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk0000065a/sig00001486 ), + .Q(\blk00000003/sig000008f1 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk0000065a/blk00000663 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk0000065a/sig00001485 ), + .Q(\blk00000003/sig000008f2 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk0000065a/blk00000662 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk0000065a/sig00001484 ), + .Q(\blk00000003/sig000008f3 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk0000065a/blk00000661 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk0000065a/sig00001483 ), + .Q(\blk00000003/sig000008f4 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk0000065a/blk00000660 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk0000065a/sig00001482 ), + .Q(\blk00000003/sig000008f5 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk0000065a/blk0000065f ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk0000065a/sig00001481 ), + .Q(\blk00000003/sig000008f6 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk0000065a/blk0000065e ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk0000065a/sig00001480 ), + .Q(\blk00000003/sig000008f7 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk0000065a/blk0000065d ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk0000065a/sig0000147f ), + .Q(\blk00000003/sig000008f8 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk0000065a/blk0000065c ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk0000065a/sig0000147e ), + .Q(\blk00000003/sig000008f9 ) + ); + GND \blk00000003/blk0000065a/blk0000065b ( + .G(\blk00000003/blk0000065a/sig0000147d ) + ); + LUT2 #( + .INIT ( 4'h8 )) + \blk00000003/blk00000693/blk000006cb ( + .I0(ce), + .I1(\blk00000003/sig0000073f ), + .O(\blk00000003/blk00000693/sig00001505 ) + ); + RAM32X1D #( + .INIT ( 32'h00000001 )) + \blk00000003/blk00000693/blk000006ca ( + .A0(\blk00000003/sig00000737 ), + .A1(\blk00000003/sig00000738 ), + .A2(\blk00000003/blk00000693/sig000014e0 ), + .A3(\blk00000003/blk00000693/sig000014e0 ), + .A4(\blk00000003/blk00000693/sig000014e0 ), + .D(\blk00000003/sig000008e8 ), + .DPRA0(\blk00000003/sig00000753 ), + .DPRA1(\blk00000003/sig00000752 ), + .DPRA2(\blk00000003/blk00000693/sig000014e0 ), + .DPRA3(\blk00000003/blk00000693/sig000014e0 ), + .DPRA4(\blk00000003/blk00000693/sig000014e0 ), + .WCLK(clk), + .WE(\blk00000003/blk00000693/sig00001505 ), + .SPO(\blk00000003/blk00000693/sig000014f2 ), + .DPO(\blk00000003/blk00000693/sig00001504 ) + ); + RAM32X1D #( + .INIT ( 32'h00000001 )) + \blk00000003/blk00000693/blk000006c9 ( + .A0(\blk00000003/sig00000737 ), + .A1(\blk00000003/sig00000738 ), + .A2(\blk00000003/blk00000693/sig000014e0 ), + .A3(\blk00000003/blk00000693/sig000014e0 ), + .A4(\blk00000003/blk00000693/sig000014e0 ), + .D(\blk00000003/sig000008e9 ), + .DPRA0(\blk00000003/sig00000753 ), + .DPRA1(\blk00000003/sig00000752 ), + .DPRA2(\blk00000003/blk00000693/sig000014e0 ), + .DPRA3(\blk00000003/blk00000693/sig000014e0 ), + .DPRA4(\blk00000003/blk00000693/sig000014e0 ), + .WCLK(clk), + .WE(\blk00000003/blk00000693/sig00001505 ), + .SPO(\blk00000003/blk00000693/sig000014f1 ), + .DPO(\blk00000003/blk00000693/sig00001503 ) + ); + RAM32X1D #( + .INIT ( 32'h00000001 )) + \blk00000003/blk00000693/blk000006c8 ( + .A0(\blk00000003/sig00000737 ), + .A1(\blk00000003/sig00000738 ), + .A2(\blk00000003/blk00000693/sig000014e0 ), + .A3(\blk00000003/blk00000693/sig000014e0 ), + .A4(\blk00000003/blk00000693/sig000014e0 ), + .D(\blk00000003/sig000008ea ), + .DPRA0(\blk00000003/sig00000753 ), + .DPRA1(\blk00000003/sig00000752 ), + .DPRA2(\blk00000003/blk00000693/sig000014e0 ), + .DPRA3(\blk00000003/blk00000693/sig000014e0 ), + .DPRA4(\blk00000003/blk00000693/sig000014e0 ), + .WCLK(clk), + .WE(\blk00000003/blk00000693/sig00001505 ), + .SPO(\blk00000003/blk00000693/sig000014f0 ), + .DPO(\blk00000003/blk00000693/sig00001502 ) + ); + RAM32X1D #( + .INIT ( 32'h00000001 )) + \blk00000003/blk00000693/blk000006c7 ( + .A0(\blk00000003/sig00000737 ), + .A1(\blk00000003/sig00000738 ), + .A2(\blk00000003/blk00000693/sig000014e0 ), + .A3(\blk00000003/blk00000693/sig000014e0 ), + .A4(\blk00000003/blk00000693/sig000014e0 ), + .D(\blk00000003/sig000008eb ), + .DPRA0(\blk00000003/sig00000753 ), + .DPRA1(\blk00000003/sig00000752 ), + .DPRA2(\blk00000003/blk00000693/sig000014e0 ), + .DPRA3(\blk00000003/blk00000693/sig000014e0 ), + .DPRA4(\blk00000003/blk00000693/sig000014e0 ), + .WCLK(clk), + .WE(\blk00000003/blk00000693/sig00001505 ), + .SPO(\blk00000003/blk00000693/sig000014ef ), + .DPO(\blk00000003/blk00000693/sig00001501 ) + ); + RAM32X1D #( + .INIT ( 32'h00000001 )) + \blk00000003/blk00000693/blk000006c6 ( + .A0(\blk00000003/sig00000737 ), + .A1(\blk00000003/sig00000738 ), + .A2(\blk00000003/blk00000693/sig000014e0 ), + .A3(\blk00000003/blk00000693/sig000014e0 ), + .A4(\blk00000003/blk00000693/sig000014e0 ), + .D(\blk00000003/sig000008ec ), + .DPRA0(\blk00000003/sig00000753 ), + .DPRA1(\blk00000003/sig00000752 ), + .DPRA2(\blk00000003/blk00000693/sig000014e0 ), + .DPRA3(\blk00000003/blk00000693/sig000014e0 ), + .DPRA4(\blk00000003/blk00000693/sig000014e0 ), + .WCLK(clk), + .WE(\blk00000003/blk00000693/sig00001505 ), + .SPO(\blk00000003/blk00000693/sig000014ee ), + .DPO(\blk00000003/blk00000693/sig00001500 ) + ); + RAM32X1D #( + .INIT ( 32'h00000003 )) + \blk00000003/blk00000693/blk000006c5 ( + .A0(\blk00000003/sig00000737 ), + .A1(\blk00000003/sig00000738 ), + .A2(\blk00000003/blk00000693/sig000014e0 ), + .A3(\blk00000003/blk00000693/sig000014e0 ), + .A4(\blk00000003/blk00000693/sig000014e0 ), + .D(\blk00000003/sig000008ed ), + .DPRA0(\blk00000003/sig00000753 ), + .DPRA1(\blk00000003/sig00000752 ), + .DPRA2(\blk00000003/blk00000693/sig000014e0 ), + .DPRA3(\blk00000003/blk00000693/sig000014e0 ), + .DPRA4(\blk00000003/blk00000693/sig000014e0 ), + .WCLK(clk), + .WE(\blk00000003/blk00000693/sig00001505 ), + .SPO(\blk00000003/blk00000693/sig000014ed ), + .DPO(\blk00000003/blk00000693/sig000014ff ) + ); + RAM32X1D #( + .INIT ( 32'h00000002 )) + \blk00000003/blk00000693/blk000006c4 ( + .A0(\blk00000003/sig00000737 ), + .A1(\blk00000003/sig00000738 ), + .A2(\blk00000003/blk00000693/sig000014e0 ), + .A3(\blk00000003/blk00000693/sig000014e0 ), + .A4(\blk00000003/blk00000693/sig000014e0 ), + .D(\blk00000003/sig000008ef ), + .DPRA0(\blk00000003/sig00000753 ), + .DPRA1(\blk00000003/sig00000752 ), + .DPRA2(\blk00000003/blk00000693/sig000014e0 ), + .DPRA3(\blk00000003/blk00000693/sig000014e0 ), + .DPRA4(\blk00000003/blk00000693/sig000014e0 ), + .WCLK(clk), + .WE(\blk00000003/blk00000693/sig00001505 ), + .SPO(\blk00000003/blk00000693/sig000014eb ), + .DPO(\blk00000003/blk00000693/sig000014fd ) + ); + RAM32X1D #( + .INIT ( 32'h00000002 )) + \blk00000003/blk00000693/blk000006c3 ( + .A0(\blk00000003/sig00000737 ), + .A1(\blk00000003/sig00000738 ), + .A2(\blk00000003/blk00000693/sig000014e0 ), + .A3(\blk00000003/blk00000693/sig000014e0 ), + .A4(\blk00000003/blk00000693/sig000014e0 ), + .D(\blk00000003/sig000008f0 ), + .DPRA0(\blk00000003/sig00000753 ), + .DPRA1(\blk00000003/sig00000752 ), + .DPRA2(\blk00000003/blk00000693/sig000014e0 ), + .DPRA3(\blk00000003/blk00000693/sig000014e0 ), + .DPRA4(\blk00000003/blk00000693/sig000014e0 ), + .WCLK(clk), + .WE(\blk00000003/blk00000693/sig00001505 ), + .SPO(\blk00000003/blk00000693/sig000014ea ), + .DPO(\blk00000003/blk00000693/sig000014fc ) + ); + RAM32X1D #( + .INIT ( 32'h00000000 )) + \blk00000003/blk00000693/blk000006c2 ( + .A0(\blk00000003/sig00000737 ), + .A1(\blk00000003/sig00000738 ), + .A2(\blk00000003/blk00000693/sig000014e0 ), + .A3(\blk00000003/blk00000693/sig000014e0 ), + .A4(\blk00000003/blk00000693/sig000014e0 ), + .D(\blk00000003/sig000008ee ), + .DPRA0(\blk00000003/sig00000753 ), + .DPRA1(\blk00000003/sig00000752 ), + .DPRA2(\blk00000003/blk00000693/sig000014e0 ), + .DPRA3(\blk00000003/blk00000693/sig000014e0 ), + .DPRA4(\blk00000003/blk00000693/sig000014e0 ), + .WCLK(clk), + .WE(\blk00000003/blk00000693/sig00001505 ), + .SPO(\blk00000003/blk00000693/sig000014ec ), + .DPO(\blk00000003/blk00000693/sig000014fe ) + ); + RAM32X1D #( + .INIT ( 32'h00000002 )) + \blk00000003/blk00000693/blk000006c1 ( + .A0(\blk00000003/sig00000737 ), + .A1(\blk00000003/sig00000738 ), + .A2(\blk00000003/blk00000693/sig000014e0 ), + .A3(\blk00000003/blk00000693/sig000014e0 ), + .A4(\blk00000003/blk00000693/sig000014e0 ), + .D(\blk00000003/sig000008f1 ), + .DPRA0(\blk00000003/sig00000753 ), + .DPRA1(\blk00000003/sig00000752 ), + .DPRA2(\blk00000003/blk00000693/sig000014e0 ), + .DPRA3(\blk00000003/blk00000693/sig000014e0 ), + .DPRA4(\blk00000003/blk00000693/sig000014e0 ), + .WCLK(clk), + .WE(\blk00000003/blk00000693/sig00001505 ), + .SPO(\blk00000003/blk00000693/sig000014e9 ), + .DPO(\blk00000003/blk00000693/sig000014fb ) + ); + RAM32X1D #( + .INIT ( 32'h00000001 )) + \blk00000003/blk00000693/blk000006c0 ( + .A0(\blk00000003/sig00000737 ), + .A1(\blk00000003/sig00000738 ), + .A2(\blk00000003/blk00000693/sig000014e0 ), + .A3(\blk00000003/blk00000693/sig000014e0 ), + .A4(\blk00000003/blk00000693/sig000014e0 ), + .D(\blk00000003/sig000008f2 ), + .DPRA0(\blk00000003/sig00000753 ), + .DPRA1(\blk00000003/sig00000752 ), + .DPRA2(\blk00000003/blk00000693/sig000014e0 ), + .DPRA3(\blk00000003/blk00000693/sig000014e0 ), + .DPRA4(\blk00000003/blk00000693/sig000014e0 ), + .WCLK(clk), + .WE(\blk00000003/blk00000693/sig00001505 ), + .SPO(\blk00000003/blk00000693/sig000014e8 ), + .DPO(\blk00000003/blk00000693/sig000014fa ) + ); + RAM32X1D #( + .INIT ( 32'h00000003 )) + \blk00000003/blk00000693/blk000006bf ( + .A0(\blk00000003/sig00000737 ), + .A1(\blk00000003/sig00000738 ), + .A2(\blk00000003/blk00000693/sig000014e0 ), + .A3(\blk00000003/blk00000693/sig000014e0 ), + .A4(\blk00000003/blk00000693/sig000014e0 ), + .D(\blk00000003/sig000008f3 ), + .DPRA0(\blk00000003/sig00000753 ), + .DPRA1(\blk00000003/sig00000752 ), + .DPRA2(\blk00000003/blk00000693/sig000014e0 ), + .DPRA3(\blk00000003/blk00000693/sig000014e0 ), + .DPRA4(\blk00000003/blk00000693/sig000014e0 ), + .WCLK(clk), + .WE(\blk00000003/blk00000693/sig00001505 ), + .SPO(\blk00000003/blk00000693/sig000014e7 ), + .DPO(\blk00000003/blk00000693/sig000014f9 ) + ); + RAM32X1D #( + .INIT ( 32'h00000002 )) + \blk00000003/blk00000693/blk000006be ( + .A0(\blk00000003/sig00000737 ), + .A1(\blk00000003/sig00000738 ), + .A2(\blk00000003/blk00000693/sig000014e0 ), + .A3(\blk00000003/blk00000693/sig000014e0 ), + .A4(\blk00000003/blk00000693/sig000014e0 ), + .D(\blk00000003/sig000008f4 ), + .DPRA0(\blk00000003/sig00000753 ), + .DPRA1(\blk00000003/sig00000752 ), + .DPRA2(\blk00000003/blk00000693/sig000014e0 ), + .DPRA3(\blk00000003/blk00000693/sig000014e0 ), + .DPRA4(\blk00000003/blk00000693/sig000014e0 ), + .WCLK(clk), + .WE(\blk00000003/blk00000693/sig00001505 ), + .SPO(\blk00000003/blk00000693/sig000014e6 ), + .DPO(\blk00000003/blk00000693/sig000014f8 ) + ); + RAM32X1D #( + .INIT ( 32'h00000000 )) + \blk00000003/blk00000693/blk000006bd ( + .A0(\blk00000003/sig00000737 ), + .A1(\blk00000003/sig00000738 ), + .A2(\blk00000003/blk00000693/sig000014e0 ), + .A3(\blk00000003/blk00000693/sig000014e0 ), + .A4(\blk00000003/blk00000693/sig000014e0 ), + .D(\blk00000003/sig000008f5 ), + .DPRA0(\blk00000003/sig00000753 ), + .DPRA1(\blk00000003/sig00000752 ), + .DPRA2(\blk00000003/blk00000693/sig000014e0 ), + .DPRA3(\blk00000003/blk00000693/sig000014e0 ), + .DPRA4(\blk00000003/blk00000693/sig000014e0 ), + .WCLK(clk), + .WE(\blk00000003/blk00000693/sig00001505 ), + .SPO(\blk00000003/blk00000693/sig000014e5 ), + .DPO(\blk00000003/blk00000693/sig000014f7 ) + ); + RAM32X1D #( + .INIT ( 32'h00000000 )) + \blk00000003/blk00000693/blk000006bc ( + .A0(\blk00000003/sig00000737 ), + .A1(\blk00000003/sig00000738 ), + .A2(\blk00000003/blk00000693/sig000014e0 ), + .A3(\blk00000003/blk00000693/sig000014e0 ), + .A4(\blk00000003/blk00000693/sig000014e0 ), + .D(\blk00000003/sig000008f6 ), + .DPRA0(\blk00000003/sig00000753 ), + .DPRA1(\blk00000003/sig00000752 ), + .DPRA2(\blk00000003/blk00000693/sig000014e0 ), + .DPRA3(\blk00000003/blk00000693/sig000014e0 ), + .DPRA4(\blk00000003/blk00000693/sig000014e0 ), + .WCLK(clk), + .WE(\blk00000003/blk00000693/sig00001505 ), + .SPO(\blk00000003/blk00000693/sig000014e4 ), + .DPO(\blk00000003/blk00000693/sig000014f6 ) + ); + RAM32X1D #( + .INIT ( 32'h00000002 )) + \blk00000003/blk00000693/blk000006bb ( + .A0(\blk00000003/sig00000737 ), + .A1(\blk00000003/sig00000738 ), + .A2(\blk00000003/blk00000693/sig000014e0 ), + .A3(\blk00000003/blk00000693/sig000014e0 ), + .A4(\blk00000003/blk00000693/sig000014e0 ), + .D(\blk00000003/sig000008f8 ), + .DPRA0(\blk00000003/sig00000753 ), + .DPRA1(\blk00000003/sig00000752 ), + .DPRA2(\blk00000003/blk00000693/sig000014e0 ), + .DPRA3(\blk00000003/blk00000693/sig000014e0 ), + .DPRA4(\blk00000003/blk00000693/sig000014e0 ), + .WCLK(clk), + .WE(\blk00000003/blk00000693/sig00001505 ), + .SPO(\blk00000003/blk00000693/sig000014e2 ), + .DPO(\blk00000003/blk00000693/sig000014f4 ) + ); + RAM32X1D #( + .INIT ( 32'h00000000 )) + \blk00000003/blk00000693/blk000006ba ( + .A0(\blk00000003/sig00000737 ), + .A1(\blk00000003/sig00000738 ), + .A2(\blk00000003/blk00000693/sig000014e0 ), + .A3(\blk00000003/blk00000693/sig000014e0 ), + .A4(\blk00000003/blk00000693/sig000014e0 ), + .D(\blk00000003/sig000008f9 ), + .DPRA0(\blk00000003/sig00000753 ), + .DPRA1(\blk00000003/sig00000752 ), + .DPRA2(\blk00000003/blk00000693/sig000014e0 ), + .DPRA3(\blk00000003/blk00000693/sig000014e0 ), + .DPRA4(\blk00000003/blk00000693/sig000014e0 ), + .WCLK(clk), + .WE(\blk00000003/blk00000693/sig00001505 ), + .SPO(\blk00000003/blk00000693/sig000014e1 ), + .DPO(\blk00000003/blk00000693/sig000014f3 ) + ); + RAM32X1D #( + .INIT ( 32'h00000003 )) + \blk00000003/blk00000693/blk000006b9 ( + .A0(\blk00000003/sig00000737 ), + .A1(\blk00000003/sig00000738 ), + .A2(\blk00000003/blk00000693/sig000014e0 ), + .A3(\blk00000003/blk00000693/sig000014e0 ), + .A4(\blk00000003/blk00000693/sig000014e0 ), + .D(\blk00000003/sig000008f7 ), + .DPRA0(\blk00000003/sig00000753 ), + .DPRA1(\blk00000003/sig00000752 ), + .DPRA2(\blk00000003/blk00000693/sig000014e0 ), + .DPRA3(\blk00000003/blk00000693/sig000014e0 ), + .DPRA4(\blk00000003/blk00000693/sig000014e0 ), + .WCLK(clk), + .WE(\blk00000003/blk00000693/sig00001505 ), + .SPO(\blk00000003/blk00000693/sig000014e3 ), + .DPO(\blk00000003/blk00000693/sig000014f5 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000693/blk000006b8 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk00000693/sig00001504 ), + .Q(\blk00000003/sig0000052f ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000693/blk000006b7 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk00000693/sig00001503 ), + .Q(\blk00000003/sig00000530 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000693/blk000006b6 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk00000693/sig00001502 ), + .Q(\blk00000003/sig00000531 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000693/blk000006b5 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk00000693/sig00001501 ), + .Q(\blk00000003/sig00000532 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000693/blk000006b4 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk00000693/sig00001500 ), + .Q(\blk00000003/sig00000533 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000693/blk000006b3 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk00000693/sig000014ff ), + .Q(\blk00000003/sig00000534 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000693/blk000006b2 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk00000693/sig000014fe ), + .Q(\blk00000003/sig00000535 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000693/blk000006b1 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk00000693/sig000014fd ), + .Q(\blk00000003/sig00000536 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000693/blk000006b0 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk00000693/sig000014fc ), + .Q(\blk00000003/sig00000537 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000693/blk000006af ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk00000693/sig000014fb ), + .Q(\blk00000003/sig00000538 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000693/blk000006ae ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk00000693/sig000014fa ), + .Q(\blk00000003/sig00000539 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000693/blk000006ad ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk00000693/sig000014f9 ), + .Q(\blk00000003/sig0000053a ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000693/blk000006ac ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk00000693/sig000014f8 ), + .Q(\blk00000003/sig0000053b ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000693/blk000006ab ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk00000693/sig000014f7 ), + .Q(\blk00000003/sig0000053c ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000693/blk000006aa ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk00000693/sig000014f6 ), + .Q(\blk00000003/sig0000053d ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000693/blk000006a9 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk00000693/sig000014f5 ), + .Q(\blk00000003/sig0000053e ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000693/blk000006a8 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk00000693/sig000014f4 ), + .Q(\blk00000003/sig0000053f ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000693/blk000006a7 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk00000693/sig000014f3 ), + .Q(\blk00000003/sig00000540 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000693/blk000006a6 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk00000693/sig000014f2 ), + .Q(\blk00000003/sig000008fa ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000693/blk000006a5 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk00000693/sig000014f1 ), + .Q(\blk00000003/sig000008fb ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000693/blk000006a4 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk00000693/sig000014f0 ), + .Q(\blk00000003/sig000008fc ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000693/blk000006a3 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk00000693/sig000014ef ), + .Q(\blk00000003/sig000008fd ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000693/blk000006a2 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk00000693/sig000014ee ), + .Q(\blk00000003/sig000008fe ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000693/blk000006a1 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk00000693/sig000014ed ), + .Q(\blk00000003/sig000008ff ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000693/blk000006a0 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk00000693/sig000014ec ), + .Q(\blk00000003/sig00000900 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000693/blk0000069f ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk00000693/sig000014eb ), + .Q(\blk00000003/sig00000901 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000693/blk0000069e ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk00000693/sig000014ea ), + .Q(\blk00000003/sig00000902 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000693/blk0000069d ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk00000693/sig000014e9 ), + .Q(\blk00000003/sig00000903 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000693/blk0000069c ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk00000693/sig000014e8 ), + .Q(\blk00000003/sig00000904 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000693/blk0000069b ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk00000693/sig000014e7 ), + .Q(\blk00000003/sig00000905 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000693/blk0000069a ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk00000693/sig000014e6 ), + .Q(\blk00000003/sig00000906 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000693/blk00000699 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk00000693/sig000014e5 ), + .Q(\blk00000003/sig00000907 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000693/blk00000698 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk00000693/sig000014e4 ), + .Q(\blk00000003/sig00000908 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000693/blk00000697 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk00000693/sig000014e3 ), + .Q(\blk00000003/sig00000909 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000693/blk00000696 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk00000693/sig000014e2 ), + .Q(\blk00000003/sig0000090a ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000693/blk00000695 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk00000693/sig000014e1 ), + .Q(\blk00000003/sig0000090b ) + ); + GND \blk00000003/blk00000693/blk00000694 ( + .G(\blk00000003/blk00000693/sig000014e0 ) + ); + LUT2 #( + .INIT ( 4'h8 )) + \blk00000003/blk000006cc/blk00000704 ( + .I0(ce), + .I1(\blk00000003/sig00000740 ), + .O(\blk00000003/blk000006cc/sig00001568 ) + ); + RAM32X1D #( + .INIT ( 32'h00000001 )) + \blk00000003/blk000006cc/blk00000703 ( + .A0(\blk00000003/sig00000739 ), + .A1(\blk00000003/sig0000073a ), + .A2(\blk00000003/blk000006cc/sig00001543 ), + .A3(\blk00000003/blk000006cc/sig00001543 ), + .A4(\blk00000003/blk000006cc/sig00001543 ), + .D(\blk00000003/sig000008fa ), + .DPRA0(\blk00000003/sig0000074c ), + .DPRA1(\blk00000003/sig0000074a ), + .DPRA2(\blk00000003/blk000006cc/sig00001543 ), + .DPRA3(\blk00000003/blk000006cc/sig00001543 ), + .DPRA4(\blk00000003/blk000006cc/sig00001543 ), + .WCLK(clk), + .WE(\blk00000003/blk000006cc/sig00001568 ), + .SPO(\blk00000003/blk000006cc/sig00001555 ), + .DPO(\blk00000003/blk000006cc/sig00001567 ) + ); + RAM32X1D #( + .INIT ( 32'h00000001 )) + \blk00000003/blk000006cc/blk00000702 ( + .A0(\blk00000003/sig00000739 ), + .A1(\blk00000003/sig0000073a ), + .A2(\blk00000003/blk000006cc/sig00001543 ), + .A3(\blk00000003/blk000006cc/sig00001543 ), + .A4(\blk00000003/blk000006cc/sig00001543 ), + .D(\blk00000003/sig000008fb ), + .DPRA0(\blk00000003/sig0000074c ), + .DPRA1(\blk00000003/sig0000074a ), + .DPRA2(\blk00000003/blk000006cc/sig00001543 ), + .DPRA3(\blk00000003/blk000006cc/sig00001543 ), + .DPRA4(\blk00000003/blk000006cc/sig00001543 ), + .WCLK(clk), + .WE(\blk00000003/blk000006cc/sig00001568 ), + .SPO(\blk00000003/blk000006cc/sig00001554 ), + .DPO(\blk00000003/blk000006cc/sig00001566 ) + ); + RAM32X1D #( + .INIT ( 32'h00000001 )) + \blk00000003/blk000006cc/blk00000701 ( + .A0(\blk00000003/sig00000739 ), + .A1(\blk00000003/sig0000073a ), + .A2(\blk00000003/blk000006cc/sig00001543 ), + .A3(\blk00000003/blk000006cc/sig00001543 ), + .A4(\blk00000003/blk000006cc/sig00001543 ), + .D(\blk00000003/sig000008fc ), + .DPRA0(\blk00000003/sig0000074c ), + .DPRA1(\blk00000003/sig0000074a ), + .DPRA2(\blk00000003/blk000006cc/sig00001543 ), + .DPRA3(\blk00000003/blk000006cc/sig00001543 ), + .DPRA4(\blk00000003/blk000006cc/sig00001543 ), + .WCLK(clk), + .WE(\blk00000003/blk000006cc/sig00001568 ), + .SPO(\blk00000003/blk000006cc/sig00001553 ), + .DPO(\blk00000003/blk000006cc/sig00001565 ) + ); + RAM32X1D #( + .INIT ( 32'h00000001 )) + \blk00000003/blk000006cc/blk00000700 ( + .A0(\blk00000003/sig00000739 ), + .A1(\blk00000003/sig0000073a ), + .A2(\blk00000003/blk000006cc/sig00001543 ), + .A3(\blk00000003/blk000006cc/sig00001543 ), + .A4(\blk00000003/blk000006cc/sig00001543 ), + .D(\blk00000003/sig000008fd ), + .DPRA0(\blk00000003/sig0000074c ), + .DPRA1(\blk00000003/sig0000074a ), + .DPRA2(\blk00000003/blk000006cc/sig00001543 ), + .DPRA3(\blk00000003/blk000006cc/sig00001543 ), + .DPRA4(\blk00000003/blk000006cc/sig00001543 ), + .WCLK(clk), + .WE(\blk00000003/blk000006cc/sig00001568 ), + .SPO(\blk00000003/blk000006cc/sig00001552 ), + .DPO(\blk00000003/blk000006cc/sig00001564 ) + ); + RAM32X1D #( + .INIT ( 32'h00000002 )) + \blk00000003/blk000006cc/blk000006ff ( + .A0(\blk00000003/sig00000739 ), + .A1(\blk00000003/sig0000073a ), + .A2(\blk00000003/blk000006cc/sig00001543 ), + .A3(\blk00000003/blk000006cc/sig00001543 ), + .A4(\blk00000003/blk000006cc/sig00001543 ), + .D(\blk00000003/sig000008fe ), + .DPRA0(\blk00000003/sig0000074c ), + .DPRA1(\blk00000003/sig0000074a ), + .DPRA2(\blk00000003/blk000006cc/sig00001543 ), + .DPRA3(\blk00000003/blk000006cc/sig00001543 ), + .DPRA4(\blk00000003/blk000006cc/sig00001543 ), + .WCLK(clk), + .WE(\blk00000003/blk000006cc/sig00001568 ), + .SPO(\blk00000003/blk000006cc/sig00001551 ), + .DPO(\blk00000003/blk000006cc/sig00001563 ) + ); + RAM32X1D #( + .INIT ( 32'h00000003 )) + \blk00000003/blk000006cc/blk000006fe ( + .A0(\blk00000003/sig00000739 ), + .A1(\blk00000003/sig0000073a ), + .A2(\blk00000003/blk000006cc/sig00001543 ), + .A3(\blk00000003/blk000006cc/sig00001543 ), + .A4(\blk00000003/blk000006cc/sig00001543 ), + .D(\blk00000003/sig000008ff ), + .DPRA0(\blk00000003/sig0000074c ), + .DPRA1(\blk00000003/sig0000074a ), + .DPRA2(\blk00000003/blk000006cc/sig00001543 ), + .DPRA3(\blk00000003/blk000006cc/sig00001543 ), + .DPRA4(\blk00000003/blk000006cc/sig00001543 ), + .WCLK(clk), + .WE(\blk00000003/blk000006cc/sig00001568 ), + .SPO(\blk00000003/blk000006cc/sig00001550 ), + .DPO(\blk00000003/blk000006cc/sig00001562 ) + ); + RAM32X1D #( + .INIT ( 32'h00000001 )) + \blk00000003/blk000006cc/blk000006fd ( + .A0(\blk00000003/sig00000739 ), + .A1(\blk00000003/sig0000073a ), + .A2(\blk00000003/blk000006cc/sig00001543 ), + .A3(\blk00000003/blk000006cc/sig00001543 ), + .A4(\blk00000003/blk000006cc/sig00001543 ), + .D(\blk00000003/sig00000901 ), + .DPRA0(\blk00000003/sig0000074c ), + .DPRA1(\blk00000003/sig0000074a ), + .DPRA2(\blk00000003/blk000006cc/sig00001543 ), + .DPRA3(\blk00000003/blk000006cc/sig00001543 ), + .DPRA4(\blk00000003/blk000006cc/sig00001543 ), + .WCLK(clk), + .WE(\blk00000003/blk000006cc/sig00001568 ), + .SPO(\blk00000003/blk000006cc/sig0000154e ), + .DPO(\blk00000003/blk000006cc/sig00001560 ) + ); + RAM32X1D #( + .INIT ( 32'h00000000 )) + \blk00000003/blk000006cc/blk000006fc ( + .A0(\blk00000003/sig00000739 ), + .A1(\blk00000003/sig0000073a ), + .A2(\blk00000003/blk000006cc/sig00001543 ), + .A3(\blk00000003/blk000006cc/sig00001543 ), + .A4(\blk00000003/blk000006cc/sig00001543 ), + .D(\blk00000003/sig00000902 ), + .DPRA0(\blk00000003/sig0000074c ), + .DPRA1(\blk00000003/sig0000074a ), + .DPRA2(\blk00000003/blk000006cc/sig00001543 ), + .DPRA3(\blk00000003/blk000006cc/sig00001543 ), + .DPRA4(\blk00000003/blk000006cc/sig00001543 ), + .WCLK(clk), + .WE(\blk00000003/blk000006cc/sig00001568 ), + .SPO(\blk00000003/blk000006cc/sig0000154d ), + .DPO(\blk00000003/blk000006cc/sig0000155f ) + ); + RAM32X1D #( + .INIT ( 32'h00000003 )) + \blk00000003/blk000006cc/blk000006fb ( + .A0(\blk00000003/sig00000739 ), + .A1(\blk00000003/sig0000073a ), + .A2(\blk00000003/blk000006cc/sig00001543 ), + .A3(\blk00000003/blk000006cc/sig00001543 ), + .A4(\blk00000003/blk000006cc/sig00001543 ), + .D(\blk00000003/sig00000900 ), + .DPRA0(\blk00000003/sig0000074c ), + .DPRA1(\blk00000003/sig0000074a ), + .DPRA2(\blk00000003/blk000006cc/sig00001543 ), + .DPRA3(\blk00000003/blk000006cc/sig00001543 ), + .DPRA4(\blk00000003/blk000006cc/sig00001543 ), + .WCLK(clk), + .WE(\blk00000003/blk000006cc/sig00001568 ), + .SPO(\blk00000003/blk000006cc/sig0000154f ), + .DPO(\blk00000003/blk000006cc/sig00001561 ) + ); + RAM32X1D #( + .INIT ( 32'h00000002 )) + \blk00000003/blk000006cc/blk000006fa ( + .A0(\blk00000003/sig00000739 ), + .A1(\blk00000003/sig0000073a ), + .A2(\blk00000003/blk000006cc/sig00001543 ), + .A3(\blk00000003/blk000006cc/sig00001543 ), + .A4(\blk00000003/blk000006cc/sig00001543 ), + .D(\blk00000003/sig00000903 ), + .DPRA0(\blk00000003/sig0000074c ), + .DPRA1(\blk00000003/sig0000074a ), + .DPRA2(\blk00000003/blk000006cc/sig00001543 ), + .DPRA3(\blk00000003/blk000006cc/sig00001543 ), + .DPRA4(\blk00000003/blk000006cc/sig00001543 ), + .WCLK(clk), + .WE(\blk00000003/blk000006cc/sig00001568 ), + .SPO(\blk00000003/blk000006cc/sig0000154c ), + .DPO(\blk00000003/blk000006cc/sig0000155e ) + ); + RAM32X1D #( + .INIT ( 32'h00000000 )) + \blk00000003/blk000006cc/blk000006f9 ( + .A0(\blk00000003/sig00000739 ), + .A1(\blk00000003/sig0000073a ), + .A2(\blk00000003/blk000006cc/sig00001543 ), + .A3(\blk00000003/blk000006cc/sig00001543 ), + .A4(\blk00000003/blk000006cc/sig00001543 ), + .D(\blk00000003/sig00000904 ), + .DPRA0(\blk00000003/sig0000074c ), + .DPRA1(\blk00000003/sig0000074a ), + .DPRA2(\blk00000003/blk000006cc/sig00001543 ), + .DPRA3(\blk00000003/blk000006cc/sig00001543 ), + .DPRA4(\blk00000003/blk000006cc/sig00001543 ), + .WCLK(clk), + .WE(\blk00000003/blk000006cc/sig00001568 ), + .SPO(\blk00000003/blk000006cc/sig0000154b ), + .DPO(\blk00000003/blk000006cc/sig0000155d ) + ); + RAM32X1D #( + .INIT ( 32'h00000000 )) + \blk00000003/blk000006cc/blk000006f8 ( + .A0(\blk00000003/sig00000739 ), + .A1(\blk00000003/sig0000073a ), + .A2(\blk00000003/blk000006cc/sig00001543 ), + .A3(\blk00000003/blk000006cc/sig00001543 ), + .A4(\blk00000003/blk000006cc/sig00001543 ), + .D(\blk00000003/sig00000905 ), + .DPRA0(\blk00000003/sig0000074c ), + .DPRA1(\blk00000003/sig0000074a ), + .DPRA2(\blk00000003/blk000006cc/sig00001543 ), + .DPRA3(\blk00000003/blk000006cc/sig00001543 ), + .DPRA4(\blk00000003/blk000006cc/sig00001543 ), + .WCLK(clk), + .WE(\blk00000003/blk000006cc/sig00001568 ), + .SPO(\blk00000003/blk000006cc/sig0000154a ), + .DPO(\blk00000003/blk000006cc/sig0000155c ) + ); + RAM32X1D #( + .INIT ( 32'h00000002 )) + \blk00000003/blk000006cc/blk000006f7 ( + .A0(\blk00000003/sig00000739 ), + .A1(\blk00000003/sig0000073a ), + .A2(\blk00000003/blk000006cc/sig00001543 ), + .A3(\blk00000003/blk000006cc/sig00001543 ), + .A4(\blk00000003/blk000006cc/sig00001543 ), + .D(\blk00000003/sig00000906 ), + .DPRA0(\blk00000003/sig0000074c ), + .DPRA1(\blk00000003/sig0000074a ), + .DPRA2(\blk00000003/blk000006cc/sig00001543 ), + .DPRA3(\blk00000003/blk000006cc/sig00001543 ), + .DPRA4(\blk00000003/blk000006cc/sig00001543 ), + .WCLK(clk), + .WE(\blk00000003/blk000006cc/sig00001568 ), + .SPO(\blk00000003/blk000006cc/sig00001549 ), + .DPO(\blk00000003/blk000006cc/sig0000155b ) + ); + RAM32X1D #( + .INIT ( 32'h00000001 )) + \blk00000003/blk000006cc/blk000006f6 ( + .A0(\blk00000003/sig00000739 ), + .A1(\blk00000003/sig0000073a ), + .A2(\blk00000003/blk000006cc/sig00001543 ), + .A3(\blk00000003/blk000006cc/sig00001543 ), + .A4(\blk00000003/blk000006cc/sig00001543 ), + .D(\blk00000003/sig00000907 ), + .DPRA0(\blk00000003/sig0000074c ), + .DPRA1(\blk00000003/sig0000074a ), + .DPRA2(\blk00000003/blk000006cc/sig00001543 ), + .DPRA3(\blk00000003/blk000006cc/sig00001543 ), + .DPRA4(\blk00000003/blk000006cc/sig00001543 ), + .WCLK(clk), + .WE(\blk00000003/blk000006cc/sig00001568 ), + .SPO(\blk00000003/blk000006cc/sig00001548 ), + .DPO(\blk00000003/blk000006cc/sig0000155a ) + ); + RAM32X1D #( + .INIT ( 32'h00000003 )) + \blk00000003/blk000006cc/blk000006f5 ( + .A0(\blk00000003/sig00000739 ), + .A1(\blk00000003/sig0000073a ), + .A2(\blk00000003/blk000006cc/sig00001543 ), + .A3(\blk00000003/blk000006cc/sig00001543 ), + .A4(\blk00000003/blk000006cc/sig00001543 ), + .D(\blk00000003/sig00000908 ), + .DPRA0(\blk00000003/sig0000074c ), + .DPRA1(\blk00000003/sig0000074a ), + .DPRA2(\blk00000003/blk000006cc/sig00001543 ), + .DPRA3(\blk00000003/blk000006cc/sig00001543 ), + .DPRA4(\blk00000003/blk000006cc/sig00001543 ), + .WCLK(clk), + .WE(\blk00000003/blk000006cc/sig00001568 ), + .SPO(\blk00000003/blk000006cc/sig00001547 ), + .DPO(\blk00000003/blk000006cc/sig00001559 ) + ); + RAM32X1D #( + .INIT ( 32'h00000000 )) + \blk00000003/blk000006cc/blk000006f4 ( + .A0(\blk00000003/sig00000739 ), + .A1(\blk00000003/sig0000073a ), + .A2(\blk00000003/blk000006cc/sig00001543 ), + .A3(\blk00000003/blk000006cc/sig00001543 ), + .A4(\blk00000003/blk000006cc/sig00001543 ), + .D(\blk00000003/sig0000090a ), + .DPRA0(\blk00000003/sig0000074c ), + .DPRA1(\blk00000003/sig0000074a ), + .DPRA2(\blk00000003/blk000006cc/sig00001543 ), + .DPRA3(\blk00000003/blk000006cc/sig00001543 ), + .DPRA4(\blk00000003/blk000006cc/sig00001543 ), + .WCLK(clk), + .WE(\blk00000003/blk000006cc/sig00001568 ), + .SPO(\blk00000003/blk000006cc/sig00001545 ), + .DPO(\blk00000003/blk000006cc/sig00001557 ) + ); + RAM32X1D #( + .INIT ( 32'h00000001 )) + \blk00000003/blk000006cc/blk000006f3 ( + .A0(\blk00000003/sig00000739 ), + .A1(\blk00000003/sig0000073a ), + .A2(\blk00000003/blk000006cc/sig00001543 ), + .A3(\blk00000003/blk000006cc/sig00001543 ), + .A4(\blk00000003/blk000006cc/sig00001543 ), + .D(\blk00000003/sig0000090b ), + .DPRA0(\blk00000003/sig0000074c ), + .DPRA1(\blk00000003/sig0000074a ), + .DPRA2(\blk00000003/blk000006cc/sig00001543 ), + .DPRA3(\blk00000003/blk000006cc/sig00001543 ), + .DPRA4(\blk00000003/blk000006cc/sig00001543 ), + .WCLK(clk), + .WE(\blk00000003/blk000006cc/sig00001568 ), + .SPO(\blk00000003/blk000006cc/sig00001544 ), + .DPO(\blk00000003/blk000006cc/sig00001556 ) + ); + RAM32X1D #( + .INIT ( 32'h00000001 )) + \blk00000003/blk000006cc/blk000006f2 ( + .A0(\blk00000003/sig00000739 ), + .A1(\blk00000003/sig0000073a ), + .A2(\blk00000003/blk000006cc/sig00001543 ), + .A3(\blk00000003/blk000006cc/sig00001543 ), + .A4(\blk00000003/blk000006cc/sig00001543 ), + .D(\blk00000003/sig00000909 ), + .DPRA0(\blk00000003/sig0000074c ), + .DPRA1(\blk00000003/sig0000074a ), + .DPRA2(\blk00000003/blk000006cc/sig00001543 ), + .DPRA3(\blk00000003/blk000006cc/sig00001543 ), + .DPRA4(\blk00000003/blk000006cc/sig00001543 ), + .WCLK(clk), + .WE(\blk00000003/blk000006cc/sig00001568 ), + .SPO(\blk00000003/blk000006cc/sig00001546 ), + .DPO(\blk00000003/blk000006cc/sig00001558 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000006cc/blk000006f1 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk000006cc/sig00001567 ), + .Q(\blk00000003/sig000005a1 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000006cc/blk000006f0 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk000006cc/sig00001566 ), + .Q(\blk00000003/sig000005a2 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000006cc/blk000006ef ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk000006cc/sig00001565 ), + .Q(\blk00000003/sig000005a3 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000006cc/blk000006ee ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk000006cc/sig00001564 ), + .Q(\blk00000003/sig000005a4 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000006cc/blk000006ed ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk000006cc/sig00001563 ), + .Q(\blk00000003/sig000005a5 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000006cc/blk000006ec ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk000006cc/sig00001562 ), + .Q(\blk00000003/sig000005a6 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000006cc/blk000006eb ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk000006cc/sig00001561 ), + .Q(\blk00000003/sig000005a7 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000006cc/blk000006ea ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk000006cc/sig00001560 ), + .Q(\blk00000003/sig000005a8 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000006cc/blk000006e9 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk000006cc/sig0000155f ), + .Q(\blk00000003/sig000005a9 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000006cc/blk000006e8 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk000006cc/sig0000155e ), + .Q(\blk00000003/sig000005aa ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000006cc/blk000006e7 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk000006cc/sig0000155d ), + .Q(\blk00000003/sig000005ab ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000006cc/blk000006e6 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk000006cc/sig0000155c ), + .Q(\blk00000003/sig000005ac ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000006cc/blk000006e5 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk000006cc/sig0000155b ), + .Q(\blk00000003/sig000005ad ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000006cc/blk000006e4 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk000006cc/sig0000155a ), + .Q(\blk00000003/sig000005ae ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000006cc/blk000006e3 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk000006cc/sig00001559 ), + .Q(\blk00000003/sig000005af ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000006cc/blk000006e2 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk000006cc/sig00001558 ), + .Q(\blk00000003/sig000005b0 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000006cc/blk000006e1 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk000006cc/sig00001557 ), + .Q(\blk00000003/sig000005b1 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000006cc/blk000006e0 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk000006cc/sig00001556 ), + .Q(\blk00000003/sig000005b2 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000006cc/blk000006df ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk000006cc/sig00001555 ), + .Q(\blk00000003/sig0000090c ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000006cc/blk000006de ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk000006cc/sig00001554 ), + .Q(\blk00000003/sig0000090d ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000006cc/blk000006dd ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk000006cc/sig00001553 ), + .Q(\blk00000003/sig0000090e ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000006cc/blk000006dc ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk000006cc/sig00001552 ), + .Q(\blk00000003/sig0000090f ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000006cc/blk000006db ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk000006cc/sig00001551 ), + .Q(\blk00000003/sig00000910 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000006cc/blk000006da ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk000006cc/sig00001550 ), + .Q(\blk00000003/sig00000911 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000006cc/blk000006d9 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk000006cc/sig0000154f ), + .Q(\blk00000003/sig00000912 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000006cc/blk000006d8 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk000006cc/sig0000154e ), + .Q(\blk00000003/sig00000913 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000006cc/blk000006d7 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk000006cc/sig0000154d ), + .Q(\blk00000003/sig00000914 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000006cc/blk000006d6 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk000006cc/sig0000154c ), + .Q(\blk00000003/sig00000915 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000006cc/blk000006d5 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk000006cc/sig0000154b ), + .Q(\blk00000003/sig00000916 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000006cc/blk000006d4 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk000006cc/sig0000154a ), + .Q(\blk00000003/sig00000917 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000006cc/blk000006d3 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk000006cc/sig00001549 ), + .Q(\blk00000003/sig00000918 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000006cc/blk000006d2 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk000006cc/sig00001548 ), + .Q(\blk00000003/sig00000919 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000006cc/blk000006d1 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk000006cc/sig00001547 ), + .Q(\blk00000003/sig0000091a ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000006cc/blk000006d0 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk000006cc/sig00001546 ), + .Q(\blk00000003/sig0000091b ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000006cc/blk000006cf ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk000006cc/sig00001545 ), + .Q(\blk00000003/sig0000091c ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000006cc/blk000006ce ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk000006cc/sig00001544 ), + .Q(\blk00000003/sig0000091d ) + ); + GND \blk00000003/blk000006cc/blk000006cd ( + .G(\blk00000003/blk000006cc/sig00001543 ) + ); + LUT2 #( + .INIT ( 4'h8 )) + \blk00000003/blk00000705/blk0000072b ( + .I0(ce), + .I1(\blk00000003/sig00000741 ), + .O(\blk00000003/blk00000705/sig000015a7 ) + ); + RAM32X1D #( + .INIT ( 32'h00000001 )) + \blk00000003/blk00000705/blk0000072a ( + .A0(\blk00000003/sig0000073b ), + .A1(\blk00000003/sig0000073c ), + .A2(\blk00000003/blk00000705/sig00001594 ), + .A3(\blk00000003/blk00000705/sig00001594 ), + .A4(\blk00000003/blk00000705/sig00001594 ), + .D(\blk00000003/sig0000090c ), + .DPRA0(\blk00000003/sig0000074d ), + .DPRA1(\blk00000003/sig0000074b ), + .DPRA2(\blk00000003/blk00000705/sig00001594 ), + .DPRA3(\blk00000003/blk00000705/sig00001594 ), + .DPRA4(\blk00000003/blk00000705/sig00001594 ), + .WCLK(clk), + .WE(\blk00000003/blk00000705/sig000015a7 ), + .SPO(\NLW_blk00000003/blk00000705/blk0000072a_SPO_UNCONNECTED ), + .DPO(\blk00000003/blk00000705/sig000015a6 ) + ); + RAM32X1D #( + .INIT ( 32'h00000003 )) + \blk00000003/blk00000705/blk00000729 ( + .A0(\blk00000003/sig0000073b ), + .A1(\blk00000003/sig0000073c ), + .A2(\blk00000003/blk00000705/sig00001594 ), + .A3(\blk00000003/blk00000705/sig00001594 ), + .A4(\blk00000003/blk00000705/sig00001594 ), + .D(\blk00000003/sig0000090d ), + .DPRA0(\blk00000003/sig0000074d ), + .DPRA1(\blk00000003/sig0000074b ), + .DPRA2(\blk00000003/blk00000705/sig00001594 ), + .DPRA3(\blk00000003/blk00000705/sig00001594 ), + .DPRA4(\blk00000003/blk00000705/sig00001594 ), + .WCLK(clk), + .WE(\blk00000003/blk00000705/sig000015a7 ), + .SPO(\NLW_blk00000003/blk00000705/blk00000729_SPO_UNCONNECTED ), + .DPO(\blk00000003/blk00000705/sig000015a5 ) + ); + RAM32X1D #( + .INIT ( 32'h00000001 )) + \blk00000003/blk00000705/blk00000728 ( + .A0(\blk00000003/sig0000073b ), + .A1(\blk00000003/sig0000073c ), + .A2(\blk00000003/blk00000705/sig00001594 ), + .A3(\blk00000003/blk00000705/sig00001594 ), + .A4(\blk00000003/blk00000705/sig00001594 ), + .D(\blk00000003/sig0000090e ), + .DPRA0(\blk00000003/sig0000074d ), + .DPRA1(\blk00000003/sig0000074b ), + .DPRA2(\blk00000003/blk00000705/sig00001594 ), + .DPRA3(\blk00000003/blk00000705/sig00001594 ), + .DPRA4(\blk00000003/blk00000705/sig00001594 ), + .WCLK(clk), + .WE(\blk00000003/blk00000705/sig000015a7 ), + .SPO(\NLW_blk00000003/blk00000705/blk00000728_SPO_UNCONNECTED ), + .DPO(\blk00000003/blk00000705/sig000015a4 ) + ); + RAM32X1D #( + .INIT ( 32'h00000002 )) + \blk00000003/blk00000705/blk00000727 ( + .A0(\blk00000003/sig0000073b ), + .A1(\blk00000003/sig0000073c ), + .A2(\blk00000003/blk00000705/sig00001594 ), + .A3(\blk00000003/blk00000705/sig00001594 ), + .A4(\blk00000003/blk00000705/sig00001594 ), + .D(\blk00000003/sig0000090f ), + .DPRA0(\blk00000003/sig0000074d ), + .DPRA1(\blk00000003/sig0000074b ), + .DPRA2(\blk00000003/blk00000705/sig00001594 ), + .DPRA3(\blk00000003/blk00000705/sig00001594 ), + .DPRA4(\blk00000003/blk00000705/sig00001594 ), + .WCLK(clk), + .WE(\blk00000003/blk00000705/sig000015a7 ), + .SPO(\NLW_blk00000003/blk00000705/blk00000727_SPO_UNCONNECTED ), + .DPO(\blk00000003/blk00000705/sig000015a3 ) + ); + RAM32X1D #( + .INIT ( 32'h00000000 )) + \blk00000003/blk00000705/blk00000726 ( + .A0(\blk00000003/sig0000073b ), + .A1(\blk00000003/sig0000073c ), + .A2(\blk00000003/blk00000705/sig00001594 ), + .A3(\blk00000003/blk00000705/sig00001594 ), + .A4(\blk00000003/blk00000705/sig00001594 ), + .D(\blk00000003/sig00000910 ), + .DPRA0(\blk00000003/sig0000074d ), + .DPRA1(\blk00000003/sig0000074b ), + .DPRA2(\blk00000003/blk00000705/sig00001594 ), + .DPRA3(\blk00000003/blk00000705/sig00001594 ), + .DPRA4(\blk00000003/blk00000705/sig00001594 ), + .WCLK(clk), + .WE(\blk00000003/blk00000705/sig000015a7 ), + .SPO(\NLW_blk00000003/blk00000705/blk00000726_SPO_UNCONNECTED ), + .DPO(\blk00000003/blk00000705/sig000015a2 ) + ); + RAM32X1D #( + .INIT ( 32'h00000001 )) + \blk00000003/blk00000705/blk00000725 ( + .A0(\blk00000003/sig0000073b ), + .A1(\blk00000003/sig0000073c ), + .A2(\blk00000003/blk00000705/sig00001594 ), + .A3(\blk00000003/blk00000705/sig00001594 ), + .A4(\blk00000003/blk00000705/sig00001594 ), + .D(\blk00000003/sig00000911 ), + .DPRA0(\blk00000003/sig0000074d ), + .DPRA1(\blk00000003/sig0000074b ), + .DPRA2(\blk00000003/blk00000705/sig00001594 ), + .DPRA3(\blk00000003/blk00000705/sig00001594 ), + .DPRA4(\blk00000003/blk00000705/sig00001594 ), + .WCLK(clk), + .WE(\blk00000003/blk00000705/sig000015a7 ), + .SPO(\NLW_blk00000003/blk00000705/blk00000725_SPO_UNCONNECTED ), + .DPO(\blk00000003/blk00000705/sig000015a1 ) + ); + RAM32X1D #( + .INIT ( 32'h00000002 )) + \blk00000003/blk00000705/blk00000724 ( + .A0(\blk00000003/sig0000073b ), + .A1(\blk00000003/sig0000073c ), + .A2(\blk00000003/blk00000705/sig00001594 ), + .A3(\blk00000003/blk00000705/sig00001594 ), + .A4(\blk00000003/blk00000705/sig00001594 ), + .D(\blk00000003/sig00000913 ), + .DPRA0(\blk00000003/sig0000074d ), + .DPRA1(\blk00000003/sig0000074b ), + .DPRA2(\blk00000003/blk00000705/sig00001594 ), + .DPRA3(\blk00000003/blk00000705/sig00001594 ), + .DPRA4(\blk00000003/blk00000705/sig00001594 ), + .WCLK(clk), + .WE(\blk00000003/blk00000705/sig000015a7 ), + .SPO(\NLW_blk00000003/blk00000705/blk00000724_SPO_UNCONNECTED ), + .DPO(\blk00000003/blk00000705/sig0000159f ) + ); + RAM32X1D #( + .INIT ( 32'h00000000 )) + \blk00000003/blk00000705/blk00000723 ( + .A0(\blk00000003/sig0000073b ), + .A1(\blk00000003/sig0000073c ), + .A2(\blk00000003/blk00000705/sig00001594 ), + .A3(\blk00000003/blk00000705/sig00001594 ), + .A4(\blk00000003/blk00000705/sig00001594 ), + .D(\blk00000003/sig00000914 ), + .DPRA0(\blk00000003/sig0000074d ), + .DPRA1(\blk00000003/sig0000074b ), + .DPRA2(\blk00000003/blk00000705/sig00001594 ), + .DPRA3(\blk00000003/blk00000705/sig00001594 ), + .DPRA4(\blk00000003/blk00000705/sig00001594 ), + .WCLK(clk), + .WE(\blk00000003/blk00000705/sig000015a7 ), + .SPO(\NLW_blk00000003/blk00000705/blk00000723_SPO_UNCONNECTED ), + .DPO(\blk00000003/blk00000705/sig0000159e ) + ); + RAM32X1D #( + .INIT ( 32'h00000001 )) + \blk00000003/blk00000705/blk00000722 ( + .A0(\blk00000003/sig0000073b ), + .A1(\blk00000003/sig0000073c ), + .A2(\blk00000003/blk00000705/sig00001594 ), + .A3(\blk00000003/blk00000705/sig00001594 ), + .A4(\blk00000003/blk00000705/sig00001594 ), + .D(\blk00000003/sig00000912 ), + .DPRA0(\blk00000003/sig0000074d ), + .DPRA1(\blk00000003/sig0000074b ), + .DPRA2(\blk00000003/blk00000705/sig00001594 ), + .DPRA3(\blk00000003/blk00000705/sig00001594 ), + .DPRA4(\blk00000003/blk00000705/sig00001594 ), + .WCLK(clk), + .WE(\blk00000003/blk00000705/sig000015a7 ), + .SPO(\NLW_blk00000003/blk00000705/blk00000722_SPO_UNCONNECTED ), + .DPO(\blk00000003/blk00000705/sig000015a0 ) + ); + RAM32X1D #( + .INIT ( 32'h00000000 )) + \blk00000003/blk00000705/blk00000721 ( + .A0(\blk00000003/sig0000073b ), + .A1(\blk00000003/sig0000073c ), + .A2(\blk00000003/blk00000705/sig00001594 ), + .A3(\blk00000003/blk00000705/sig00001594 ), + .A4(\blk00000003/blk00000705/sig00001594 ), + .D(\blk00000003/sig00000915 ), + .DPRA0(\blk00000003/sig0000074d ), + .DPRA1(\blk00000003/sig0000074b ), + .DPRA2(\blk00000003/blk00000705/sig00001594 ), + .DPRA3(\blk00000003/blk00000705/sig00001594 ), + .DPRA4(\blk00000003/blk00000705/sig00001594 ), + .WCLK(clk), + .WE(\blk00000003/blk00000705/sig000015a7 ), + .SPO(\NLW_blk00000003/blk00000705/blk00000721_SPO_UNCONNECTED ), + .DPO(\blk00000003/blk00000705/sig0000159d ) + ); + RAM32X1D #( + .INIT ( 32'h00000000 )) + \blk00000003/blk00000705/blk00000720 ( + .A0(\blk00000003/sig0000073b ), + .A1(\blk00000003/sig0000073c ), + .A2(\blk00000003/blk00000705/sig00001594 ), + .A3(\blk00000003/blk00000705/sig00001594 ), + .A4(\blk00000003/blk00000705/sig00001594 ), + .D(\blk00000003/sig00000916 ), + .DPRA0(\blk00000003/sig0000074d ), + .DPRA1(\blk00000003/sig0000074b ), + .DPRA2(\blk00000003/blk00000705/sig00001594 ), + .DPRA3(\blk00000003/blk00000705/sig00001594 ), + .DPRA4(\blk00000003/blk00000705/sig00001594 ), + .WCLK(clk), + .WE(\blk00000003/blk00000705/sig000015a7 ), + .SPO(\NLW_blk00000003/blk00000705/blk00000720_SPO_UNCONNECTED ), + .DPO(\blk00000003/blk00000705/sig0000159c ) + ); + RAM32X1D #( + .INIT ( 32'h00000003 )) + \blk00000003/blk00000705/blk0000071f ( + .A0(\blk00000003/sig0000073b ), + .A1(\blk00000003/sig0000073c ), + .A2(\blk00000003/blk00000705/sig00001594 ), + .A3(\blk00000003/blk00000705/sig00001594 ), + .A4(\blk00000003/blk00000705/sig00001594 ), + .D(\blk00000003/sig00000917 ), + .DPRA0(\blk00000003/sig0000074d ), + .DPRA1(\blk00000003/sig0000074b ), + .DPRA2(\blk00000003/blk00000705/sig00001594 ), + .DPRA3(\blk00000003/blk00000705/sig00001594 ), + .DPRA4(\blk00000003/blk00000705/sig00001594 ), + .WCLK(clk), + .WE(\blk00000003/blk00000705/sig000015a7 ), + .SPO(\NLW_blk00000003/blk00000705/blk0000071f_SPO_UNCONNECTED ), + .DPO(\blk00000003/blk00000705/sig0000159b ) + ); + RAM32X1D #( + .INIT ( 32'h00000000 )) + \blk00000003/blk00000705/blk0000071e ( + .A0(\blk00000003/sig0000073b ), + .A1(\blk00000003/sig0000073c ), + .A2(\blk00000003/blk00000705/sig00001594 ), + .A3(\blk00000003/blk00000705/sig00001594 ), + .A4(\blk00000003/blk00000705/sig00001594 ), + .D(\blk00000003/sig00000918 ), + .DPRA0(\blk00000003/sig0000074d ), + .DPRA1(\blk00000003/sig0000074b ), + .DPRA2(\blk00000003/blk00000705/sig00001594 ), + .DPRA3(\blk00000003/blk00000705/sig00001594 ), + .DPRA4(\blk00000003/blk00000705/sig00001594 ), + .WCLK(clk), + .WE(\blk00000003/blk00000705/sig000015a7 ), + .SPO(\NLW_blk00000003/blk00000705/blk0000071e_SPO_UNCONNECTED ), + .DPO(\blk00000003/blk00000705/sig0000159a ) + ); + RAM32X1D #( + .INIT ( 32'h00000001 )) + \blk00000003/blk00000705/blk0000071d ( + .A0(\blk00000003/sig0000073b ), + .A1(\blk00000003/sig0000073c ), + .A2(\blk00000003/blk00000705/sig00001594 ), + .A3(\blk00000003/blk00000705/sig00001594 ), + .A4(\blk00000003/blk00000705/sig00001594 ), + .D(\blk00000003/sig00000919 ), + .DPRA0(\blk00000003/sig0000074d ), + .DPRA1(\blk00000003/sig0000074b ), + .DPRA2(\blk00000003/blk00000705/sig00001594 ), + .DPRA3(\blk00000003/blk00000705/sig00001594 ), + .DPRA4(\blk00000003/blk00000705/sig00001594 ), + .WCLK(clk), + .WE(\blk00000003/blk00000705/sig000015a7 ), + .SPO(\NLW_blk00000003/blk00000705/blk0000071d_SPO_UNCONNECTED ), + .DPO(\blk00000003/blk00000705/sig00001599 ) + ); + RAM32X1D #( + .INIT ( 32'h00000001 )) + \blk00000003/blk00000705/blk0000071c ( + .A0(\blk00000003/sig0000073b ), + .A1(\blk00000003/sig0000073c ), + .A2(\blk00000003/blk00000705/sig00001594 ), + .A3(\blk00000003/blk00000705/sig00001594 ), + .A4(\blk00000003/blk00000705/sig00001594 ), + .D(\blk00000003/sig0000091a ), + .DPRA0(\blk00000003/sig0000074d ), + .DPRA1(\blk00000003/sig0000074b ), + .DPRA2(\blk00000003/blk00000705/sig00001594 ), + .DPRA3(\blk00000003/blk00000705/sig00001594 ), + .DPRA4(\blk00000003/blk00000705/sig00001594 ), + .WCLK(clk), + .WE(\blk00000003/blk00000705/sig000015a7 ), + .SPO(\NLW_blk00000003/blk00000705/blk0000071c_SPO_UNCONNECTED ), + .DPO(\blk00000003/blk00000705/sig00001598 ) + ); + RAM32X1D #( + .INIT ( 32'h00000000 )) + \blk00000003/blk00000705/blk0000071b ( + .A0(\blk00000003/sig0000073b ), + .A1(\blk00000003/sig0000073c ), + .A2(\blk00000003/blk00000705/sig00001594 ), + .A3(\blk00000003/blk00000705/sig00001594 ), + .A4(\blk00000003/blk00000705/sig00001594 ), + .D(\blk00000003/sig0000091c ), + .DPRA0(\blk00000003/sig0000074d ), + .DPRA1(\blk00000003/sig0000074b ), + .DPRA2(\blk00000003/blk00000705/sig00001594 ), + .DPRA3(\blk00000003/blk00000705/sig00001594 ), + .DPRA4(\blk00000003/blk00000705/sig00001594 ), + .WCLK(clk), + .WE(\blk00000003/blk00000705/sig000015a7 ), + .SPO(\NLW_blk00000003/blk00000705/blk0000071b_SPO_UNCONNECTED ), + .DPO(\blk00000003/blk00000705/sig00001596 ) + ); + RAM32X1D #( + .INIT ( 32'h00000002 )) + \blk00000003/blk00000705/blk0000071a ( + .A0(\blk00000003/sig0000073b ), + .A1(\blk00000003/sig0000073c ), + .A2(\blk00000003/blk00000705/sig00001594 ), + .A3(\blk00000003/blk00000705/sig00001594 ), + .A4(\blk00000003/blk00000705/sig00001594 ), + .D(\blk00000003/sig0000091d ), + .DPRA0(\blk00000003/sig0000074d ), + .DPRA1(\blk00000003/sig0000074b ), + .DPRA2(\blk00000003/blk00000705/sig00001594 ), + .DPRA3(\blk00000003/blk00000705/sig00001594 ), + .DPRA4(\blk00000003/blk00000705/sig00001594 ), + .WCLK(clk), + .WE(\blk00000003/blk00000705/sig000015a7 ), + .SPO(\NLW_blk00000003/blk00000705/blk0000071a_SPO_UNCONNECTED ), + .DPO(\blk00000003/blk00000705/sig00001595 ) + ); + RAM32X1D #( + .INIT ( 32'h00000000 )) + \blk00000003/blk00000705/blk00000719 ( + .A0(\blk00000003/sig0000073b ), + .A1(\blk00000003/sig0000073c ), + .A2(\blk00000003/blk00000705/sig00001594 ), + .A3(\blk00000003/blk00000705/sig00001594 ), + .A4(\blk00000003/blk00000705/sig00001594 ), + .D(\blk00000003/sig0000091b ), + .DPRA0(\blk00000003/sig0000074d ), + .DPRA1(\blk00000003/sig0000074b ), + .DPRA2(\blk00000003/blk00000705/sig00001594 ), + .DPRA3(\blk00000003/blk00000705/sig00001594 ), + .DPRA4(\blk00000003/blk00000705/sig00001594 ), + .WCLK(clk), + .WE(\blk00000003/blk00000705/sig000015a7 ), + .SPO(\NLW_blk00000003/blk00000705/blk00000719_SPO_UNCONNECTED ), + .DPO(\blk00000003/blk00000705/sig00001597 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000705/blk00000718 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk00000705/sig000015a6 ), + .Q(\blk00000003/sig000003a9 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000705/blk00000717 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk00000705/sig000015a5 ), + .Q(\blk00000003/sig000003aa ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000705/blk00000716 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk00000705/sig000015a4 ), + .Q(\blk00000003/sig000003ab ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000705/blk00000715 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk00000705/sig000015a3 ), + .Q(\blk00000003/sig000003ac ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000705/blk00000714 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk00000705/sig000015a2 ), + .Q(\blk00000003/sig000003ad ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000705/blk00000713 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk00000705/sig000015a1 ), + .Q(\blk00000003/sig000003ae ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000705/blk00000712 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk00000705/sig000015a0 ), + .Q(\blk00000003/sig000003af ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000705/blk00000711 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk00000705/sig0000159f ), + .Q(\blk00000003/sig000003b0 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000705/blk00000710 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk00000705/sig0000159e ), + .Q(\blk00000003/sig000003b1 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000705/blk0000070f ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk00000705/sig0000159d ), + .Q(\blk00000003/sig000003b2 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000705/blk0000070e ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk00000705/sig0000159c ), + .Q(\blk00000003/sig000003b3 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000705/blk0000070d ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk00000705/sig0000159b ), + .Q(\blk00000003/sig000003b4 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000705/blk0000070c ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk00000705/sig0000159a ), + .Q(\blk00000003/sig000003b5 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000705/blk0000070b ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk00000705/sig00001599 ), + .Q(\blk00000003/sig000003b6 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000705/blk0000070a ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk00000705/sig00001598 ), + .Q(\blk00000003/sig000003b7 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000705/blk00000709 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk00000705/sig00001597 ), + .Q(\blk00000003/sig000003b8 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000705/blk00000708 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk00000705/sig00001596 ), + .Q(\blk00000003/sig000003b9 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000705/blk00000707 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk00000705/sig00001595 ), + .Q(\blk00000003/sig000003ba ) + ); + GND \blk00000003/blk00000705/blk00000706 ( + .G(\blk00000003/blk00000705/sig00001594 ) + ); + LUT2 #( + .INIT ( 4'h8 )) + \blk00000003/blk0000075c/blk00000782 ( + .I0(ce), + .I1(\blk00000003/sig00000235 ), + .O(\blk00000003/blk0000075c/sig000015e4 ) + ); + RAM32X1D #( + .INIT ( 32'h00000000 )) + \blk00000003/blk0000075c/blk00000781 ( + .A0(\blk00000003/sig0000023c ), + .A1(\blk00000003/blk0000075c/sig000015d1 ), + .A2(\blk00000003/blk0000075c/sig000015d1 ), + .A3(\blk00000003/blk0000075c/sig000015d1 ), + .A4(\blk00000003/blk0000075c/sig000015d1 ), + .D(\blk00000003/sig000008b2 ), + .DPRA0(\blk00000003/sig0000091f ), + .DPRA1(\blk00000003/blk0000075c/sig000015d1 ), + .DPRA2(\blk00000003/blk0000075c/sig000015d1 ), + .DPRA3(\blk00000003/blk0000075c/sig000015d1 ), + .DPRA4(\blk00000003/blk0000075c/sig000015d1 ), + .WCLK(clk), + .WE(\blk00000003/blk0000075c/sig000015e4 ), + .SPO(\NLW_blk00000003/blk0000075c/blk00000781_SPO_UNCONNECTED ), + .DPO(\blk00000003/blk0000075c/sig000015e3 ) + ); + RAM32X1D #( + .INIT ( 32'h00000001 )) + \blk00000003/blk0000075c/blk00000780 ( + .A0(\blk00000003/sig0000023c ), + .A1(\blk00000003/blk0000075c/sig000015d1 ), + .A2(\blk00000003/blk0000075c/sig000015d1 ), + .A3(\blk00000003/blk0000075c/sig000015d1 ), + .A4(\blk00000003/blk0000075c/sig000015d1 ), + .D(\blk00000003/sig000008b3 ), + .DPRA0(\blk00000003/sig0000091f ), + .DPRA1(\blk00000003/blk0000075c/sig000015d1 ), + .DPRA2(\blk00000003/blk0000075c/sig000015d1 ), + .DPRA3(\blk00000003/blk0000075c/sig000015d1 ), + .DPRA4(\blk00000003/blk0000075c/sig000015d1 ), + .WCLK(clk), + .WE(\blk00000003/blk0000075c/sig000015e4 ), + .SPO(\NLW_blk00000003/blk0000075c/blk00000780_SPO_UNCONNECTED ), + .DPO(\blk00000003/blk0000075c/sig000015e2 ) + ); + RAM32X1D #( + .INIT ( 32'h00000001 )) + \blk00000003/blk0000075c/blk0000077f ( + .A0(\blk00000003/sig0000023c ), + .A1(\blk00000003/blk0000075c/sig000015d1 ), + .A2(\blk00000003/blk0000075c/sig000015d1 ), + .A3(\blk00000003/blk0000075c/sig000015d1 ), + .A4(\blk00000003/blk0000075c/sig000015d1 ), + .D(\blk00000003/sig000008b4 ), + .DPRA0(\blk00000003/sig0000091f ), + .DPRA1(\blk00000003/blk0000075c/sig000015d1 ), + .DPRA2(\blk00000003/blk0000075c/sig000015d1 ), + .DPRA3(\blk00000003/blk0000075c/sig000015d1 ), + .DPRA4(\blk00000003/blk0000075c/sig000015d1 ), + .WCLK(clk), + .WE(\blk00000003/blk0000075c/sig000015e4 ), + .SPO(\NLW_blk00000003/blk0000075c/blk0000077f_SPO_UNCONNECTED ), + .DPO(\blk00000003/blk0000075c/sig000015e1 ) + ); + RAM32X1D #( + .INIT ( 32'h00000001 )) + \blk00000003/blk0000075c/blk0000077e ( + .A0(\blk00000003/sig0000023c ), + .A1(\blk00000003/blk0000075c/sig000015d1 ), + .A2(\blk00000003/blk0000075c/sig000015d1 ), + .A3(\blk00000003/blk0000075c/sig000015d1 ), + .A4(\blk00000003/blk0000075c/sig000015d1 ), + .D(\blk00000003/sig000008b5 ), + .DPRA0(\blk00000003/sig0000091f ), + .DPRA1(\blk00000003/blk0000075c/sig000015d1 ), + .DPRA2(\blk00000003/blk0000075c/sig000015d1 ), + .DPRA3(\blk00000003/blk0000075c/sig000015d1 ), + .DPRA4(\blk00000003/blk0000075c/sig000015d1 ), + .WCLK(clk), + .WE(\blk00000003/blk0000075c/sig000015e4 ), + .SPO(\NLW_blk00000003/blk0000075c/blk0000077e_SPO_UNCONNECTED ), + .DPO(\blk00000003/blk0000075c/sig000015e0 ) + ); + RAM32X1D #( + .INIT ( 32'h00000001 )) + \blk00000003/blk0000075c/blk0000077d ( + .A0(\blk00000003/sig0000023c ), + .A1(\blk00000003/blk0000075c/sig000015d1 ), + .A2(\blk00000003/blk0000075c/sig000015d1 ), + .A3(\blk00000003/blk0000075c/sig000015d1 ), + .A4(\blk00000003/blk0000075c/sig000015d1 ), + .D(\blk00000003/sig000008b6 ), + .DPRA0(\blk00000003/sig0000091f ), + .DPRA1(\blk00000003/blk0000075c/sig000015d1 ), + .DPRA2(\blk00000003/blk0000075c/sig000015d1 ), + .DPRA3(\blk00000003/blk0000075c/sig000015d1 ), + .DPRA4(\blk00000003/blk0000075c/sig000015d1 ), + .WCLK(clk), + .WE(\blk00000003/blk0000075c/sig000015e4 ), + .SPO(\NLW_blk00000003/blk0000075c/blk0000077d_SPO_UNCONNECTED ), + .DPO(\blk00000003/blk0000075c/sig000015df ) + ); + RAM32X1D #( + .INIT ( 32'h00000001 )) + \blk00000003/blk0000075c/blk0000077c ( + .A0(\blk00000003/sig0000023c ), + .A1(\blk00000003/blk0000075c/sig000015d1 ), + .A2(\blk00000003/blk0000075c/sig000015d1 ), + .A3(\blk00000003/blk0000075c/sig000015d1 ), + .A4(\blk00000003/blk0000075c/sig000015d1 ), + .D(\blk00000003/sig000008b7 ), + .DPRA0(\blk00000003/sig0000091f ), + .DPRA1(\blk00000003/blk0000075c/sig000015d1 ), + .DPRA2(\blk00000003/blk0000075c/sig000015d1 ), + .DPRA3(\blk00000003/blk0000075c/sig000015d1 ), + .DPRA4(\blk00000003/blk0000075c/sig000015d1 ), + .WCLK(clk), + .WE(\blk00000003/blk0000075c/sig000015e4 ), + .SPO(\NLW_blk00000003/blk0000075c/blk0000077c_SPO_UNCONNECTED ), + .DPO(\blk00000003/blk0000075c/sig000015de ) + ); + RAM32X1D #( + .INIT ( 32'h00000001 )) + \blk00000003/blk0000075c/blk0000077b ( + .A0(\blk00000003/sig0000023c ), + .A1(\blk00000003/blk0000075c/sig000015d1 ), + .A2(\blk00000003/blk0000075c/sig000015d1 ), + .A3(\blk00000003/blk0000075c/sig000015d1 ), + .A4(\blk00000003/blk0000075c/sig000015d1 ), + .D(\blk00000003/sig000008b9 ), + .DPRA0(\blk00000003/sig0000091f ), + .DPRA1(\blk00000003/blk0000075c/sig000015d1 ), + .DPRA2(\blk00000003/blk0000075c/sig000015d1 ), + .DPRA3(\blk00000003/blk0000075c/sig000015d1 ), + .DPRA4(\blk00000003/blk0000075c/sig000015d1 ), + .WCLK(clk), + .WE(\blk00000003/blk0000075c/sig000015e4 ), + .SPO(\NLW_blk00000003/blk0000075c/blk0000077b_SPO_UNCONNECTED ), + .DPO(\blk00000003/blk0000075c/sig000015dc ) + ); + RAM32X1D #( + .INIT ( 32'h00000001 )) + \blk00000003/blk0000075c/blk0000077a ( + .A0(\blk00000003/sig0000023c ), + .A1(\blk00000003/blk0000075c/sig000015d1 ), + .A2(\blk00000003/blk0000075c/sig000015d1 ), + .A3(\blk00000003/blk0000075c/sig000015d1 ), + .A4(\blk00000003/blk0000075c/sig000015d1 ), + .D(\blk00000003/sig000008ba ), + .DPRA0(\blk00000003/sig0000091f ), + .DPRA1(\blk00000003/blk0000075c/sig000015d1 ), + .DPRA2(\blk00000003/blk0000075c/sig000015d1 ), + .DPRA3(\blk00000003/blk0000075c/sig000015d1 ), + .DPRA4(\blk00000003/blk0000075c/sig000015d1 ), + .WCLK(clk), + .WE(\blk00000003/blk0000075c/sig000015e4 ), + .SPO(\NLW_blk00000003/blk0000075c/blk0000077a_SPO_UNCONNECTED ), + .DPO(\blk00000003/blk0000075c/sig000015db ) + ); + RAM32X1D #( + .INIT ( 32'h00000001 )) + \blk00000003/blk0000075c/blk00000779 ( + .A0(\blk00000003/sig0000023c ), + .A1(\blk00000003/blk0000075c/sig000015d1 ), + .A2(\blk00000003/blk0000075c/sig000015d1 ), + .A3(\blk00000003/blk0000075c/sig000015d1 ), + .A4(\blk00000003/blk0000075c/sig000015d1 ), + .D(\blk00000003/sig000008b8 ), + .DPRA0(\blk00000003/sig0000091f ), + .DPRA1(\blk00000003/blk0000075c/sig000015d1 ), + .DPRA2(\blk00000003/blk0000075c/sig000015d1 ), + .DPRA3(\blk00000003/blk0000075c/sig000015d1 ), + .DPRA4(\blk00000003/blk0000075c/sig000015d1 ), + .WCLK(clk), + .WE(\blk00000003/blk0000075c/sig000015e4 ), + .SPO(\NLW_blk00000003/blk0000075c/blk00000779_SPO_UNCONNECTED ), + .DPO(\blk00000003/blk0000075c/sig000015dd ) + ); + RAM32X1D #( + .INIT ( 32'h00000001 )) + \blk00000003/blk0000075c/blk00000778 ( + .A0(\blk00000003/sig0000023c ), + .A1(\blk00000003/blk0000075c/sig000015d1 ), + .A2(\blk00000003/blk0000075c/sig000015d1 ), + .A3(\blk00000003/blk0000075c/sig000015d1 ), + .A4(\blk00000003/blk0000075c/sig000015d1 ), + .D(\blk00000003/sig000008bb ), + .DPRA0(\blk00000003/sig0000091f ), + .DPRA1(\blk00000003/blk0000075c/sig000015d1 ), + .DPRA2(\blk00000003/blk0000075c/sig000015d1 ), + .DPRA3(\blk00000003/blk0000075c/sig000015d1 ), + .DPRA4(\blk00000003/blk0000075c/sig000015d1 ), + .WCLK(clk), + .WE(\blk00000003/blk0000075c/sig000015e4 ), + .SPO(\NLW_blk00000003/blk0000075c/blk00000778_SPO_UNCONNECTED ), + .DPO(\blk00000003/blk0000075c/sig000015da ) + ); + RAM32X1D #( + .INIT ( 32'h00000001 )) + \blk00000003/blk0000075c/blk00000777 ( + .A0(\blk00000003/sig0000023c ), + .A1(\blk00000003/blk0000075c/sig000015d1 ), + .A2(\blk00000003/blk0000075c/sig000015d1 ), + .A3(\blk00000003/blk0000075c/sig000015d1 ), + .A4(\blk00000003/blk0000075c/sig000015d1 ), + .D(\blk00000003/sig000008bc ), + .DPRA0(\blk00000003/sig0000091f ), + .DPRA1(\blk00000003/blk0000075c/sig000015d1 ), + .DPRA2(\blk00000003/blk0000075c/sig000015d1 ), + .DPRA3(\blk00000003/blk0000075c/sig000015d1 ), + .DPRA4(\blk00000003/blk0000075c/sig000015d1 ), + .WCLK(clk), + .WE(\blk00000003/blk0000075c/sig000015e4 ), + .SPO(\NLW_blk00000003/blk0000075c/blk00000777_SPO_UNCONNECTED ), + .DPO(\blk00000003/blk0000075c/sig000015d9 ) + ); + RAM32X1D #( + .INIT ( 32'h00000001 )) + \blk00000003/blk0000075c/blk00000776 ( + .A0(\blk00000003/sig0000023c ), + .A1(\blk00000003/blk0000075c/sig000015d1 ), + .A2(\blk00000003/blk0000075c/sig000015d1 ), + .A3(\blk00000003/blk0000075c/sig000015d1 ), + .A4(\blk00000003/blk0000075c/sig000015d1 ), + .D(\blk00000003/sig000008bd ), + .DPRA0(\blk00000003/sig0000091f ), + .DPRA1(\blk00000003/blk0000075c/sig000015d1 ), + .DPRA2(\blk00000003/blk0000075c/sig000015d1 ), + .DPRA3(\blk00000003/blk0000075c/sig000015d1 ), + .DPRA4(\blk00000003/blk0000075c/sig000015d1 ), + .WCLK(clk), + .WE(\blk00000003/blk0000075c/sig000015e4 ), + .SPO(\NLW_blk00000003/blk0000075c/blk00000776_SPO_UNCONNECTED ), + .DPO(\blk00000003/blk0000075c/sig000015d8 ) + ); + RAM32X1D #( + .INIT ( 32'h00000001 )) + \blk00000003/blk0000075c/blk00000775 ( + .A0(\blk00000003/sig0000023c ), + .A1(\blk00000003/blk0000075c/sig000015d1 ), + .A2(\blk00000003/blk0000075c/sig000015d1 ), + .A3(\blk00000003/blk0000075c/sig000015d1 ), + .A4(\blk00000003/blk0000075c/sig000015d1 ), + .D(\blk00000003/sig000008be ), + .DPRA0(\blk00000003/sig0000091f ), + .DPRA1(\blk00000003/blk0000075c/sig000015d1 ), + .DPRA2(\blk00000003/blk0000075c/sig000015d1 ), + .DPRA3(\blk00000003/blk0000075c/sig000015d1 ), + .DPRA4(\blk00000003/blk0000075c/sig000015d1 ), + .WCLK(clk), + .WE(\blk00000003/blk0000075c/sig000015e4 ), + .SPO(\NLW_blk00000003/blk0000075c/blk00000775_SPO_UNCONNECTED ), + .DPO(\blk00000003/blk0000075c/sig000015d7 ) + ); + RAM32X1D #( + .INIT ( 32'h00000001 )) + \blk00000003/blk0000075c/blk00000774 ( + .A0(\blk00000003/sig0000023c ), + .A1(\blk00000003/blk0000075c/sig000015d1 ), + .A2(\blk00000003/blk0000075c/sig000015d1 ), + .A3(\blk00000003/blk0000075c/sig000015d1 ), + .A4(\blk00000003/blk0000075c/sig000015d1 ), + .D(\blk00000003/sig000008bf ), + .DPRA0(\blk00000003/sig0000091f ), + .DPRA1(\blk00000003/blk0000075c/sig000015d1 ), + .DPRA2(\blk00000003/blk0000075c/sig000015d1 ), + .DPRA3(\blk00000003/blk0000075c/sig000015d1 ), + .DPRA4(\blk00000003/blk0000075c/sig000015d1 ), + .WCLK(clk), + .WE(\blk00000003/blk0000075c/sig000015e4 ), + .SPO(\NLW_blk00000003/blk0000075c/blk00000774_SPO_UNCONNECTED ), + .DPO(\blk00000003/blk0000075c/sig000015d6 ) + ); + RAM32X1D #( + .INIT ( 32'h00000001 )) + \blk00000003/blk0000075c/blk00000773 ( + .A0(\blk00000003/sig0000023c ), + .A1(\blk00000003/blk0000075c/sig000015d1 ), + .A2(\blk00000003/blk0000075c/sig000015d1 ), + .A3(\blk00000003/blk0000075c/sig000015d1 ), + .A4(\blk00000003/blk0000075c/sig000015d1 ), + .D(\blk00000003/sig000008c0 ), + .DPRA0(\blk00000003/sig0000091f ), + .DPRA1(\blk00000003/blk0000075c/sig000015d1 ), + .DPRA2(\blk00000003/blk0000075c/sig000015d1 ), + .DPRA3(\blk00000003/blk0000075c/sig000015d1 ), + .DPRA4(\blk00000003/blk0000075c/sig000015d1 ), + .WCLK(clk), + .WE(\blk00000003/blk0000075c/sig000015e4 ), + .SPO(\NLW_blk00000003/blk0000075c/blk00000773_SPO_UNCONNECTED ), + .DPO(\blk00000003/blk0000075c/sig000015d5 ) + ); + RAM32X1D #( + .INIT ( 32'h00000001 )) + \blk00000003/blk0000075c/blk00000772 ( + .A0(\blk00000003/sig0000023c ), + .A1(\blk00000003/blk0000075c/sig000015d1 ), + .A2(\blk00000003/blk0000075c/sig000015d1 ), + .A3(\blk00000003/blk0000075c/sig000015d1 ), + .A4(\blk00000003/blk0000075c/sig000015d1 ), + .D(\blk00000003/sig000008c2 ), + .DPRA0(\blk00000003/sig0000091f ), + .DPRA1(\blk00000003/blk0000075c/sig000015d1 ), + .DPRA2(\blk00000003/blk0000075c/sig000015d1 ), + .DPRA3(\blk00000003/blk0000075c/sig000015d1 ), + .DPRA4(\blk00000003/blk0000075c/sig000015d1 ), + .WCLK(clk), + .WE(\blk00000003/blk0000075c/sig000015e4 ), + .SPO(\NLW_blk00000003/blk0000075c/blk00000772_SPO_UNCONNECTED ), + .DPO(\blk00000003/blk0000075c/sig000015d3 ) + ); + RAM32X1D #( + .INIT ( 32'h00000001 )) + \blk00000003/blk0000075c/blk00000771 ( + .A0(\blk00000003/sig0000023c ), + .A1(\blk00000003/blk0000075c/sig000015d1 ), + .A2(\blk00000003/blk0000075c/sig000015d1 ), + .A3(\blk00000003/blk0000075c/sig000015d1 ), + .A4(\blk00000003/blk0000075c/sig000015d1 ), + .D(\blk00000003/sig000008c3 ), + .DPRA0(\blk00000003/sig0000091f ), + .DPRA1(\blk00000003/blk0000075c/sig000015d1 ), + .DPRA2(\blk00000003/blk0000075c/sig000015d1 ), + .DPRA3(\blk00000003/blk0000075c/sig000015d1 ), + .DPRA4(\blk00000003/blk0000075c/sig000015d1 ), + .WCLK(clk), + .WE(\blk00000003/blk0000075c/sig000015e4 ), + .SPO(\NLW_blk00000003/blk0000075c/blk00000771_SPO_UNCONNECTED ), + .DPO(\blk00000003/blk0000075c/sig000015d2 ) + ); + RAM32X1D #( + .INIT ( 32'h00000001 )) + \blk00000003/blk0000075c/blk00000770 ( + .A0(\blk00000003/sig0000023c ), + .A1(\blk00000003/blk0000075c/sig000015d1 ), + .A2(\blk00000003/blk0000075c/sig000015d1 ), + .A3(\blk00000003/blk0000075c/sig000015d1 ), + .A4(\blk00000003/blk0000075c/sig000015d1 ), + .D(\blk00000003/sig000008c1 ), + .DPRA0(\blk00000003/sig0000091f ), + .DPRA1(\blk00000003/blk0000075c/sig000015d1 ), + .DPRA2(\blk00000003/blk0000075c/sig000015d1 ), + .DPRA3(\blk00000003/blk0000075c/sig000015d1 ), + .DPRA4(\blk00000003/blk0000075c/sig000015d1 ), + .WCLK(clk), + .WE(\blk00000003/blk0000075c/sig000015e4 ), + .SPO(\NLW_blk00000003/blk0000075c/blk00000770_SPO_UNCONNECTED ), + .DPO(\blk00000003/blk0000075c/sig000015d4 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk0000075c/blk0000076f ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk0000075c/sig000015e3 ), + .Q(\blk00000003/sig000000fa ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk0000075c/blk0000076e ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk0000075c/sig000015e2 ), + .Q(\blk00000003/sig000000fb ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk0000075c/blk0000076d ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk0000075c/sig000015e1 ), + .Q(\blk00000003/sig000000fc ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk0000075c/blk0000076c ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk0000075c/sig000015e0 ), + .Q(\blk00000003/sig000000fd ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk0000075c/blk0000076b ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk0000075c/sig000015df ), + .Q(\blk00000003/sig000000fe ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk0000075c/blk0000076a ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk0000075c/sig000015de ), + .Q(\blk00000003/sig000000ff ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk0000075c/blk00000769 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk0000075c/sig000015dd ), + .Q(\blk00000003/sig00000100 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk0000075c/blk00000768 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk0000075c/sig000015dc ), + .Q(\blk00000003/sig00000101 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk0000075c/blk00000767 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk0000075c/sig000015db ), + .Q(\blk00000003/sig00000102 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk0000075c/blk00000766 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk0000075c/sig000015da ), + .Q(\blk00000003/sig00000103 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk0000075c/blk00000765 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk0000075c/sig000015d9 ), + .Q(\blk00000003/sig00000104 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk0000075c/blk00000764 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk0000075c/sig000015d8 ), + .Q(\blk00000003/sig00000105 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk0000075c/blk00000763 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk0000075c/sig000015d7 ), + .Q(\blk00000003/sig00000106 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk0000075c/blk00000762 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk0000075c/sig000015d6 ), + .Q(\blk00000003/sig00000107 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk0000075c/blk00000761 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk0000075c/sig000015d5 ), + .Q(\blk00000003/sig00000108 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk0000075c/blk00000760 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk0000075c/sig000015d4 ), + .Q(\blk00000003/sig00000109 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk0000075c/blk0000075f ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk0000075c/sig000015d3 ), + .Q(\blk00000003/sig0000010a ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk0000075c/blk0000075e ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk0000075c/sig000015d2 ), + .Q(\blk00000003/sig0000010b ) + ); + GND \blk00000003/blk0000075c/blk0000075d ( + .G(\blk00000003/blk0000075c/sig000015d1 ) + ); + +// synthesis translate_on + +endmodule + +// synthesis translate_off + +`ifndef GLBL +`define GLBL + +`timescale 1 ps / 1 ps + +module glbl (); + + parameter ROC_WIDTH = 100000; + parameter TOC_WIDTH = 0; + +//-------- STARTUP Globals -------------- + wire GSR; + wire GTS; + wire GWE; + wire PRLD; + tri1 p_up_tmp; + tri (weak1, strong0) PLL_LOCKG = p_up_tmp; + + wire PROGB_GLBL; + wire CCLKO_GLBL; + + reg GSR_int; + reg GTS_int; + reg PRLD_int; + +//-------- JTAG Globals -------------- + wire JTAG_TDO_GLBL; + wire JTAG_TCK_GLBL; + wire JTAG_TDI_GLBL; + wire JTAG_TMS_GLBL; + wire JTAG_TRST_GLBL; + + reg JTAG_CAPTURE_GLBL; + reg JTAG_RESET_GLBL; + reg JTAG_SHIFT_GLBL; + reg JTAG_UPDATE_GLBL; + reg JTAG_RUNTEST_GLBL; + + reg JTAG_SEL1_GLBL = 0; + reg JTAG_SEL2_GLBL = 0 ; + reg JTAG_SEL3_GLBL = 0; + reg JTAG_SEL4_GLBL = 0; + + reg JTAG_USER_TDO1_GLBL = 1'bz; + reg JTAG_USER_TDO2_GLBL = 1'bz; + reg JTAG_USER_TDO3_GLBL = 1'bz; + reg JTAG_USER_TDO4_GLBL = 1'bz; + + assign (weak1, weak0) GSR = GSR_int; + assign (weak1, weak0) GTS = GTS_int; + assign (weak1, weak0) PRLD = PRLD_int; + + initial begin + GSR_int = 1'b1; + PRLD_int = 1'b1; + #(ROC_WIDTH) + GSR_int = 1'b0; + PRLD_int = 1'b0; + end + + initial begin + GTS_int = 1'b1; + #(TOC_WIDTH) + GTS_int = 1'b0; + end + +endmodule + +`endif + +// synthesis translate_on diff --git a/fpga/usrp3/top/x400/coregen_dsp/hbdec1_stub.v b/fpga/usrp3/top/x400/coregen_dsp/hbdec1_stub.v new file mode 100644 index 000000000..474c370e8 --- /dev/null +++ b/fpga/usrp3/top/x400/coregen_dsp/hbdec1_stub.v @@ -0,0 +1,20 @@ +module hbdec1( + sclr, ce, rfd, rdy, data_valid, coef_we, nd, clk, + coef_ld, dout_1, dout_2, din_1, din_2, coef_din +) +/* synthesis syn_black_box black_box_pad_pin="sclr,ce,rfd,rdy,data_valid,coef_we,nd,clk,coef_ld,dout_1[47:0],dout_2[47:0],din_1[23:0],din_2[23:0],coef_din[17:0]" */; + input sclr; + input ce; + output rfd; + output rdy; + output data_valid; + input coef_we; + input nd; + input clk; + input coef_ld; + output [46:0]dout_1; + output [46:0]dout_2; + input [23:0]din_1; + input [23:0]din_2; + input [17:0]coef_din; +endmodule diff --git a/fpga/usrp3/top/x400/coregen_dsp/hbdec2.edif b/fpga/usrp3/top/x400/coregen_dsp/hbdec2.edif new file mode 100644 index 000000000..031d238cf --- /dev/null +++ b/fpga/usrp3/top/x400/coregen_dsp/hbdec2.edif @@ -0,0 +1,43626 @@ +(edif hbdec2 + (edifVersion 2 0 0) + (edifLevel 0) + (keywordMap (keywordLevel 0)) + (status + (written + (timestamp 2018 8 29 14 59 39) + (program "Xilinx ngc2edif" (version "P_INT.20171106")) + (author "Xilinx. Inc ") + (comment "This EDIF netlist is to be used within supported synthesis tools") + (comment "for determining resource/timing estimates of the design component") + (comment "represented by this netlist.") + (comment "Command line: hbdec2.ngc hbdec2.edif "))) + (external UNISIMS + (edifLevel 0) + (technology (numberDefinition)) + (cell VCC + (cellType GENERIC) + (view view_1 + (viewType NETLIST) + (interface + (port P + (direction OUTPUT) + ) + ) + ) + ) + (cell GND + (cellType GENERIC) + (view view_1 + (viewType NETLIST) + (interface + (port G + (direction OUTPUT) + ) + ) + ) + ) + (cell MUXCY_D + (cellType GENERIC) + (view view_1 + (viewType NETLIST) + (interface + (port CI + (direction INPUT) + ) + (port DI + (direction INPUT) + ) + (port S + (direction INPUT) + ) + (port O + (direction OUTPUT) + ) + (port LO + (direction OUTPUT) + ) + ) + ) + ) + (cell XORCY + (cellType GENERIC) + (view view_1 + (viewType NETLIST) + (interface + (port CI + (direction INPUT) + ) + (port LI + (direction INPUT) + ) + (port O + (direction OUTPUT) + ) + ) + ) + ) + (cell FD + (cellType GENERIC) + (view view_1 + (viewType NETLIST) + (interface + (port C + (direction INPUT) + ) + (port D + (direction INPUT) + ) + (port Q + (direction OUTPUT) + ) + ) + ) + ) + (cell DSP48E1 + (cellType GENERIC) + (view view_1 + (viewType NETLIST) + (interface + (port PATTERNBDETECT + (direction OUTPUT) + ) + (port RSTC + (direction INPUT) + ) + (port CEB1 + (direction INPUT) + ) + (port CEAD + (direction INPUT) + ) + (port MULTSIGNOUT + (direction OUTPUT) + ) + (port CEC + (direction INPUT) + ) + (port RSTM + (direction INPUT) + ) + (port MULTSIGNIN + (direction INPUT) + ) + (port CEB2 + (direction INPUT) + ) + (port RSTCTRL + (direction INPUT) + ) + (port CEP + (direction INPUT) + ) + (port CARRYCASCOUT + (direction OUTPUT) + ) + (port RSTA + (direction INPUT) + ) + (port CECARRYIN + (direction INPUT) + ) + (port UNDERFLOW + (direction OUTPUT) + ) + (port PATTERNDETECT + (direction OUTPUT) + ) + (port RSTALUMODE + (direction INPUT) + ) + (port RSTALLCARRYIN + (direction INPUT) + ) + (port CED + (direction INPUT) + ) + (port RSTD + (direction INPUT) + ) + (port CEALUMODE + (direction INPUT) + ) + (port CEA2 + (direction INPUT) + ) + (port CLK + (direction INPUT) + ) + (port CEA1 + (direction INPUT) + ) + (port RSTB + (direction INPUT) + ) + (port OVERFLOW + (direction OUTPUT) + ) + (port CECTRL + (direction INPUT) + ) + (port CEM + (direction INPUT) + ) + (port CARRYIN + (direction INPUT) + ) + (port CARRYCASCIN + (direction INPUT) + ) + (port RSTINMODE + (direction INPUT) + ) + (port CEINMODE + (direction INPUT) + ) + (port RSTP + (direction INPUT) + ) + (port (rename ACOUT_29_ "ACOUT<29>") + (direction OUTPUT) + (property PIN_BUSNAME (string "ACOUT<29:0>") (owner "Xilinx")) + (property PIN_BUSIDX (integer 0) (owner "Xilinx")) + ) + (port (rename ACOUT_28_ "ACOUT<28>") + (direction OUTPUT) + (property PIN_BUSNAME (string "ACOUT<29:0>") (owner "Xilinx")) + (property PIN_BUSIDX (integer 1) (owner "Xilinx")) + ) + (port (rename ACOUT_27_ "ACOUT<27>") + (direction OUTPUT) + (property PIN_BUSNAME (string "ACOUT<29:0>") (owner "Xilinx")) + (property PIN_BUSIDX (integer 2) (owner "Xilinx")) + ) + (port (rename ACOUT_26_ "ACOUT<26>") + (direction OUTPUT) + (property PIN_BUSNAME (string "ACOUT<29:0>") (owner "Xilinx")) + (property PIN_BUSIDX (integer 3) (owner "Xilinx")) + ) + (port (rename ACOUT_25_ "ACOUT<25>") + (direction OUTPUT) + (property PIN_BUSNAME (string "ACOUT<29:0>") (owner "Xilinx")) + (property PIN_BUSIDX (integer 4) (owner "Xilinx")) + ) + (port (rename ACOUT_24_ "ACOUT<24>") + (direction OUTPUT) + (property PIN_BUSNAME (string "ACOUT<29:0>") (owner "Xilinx")) + (property PIN_BUSIDX (integer 5) (owner "Xilinx")) + ) + (port (rename ACOUT_23_ "ACOUT<23>") + (direction OUTPUT) + (property PIN_BUSNAME (string "ACOUT<29:0>") (owner "Xilinx")) + (property PIN_BUSIDX (integer 6) (owner "Xilinx")) + ) + (port (rename ACOUT_22_ "ACOUT<22>") + (direction OUTPUT) + (property PIN_BUSNAME (string "ACOUT<29:0>") (owner "Xilinx")) + (property PIN_BUSIDX (integer 7) (owner "Xilinx")) + ) + (port (rename ACOUT_21_ "ACOUT<21>") + (direction OUTPUT) + (property PIN_BUSNAME (string "ACOUT<29:0>") (owner "Xilinx")) + (property PIN_BUSIDX (integer 8) (owner "Xilinx")) + ) + (port (rename ACOUT_20_ "ACOUT<20>") + (direction OUTPUT) + (property PIN_BUSNAME (string "ACOUT<29:0>") (owner "Xilinx")) + (property PIN_BUSIDX (integer 9) (owner "Xilinx")) + ) + (port (rename ACOUT_19_ "ACOUT<19>") + (direction OUTPUT) + (property PIN_BUSNAME (string "ACOUT<29:0>") (owner "Xilinx")) + (property PIN_BUSIDX (integer 10) (owner "Xilinx")) + ) + (port (rename ACOUT_18_ "ACOUT<18>") + (direction OUTPUT) + (property PIN_BUSNAME (string "ACOUT<29:0>") (owner "Xilinx")) + (property PIN_BUSIDX (integer 11) (owner "Xilinx")) + ) + (port (rename ACOUT_17_ "ACOUT<17>") + (direction OUTPUT) + (property PIN_BUSNAME (string "ACOUT<29:0>") (owner "Xilinx")) + (property PIN_BUSIDX (integer 12) (owner "Xilinx")) + ) + (port (rename ACOUT_16_ "ACOUT<16>") + (direction OUTPUT) + (property PIN_BUSNAME (string "ACOUT<29:0>") (owner "Xilinx")) + (property PIN_BUSIDX (integer 13) (owner "Xilinx")) + ) + (port (rename ACOUT_15_ "ACOUT<15>") + (direction OUTPUT) + (property PIN_BUSNAME (string "ACOUT<29:0>") (owner "Xilinx")) + (property PIN_BUSIDX (integer 14) (owner "Xilinx")) + ) + (port (rename ACOUT_14_ "ACOUT<14>") + (direction OUTPUT) + (property PIN_BUSNAME (string "ACOUT<29:0>") (owner "Xilinx")) + (property PIN_BUSIDX (integer 15) (owner "Xilinx")) + ) + (port (rename ACOUT_13_ "ACOUT<13>") + (direction OUTPUT) + (property PIN_BUSNAME (string "ACOUT<29:0>") (owner "Xilinx")) + (property PIN_BUSIDX (integer 16) (owner "Xilinx")) + ) + (port (rename ACOUT_12_ "ACOUT<12>") + (direction OUTPUT) + (property PIN_BUSNAME (string "ACOUT<29:0>") (owner "Xilinx")) + (property PIN_BUSIDX (integer 17) (owner "Xilinx")) + ) + (port (rename ACOUT_11_ "ACOUT<11>") + (direction OUTPUT) + (property PIN_BUSNAME (string "ACOUT<29:0>") (owner "Xilinx")) + (property PIN_BUSIDX (integer 18) (owner "Xilinx")) + ) + (port (rename ACOUT_10_ "ACOUT<10>") + (direction OUTPUT) + (property PIN_BUSNAME (string "ACOUT<29:0>") (owner "Xilinx")) + (property PIN_BUSIDX (integer 19) (owner "Xilinx")) + ) + (port (rename ACOUT_9_ "ACOUT<9>") + (direction OUTPUT) + (property PIN_BUSNAME (string "ACOUT<29:0>") (owner "Xilinx")) + (property PIN_BUSIDX (integer 20) (owner "Xilinx")) + ) + (port (rename ACOUT_8_ "ACOUT<8>") + (direction OUTPUT) + (property PIN_BUSNAME (string "ACOUT<29:0>") (owner "Xilinx")) + (property PIN_BUSIDX (integer 21) (owner "Xilinx")) + ) + (port (rename ACOUT_7_ "ACOUT<7>") + (direction OUTPUT) + (property PIN_BUSNAME (string "ACOUT<29:0>") (owner "Xilinx")) + (property PIN_BUSIDX (integer 22) (owner "Xilinx")) + ) + (port (rename ACOUT_6_ "ACOUT<6>") + (direction OUTPUT) + (property PIN_BUSNAME (string "ACOUT<29:0>") (owner "Xilinx")) + (property PIN_BUSIDX (integer 23) (owner "Xilinx")) + ) + (port (rename ACOUT_5_ "ACOUT<5>") + (direction OUTPUT) + (property PIN_BUSNAME (string "ACOUT<29:0>") (owner "Xilinx")) + (property PIN_BUSIDX (integer 24) (owner "Xilinx")) + ) + (port (rename ACOUT_4_ "ACOUT<4>") + (direction OUTPUT) + (property PIN_BUSNAME (string "ACOUT<29:0>") (owner "Xilinx")) + (property PIN_BUSIDX (integer 25) (owner "Xilinx")) + ) + (port (rename ACOUT_3_ "ACOUT<3>") + (direction OUTPUT) + (property PIN_BUSNAME (string "ACOUT<29:0>") (owner "Xilinx")) + (property PIN_BUSIDX (integer 26) (owner "Xilinx")) + ) + (port (rename ACOUT_2_ "ACOUT<2>") + (direction OUTPUT) + (property PIN_BUSNAME (string "ACOUT<29:0>") (owner "Xilinx")) + (property PIN_BUSIDX (integer 27) (owner "Xilinx")) + ) + (port (rename ACOUT_1_ "ACOUT<1>") + (direction OUTPUT) + (property PIN_BUSNAME (string "ACOUT<29:0>") (owner "Xilinx")) + (property PIN_BUSIDX (integer 28) (owner "Xilinx")) + ) + (port (rename ACOUT_0_ "ACOUT<0>") + (direction OUTPUT) + (property PIN_BUSNAME (string "ACOUT<29:0>") (owner "Xilinx")) + (property PIN_BUSIDX (integer 29) (owner "Xilinx")) + ) + (port (rename OPMODE_6_ "OPMODE<6>") + (direction INPUT) + (property PIN_BUSNAME (string "OPMODE<6:0>") (owner "Xilinx")) + (property PIN_BUSIDX (integer 0) (owner "Xilinx")) + ) + (port (rename OPMODE_5_ "OPMODE<5>") + (direction INPUT) + (property PIN_BUSNAME (string "OPMODE<6:0>") (owner "Xilinx")) + (property PIN_BUSIDX (integer 1) (owner "Xilinx")) + ) + (port (rename OPMODE_4_ "OPMODE<4>") + (direction INPUT) + (property PIN_BUSNAME (string "OPMODE<6:0>") (owner "Xilinx")) + (property PIN_BUSIDX (integer 2) (owner "Xilinx")) + ) + (port (rename OPMODE_3_ "OPMODE<3>") + (direction INPUT) + (property PIN_BUSNAME (string "OPMODE<6:0>") (owner "Xilinx")) + (property PIN_BUSIDX (integer 3) (owner "Xilinx")) + ) + (port (rename OPMODE_2_ "OPMODE<2>") + (direction INPUT) + (property PIN_BUSNAME (string "OPMODE<6:0>") (owner "Xilinx")) + (property PIN_BUSIDX (integer 4) (owner "Xilinx")) + ) + (port (rename OPMODE_1_ "OPMODE<1>") + (direction INPUT) + (property PIN_BUSNAME (string "OPMODE<6:0>") (owner "Xilinx")) + (property PIN_BUSIDX (integer 5) (owner "Xilinx")) + ) + (port (rename OPMODE_0_ "OPMODE<0>") + (direction INPUT) + (property PIN_BUSNAME (string "OPMODE<6:0>") (owner "Xilinx")) + (property PIN_BUSIDX (integer 6) (owner "Xilinx")) + ) + (port (rename PCIN_47_ "PCIN<47>") + (direction INPUT) + (property PIN_BUSNAME (string "PCIN<47:0>") (owner "Xilinx")) + (property PIN_BUSIDX (integer 0) (owner "Xilinx")) + ) + (port (rename PCIN_46_ "PCIN<46>") + (direction INPUT) + (property PIN_BUSNAME (string "PCIN<47:0>") (owner "Xilinx")) + (property PIN_BUSIDX (integer 1) (owner "Xilinx")) + ) + (port (rename PCIN_45_ "PCIN<45>") + (direction INPUT) + (property PIN_BUSNAME (string "PCIN<47:0>") (owner "Xilinx")) + (property PIN_BUSIDX (integer 2) (owner "Xilinx")) + ) + (port (rename PCIN_44_ "PCIN<44>") + (direction INPUT) + (property PIN_BUSNAME (string "PCIN<47:0>") (owner "Xilinx")) + (property PIN_BUSIDX (integer 3) (owner "Xilinx")) + ) + (port (rename PCIN_43_ "PCIN<43>") + (direction INPUT) + (property PIN_BUSNAME (string "PCIN<47:0>") (owner "Xilinx")) + (property PIN_BUSIDX (integer 4) (owner "Xilinx")) + ) + (port (rename PCIN_42_ "PCIN<42>") + (direction INPUT) + (property PIN_BUSNAME (string "PCIN<47:0>") (owner "Xilinx")) + (property PIN_BUSIDX (integer 5) (owner "Xilinx")) + ) + (port (rename PCIN_41_ "PCIN<41>") + (direction INPUT) + (property PIN_BUSNAME (string "PCIN<47:0>") (owner "Xilinx")) + (property PIN_BUSIDX (integer 6) (owner "Xilinx")) + ) + (port (rename PCIN_40_ "PCIN<40>") + (direction INPUT) + (property PIN_BUSNAME (string "PCIN<47:0>") (owner "Xilinx")) + (property PIN_BUSIDX (integer 7) (owner "Xilinx")) + ) + (port (rename PCIN_39_ "PCIN<39>") + (direction INPUT) + (property PIN_BUSNAME (string "PCIN<47:0>") (owner "Xilinx")) + (property PIN_BUSIDX (integer 8) (owner "Xilinx")) + ) + (port (rename PCIN_38_ "PCIN<38>") + (direction INPUT) + (property PIN_BUSNAME (string "PCIN<47:0>") (owner "Xilinx")) + (property PIN_BUSIDX (integer 9) (owner "Xilinx")) + ) + (port (rename PCIN_37_ "PCIN<37>") + (direction INPUT) + (property PIN_BUSNAME (string "PCIN<47:0>") (owner "Xilinx")) + (property PIN_BUSIDX (integer 10) (owner "Xilinx")) + ) + (port (rename PCIN_36_ "PCIN<36>") + (direction INPUT) + (property PIN_BUSNAME (string "PCIN<47:0>") (owner "Xilinx")) + (property PIN_BUSIDX (integer 11) (owner "Xilinx")) + ) + (port (rename PCIN_35_ "PCIN<35>") + (direction INPUT) + (property PIN_BUSNAME (string "PCIN<47:0>") (owner "Xilinx")) + (property PIN_BUSIDX (integer 12) (owner "Xilinx")) + ) + (port (rename PCIN_34_ "PCIN<34>") + (direction INPUT) + (property PIN_BUSNAME (string "PCIN<47:0>") (owner "Xilinx")) + (property PIN_BUSIDX (integer 13) (owner "Xilinx")) + ) + (port (rename PCIN_33_ "PCIN<33>") + (direction INPUT) + (property PIN_BUSNAME (string "PCIN<47:0>") (owner "Xilinx")) + (property PIN_BUSIDX (integer 14) (owner "Xilinx")) + ) + (port (rename PCIN_32_ "PCIN<32>") + (direction INPUT) + (property PIN_BUSNAME (string "PCIN<47:0>") (owner "Xilinx")) + (property PIN_BUSIDX (integer 15) (owner "Xilinx")) + ) + (port (rename PCIN_31_ "PCIN<31>") + (direction INPUT) + (property PIN_BUSNAME (string "PCIN<47:0>") (owner "Xilinx")) + (property PIN_BUSIDX (integer 16) (owner "Xilinx")) + ) + (port (rename PCIN_30_ "PCIN<30>") + (direction INPUT) + (property PIN_BUSNAME (string "PCIN<47:0>") (owner "Xilinx")) + (property PIN_BUSIDX (integer 17) (owner "Xilinx")) + ) + (port (rename PCIN_29_ "PCIN<29>") + (direction INPUT) + (property PIN_BUSNAME (string "PCIN<47:0>") (owner "Xilinx")) + (property PIN_BUSIDX (integer 18) (owner "Xilinx")) + ) + (port (rename PCIN_28_ "PCIN<28>") + (direction INPUT) + (property PIN_BUSNAME (string "PCIN<47:0>") (owner "Xilinx")) + (property PIN_BUSIDX (integer 19) (owner "Xilinx")) + ) + (port (rename PCIN_27_ "PCIN<27>") + (direction INPUT) + (property PIN_BUSNAME (string "PCIN<47:0>") (owner "Xilinx")) + (property PIN_BUSIDX (integer 20) (owner "Xilinx")) + ) + (port (rename PCIN_26_ "PCIN<26>") + (direction INPUT) + (property PIN_BUSNAME (string "PCIN<47:0>") (owner "Xilinx")) + (property PIN_BUSIDX (integer 21) (owner "Xilinx")) + ) + (port (rename PCIN_25_ "PCIN<25>") + (direction INPUT) + (property PIN_BUSNAME (string "PCIN<47:0>") (owner "Xilinx")) + (property PIN_BUSIDX (integer 22) (owner "Xilinx")) + ) + (port (rename PCIN_24_ "PCIN<24>") + (direction INPUT) + (property PIN_BUSNAME (string "PCIN<47:0>") (owner "Xilinx")) + (property PIN_BUSIDX (integer 23) (owner "Xilinx")) + ) + (port (rename PCIN_23_ "PCIN<23>") + (direction INPUT) + (property PIN_BUSNAME (string "PCIN<47:0>") (owner "Xilinx")) + (property PIN_BUSIDX (integer 24) (owner "Xilinx")) + ) + (port (rename PCIN_22_ "PCIN<22>") + (direction INPUT) + (property PIN_BUSNAME (string "PCIN<47:0>") (owner "Xilinx")) + (property PIN_BUSIDX (integer 25) (owner "Xilinx")) + ) + (port (rename PCIN_21_ "PCIN<21>") + (direction INPUT) + (property PIN_BUSNAME (string "PCIN<47:0>") (owner "Xilinx")) + (property PIN_BUSIDX (integer 26) (owner "Xilinx")) + ) + (port (rename PCIN_20_ "PCIN<20>") + (direction INPUT) + (property PIN_BUSNAME (string "PCIN<47:0>") (owner "Xilinx")) + (property PIN_BUSIDX (integer 27) (owner "Xilinx")) + ) + (port (rename PCIN_19_ "PCIN<19>") + (direction INPUT) + (property PIN_BUSNAME (string "PCIN<47:0>") (owner "Xilinx")) + (property PIN_BUSIDX (integer 28) (owner "Xilinx")) + ) + (port (rename PCIN_18_ "PCIN<18>") + (direction INPUT) + (property PIN_BUSNAME (string "PCIN<47:0>") (owner "Xilinx")) + (property PIN_BUSIDX (integer 29) (owner "Xilinx")) + ) + (port (rename PCIN_17_ "PCIN<17>") + (direction INPUT) + (property PIN_BUSNAME (string "PCIN<47:0>") (owner "Xilinx")) + (property PIN_BUSIDX (integer 30) (owner "Xilinx")) + ) + (port (rename PCIN_16_ "PCIN<16>") + (direction INPUT) + (property PIN_BUSNAME (string "PCIN<47:0>") (owner "Xilinx")) + (property PIN_BUSIDX (integer 31) (owner "Xilinx")) + ) + (port (rename PCIN_15_ "PCIN<15>") + (direction INPUT) + (property PIN_BUSNAME (string "PCIN<47:0>") (owner "Xilinx")) + (property PIN_BUSIDX (integer 32) (owner "Xilinx")) + ) + (port (rename PCIN_14_ "PCIN<14>") + (direction INPUT) + (property PIN_BUSNAME (string "PCIN<47:0>") (owner "Xilinx")) + (property PIN_BUSIDX (integer 33) (owner "Xilinx")) + ) + (port (rename PCIN_13_ "PCIN<13>") + (direction INPUT) + (property PIN_BUSNAME (string "PCIN<47:0>") (owner "Xilinx")) + (property PIN_BUSIDX (integer 34) (owner "Xilinx")) + ) + (port (rename PCIN_12_ "PCIN<12>") + (direction INPUT) + (property PIN_BUSNAME (string "PCIN<47:0>") (owner "Xilinx")) + (property PIN_BUSIDX (integer 35) (owner "Xilinx")) + ) + (port (rename PCIN_11_ "PCIN<11>") + (direction INPUT) + (property PIN_BUSNAME (string "PCIN<47:0>") (owner "Xilinx")) + (property PIN_BUSIDX (integer 36) (owner "Xilinx")) + ) + (port (rename PCIN_10_ "PCIN<10>") + (direction INPUT) + (property PIN_BUSNAME (string "PCIN<47:0>") (owner "Xilinx")) + (property PIN_BUSIDX (integer 37) (owner "Xilinx")) + ) + (port (rename PCIN_9_ "PCIN<9>") + (direction INPUT) + (property PIN_BUSNAME (string "PCIN<47:0>") (owner "Xilinx")) + (property PIN_BUSIDX (integer 38) (owner "Xilinx")) + ) + (port (rename PCIN_8_ "PCIN<8>") + (direction INPUT) + (property PIN_BUSNAME (string "PCIN<47:0>") (owner "Xilinx")) + (property PIN_BUSIDX (integer 39) (owner "Xilinx")) + ) + (port (rename PCIN_7_ "PCIN<7>") + (direction INPUT) + (property PIN_BUSNAME (string "PCIN<47:0>") (owner "Xilinx")) + (property PIN_BUSIDX (integer 40) (owner "Xilinx")) + ) + (port (rename PCIN_6_ "PCIN<6>") + (direction INPUT) + (property PIN_BUSNAME (string "PCIN<47:0>") (owner "Xilinx")) + (property PIN_BUSIDX (integer 41) (owner "Xilinx")) + ) + (port (rename PCIN_5_ "PCIN<5>") + (direction INPUT) + (property PIN_BUSNAME (string "PCIN<47:0>") (owner "Xilinx")) + (property PIN_BUSIDX (integer 42) (owner "Xilinx")) + ) + (port (rename PCIN_4_ "PCIN<4>") + (direction INPUT) + (property PIN_BUSNAME (string "PCIN<47:0>") (owner "Xilinx")) + (property PIN_BUSIDX (integer 43) (owner "Xilinx")) + ) + (port (rename PCIN_3_ "PCIN<3>") + (direction INPUT) + (property PIN_BUSNAME (string "PCIN<47:0>") (owner "Xilinx")) + (property PIN_BUSIDX (integer 44) (owner "Xilinx")) + ) + (port (rename PCIN_2_ "PCIN<2>") + (direction INPUT) + (property PIN_BUSNAME (string "PCIN<47:0>") (owner "Xilinx")) + (property PIN_BUSIDX (integer 45) (owner "Xilinx")) + ) + (port (rename PCIN_1_ "PCIN<1>") + (direction INPUT) + (property PIN_BUSNAME (string "PCIN<47:0>") (owner "Xilinx")) + (property PIN_BUSIDX (integer 46) (owner "Xilinx")) + ) + (port (rename PCIN_0_ "PCIN<0>") + (direction INPUT) + (property PIN_BUSNAME (string "PCIN<47:0>") (owner "Xilinx")) + (property PIN_BUSIDX (integer 47) (owner "Xilinx")) + ) + (port (rename ALUMODE_3_ "ALUMODE<3>") + (direction INPUT) + (property PIN_BUSNAME (string "ALUMODE<3:0>") (owner "Xilinx")) + (property PIN_BUSIDX (integer 0) (owner "Xilinx")) + ) + (port (rename ALUMODE_2_ "ALUMODE<2>") + (direction INPUT) + (property PIN_BUSNAME (string "ALUMODE<3:0>") (owner "Xilinx")) + (property PIN_BUSIDX (integer 1) (owner "Xilinx")) + ) + (port (rename ALUMODE_1_ "ALUMODE<1>") + (direction INPUT) + (property PIN_BUSNAME (string "ALUMODE<3:0>") (owner "Xilinx")) + (property PIN_BUSIDX (integer 2) (owner "Xilinx")) + ) + (port (rename ALUMODE_0_ "ALUMODE<0>") + (direction INPUT) + (property PIN_BUSNAME (string "ALUMODE<3:0>") (owner "Xilinx")) + (property PIN_BUSIDX (integer 3) (owner "Xilinx")) + ) + (port (rename C_47_ "C<47>") + (direction INPUT) + (property PIN_BUSNAME (string "C<47:0>") (owner "Xilinx")) + (property PIN_BUSIDX (integer 0) (owner "Xilinx")) + ) + (port (rename C_46_ "C<46>") + (direction INPUT) + (property PIN_BUSNAME (string "C<47:0>") (owner "Xilinx")) + (property PIN_BUSIDX (integer 1) (owner "Xilinx")) + ) + (port (rename C_45_ "C<45>") + (direction INPUT) + (property PIN_BUSNAME (string "C<47:0>") (owner "Xilinx")) + (property PIN_BUSIDX (integer 2) (owner "Xilinx")) + ) + (port (rename C_44_ "C<44>") + (direction INPUT) + (property PIN_BUSNAME (string "C<47:0>") (owner "Xilinx")) + (property PIN_BUSIDX (integer 3) (owner "Xilinx")) + ) + (port (rename C_43_ "C<43>") + (direction INPUT) + (property PIN_BUSNAME (string "C<47:0>") (owner "Xilinx")) + (property PIN_BUSIDX (integer 4) (owner "Xilinx")) + ) + (port (rename C_42_ "C<42>") + (direction INPUT) + (property PIN_BUSNAME (string "C<47:0>") (owner "Xilinx")) + (property PIN_BUSIDX (integer 5) (owner "Xilinx")) + ) + (port (rename C_41_ "C<41>") + (direction INPUT) + (property PIN_BUSNAME (string "C<47:0>") (owner "Xilinx")) + (property PIN_BUSIDX (integer 6) (owner "Xilinx")) + ) + (port (rename C_40_ "C<40>") + (direction INPUT) + (property PIN_BUSNAME (string "C<47:0>") (owner "Xilinx")) + (property PIN_BUSIDX (integer 7) (owner "Xilinx")) + ) + (port (rename C_39_ "C<39>") + (direction INPUT) + (property PIN_BUSNAME (string "C<47:0>") (owner "Xilinx")) + (property PIN_BUSIDX (integer 8) (owner "Xilinx")) + ) + (port (rename C_38_ "C<38>") + (direction INPUT) + (property PIN_BUSNAME (string "C<47:0>") (owner "Xilinx")) + (property PIN_BUSIDX (integer 9) (owner "Xilinx")) + ) + (port (rename C_37_ "C<37>") + (direction INPUT) + (property PIN_BUSNAME (string "C<47:0>") (owner "Xilinx")) + (property PIN_BUSIDX (integer 10) (owner "Xilinx")) + ) + (port (rename C_36_ "C<36>") + (direction INPUT) + (property PIN_BUSNAME (string "C<47:0>") (owner "Xilinx")) + (property PIN_BUSIDX (integer 11) (owner "Xilinx")) + ) + (port (rename C_35_ "C<35>") + (direction INPUT) + (property PIN_BUSNAME (string "C<47:0>") (owner "Xilinx")) + (property PIN_BUSIDX (integer 12) (owner "Xilinx")) + ) + (port (rename C_34_ "C<34>") + (direction INPUT) + (property PIN_BUSNAME (string "C<47:0>") (owner "Xilinx")) + (property PIN_BUSIDX (integer 13) (owner "Xilinx")) + ) + (port (rename C_33_ "C<33>") + (direction INPUT) + (property PIN_BUSNAME (string "C<47:0>") (owner "Xilinx")) + (property PIN_BUSIDX (integer 14) (owner "Xilinx")) + ) + (port (rename C_32_ "C<32>") + (direction INPUT) + (property PIN_BUSNAME (string "C<47:0>") (owner "Xilinx")) + (property PIN_BUSIDX (integer 15) (owner "Xilinx")) + ) + (port (rename C_31_ "C<31>") + (direction INPUT) + (property PIN_BUSNAME (string "C<47:0>") (owner "Xilinx")) + (property PIN_BUSIDX (integer 16) (owner "Xilinx")) + ) + (port (rename C_30_ "C<30>") + (direction INPUT) + (property PIN_BUSNAME (string "C<47:0>") (owner "Xilinx")) + (property PIN_BUSIDX (integer 17) (owner "Xilinx")) + ) + (port (rename C_29_ "C<29>") + (direction INPUT) + (property PIN_BUSNAME (string "C<47:0>") (owner "Xilinx")) + (property PIN_BUSIDX (integer 18) (owner "Xilinx")) + ) + (port (rename C_28_ "C<28>") + (direction INPUT) + (property PIN_BUSNAME (string "C<47:0>") (owner "Xilinx")) + (property PIN_BUSIDX (integer 19) (owner "Xilinx")) + ) + (port (rename C_27_ "C<27>") + (direction INPUT) + (property PIN_BUSNAME (string "C<47:0>") (owner "Xilinx")) + (property PIN_BUSIDX (integer 20) (owner "Xilinx")) + ) + (port (rename C_26_ "C<26>") + (direction INPUT) + (property PIN_BUSNAME (string "C<47:0>") (owner "Xilinx")) + (property PIN_BUSIDX (integer 21) (owner "Xilinx")) + ) + (port (rename C_25_ "C<25>") + (direction INPUT) + (property PIN_BUSNAME (string "C<47:0>") (owner "Xilinx")) + (property PIN_BUSIDX (integer 22) (owner "Xilinx")) + ) + (port (rename C_24_ "C<24>") + (direction INPUT) + (property PIN_BUSNAME (string "C<47:0>") (owner "Xilinx")) + (property PIN_BUSIDX (integer 23) (owner "Xilinx")) + ) + (port (rename C_23_ "C<23>") + (direction INPUT) + (property PIN_BUSNAME (string "C<47:0>") (owner "Xilinx")) + (property PIN_BUSIDX (integer 24) (owner "Xilinx")) + ) + (port (rename C_22_ "C<22>") + (direction INPUT) + (property PIN_BUSNAME (string "C<47:0>") (owner "Xilinx")) + (property PIN_BUSIDX (integer 25) (owner "Xilinx")) + ) + (port (rename C_21_ "C<21>") + (direction INPUT) + (property PIN_BUSNAME (string "C<47:0>") (owner "Xilinx")) + (property PIN_BUSIDX (integer 26) (owner "Xilinx")) + ) + (port (rename C_20_ "C<20>") + (direction INPUT) + (property PIN_BUSNAME (string "C<47:0>") (owner "Xilinx")) + (property PIN_BUSIDX (integer 27) (owner "Xilinx")) + ) + (port (rename C_19_ "C<19>") + (direction INPUT) + (property PIN_BUSNAME (string "C<47:0>") (owner "Xilinx")) + (property PIN_BUSIDX (integer 28) (owner "Xilinx")) + ) + (port (rename C_18_ "C<18>") + (direction INPUT) + (property PIN_BUSNAME (string "C<47:0>") (owner "Xilinx")) + (property PIN_BUSIDX (integer 29) (owner "Xilinx")) + ) + (port (rename C_17_ "C<17>") + (direction INPUT) + (property PIN_BUSNAME (string "C<47:0>") (owner "Xilinx")) + (property PIN_BUSIDX (integer 30) (owner "Xilinx")) + ) + (port (rename C_16_ "C<16>") + (direction INPUT) + (property PIN_BUSNAME (string "C<47:0>") (owner "Xilinx")) + (property PIN_BUSIDX (integer 31) (owner "Xilinx")) + ) + (port (rename C_15_ "C<15>") + (direction INPUT) + (property PIN_BUSNAME (string "C<47:0>") (owner "Xilinx")) + (property PIN_BUSIDX (integer 32) (owner "Xilinx")) + ) + (port (rename C_14_ "C<14>") + (direction INPUT) + (property PIN_BUSNAME (string "C<47:0>") (owner "Xilinx")) + (property PIN_BUSIDX (integer 33) (owner "Xilinx")) + ) + (port (rename C_13_ "C<13>") + (direction INPUT) + (property PIN_BUSNAME (string "C<47:0>") (owner "Xilinx")) + (property PIN_BUSIDX (integer 34) (owner "Xilinx")) + ) + (port (rename C_12_ "C<12>") + (direction INPUT) + (property PIN_BUSNAME (string "C<47:0>") (owner "Xilinx")) + (property PIN_BUSIDX (integer 35) (owner "Xilinx")) + ) + (port (rename C_11_ "C<11>") + (direction INPUT) + (property PIN_BUSNAME (string "C<47:0>") (owner "Xilinx")) + (property PIN_BUSIDX (integer 36) (owner "Xilinx")) + ) + (port (rename C_10_ "C<10>") + (direction INPUT) + (property PIN_BUSNAME (string "C<47:0>") (owner "Xilinx")) + (property PIN_BUSIDX (integer 37) (owner "Xilinx")) + ) + (port (rename C_9_ "C<9>") + (direction INPUT) + (property PIN_BUSNAME (string "C<47:0>") (owner "Xilinx")) + (property PIN_BUSIDX (integer 38) (owner "Xilinx")) + ) + (port (rename C_8_ "C<8>") + (direction INPUT) + (property PIN_BUSNAME (string "C<47:0>") (owner "Xilinx")) + (property PIN_BUSIDX (integer 39) (owner "Xilinx")) + ) + (port (rename C_7_ "C<7>") + (direction INPUT) + (property PIN_BUSNAME (string "C<47:0>") (owner "Xilinx")) + (property PIN_BUSIDX (integer 40) (owner "Xilinx")) + ) + (port (rename C_6_ "C<6>") + (direction INPUT) + (property PIN_BUSNAME (string "C<47:0>") (owner "Xilinx")) + (property PIN_BUSIDX (integer 41) (owner "Xilinx")) + ) + (port (rename C_5_ "C<5>") + (direction INPUT) + (property PIN_BUSNAME (string "C<47:0>") (owner "Xilinx")) + (property PIN_BUSIDX (integer 42) (owner "Xilinx")) + ) + (port (rename C_4_ "C<4>") + (direction INPUT) + (property PIN_BUSNAME (string "C<47:0>") (owner "Xilinx")) + (property PIN_BUSIDX (integer 43) (owner "Xilinx")) + ) + (port (rename C_3_ "C<3>") + (direction INPUT) + (property PIN_BUSNAME (string "C<47:0>") (owner "Xilinx")) + (property PIN_BUSIDX (integer 44) (owner "Xilinx")) + ) + (port (rename C_2_ "C<2>") + (direction INPUT) + (property PIN_BUSNAME (string "C<47:0>") (owner "Xilinx")) + (property PIN_BUSIDX (integer 45) (owner "Xilinx")) + ) + (port (rename C_1_ "C<1>") + (direction INPUT) + (property PIN_BUSNAME (string "C<47:0>") (owner "Xilinx")) + (property PIN_BUSIDX (integer 46) (owner "Xilinx")) + ) + (port (rename C_0_ "C<0>") + (direction INPUT) + (property PIN_BUSNAME (string "C<47:0>") (owner "Xilinx")) + (property PIN_BUSIDX (integer 47) (owner "Xilinx")) + ) + (port (rename CARRYOUT_3_ "CARRYOUT<3>") + (direction OUTPUT) + (property PIN_BUSNAME (string "CARRYOUT<3:0>") (owner "Xilinx")) + (property PIN_BUSIDX (integer 0) (owner "Xilinx")) + ) + (port (rename CARRYOUT_2_ "CARRYOUT<2>") + (direction OUTPUT) + (property PIN_BUSNAME (string "CARRYOUT<3:0>") (owner "Xilinx")) + (property PIN_BUSIDX (integer 1) (owner "Xilinx")) + ) + (port (rename CARRYOUT_1_ "CARRYOUT<1>") + (direction OUTPUT) + (property PIN_BUSNAME (string "CARRYOUT<3:0>") (owner "Xilinx")) + (property PIN_BUSIDX (integer 2) (owner "Xilinx")) + ) + (port (rename CARRYOUT_0_ "CARRYOUT<0>") + (direction OUTPUT) + (property PIN_BUSNAME (string "CARRYOUT<3:0>") (owner "Xilinx")) + (property PIN_BUSIDX (integer 3) (owner "Xilinx")) + ) + (port (rename INMODE_4_ "INMODE<4>") + (direction INPUT) + (property PIN_BUSNAME (string "INMODE<4:0>") (owner "Xilinx")) + (property PIN_BUSIDX (integer 0) (owner "Xilinx")) + ) + (port (rename INMODE_3_ "INMODE<3>") + (direction INPUT) + (property PIN_BUSNAME (string "INMODE<4:0>") (owner "Xilinx")) + (property PIN_BUSIDX (integer 1) (owner "Xilinx")) + ) + (port (rename INMODE_2_ "INMODE<2>") + (direction INPUT) + (property PIN_BUSNAME (string "INMODE<4:0>") (owner "Xilinx")) + (property PIN_BUSIDX (integer 2) (owner "Xilinx")) + ) + (port (rename INMODE_1_ "INMODE<1>") + (direction INPUT) + (property PIN_BUSNAME (string "INMODE<4:0>") (owner "Xilinx")) + (property PIN_BUSIDX (integer 3) (owner "Xilinx")) + ) + (port (rename INMODE_0_ "INMODE<0>") + (direction INPUT) + (property PIN_BUSNAME (string "INMODE<4:0>") (owner "Xilinx")) + (property PIN_BUSIDX (integer 4) (owner "Xilinx")) + ) + (port (rename BCIN_17_ "BCIN<17>") + (direction INPUT) + (property PIN_BUSNAME (string "BCIN<17:0>") (owner "Xilinx")) + (property PIN_BUSIDX (integer 0) (owner "Xilinx")) + ) + (port (rename BCIN_16_ "BCIN<16>") + (direction INPUT) + (property PIN_BUSNAME (string "BCIN<17:0>") (owner "Xilinx")) + (property PIN_BUSIDX (integer 1) (owner "Xilinx")) + ) + (port (rename BCIN_15_ "BCIN<15>") + (direction INPUT) + (property PIN_BUSNAME (string "BCIN<17:0>") (owner "Xilinx")) + (property PIN_BUSIDX (integer 2) (owner "Xilinx")) + ) + (port (rename BCIN_14_ "BCIN<14>") + (direction INPUT) + (property PIN_BUSNAME (string "BCIN<17:0>") (owner "Xilinx")) + (property PIN_BUSIDX (integer 3) (owner "Xilinx")) + ) + (port (rename BCIN_13_ "BCIN<13>") + (direction INPUT) + (property PIN_BUSNAME (string "BCIN<17:0>") (owner "Xilinx")) + (property PIN_BUSIDX (integer 4) (owner "Xilinx")) + ) + (port (rename BCIN_12_ "BCIN<12>") + (direction INPUT) + (property PIN_BUSNAME (string "BCIN<17:0>") (owner "Xilinx")) + (property PIN_BUSIDX (integer 5) (owner "Xilinx")) + ) + (port (rename BCIN_11_ "BCIN<11>") + (direction INPUT) + (property PIN_BUSNAME (string "BCIN<17:0>") (owner "Xilinx")) + (property PIN_BUSIDX (integer 6) (owner "Xilinx")) + ) + (port (rename BCIN_10_ "BCIN<10>") + (direction INPUT) + (property PIN_BUSNAME (string "BCIN<17:0>") (owner "Xilinx")) + (property PIN_BUSIDX (integer 7) (owner "Xilinx")) + ) + (port (rename BCIN_9_ "BCIN<9>") + (direction INPUT) + (property PIN_BUSNAME (string "BCIN<17:0>") (owner "Xilinx")) + (property PIN_BUSIDX (integer 8) (owner "Xilinx")) + ) + (port (rename BCIN_8_ "BCIN<8>") + (direction INPUT) + (property PIN_BUSNAME (string "BCIN<17:0>") (owner "Xilinx")) + (property PIN_BUSIDX (integer 9) (owner "Xilinx")) + ) + (port (rename BCIN_7_ "BCIN<7>") + (direction INPUT) + (property PIN_BUSNAME (string "BCIN<17:0>") (owner "Xilinx")) + (property PIN_BUSIDX (integer 10) (owner "Xilinx")) + ) + (port (rename BCIN_6_ "BCIN<6>") + (direction INPUT) + (property PIN_BUSNAME (string "BCIN<17:0>") (owner "Xilinx")) + (property PIN_BUSIDX (integer 11) (owner "Xilinx")) + ) + (port (rename BCIN_5_ "BCIN<5>") + (direction INPUT) + (property PIN_BUSNAME (string "BCIN<17:0>") (owner "Xilinx")) + (property PIN_BUSIDX (integer 12) (owner "Xilinx")) + ) + (port (rename BCIN_4_ "BCIN<4>") + (direction INPUT) + (property PIN_BUSNAME (string "BCIN<17:0>") (owner "Xilinx")) + (property PIN_BUSIDX (integer 13) (owner "Xilinx")) + ) + (port (rename BCIN_3_ "BCIN<3>") + (direction INPUT) + (property PIN_BUSNAME (string "BCIN<17:0>") (owner "Xilinx")) + (property PIN_BUSIDX (integer 14) (owner "Xilinx")) + ) + (port (rename BCIN_2_ "BCIN<2>") + (direction INPUT) + (property PIN_BUSNAME (string "BCIN<17:0>") (owner "Xilinx")) + (property PIN_BUSIDX (integer 15) (owner "Xilinx")) + ) + (port (rename BCIN_1_ "BCIN<1>") + (direction INPUT) + (property PIN_BUSNAME (string "BCIN<17:0>") (owner "Xilinx")) + (property PIN_BUSIDX (integer 16) (owner "Xilinx")) + ) + (port (rename BCIN_0_ "BCIN<0>") + (direction INPUT) + (property PIN_BUSNAME (string "BCIN<17:0>") (owner "Xilinx")) + (property PIN_BUSIDX (integer 17) (owner "Xilinx")) + ) + (port (rename B_17_ "B<17>") + (direction INPUT) + (property PIN_BUSNAME (string "B<17:0>") (owner "Xilinx")) + (property PIN_BUSIDX (integer 0) (owner "Xilinx")) + ) + (port (rename B_16_ "B<16>") + (direction INPUT) + (property PIN_BUSNAME (string "B<17:0>") (owner "Xilinx")) + (property PIN_BUSIDX (integer 1) (owner "Xilinx")) + ) + (port (rename B_15_ "B<15>") + (direction INPUT) + (property PIN_BUSNAME (string "B<17:0>") (owner "Xilinx")) + (property PIN_BUSIDX (integer 2) (owner "Xilinx")) + ) + (port (rename B_14_ "B<14>") + (direction INPUT) + (property PIN_BUSNAME (string "B<17:0>") (owner "Xilinx")) + (property PIN_BUSIDX (integer 3) (owner "Xilinx")) + ) + (port (rename B_13_ "B<13>") + (direction INPUT) + (property PIN_BUSNAME (string "B<17:0>") (owner "Xilinx")) + (property PIN_BUSIDX (integer 4) (owner "Xilinx")) + ) + (port (rename B_12_ "B<12>") + (direction INPUT) + (property PIN_BUSNAME (string "B<17:0>") (owner "Xilinx")) + (property PIN_BUSIDX (integer 5) (owner "Xilinx")) + ) + (port (rename B_11_ "B<11>") + (direction INPUT) + (property PIN_BUSNAME (string "B<17:0>") (owner "Xilinx")) + (property PIN_BUSIDX (integer 6) (owner "Xilinx")) + ) + (port (rename B_10_ "B<10>") + (direction INPUT) + (property PIN_BUSNAME (string "B<17:0>") (owner "Xilinx")) + (property PIN_BUSIDX (integer 7) (owner "Xilinx")) + ) + (port (rename B_9_ "B<9>") + (direction INPUT) + (property PIN_BUSNAME (string "B<17:0>") (owner "Xilinx")) + (property PIN_BUSIDX (integer 8) (owner "Xilinx")) + ) + (port (rename B_8_ "B<8>") + (direction INPUT) + (property PIN_BUSNAME (string "B<17:0>") (owner "Xilinx")) + (property PIN_BUSIDX (integer 9) (owner "Xilinx")) + ) + (port (rename B_7_ "B<7>") + (direction INPUT) + (property PIN_BUSNAME (string "B<17:0>") (owner "Xilinx")) + (property PIN_BUSIDX (integer 10) (owner "Xilinx")) + ) + (port (rename B_6_ "B<6>") + (direction INPUT) + (property PIN_BUSNAME (string "B<17:0>") (owner "Xilinx")) + (property PIN_BUSIDX (integer 11) (owner "Xilinx")) + ) + (port (rename B_5_ "B<5>") + (direction INPUT) + (property PIN_BUSNAME (string "B<17:0>") (owner "Xilinx")) + (property PIN_BUSIDX (integer 12) (owner "Xilinx")) + ) + (port (rename B_4_ "B<4>") + (direction INPUT) + (property PIN_BUSNAME (string "B<17:0>") (owner "Xilinx")) + (property PIN_BUSIDX (integer 13) (owner "Xilinx")) + ) + (port (rename B_3_ "B<3>") + (direction INPUT) + (property PIN_BUSNAME (string "B<17:0>") (owner "Xilinx")) + (property PIN_BUSIDX (integer 14) (owner "Xilinx")) + ) + (port (rename B_2_ "B<2>") + (direction INPUT) + (property PIN_BUSNAME (string "B<17:0>") (owner "Xilinx")) + (property PIN_BUSIDX (integer 15) (owner "Xilinx")) + ) + (port (rename B_1_ "B<1>") + (direction INPUT) + (property PIN_BUSNAME (string "B<17:0>") (owner "Xilinx")) + (property PIN_BUSIDX (integer 16) (owner "Xilinx")) + ) + (port (rename B_0_ "B<0>") + (direction INPUT) + (property PIN_BUSNAME (string "B<17:0>") (owner "Xilinx")) + (property PIN_BUSIDX (integer 17) (owner "Xilinx")) + ) + (port (rename BCOUT_17_ "BCOUT<17>") + (direction OUTPUT) + (property PIN_BUSNAME (string "BCOUT<17:0>") (owner "Xilinx")) + (property PIN_BUSIDX (integer 0) (owner "Xilinx")) + ) + (port (rename BCOUT_16_ "BCOUT<16>") + (direction OUTPUT) + (property PIN_BUSNAME (string "BCOUT<17:0>") (owner "Xilinx")) + (property PIN_BUSIDX (integer 1) (owner "Xilinx")) + ) + (port (rename BCOUT_15_ "BCOUT<15>") + (direction OUTPUT) + (property PIN_BUSNAME (string "BCOUT<17:0>") (owner "Xilinx")) + (property PIN_BUSIDX (integer 2) (owner "Xilinx")) + ) + (port (rename BCOUT_14_ "BCOUT<14>") + (direction OUTPUT) + (property PIN_BUSNAME (string "BCOUT<17:0>") (owner "Xilinx")) + (property PIN_BUSIDX (integer 3) (owner "Xilinx")) + ) + (port (rename BCOUT_13_ "BCOUT<13>") + (direction OUTPUT) + (property PIN_BUSNAME (string "BCOUT<17:0>") (owner "Xilinx")) + (property PIN_BUSIDX (integer 4) (owner "Xilinx")) + ) + (port (rename BCOUT_12_ "BCOUT<12>") + (direction OUTPUT) + (property PIN_BUSNAME (string "BCOUT<17:0>") (owner "Xilinx")) + (property PIN_BUSIDX (integer 5) (owner "Xilinx")) + ) + (port (rename BCOUT_11_ "BCOUT<11>") + (direction OUTPUT) + (property PIN_BUSNAME (string "BCOUT<17:0>") (owner "Xilinx")) + (property PIN_BUSIDX (integer 6) (owner "Xilinx")) + ) + (port (rename BCOUT_10_ "BCOUT<10>") + (direction OUTPUT) + (property PIN_BUSNAME (string "BCOUT<17:0>") (owner "Xilinx")) + (property PIN_BUSIDX (integer 7) (owner "Xilinx")) + ) + (port (rename BCOUT_9_ "BCOUT<9>") + (direction OUTPUT) + (property PIN_BUSNAME (string "BCOUT<17:0>") (owner "Xilinx")) + (property PIN_BUSIDX (integer 8) (owner "Xilinx")) + ) + (port (rename BCOUT_8_ "BCOUT<8>") + (direction OUTPUT) + (property PIN_BUSNAME (string "BCOUT<17:0>") (owner "Xilinx")) + (property PIN_BUSIDX (integer 9) (owner "Xilinx")) + ) + (port (rename BCOUT_7_ "BCOUT<7>") + (direction OUTPUT) + (property PIN_BUSNAME (string "BCOUT<17:0>") (owner "Xilinx")) + (property PIN_BUSIDX (integer 10) (owner "Xilinx")) + ) + (port (rename BCOUT_6_ "BCOUT<6>") + (direction OUTPUT) + (property PIN_BUSNAME (string "BCOUT<17:0>") (owner "Xilinx")) + (property PIN_BUSIDX (integer 11) (owner "Xilinx")) + ) + (port (rename BCOUT_5_ "BCOUT<5>") + (direction OUTPUT) + (property PIN_BUSNAME (string "BCOUT<17:0>") (owner "Xilinx")) + (property PIN_BUSIDX (integer 12) (owner "Xilinx")) + ) + (port (rename BCOUT_4_ "BCOUT<4>") + (direction OUTPUT) + (property PIN_BUSNAME (string "BCOUT<17:0>") (owner "Xilinx")) + (property PIN_BUSIDX (integer 13) (owner "Xilinx")) + ) + (port (rename BCOUT_3_ "BCOUT<3>") + (direction OUTPUT) + (property PIN_BUSNAME (string "BCOUT<17:0>") (owner "Xilinx")) + (property PIN_BUSIDX (integer 14) (owner "Xilinx")) + ) + (port (rename BCOUT_2_ "BCOUT<2>") + (direction OUTPUT) + (property PIN_BUSNAME (string "BCOUT<17:0>") (owner "Xilinx")) + (property PIN_BUSIDX (integer 15) (owner "Xilinx")) + ) + (port (rename BCOUT_1_ "BCOUT<1>") + (direction OUTPUT) + (property PIN_BUSNAME (string "BCOUT<17:0>") (owner "Xilinx")) + (property PIN_BUSIDX (integer 16) (owner "Xilinx")) + ) + (port (rename BCOUT_0_ "BCOUT<0>") + (direction OUTPUT) + (property PIN_BUSNAME (string "BCOUT<17:0>") (owner "Xilinx")) + (property PIN_BUSIDX (integer 17) (owner "Xilinx")) + ) + (port (rename D_24_ "D<24>") + (direction INPUT) + (property PIN_BUSNAME (string "D<24:0>") (owner "Xilinx")) + (property PIN_BUSIDX (integer 0) (owner "Xilinx")) + ) + (port (rename D_23_ "D<23>") + (direction INPUT) + (property PIN_BUSNAME (string "D<24:0>") (owner "Xilinx")) + (property PIN_BUSIDX (integer 1) (owner "Xilinx")) + ) + (port (rename D_22_ "D<22>") + (direction INPUT) + (property PIN_BUSNAME (string "D<24:0>") (owner "Xilinx")) + (property PIN_BUSIDX (integer 2) (owner "Xilinx")) + ) + (port (rename D_21_ "D<21>") + (direction INPUT) + (property PIN_BUSNAME (string "D<24:0>") (owner "Xilinx")) + (property PIN_BUSIDX (integer 3) (owner "Xilinx")) + ) + (port (rename D_20_ "D<20>") + (direction INPUT) + (property PIN_BUSNAME (string "D<24:0>") (owner "Xilinx")) + (property PIN_BUSIDX (integer 4) (owner "Xilinx")) + ) + (port (rename D_19_ "D<19>") + (direction INPUT) + (property PIN_BUSNAME (string "D<24:0>") (owner "Xilinx")) + (property PIN_BUSIDX (integer 5) (owner "Xilinx")) + ) + (port (rename D_18_ "D<18>") + (direction INPUT) + (property PIN_BUSNAME (string "D<24:0>") (owner "Xilinx")) + (property PIN_BUSIDX (integer 6) (owner "Xilinx")) + ) + (port (rename D_17_ "D<17>") + (direction INPUT) + (property PIN_BUSNAME (string "D<24:0>") (owner "Xilinx")) + (property PIN_BUSIDX (integer 7) (owner "Xilinx")) + ) + (port (rename D_16_ "D<16>") + (direction INPUT) + (property PIN_BUSNAME (string "D<24:0>") (owner "Xilinx")) + (property PIN_BUSIDX (integer 8) (owner "Xilinx")) + ) + (port (rename D_15_ "D<15>") + (direction INPUT) + (property PIN_BUSNAME (string "D<24:0>") (owner "Xilinx")) + (property PIN_BUSIDX (integer 9) (owner "Xilinx")) + ) + (port (rename D_14_ "D<14>") + (direction INPUT) + (property PIN_BUSNAME (string "D<24:0>") (owner "Xilinx")) + (property PIN_BUSIDX (integer 10) (owner "Xilinx")) + ) + (port (rename D_13_ "D<13>") + (direction INPUT) + (property PIN_BUSNAME (string "D<24:0>") (owner "Xilinx")) + (property PIN_BUSIDX (integer 11) (owner "Xilinx")) + ) + (port (rename D_12_ "D<12>") + (direction INPUT) + (property PIN_BUSNAME (string "D<24:0>") (owner "Xilinx")) + (property PIN_BUSIDX (integer 12) (owner "Xilinx")) + ) + (port (rename D_11_ "D<11>") + (direction INPUT) + (property PIN_BUSNAME (string "D<24:0>") (owner "Xilinx")) + (property PIN_BUSIDX (integer 13) (owner "Xilinx")) + ) + (port (rename D_10_ "D<10>") + (direction INPUT) + (property PIN_BUSNAME (string "D<24:0>") (owner "Xilinx")) + (property PIN_BUSIDX (integer 14) (owner "Xilinx")) + ) + (port (rename D_9_ "D<9>") + (direction INPUT) + (property PIN_BUSNAME (string "D<24:0>") (owner "Xilinx")) + (property PIN_BUSIDX (integer 15) (owner "Xilinx")) + ) + (port (rename D_8_ "D<8>") + (direction INPUT) + (property PIN_BUSNAME (string "D<24:0>") (owner "Xilinx")) + (property PIN_BUSIDX (integer 16) (owner "Xilinx")) + ) + (port (rename D_7_ "D<7>") + (direction INPUT) + (property PIN_BUSNAME (string "D<24:0>") (owner "Xilinx")) + (property PIN_BUSIDX (integer 17) (owner "Xilinx")) + ) + (port (rename D_6_ "D<6>") + (direction INPUT) + (property PIN_BUSNAME (string "D<24:0>") (owner "Xilinx")) + (property PIN_BUSIDX (integer 18) (owner "Xilinx")) + ) + (port (rename D_5_ "D<5>") + (direction INPUT) + (property PIN_BUSNAME (string "D<24:0>") (owner "Xilinx")) + (property PIN_BUSIDX (integer 19) (owner "Xilinx")) + ) + (port (rename D_4_ "D<4>") + (direction INPUT) + (property PIN_BUSNAME (string "D<24:0>") (owner "Xilinx")) + (property PIN_BUSIDX (integer 20) (owner "Xilinx")) + ) + (port (rename D_3_ "D<3>") + (direction INPUT) + (property PIN_BUSNAME (string "D<24:0>") (owner "Xilinx")) + (property PIN_BUSIDX (integer 21) (owner "Xilinx")) + ) + (port (rename D_2_ "D<2>") + (direction INPUT) + (property PIN_BUSNAME (string "D<24:0>") (owner "Xilinx")) + (property PIN_BUSIDX (integer 22) (owner "Xilinx")) + ) + (port (rename D_1_ "D<1>") + (direction INPUT) + (property PIN_BUSNAME (string "D<24:0>") (owner "Xilinx")) + (property PIN_BUSIDX (integer 23) (owner "Xilinx")) + ) + (port (rename D_0_ "D<0>") + (direction INPUT) + (property PIN_BUSNAME (string "D<24:0>") (owner "Xilinx")) + (property PIN_BUSIDX (integer 24) (owner "Xilinx")) + ) + (port (rename P_47_ "P<47>") + (direction OUTPUT) + (property PIN_BUSNAME (string "P<47:0>") (owner "Xilinx")) + (property PIN_BUSIDX (integer 0) (owner "Xilinx")) + ) + (port (rename P_46_ "P<46>") + (direction OUTPUT) + (property PIN_BUSNAME (string "P<47:0>") (owner "Xilinx")) + (property PIN_BUSIDX (integer 1) (owner "Xilinx")) + ) + (port (rename P_45_ "P<45>") + (direction OUTPUT) + (property PIN_BUSNAME (string "P<47:0>") (owner "Xilinx")) + (property PIN_BUSIDX (integer 2) (owner "Xilinx")) + ) + (port (rename P_44_ "P<44>") + (direction OUTPUT) + (property PIN_BUSNAME (string "P<47:0>") (owner "Xilinx")) + (property PIN_BUSIDX (integer 3) (owner "Xilinx")) + ) + (port (rename P_43_ "P<43>") + (direction OUTPUT) + (property PIN_BUSNAME (string "P<47:0>") (owner "Xilinx")) + (property PIN_BUSIDX (integer 4) (owner "Xilinx")) + ) + (port (rename P_42_ "P<42>") + (direction OUTPUT) + (property PIN_BUSNAME (string "P<47:0>") (owner "Xilinx")) + (property PIN_BUSIDX (integer 5) (owner "Xilinx")) + ) + (port (rename P_41_ "P<41>") + (direction OUTPUT) + (property PIN_BUSNAME (string "P<47:0>") (owner "Xilinx")) + (property PIN_BUSIDX (integer 6) (owner "Xilinx")) + ) + (port (rename P_40_ "P<40>") + (direction OUTPUT) + (property PIN_BUSNAME (string "P<47:0>") (owner "Xilinx")) + (property PIN_BUSIDX (integer 7) (owner "Xilinx")) + ) + (port (rename P_39_ "P<39>") + (direction OUTPUT) + (property PIN_BUSNAME (string "P<47:0>") (owner "Xilinx")) + (property PIN_BUSIDX (integer 8) (owner "Xilinx")) + ) + (port (rename P_38_ "P<38>") + (direction OUTPUT) + (property PIN_BUSNAME (string "P<47:0>") (owner "Xilinx")) + (property PIN_BUSIDX (integer 9) (owner "Xilinx")) + ) + (port (rename P_37_ "P<37>") + (direction OUTPUT) + (property PIN_BUSNAME (string "P<47:0>") (owner "Xilinx")) + (property PIN_BUSIDX (integer 10) (owner "Xilinx")) + ) + (port (rename P_36_ "P<36>") + (direction OUTPUT) + (property PIN_BUSNAME (string "P<47:0>") (owner "Xilinx")) + (property PIN_BUSIDX (integer 11) (owner "Xilinx")) + ) + (port (rename P_35_ "P<35>") + (direction OUTPUT) + (property PIN_BUSNAME (string "P<47:0>") (owner "Xilinx")) + (property PIN_BUSIDX (integer 12) (owner "Xilinx")) + ) + (port (rename P_34_ "P<34>") + (direction OUTPUT) + (property PIN_BUSNAME (string "P<47:0>") (owner "Xilinx")) + (property PIN_BUSIDX (integer 13) (owner "Xilinx")) + ) + (port (rename P_33_ "P<33>") + (direction OUTPUT) + (property PIN_BUSNAME (string "P<47:0>") (owner "Xilinx")) + (property PIN_BUSIDX (integer 14) (owner "Xilinx")) + ) + (port (rename P_32_ "P<32>") + (direction OUTPUT) + (property PIN_BUSNAME (string "P<47:0>") (owner "Xilinx")) + (property PIN_BUSIDX (integer 15) (owner "Xilinx")) + ) + (port (rename P_31_ "P<31>") + (direction OUTPUT) + (property PIN_BUSNAME (string "P<47:0>") (owner "Xilinx")) + (property PIN_BUSIDX (integer 16) (owner "Xilinx")) + ) + (port (rename P_30_ "P<30>") + (direction OUTPUT) + (property PIN_BUSNAME (string "P<47:0>") (owner "Xilinx")) + (property PIN_BUSIDX (integer 17) (owner "Xilinx")) + ) + (port (rename P_29_ "P<29>") + (direction OUTPUT) + (property PIN_BUSNAME (string "P<47:0>") (owner "Xilinx")) + (property PIN_BUSIDX (integer 18) (owner "Xilinx")) + ) + (port (rename P_28_ "P<28>") + (direction OUTPUT) + (property PIN_BUSNAME (string "P<47:0>") (owner "Xilinx")) + (property PIN_BUSIDX (integer 19) (owner "Xilinx")) + ) + (port (rename P_27_ "P<27>") + (direction OUTPUT) + (property PIN_BUSNAME (string "P<47:0>") (owner "Xilinx")) + (property PIN_BUSIDX (integer 20) (owner "Xilinx")) + ) + (port (rename P_26_ "P<26>") + (direction OUTPUT) + (property PIN_BUSNAME (string "P<47:0>") (owner "Xilinx")) + (property PIN_BUSIDX (integer 21) (owner "Xilinx")) + ) + (port (rename P_25_ "P<25>") + (direction OUTPUT) + (property PIN_BUSNAME (string "P<47:0>") (owner "Xilinx")) + (property PIN_BUSIDX (integer 22) (owner "Xilinx")) + ) + (port (rename P_24_ "P<24>") + (direction OUTPUT) + (property PIN_BUSNAME (string "P<47:0>") (owner "Xilinx")) + (property PIN_BUSIDX (integer 23) (owner "Xilinx")) + ) + (port (rename P_23_ "P<23>") + (direction OUTPUT) + (property PIN_BUSNAME (string "P<47:0>") (owner "Xilinx")) + (property PIN_BUSIDX (integer 24) (owner "Xilinx")) + ) + (port (rename P_22_ "P<22>") + (direction OUTPUT) + (property PIN_BUSNAME (string "P<47:0>") (owner "Xilinx")) + (property PIN_BUSIDX (integer 25) (owner "Xilinx")) + ) + (port (rename P_21_ "P<21>") + (direction OUTPUT) + (property PIN_BUSNAME (string "P<47:0>") (owner "Xilinx")) + (property PIN_BUSIDX (integer 26) (owner "Xilinx")) + ) + (port (rename P_20_ "P<20>") + (direction OUTPUT) + (property PIN_BUSNAME (string "P<47:0>") (owner "Xilinx")) + (property PIN_BUSIDX (integer 27) (owner "Xilinx")) + ) + (port (rename P_19_ "P<19>") + (direction OUTPUT) + (property PIN_BUSNAME (string "P<47:0>") (owner "Xilinx")) + (property PIN_BUSIDX (integer 28) (owner "Xilinx")) + ) + (port (rename P_18_ "P<18>") + (direction OUTPUT) + (property PIN_BUSNAME (string "P<47:0>") (owner "Xilinx")) + (property PIN_BUSIDX (integer 29) (owner "Xilinx")) + ) + (port (rename P_17_ "P<17>") + (direction OUTPUT) + (property PIN_BUSNAME (string "P<47:0>") (owner "Xilinx")) + (property PIN_BUSIDX (integer 30) (owner "Xilinx")) + ) + (port (rename P_16_ "P<16>") + (direction OUTPUT) + (property PIN_BUSNAME (string "P<47:0>") (owner "Xilinx")) + (property PIN_BUSIDX (integer 31) (owner "Xilinx")) + ) + (port (rename P_15_ "P<15>") + (direction OUTPUT) + (property PIN_BUSNAME (string "P<47:0>") (owner "Xilinx")) + (property PIN_BUSIDX (integer 32) (owner "Xilinx")) + ) + (port (rename P_14_ "P<14>") + (direction OUTPUT) + (property PIN_BUSNAME (string "P<47:0>") (owner "Xilinx")) + (property PIN_BUSIDX (integer 33) (owner "Xilinx")) + ) + (port (rename P_13_ "P<13>") + (direction OUTPUT) + (property PIN_BUSNAME (string "P<47:0>") (owner "Xilinx")) + (property PIN_BUSIDX (integer 34) (owner "Xilinx")) + ) + (port (rename P_12_ "P<12>") + (direction OUTPUT) + (property PIN_BUSNAME (string "P<47:0>") (owner "Xilinx")) + (property PIN_BUSIDX (integer 35) (owner "Xilinx")) + ) + (port (rename P_11_ "P<11>") + (direction OUTPUT) + (property PIN_BUSNAME (string "P<47:0>") (owner "Xilinx")) + (property PIN_BUSIDX (integer 36) (owner "Xilinx")) + ) + (port (rename P_10_ "P<10>") + (direction OUTPUT) + (property PIN_BUSNAME (string "P<47:0>") (owner "Xilinx")) + (property PIN_BUSIDX (integer 37) (owner "Xilinx")) + ) + (port (rename P_9_ "P<9>") + (direction OUTPUT) + (property PIN_BUSNAME (string "P<47:0>") (owner "Xilinx")) + (property PIN_BUSIDX (integer 38) (owner "Xilinx")) + ) + (port (rename P_8_ "P<8>") + (direction OUTPUT) + (property PIN_BUSNAME (string "P<47:0>") (owner "Xilinx")) + (property PIN_BUSIDX (integer 39) (owner "Xilinx")) + ) + (port (rename P_7_ "P<7>") + (direction OUTPUT) + (property PIN_BUSNAME (string "P<47:0>") (owner "Xilinx")) + (property PIN_BUSIDX (integer 40) (owner "Xilinx")) + ) + (port (rename P_6_ "P<6>") + (direction OUTPUT) + (property PIN_BUSNAME (string "P<47:0>") (owner "Xilinx")) + (property PIN_BUSIDX (integer 41) (owner "Xilinx")) + ) + (port (rename P_5_ "P<5>") + (direction OUTPUT) + (property PIN_BUSNAME (string "P<47:0>") (owner "Xilinx")) + (property PIN_BUSIDX (integer 42) (owner "Xilinx")) + ) + (port (rename P_4_ "P<4>") + (direction OUTPUT) + (property PIN_BUSNAME (string "P<47:0>") (owner "Xilinx")) + (property PIN_BUSIDX (integer 43) (owner "Xilinx")) + ) + (port (rename P_3_ "P<3>") + (direction OUTPUT) + (property PIN_BUSNAME (string "P<47:0>") (owner "Xilinx")) + (property PIN_BUSIDX (integer 44) (owner "Xilinx")) + ) + (port (rename P_2_ "P<2>") + (direction OUTPUT) + (property PIN_BUSNAME (string "P<47:0>") (owner "Xilinx")) + (property PIN_BUSIDX (integer 45) (owner "Xilinx")) + ) + (port (rename P_1_ "P<1>") + (direction OUTPUT) + (property PIN_BUSNAME (string "P<47:0>") (owner "Xilinx")) + (property PIN_BUSIDX (integer 46) (owner "Xilinx")) + ) + (port (rename P_0_ "P<0>") + (direction OUTPUT) + (property PIN_BUSNAME (string "P<47:0>") (owner "Xilinx")) + (property PIN_BUSIDX (integer 47) (owner "Xilinx")) + ) + (port (rename A_29_ "A<29>") + (direction INPUT) + (property PIN_BUSNAME (string "A<29:0>") (owner "Xilinx")) + (property PIN_BUSIDX (integer 0) (owner "Xilinx")) + ) + (port (rename A_28_ "A<28>") + (direction INPUT) + (property PIN_BUSNAME (string "A<29:0>") (owner "Xilinx")) + (property PIN_BUSIDX (integer 1) (owner "Xilinx")) + ) + (port (rename A_27_ "A<27>") + (direction INPUT) + (property PIN_BUSNAME (string "A<29:0>") (owner "Xilinx")) + (property PIN_BUSIDX (integer 2) (owner "Xilinx")) + ) + (port (rename A_26_ "A<26>") + (direction INPUT) + (property PIN_BUSNAME (string "A<29:0>") (owner "Xilinx")) + (property PIN_BUSIDX (integer 3) (owner "Xilinx")) + ) + (port (rename A_25_ "A<25>") + (direction INPUT) + (property PIN_BUSNAME (string "A<29:0>") (owner "Xilinx")) + (property PIN_BUSIDX (integer 4) (owner "Xilinx")) + ) + (port (rename A_24_ "A<24>") + (direction INPUT) + (property PIN_BUSNAME (string "A<29:0>") (owner "Xilinx")) + (property PIN_BUSIDX (integer 5) (owner "Xilinx")) + ) + (port (rename A_23_ "A<23>") + (direction INPUT) + (property PIN_BUSNAME (string "A<29:0>") (owner "Xilinx")) + (property PIN_BUSIDX (integer 6) (owner "Xilinx")) + ) + (port (rename A_22_ "A<22>") + (direction INPUT) + (property PIN_BUSNAME (string "A<29:0>") (owner "Xilinx")) + (property PIN_BUSIDX (integer 7) (owner "Xilinx")) + ) + (port (rename A_21_ "A<21>") + (direction INPUT) + (property PIN_BUSNAME (string "A<29:0>") (owner "Xilinx")) + (property PIN_BUSIDX (integer 8) (owner "Xilinx")) + ) + (port (rename A_20_ "A<20>") + (direction INPUT) + (property PIN_BUSNAME (string "A<29:0>") (owner "Xilinx")) + (property PIN_BUSIDX (integer 9) (owner "Xilinx")) + ) + (port (rename A_19_ "A<19>") + (direction INPUT) + (property PIN_BUSNAME (string "A<29:0>") (owner "Xilinx")) + (property PIN_BUSIDX (integer 10) (owner "Xilinx")) + ) + (port (rename A_18_ "A<18>") + (direction INPUT) + (property PIN_BUSNAME (string "A<29:0>") (owner "Xilinx")) + (property PIN_BUSIDX (integer 11) (owner "Xilinx")) + ) + (port (rename A_17_ "A<17>") + (direction INPUT) + (property PIN_BUSNAME (string "A<29:0>") (owner "Xilinx")) + (property PIN_BUSIDX (integer 12) (owner "Xilinx")) + ) + (port (rename A_16_ "A<16>") + (direction INPUT) + (property PIN_BUSNAME (string "A<29:0>") (owner "Xilinx")) + (property PIN_BUSIDX (integer 13) (owner "Xilinx")) + ) + (port (rename A_15_ "A<15>") + (direction INPUT) + (property PIN_BUSNAME (string "A<29:0>") (owner "Xilinx")) + (property PIN_BUSIDX (integer 14) (owner "Xilinx")) + ) + (port (rename A_14_ "A<14>") + (direction INPUT) + (property PIN_BUSNAME (string "A<29:0>") (owner "Xilinx")) + (property PIN_BUSIDX (integer 15) (owner "Xilinx")) + ) + (port (rename A_13_ "A<13>") + (direction INPUT) + (property PIN_BUSNAME (string "A<29:0>") (owner "Xilinx")) + (property PIN_BUSIDX (integer 16) (owner "Xilinx")) + ) + (port (rename A_12_ "A<12>") + (direction INPUT) + (property PIN_BUSNAME (string "A<29:0>") (owner "Xilinx")) + (property PIN_BUSIDX (integer 17) (owner "Xilinx")) + ) + (port (rename A_11_ "A<11>") + (direction INPUT) + (property PIN_BUSNAME (string "A<29:0>") (owner "Xilinx")) + (property PIN_BUSIDX (integer 18) (owner "Xilinx")) + ) + (port (rename A_10_ "A<10>") + (direction INPUT) + (property PIN_BUSNAME (string "A<29:0>") (owner "Xilinx")) + (property PIN_BUSIDX (integer 19) (owner "Xilinx")) + ) + (port (rename A_9_ "A<9>") + (direction INPUT) + (property PIN_BUSNAME (string "A<29:0>") (owner "Xilinx")) + (property PIN_BUSIDX (integer 20) (owner "Xilinx")) + ) + (port (rename A_8_ "A<8>") + (direction INPUT) + (property PIN_BUSNAME (string "A<29:0>") (owner "Xilinx")) + (property PIN_BUSIDX (integer 21) (owner "Xilinx")) + ) + (port (rename A_7_ "A<7>") + (direction INPUT) + (property PIN_BUSNAME (string "A<29:0>") (owner "Xilinx")) + (property PIN_BUSIDX (integer 22) (owner "Xilinx")) + ) + (port (rename A_6_ "A<6>") + (direction INPUT) + (property PIN_BUSNAME (string "A<29:0>") (owner "Xilinx")) + (property PIN_BUSIDX (integer 23) (owner "Xilinx")) + ) + (port (rename A_5_ "A<5>") + (direction INPUT) + (property PIN_BUSNAME (string "A<29:0>") (owner "Xilinx")) + (property PIN_BUSIDX (integer 24) (owner "Xilinx")) + ) + (port (rename A_4_ "A<4>") + (direction INPUT) + (property PIN_BUSNAME (string "A<29:0>") (owner "Xilinx")) + (property PIN_BUSIDX (integer 25) (owner "Xilinx")) + ) + (port (rename A_3_ "A<3>") + (direction INPUT) + (property PIN_BUSNAME (string "A<29:0>") (owner "Xilinx")) + (property PIN_BUSIDX (integer 26) (owner "Xilinx")) + ) + (port (rename A_2_ "A<2>") + (direction INPUT) + (property PIN_BUSNAME (string "A<29:0>") (owner "Xilinx")) + (property PIN_BUSIDX (integer 27) (owner "Xilinx")) + ) + (port (rename A_1_ "A<1>") + (direction INPUT) + (property PIN_BUSNAME (string "A<29:0>") (owner "Xilinx")) + (property PIN_BUSIDX (integer 28) (owner "Xilinx")) + ) + (port (rename A_0_ "A<0>") + (direction INPUT) + (property PIN_BUSNAME (string "A<29:0>") (owner "Xilinx")) + (property PIN_BUSIDX (integer 29) (owner "Xilinx")) + ) + (port (rename PCOUT_47_ "PCOUT<47>") + (direction OUTPUT) + (property PIN_BUSNAME (string "PCOUT<47:0>") (owner "Xilinx")) + (property PIN_BUSIDX (integer 0) (owner "Xilinx")) + ) + (port (rename PCOUT_46_ "PCOUT<46>") + (direction OUTPUT) + (property PIN_BUSNAME (string "PCOUT<47:0>") (owner "Xilinx")) + (property PIN_BUSIDX (integer 1) (owner "Xilinx")) + ) + (port (rename PCOUT_45_ "PCOUT<45>") + (direction OUTPUT) + (property PIN_BUSNAME (string "PCOUT<47:0>") (owner "Xilinx")) + (property PIN_BUSIDX (integer 2) (owner "Xilinx")) + ) + (port (rename PCOUT_44_ "PCOUT<44>") + (direction OUTPUT) + (property PIN_BUSNAME (string "PCOUT<47:0>") (owner "Xilinx")) + (property PIN_BUSIDX (integer 3) (owner "Xilinx")) + ) + (port (rename PCOUT_43_ "PCOUT<43>") + (direction OUTPUT) + (property PIN_BUSNAME (string "PCOUT<47:0>") (owner "Xilinx")) + (property PIN_BUSIDX (integer 4) (owner "Xilinx")) + ) + (port (rename PCOUT_42_ "PCOUT<42>") + (direction OUTPUT) + (property PIN_BUSNAME (string "PCOUT<47:0>") (owner "Xilinx")) + (property PIN_BUSIDX (integer 5) (owner "Xilinx")) + ) + (port (rename PCOUT_41_ "PCOUT<41>") + (direction OUTPUT) + (property PIN_BUSNAME (string "PCOUT<47:0>") (owner "Xilinx")) + (property PIN_BUSIDX (integer 6) (owner "Xilinx")) + ) + (port (rename PCOUT_40_ "PCOUT<40>") + (direction OUTPUT) + (property PIN_BUSNAME (string "PCOUT<47:0>") (owner "Xilinx")) + (property PIN_BUSIDX (integer 7) (owner "Xilinx")) + ) + (port (rename PCOUT_39_ "PCOUT<39>") + (direction OUTPUT) + (property PIN_BUSNAME (string "PCOUT<47:0>") (owner "Xilinx")) + (property PIN_BUSIDX (integer 8) (owner "Xilinx")) + ) + (port (rename PCOUT_38_ "PCOUT<38>") + (direction OUTPUT) + (property PIN_BUSNAME (string "PCOUT<47:0>") (owner "Xilinx")) + (property PIN_BUSIDX (integer 9) (owner "Xilinx")) + ) + (port (rename PCOUT_37_ "PCOUT<37>") + (direction OUTPUT) + (property PIN_BUSNAME (string "PCOUT<47:0>") (owner "Xilinx")) + (property PIN_BUSIDX (integer 10) (owner "Xilinx")) + ) + (port (rename PCOUT_36_ "PCOUT<36>") + (direction OUTPUT) + (property PIN_BUSNAME (string "PCOUT<47:0>") (owner "Xilinx")) + (property PIN_BUSIDX (integer 11) (owner "Xilinx")) + ) + (port (rename PCOUT_35_ "PCOUT<35>") + (direction OUTPUT) + (property PIN_BUSNAME (string "PCOUT<47:0>") (owner "Xilinx")) + (property PIN_BUSIDX (integer 12) (owner "Xilinx")) + ) + (port (rename PCOUT_34_ "PCOUT<34>") + (direction OUTPUT) + (property PIN_BUSNAME (string "PCOUT<47:0>") (owner "Xilinx")) + (property PIN_BUSIDX (integer 13) (owner "Xilinx")) + ) + (port (rename PCOUT_33_ "PCOUT<33>") + (direction OUTPUT) + (property PIN_BUSNAME (string "PCOUT<47:0>") (owner "Xilinx")) + (property PIN_BUSIDX (integer 14) (owner "Xilinx")) + ) + (port (rename PCOUT_32_ "PCOUT<32>") + (direction OUTPUT) + (property PIN_BUSNAME (string "PCOUT<47:0>") (owner "Xilinx")) + (property PIN_BUSIDX (integer 15) (owner "Xilinx")) + ) + (port (rename PCOUT_31_ "PCOUT<31>") + (direction OUTPUT) + (property PIN_BUSNAME (string "PCOUT<47:0>") (owner "Xilinx")) + (property PIN_BUSIDX (integer 16) (owner "Xilinx")) + ) + (port (rename PCOUT_30_ "PCOUT<30>") + (direction OUTPUT) + (property PIN_BUSNAME (string "PCOUT<47:0>") (owner "Xilinx")) + (property PIN_BUSIDX (integer 17) (owner "Xilinx")) + ) + (port (rename PCOUT_29_ "PCOUT<29>") + (direction OUTPUT) + (property PIN_BUSNAME (string "PCOUT<47:0>") (owner "Xilinx")) + (property PIN_BUSIDX (integer 18) (owner "Xilinx")) + ) + (port (rename PCOUT_28_ "PCOUT<28>") + (direction OUTPUT) + (property PIN_BUSNAME (string "PCOUT<47:0>") (owner "Xilinx")) + (property PIN_BUSIDX (integer 19) (owner "Xilinx")) + ) + (port (rename PCOUT_27_ "PCOUT<27>") + (direction OUTPUT) + (property PIN_BUSNAME (string "PCOUT<47:0>") (owner "Xilinx")) + (property PIN_BUSIDX (integer 20) (owner "Xilinx")) + ) + (port (rename PCOUT_26_ "PCOUT<26>") + (direction OUTPUT) + (property PIN_BUSNAME (string "PCOUT<47:0>") (owner "Xilinx")) + (property PIN_BUSIDX (integer 21) (owner "Xilinx")) + ) + (port (rename PCOUT_25_ "PCOUT<25>") + (direction OUTPUT) + (property PIN_BUSNAME (string "PCOUT<47:0>") (owner "Xilinx")) + (property PIN_BUSIDX (integer 22) (owner "Xilinx")) + ) + (port (rename PCOUT_24_ "PCOUT<24>") + (direction OUTPUT) + (property PIN_BUSNAME (string "PCOUT<47:0>") (owner "Xilinx")) + (property PIN_BUSIDX (integer 23) (owner "Xilinx")) + ) + (port (rename PCOUT_23_ "PCOUT<23>") + (direction OUTPUT) + (property PIN_BUSNAME (string "PCOUT<47:0>") (owner "Xilinx")) + (property PIN_BUSIDX (integer 24) (owner "Xilinx")) + ) + (port (rename PCOUT_22_ "PCOUT<22>") + (direction OUTPUT) + (property PIN_BUSNAME (string "PCOUT<47:0>") (owner "Xilinx")) + (property PIN_BUSIDX (integer 25) (owner "Xilinx")) + ) + (port (rename PCOUT_21_ "PCOUT<21>") + (direction OUTPUT) + (property PIN_BUSNAME (string "PCOUT<47:0>") (owner "Xilinx")) + (property PIN_BUSIDX (integer 26) (owner "Xilinx")) + ) + (port (rename PCOUT_20_ "PCOUT<20>") + (direction OUTPUT) + (property PIN_BUSNAME (string "PCOUT<47:0>") (owner "Xilinx")) + (property PIN_BUSIDX (integer 27) (owner "Xilinx")) + ) + (port (rename PCOUT_19_ "PCOUT<19>") + (direction OUTPUT) + (property PIN_BUSNAME (string "PCOUT<47:0>") (owner "Xilinx")) + (property PIN_BUSIDX (integer 28) (owner "Xilinx")) + ) + (port (rename PCOUT_18_ "PCOUT<18>") + (direction OUTPUT) + (property PIN_BUSNAME (string "PCOUT<47:0>") (owner "Xilinx")) + (property PIN_BUSIDX (integer 29) (owner "Xilinx")) + ) + (port (rename PCOUT_17_ "PCOUT<17>") + (direction OUTPUT) + (property PIN_BUSNAME (string "PCOUT<47:0>") (owner "Xilinx")) + (property PIN_BUSIDX (integer 30) (owner "Xilinx")) + ) + (port (rename PCOUT_16_ "PCOUT<16>") + (direction OUTPUT) + (property PIN_BUSNAME (string "PCOUT<47:0>") (owner "Xilinx")) + (property PIN_BUSIDX (integer 31) (owner "Xilinx")) + ) + (port (rename PCOUT_15_ "PCOUT<15>") + (direction OUTPUT) + (property PIN_BUSNAME (string "PCOUT<47:0>") (owner "Xilinx")) + (property PIN_BUSIDX (integer 32) (owner "Xilinx")) + ) + (port (rename PCOUT_14_ "PCOUT<14>") + (direction OUTPUT) + (property PIN_BUSNAME (string "PCOUT<47:0>") (owner "Xilinx")) + (property PIN_BUSIDX (integer 33) (owner "Xilinx")) + ) + (port (rename PCOUT_13_ "PCOUT<13>") + (direction OUTPUT) + (property PIN_BUSNAME (string "PCOUT<47:0>") (owner "Xilinx")) + (property PIN_BUSIDX (integer 34) (owner "Xilinx")) + ) + (port (rename PCOUT_12_ "PCOUT<12>") + (direction OUTPUT) + (property PIN_BUSNAME (string "PCOUT<47:0>") (owner "Xilinx")) + (property PIN_BUSIDX (integer 35) (owner "Xilinx")) + ) + (port (rename PCOUT_11_ "PCOUT<11>") + (direction OUTPUT) + (property PIN_BUSNAME (string "PCOUT<47:0>") (owner "Xilinx")) + (property PIN_BUSIDX (integer 36) (owner "Xilinx")) + ) + (port (rename PCOUT_10_ "PCOUT<10>") + (direction OUTPUT) + (property PIN_BUSNAME (string "PCOUT<47:0>") (owner "Xilinx")) + (property PIN_BUSIDX (integer 37) (owner "Xilinx")) + ) + (port (rename PCOUT_9_ "PCOUT<9>") + (direction OUTPUT) + (property PIN_BUSNAME (string "PCOUT<47:0>") (owner "Xilinx")) + (property PIN_BUSIDX (integer 38) (owner "Xilinx")) + ) + (port (rename PCOUT_8_ "PCOUT<8>") + (direction OUTPUT) + (property PIN_BUSNAME (string "PCOUT<47:0>") (owner "Xilinx")) + (property PIN_BUSIDX (integer 39) (owner "Xilinx")) + ) + (port (rename PCOUT_7_ "PCOUT<7>") + (direction OUTPUT) + (property PIN_BUSNAME (string "PCOUT<47:0>") (owner "Xilinx")) + (property PIN_BUSIDX (integer 40) (owner "Xilinx")) + ) + (port (rename PCOUT_6_ "PCOUT<6>") + (direction OUTPUT) + (property PIN_BUSNAME (string "PCOUT<47:0>") (owner "Xilinx")) + (property PIN_BUSIDX (integer 41) (owner "Xilinx")) + ) + (port (rename PCOUT_5_ "PCOUT<5>") + (direction OUTPUT) + (property PIN_BUSNAME (string "PCOUT<47:0>") (owner "Xilinx")) + (property PIN_BUSIDX (integer 42) (owner "Xilinx")) + ) + (port (rename PCOUT_4_ "PCOUT<4>") + (direction OUTPUT) + (property PIN_BUSNAME (string "PCOUT<47:0>") (owner "Xilinx")) + (property PIN_BUSIDX (integer 43) (owner "Xilinx")) + ) + (port (rename PCOUT_3_ "PCOUT<3>") + (direction OUTPUT) + (property PIN_BUSNAME (string "PCOUT<47:0>") (owner "Xilinx")) + (property PIN_BUSIDX (integer 44) (owner "Xilinx")) + ) + (port (rename PCOUT_2_ "PCOUT<2>") + (direction OUTPUT) + (property PIN_BUSNAME (string "PCOUT<47:0>") (owner "Xilinx")) + (property PIN_BUSIDX (integer 45) (owner "Xilinx")) + ) + (port (rename PCOUT_1_ "PCOUT<1>") + (direction OUTPUT) + (property PIN_BUSNAME (string "PCOUT<47:0>") (owner "Xilinx")) + (property PIN_BUSIDX (integer 46) (owner "Xilinx")) + ) + (port (rename PCOUT_0_ "PCOUT<0>") + (direction OUTPUT) + (property PIN_BUSNAME (string "PCOUT<47:0>") (owner "Xilinx")) + (property PIN_BUSIDX (integer 47) (owner "Xilinx")) + ) + (port (rename ACIN_29_ "ACIN<29>") + (direction INPUT) + (property PIN_BUSNAME (string "ACIN<29:0>") (owner "Xilinx")) + (property PIN_BUSIDX (integer 0) (owner "Xilinx")) + ) + (port (rename ACIN_28_ "ACIN<28>") + (direction INPUT) + (property PIN_BUSNAME (string "ACIN<29:0>") (owner "Xilinx")) + (property PIN_BUSIDX (integer 1) (owner "Xilinx")) + ) + (port (rename ACIN_27_ "ACIN<27>") + (direction INPUT) + (property PIN_BUSNAME (string "ACIN<29:0>") (owner "Xilinx")) + (property PIN_BUSIDX (integer 2) (owner "Xilinx")) + ) + (port (rename ACIN_26_ "ACIN<26>") + (direction INPUT) + (property PIN_BUSNAME (string "ACIN<29:0>") (owner "Xilinx")) + (property PIN_BUSIDX (integer 3) (owner "Xilinx")) + ) + (port (rename ACIN_25_ "ACIN<25>") + (direction INPUT) + (property PIN_BUSNAME (string "ACIN<29:0>") (owner "Xilinx")) + (property PIN_BUSIDX (integer 4) (owner "Xilinx")) + ) + (port (rename ACIN_24_ "ACIN<24>") + (direction INPUT) + (property PIN_BUSNAME (string "ACIN<29:0>") (owner "Xilinx")) + (property PIN_BUSIDX (integer 5) (owner "Xilinx")) + ) + (port (rename ACIN_23_ "ACIN<23>") + (direction INPUT) + (property PIN_BUSNAME (string "ACIN<29:0>") (owner "Xilinx")) + (property PIN_BUSIDX (integer 6) (owner "Xilinx")) + ) + (port (rename ACIN_22_ "ACIN<22>") + (direction INPUT) + (property PIN_BUSNAME (string "ACIN<29:0>") (owner "Xilinx")) + (property PIN_BUSIDX (integer 7) (owner "Xilinx")) + ) + (port (rename ACIN_21_ "ACIN<21>") + (direction INPUT) + (property PIN_BUSNAME (string "ACIN<29:0>") (owner "Xilinx")) + (property PIN_BUSIDX (integer 8) (owner "Xilinx")) + ) + (port (rename ACIN_20_ "ACIN<20>") + (direction INPUT) + (property PIN_BUSNAME (string "ACIN<29:0>") (owner "Xilinx")) + (property PIN_BUSIDX (integer 9) (owner "Xilinx")) + ) + (port (rename ACIN_19_ "ACIN<19>") + (direction INPUT) + (property PIN_BUSNAME (string "ACIN<29:0>") (owner "Xilinx")) + (property PIN_BUSIDX (integer 10) (owner "Xilinx")) + ) + (port (rename ACIN_18_ "ACIN<18>") + (direction INPUT) + (property PIN_BUSNAME (string "ACIN<29:0>") (owner "Xilinx")) + (property PIN_BUSIDX (integer 11) (owner "Xilinx")) + ) + (port (rename ACIN_17_ "ACIN<17>") + (direction INPUT) + (property PIN_BUSNAME (string "ACIN<29:0>") (owner "Xilinx")) + (property PIN_BUSIDX (integer 12) (owner "Xilinx")) + ) + (port (rename ACIN_16_ "ACIN<16>") + (direction INPUT) + (property PIN_BUSNAME (string "ACIN<29:0>") (owner "Xilinx")) + (property PIN_BUSIDX (integer 13) (owner "Xilinx")) + ) + (port (rename ACIN_15_ "ACIN<15>") + (direction INPUT) + (property PIN_BUSNAME (string "ACIN<29:0>") (owner "Xilinx")) + (property PIN_BUSIDX (integer 14) (owner "Xilinx")) + ) + (port (rename ACIN_14_ "ACIN<14>") + (direction INPUT) + (property PIN_BUSNAME (string "ACIN<29:0>") (owner "Xilinx")) + (property PIN_BUSIDX (integer 15) (owner "Xilinx")) + ) + (port (rename ACIN_13_ "ACIN<13>") + (direction INPUT) + (property PIN_BUSNAME (string "ACIN<29:0>") (owner "Xilinx")) + (property PIN_BUSIDX (integer 16) (owner "Xilinx")) + ) + (port (rename ACIN_12_ "ACIN<12>") + (direction INPUT) + (property PIN_BUSNAME (string "ACIN<29:0>") (owner "Xilinx")) + (property PIN_BUSIDX (integer 17) (owner "Xilinx")) + ) + (port (rename ACIN_11_ "ACIN<11>") + (direction INPUT) + (property PIN_BUSNAME (string "ACIN<29:0>") (owner "Xilinx")) + (property PIN_BUSIDX (integer 18) (owner "Xilinx")) + ) + (port (rename ACIN_10_ "ACIN<10>") + (direction INPUT) + (property PIN_BUSNAME (string "ACIN<29:0>") (owner "Xilinx")) + (property PIN_BUSIDX (integer 19) (owner "Xilinx")) + ) + (port (rename ACIN_9_ "ACIN<9>") + (direction INPUT) + (property PIN_BUSNAME (string "ACIN<29:0>") (owner "Xilinx")) + (property PIN_BUSIDX (integer 20) (owner "Xilinx")) + ) + (port (rename ACIN_8_ "ACIN<8>") + (direction INPUT) + (property PIN_BUSNAME (string "ACIN<29:0>") (owner "Xilinx")) + (property PIN_BUSIDX (integer 21) (owner "Xilinx")) + ) + (port (rename ACIN_7_ "ACIN<7>") + (direction INPUT) + (property PIN_BUSNAME (string "ACIN<29:0>") (owner "Xilinx")) + (property PIN_BUSIDX (integer 22) (owner "Xilinx")) + ) + (port (rename ACIN_6_ "ACIN<6>") + (direction INPUT) + (property PIN_BUSNAME (string "ACIN<29:0>") (owner "Xilinx")) + (property PIN_BUSIDX (integer 23) (owner "Xilinx")) + ) + (port (rename ACIN_5_ "ACIN<5>") + (direction INPUT) + (property PIN_BUSNAME (string "ACIN<29:0>") (owner "Xilinx")) + (property PIN_BUSIDX (integer 24) (owner "Xilinx")) + ) + (port (rename ACIN_4_ "ACIN<4>") + (direction INPUT) + (property PIN_BUSNAME (string "ACIN<29:0>") (owner "Xilinx")) + (property PIN_BUSIDX (integer 25) (owner "Xilinx")) + ) + (port (rename ACIN_3_ "ACIN<3>") + (direction INPUT) + (property PIN_BUSNAME (string "ACIN<29:0>") (owner "Xilinx")) + (property PIN_BUSIDX (integer 26) (owner "Xilinx")) + ) + (port (rename ACIN_2_ "ACIN<2>") + (direction INPUT) + (property PIN_BUSNAME (string "ACIN<29:0>") (owner "Xilinx")) + (property PIN_BUSIDX (integer 27) (owner "Xilinx")) + ) + (port (rename ACIN_1_ "ACIN<1>") + (direction INPUT) + (property PIN_BUSNAME (string "ACIN<29:0>") (owner "Xilinx")) + (property PIN_BUSIDX (integer 28) (owner "Xilinx")) + ) + (port (rename ACIN_0_ "ACIN<0>") + (direction INPUT) + (property PIN_BUSNAME (string "ACIN<29:0>") (owner "Xilinx")) + (property PIN_BUSIDX (integer 29) (owner "Xilinx")) + ) + (port (rename CARRYINSEL_2_ "CARRYINSEL<2>") + (direction INPUT) + (property PIN_BUSNAME (string "CARRYINSEL<2:0>") (owner "Xilinx")) + (property PIN_BUSIDX (integer 0) (owner "Xilinx")) + ) + (port (rename CARRYINSEL_1_ "CARRYINSEL<1>") + (direction INPUT) + (property PIN_BUSNAME (string "CARRYINSEL<2:0>") (owner "Xilinx")) + (property PIN_BUSIDX (integer 1) (owner "Xilinx")) + ) + (port (rename CARRYINSEL_0_ "CARRYINSEL<0>") + (direction INPUT) + (property PIN_BUSNAME (string "CARRYINSEL<2:0>") (owner "Xilinx")) + (property PIN_BUSIDX (integer 2) (owner "Xilinx")) + ) + ) + ) + ) + (cell MUXCY + (cellType GENERIC) + (view view_1 + (viewType NETLIST) + (interface + (port CI + (direction INPUT) + ) + (port DI + (direction INPUT) + ) + (port S + (direction INPUT) + ) + (port O + (direction OUTPUT) + ) + ) + ) + ) + (cell FDSE + (cellType GENERIC) + (view view_1 + (viewType NETLIST) + (interface + (port C + (direction INPUT) + ) + (port CE + (direction INPUT) + ) + (port D + (direction INPUT) + ) + (port S + (direction INPUT) + ) + (port Q + (direction OUTPUT) + ) + ) + ) + ) + (cell FDRE + (cellType GENERIC) + (view view_1 + (viewType NETLIST) + (interface + (port C + (direction INPUT) + ) + (port CE + (direction INPUT) + ) + (port D + (direction INPUT) + ) + (port R + (direction INPUT) + ) + (port Q + (direction OUTPUT) + ) + ) + ) + ) + (cell FDE + (cellType GENERIC) + (view view_1 + (viewType NETLIST) + (interface + (port C + (direction INPUT) + ) + (port CE + (direction INPUT) + ) + (port D + (direction INPUT) + ) + (port Q + (direction OUTPUT) + ) + ) + ) + ) + (cell FDR + (cellType GENERIC) + (view view_1 + (viewType NETLIST) + (interface + (port C + (direction INPUT) + ) + (port D + (direction INPUT) + ) + (port R + (direction INPUT) + ) + (port Q + (direction OUTPUT) + ) + ) + ) + ) + (cell RAM32X1D + (cellType GENERIC) + (view view_1 + (viewType NETLIST) + (interface + (port A0 + (direction INPUT) + ) + (port A1 + (direction INPUT) + ) + (port A2 + (direction INPUT) + ) + (port A3 + (direction INPUT) + ) + (port A4 + (direction INPUT) + ) + (port D + (direction INPUT) + ) + (port DPRA0 + (direction INPUT) + ) + (port DPRA1 + (direction INPUT) + ) + (port DPRA2 + (direction INPUT) + ) + (port DPRA3 + (direction INPUT) + ) + (port DPRA4 + (direction INPUT) + ) + (port WCLK + (direction INPUT) + ) + (port WE + (direction INPUT) + ) + (port SPO + (direction OUTPUT) + ) + (port DPO + (direction OUTPUT) + ) + ) + ) + ) + (cell LUT2 + (cellType GENERIC) + (view view_1 + (viewType NETLIST) + (interface + (port I0 + (direction INPUT) + ) + (port I1 + (direction INPUT) + ) + (port O + (direction OUTPUT) + ) + ) + ) + ) + (cell MUXCY_L + (cellType GENERIC) + (view view_1 + (viewType NETLIST) + (interface + (port CI + (direction INPUT) + ) + (port DI + (direction INPUT) + ) + (port S + (direction INPUT) + ) + (port LO + (direction OUTPUT) + ) + ) + ) + ) + (cell SRLC16E + (cellType GENERIC) + (view view_1 + (viewType NETLIST) + (interface + (port A0 + (direction INPUT) + ) + (port A1 + (direction INPUT) + ) + (port A2 + (direction INPUT) + ) + (port A3 + (direction INPUT) + ) + (port CE + (direction INPUT) + ) + (port CLK + (direction INPUT) + ) + (port D + (direction INPUT) + ) + (port Q + (direction OUTPUT) + ) + (port Q15 + (direction OUTPUT) + ) + ) + ) + ) + (cell LUT4 + (cellType GENERIC) + (view view_1 + (viewType NETLIST) + (interface + (port I0 + (direction INPUT) + ) + (port I1 + (direction INPUT) + ) + (port I2 + (direction INPUT) + ) + (port I3 + (direction INPUT) + ) + (port O + (direction OUTPUT) + ) + ) + ) + ) + (cell LUT3 + (cellType GENERIC) + (view view_1 + (viewType NETLIST) + (interface + (port I0 + (direction INPUT) + ) + (port I1 + (direction INPUT) + ) + (port I2 + (direction INPUT) + ) + (port O + (direction OUTPUT) + ) + ) + ) + ) + (cell LUT5 + (cellType GENERIC) + (view view_1 + (viewType NETLIST) + (interface + (port I0 + (direction INPUT) + ) + (port I1 + (direction INPUT) + ) + (port I2 + (direction INPUT) + ) + (port I3 + (direction INPUT) + ) + (port I4 + (direction INPUT) + ) + (port O + (direction OUTPUT) + ) + ) + ) + ) + (cell LUT1 + (cellType GENERIC) + (view view_1 + (viewType NETLIST) + (interface + (port I0 + (direction INPUT) + ) + (port O + (direction OUTPUT) + ) + ) + ) + ) + (cell INV + (cellType GENERIC) + (view view_1 + (viewType NETLIST) + (interface + (port I + (direction INPUT) + ) + (port O + (direction OUTPUT) + ) + ) + ) + ) + ) + + (library hbdec2_lib + (edifLevel 0) + (technology (numberDefinition)) + (cell (rename dpr_ram_5_blk000004a4 "dpr_ram_5") + (cellType GENERIC) + (view view_1 + (viewType NETLIST) + (interface + (port WEA + (direction INPUT) + ) + (port CE + (direction INPUT) + ) + (port SCLR + (direction INPUT) + ) + (port CLK + (direction INPUT) + ) + (port (array (rename ADDRA "ADDRA<0:0>") 1) + (direction INPUT)) + (port (array (rename DA_IN "DA_IN<17:0>") 18) + (direction INPUT)) + (port (array (rename ADDRB "ADDRB<0:0>") 1) + (direction INPUT)) + (port (array (rename DA_OUT "DA_OUT<17:0>") 18) + (direction OUTPUT)) + (port (array (rename DB_OUT "DB_OUT<17:0>") 18) + (direction OUTPUT)) + ) + (contents + (instance blk000004a5 + (viewRef view_1 (cellRef GND (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + ) + (instance blk000004a6 + (viewRef view_1 (cellRef FDE (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property INIT (string "0") (owner "Xilinx")) + ) + (instance blk000004a7 + (viewRef view_1 (cellRef FDE (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property INIT (string "0") (owner "Xilinx")) + ) + (instance blk000004a8 + (viewRef view_1 (cellRef FDE (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property INIT (string "0") (owner "Xilinx")) + ) + (instance blk000004a9 + (viewRef view_1 (cellRef FDE (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property INIT (string "0") (owner "Xilinx")) + ) + (instance blk000004aa + (viewRef view_1 (cellRef FDE (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property INIT (string "0") (owner "Xilinx")) + ) + (instance blk000004ab + (viewRef view_1 (cellRef FDE (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property INIT (string "0") (owner "Xilinx")) + ) + (instance blk000004ac + (viewRef view_1 (cellRef FDE (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property INIT (string "0") (owner "Xilinx")) + ) + (instance blk000004ad + (viewRef view_1 (cellRef FDE (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property INIT (string "0") (owner "Xilinx")) + ) + (instance blk000004ae + (viewRef view_1 (cellRef FDE (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property INIT (string "0") (owner "Xilinx")) + ) + (instance blk000004af + (viewRef view_1 (cellRef FDE (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property INIT (string "0") (owner "Xilinx")) + ) + (instance blk000004b0 + (viewRef view_1 (cellRef FDE (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner 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CARRYINSELREG (integer 1) (owner "Xilinx")) + (property CREG (integer 1) (owner "Xilinx")) + (property DREG (integer 0) (owner "Xilinx")) + (property INMODEREG (integer 0) (owner "Xilinx")) + (property MASK (string "FFFFFFFFFFFE") (owner "Xilinx")) + (property MREG (integer 1) (owner "Xilinx")) + (property OPMODEREG (integer 1) (owner "Xilinx")) + (property PATTERN (string "000000000000") (owner "Xilinx")) + (property PREG (integer 1) (owner "Xilinx")) + (property SEL_MASK (string "MASK") (owner "Xilinx")) + (property SEL_PATTERN (string "PATTERN") (owner "Xilinx")) + (property USE_DPORT (string "FALSE") (owner "Xilinx")) + (property USE_MULT (string "MULTIPLY") (owner "Xilinx")) + (property USE_PATTERN_DETECT (string "NO_PATDET") (owner "Xilinx")) + (property USE_SIMD (string "ONE48") (owner "Xilinx")) + ) + (instance blk00000011 + (viewRef view_1 (cellRef DSP48E1 (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property BUS_INFO (string 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"48:OUTPUT:P<47:0>") (owner "Xilinx")) + (property BUS_INFO (string "30:INPUT:A<29:0>") (owner "Xilinx")) + (property OPTIMIZE_PRIMITIVES_NGC (string "no") (owner "Xilinx")) + (property ACASCREG (integer 2) (owner "Xilinx")) + (property ADREG (integer 0) (owner "Xilinx")) + (property ALUMODEREG (integer 1) (owner "Xilinx")) + (property AREG (integer 2) (owner "Xilinx")) + (property AUTORESET_PATDET (string "NO_RESET") (owner "Xilinx")) + (property A_INPUT (string "DIRECT") (owner "Xilinx")) + (property BCASCREG (integer 2) (owner "Xilinx")) + (property BREG (integer 2) (owner "Xilinx")) + (property B_INPUT (string "DIRECT") (owner "Xilinx")) + (property CARRYINREG (integer 1) (owner "Xilinx")) + (property CARRYINSELREG (integer 1) (owner "Xilinx")) + (property CREG (integer 1) (owner "Xilinx")) + (property DREG (integer 0) (owner "Xilinx")) + (property INMODEREG (integer 0) (owner "Xilinx")) + (property MASK (string "FFFFFFFFFFFE") (owner "Xilinx")) + (property MREG (integer 1) (owner "Xilinx")) + (property OPMODEREG (integer 1) (owner "Xilinx")) + (property PATTERN (string "000000000000") (owner "Xilinx")) + (property PREG (integer 1) (owner "Xilinx")) + (property SEL_MASK (string "MASK") (owner "Xilinx")) + (property SEL_PATTERN (string "PATTERN") (owner "Xilinx")) + (property USE_DPORT (string "FALSE") (owner "Xilinx")) + (property USE_MULT (string "MULTIPLY") (owner "Xilinx")) + (property USE_PATTERN_DETECT (string "NO_PATDET") (owner "Xilinx")) + (property USE_SIMD (string "ONE48") (owner "Xilinx")) + ) + (instance blk00000012 + (viewRef view_1 (cellRef MUXCY_D (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property OPTIMIZE_PRIMITIVES_NGC (string "no") (owner "Xilinx")) + ) + (instance blk00000013 + (viewRef view_1 (cellRef MUXCY_D (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property OPTIMIZE_PRIMITIVES_NGC (string "no") (owner "Xilinx")) + ) + (instance blk00000014 + (viewRef view_1 (cellRef MUXCY (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property OPTIMIZE_PRIMITIVES_NGC (string "no") (owner "Xilinx")) + ) + (instance blk00000015 + (viewRef view_1 (cellRef FDSE (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property OPTIMIZE_PRIMITIVES_NGC (string "no") (owner "Xilinx")) + (property INIT (string "1") (owner "Xilinx")) + ) + (instance blk00000016 + (viewRef view_1 (cellRef FDRE (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property OPTIMIZE_PRIMITIVES_NGC (string "no") (owner "Xilinx")) + (property INIT (string "0") (owner "Xilinx")) + ) + (instance blk00000017 + (viewRef view_1 (cellRef FDRE (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property OPTIMIZE_PRIMITIVES_NGC (string "no") (owner "Xilinx")) + (property INIT (string "0") (owner "Xilinx")) + ) + (instance blk00000018 + (viewRef view_1 (cellRef FDE (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property INIT (string "0") (owner "Xilinx")) + ) + (instance blk00000019 + (viewRef view_1 (cellRef FDRE (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property OPTIMIZE_PRIMITIVES_NGC (string "no") (owner "Xilinx")) + (property INIT (string "0") (owner "Xilinx")) + ) + (instance blk0000001a + (viewRef view_1 (cellRef FDRE (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property OPTIMIZE_PRIMITIVES_NGC (string "no") (owner "Xilinx")) + (property INIT (string "0") (owner "Xilinx")) + ) + (instance blk0000001b + (viewRef view_1 (cellRef FDRE (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property OPTIMIZE_PRIMITIVES_NGC (string "no") (owner "Xilinx")) + (property INIT (string "0") (owner "Xilinx")) + ) + (instance blk0000001c + (viewRef view_1 (cellRef FDRE (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property OPTIMIZE_PRIMITIVES_NGC (string "no") (owner "Xilinx")) + (property INIT (string "0") (owner "Xilinx")) + ) + (instance blk0000001d + (viewRef view_1 (cellRef FDRE (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property OPTIMIZE_PRIMITIVES_NGC (string "no") (owner "Xilinx")) + (property INIT (string "0") (owner "Xilinx")) + ) + (instance blk0000001e + (viewRef view_1 (cellRef FDRE (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property OPTIMIZE_PRIMITIVES_NGC (string "no") (owner "Xilinx")) + (property INIT (string "0") (owner "Xilinx")) + ) + (instance blk0000001f + (viewRef view_1 (cellRef FDRE (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property OPTIMIZE_PRIMITIVES_NGC (string "no") (owner "Xilinx")) + (property INIT (string "0") (owner "Xilinx")) + ) + (instance blk00000020 + (viewRef view_1 (cellRef FDRE (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property OPTIMIZE_PRIMITIVES_NGC (string "no") (owner "Xilinx")) + (property INIT (string "0") (owner "Xilinx")) + ) + (instance blk00000021 + (viewRef view_1 (cellRef FDSE (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property OPTIMIZE_PRIMITIVES_NGC (string "no") (owner "Xilinx")) + (property INIT (string "1") (owner "Xilinx")) + ) + (instance blk00000022 + (viewRef view_1 (cellRef FDRE (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + ) + (instance blk00000023 + (viewRef view_1 (cellRef FDSE (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + ) + (instance blk00000024 + (viewRef view_1 (cellRef FDRE (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property INIT (string "0") (owner "Xilinx")) + ) + (instance blk00000025 + (viewRef view_1 (cellRef FDRE (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + ) + (instance blk00000026 + (viewRef view_1 (cellRef FDRE (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property INIT (string "0") (owner "Xilinx")) + ) + (instance blk00000027 + (viewRef view_1 (cellRef FDRE (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property INIT (string "0") (owner "Xilinx")) + ) + (instance blk00000028 + (viewRef view_1 (cellRef FDRE (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property INIT (string "0") (owner "Xilinx")) + ) + (instance blk00000029 + (viewRef view_1 (cellRef FDR (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property INIT (string "1") (owner "Xilinx")) + ) + (instance blk0000002a + (viewRef view_1 (cellRef FDRE (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property INIT (string "0") (owner "Xilinx")) + ) + (instance blk0000002b + (viewRef view_1 (cellRef dpr_ram_1_blk0000002b (libraryRef hbdec2_lib))) + (property BUS_INFO (string "2:INPUT:ADDRA<1:0>") (owner "Xilinx")) + (property BUS_INFO (string "48:INPUT:DA_IN<47:0>") (owner "Xilinx")) + (property BUS_INFO (string "2:INPUT:ADDRB<1:0>") (owner "Xilinx")) + (property BUS_INFO (string "48:OUTPUT:DA_OUT<47:0>") (owner "Xilinx")) + (property BUS_INFO (string "48:OUTPUT:DB_OUT<47:0>") (owner "Xilinx")) + (property NLW_UNIQUE_ID (integer 0) (owner "Xilinx")) + (property NLW_MACRO_TAG (integer 2) (owner "Xilinx")) + (property NLW_MACRO_ALIAS (string "dpr_ram_1_blk0000002b") (owner "Xilinx")) + ) + (instance blk0000008e + (viewRef view_1 (cellRef FDSE (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property OPTIMIZE_PRIMITIVES_NGC (string "no") (owner "Xilinx")) + (property INIT (string "1") (owner "Xilinx")) + ) + (instance blk0000008f + (viewRef view_1 (cellRef FDRE (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property OPTIMIZE_PRIMITIVES_NGC (string "no") (owner "Xilinx")) + (property INIT (string "0") (owner "Xilinx")) + ) + (instance blk00000090 + (viewRef view_1 (cellRef MUXCY_D (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property OPTIMIZE_PRIMITIVES_NGC (string "no") (owner "Xilinx")) + ) + (instance blk00000091 + (viewRef view_1 (cellRef MUXCY_D (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property OPTIMIZE_PRIMITIVES_NGC (string "no") (owner "Xilinx")) + ) + (instance blk00000092 + (viewRef view_1 (cellRef XORCY (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property OPTIMIZE_PRIMITIVES_NGC (string "no") (owner "Xilinx")) + ) + (instance blk00000093 + (viewRef view_1 (cellRef MUXCY_D (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property OPTIMIZE_PRIMITIVES_NGC (string "no") (owner "Xilinx")) + ) + (instance blk00000094 + (viewRef view_1 (cellRef MUXCY_D (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property OPTIMIZE_PRIMITIVES_NGC (string "no") (owner "Xilinx")) + ) + (instance blk00000095 + (viewRef view_1 (cellRef MUXCY_D (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property OPTIMIZE_PRIMITIVES_NGC (string "no") (owner "Xilinx")) + ) + (instance blk00000096 + (viewRef view_1 (cellRef MUXCY_D (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property OPTIMIZE_PRIMITIVES_NGC (string "no") (owner "Xilinx")) + ) + (instance blk00000097 + (viewRef view_1 (cellRef MUXCY_D (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property OPTIMIZE_PRIMITIVES_NGC (string "no") (owner "Xilinx")) + ) + (instance blk00000098 + (viewRef view_1 (cellRef MUXCY_D (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property OPTIMIZE_PRIMITIVES_NGC (string "no") (owner "Xilinx")) + ) + (instance blk00000099 + (viewRef view_1 (cellRef FDE (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property INIT (string "0") (owner "Xilinx")) + ) + (instance blk0000009a + (viewRef view_1 (cellRef FDE (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property INIT (string "0") (owner "Xilinx")) + ) + (instance blk0000009b + (viewRef view_1 (cellRef FDRE (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property OPTIMIZE_PRIMITIVES_NGC (string "no") (owner "Xilinx")) + (property INIT (string "0") (owner "Xilinx")) + ) + (instance blk0000009c + (viewRef view_1 (cellRef FDRE (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property OPTIMIZE_PRIMITIVES_NGC (string "no") (owner "Xilinx")) + (property INIT (string "0") (owner "Xilinx")) + ) + (instance blk0000009d + (viewRef view_1 (cellRef FDRE (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property INIT (string "0") (owner "Xilinx")) + ) + (instance blk0000009e + (viewRef view_1 (cellRef FDRE (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property OPTIMIZE_PRIMITIVES_NGC (string "no") (owner "Xilinx")) + (property INIT (string "0") (owner "Xilinx")) + ) + (instance blk0000009f + (viewRef view_1 (cellRef FDRE (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property OPTIMIZE_PRIMITIVES_NGC (string "no") (owner "Xilinx")) + (property INIT (string "0") (owner "Xilinx")) + ) + (instance blk000000a0 + (viewRef view_1 (cellRef FDRE (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property OPTIMIZE_PRIMITIVES_NGC (string "no") (owner "Xilinx")) + (property INIT (string "0") (owner "Xilinx")) + ) + (instance blk000000a1 + (viewRef view_1 (cellRef FDRE (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property OPTIMIZE_PRIMITIVES_NGC (string "no") (owner "Xilinx")) + (property INIT (string "0") (owner "Xilinx")) + ) + (instance blk000000a2 + (viewRef view_1 (cellRef FDE (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property INIT (string "0") (owner "Xilinx")) + ) + (instance blk000000a3 + (viewRef view_1 (cellRef FDE (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property INIT (string "0") (owner "Xilinx")) + ) + (instance blk000000a4 + (viewRef view_1 (cellRef FDE (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property INIT (string "0") (owner "Xilinx")) + ) + (instance blk000000a5 + (viewRef view_1 (cellRef FDE (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property INIT (string "0") (owner "Xilinx")) + ) + (instance blk000000a6 + (viewRef view_1 (cellRef FDE (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property INIT (string "0") (owner "Xilinx")) + ) + (instance blk000000a7 + (viewRef view_1 (cellRef FDE (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property INIT (string "0") (owner "Xilinx")) + ) + (instance blk000000a8 + (viewRef view_1 (cellRef FDE (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property INIT (string "0") (owner "Xilinx")) + ) + (instance blk000000a9 + (viewRef view_1 (cellRef FDE (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property INIT (string "0") (owner "Xilinx")) + ) + (instance blk000000aa + (viewRef view_1 (cellRef FDE (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property INIT (string "0") (owner "Xilinx")) + ) + (instance blk000000ab + (viewRef view_1 (cellRef FDE (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property INIT (string "0") (owner "Xilinx")) + ) + (instance blk000000ac + (viewRef view_1 (cellRef FDE (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property INIT (string "0") (owner "Xilinx")) + ) + (instance blk000000ad + (viewRef view_1 (cellRef FDE (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property INIT (string "0") (owner "Xilinx")) + ) + (instance blk000000ae + (viewRef view_1 (cellRef FDE (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property INIT (string "0") (owner "Xilinx")) + ) + (instance blk000000af + (viewRef view_1 (cellRef FDE (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property INIT (string "0") (owner "Xilinx")) + ) + (instance blk000000b0 + (viewRef view_1 (cellRef FDE (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property INIT (string "0") (owner "Xilinx")) + ) + (instance blk000000b1 + (viewRef view_1 (cellRef XORCY (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property OPTIMIZE_PRIMITIVES_NGC (string "no") (owner "Xilinx")) + ) + (instance blk000000b2 + (viewRef view_1 (cellRef MUXCY_D (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property OPTIMIZE_PRIMITIVES_NGC (string "no") (owner "Xilinx")) + ) + (instance blk000000b3 + (viewRef view_1 (cellRef XORCY (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property OPTIMIZE_PRIMITIVES_NGC (string "no") (owner "Xilinx")) + ) + (instance blk000000b4 + (viewRef view_1 (cellRef MUXCY_L (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property OPTIMIZE_PRIMITIVES_NGC (string "no") (owner "Xilinx")) + ) + (instance blk000000b5 + (viewRef view_1 (cellRef XORCY (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property OPTIMIZE_PRIMITIVES_NGC (string "no") (owner "Xilinx")) + ) + (instance blk000000b6 + (viewRef view_1 (cellRef MUXCY_D (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property OPTIMIZE_PRIMITIVES_NGC (string "no") (owner "Xilinx")) + ) + (instance blk000000b7 + (viewRef view_1 (cellRef XORCY (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property OPTIMIZE_PRIMITIVES_NGC (string "no") (owner "Xilinx")) + ) + (instance blk000000b8 + (viewRef view_1 (cellRef MUXCY_L (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property OPTIMIZE_PRIMITIVES_NGC (string "no") (owner "Xilinx")) + ) + (instance blk000000b9 + (viewRef view_1 (cellRef XORCY (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property OPTIMIZE_PRIMITIVES_NGC (string "no") (owner "Xilinx")) + ) + (instance blk000000ba + (viewRef view_1 (cellRef XORCY (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property OPTIMIZE_PRIMITIVES_NGC (string "no") (owner "Xilinx")) + ) + (instance blk000000bb + (viewRef view_1 (cellRef MUXCY (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property OPTIMIZE_PRIMITIVES_NGC (string "no") (owner "Xilinx")) + ) + (instance blk000000bc + (viewRef view_1 (cellRef MUXCY_D (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property OPTIMIZE_PRIMITIVES_NGC (string "no") (owner "Xilinx")) + ) + (instance blk000000bd + (viewRef view_1 (cellRef MUXCY_L (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property OPTIMIZE_PRIMITIVES_NGC (string "no") (owner "Xilinx")) + ) + (instance blk000000be + (viewRef view_1 (cellRef MUXCY_L (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property OPTIMIZE_PRIMITIVES_NGC (string "no") (owner "Xilinx")) + ) + (instance blk000000bf + (viewRef view_1 (cellRef XORCY (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property OPTIMIZE_PRIMITIVES_NGC (string "no") (owner "Xilinx")) + ) + (instance blk000000c0 + (viewRef view_1 (cellRef MUXCY_D (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property OPTIMIZE_PRIMITIVES_NGC (string "no") (owner "Xilinx")) + ) + (instance blk000000c1 + (viewRef view_1 (cellRef XORCY (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property OPTIMIZE_PRIMITIVES_NGC (string "no") (owner "Xilinx")) + ) + (instance blk000000c2 + (viewRef view_1 (cellRef FDRE (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property INIT (string "0") (owner "Xilinx")) + ) + (instance blk000000c3 + (viewRef view_1 (cellRef FDRE (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property INIT (string "0") (owner "Xilinx")) + ) + (instance blk000000c4 + (viewRef view_1 (cellRef FDE (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + ) + (instance blk000000c5 + (viewRef view_1 (cellRef XORCY (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property OPTIMIZE_PRIMITIVES_NGC (string "no") (owner "Xilinx")) + ) + (instance blk000000c6 + (viewRef view_1 (cellRef MUXCY_D (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property OPTIMIZE_PRIMITIVES_NGC (string "no") (owner "Xilinx")) + ) + (instance blk000000c7 + (viewRef view_1 (cellRef MUXCY_D (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property OPTIMIZE_PRIMITIVES_NGC (string "no") (owner "Xilinx")) + ) + (instance blk000000c8 + (viewRef view_1 (cellRef MUXCY_D (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property OPTIMIZE_PRIMITIVES_NGC (string "no") (owner "Xilinx")) + ) + (instance blk000000c9 + (viewRef view_1 (cellRef MUXCY_D (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property OPTIMIZE_PRIMITIVES_NGC (string "no") (owner "Xilinx")) + ) + (instance blk000000ca + (viewRef view_1 (cellRef MUXCY_D (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property OPTIMIZE_PRIMITIVES_NGC (string "no") (owner "Xilinx")) + ) + (instance blk000000cb + (viewRef view_1 (cellRef MUXCY_D (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property OPTIMIZE_PRIMITIVES_NGC (string "no") (owner "Xilinx")) + ) + (instance blk000000cc + (viewRef view_1 (cellRef MUXCY_D (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property OPTIMIZE_PRIMITIVES_NGC (string "no") (owner "Xilinx")) + ) + (instance blk000000cd + (viewRef view_1 (cellRef FDRE (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property OPTIMIZE_PRIMITIVES_NGC (string "no") (owner "Xilinx")) + (property INIT (string "0") (owner "Xilinx")) + ) + (instance blk000000ce + (viewRef view_1 (cellRef FDSE (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property OPTIMIZE_PRIMITIVES_NGC (string "no") (owner "Xilinx")) + (property INIT (string "1") (owner "Xilinx")) + ) + (instance blk000000cf + (viewRef view_1 (cellRef XORCY (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property OPTIMIZE_PRIMITIVES_NGC (string "no") (owner "Xilinx")) + ) + (instance blk000000d0 + (viewRef view_1 (cellRef MUXCY_D (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property OPTIMIZE_PRIMITIVES_NGC (string "no") (owner "Xilinx")) + ) + (instance blk000000d1 + (viewRef view_1 (cellRef MUXCY_D (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property OPTIMIZE_PRIMITIVES_NGC (string "no") (owner "Xilinx")) + ) + (instance blk000000d2 + (viewRef view_1 (cellRef MUXCY_D (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property OPTIMIZE_PRIMITIVES_NGC (string "no") (owner "Xilinx")) + ) + (instance blk000000d3 + (viewRef view_1 (cellRef MUXCY_D (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property OPTIMIZE_PRIMITIVES_NGC (string "no") (owner "Xilinx")) + ) + (instance blk000000d4 + (viewRef view_1 (cellRef MUXCY_D (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property OPTIMIZE_PRIMITIVES_NGC (string "no") (owner "Xilinx")) + ) + (instance blk000000d5 + (viewRef view_1 (cellRef MUXCY_D (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property OPTIMIZE_PRIMITIVES_NGC (string "no") (owner "Xilinx")) + ) + (instance blk000000d6 + (viewRef view_1 (cellRef FDRE (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property OPTIMIZE_PRIMITIVES_NGC (string "no") (owner "Xilinx")) + (property INIT (string "0") (owner "Xilinx")) + ) + (instance blk000000d7 + (viewRef view_1 (cellRef FDSE (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property OPTIMIZE_PRIMITIVES_NGC (string "no") (owner "Xilinx")) + (property INIT (string "1") (owner "Xilinx")) + ) + (instance blk000000d8 + (viewRef view_1 (cellRef FDRE (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property OPTIMIZE_PRIMITIVES_NGC (string "no") (owner "Xilinx")) + (property INIT (string "0") (owner "Xilinx")) + ) + (instance blk000000d9 + (viewRef view_1 (cellRef MUXCY_D (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property OPTIMIZE_PRIMITIVES_NGC (string "no") (owner "Xilinx")) + ) + (instance blk000000da + (viewRef view_1 (cellRef MUXCY_D (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property OPTIMIZE_PRIMITIVES_NGC (string "no") (owner "Xilinx")) + ) + (instance blk000000db + (viewRef view_1 (cellRef MUXCY_D (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property OPTIMIZE_PRIMITIVES_NGC (string "no") (owner "Xilinx")) + ) + (instance blk000000dc + (viewRef view_1 (cellRef FDRE (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property INIT (string "0") (owner "Xilinx")) + ) + (instance blk000000dd + (viewRef view_1 (cellRef XORCY (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property OPTIMIZE_PRIMITIVES_NGC (string "no") (owner "Xilinx")) + ) + (instance blk000000de + (viewRef view_1 (cellRef XORCY (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property OPTIMIZE_PRIMITIVES_NGC (string "no") (owner "Xilinx")) + ) + (instance blk000000df + (viewRef view_1 (cellRef MUXCY (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property OPTIMIZE_PRIMITIVES_NGC (string "no") (owner "Xilinx")) + ) + (instance blk000000e0 + (viewRef view_1 (cellRef MUXCY_D (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property OPTIMIZE_PRIMITIVES_NGC (string "no") (owner "Xilinx")) + ) + (instance blk000000e1 + (viewRef view_1 (cellRef MUXCY_L (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property OPTIMIZE_PRIMITIVES_NGC (string "no") (owner "Xilinx")) + ) + (instance blk000000e2 + (viewRef view_1 (cellRef XORCY (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property OPTIMIZE_PRIMITIVES_NGC (string "no") (owner "Xilinx")) + ) + (instance blk000000e3 + (viewRef view_1 (cellRef XORCY (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property OPTIMIZE_PRIMITIVES_NGC (string "no") (owner "Xilinx")) + ) + (instance blk000000e4 + (viewRef view_1 (cellRef MUXCY_D (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property OPTIMIZE_PRIMITIVES_NGC (string "no") (owner "Xilinx")) + ) + (instance blk000000e5 + (viewRef view_1 (cellRef MUXCY_L (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property OPTIMIZE_PRIMITIVES_NGC (string "no") (owner "Xilinx")) + ) + (instance blk000000e6 + (viewRef view_1 (cellRef FDE (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + ) + (instance blk000000e7 + (viewRef view_1 (cellRef XORCY (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property OPTIMIZE_PRIMITIVES_NGC (string "no") (owner "Xilinx")) + ) + (instance blk000000e8 + (viewRef view_1 (cellRef XORCY (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property OPTIMIZE_PRIMITIVES_NGC (string "no") (owner "Xilinx")) + ) + (instance blk000000e9 + (viewRef view_1 (cellRef MUXCY (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property OPTIMIZE_PRIMITIVES_NGC (string "no") (owner "Xilinx")) + ) + (instance blk000000ea + (viewRef view_1 (cellRef MUXCY_D (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property OPTIMIZE_PRIMITIVES_NGC (string "no") (owner "Xilinx")) + ) + (instance blk000000eb + (viewRef view_1 (cellRef MUXCY_L (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property OPTIMIZE_PRIMITIVES_NGC (string "no") (owner "Xilinx")) + ) + (instance blk000000ec + (viewRef view_1 (cellRef XORCY (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property OPTIMIZE_PRIMITIVES_NGC (string "no") (owner "Xilinx")) + ) + (instance blk000000ed + (viewRef view_1 (cellRef XORCY (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property OPTIMIZE_PRIMITIVES_NGC (string "no") (owner "Xilinx")) + ) + (instance blk000000ee + (viewRef view_1 (cellRef MUXCY_D (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property OPTIMIZE_PRIMITIVES_NGC (string "no") (owner "Xilinx")) + ) + (instance blk000000ef + (viewRef view_1 (cellRef MUXCY_L (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property OPTIMIZE_PRIMITIVES_NGC (string "no") (owner "Xilinx")) + ) + (instance blk000000f0 + (viewRef view_1 (cellRef MUXCY_L (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property OPTIMIZE_PRIMITIVES_NGC (string "no") (owner "Xilinx")) + ) + (instance blk000000f1 + (viewRef view_1 (cellRef XORCY (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property OPTIMIZE_PRIMITIVES_NGC (string "no") (owner "Xilinx")) + ) + (instance blk000000f2 + (viewRef view_1 (cellRef MUXCY_D (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property OPTIMIZE_PRIMITIVES_NGC (string "no") (owner "Xilinx")) + ) + (instance blk000000f3 + (viewRef view_1 (cellRef XORCY (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property OPTIMIZE_PRIMITIVES_NGC (string "no") (owner "Xilinx")) + ) + (instance blk000000f4 + (viewRef view_1 (cellRef FDE (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property INIT (string "0") (owner "Xilinx")) + ) + (instance blk000000f5 + (viewRef view_1 (cellRef FDE (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property INIT (string "0") (owner "Xilinx")) + ) + (instance blk000000f6 + (viewRef view_1 (cellRef FDRE (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property INIT (string "0") (owner "Xilinx")) + ) + (instance blk000000f7 + (viewRef view_1 (cellRef DSP48E1 (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property BUS_INFO (string "3:INPUT:CARRYINSEL<2:0>") (owner "Xilinx")) + (property BUS_INFO (string "4:OUTPUT:CARRYOUT<3:0>") (owner "Xilinx")) + (property BUS_INFO (string "4:INPUT:ALUMODE<3:0>") (owner "Xilinx")) + (property BUS_INFO (string "7:INPUT:OPMODE<6:0>") (owner "Xilinx")) + (property BUS_INFO (string "5:INPUT:INMODE<4:0>") (owner "Xilinx")) + (property BUS_INFO (string "30:OUTPUT:ACOUT<29:0>") (owner "Xilinx")) + (property BUS_INFO (string "18:OUTPUT:BCOUT<17:0>") (owner "Xilinx")) + (property BUS_INFO (string "48:OUTPUT:PCOUT<47:0>") (owner "Xilinx")) + (property BUS_INFO (string "48:INPUT:PCIN<47:0>") (owner "Xilinx")) + (property BUS_INFO (string "18:INPUT:BCIN<17:0>") (owner "Xilinx")) + (property BUS_INFO (string "30:INPUT:ACIN<29:0>") (owner "Xilinx")) + (property BUS_INFO (string "48:INPUT:C<47:0>") (owner "Xilinx")) + (property BUS_INFO (string "18:INPUT:B<17:0>") (owner "Xilinx")) + (property BUS_INFO (string "25:INPUT:D<24:0>") (owner "Xilinx")) + (property BUS_INFO (string "48:OUTPUT:P<47:0>") (owner "Xilinx")) + (property BUS_INFO (string "30:INPUT:A<29:0>") (owner "Xilinx")) + (property OPTIMIZE_PRIMITIVES_NGC (string "no") (owner "Xilinx")) + (property ACASCREG (integer 1) (owner "Xilinx")) + (property ADREG (integer 1) (owner "Xilinx")) + (property ALUMODEREG (integer 0) (owner "Xilinx")) + (property AREG (integer 1) (owner "Xilinx")) + (property AUTORESET_PATDET (string "NO_RESET") (owner "Xilinx")) + (property A_INPUT (string "DIRECT") (owner "Xilinx")) + (property BCASCREG (integer 1) (owner "Xilinx")) + (property BREG (integer 1) (owner "Xilinx")) + (property B_INPUT (string "DIRECT") (owner "Xilinx")) + (property CARRYINREG (integer 1) (owner "Xilinx")) + (property CARRYINSELREG (integer 1) (owner "Xilinx")) + (property CREG (integer 1) (owner "Xilinx")) + (property DREG (integer 1) (owner "Xilinx")) + (property INMODEREG (integer 1) (owner "Xilinx")) + (property MASK (string "FFFFFFFFFFFE") (owner "Xilinx")) + (property MREG (integer 1) (owner "Xilinx")) + (property OPMODEREG (integer 0) (owner "Xilinx")) + (property PATTERN (string "000000000000") (owner "Xilinx")) + (property PREG (integer 1) (owner "Xilinx")) + (property SEL_MASK (string "MASK") (owner "Xilinx")) + (property SEL_PATTERN (string "PATTERN") (owner "Xilinx")) + (property USE_DPORT (string "TRUE") (owner "Xilinx")) + (property USE_MULT (string "MULTIPLY") (owner "Xilinx")) + (property USE_PATTERN_DETECT (string "NO_PATDET") (owner "Xilinx")) + (property USE_SIMD (string "ONE48") (owner "Xilinx")) + ) + (instance blk000000f8 + (viewRef view_1 (cellRef DSP48E1 (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property BUS_INFO (string "3:INPUT:CARRYINSEL<2:0>") (owner "Xilinx")) + (property BUS_INFO (string "4:OUTPUT:CARRYOUT<3:0>") (owner "Xilinx")) + (property BUS_INFO (string "4:INPUT:ALUMODE<3:0>") (owner "Xilinx")) + (property BUS_INFO (string "7:INPUT:OPMODE<6:0>") (owner "Xilinx")) + (property BUS_INFO (string "5:INPUT:INMODE<4:0>") (owner "Xilinx")) + (property BUS_INFO (string "30:OUTPUT:ACOUT<29:0>") (owner "Xilinx")) + (property BUS_INFO (string "18:OUTPUT:BCOUT<17:0>") (owner "Xilinx")) + (property BUS_INFO (string "48:OUTPUT:PCOUT<47:0>") (owner "Xilinx")) + (property BUS_INFO (string "48:INPUT:PCIN<47:0>") (owner "Xilinx")) + (property BUS_INFO (string "18:INPUT:BCIN<17:0>") (owner "Xilinx")) + (property BUS_INFO (string "30:INPUT:ACIN<29:0>") (owner "Xilinx")) + (property BUS_INFO (string "48:INPUT:C<47:0>") (owner "Xilinx")) + (property BUS_INFO (string "18:INPUT:B<17:0>") (owner "Xilinx")) + (property BUS_INFO (string "25:INPUT:D<24:0>") (owner "Xilinx")) + (property BUS_INFO (string "48:OUTPUT:P<47:0>") (owner "Xilinx")) + (property BUS_INFO (string "30:INPUT:A<29:0>") (owner "Xilinx")) + (property OPTIMIZE_PRIMITIVES_NGC (string "no") (owner "Xilinx")) + (property ACASCREG (integer 1) (owner "Xilinx")) + (property ADREG (integer 1) (owner "Xilinx")) + (property ALUMODEREG (integer 0) (owner "Xilinx")) + (property AREG (integer 1) (owner "Xilinx")) + (property AUTORESET_PATDET (string "NO_RESET") (owner "Xilinx")) + (property A_INPUT (string "DIRECT") (owner "Xilinx")) + (property BCASCREG (integer 1) (owner "Xilinx")) + (property BREG (integer 1) (owner "Xilinx")) + (property B_INPUT (string "DIRECT") (owner "Xilinx")) + (property CARRYINREG (integer 1) (owner "Xilinx")) + (property CARRYINSELREG (integer 1) (owner "Xilinx")) + (property CREG (integer 1) (owner "Xilinx")) + (property DREG (integer 1) (owner "Xilinx")) + (property INMODEREG (integer 1) (owner "Xilinx")) + (property MASK (string "FFFFFFFFFFFE") (owner "Xilinx")) + (property MREG (integer 1) (owner "Xilinx")) + (property OPMODEREG (integer 0) (owner "Xilinx")) + (property PATTERN (string "000000000000") (owner "Xilinx")) + (property PREG (integer 1) (owner "Xilinx")) + (property SEL_MASK (string "MASK") (owner "Xilinx")) + (property SEL_PATTERN (string "PATTERN") (owner "Xilinx")) + (property USE_DPORT (string "TRUE") (owner "Xilinx")) + (property USE_MULT (string "MULTIPLY") (owner "Xilinx")) + (property USE_PATTERN_DETECT (string "NO_PATDET") (owner "Xilinx")) + (property USE_SIMD (string "ONE48") (owner "Xilinx")) + ) + (instance blk000000f9 + (viewRef view_1 (cellRef DSP48E1 (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property BUS_INFO (string "3:INPUT:CARRYINSEL<2:0>") (owner "Xilinx")) + (property BUS_INFO (string "4:OUTPUT:CARRYOUT<3:0>") (owner "Xilinx")) + (property BUS_INFO (string "4:INPUT:ALUMODE<3:0>") (owner "Xilinx")) + (property BUS_INFO (string "7:INPUT:OPMODE<6:0>") (owner "Xilinx")) + (property BUS_INFO (string "5:INPUT:INMODE<4:0>") (owner "Xilinx")) + (property BUS_INFO (string "30:OUTPUT:ACOUT<29:0>") (owner "Xilinx")) + (property BUS_INFO (string "18:OUTPUT:BCOUT<17:0>") (owner "Xilinx")) + (property BUS_INFO (string "48:OUTPUT:PCOUT<47:0>") (owner "Xilinx")) + (property BUS_INFO (string "48:INPUT:PCIN<47:0>") (owner "Xilinx")) + (property BUS_INFO (string "18:INPUT:BCIN<17:0>") (owner "Xilinx")) + (property BUS_INFO (string "30:INPUT:ACIN<29:0>") (owner "Xilinx")) + (property BUS_INFO (string "48:INPUT:C<47:0>") (owner "Xilinx")) + (property BUS_INFO (string "18:INPUT:B<17:0>") (owner "Xilinx")) + (property BUS_INFO (string "25:INPUT:D<24:0>") (owner "Xilinx")) + (property BUS_INFO (string "48:OUTPUT:P<47:0>") (owner "Xilinx")) + (property BUS_INFO (string "30:INPUT:A<29:0>") (owner "Xilinx")) + (property OPTIMIZE_PRIMITIVES_NGC (string "no") (owner "Xilinx")) + (property ACASCREG (integer 1) (owner "Xilinx")) + (property ADREG (integer 1) (owner "Xilinx")) + (property ALUMODEREG (integer 0) (owner "Xilinx")) + (property AREG (integer 1) (owner "Xilinx")) + (property AUTORESET_PATDET (string "NO_RESET") (owner "Xilinx")) + (property A_INPUT (string "DIRECT") (owner "Xilinx")) + (property BCASCREG (integer 1) (owner "Xilinx")) + (property BREG (integer 1) (owner "Xilinx")) + (property B_INPUT (string "DIRECT") (owner "Xilinx")) + (property CARRYINREG (integer 1) (owner "Xilinx")) + (property CARRYINSELREG (integer 1) (owner "Xilinx")) + (property CREG (integer 1) (owner "Xilinx")) + (property DREG (integer 1) (owner "Xilinx")) + (property INMODEREG (integer 1) (owner "Xilinx")) + (property MASK (string "FFFFFFFFFFFE") (owner "Xilinx")) + (property MREG (integer 1) (owner "Xilinx")) + (property OPMODEREG (integer 0) (owner "Xilinx")) + (property PATTERN (string "000000000000") (owner "Xilinx")) + (property PREG (integer 1) (owner "Xilinx")) + (property SEL_MASK (string "MASK") (owner "Xilinx")) + (property SEL_PATTERN (string "PATTERN") (owner "Xilinx")) + (property USE_DPORT (string "TRUE") (owner "Xilinx")) + (property USE_MULT (string "MULTIPLY") (owner "Xilinx")) + (property USE_PATTERN_DETECT (string "NO_PATDET") (owner "Xilinx")) + (property USE_SIMD (string "ONE48") (owner "Xilinx")) + ) + (instance blk000000fa + (viewRef view_1 (cellRef DSP48E1 (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property BUS_INFO (string "3:INPUT:CARRYINSEL<2:0>") (owner "Xilinx")) + (property BUS_INFO (string "4:OUTPUT:CARRYOUT<3:0>") (owner "Xilinx")) + (property BUS_INFO (string "4:INPUT:ALUMODE<3:0>") (owner "Xilinx")) + (property BUS_INFO (string "7:INPUT:OPMODE<6:0>") (owner "Xilinx")) + (property BUS_INFO (string "5:INPUT:INMODE<4:0>") (owner "Xilinx")) + (property BUS_INFO (string "30:OUTPUT:ACOUT<29:0>") (owner "Xilinx")) + (property BUS_INFO (string "18:OUTPUT:BCOUT<17:0>") (owner "Xilinx")) + (property BUS_INFO (string "48:OUTPUT:PCOUT<47:0>") (owner "Xilinx")) + (property BUS_INFO (string "48:INPUT:PCIN<47:0>") (owner "Xilinx")) + (property BUS_INFO (string "18:INPUT:BCIN<17:0>") (owner "Xilinx")) + (property BUS_INFO (string "30:INPUT:ACIN<29:0>") (owner "Xilinx")) + (property BUS_INFO (string "48:INPUT:C<47:0>") (owner "Xilinx")) + (property BUS_INFO (string "18:INPUT:B<17:0>") (owner "Xilinx")) + (property BUS_INFO (string "25:INPUT:D<24:0>") (owner "Xilinx")) + (property BUS_INFO (string "48:OUTPUT:P<47:0>") (owner "Xilinx")) + (property BUS_INFO (string "30:INPUT:A<29:0>") (owner "Xilinx")) + (property OPTIMIZE_PRIMITIVES_NGC (string "no") (owner "Xilinx")) + (property ACASCREG (integer 1) (owner "Xilinx")) + (property ADREG (integer 1) (owner "Xilinx")) + (property ALUMODEREG (integer 0) (owner "Xilinx")) + (property AREG (integer 1) (owner "Xilinx")) + (property AUTORESET_PATDET (string "NO_RESET") (owner "Xilinx")) + (property A_INPUT (string "DIRECT") (owner "Xilinx")) + (property BCASCREG (integer 1) (owner "Xilinx")) + (property BREG (integer 1) (owner "Xilinx")) + (property B_INPUT (string "DIRECT") (owner "Xilinx")) + (property CARRYINREG (integer 1) (owner "Xilinx")) + (property CARRYINSELREG (integer 1) (owner "Xilinx")) + (property CREG (integer 1) (owner "Xilinx")) + (property DREG (integer 1) (owner "Xilinx")) + (property INMODEREG (integer 1) (owner "Xilinx")) + (property MASK (string "FFFFFFFFFFFE") (owner "Xilinx")) + (property MREG (integer 1) (owner "Xilinx")) + (property OPMODEREG (integer 0) (owner "Xilinx")) + (property PATTERN (string "000000000000") (owner "Xilinx")) + (property PREG (integer 1) (owner "Xilinx")) + (property SEL_MASK (string "MASK") (owner "Xilinx")) + (property SEL_PATTERN (string "PATTERN") (owner "Xilinx")) + (property USE_DPORT (string "TRUE") (owner "Xilinx")) + (property USE_MULT (string "MULTIPLY") (owner "Xilinx")) + (property USE_PATTERN_DETECT (string "NO_PATDET") (owner "Xilinx")) + (property USE_SIMD (string "ONE48") (owner "Xilinx")) + ) + (instance blk000000fb + (viewRef view_1 (cellRef DSP48E1 (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property BUS_INFO (string "3:INPUT:CARRYINSEL<2:0>") (owner "Xilinx")) + (property BUS_INFO (string "4:OUTPUT:CARRYOUT<3:0>") (owner "Xilinx")) + (property BUS_INFO (string "4:INPUT:ALUMODE<3:0>") (owner "Xilinx")) + (property BUS_INFO (string "7:INPUT:OPMODE<6:0>") (owner "Xilinx")) + (property BUS_INFO (string "5:INPUT:INMODE<4:0>") (owner "Xilinx")) + (property BUS_INFO (string "30:OUTPUT:ACOUT<29:0>") (owner "Xilinx")) + (property BUS_INFO (string "18:OUTPUT:BCOUT<17:0>") (owner "Xilinx")) + (property BUS_INFO (string "48:OUTPUT:PCOUT<47:0>") (owner "Xilinx")) + (property BUS_INFO (string "48:INPUT:PCIN<47:0>") (owner "Xilinx")) + (property BUS_INFO (string "18:INPUT:BCIN<17:0>") (owner "Xilinx")) + (property BUS_INFO (string "30:INPUT:ACIN<29:0>") (owner "Xilinx")) + (property BUS_INFO (string "48:INPUT:C<47:0>") (owner "Xilinx")) + (property BUS_INFO (string "18:INPUT:B<17:0>") (owner "Xilinx")) + (property BUS_INFO (string "25:INPUT:D<24:0>") (owner "Xilinx")) + (property BUS_INFO (string "48:OUTPUT:P<47:0>") (owner "Xilinx")) + (property BUS_INFO (string "30:INPUT:A<29:0>") (owner "Xilinx")) + (property OPTIMIZE_PRIMITIVES_NGC (string "no") (owner "Xilinx")) + (property ACASCREG (integer 1) (owner "Xilinx")) + (property ADREG (integer 1) (owner "Xilinx")) + (property ALUMODEREG (integer 0) (owner "Xilinx")) + (property AREG (integer 1) (owner "Xilinx")) + (property AUTORESET_PATDET (string "NO_RESET") (owner "Xilinx")) + (property A_INPUT (string "DIRECT") (owner "Xilinx")) + (property BCASCREG (integer 1) (owner "Xilinx")) + (property BREG (integer 1) (owner "Xilinx")) + (property B_INPUT (string "DIRECT") (owner "Xilinx")) + (property CARRYINREG (integer 1) (owner "Xilinx")) + (property CARRYINSELREG (integer 1) (owner "Xilinx")) + (property CREG (integer 1) (owner "Xilinx")) + (property DREG (integer 1) (owner "Xilinx")) + (property INMODEREG (integer 1) (owner "Xilinx")) + (property MASK (string "FFFFFFFFFFFE") (owner "Xilinx")) + (property MREG (integer 1) (owner "Xilinx")) + (property OPMODEREG (integer 0) (owner "Xilinx")) + (property PATTERN (string "000000000000") (owner "Xilinx")) + (property PREG (integer 1) (owner "Xilinx")) + (property SEL_MASK (string "MASK") (owner "Xilinx")) + (property SEL_PATTERN (string "PATTERN") (owner "Xilinx")) + (property USE_DPORT (string "TRUE") (owner "Xilinx")) + (property USE_MULT (string "MULTIPLY") (owner "Xilinx")) + (property USE_PATTERN_DETECT (string "NO_PATDET") (owner "Xilinx")) + (property USE_SIMD (string "ONE48") (owner "Xilinx")) + ) + (instance blk000000fc + (viewRef view_1 (cellRef DSP48E1 (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property BUS_INFO (string "3:INPUT:CARRYINSEL<2:0>") (owner "Xilinx")) + (property BUS_INFO (string "4:OUTPUT:CARRYOUT<3:0>") (owner "Xilinx")) + (property BUS_INFO (string "4:INPUT:ALUMODE<3:0>") (owner "Xilinx")) + (property BUS_INFO (string "7:INPUT:OPMODE<6:0>") (owner "Xilinx")) + (property BUS_INFO (string "5:INPUT:INMODE<4:0>") (owner "Xilinx")) + (property BUS_INFO (string "30:OUTPUT:ACOUT<29:0>") (owner "Xilinx")) + (property BUS_INFO (string "18:OUTPUT:BCOUT<17:0>") (owner "Xilinx")) + (property BUS_INFO (string "48:OUTPUT:PCOUT<47:0>") (owner "Xilinx")) + (property BUS_INFO (string "48:INPUT:PCIN<47:0>") (owner "Xilinx")) + (property BUS_INFO (string "18:INPUT:BCIN<17:0>") (owner "Xilinx")) + (property BUS_INFO (string "30:INPUT:ACIN<29:0>") (owner "Xilinx")) + (property BUS_INFO (string "48:INPUT:C<47:0>") (owner "Xilinx")) + (property BUS_INFO (string "18:INPUT:B<17:0>") (owner "Xilinx")) + (property BUS_INFO (string "25:INPUT:D<24:0>") (owner "Xilinx")) + (property BUS_INFO (string "48:OUTPUT:P<47:0>") (owner "Xilinx")) + (property BUS_INFO (string "30:INPUT:A<29:0>") (owner "Xilinx")) + (property OPTIMIZE_PRIMITIVES_NGC (string "no") (owner "Xilinx")) + (property ACASCREG (integer 1) (owner "Xilinx")) + (property ADREG (integer 1) (owner "Xilinx")) + (property ALUMODEREG (integer 0) (owner "Xilinx")) + (property AREG (integer 1) (owner "Xilinx")) + (property AUTORESET_PATDET (string "NO_RESET") (owner "Xilinx")) + (property A_INPUT (string "DIRECT") (owner "Xilinx")) + (property BCASCREG (integer 1) (owner "Xilinx")) + (property BREG (integer 1) (owner "Xilinx")) + (property B_INPUT (string "DIRECT") (owner "Xilinx")) + (property CARRYINREG (integer 1) (owner "Xilinx")) + (property CARRYINSELREG (integer 1) (owner "Xilinx")) + (property CREG (integer 1) (owner "Xilinx")) + (property DREG (integer 1) (owner "Xilinx")) + (property INMODEREG (integer 1) (owner "Xilinx")) + (property MASK (string "FFFFFFFFFFFE") (owner "Xilinx")) + (property MREG (integer 1) (owner "Xilinx")) + (property OPMODEREG (integer 0) (owner "Xilinx")) + (property PATTERN (string "000000000000") (owner "Xilinx")) + (property PREG (integer 1) (owner "Xilinx")) + (property SEL_MASK (string "MASK") (owner "Xilinx")) + (property SEL_PATTERN (string "PATTERN") (owner "Xilinx")) + (property USE_DPORT (string "TRUE") (owner "Xilinx")) + (property USE_MULT (string "MULTIPLY") (owner "Xilinx")) + (property USE_PATTERN_DETECT (string "NO_PATDET") (owner "Xilinx")) + (property USE_SIMD (string "ONE48") (owner "Xilinx")) + ) + (instance blk000000fd + (viewRef view_1 (cellRef FDRE (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property INIT (string "0") (owner "Xilinx")) + ) + (instance blk000000fe + (viewRef view_1 (cellRef FDRE (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property INIT (string "0") (owner "Xilinx")) + ) + (instance blk000000ff + (viewRef view_1 (cellRef FDRE (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property INIT (string "0") (owner "Xilinx")) + ) + (instance blk00000100 + (viewRef view_1 (cellRef FDRE (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property INIT (string "0") (owner "Xilinx")) + ) + (instance blk00000101 + (viewRef view_1 (cellRef FDRE (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property INIT (string "0") (owner "Xilinx")) + ) + (instance blk00000102 + (viewRef view_1 (cellRef FDRE (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property INIT (string "0") (owner "Xilinx")) + ) + (instance blk00000103 + (viewRef view_1 (cellRef FDRE (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property INIT (string "0") (owner "Xilinx")) + ) + (instance blk00000104 + (viewRef view_1 (cellRef FDRE (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property INIT (string "0") (owner "Xilinx")) + ) + (instance blk00000105 + (viewRef view_1 (cellRef FDRE (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property INIT (string "0") (owner "Xilinx")) + ) + (instance blk00000106 + (viewRef view_1 (cellRef FDRE (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property INIT (string "0") (owner "Xilinx")) + ) + (instance blk00000107 + (viewRef view_1 (cellRef FDRE (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property INIT (string "0") (owner "Xilinx")) + ) + (instance blk00000108 + (viewRef view_1 (cellRef FDRE (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property INIT (string "0") (owner "Xilinx")) + ) + (instance blk00000109 + (viewRef view_1 (cellRef FDRE (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property INIT (string "0") (owner "Xilinx")) + ) + (instance blk0000010a + (viewRef view_1 (cellRef FDRE (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property INIT (string "0") (owner "Xilinx")) + ) + (instance blk0000010b + (viewRef view_1 (cellRef FDRE (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property INIT (string "0") (owner "Xilinx")) + ) + (instance blk0000010c + (viewRef view_1 (cellRef FDRE (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property INIT (string "0") (owner "Xilinx")) + ) + (instance blk0000010d + (viewRef view_1 (cellRef FDRE (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property INIT (string "0") (owner "Xilinx")) + ) + (instance blk0000010e + (viewRef view_1 (cellRef FDRE (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property INIT (string "0") (owner "Xilinx")) + ) + (instance blk0000010f + (viewRef view_1 (cellRef FDRE (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property INIT (string "0") (owner "Xilinx")) + ) + (instance blk00000110 + (viewRef view_1 (cellRef FDRE (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property INIT (string "0") (owner "Xilinx")) + ) + (instance blk00000111 + (viewRef view_1 (cellRef FDRE (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property INIT (string "0") (owner "Xilinx")) + ) + (instance blk00000112 + (viewRef view_1 (cellRef FDRE (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property INIT (string "0") (owner "Xilinx")) + ) + (instance blk00000113 + (viewRef view_1 (cellRef FDRE (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property INIT (string "0") (owner "Xilinx")) + ) + (instance blk00000114 + (viewRef view_1 (cellRef FDRE (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property INIT (string "0") (owner "Xilinx")) + ) + (instance blk00000115 + (viewRef view_1 (cellRef FDRE (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property INIT (string "0") (owner "Xilinx")) + ) + (instance blk00000116 + (viewRef view_1 (cellRef FDRE (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property INIT (string "0") (owner "Xilinx")) + ) + (instance blk00000117 + (viewRef view_1 (cellRef sp_ram_blk00000117 (libraryRef hbdec2_lib))) + (property BUS_INFO (string "2:INPUT:ADDR<1:0>") (owner "Xilinx")) + (property BUS_INFO (string "24:INPUT:DATA_IN<23:0>") (owner "Xilinx")) + (property BUS_INFO (string "24:OUTPUT:DATA_OUT<23:0>") (owner "Xilinx")) + (property NLW_UNIQUE_ID (integer 0) (owner "Xilinx")) + (property NLW_MACRO_TAG (integer 3) (owner "Xilinx")) + (property NLW_MACRO_ALIAS (string "sp_ram_blk00000117") (owner "Xilinx")) + ) + (instance blk0000014a + (viewRef view_1 (cellRef sp_ram_NO1_blk0000014a (libraryRef hbdec2_lib))) + (property BUS_INFO (string "2:INPUT:ADDR<1:0>") (owner "Xilinx")) + (property BUS_INFO (string "24:INPUT:DATA_IN<23:0>") (owner "Xilinx")) + (property BUS_INFO (string "24:OUTPUT:DATA_OUT<23:0>") (owner "Xilinx")) + (property NLW_UNIQUE_ID (integer 1) (owner "Xilinx")) + (property NLW_MACRO_TAG (integer 4) (owner "Xilinx")) + (property NLW_MACRO_ALIAS (string "sp_ram_NO1_blk0000014a") (owner "Xilinx")) + ) + (instance blk0000017d + (viewRef view_1 (cellRef sp_ram_NO2_blk0000017d (libraryRef hbdec2_lib))) + (property BUS_INFO (string "2:INPUT:ADDR<1:0>") (owner "Xilinx")) + (property BUS_INFO (string "24:INPUT:DATA_IN<23:0>") (owner "Xilinx")) + (property BUS_INFO (string "24:OUTPUT:DATA_OUT<23:0>") (owner "Xilinx")) + (property NLW_UNIQUE_ID (integer 2) (owner "Xilinx")) + (property NLW_MACRO_TAG (integer 5) (owner "Xilinx")) + (property NLW_MACRO_ALIAS (string "sp_ram_NO2_blk0000017d") (owner "Xilinx")) + ) + (instance blk000001b0 + (viewRef view_1 (cellRef sp_ram_NO3_blk000001b0 (libraryRef hbdec2_lib))) + (property BUS_INFO (string "2:INPUT:ADDR<1:0>") (owner "Xilinx")) + (property BUS_INFO (string "24:INPUT:DATA_IN<23:0>") (owner "Xilinx")) + (property BUS_INFO (string "24:OUTPUT:DATA_OUT<23:0>") (owner "Xilinx")) + (property NLW_UNIQUE_ID (integer 3) (owner "Xilinx")) + (property NLW_MACRO_TAG (integer 6) (owner "Xilinx")) + (property NLW_MACRO_ALIAS (string "sp_ram_NO3_blk000001b0") (owner "Xilinx")) + ) + (instance blk000001e3 + (viewRef view_1 (cellRef sp_ram_NO4_blk000001e3 (libraryRef hbdec2_lib))) + (property BUS_INFO (string "2:INPUT:ADDR<1:0>") (owner "Xilinx")) + (property BUS_INFO (string "24:INPUT:DATA_IN<23:0>") (owner "Xilinx")) + (property BUS_INFO (string "24:OUTPUT:DATA_OUT<23:0>") (owner "Xilinx")) + (property NLW_UNIQUE_ID (integer 4) (owner "Xilinx")) + (property NLW_MACRO_TAG (integer 7) (owner "Xilinx")) + (property NLW_MACRO_ALIAS (string "sp_ram_NO4_blk000001e3") (owner "Xilinx")) + ) + (instance blk00000216 + (viewRef view_1 (cellRef sp_ram_NO5_blk00000216 (libraryRef hbdec2_lib))) + (property BUS_INFO (string "2:INPUT:ADDR<1:0>") (owner "Xilinx")) + (property BUS_INFO (string "24:INPUT:DATA_IN<23:0>") (owner "Xilinx")) + (property BUS_INFO (string "24:OUTPUT:DATA_OUT<23:0>") (owner "Xilinx")) + (property NLW_UNIQUE_ID (integer 5) (owner "Xilinx")) + (property NLW_MACRO_TAG (integer 8) (owner "Xilinx")) + (property NLW_MACRO_ALIAS (string "sp_ram_NO5_blk00000216") (owner "Xilinx")) + ) + (instance blk00000249 + (viewRef view_1 (cellRef sp_ram_NO6_blk00000249 (libraryRef hbdec2_lib))) + (property BUS_INFO (string "2:INPUT:ADDR<1:0>") (owner "Xilinx")) + (property BUS_INFO (string "24:INPUT:DATA_IN<23:0>") (owner "Xilinx")) + (property BUS_INFO (string "24:OUTPUT:DATA_OUT<23:0>") (owner "Xilinx")) + (property NLW_UNIQUE_ID (integer 6) (owner "Xilinx")) + (property NLW_MACRO_TAG (integer 9) (owner "Xilinx")) + (property NLW_MACRO_ALIAS (string "sp_ram_NO6_blk00000249") (owner "Xilinx")) + ) + (instance blk0000027c + (viewRef view_1 (cellRef sp_ram_NO7_blk0000027c (libraryRef hbdec2_lib))) + (property BUS_INFO (string "2:INPUT:ADDR<1:0>") (owner "Xilinx")) + (property BUS_INFO (string "24:INPUT:DATA_IN<23:0>") (owner "Xilinx")) + (property BUS_INFO (string "24:OUTPUT:DATA_OUT<23:0>") (owner "Xilinx")) + (property NLW_UNIQUE_ID (integer 7) (owner "Xilinx")) + (property NLW_MACRO_TAG (integer 10) (owner "Xilinx")) + (property NLW_MACRO_ALIAS (string "sp_ram_NO7_blk0000027c") (owner "Xilinx")) + ) + (instance blk000002af + (viewRef view_1 (cellRef sp_ram_NO8_blk000002af (libraryRef hbdec2_lib))) + (property BUS_INFO (string "2:INPUT:ADDR<1:0>") (owner "Xilinx")) + (property BUS_INFO (string "24:INPUT:DATA_IN<23:0>") (owner "Xilinx")) + (property BUS_INFO (string "24:OUTPUT:DATA_OUT<23:0>") (owner "Xilinx")) + (property NLW_UNIQUE_ID (integer 8) (owner "Xilinx")) + (property NLW_MACRO_TAG (integer 11) (owner "Xilinx")) + (property NLW_MACRO_ALIAS (string "sp_ram_NO8_blk000002af") (owner "Xilinx")) + ) + (instance blk000002e2 + (viewRef view_1 (cellRef sp_ram_NO9_blk000002e2 (libraryRef hbdec2_lib))) + (property BUS_INFO (string "2:INPUT:ADDR<1:0>") (owner "Xilinx")) + (property BUS_INFO (string "24:INPUT:DATA_IN<23:0>") (owner "Xilinx")) + (property BUS_INFO (string "24:OUTPUT:DATA_OUT<23:0>") (owner "Xilinx")) + (property NLW_UNIQUE_ID (integer 9) (owner "Xilinx")) + (property NLW_MACRO_TAG (integer 12) (owner "Xilinx")) + (property NLW_MACRO_ALIAS (string "sp_ram_NO9_blk000002e2") (owner "Xilinx")) + ) + (instance blk00000315 + (viewRef view_1 (cellRef sp_ram_NO10_blk00000315 (libraryRef hbdec2_lib))) + (property BUS_INFO (string "2:INPUT:ADDR<1:0>") (owner "Xilinx")) + (property BUS_INFO (string "24:INPUT:DATA_IN<23:0>") (owner "Xilinx")) + (property BUS_INFO (string "24:OUTPUT:DATA_OUT<23:0>") (owner "Xilinx")) + (property NLW_UNIQUE_ID (integer 10) (owner "Xilinx")) + (property NLW_MACRO_TAG (integer 13) (owner "Xilinx")) + (property NLW_MACRO_ALIAS (string "sp_ram_NO10_blk00000315") (owner "Xilinx")) + ) + (instance blk00000348 + (viewRef view_1 (cellRef sp_ram_NO11_blk00000348 (libraryRef hbdec2_lib))) + (property BUS_INFO (string "2:INPUT:ADDR<1:0>") (owner "Xilinx")) + (property BUS_INFO (string "24:INPUT:DATA_IN<23:0>") (owner "Xilinx")) + (property BUS_INFO (string "24:OUTPUT:DATA_OUT<23:0>") (owner "Xilinx")) + (property NLW_UNIQUE_ID (integer 11) (owner "Xilinx")) + (property NLW_MACRO_TAG (integer 14) (owner "Xilinx")) + (property NLW_MACRO_ALIAS (string "sp_ram_NO11_blk00000348") (owner "Xilinx")) + ) + (instance blk0000037b + (viewRef view_1 (cellRef dpr_ram_2_blk0000037b (libraryRef hbdec2_lib))) + (property BUS_INFO (string "3:INPUT:ADDRA<2:0>") (owner "Xilinx")) + (property BUS_INFO (string "18:INPUT:DA_IN<17:0>") (owner "Xilinx")) + (property BUS_INFO (string "3:INPUT:ADDRB<2:0>") (owner "Xilinx")) + (property BUS_INFO (string "18:OUTPUT:DA_OUT<17:0>") (owner "Xilinx")) + (property BUS_INFO (string "18:OUTPUT:DB_OUT<17:0>") (owner "Xilinx")) + (property NLW_UNIQUE_ID (integer 0) (owner "Xilinx")) + (property NLW_MACRO_TAG (integer 15) (owner "Xilinx")) + (property NLW_MACRO_ALIAS (string "dpr_ram_2_blk0000037b") (owner "Xilinx")) + ) + (instance blk000003b4 + (viewRef view_1 (cellRef dpr_ram_3_blk000003b4 (libraryRef hbdec2_lib))) + (property BUS_INFO (string "3:INPUT:ADDRA<2:0>") (owner "Xilinx")) + (property BUS_INFO (string "18:INPUT:DA_IN<17:0>") (owner "Xilinx")) + (property BUS_INFO (string "3:INPUT:ADDRB<2:0>") (owner "Xilinx")) + (property BUS_INFO (string "18:OUTPUT:DA_OUT<17:0>") (owner "Xilinx")) + (property BUS_INFO (string "18:OUTPUT:DB_OUT<17:0>") (owner "Xilinx")) + (property NLW_UNIQUE_ID (integer 0) (owner "Xilinx")) + (property NLW_MACRO_TAG (integer 16) (owner "Xilinx")) + (property NLW_MACRO_ALIAS (string "dpr_ram_3_blk000003b4") (owner "Xilinx")) + ) + (instance blk000003ed + (viewRef view_1 (cellRef FDRE (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property INIT (string "0") (owner "Xilinx")) + ) + (instance blk000003ee + (viewRef view_1 (cellRef FDRE (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property INIT (string "0") (owner "Xilinx")) + ) + (instance blk000003ef + (viewRef view_1 (cellRef FDRE (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property INIT (string "0") (owner "Xilinx")) + ) + (instance blk000003f0 + (viewRef view_1 (cellRef FDRE (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property INIT (string "0") (owner "Xilinx")) + ) + (instance blk000003f1 + (viewRef view_1 (cellRef FDRE (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property INIT (string "0") (owner "Xilinx")) + ) + (instance blk000003f2 + (viewRef view_1 (cellRef FDRE (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property INIT (string "0") (owner "Xilinx")) + ) + (instance blk000003f3 + (viewRef view_1 (cellRef FDRE (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property INIT (string "0") (owner "Xilinx")) + ) + (instance blk000003f4 + (viewRef view_1 (cellRef FDRE (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property INIT (string "0") (owner "Xilinx")) + ) + (instance blk000003f5 + (viewRef view_1 (cellRef FDRE (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property INIT (string "0") (owner "Xilinx")) + ) + (instance blk000003f6 + (viewRef view_1 (cellRef FDRE (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property INIT (string "0") (owner "Xilinx")) + ) + (instance blk000003f7 + (viewRef view_1 (cellRef FDRE (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property INIT (string "0") (owner "Xilinx")) + ) + (instance blk000003f8 + (viewRef view_1 (cellRef FDRE (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property INIT (string "0") (owner "Xilinx")) + ) + (instance blk000003f9 + (viewRef view_1 (cellRef FDRE (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property INIT (string "0") (owner "Xilinx")) + ) + (instance blk000003fa + (viewRef view_1 (cellRef FDRE (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property INIT (string "0") (owner "Xilinx")) + ) + (instance blk000003fb + (viewRef view_1 (cellRef FDRE (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property INIT (string "0") (owner "Xilinx")) + ) + (instance blk000003fc + (viewRef view_1 (cellRef FDRE (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property INIT (string "0") (owner "Xilinx")) + ) + (instance blk000003fd + (viewRef view_1 (cellRef FDRE (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property INIT (string "0") (owner "Xilinx")) + ) + (instance blk000003fe + (viewRef view_1 (cellRef FDRE (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property INIT (string "0") (owner "Xilinx")) + ) + (instance blk000003ff + (viewRef view_1 (cellRef FDRE (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property INIT (string "0") (owner "Xilinx")) + ) + (instance blk00000400 + (viewRef view_1 (cellRef FDRE (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property INIT (string "0") (owner "Xilinx")) + ) + (instance blk00000401 + (viewRef view_1 (cellRef FDRE (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property INIT (string "0") (owner "Xilinx")) + ) + (instance blk00000402 + (viewRef view_1 (cellRef FDRE (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property INIT (string "0") (owner "Xilinx")) + ) + (instance blk00000403 + (viewRef view_1 (cellRef FDRE (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property INIT (string "0") (owner "Xilinx")) + ) + (instance blk00000404 + (viewRef view_1 (cellRef FDRE (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property INIT (string "0") (owner "Xilinx")) + ) + (instance blk00000405 + (viewRef view_1 (cellRef FDRE (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property INIT (string "0") (owner "Xilinx")) + ) + (instance blk00000406 + (viewRef view_1 (cellRef FDRE (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property INIT (string "0") (owner "Xilinx")) + ) + (instance blk00000407 + (viewRef view_1 (cellRef FDRE (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property INIT (string "0") (owner "Xilinx")) + ) + (instance blk00000408 + (viewRef view_1 (cellRef FDRE (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property INIT (string "0") (owner "Xilinx")) + ) + (instance blk00000409 + (viewRef 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(true)) (owner "Xilinx")) + (property INIT (string "0") (owner "Xilinx")) + ) + (instance blk0000040f + (viewRef view_1 (cellRef FDRE (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property INIT (string "0") (owner "Xilinx")) + ) + (instance blk00000410 + (viewRef view_1 (cellRef FDRE (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property INIT (string "0") (owner "Xilinx")) + ) + (instance blk00000411 + (viewRef view_1 (cellRef FDRE (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property INIT (string "0") (owner "Xilinx")) + ) + (instance blk00000412 + (viewRef view_1 (cellRef FDRE (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property INIT (string "0") (owner "Xilinx")) + ) + (instance blk00000413 + (viewRef view_1 (cellRef FDRE (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property INIT (string "0") (owner "Xilinx")) + ) + (instance blk00000414 + (viewRef view_1 (cellRef FDRE (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property INIT (string "0") (owner "Xilinx")) + ) + (instance blk00000415 + (viewRef view_1 (cellRef FDRE (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property INIT (string "0") (owner "Xilinx")) + ) + (instance blk00000416 + (viewRef view_1 (cellRef FDRE (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property INIT (string "0") (owner "Xilinx")) + ) + (instance blk00000417 + (viewRef view_1 (cellRef FDRE (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property INIT (string "0") (owner "Xilinx")) + ) + (instance blk00000418 + (viewRef view_1 (cellRef FDRE (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property INIT (string "0") (owner "Xilinx")) + ) + (instance blk00000419 + (viewRef view_1 (cellRef FDRE (libraryRef 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(property INIT (string "0") (owner "Xilinx")) + ) + (instance blk0000041f + (viewRef view_1 (cellRef FDRE (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property INIT (string "0") (owner "Xilinx")) + ) + (instance blk00000420 + (viewRef view_1 (cellRef FDRE (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property INIT (string "0") (owner "Xilinx")) + ) + (instance blk00000421 + (viewRef view_1 (cellRef FDRE (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property INIT (string "0") (owner "Xilinx")) + ) + (instance blk00000422 + (viewRef view_1 (cellRef FDRE (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property INIT (string "0") (owner "Xilinx")) + ) + (instance blk00000423 + (viewRef view_1 (cellRef FDRE (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property INIT (string "0") (owner "Xilinx")) + ) + (instance blk00000424 + (viewRef view_1 (cellRef FDRE (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property INIT (string "0") (owner "Xilinx")) + ) + (instance blk00000425 + (viewRef view_1 (cellRef FDRE (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property INIT (string "0") (owner "Xilinx")) + ) + (instance blk00000426 + (viewRef view_1 (cellRef FDRE (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property INIT (string "0") (owner "Xilinx")) + ) + (instance blk00000427 + (viewRef view_1 (cellRef FDRE (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property INIT (string "0") (owner "Xilinx")) + ) + (instance blk00000428 + (viewRef view_1 (cellRef FDRE (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property INIT (string "0") (owner "Xilinx")) + ) + (instance blk00000429 + (viewRef view_1 (cellRef FDRE (libraryRef UNISIMS))) + (property XSTLIB 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(string "0") (owner "Xilinx")) + ) + (instance blk00000483 + (viewRef view_1 (cellRef FDRE (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property INIT (string "0") (owner "Xilinx")) + ) + (instance blk00000484 + (viewRef view_1 (cellRef FDRE (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property INIT (string "0") (owner "Xilinx")) + ) + (instance blk00000485 + (viewRef view_1 (cellRef FDRE (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property INIT (string "0") (owner "Xilinx")) + ) + (instance blk00000486 + (viewRef view_1 (cellRef FDRE (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property INIT (string "0") (owner "Xilinx")) + ) + (instance blk00000487 + (viewRef view_1 (cellRef FDRE (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property INIT (string "0") (owner "Xilinx")) + ) + (instance blk00000488 + (viewRef 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(true)) (owner "Xilinx")) + (property INIT (string "0") (owner "Xilinx")) + ) + (instance blk0000048e + (viewRef view_1 (cellRef FDRE (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property INIT (string "0") (owner "Xilinx")) + ) + (instance blk0000048f + (viewRef view_1 (cellRef FDRE (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property INIT (string "0") (owner "Xilinx")) + ) + (instance blk00000490 + (viewRef view_1 (cellRef FDRE (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property INIT (string "0") (owner "Xilinx")) + ) + (instance blk00000491 + (viewRef view_1 (cellRef FDRE (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property INIT (string "0") (owner "Xilinx")) + ) + (instance blk00000492 + (viewRef view_1 (cellRef FDRE (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property INIT (string "0") (owner "Xilinx")) + ) + (instance blk00000493 + (viewRef view_1 (cellRef FDRE (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property INIT (string "0") (owner "Xilinx")) + ) + (instance blk00000494 + (viewRef view_1 (cellRef FDRE (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property INIT (string "0") (owner "Xilinx")) + ) + (instance blk00000495 + (viewRef view_1 (cellRef FDRE (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property INIT (string "0") (owner "Xilinx")) + ) + (instance blk00000496 + (viewRef view_1 (cellRef FDRE (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property INIT (string "0") (owner "Xilinx")) + ) + (instance blk00000497 + (viewRef view_1 (cellRef FDRE (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property INIT (string "0") (owner "Xilinx")) + ) + (instance blk00000498 + (viewRef view_1 (cellRef FDRE (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property INIT (string "0") (owner "Xilinx")) + ) + (instance blk00000499 + (viewRef view_1 (cellRef FDRE (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property INIT (string "0") (owner "Xilinx")) + ) + (instance blk0000049a + (viewRef view_1 (cellRef FDRE (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property INIT (string "0") (owner "Xilinx")) + ) + (instance blk0000049b + (viewRef view_1 (cellRef FDRE (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property INIT (string "0") (owner "Xilinx")) + ) + (instance blk0000049c + (viewRef view_1 (cellRef FDRE (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property INIT (string "0") (owner "Xilinx")) + ) + (instance blk0000049d + (viewRef view_1 (cellRef FDRE (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property INIT (string "0") (owner "Xilinx")) + ) + (instance blk0000049e + (viewRef view_1 (cellRef FDRE (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property INIT (string "0") (owner "Xilinx")) + ) + (instance blk0000049f + (viewRef view_1 (cellRef FDRE (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property INIT (string "0") (owner "Xilinx")) + ) + (instance blk000004a0 + (viewRef view_1 (cellRef FDRE (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property INIT (string "0") (owner "Xilinx")) + ) + (instance blk000004a1 + (viewRef view_1 (cellRef FDRE (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property INIT (string "0") (owner "Xilinx")) + ) + (instance blk000004a2 + (viewRef view_1 (cellRef FDRE (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property INIT (string "0") (owner "Xilinx")) + ) + (instance blk000004a3 + (viewRef view_1 (cellRef FDRE (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property INIT (string "0") (owner "Xilinx")) + ) + (instance blk000004a4 + (viewRef view_1 (cellRef dpr_ram_5_blk000004a4 (libraryRef hbdec2_lib))) + (property BUS_INFO (string "1:INPUT:ADDRA<0:0>") (owner "Xilinx")) + (property BUS_INFO (string "18:INPUT:DA_IN<17:0>") (owner "Xilinx")) + (property BUS_INFO (string "1:INPUT:ADDRB<0:0>") (owner "Xilinx")) + (property BUS_INFO (string "18:OUTPUT:DA_OUT<17:0>") (owner "Xilinx")) + (property BUS_INFO (string "18:OUTPUT:DB_OUT<17:0>") (owner "Xilinx")) + (property NLW_UNIQUE_ID (integer 0) (owner "Xilinx")) + (property NLW_MACRO_TAG (integer 18) (owner "Xilinx")) + (property NLW_MACRO_ALIAS (string "dpr_ram_5_blk000004a4") (owner "Xilinx")) + ) + (instance blk000004cb + (viewRef view_1 (cellRef XORCY (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property OPTIMIZE_PRIMITIVES_NGC (string "no") (owner "Xilinx")) + ) + (instance blk000004cc + (viewRef view_1 (cellRef XORCY (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property OPTIMIZE_PRIMITIVES_NGC (string "no") (owner "Xilinx")) + ) + (instance blk000004cd + (viewRef view_1 (cellRef XORCY (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property OPTIMIZE_PRIMITIVES_NGC (string "no") (owner "Xilinx")) + ) + (instance blk000004ce + (viewRef view_1 (cellRef XORCY (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property OPTIMIZE_PRIMITIVES_NGC (string "no") (owner "Xilinx")) + ) + (instance blk000004cf + (viewRef view_1 (cellRef XORCY (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property OPTIMIZE_PRIMITIVES_NGC (string "no") (owner "Xilinx")) + ) + (instance blk000004d0 + (viewRef view_1 (cellRef MUXCY_D (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property OPTIMIZE_PRIMITIVES_NGC (string "no") (owner "Xilinx")) + ) + (instance blk000004d1 + (viewRef view_1 (cellRef MUXCY_L (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property OPTIMIZE_PRIMITIVES_NGC (string "no") (owner "Xilinx")) + ) + (instance blk000004d2 + (viewRef view_1 (cellRef MUXCY_L (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property OPTIMIZE_PRIMITIVES_NGC (string "no") (owner "Xilinx")) + ) + (instance blk000004d3 + (viewRef view_1 (cellRef MUXCY_L (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property OPTIMIZE_PRIMITIVES_NGC (string "no") (owner "Xilinx")) + ) + (instance blk000004d4 + (viewRef view_1 (cellRef MUXCY_L (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property OPTIMIZE_PRIMITIVES_NGC (string "no") (owner "Xilinx")) + ) + (instance blk000004d5 + (viewRef view_1 (cellRef FDE (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property INIT (string "0") (owner "Xilinx")) + ) + (instance blk000004d6 + (viewRef view_1 (cellRef FDRE (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property OPTIMIZE_PRIMITIVES_NGC (string "no") (owner "Xilinx")) + (property INIT (string "0") (owner "Xilinx")) + ) + (instance blk000004d7 + (viewRef view_1 (cellRef FDRE (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property OPTIMIZE_PRIMITIVES_NGC (string "no") (owner "Xilinx")) + (property INIT (string "0") (owner "Xilinx")) + ) + (instance blk000004d8 + (viewRef view_1 (cellRef FDRE (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property OPTIMIZE_PRIMITIVES_NGC (string "no") (owner "Xilinx")) + (property INIT (string "0") (owner "Xilinx")) + ) + (instance blk000004d9 + (viewRef view_1 (cellRef FDRE (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property OPTIMIZE_PRIMITIVES_NGC (string "no") (owner "Xilinx")) + (property INIT (string "0") (owner "Xilinx")) + ) + (instance blk000004da + (viewRef view_1 (cellRef FDRE (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property OPTIMIZE_PRIMITIVES_NGC (string "no") (owner "Xilinx")) + (property INIT (string "0") (owner "Xilinx")) + ) + (instance blk000004db + (viewRef view_1 (cellRef FDRE (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property OPTIMIZE_PRIMITIVES_NGC (string "no") (owner "Xilinx")) + (property INIT (string "0") (owner "Xilinx")) + ) + (instance blk000004dc + (viewRef view_1 (cellRef FDRE (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property OPTIMIZE_PRIMITIVES_NGC (string "no") (owner "Xilinx")) + (property INIT (string "0") (owner "Xilinx")) + ) + (instance blk000004dd + (viewRef view_1 (cellRef FDRE (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property OPTIMIZE_PRIMITIVES_NGC (string "no") (owner "Xilinx")) + (property INIT (string "0") (owner "Xilinx")) + ) + (instance blk000004de + (viewRef view_1 (cellRef FDRE (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property OPTIMIZE_PRIMITIVES_NGC (string "no") (owner "Xilinx")) + (property INIT (string "0") (owner "Xilinx")) + ) + (instance blk000004df + (viewRef view_1 (cellRef FDRE (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property OPTIMIZE_PRIMITIVES_NGC (string "no") (owner "Xilinx")) + (property INIT (string "0") (owner "Xilinx")) + ) + (instance blk000004e0 + (viewRef view_1 (cellRef FDRE (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property OPTIMIZE_PRIMITIVES_NGC (string "no") (owner "Xilinx")) + (property INIT (string "0") (owner "Xilinx")) + ) + (instance blk000004e1 + (viewRef view_1 (cellRef FDRE (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property OPTIMIZE_PRIMITIVES_NGC (string "no") (owner "Xilinx")) + (property INIT (string "0") (owner "Xilinx")) + ) + (instance blk000004e2 + (viewRef view_1 (cellRef FDRE (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property OPTIMIZE_PRIMITIVES_NGC (string "no") (owner "Xilinx")) + (property INIT (string "0") (owner "Xilinx")) + ) + (instance blk000004e3 + (viewRef view_1 (cellRef FDRE (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property OPTIMIZE_PRIMITIVES_NGC (string "no") (owner "Xilinx")) + (property INIT (string "0") (owner "Xilinx")) + ) + (instance blk000004e4 + (viewRef view_1 (cellRef FDRE (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property OPTIMIZE_PRIMITIVES_NGC (string "no") (owner "Xilinx")) + (property INIT (string "0") (owner "Xilinx")) + ) + (instance blk000004e5 + (viewRef view_1 (cellRef FDRE (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property OPTIMIZE_PRIMITIVES_NGC (string "no") (owner "Xilinx")) + (property INIT (string "0") (owner "Xilinx")) + ) + (instance blk000004e6 + (viewRef view_1 (cellRef FDRE (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property OPTIMIZE_PRIMITIVES_NGC (string "no") (owner "Xilinx")) + (property INIT (string "0") (owner "Xilinx")) + ) + (instance blk000004e7 + (viewRef view_1 (cellRef FDRE (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property OPTIMIZE_PRIMITIVES_NGC (string "no") (owner "Xilinx")) + (property INIT (string "0") (owner "Xilinx")) + ) + (instance blk000004e8 + (viewRef view_1 (cellRef FDRE (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property OPTIMIZE_PRIMITIVES_NGC (string "no") (owner "Xilinx")) + (property INIT (string "0") (owner "Xilinx")) + ) + (instance blk000004e9 + (viewRef view_1 (cellRef FDRE (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property OPTIMIZE_PRIMITIVES_NGC (string "no") (owner "Xilinx")) + (property INIT (string "0") (owner "Xilinx")) + ) + (instance blk000004ea + (viewRef view_1 (cellRef FDRE (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property OPTIMIZE_PRIMITIVES_NGC (string "no") (owner "Xilinx")) + (property INIT (string "0") (owner "Xilinx")) + ) + (instance blk000004eb + (viewRef view_1 (cellRef FDRE (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property OPTIMIZE_PRIMITIVES_NGC (string "no") (owner "Xilinx")) + (property INIT (string "0") (owner "Xilinx")) + ) + (instance blk000004ec + (viewRef view_1 (cellRef FDRE (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property OPTIMIZE_PRIMITIVES_NGC (string "no") (owner "Xilinx")) + (property INIT (string "0") (owner "Xilinx")) + ) + (instance blk000004ed + (viewRef view_1 (cellRef FDRE (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property OPTIMIZE_PRIMITIVES_NGC (string "no") (owner "Xilinx")) + (property INIT (string "0") (owner "Xilinx")) + ) + (instance blk000004ee + (viewRef view_1 (cellRef FDRE (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property OPTIMIZE_PRIMITIVES_NGC (string "no") (owner "Xilinx")) + (property INIT (string "0") (owner "Xilinx")) + ) + (instance blk000004ef + (viewRef view_1 (cellRef FDRE (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property OPTIMIZE_PRIMITIVES_NGC (string "no") (owner "Xilinx")) + (property INIT (string "0") (owner "Xilinx")) + ) + (instance blk000004f0 + (viewRef view_1 (cellRef FDRE (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property OPTIMIZE_PRIMITIVES_NGC (string "no") (owner "Xilinx")) + (property INIT (string "0") (owner "Xilinx")) + ) + (instance blk000004f1 + (viewRef view_1 (cellRef FDRE (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property OPTIMIZE_PRIMITIVES_NGC (string "no") (owner "Xilinx")) + (property INIT (string "0") (owner "Xilinx")) + ) + (instance blk000004f2 + (viewRef view_1 (cellRef FDRE (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property OPTIMIZE_PRIMITIVES_NGC (string "no") (owner "Xilinx")) + (property INIT (string "0") (owner "Xilinx")) + ) + (instance blk000004f3 + (viewRef view_1 (cellRef FDRE (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property OPTIMIZE_PRIMITIVES_NGC (string "no") (owner "Xilinx")) + (property INIT (string "0") (owner "Xilinx")) + ) + (instance blk000004f4 + (viewRef view_1 (cellRef FDRE (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property OPTIMIZE_PRIMITIVES_NGC (string "no") (owner "Xilinx")) + (property INIT (string "0") (owner "Xilinx")) + ) + (instance blk000004f5 + (viewRef view_1 (cellRef FDRE (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property OPTIMIZE_PRIMITIVES_NGC (string "no") (owner "Xilinx")) + (property INIT (string "0") (owner "Xilinx")) + ) + (instance blk000004f6 + (viewRef view_1 (cellRef FDRE (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property OPTIMIZE_PRIMITIVES_NGC (string "no") (owner "Xilinx")) + (property INIT (string "0") (owner "Xilinx")) + ) + (instance blk000004f7 + (viewRef view_1 (cellRef FDRE (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property OPTIMIZE_PRIMITIVES_NGC (string "no") (owner "Xilinx")) + (property INIT (string "0") (owner "Xilinx")) + ) + (instance blk000004f8 + (viewRef view_1 (cellRef FDRE (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property OPTIMIZE_PRIMITIVES_NGC (string "no") (owner "Xilinx")) + (property INIT (string "0") (owner "Xilinx")) + ) + (instance blk000004f9 + (viewRef view_1 (cellRef FDRE (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property OPTIMIZE_PRIMITIVES_NGC (string "no") (owner "Xilinx")) + (property INIT (string "0") (owner "Xilinx")) + ) + (instance blk000004fa + (viewRef view_1 (cellRef FDRE (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property OPTIMIZE_PRIMITIVES_NGC (string "no") (owner "Xilinx")) + (property INIT (string "0") (owner "Xilinx")) + ) + (instance blk000004fb + (viewRef view_1 (cellRef FDRE (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property OPTIMIZE_PRIMITIVES_NGC (string "no") (owner "Xilinx")) + (property INIT (string "0") (owner "Xilinx")) + ) + (instance blk000004fc + (viewRef view_1 (cellRef FDRE (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property OPTIMIZE_PRIMITIVES_NGC (string "no") (owner "Xilinx")) + (property INIT (string "0") (owner "Xilinx")) + ) + (instance blk000004fd + (viewRef view_1 (cellRef FDRE (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property OPTIMIZE_PRIMITIVES_NGC (string "no") (owner "Xilinx")) + (property INIT (string "0") (owner "Xilinx")) + ) + (instance blk000004fe + (viewRef view_1 (cellRef FDRE (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property OPTIMIZE_PRIMITIVES_NGC (string "no") (owner "Xilinx")) + (property INIT (string "0") (owner "Xilinx")) + ) + (instance blk000004ff + (viewRef view_1 (cellRef FDRE (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property OPTIMIZE_PRIMITIVES_NGC (string "no") (owner "Xilinx")) + (property INIT (string "0") (owner "Xilinx")) + ) + (instance blk00000500 + (viewRef view_1 (cellRef FDRE (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property OPTIMIZE_PRIMITIVES_NGC (string "no") (owner "Xilinx")) + (property INIT (string "0") (owner "Xilinx")) + ) + (instance blk00000501 + (viewRef view_1 (cellRef FDRE (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property OPTIMIZE_PRIMITIVES_NGC (string "no") (owner "Xilinx")) + (property INIT (string "0") (owner "Xilinx")) + ) + (instance blk00000502 + (viewRef view_1 (cellRef FDRE (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property OPTIMIZE_PRIMITIVES_NGC (string "no") (owner "Xilinx")) + (property INIT (string "0") (owner "Xilinx")) + ) + (instance blk00000503 + (viewRef view_1 (cellRef FDRE (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property OPTIMIZE_PRIMITIVES_NGC (string "no") (owner "Xilinx")) + (property INIT (string "0") (owner "Xilinx")) + ) + (instance blk00000504 + (viewRef view_1 (cellRef FDRE (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property OPTIMIZE_PRIMITIVES_NGC (string "no") (owner "Xilinx")) + (property INIT (string "0") (owner "Xilinx")) + ) + (instance blk00000505 + (viewRef view_1 (cellRef FDRE (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property OPTIMIZE_PRIMITIVES_NGC (string "no") (owner "Xilinx")) + (property INIT (string "0") (owner "Xilinx")) + ) + (instance blk00000506 + (viewRef view_1 (cellRef FDRE (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property OPTIMIZE_PRIMITIVES_NGC (string "no") (owner "Xilinx")) + (property INIT (string "0") (owner "Xilinx")) + ) + (instance blk00000507 + (viewRef view_1 (cellRef FDRE (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property OPTIMIZE_PRIMITIVES_NGC (string "no") (owner "Xilinx")) + (property INIT (string "0") (owner "Xilinx")) + ) + (instance blk00000508 + (viewRef view_1 (cellRef FDRE (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property OPTIMIZE_PRIMITIVES_NGC (string "no") (owner "Xilinx")) + (property INIT (string "0") (owner "Xilinx")) + ) + (instance blk00000509 + (viewRef view_1 (cellRef FDRE (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property OPTIMIZE_PRIMITIVES_NGC (string "no") (owner "Xilinx")) + (property INIT (string "0") (owner "Xilinx")) + ) + (instance blk0000050a + (viewRef view_1 (cellRef FDRE (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property OPTIMIZE_PRIMITIVES_NGC (string "no") (owner "Xilinx")) + (property INIT (string "0") (owner "Xilinx")) + ) + (instance blk0000050b + (viewRef view_1 (cellRef FDRE (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property OPTIMIZE_PRIMITIVES_NGC (string "no") (owner "Xilinx")) + (property INIT (string "0") (owner "Xilinx")) + ) + (instance blk0000050c + (viewRef view_1 (cellRef FDRE (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property OPTIMIZE_PRIMITIVES_NGC (string "no") (owner "Xilinx")) + (property INIT (string "0") (owner "Xilinx")) + ) + (instance blk0000050d + (viewRef view_1 (cellRef FDRE (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property OPTIMIZE_PRIMITIVES_NGC (string "no") (owner "Xilinx")) + (property INIT (string "0") (owner "Xilinx")) + ) + (instance blk0000050e + (viewRef view_1 (cellRef FDRE (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property OPTIMIZE_PRIMITIVES_NGC (string "no") (owner "Xilinx")) + (property INIT (string "0") (owner "Xilinx")) + ) + (instance blk0000050f + (viewRef view_1 (cellRef FDRE (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property OPTIMIZE_PRIMITIVES_NGC (string "no") (owner "Xilinx")) + (property INIT (string "0") (owner "Xilinx")) + ) + (instance blk00000510 + (viewRef view_1 (cellRef FDRE (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property OPTIMIZE_PRIMITIVES_NGC (string "no") (owner "Xilinx")) + (property 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+ (property INIT (string "0") (owner "Xilinx")) + ) + (instance blk00000515 + (viewRef view_1 (cellRef FDRE (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property OPTIMIZE_PRIMITIVES_NGC (string "no") (owner "Xilinx")) + (property INIT (string "0") (owner "Xilinx")) + ) + (instance blk00000516 + (viewRef view_1 (cellRef FDRE (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property OPTIMIZE_PRIMITIVES_NGC (string "no") (owner "Xilinx")) + (property INIT (string "0") (owner "Xilinx")) + ) + (instance blk00000517 + (viewRef view_1 (cellRef FDRE (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property OPTIMIZE_PRIMITIVES_NGC (string "no") (owner "Xilinx")) + (property INIT (string "0") (owner "Xilinx")) + ) + (instance blk00000518 + (viewRef view_1 (cellRef FDRE (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property OPTIMIZE_PRIMITIVES_NGC (string "no") (owner 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(property XSTLIB (boolean (true)) (owner "Xilinx")) + (property INIT (string "0000") (owner "Xilinx")) + ) + (instance blk000006f3 + (viewRef view_1 (cellRef FDE (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property INIT (string "0") (owner "Xilinx")) + ) + (instance blk000006f4 + (viewRef view_1 (cellRef SRLC16E (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property INIT (string "0000") (owner "Xilinx")) + ) + (instance blk000006f5 + (viewRef view_1 (cellRef FDE (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property INIT (string "0") (owner "Xilinx")) + ) + (instance blk000006f6 + (viewRef view_1 (cellRef SRLC16E (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property INIT (string "0000") (owner "Xilinx")) + ) + (instance blk000006f7 + (viewRef view_1 (cellRef FDE (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property 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"dout_2<1>") + (joined + (portRef (member dout_2 45)) + (portRef (member dout_2 45) (instanceRef blk00000003)) + ) + (property USER_ALIAS (string "N722") (owner "Xilinx")) + ) + (net (rename dout_2_renamed_4_0_ "dout_2<0>") + (joined + (portRef (member dout_2 46)) + (portRef (member dout_2 46) (instanceRef blk00000003)) + ) + (property USER_ALIAS (string "N723") (owner "Xilinx")) + ) + ) + ) + ) + ) + + (design hbdec2 + (cellRef hbdec2 + (libraryRef hbdec2_lib) + ) + (property PART (string "7k325tffg900-2") (owner "Xilinx")) + ) +) + diff --git a/fpga/usrp3/top/x400/coregen_dsp/hbdec2.v b/fpga/usrp3/top/x400/coregen_dsp/hbdec2.v new file mode 100644 index 000000000..e5423434c --- /dev/null +++ b/fpga/usrp3/top/x400/coregen_dsp/hbdec2.v @@ -0,0 +1,24109 @@ +//////////////////////////////////////////////////////////////////////////////// +// Copyright (c) 1995-2012 Xilinx, Inc. All rights reserved. +//////////////////////////////////////////////////////////////////////////////// +// ____ ____ +// / /\/ / +// /___/ \ / Vendor: Xilinx +// \ \ \/ Version: P.49d +// \ \ Application: netgen +// / / Filename: hbdec2.v +// /___/ /\ Timestamp: Wed Dec 4 13:33:47 2013 +// \ \ / \ +// \___\/\___\ +// +// Command : -intstyle ise -w -sim -ofmt verilog ./tmp/_cg/hbdec2.ngc ./tmp/_cg/hbdec2.v +// Device : 7k325tffg900-2 +// Input file : ./tmp/_cg/hbdec2.ngc +// Output file : ./tmp/_cg/hbdec2.v +// # of Modules : 1 +// Design Name : hbdec2 +// Xilinx : /opt/Xilinx/14.4/ISE_DS/ISE/ +// +// Purpose: +// This verilog netlist is a verification model and uses simulation +// primitives which may not represent the true implementation of the +// device, however the netlist is functionally correct and should not +// be modified. This file cannot be synthesized and should only be used +// with supported simulation tools. +// +// Reference: +// Command Line Tools User Guide, Chapter 23 and Synthesis and Simulation Design Guide, Chapter 6 +// +//////////////////////////////////////////////////////////////////////////////// + +`timescale 1 ns/1 ps + +module hbdec2 ( + sclr, ce, rfd, rdy, data_valid, coef_we, nd, clk, coef_ld, dout_1, dout_2, din_1, din_2, coef_din +)/* synthesis syn_black_box syn_noprune=1 */; + input sclr; + input ce; + output rfd; + output rdy; + output data_valid; + input coef_we; + input nd; + input clk; + input coef_ld; + output [46 : 0] dout_1; + output [46 : 0] dout_2; + input [23 : 0] din_1; + input [23 : 0] din_2; + input [17 : 0] coef_din; + + // synthesis translate_off + + wire NlwRenamedSig_OI_rfd; + wire \blk00000003/sig00000767 ; + wire \blk00000003/sig00000766 ; + wire \blk00000003/sig00000765 ; + wire \blk00000003/sig00000764 ; + wire \blk00000003/sig00000763 ; + wire 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\NLW_blk00000003/blk00000740_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk0000073e_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk0000073c_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk0000073a_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000738_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000736_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000734_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000732_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000730_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk0000072e_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk0000072c_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk0000072a_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000728_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000726_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000724_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000722_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000720_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk0000071e_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk0000071c_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk0000071a_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000718_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000716_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000714_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000712_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000710_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk0000070e_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk0000070c_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk0000070a_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000708_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000706_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000704_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000702_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000700_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk000006fe_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk000006fc_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk000006fa_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk000006f8_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk000006f6_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk000006f4_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk000006f2_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk000006f0_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk000006ee_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk000006ec_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk000006ea_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk000006e8_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk000006e6_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk000006e4_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk000006e2_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk000006e0_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk000006de_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk000006dc_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk000006da_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk000006d8_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk000006d6_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk000006d4_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk000006d2_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk000006d0_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk000006ce_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk000006cc_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk000006ca_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk000006c8_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk000006c6_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk000006c4_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk000006c2_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk000006c0_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk000006be_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk000006bc_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk000006ba_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk000006b8_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk000006b6_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk000006b4_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk000006b2_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk000006b0_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk000006ae_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk000006ac_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk000006aa_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk000006a8_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk000006a6_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk000006a4_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk000006a2_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk000006a0_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk0000069e_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk0000069c_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk0000069a_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000698_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000696_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000694_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000692_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000690_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk0000068e_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk0000068c_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk0000068a_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000688_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000686_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000684_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000682_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000680_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk0000067e_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk0000067c_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk0000067a_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000678_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000676_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000674_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000672_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000670_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk0000066e_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk0000066c_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk0000066a_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000668_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000666_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000664_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000662_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000660_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk0000065e_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk0000065c_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk0000065a_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000658_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000656_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000654_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000652_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000650_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk0000064e_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk0000064c_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk0000064a_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000648_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000646_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000644_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000642_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000640_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk0000063e_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk0000063c_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk0000063a_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000638_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000636_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000634_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000632_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000630_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk0000062e_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk0000062c_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk0000062a_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000628_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk0000053a_O_UNCONNECTED ; + wire \NLW_blk00000003/blk0000053a_LO_UNCONNECTED ; + wire \NLW_blk00000003/blk000004d0_O_UNCONNECTED ; + wire \NLW_blk00000003/blk000004d0_LO_UNCONNECTED ; + wire \NLW_blk00000003/blk000000fc_PATTERNBDETECT_UNCONNECTED ; + wire \NLW_blk00000003/blk000000fc_MULTSIGNOUT_UNCONNECTED ; + wire \NLW_blk00000003/blk000000fc_CARRYCASCOUT_UNCONNECTED ; + wire \NLW_blk00000003/blk000000fc_UNDERFLOW_UNCONNECTED ; + wire \NLW_blk00000003/blk000000fc_PATTERNDETECT_UNCONNECTED ; + wire \NLW_blk00000003/blk000000fc_OVERFLOW_UNCONNECTED ; + wire \NLW_blk00000003/blk000000fc_ACOUT<29>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000fc_ACOUT<28>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000fc_ACOUT<27>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000fc_ACOUT<26>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000fc_ACOUT<25>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000fc_ACOUT<24>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000fc_ACOUT<23>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000fc_ACOUT<22>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000fc_ACOUT<21>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000fc_ACOUT<20>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000fc_ACOUT<19>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000fc_ACOUT<18>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000fc_ACOUT<17>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000fc_ACOUT<16>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000fc_ACOUT<15>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000fc_ACOUT<14>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000fc_ACOUT<13>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000fc_ACOUT<12>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000fc_ACOUT<11>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000fc_ACOUT<10>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000fc_ACOUT<9>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000fc_ACOUT<8>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000fc_ACOUT<7>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000fc_ACOUT<6>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000fc_ACOUT<5>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000fc_ACOUT<4>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000fc_ACOUT<3>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000fc_ACOUT<2>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000fc_ACOUT<1>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000fc_ACOUT<0>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000fc_CARRYOUT<3>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000fc_CARRYOUT<2>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000fc_CARRYOUT<1>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000fc_CARRYOUT<0>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000fc_BCOUT<17>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000fc_BCOUT<16>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000fc_BCOUT<15>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000fc_BCOUT<14>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000fc_BCOUT<13>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000fc_BCOUT<12>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000fc_BCOUT<11>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000fc_BCOUT<10>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000fc_BCOUT<9>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000fc_BCOUT<8>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000fc_BCOUT<7>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000fc_BCOUT<6>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000fc_BCOUT<5>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000fc_BCOUT<4>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000fc_BCOUT<3>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000fc_BCOUT<2>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000fc_BCOUT<1>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000fc_BCOUT<0>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000fc_P<47>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000fc_P<46>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000fc_P<45>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000fc_P<44>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000fc_P<43>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000fc_P<42>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000fc_P<41>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000fc_P<40>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000fc_P<39>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000fc_P<38>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000fc_P<37>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000fc_P<36>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000fc_P<35>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000fc_P<34>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000fc_P<33>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000fc_P<32>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000fc_P<31>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000fc_P<30>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000fc_P<29>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000fc_P<28>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000fc_P<27>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000fc_P<26>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000fc_P<25>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000fc_P<24>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000fc_P<23>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000fc_P<22>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000fc_P<21>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000fc_P<20>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000fc_P<19>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000fc_P<18>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000fc_P<17>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000fc_P<16>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000fc_P<15>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000fc_P<14>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000fc_P<13>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000fc_P<12>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000fc_P<11>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000fc_P<10>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000fc_P<9>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000fc_P<8>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000fc_P<7>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000fc_P<6>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000fc_P<5>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000fc_P<4>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000fc_P<3>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000fc_P<2>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000fc_P<1>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000fc_P<0>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000fb_PATTERNBDETECT_UNCONNECTED ; + wire \NLW_blk00000003/blk000000fb_MULTSIGNOUT_UNCONNECTED ; + wire \NLW_blk00000003/blk000000fb_CARRYCASCOUT_UNCONNECTED ; + wire \NLW_blk00000003/blk000000fb_UNDERFLOW_UNCONNECTED ; + wire \NLW_blk00000003/blk000000fb_PATTERNDETECT_UNCONNECTED ; + wire \NLW_blk00000003/blk000000fb_OVERFLOW_UNCONNECTED ; + wire \NLW_blk00000003/blk000000fb_ACOUT<29>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000fb_ACOUT<28>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000fb_ACOUT<27>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000fb_ACOUT<26>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000fb_ACOUT<25>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000fb_ACOUT<24>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000fb_ACOUT<23>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000fb_ACOUT<22>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000fb_ACOUT<21>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000fb_ACOUT<20>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000fb_ACOUT<19>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000fb_ACOUT<18>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000fb_ACOUT<17>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000fb_ACOUT<16>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000fb_ACOUT<15>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000fb_ACOUT<14>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000fb_ACOUT<13>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000fb_ACOUT<12>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000fb_ACOUT<11>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000fb_ACOUT<10>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000fb_ACOUT<9>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000fb_ACOUT<8>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000fb_ACOUT<7>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000fb_ACOUT<6>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000fb_ACOUT<5>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000fb_ACOUT<4>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000fb_ACOUT<3>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000fb_ACOUT<2>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000fb_ACOUT<1>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000fb_ACOUT<0>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000fb_CARRYOUT<3>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000fb_CARRYOUT<2>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000fb_CARRYOUT<1>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000fb_CARRYOUT<0>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000fb_BCOUT<17>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000fb_BCOUT<16>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000fb_BCOUT<15>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000fb_BCOUT<14>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000fb_BCOUT<13>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000fb_BCOUT<12>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000fb_BCOUT<11>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000fb_BCOUT<10>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000fb_BCOUT<9>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000fb_BCOUT<8>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000fb_BCOUT<7>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000fb_BCOUT<6>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000fb_BCOUT<5>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000fb_BCOUT<4>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000fb_BCOUT<3>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000fb_BCOUT<2>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000fb_BCOUT<1>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000fb_BCOUT<0>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000fb_P<47>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000fb_P<46>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000fb_P<45>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000fb_P<44>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000fb_P<43>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000fb_P<42>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000fb_P<41>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000fb_P<40>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000fb_P<39>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000fb_P<38>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000fb_P<37>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000fb_P<36>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000fb_P<35>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000fb_P<34>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000fb_P<33>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000fb_P<32>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000fb_P<31>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000fb_P<30>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000fb_P<29>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000fb_P<28>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000fb_P<27>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000fb_P<26>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000fb_P<25>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000fb_P<24>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000fb_P<23>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000fb_P<22>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000fb_P<21>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000fb_P<20>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000fb_P<19>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000fb_P<18>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000fb_P<17>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000fb_P<16>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000fb_P<15>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000fb_P<14>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000fb_P<13>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000fb_P<12>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000fb_P<11>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000fb_P<10>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000fb_P<9>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000fb_P<8>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000fb_P<7>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000fb_P<6>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000fb_P<5>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000fb_P<4>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000fb_P<3>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000fb_P<2>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000fb_P<1>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000fb_P<0>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000fa_PATTERNBDETECT_UNCONNECTED ; + wire \NLW_blk00000003/blk000000fa_MULTSIGNOUT_UNCONNECTED ; + wire \NLW_blk00000003/blk000000fa_CARRYCASCOUT_UNCONNECTED ; + wire \NLW_blk00000003/blk000000fa_UNDERFLOW_UNCONNECTED ; + wire \NLW_blk00000003/blk000000fa_PATTERNDETECT_UNCONNECTED ; + wire \NLW_blk00000003/blk000000fa_OVERFLOW_UNCONNECTED ; + wire \NLW_blk00000003/blk000000fa_ACOUT<29>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000fa_ACOUT<28>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000fa_ACOUT<27>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000fa_ACOUT<26>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000fa_ACOUT<25>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000fa_ACOUT<24>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000fa_ACOUT<23>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000fa_ACOUT<22>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000fa_ACOUT<21>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000fa_ACOUT<20>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000fa_ACOUT<19>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000fa_ACOUT<18>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000fa_ACOUT<17>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000fa_ACOUT<16>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000fa_ACOUT<15>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000fa_ACOUT<14>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000fa_ACOUT<13>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000fa_ACOUT<12>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000fa_ACOUT<11>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000fa_ACOUT<10>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000fa_ACOUT<9>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000fa_ACOUT<8>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000fa_ACOUT<7>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000fa_ACOUT<6>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000fa_ACOUT<5>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000fa_ACOUT<4>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000fa_ACOUT<3>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000fa_ACOUT<2>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000fa_ACOUT<1>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000fa_ACOUT<0>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000fa_CARRYOUT<3>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000fa_CARRYOUT<2>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000fa_CARRYOUT<1>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000fa_CARRYOUT<0>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000fa_BCOUT<17>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000fa_BCOUT<16>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000fa_BCOUT<15>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000fa_BCOUT<14>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000fa_BCOUT<13>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000fa_BCOUT<12>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000fa_BCOUT<11>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000fa_BCOUT<10>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000fa_BCOUT<9>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000fa_BCOUT<8>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000fa_BCOUT<7>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000fa_BCOUT<6>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000fa_BCOUT<5>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000fa_BCOUT<4>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000fa_BCOUT<3>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000fa_BCOUT<2>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000fa_BCOUT<1>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000fa_BCOUT<0>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000fa_P<47>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000fa_P<46>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000fa_P<45>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000fa_P<44>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000fa_P<43>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000fa_P<42>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000fa_P<41>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000fa_P<40>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000fa_P<39>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000fa_P<38>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000fa_P<37>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000fa_P<36>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000fa_P<35>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000fa_P<34>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000fa_P<33>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000fa_P<32>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000fa_P<31>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000fa_P<30>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000fa_P<29>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000fa_P<28>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000fa_P<27>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000fa_P<26>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000fa_P<25>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000fa_P<24>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000fa_P<23>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000fa_P<22>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000fa_P<21>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000fa_P<20>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000fa_P<19>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000fa_P<18>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000fa_P<17>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000fa_P<16>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000fa_P<15>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000fa_P<14>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000fa_P<13>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000fa_P<12>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000fa_P<11>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000fa_P<10>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000fa_P<9>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000fa_P<8>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000fa_P<7>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000fa_P<6>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000fa_P<5>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000fa_P<4>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000fa_P<3>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000fa_P<2>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000fa_P<1>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000fa_P<0>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000f9_PATTERNBDETECT_UNCONNECTED ; + wire \NLW_blk00000003/blk000000f9_MULTSIGNOUT_UNCONNECTED ; + wire \NLW_blk00000003/blk000000f9_CARRYCASCOUT_UNCONNECTED ; + wire \NLW_blk00000003/blk000000f9_UNDERFLOW_UNCONNECTED ; + wire \NLW_blk00000003/blk000000f9_PATTERNDETECT_UNCONNECTED ; + wire \NLW_blk00000003/blk000000f9_OVERFLOW_UNCONNECTED ; + wire \NLW_blk00000003/blk000000f9_ACOUT<29>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000f9_ACOUT<28>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000f9_ACOUT<27>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000f9_ACOUT<26>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000f9_ACOUT<25>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000f9_ACOUT<24>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000f9_ACOUT<23>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000f9_ACOUT<22>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000f9_ACOUT<21>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000f9_ACOUT<20>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000f9_ACOUT<19>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000f9_ACOUT<18>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000f9_ACOUT<17>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000f9_ACOUT<16>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000f9_ACOUT<15>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000f9_ACOUT<14>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000f9_ACOUT<13>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000f9_ACOUT<12>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000f9_ACOUT<11>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000f9_ACOUT<10>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000f9_ACOUT<9>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000f9_ACOUT<8>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000f9_ACOUT<7>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000f9_ACOUT<6>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000f9_ACOUT<5>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000f9_ACOUT<4>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000f9_ACOUT<3>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000f9_ACOUT<2>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000f9_ACOUT<1>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000f9_ACOUT<0>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000f9_CARRYOUT<3>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000f9_CARRYOUT<2>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000f9_CARRYOUT<1>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000f9_CARRYOUT<0>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000f9_BCOUT<17>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000f9_BCOUT<16>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000f9_BCOUT<15>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000f9_BCOUT<14>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000f9_BCOUT<13>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000f9_BCOUT<12>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000f9_BCOUT<11>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000f9_BCOUT<10>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000f9_BCOUT<9>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000f9_BCOUT<8>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000f9_BCOUT<7>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000f9_BCOUT<6>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000f9_BCOUT<5>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000f9_BCOUT<4>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000f9_BCOUT<3>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000f9_BCOUT<2>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000f9_BCOUT<1>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000f9_BCOUT<0>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000f9_P<47>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000f9_P<46>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000f9_P<45>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000f9_P<44>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000f9_P<43>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000f9_P<42>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000f9_P<41>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000f9_P<40>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000f9_P<39>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000f9_P<38>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000f9_P<37>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000f9_P<36>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000f9_P<35>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000f9_P<34>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000f9_P<33>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000f9_P<32>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000f9_P<31>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000f9_P<30>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000f9_P<29>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000f9_P<28>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000f9_P<27>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000f9_P<26>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000f9_P<25>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000f9_P<24>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000f9_P<23>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000f9_P<22>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000f9_P<21>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000f9_P<20>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000f9_P<19>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000f9_P<18>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000f9_P<17>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000f9_P<16>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000f9_P<15>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000f9_P<14>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000f9_P<13>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000f9_P<12>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000f9_P<11>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000f9_P<10>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000f9_P<9>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000f9_P<8>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000f9_P<7>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000f9_P<6>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000f9_P<5>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000f9_P<4>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000f9_P<3>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000f9_P<2>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000f9_P<1>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000f9_P<0>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000f8_PATTERNBDETECT_UNCONNECTED ; + wire \NLW_blk00000003/blk000000f8_MULTSIGNOUT_UNCONNECTED ; + wire \NLW_blk00000003/blk000000f8_CARRYCASCOUT_UNCONNECTED ; + wire \NLW_blk00000003/blk000000f8_UNDERFLOW_UNCONNECTED ; + wire \NLW_blk00000003/blk000000f8_PATTERNDETECT_UNCONNECTED ; + wire \NLW_blk00000003/blk000000f8_OVERFLOW_UNCONNECTED ; + wire \NLW_blk00000003/blk000000f8_ACOUT<29>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000f8_ACOUT<28>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000f8_ACOUT<27>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000f8_ACOUT<26>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000f8_ACOUT<25>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000f8_ACOUT<24>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000f8_ACOUT<23>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000f8_ACOUT<22>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000f8_ACOUT<21>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000f8_ACOUT<20>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000f8_ACOUT<19>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000f8_ACOUT<18>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000f8_ACOUT<17>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000f8_ACOUT<16>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000f8_ACOUT<15>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000f8_ACOUT<14>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000f8_ACOUT<13>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000f8_ACOUT<12>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000f8_ACOUT<11>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000f8_ACOUT<10>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000f8_ACOUT<9>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000f8_ACOUT<8>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000f8_ACOUT<7>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000f8_ACOUT<6>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000f8_ACOUT<5>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000f8_ACOUT<4>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000f8_ACOUT<3>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000f8_ACOUT<2>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000f8_ACOUT<1>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000f8_ACOUT<0>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000f8_CARRYOUT<3>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000f8_CARRYOUT<2>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000f8_CARRYOUT<1>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000f8_CARRYOUT<0>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000f8_BCOUT<17>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000f8_BCOUT<16>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000f8_BCOUT<15>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000f8_BCOUT<14>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000f8_BCOUT<13>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000f8_BCOUT<12>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000f8_BCOUT<11>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000f8_BCOUT<10>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000f8_BCOUT<9>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000f8_BCOUT<8>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000f8_BCOUT<7>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000f8_BCOUT<6>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000f8_BCOUT<5>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000f8_BCOUT<4>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000f8_BCOUT<3>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000f8_BCOUT<2>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000f8_BCOUT<1>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000f8_BCOUT<0>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000f8_P<47>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000f8_P<46>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000f8_P<45>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000f8_P<44>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000f8_P<43>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000f8_P<42>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000f8_P<41>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000f8_P<40>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000f8_P<39>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000f8_P<38>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000f8_P<37>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000f8_P<36>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000f8_P<35>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000f8_P<34>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000f8_P<33>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000f8_P<32>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000f8_P<31>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000f8_P<30>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000f8_P<29>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000f8_P<28>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000f8_P<27>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000f8_P<26>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000f8_P<25>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000f8_P<24>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000f8_P<23>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000f8_P<22>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000f8_P<21>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000f8_P<20>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000f8_P<19>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000f8_P<18>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000f8_P<17>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000f8_P<16>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000f8_P<15>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000f8_P<14>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000f8_P<13>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000f8_P<12>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000f8_P<11>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000f8_P<10>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000f8_P<9>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000f8_P<8>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000f8_P<7>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000f8_P<6>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000f8_P<5>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000f8_P<4>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000f8_P<3>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000f8_P<2>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000f8_P<1>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000f8_P<0>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000f7_PATTERNBDETECT_UNCONNECTED ; + wire \NLW_blk00000003/blk000000f7_MULTSIGNOUT_UNCONNECTED ; + wire \NLW_blk00000003/blk000000f7_CARRYCASCOUT_UNCONNECTED ; + wire \NLW_blk00000003/blk000000f7_UNDERFLOW_UNCONNECTED ; + wire \NLW_blk00000003/blk000000f7_PATTERNDETECT_UNCONNECTED ; + wire \NLW_blk00000003/blk000000f7_OVERFLOW_UNCONNECTED ; + wire \NLW_blk00000003/blk000000f7_ACOUT<29>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000f7_ACOUT<28>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000f7_ACOUT<27>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000f7_ACOUT<26>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000f7_ACOUT<25>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000f7_ACOUT<24>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000f7_ACOUT<23>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000f7_ACOUT<22>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000f7_ACOUT<21>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000f7_ACOUT<20>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000f7_ACOUT<19>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000f7_ACOUT<18>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000f7_ACOUT<17>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000f7_ACOUT<16>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000f7_ACOUT<15>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000f7_ACOUT<14>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000f7_ACOUT<13>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000f7_ACOUT<12>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000f7_ACOUT<11>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000f7_ACOUT<10>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000f7_ACOUT<9>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000f7_ACOUT<8>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000f7_ACOUT<7>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000f7_ACOUT<6>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000f7_ACOUT<5>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000f7_ACOUT<4>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000f7_ACOUT<3>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000f7_ACOUT<2>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000f7_ACOUT<1>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000f7_ACOUT<0>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000f7_CARRYOUT<3>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000f7_CARRYOUT<2>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000f7_CARRYOUT<1>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000f7_CARRYOUT<0>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000f7_BCOUT<17>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000f7_BCOUT<16>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000f7_BCOUT<15>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000f7_BCOUT<14>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000f7_BCOUT<13>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000f7_BCOUT<12>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000f7_BCOUT<11>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000f7_BCOUT<10>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000f7_BCOUT<9>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000f7_BCOUT<8>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000f7_BCOUT<7>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000f7_BCOUT<6>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000f7_BCOUT<5>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000f7_BCOUT<4>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000f7_BCOUT<3>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000f7_BCOUT<2>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000f7_BCOUT<1>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000f7_BCOUT<0>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000f7_P<47>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000f7_P<46>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000f7_P<45>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000f7_P<44>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000f7_P<43>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000f7_P<42>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000f7_P<41>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000f7_P<40>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000f7_P<39>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000f7_P<38>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000f7_P<37>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000f7_P<36>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000f7_P<35>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000f7_P<34>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000f7_P<33>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000f7_P<32>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000f7_P<31>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000f7_P<30>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000f7_P<29>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000f7_P<28>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000f7_P<27>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000f7_P<26>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000f7_P<25>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000f7_P<24>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000f7_P<23>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000f7_P<22>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000f7_P<21>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000f7_P<20>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000f7_P<19>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000f7_P<18>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000f7_P<17>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000f7_P<16>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000f7_P<15>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000f7_P<14>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000f7_P<13>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000f7_P<12>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000f7_P<11>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000f7_P<10>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000f7_P<9>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000f7_P<8>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000f7_P<7>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000f7_P<6>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000f7_P<5>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000f7_P<4>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000f7_P<3>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000f7_P<2>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000f7_P<1>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000f7_P<0>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000f2_O_UNCONNECTED ; + wire \NLW_blk00000003/blk000000f2_LO_UNCONNECTED ; + wire \NLW_blk00000003/blk000000ee_O_UNCONNECTED ; + wire \NLW_blk00000003/blk000000ee_LO_UNCONNECTED ; + wire \NLW_blk00000003/blk000000ea_O_UNCONNECTED ; + wire \NLW_blk00000003/blk000000ea_LO_UNCONNECTED ; + wire \NLW_blk00000003/blk000000e4_O_UNCONNECTED ; + wire \NLW_blk00000003/blk000000e4_LO_UNCONNECTED ; + wire \NLW_blk00000003/blk000000e0_O_UNCONNECTED ; + wire \NLW_blk00000003/blk000000e0_LO_UNCONNECTED ; + wire \NLW_blk00000003/blk000000db_O_UNCONNECTED ; + wire \NLW_blk00000003/blk000000da_LO_UNCONNECTED ; + wire \NLW_blk00000003/blk000000d5_LO_UNCONNECTED ; + wire \NLW_blk00000003/blk000000d4_LO_UNCONNECTED ; + wire \NLW_blk00000003/blk000000d3_LO_UNCONNECTED ; + wire \NLW_blk00000003/blk000000d2_LO_UNCONNECTED ; + wire \NLW_blk00000003/blk000000d1_LO_UNCONNECTED ; + wire \NLW_blk00000003/blk000000d0_O_UNCONNECTED ; + wire \NLW_blk00000003/blk000000cc_LO_UNCONNECTED ; + wire \NLW_blk00000003/blk000000cb_LO_UNCONNECTED ; + wire \NLW_blk00000003/blk000000ca_LO_UNCONNECTED ; + wire \NLW_blk00000003/blk000000c9_LO_UNCONNECTED ; + wire \NLW_blk00000003/blk000000c8_LO_UNCONNECTED ; + wire \NLW_blk00000003/blk000000c7_O_UNCONNECTED ; + wire \NLW_blk00000003/blk000000c6_LO_UNCONNECTED ; + wire \NLW_blk00000003/blk000000c0_O_UNCONNECTED ; + wire \NLW_blk00000003/blk000000c0_LO_UNCONNECTED ; + wire \NLW_blk00000003/blk000000bc_O_UNCONNECTED ; + wire \NLW_blk00000003/blk000000bc_LO_UNCONNECTED ; + wire \NLW_blk00000003/blk000000b6_O_UNCONNECTED ; + wire \NLW_blk00000003/blk000000b6_LO_UNCONNECTED ; + wire \NLW_blk00000003/blk000000b2_O_UNCONNECTED ; + wire \NLW_blk00000003/blk000000b2_LO_UNCONNECTED ; + wire \NLW_blk00000003/blk000000a1_Q_UNCONNECTED ; + wire \NLW_blk00000003/blk000000a0_Q_UNCONNECTED ; + wire \NLW_blk00000003/blk00000098_O_UNCONNECTED ; + wire \NLW_blk00000003/blk00000096_LO_UNCONNECTED ; + wire \NLW_blk00000003/blk00000095_O_UNCONNECTED ; + wire \NLW_blk00000003/blk00000094_LO_UNCONNECTED ; + wire \NLW_blk00000003/blk00000093_O_UNCONNECTED ; + wire \NLW_blk00000003/blk00000091_O_UNCONNECTED ; + wire \NLW_blk00000003/blk00000090_LO_UNCONNECTED ; + wire \NLW_blk00000003/blk0000001a_Q_UNCONNECTED ; + wire \NLW_blk00000003/blk00000016_Q_UNCONNECTED ; + wire \NLW_blk00000003/blk00000012_O_UNCONNECTED ; + wire \NLW_blk00000003/blk00000011_PATTERNBDETECT_UNCONNECTED ; + wire \NLW_blk00000003/blk00000011_MULTSIGNOUT_UNCONNECTED ; + wire \NLW_blk00000003/blk00000011_CARRYCASCOUT_UNCONNECTED ; + wire \NLW_blk00000003/blk00000011_UNDERFLOW_UNCONNECTED ; + wire \NLW_blk00000003/blk00000011_PATTERNDETECT_UNCONNECTED ; + wire \NLW_blk00000003/blk00000011_OVERFLOW_UNCONNECTED ; + wire \NLW_blk00000003/blk00000011_ACOUT<29>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000011_ACOUT<28>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000011_ACOUT<27>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000011_ACOUT<26>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000011_ACOUT<25>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000011_ACOUT<24>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000011_ACOUT<23>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000011_ACOUT<22>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000011_ACOUT<21>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000011_ACOUT<20>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000011_ACOUT<19>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000011_ACOUT<18>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000011_ACOUT<17>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000011_ACOUT<16>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000011_ACOUT<15>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000011_ACOUT<14>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000011_ACOUT<13>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000011_ACOUT<12>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000011_ACOUT<11>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000011_ACOUT<10>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000011_ACOUT<9>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000011_ACOUT<8>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000011_ACOUT<7>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000011_ACOUT<6>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000011_ACOUT<5>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000011_ACOUT<4>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000011_ACOUT<3>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000011_ACOUT<2>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000011_ACOUT<1>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000011_ACOUT<0>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000011_CARRYOUT<3>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000011_CARRYOUT<2>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000011_CARRYOUT<1>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000011_CARRYOUT<0>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000011_BCOUT<17>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000011_BCOUT<16>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000011_BCOUT<15>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000011_BCOUT<14>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000011_BCOUT<13>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000011_BCOUT<12>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000011_BCOUT<11>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000011_BCOUT<10>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000011_BCOUT<9>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000011_BCOUT<8>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000011_BCOUT<7>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000011_BCOUT<6>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000011_BCOUT<5>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000011_BCOUT<4>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000011_BCOUT<3>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000011_BCOUT<2>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000011_BCOUT<1>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000011_BCOUT<0>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000011_P<47>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000011_PCOUT<47>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000011_PCOUT<46>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000011_PCOUT<45>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000011_PCOUT<44>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000011_PCOUT<43>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000011_PCOUT<42>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000011_PCOUT<41>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000011_PCOUT<40>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000011_PCOUT<39>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000011_PCOUT<38>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000011_PCOUT<37>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000011_PCOUT<36>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000011_PCOUT<35>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000011_PCOUT<34>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000011_PCOUT<33>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000011_PCOUT<32>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000011_PCOUT<31>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000011_PCOUT<30>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000011_PCOUT<29>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000011_PCOUT<28>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000011_PCOUT<27>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000011_PCOUT<26>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000011_PCOUT<25>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000011_PCOUT<24>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000011_PCOUT<23>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000011_PCOUT<22>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000011_PCOUT<21>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000011_PCOUT<20>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000011_PCOUT<19>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000011_PCOUT<18>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000011_PCOUT<17>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000011_PCOUT<16>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000011_PCOUT<15>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000011_PCOUT<14>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000011_PCOUT<13>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000011_PCOUT<12>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000011_PCOUT<11>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000011_PCOUT<10>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000011_PCOUT<9>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000011_PCOUT<8>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000011_PCOUT<7>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000011_PCOUT<6>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000011_PCOUT<5>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000011_PCOUT<4>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000011_PCOUT<3>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000011_PCOUT<2>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000011_PCOUT<1>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000011_PCOUT<0>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000010_PATTERNBDETECT_UNCONNECTED ; + wire \NLW_blk00000003/blk00000010_MULTSIGNOUT_UNCONNECTED ; + wire \NLW_blk00000003/blk00000010_CARRYCASCOUT_UNCONNECTED ; + wire \NLW_blk00000003/blk00000010_UNDERFLOW_UNCONNECTED ; + wire \NLW_blk00000003/blk00000010_PATTERNDETECT_UNCONNECTED ; + wire \NLW_blk00000003/blk00000010_OVERFLOW_UNCONNECTED ; + wire \NLW_blk00000003/blk00000010_ACOUT<29>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000010_ACOUT<28>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000010_ACOUT<27>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000010_ACOUT<26>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000010_ACOUT<25>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000010_ACOUT<24>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000010_ACOUT<23>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000010_ACOUT<22>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000010_ACOUT<21>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000010_ACOUT<20>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000010_ACOUT<19>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000010_ACOUT<18>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000010_ACOUT<17>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000010_ACOUT<16>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000010_ACOUT<15>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000010_ACOUT<14>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000010_ACOUT<13>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000010_ACOUT<12>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000010_ACOUT<11>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000010_ACOUT<10>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000010_ACOUT<9>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000010_ACOUT<8>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000010_ACOUT<7>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000010_ACOUT<6>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000010_ACOUT<5>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000010_ACOUT<4>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000010_ACOUT<3>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000010_ACOUT<2>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000010_ACOUT<1>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000010_ACOUT<0>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000010_CARRYOUT<3>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000010_CARRYOUT<2>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000010_CARRYOUT<1>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000010_CARRYOUT<0>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000010_BCOUT<17>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000010_BCOUT<16>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000010_BCOUT<15>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000010_BCOUT<14>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000010_BCOUT<13>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000010_BCOUT<12>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000010_BCOUT<11>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000010_BCOUT<10>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000010_BCOUT<9>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000010_BCOUT<8>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000010_BCOUT<7>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000010_BCOUT<6>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000010_BCOUT<5>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000010_BCOUT<4>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000010_BCOUT<3>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000010_BCOUT<2>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000010_BCOUT<1>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000010_BCOUT<0>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000010_P<47>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000010_PCOUT<47>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000010_PCOUT<46>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000010_PCOUT<45>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000010_PCOUT<44>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000010_PCOUT<43>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000010_PCOUT<42>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000010_PCOUT<41>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000010_PCOUT<40>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000010_PCOUT<39>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000010_PCOUT<38>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000010_PCOUT<37>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000010_PCOUT<36>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000010_PCOUT<35>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000010_PCOUT<34>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000010_PCOUT<33>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000010_PCOUT<32>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000010_PCOUT<31>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000010_PCOUT<30>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000010_PCOUT<29>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000010_PCOUT<28>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000010_PCOUT<27>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000010_PCOUT<26>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000010_PCOUT<25>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000010_PCOUT<24>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000010_PCOUT<23>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000010_PCOUT<22>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000010_PCOUT<21>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000010_PCOUT<20>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000010_PCOUT<19>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000010_PCOUT<18>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000010_PCOUT<17>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000010_PCOUT<16>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000010_PCOUT<15>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000010_PCOUT<14>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000010_PCOUT<13>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000010_PCOUT<12>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000010_PCOUT<11>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000010_PCOUT<10>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000010_PCOUT<9>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000010_PCOUT<8>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000010_PCOUT<7>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000010_PCOUT<6>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000010_PCOUT<5>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000010_PCOUT<4>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000010_PCOUT<3>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000010_PCOUT<2>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000010_PCOUT<1>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000010_PCOUT<0>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000000f_LO_UNCONNECTED ; + wire \NLW_blk00000003/blk0000000c_O_UNCONNECTED ; + wire \NLW_blk00000003/blk0000000b_LO_UNCONNECTED ; + wire \NLW_blk00000003/blk00000006_O_UNCONNECTED ; + wire \NLW_blk00000003/blk00000006_LO_UNCONNECTED ; + wire \NLW_blk00000003/blk0000002b/blk0000008c_SPO_UNCONNECTED ; + wire \NLW_blk00000003/blk0000002b/blk0000008b_SPO_UNCONNECTED ; + wire \NLW_blk00000003/blk0000002b/blk0000008a_SPO_UNCONNECTED ; + wire \NLW_blk00000003/blk0000002b/blk00000089_SPO_UNCONNECTED ; + wire \NLW_blk00000003/blk0000002b/blk00000088_SPO_UNCONNECTED ; + wire \NLW_blk00000003/blk0000002b/blk00000087_SPO_UNCONNECTED ; + wire \NLW_blk00000003/blk0000002b/blk00000086_SPO_UNCONNECTED ; + wire \NLW_blk00000003/blk0000002b/blk00000085_SPO_UNCONNECTED ; + wire \NLW_blk00000003/blk0000002b/blk00000084_SPO_UNCONNECTED ; + wire \NLW_blk00000003/blk0000002b/blk00000083_SPO_UNCONNECTED ; + wire \NLW_blk00000003/blk0000002b/blk00000082_SPO_UNCONNECTED ; + wire \NLW_blk00000003/blk0000002b/blk00000081_SPO_UNCONNECTED ; + wire \NLW_blk00000003/blk0000002b/blk00000080_SPO_UNCONNECTED ; + wire \NLW_blk00000003/blk0000002b/blk0000007f_SPO_UNCONNECTED ; + wire \NLW_blk00000003/blk0000002b/blk0000007e_SPO_UNCONNECTED ; + wire \NLW_blk00000003/blk0000002b/blk0000007d_SPO_UNCONNECTED ; + wire \NLW_blk00000003/blk0000002b/blk0000007c_SPO_UNCONNECTED ; + wire \NLW_blk00000003/blk0000002b/blk0000007b_SPO_UNCONNECTED ; + wire \NLW_blk00000003/blk0000002b/blk0000007a_SPO_UNCONNECTED ; + wire \NLW_blk00000003/blk0000002b/blk00000079_SPO_UNCONNECTED ; + wire \NLW_blk00000003/blk0000002b/blk00000078_SPO_UNCONNECTED ; + wire \NLW_blk00000003/blk0000002b/blk00000077_SPO_UNCONNECTED ; + wire \NLW_blk00000003/blk0000002b/blk00000076_SPO_UNCONNECTED ; + wire \NLW_blk00000003/blk0000002b/blk00000075_SPO_UNCONNECTED ; + wire \NLW_blk00000003/blk0000002b/blk00000074_SPO_UNCONNECTED ; + wire \NLW_blk00000003/blk0000002b/blk00000073_SPO_UNCONNECTED ; + wire \NLW_blk00000003/blk0000002b/blk00000072_SPO_UNCONNECTED ; + wire \NLW_blk00000003/blk0000002b/blk00000071_SPO_UNCONNECTED ; + wire \NLW_blk00000003/blk0000002b/blk00000070_SPO_UNCONNECTED ; + wire \NLW_blk00000003/blk0000002b/blk0000006f_SPO_UNCONNECTED ; + wire \NLW_blk00000003/blk0000002b/blk0000006e_SPO_UNCONNECTED ; + wire \NLW_blk00000003/blk0000002b/blk0000006d_SPO_UNCONNECTED ; + wire \NLW_blk00000003/blk0000002b/blk0000006c_SPO_UNCONNECTED ; + wire \NLW_blk00000003/blk0000002b/blk0000006b_SPO_UNCONNECTED ; + wire \NLW_blk00000003/blk0000002b/blk0000006a_SPO_UNCONNECTED ; + wire \NLW_blk00000003/blk0000002b/blk00000069_SPO_UNCONNECTED ; + wire \NLW_blk00000003/blk0000002b/blk00000068_SPO_UNCONNECTED ; + wire \NLW_blk00000003/blk0000002b/blk00000067_SPO_UNCONNECTED ; + wire \NLW_blk00000003/blk0000002b/blk00000066_SPO_UNCONNECTED ; + wire \NLW_blk00000003/blk0000002b/blk00000065_SPO_UNCONNECTED ; + wire \NLW_blk00000003/blk0000002b/blk00000064_SPO_UNCONNECTED ; + wire \NLW_blk00000003/blk0000002b/blk00000063_SPO_UNCONNECTED ; + wire \NLW_blk00000003/blk0000002b/blk00000062_SPO_UNCONNECTED ; + wire \NLW_blk00000003/blk0000002b/blk00000061_SPO_UNCONNECTED ; + wire \NLW_blk00000003/blk0000002b/blk00000060_SPO_UNCONNECTED ; + wire \NLW_blk00000003/blk0000002b/blk0000005f_SPO_UNCONNECTED ; + wire \NLW_blk00000003/blk0000002b/blk0000005e_SPO_UNCONNECTED ; + wire \NLW_blk00000003/blk0000002b/blk0000005d_SPO_UNCONNECTED ; + wire \NLW_blk00000003/blk00000117/blk00000148_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000117/blk00000147_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000117/blk00000146_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000117/blk00000145_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000117/blk00000144_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000117/blk00000143_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000117/blk00000142_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000117/blk00000141_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000117/blk00000140_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000117/blk0000013f_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000117/blk0000013e_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000117/blk0000013d_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000117/blk0000013c_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000117/blk0000013b_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000117/blk0000013a_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000117/blk00000139_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000117/blk00000138_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000117/blk00000137_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000117/blk00000136_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000117/blk00000135_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000117/blk00000134_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000117/blk00000133_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000117/blk00000132_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000117/blk00000131_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk0000014a/blk0000017b_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk0000014a/blk0000017a_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk0000014a/blk00000179_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk0000014a/blk00000178_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk0000014a/blk00000177_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk0000014a/blk00000176_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk0000014a/blk00000175_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk0000014a/blk00000174_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk0000014a/blk00000173_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk0000014a/blk00000172_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk0000014a/blk00000171_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk0000014a/blk00000170_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk0000014a/blk0000016f_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk0000014a/blk0000016e_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk0000014a/blk0000016d_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk0000014a/blk0000016c_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk0000014a/blk0000016b_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk0000014a/blk0000016a_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk0000014a/blk00000169_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk0000014a/blk00000168_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk0000014a/blk00000167_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk0000014a/blk00000166_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk0000014a/blk00000165_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk0000014a/blk00000164_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk0000017d/blk000001ae_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk0000017d/blk000001ad_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk0000017d/blk000001ac_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk0000017d/blk000001ab_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk0000017d/blk000001aa_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk0000017d/blk000001a9_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk0000017d/blk000001a8_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk0000017d/blk000001a7_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk0000017d/blk000001a6_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk0000017d/blk000001a5_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk0000017d/blk000001a4_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk0000017d/blk000001a3_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk0000017d/blk000001a2_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk0000017d/blk000001a1_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk0000017d/blk000001a0_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk0000017d/blk0000019f_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk0000017d/blk0000019e_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk0000017d/blk0000019d_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk0000017d/blk0000019c_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk0000017d/blk0000019b_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk0000017d/blk0000019a_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk0000017d/blk00000199_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk0000017d/blk00000198_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk0000017d/blk00000197_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk000001b0/blk000001e1_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk000001b0/blk000001e0_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk000001b0/blk000001df_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk000001b0/blk000001de_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk000001b0/blk000001dd_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk000001b0/blk000001dc_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk000001b0/blk000001db_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk000001b0/blk000001da_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk000001b0/blk000001d9_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk000001b0/blk000001d8_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk000001b0/blk000001d7_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk000001b0/blk000001d6_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk000001b0/blk000001d5_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk000001b0/blk000001d4_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk000001b0/blk000001d3_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk000001b0/blk000001d2_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk000001b0/blk000001d1_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk000001b0/blk000001d0_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk000001b0/blk000001cf_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk000001b0/blk000001ce_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk000001b0/blk000001cd_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk000001b0/blk000001cc_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk000001b0/blk000001cb_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk000001b0/blk000001ca_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk000001e3/blk00000214_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk000001e3/blk00000213_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk000001e3/blk00000212_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk000001e3/blk00000211_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk000001e3/blk00000210_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk000001e3/blk0000020f_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk000001e3/blk0000020e_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk000001e3/blk0000020d_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk000001e3/blk0000020c_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk000001e3/blk0000020b_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk000001e3/blk0000020a_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk000001e3/blk00000209_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk000001e3/blk00000208_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk000001e3/blk00000207_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk000001e3/blk00000206_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk000001e3/blk00000205_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk000001e3/blk00000204_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk000001e3/blk00000203_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk000001e3/blk00000202_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk000001e3/blk00000201_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk000001e3/blk00000200_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk000001e3/blk000001ff_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk000001e3/blk000001fe_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk000001e3/blk000001fd_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000216/blk00000247_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000216/blk00000246_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000216/blk00000245_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000216/blk00000244_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000216/blk00000243_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000216/blk00000242_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000216/blk00000241_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000216/blk00000240_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000216/blk0000023f_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000216/blk0000023e_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000216/blk0000023d_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000216/blk0000023c_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000216/blk0000023b_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000216/blk0000023a_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000216/blk00000239_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000216/blk00000238_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000216/blk00000237_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000216/blk00000236_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000216/blk00000235_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000216/blk00000234_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000216/blk00000233_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000216/blk00000232_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000216/blk00000231_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000216/blk00000230_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000249/blk0000027a_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000249/blk00000279_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000249/blk00000278_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000249/blk00000277_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000249/blk00000276_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000249/blk00000275_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000249/blk00000274_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000249/blk00000273_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000249/blk00000272_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000249/blk00000271_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000249/blk00000270_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000249/blk0000026f_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000249/blk0000026e_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000249/blk0000026d_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000249/blk0000026c_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000249/blk0000026b_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000249/blk0000026a_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000249/blk00000269_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000249/blk00000268_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000249/blk00000267_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000249/blk00000266_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000249/blk00000265_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000249/blk00000264_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000249/blk00000263_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk0000027c/blk000002ad_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk0000027c/blk000002ac_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk0000027c/blk000002ab_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk0000027c/blk000002aa_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk0000027c/blk000002a9_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk0000027c/blk000002a8_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk0000027c/blk000002a7_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk0000027c/blk000002a6_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk0000027c/blk000002a5_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk0000027c/blk000002a4_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk0000027c/blk000002a3_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk0000027c/blk000002a2_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk0000027c/blk000002a1_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk0000027c/blk000002a0_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk0000027c/blk0000029f_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk0000027c/blk0000029e_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk0000027c/blk0000029d_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk0000027c/blk0000029c_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk0000027c/blk0000029b_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk0000027c/blk0000029a_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk0000027c/blk00000299_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk0000027c/blk00000298_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk0000027c/blk00000297_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk0000027c/blk00000296_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk000002af/blk000002e0_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk000002af/blk000002df_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk000002af/blk000002de_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk000002af/blk000002dd_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk000002af/blk000002dc_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk000002af/blk000002db_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk000002af/blk000002da_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk000002af/blk000002d9_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk000002af/blk000002d8_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk000002af/blk000002d7_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk000002af/blk000002d6_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk000002af/blk000002d5_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk000002af/blk000002d4_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk000002af/blk000002d3_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk000002af/blk000002d2_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk000002af/blk000002d1_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk000002af/blk000002d0_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk000002af/blk000002cf_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk000002af/blk000002ce_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk000002af/blk000002cd_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk000002af/blk000002cc_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk000002af/blk000002cb_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk000002af/blk000002ca_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk000002af/blk000002c9_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk000002e2/blk00000313_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk000002e2/blk00000312_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk000002e2/blk00000311_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk000002e2/blk00000310_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk000002e2/blk0000030f_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk000002e2/blk0000030e_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk000002e2/blk0000030d_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk000002e2/blk0000030c_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk000002e2/blk0000030b_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk000002e2/blk0000030a_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk000002e2/blk00000309_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk000002e2/blk00000308_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk000002e2/blk00000307_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk000002e2/blk00000306_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk000002e2/blk00000305_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk000002e2/blk00000304_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk000002e2/blk00000303_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk000002e2/blk00000302_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk000002e2/blk00000301_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk000002e2/blk00000300_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk000002e2/blk000002ff_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk000002e2/blk000002fe_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk000002e2/blk000002fd_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk000002e2/blk000002fc_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000315/blk00000346_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000315/blk00000345_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000315/blk00000344_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000315/blk00000343_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000315/blk00000342_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000315/blk00000341_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000315/blk00000340_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000315/blk0000033f_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000315/blk0000033e_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000315/blk0000033d_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000315/blk0000033c_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000315/blk0000033b_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000315/blk0000033a_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000315/blk00000339_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000315/blk00000338_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000315/blk00000337_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000315/blk00000336_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000315/blk00000335_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000315/blk00000334_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000315/blk00000333_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000315/blk00000332_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000315/blk00000331_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000315/blk00000330_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000315/blk0000032f_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000348/blk00000379_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000348/blk00000378_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000348/blk00000377_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000348/blk00000376_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000348/blk00000375_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000348/blk00000374_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000348/blk00000373_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000348/blk00000372_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000348/blk00000371_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000348/blk00000370_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000348/blk0000036f_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000348/blk0000036e_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000348/blk0000036d_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000348/blk0000036c_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000348/blk0000036b_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000348/blk0000036a_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000348/blk00000369_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000348/blk00000368_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000348/blk00000367_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000348/blk00000366_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000348/blk00000365_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000348/blk00000364_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000348/blk00000363_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000348/blk00000362_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk0000044d/blk00000472_SPO_UNCONNECTED ; + wire \NLW_blk00000003/blk0000044d/blk00000471_SPO_UNCONNECTED ; + wire \NLW_blk00000003/blk0000044d/blk00000470_SPO_UNCONNECTED ; + wire \NLW_blk00000003/blk0000044d/blk0000046f_SPO_UNCONNECTED ; + wire \NLW_blk00000003/blk0000044d/blk0000046e_SPO_UNCONNECTED ; + wire \NLW_blk00000003/blk0000044d/blk0000046d_SPO_UNCONNECTED ; + wire \NLW_blk00000003/blk0000044d/blk0000046c_SPO_UNCONNECTED ; + wire \NLW_blk00000003/blk0000044d/blk0000046b_SPO_UNCONNECTED ; + wire \NLW_blk00000003/blk0000044d/blk0000046a_SPO_UNCONNECTED ; + wire \NLW_blk00000003/blk0000044d/blk00000469_SPO_UNCONNECTED ; + wire \NLW_blk00000003/blk0000044d/blk00000468_SPO_UNCONNECTED ; + wire \NLW_blk00000003/blk0000044d/blk00000467_SPO_UNCONNECTED ; + wire \NLW_blk00000003/blk0000044d/blk00000466_SPO_UNCONNECTED ; + wire \NLW_blk00000003/blk0000044d/blk00000465_SPO_UNCONNECTED ; + wire \NLW_blk00000003/blk0000044d/blk00000464_SPO_UNCONNECTED ; + wire \NLW_blk00000003/blk0000044d/blk00000463_SPO_UNCONNECTED ; + wire \NLW_blk00000003/blk0000044d/blk00000462_SPO_UNCONNECTED ; + wire \NLW_blk00000003/blk0000044d/blk00000461_SPO_UNCONNECTED ; + wire \NLW_blk00000003/blk000004a4/blk000004c9_SPO_UNCONNECTED ; + wire \NLW_blk00000003/blk000004a4/blk000004c8_SPO_UNCONNECTED ; + wire \NLW_blk00000003/blk000004a4/blk000004c7_SPO_UNCONNECTED ; + wire \NLW_blk00000003/blk000004a4/blk000004c6_SPO_UNCONNECTED ; + wire \NLW_blk00000003/blk000004a4/blk000004c5_SPO_UNCONNECTED ; + wire \NLW_blk00000003/blk000004a4/blk000004c4_SPO_UNCONNECTED ; + wire \NLW_blk00000003/blk000004a4/blk000004c3_SPO_UNCONNECTED ; + wire \NLW_blk00000003/blk000004a4/blk000004c2_SPO_UNCONNECTED ; + wire \NLW_blk00000003/blk000004a4/blk000004c1_SPO_UNCONNECTED ; + wire \NLW_blk00000003/blk000004a4/blk000004c0_SPO_UNCONNECTED ; + wire \NLW_blk00000003/blk000004a4/blk000004bf_SPO_UNCONNECTED ; + wire \NLW_blk00000003/blk000004a4/blk000004be_SPO_UNCONNECTED ; + wire \NLW_blk00000003/blk000004a4/blk000004bd_SPO_UNCONNECTED ; + wire \NLW_blk00000003/blk000004a4/blk000004bc_SPO_UNCONNECTED ; + wire \NLW_blk00000003/blk000004a4/blk000004bb_SPO_UNCONNECTED ; + wire \NLW_blk00000003/blk000004a4/blk000004ba_SPO_UNCONNECTED ; + wire \NLW_blk00000003/blk000004a4/blk000004b9_SPO_UNCONNECTED ; + wire \NLW_blk00000003/blk000004a4/blk000004b8_SPO_UNCONNECTED ; + wire [17 : 0] coef_din_0; + wire [23 : 0] din_1_1; + wire [23 : 0] din_2_2; + wire [46 : 0] NlwRenamedSig_OI_dout_1; + wire [46 : 0] NlwRenamedSig_OI_dout_2; + assign + rfd = NlwRenamedSig_OI_rfd, + dout_1[46] = NlwRenamedSig_OI_dout_1[46], + dout_1[45] = NlwRenamedSig_OI_dout_1[45], + dout_1[44] = NlwRenamedSig_OI_dout_1[44], + dout_1[43] = NlwRenamedSig_OI_dout_1[43], + dout_1[42] = NlwRenamedSig_OI_dout_1[42], + dout_1[41] = NlwRenamedSig_OI_dout_1[41], + dout_1[40] = NlwRenamedSig_OI_dout_1[40], + dout_1[39] = NlwRenamedSig_OI_dout_1[39], + dout_1[38] = NlwRenamedSig_OI_dout_1[38], + dout_1[37] = NlwRenamedSig_OI_dout_1[37], + dout_1[36] = NlwRenamedSig_OI_dout_1[36], + dout_1[35] = NlwRenamedSig_OI_dout_1[35], + dout_1[34] = NlwRenamedSig_OI_dout_1[34], + dout_1[33] = NlwRenamedSig_OI_dout_1[33], + dout_1[32] = NlwRenamedSig_OI_dout_1[32], + dout_1[31] = NlwRenamedSig_OI_dout_1[31], + dout_1[30] = NlwRenamedSig_OI_dout_1[30], + dout_1[29] = NlwRenamedSig_OI_dout_1[29], + dout_1[28] = NlwRenamedSig_OI_dout_1[28], + dout_1[27] = NlwRenamedSig_OI_dout_1[27], + dout_1[26] = NlwRenamedSig_OI_dout_1[26], + dout_1[25] = NlwRenamedSig_OI_dout_1[25], + dout_1[24] = NlwRenamedSig_OI_dout_1[24], + dout_1[23] = NlwRenamedSig_OI_dout_1[23], + dout_1[22] = NlwRenamedSig_OI_dout_1[22], + dout_1[21] = NlwRenamedSig_OI_dout_1[21], + dout_1[20] = NlwRenamedSig_OI_dout_1[20], + dout_1[19] = NlwRenamedSig_OI_dout_1[19], + dout_1[18] = NlwRenamedSig_OI_dout_1[18], + dout_1[17] = NlwRenamedSig_OI_dout_1[17], + dout_1[16] = NlwRenamedSig_OI_dout_1[16], + dout_1[15] = NlwRenamedSig_OI_dout_1[15], + dout_1[14] = NlwRenamedSig_OI_dout_1[14], + dout_1[13] = NlwRenamedSig_OI_dout_1[13], + dout_1[12] = NlwRenamedSig_OI_dout_1[12], + dout_1[11] = NlwRenamedSig_OI_dout_1[11], + dout_1[10] = NlwRenamedSig_OI_dout_1[10], + dout_1[9] = NlwRenamedSig_OI_dout_1[9], + dout_1[8] = NlwRenamedSig_OI_dout_1[8], + dout_1[7] = NlwRenamedSig_OI_dout_1[7], + dout_1[6] = NlwRenamedSig_OI_dout_1[6], + dout_1[5] = NlwRenamedSig_OI_dout_1[5], + dout_1[4] = NlwRenamedSig_OI_dout_1[4], + dout_1[3] = NlwRenamedSig_OI_dout_1[3], + dout_1[2] = NlwRenamedSig_OI_dout_1[2], + dout_1[1] = NlwRenamedSig_OI_dout_1[1], + dout_1[0] = NlwRenamedSig_OI_dout_1[0], + dout_2[46] = NlwRenamedSig_OI_dout_2[46], + dout_2[45] = NlwRenamedSig_OI_dout_2[45], + dout_2[44] = NlwRenamedSig_OI_dout_2[44], + dout_2[43] = NlwRenamedSig_OI_dout_2[43], + dout_2[42] = NlwRenamedSig_OI_dout_2[42], + dout_2[41] = NlwRenamedSig_OI_dout_2[41], + dout_2[40] = NlwRenamedSig_OI_dout_2[40], + dout_2[39] = NlwRenamedSig_OI_dout_2[39], + dout_2[38] = NlwRenamedSig_OI_dout_2[38], + dout_2[37] = NlwRenamedSig_OI_dout_2[37], + dout_2[36] = NlwRenamedSig_OI_dout_2[36], + dout_2[35] = NlwRenamedSig_OI_dout_2[35], + dout_2[34] = NlwRenamedSig_OI_dout_2[34], + dout_2[33] = NlwRenamedSig_OI_dout_2[33], + dout_2[32] = NlwRenamedSig_OI_dout_2[32], + dout_2[31] = NlwRenamedSig_OI_dout_2[31], + dout_2[30] = NlwRenamedSig_OI_dout_2[30], + dout_2[29] = NlwRenamedSig_OI_dout_2[29], + dout_2[28] = NlwRenamedSig_OI_dout_2[28], + dout_2[27] = NlwRenamedSig_OI_dout_2[27], + dout_2[26] = NlwRenamedSig_OI_dout_2[26], + dout_2[25] = NlwRenamedSig_OI_dout_2[25], + dout_2[24] = NlwRenamedSig_OI_dout_2[24], + dout_2[23] = NlwRenamedSig_OI_dout_2[23], + dout_2[22] = NlwRenamedSig_OI_dout_2[22], + dout_2[21] = NlwRenamedSig_OI_dout_2[21], + dout_2[20] = NlwRenamedSig_OI_dout_2[20], + dout_2[19] = NlwRenamedSig_OI_dout_2[19], + dout_2[18] = NlwRenamedSig_OI_dout_2[18], + dout_2[17] = NlwRenamedSig_OI_dout_2[17], + dout_2[16] = NlwRenamedSig_OI_dout_2[16], + dout_2[15] = NlwRenamedSig_OI_dout_2[15], + dout_2[14] = NlwRenamedSig_OI_dout_2[14], + dout_2[13] = NlwRenamedSig_OI_dout_2[13], + dout_2[12] = NlwRenamedSig_OI_dout_2[12], + dout_2[11] = NlwRenamedSig_OI_dout_2[11], + dout_2[10] = NlwRenamedSig_OI_dout_2[10], + dout_2[9] = NlwRenamedSig_OI_dout_2[9], + dout_2[8] = NlwRenamedSig_OI_dout_2[8], + dout_2[7] = NlwRenamedSig_OI_dout_2[7], + dout_2[6] = NlwRenamedSig_OI_dout_2[6], + dout_2[5] = NlwRenamedSig_OI_dout_2[5], + dout_2[4] = NlwRenamedSig_OI_dout_2[4], + dout_2[3] = NlwRenamedSig_OI_dout_2[3], + dout_2[2] = NlwRenamedSig_OI_dout_2[2], + dout_2[1] = NlwRenamedSig_OI_dout_2[1], + dout_2[0] = NlwRenamedSig_OI_dout_2[0], + din_1_1[23] = din_1[23], + din_1_1[22] = din_1[22], + din_1_1[21] = din_1[21], + din_1_1[20] = din_1[20], + din_1_1[19] = din_1[19], + din_1_1[18] = din_1[18], + din_1_1[17] = din_1[17], + din_1_1[16] = din_1[16], + din_1_1[15] = din_1[15], + din_1_1[14] = din_1[14], + din_1_1[13] = din_1[13], + din_1_1[12] = din_1[12], + din_1_1[11] = din_1[11], + din_1_1[10] = din_1[10], + din_1_1[9] = din_1[9], + din_1_1[8] = din_1[8], + din_1_1[7] = din_1[7], + din_1_1[6] = din_1[6], + din_1_1[5] = din_1[5], + din_1_1[4] = din_1[4], + din_1_1[3] = din_1[3], + din_1_1[2] = din_1[2], + din_1_1[1] = din_1[1], + din_1_1[0] = din_1[0], + din_2_2[23] = din_2[23], + din_2_2[22] = din_2[22], + din_2_2[21] = din_2[21], + din_2_2[20] = din_2[20], + din_2_2[19] = din_2[19], + din_2_2[18] = din_2[18], + din_2_2[17] = din_2[17], + din_2_2[16] = din_2[16], + din_2_2[15] = din_2[15], + din_2_2[14] = din_2[14], + din_2_2[13] = din_2[13], + din_2_2[12] = din_2[12], + din_2_2[11] = din_2[11], + din_2_2[10] = din_2[10], + din_2_2[9] = din_2[9], + din_2_2[8] = din_2[8], + din_2_2[7] = din_2[7], + din_2_2[6] = din_2[6], + din_2_2[5] = din_2[5], + din_2_2[4] = din_2[4], + din_2_2[3] = din_2[3], + din_2_2[2] = din_2[2], + din_2_2[1] = din_2[1], + din_2_2[0] = din_2[0], + coef_din_0[17] = coef_din[17], + coef_din_0[16] = coef_din[16], + coef_din_0[15] = coef_din[15], + coef_din_0[14] = coef_din[14], + coef_din_0[13] = coef_din[13], + coef_din_0[12] = coef_din[12], + coef_din_0[11] = coef_din[11], + coef_din_0[10] = coef_din[10], + coef_din_0[9] = coef_din[9], + coef_din_0[8] = coef_din[8], + coef_din_0[7] = coef_din[7], + coef_din_0[6] = coef_din[6], + coef_din_0[5] = coef_din[5], + coef_din_0[4] = coef_din[4], + coef_din_0[3] = coef_din[3], + coef_din_0[2] = coef_din[2], + coef_din_0[1] = coef_din[1], + coef_din_0[0] = coef_din[0]; + VCC blk00000001 ( + .P(NLW_blk00000001_P_UNCONNECTED) + ); + GND blk00000002 ( + .G(NLW_blk00000002_G_UNCONNECTED) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000783 ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig00000767 ), + .Q(\blk00000003/sig00000679 ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000782 ( + .A0(\blk00000003/sig00000049 ), + .A1(\blk00000003/sig00000049 ), + .A2(\blk00000003/sig000000ac ), + .A3(\blk00000003/sig00000049 ), + .CE(ce), + .CLK(clk), + .D(\blk00000003/sig000004f6 ), + .Q(\blk00000003/sig00000767 ), + .Q15(\NLW_blk00000003/blk00000782_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000781 ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig00000766 ), + .Q(\blk00000003/sig00000604 ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000780 ( + .A0(\blk00000003/sig000000ac ), + .A1(\blk00000003/sig00000049 ), + .A2(\blk00000003/sig000000ac ), + .A3(\blk00000003/sig00000049 ), + .CE(ce), + .CLK(clk), + .D(\blk00000003/sig000004f5 ), + .Q(\blk00000003/sig00000766 ), + .Q15(\NLW_blk00000003/blk00000780_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk0000077f ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig00000765 ), + .Q(\blk00000003/sig000001c2 ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk0000077e ( + .A0(\blk00000003/sig00000049 ), + .A1(\blk00000003/sig00000049 ), + .A2(\blk00000003/sig000000ac ), + .A3(\blk00000003/sig00000049 ), + .CE(ce), + .CLK(clk), + .D(\blk00000003/sig0000072f ), + .Q(\blk00000003/sig00000765 ), + .Q15(\NLW_blk00000003/blk0000077e_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk0000077d ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig00000764 ), + .Q(\blk00000003/sig000001c1 ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk0000077c ( + .A0(\blk00000003/sig00000049 ), + .A1(\blk00000003/sig00000049 ), + .A2(\blk00000003/sig000000ac ), + .A3(\blk00000003/sig00000049 ), + .CE(ce), + .CLK(clk), + .D(\blk00000003/sig00000733 ), + .Q(\blk00000003/sig00000764 ), + .Q15(\NLW_blk00000003/blk0000077c_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk0000077b ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig00000763 ), + .Q(\blk00000003/sig000001c0 ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk0000077a ( + .A0(\blk00000003/sig00000049 ), + .A1(\blk00000003/sig00000049 ), + .A2(\blk00000003/sig000000ac ), + .A3(\blk00000003/sig00000049 ), + .CE(ce), + .CLK(clk), + .D(\blk00000003/sig00000731 ), + .Q(\blk00000003/sig00000763 ), + .Q15(\NLW_blk00000003/blk0000077a_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000779 ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig00000762 ), + .Q(\blk00000003/sig000001bf ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000778 ( + .A0(\blk00000003/sig00000049 ), + .A1(\blk00000003/sig00000049 ), + .A2(\blk00000003/sig000000ac ), + .A3(\blk00000003/sig00000049 ), + .CE(ce), + .CLK(clk), + .D(\blk00000003/sig0000072d ), + .Q(\blk00000003/sig00000762 ), + .Q15(\NLW_blk00000003/blk00000778_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000777 ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig00000761 ), + .Q(\blk00000003/sig000001bd ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000776 ( + .A0(\blk00000003/sig00000049 ), + .A1(\blk00000003/sig00000049 ), + .A2(\blk00000003/sig000000ac ), + .A3(\blk00000003/sig00000049 ), + .CE(ce), + .CLK(clk), + .D(\blk00000003/sig00000725 ), + .Q(\blk00000003/sig00000761 ), + .Q15(\NLW_blk00000003/blk00000776_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000775 ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig00000760 ), + .Q(\blk00000003/sig000001bc ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000774 ( + .A0(\blk00000003/sig00000049 ), + .A1(\blk00000003/sig00000049 ), + .A2(\blk00000003/sig000000ac ), + .A3(\blk00000003/sig00000049 ), + .CE(ce), + .CLK(clk), + .D(\blk00000003/sig00000729 ), + .Q(\blk00000003/sig00000760 ), + .Q15(\NLW_blk00000003/blk00000774_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000773 ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig0000075f ), + .Q(\blk00000003/sig000001be ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000772 ( + .A0(\blk00000003/sig00000049 ), + .A1(\blk00000003/sig00000049 ), + .A2(\blk00000003/sig000000ac ), + .A3(\blk00000003/sig00000049 ), + .CE(ce), + .CLK(clk), + .D(\blk00000003/sig0000072b ), + .Q(\blk00000003/sig0000075f ), + .Q15(\NLW_blk00000003/blk00000772_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000771 ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig0000075e ), + .Q(\blk00000003/sig000001bb ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000770 ( + .A0(\blk00000003/sig00000049 ), + .A1(\blk00000003/sig00000049 ), + .A2(\blk00000003/sig000000ac ), + .A3(\blk00000003/sig00000049 ), + .CE(ce), + .CLK(clk), + .D(\blk00000003/sig00000727 ), + .Q(\blk00000003/sig0000075e ), + .Q15(\NLW_blk00000003/blk00000770_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk0000076f ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig0000075d ), + .Q(\blk00000003/sig000001ba ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk0000076e ( + .A0(\blk00000003/sig00000049 ), + .A1(\blk00000003/sig00000049 ), + .A2(\blk00000003/sig000000ac ), + .A3(\blk00000003/sig00000049 ), + .CE(ce), + .CLK(clk), + .D(\blk00000003/sig0000071f ), + .Q(\blk00000003/sig0000075d ), + .Q15(\NLW_blk00000003/blk0000076e_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk0000076d ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig0000075c ), + .Q(\blk00000003/sig000001b8 ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk0000076c ( + .A0(\blk00000003/sig00000049 ), + .A1(\blk00000003/sig00000049 ), + .A2(\blk00000003/sig000000ac ), + .A3(\blk00000003/sig00000049 ), + .CE(ce), + .CLK(clk), + .D(\blk00000003/sig00000721 ), + .Q(\blk00000003/sig0000075c ), + .Q15(\NLW_blk00000003/blk0000076c_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk0000076b ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig0000075b ), + .Q(\blk00000003/sig000001b7 ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk0000076a ( + .A0(\blk00000003/sig00000049 ), + .A1(\blk00000003/sig00000049 ), + .A2(\blk00000003/sig000000ac ), + .A3(\blk00000003/sig00000049 ), + .CE(ce), + .CLK(clk), + .D(\blk00000003/sig00000719 ), + .Q(\blk00000003/sig0000075b ), + .Q15(\NLW_blk00000003/blk0000076a_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000769 ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig0000075a ), + .Q(\blk00000003/sig000001b9 ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000768 ( + .A0(\blk00000003/sig00000049 ), + .A1(\blk00000003/sig00000049 ), + .A2(\blk00000003/sig000000ac ), + .A3(\blk00000003/sig00000049 ), + .CE(ce), + .CLK(clk), + .D(\blk00000003/sig00000723 ), + .Q(\blk00000003/sig0000075a ), + .Q15(\NLW_blk00000003/blk00000768_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000767 ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig00000759 ), + .Q(\blk00000003/sig000001b5 ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000766 ( + .A0(\blk00000003/sig00000049 ), + .A1(\blk00000003/sig00000049 ), + .A2(\blk00000003/sig000000ac ), + .A3(\blk00000003/sig00000049 ), + .CE(ce), + .CLK(clk), + .D(\blk00000003/sig0000071b ), + .Q(\blk00000003/sig00000759 ), + .Q15(\NLW_blk00000003/blk00000766_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000765 ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig00000758 ), + .Q(\blk00000003/sig000001b4 ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000764 ( + .A0(\blk00000003/sig00000049 ), + .A1(\blk00000003/sig00000049 ), + .A2(\blk00000003/sig000000ac ), + .A3(\blk00000003/sig00000049 ), + .CE(ce), + .CLK(clk), + .D(\blk00000003/sig00000717 ), + .Q(\blk00000003/sig00000758 ), + .Q15(\NLW_blk00000003/blk00000764_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000763 ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig00000757 ), + .Q(\blk00000003/sig000001b6 ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000762 ( + .A0(\blk00000003/sig00000049 ), + .A1(\blk00000003/sig00000049 ), + .A2(\blk00000003/sig000000ac ), + .A3(\blk00000003/sig00000049 ), + .CE(ce), + .CLK(clk), + .D(\blk00000003/sig0000071d ), + .Q(\blk00000003/sig00000757 ), + .Q15(\NLW_blk00000003/blk00000762_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000761 ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig00000756 ), + .Q(\blk00000003/sig000001b2 ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000760 ( + .A0(\blk00000003/sig00000049 ), + .A1(\blk00000003/sig00000049 ), + .A2(\blk00000003/sig000000ac ), + .A3(\blk00000003/sig00000049 ), + .CE(ce), + .CLK(clk), + .D(\blk00000003/sig0000070f ), + .Q(\blk00000003/sig00000756 ), + .Q15(\NLW_blk00000003/blk00000760_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk0000075f ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig00000755 ), + .Q(\blk00000003/sig000001b1 ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk0000075e ( + .A0(\blk00000003/sig00000049 ), + .A1(\blk00000003/sig00000049 ), + .A2(\blk00000003/sig000000ac ), + .A3(\blk00000003/sig00000049 ), + .CE(ce), + .CLK(clk), + .D(\blk00000003/sig00000713 ), + .Q(\blk00000003/sig00000755 ), + .Q15(\NLW_blk00000003/blk0000075e_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk0000075d ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig00000754 ), + .Q(\blk00000003/sig000001b3 ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk0000075c ( + .A0(\blk00000003/sig00000049 ), + .A1(\blk00000003/sig00000049 ), + .A2(\blk00000003/sig000000ac ), + .A3(\blk00000003/sig00000049 ), + .CE(ce), + .CLK(clk), + .D(\blk00000003/sig00000715 ), + .Q(\blk00000003/sig00000754 ), + .Q15(\NLW_blk00000003/blk0000075c_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk0000075b ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig00000753 ), + .Q(\blk00000003/sig000001b0 ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk0000075a ( + .A0(\blk00000003/sig00000049 ), + .A1(\blk00000003/sig00000049 ), + .A2(\blk00000003/sig000000ac ), + .A3(\blk00000003/sig00000049 ), + .CE(ce), + .CLK(clk), + .D(\blk00000003/sig00000711 ), + .Q(\blk00000003/sig00000753 ), + .Q15(\NLW_blk00000003/blk0000075a_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000759 ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig00000752 ), + .Q(\blk00000003/sig000001af ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000758 ( + .A0(\blk00000003/sig00000049 ), + .A1(\blk00000003/sig00000049 ), + .A2(\blk00000003/sig000000ac ), + .A3(\blk00000003/sig00000049 ), + .CE(ce), + .CLK(clk), + .D(\blk00000003/sig00000709 ), + .Q(\blk00000003/sig00000752 ), + .Q15(\NLW_blk00000003/blk00000758_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000757 ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig00000751 ), + .Q(\blk00000003/sig000001ad ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000756 ( + .A0(\blk00000003/sig00000049 ), + .A1(\blk00000003/sig00000049 ), + .A2(\blk00000003/sig000000ac ), + .A3(\blk00000003/sig00000049 ), + .CE(ce), + .CLK(clk), + .D(\blk00000003/sig0000070b ), + .Q(\blk00000003/sig00000751 ), + .Q15(\NLW_blk00000003/blk00000756_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000755 ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig00000750 ), + .Q(\blk00000003/sig000001ac ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000754 ( + .A0(\blk00000003/sig00000049 ), + .A1(\blk00000003/sig00000049 ), + .A2(\blk00000003/sig000000ac ), + .A3(\blk00000003/sig00000049 ), + .CE(ce), + .CLK(clk), + .D(\blk00000003/sig00000703 ), + .Q(\blk00000003/sig00000750 ), + .Q15(\NLW_blk00000003/blk00000754_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000753 ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig0000074f ), + .Q(\blk00000003/sig000001ae ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000752 ( + .A0(\blk00000003/sig00000049 ), + .A1(\blk00000003/sig00000049 ), + .A2(\blk00000003/sig000000ac ), + .A3(\blk00000003/sig00000049 ), + .CE(ce), + .CLK(clk), + .D(\blk00000003/sig0000070d ), + .Q(\blk00000003/sig0000074f ), + .Q15(\NLW_blk00000003/blk00000752_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000751 ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig0000074e ), + .Q(\blk00000003/sig0000014b ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000750 ( + .A0(\blk00000003/sig00000049 ), + .A1(\blk00000003/sig00000049 ), + .A2(\blk00000003/sig000000ac ), + .A3(\blk00000003/sig00000049 ), + .CE(ce), + .CLK(clk), + .D(\blk00000003/sig00000705 ), + .Q(\blk00000003/sig0000074e ), + .Q15(\NLW_blk00000003/blk00000750_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk0000074f ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig0000074d ), + .Q(\blk00000003/sig0000014a ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk0000074e ( + .A0(\blk00000003/sig00000049 ), + .A1(\blk00000003/sig00000049 ), + .A2(\blk00000003/sig000000ac ), + .A3(\blk00000003/sig00000049 ), + .CE(ce), + .CLK(clk), + .D(\blk00000003/sig00000701 ), + .Q(\blk00000003/sig0000074d ), + .Q15(\NLW_blk00000003/blk0000074e_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk0000074d ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig0000074c ), + .Q(\blk00000003/sig000001ab ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk0000074c ( + .A0(\blk00000003/sig00000049 ), + .A1(\blk00000003/sig00000049 ), + .A2(\blk00000003/sig000000ac ), + .A3(\blk00000003/sig00000049 ), + .CE(ce), + .CLK(clk), + .D(\blk00000003/sig00000707 ), + .Q(\blk00000003/sig0000074c ), + .Q15(\NLW_blk00000003/blk0000074c_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk0000074b ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig0000074b ), + .Q(\blk00000003/sig00000148 ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk0000074a ( + .A0(\blk00000003/sig00000049 ), + .A1(\blk00000003/sig00000049 ), + .A2(\blk00000003/sig000000ac ), + .A3(\blk00000003/sig00000049 ), + .CE(ce), + .CLK(clk), + .D(\blk00000003/sig000006f9 ), + .Q(\blk00000003/sig0000074b ), + .Q15(\NLW_blk00000003/blk0000074a_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000749 ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig0000074a ), + .Q(\blk00000003/sig00000147 ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000748 ( + .A0(\blk00000003/sig00000049 ), + .A1(\blk00000003/sig00000049 ), + .A2(\blk00000003/sig000000ac ), + .A3(\blk00000003/sig00000049 ), + .CE(ce), + .CLK(clk), + .D(\blk00000003/sig000006fd ), + .Q(\blk00000003/sig0000074a ), + .Q15(\NLW_blk00000003/blk00000748_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000747 ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig00000749 ), + .Q(\blk00000003/sig00000149 ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000746 ( + .A0(\blk00000003/sig00000049 ), + .A1(\blk00000003/sig00000049 ), + .A2(\blk00000003/sig000000ac ), + .A3(\blk00000003/sig00000049 ), + .CE(ce), + .CLK(clk), + .D(\blk00000003/sig000006ff ), + .Q(\blk00000003/sig00000749 ), + .Q15(\NLW_blk00000003/blk00000746_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000745 ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig00000748 ), + .Q(\blk00000003/sig00000146 ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000744 ( + .A0(\blk00000003/sig00000049 ), + .A1(\blk00000003/sig00000049 ), + .A2(\blk00000003/sig000000ac ), + .A3(\blk00000003/sig00000049 ), + .CE(ce), + .CLK(clk), + .D(\blk00000003/sig000006fb ), + .Q(\blk00000003/sig00000748 ), + .Q15(\NLW_blk00000003/blk00000744_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000743 ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig00000747 ), + .Q(\blk00000003/sig00000145 ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000742 ( + .A0(\blk00000003/sig00000049 ), + .A1(\blk00000003/sig00000049 ), + .A2(\blk00000003/sig000000ac ), + .A3(\blk00000003/sig00000049 ), + .CE(ce), + .CLK(clk), + .D(\blk00000003/sig000006f3 ), + .Q(\blk00000003/sig00000747 ), + .Q15(\NLW_blk00000003/blk00000742_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000741 ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig00000746 ), + .Q(\blk00000003/sig00000143 ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000740 ( + .A0(\blk00000003/sig00000049 ), + .A1(\blk00000003/sig00000049 ), + .A2(\blk00000003/sig000000ac ), + .A3(\blk00000003/sig00000049 ), + .CE(ce), + .CLK(clk), + .D(\blk00000003/sig000006f5 ), + .Q(\blk00000003/sig00000746 ), + .Q15(\NLW_blk00000003/blk00000740_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk0000073f ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig00000745 ), + .Q(\blk00000003/sig00000142 ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk0000073e ( + .A0(\blk00000003/sig00000049 ), + .A1(\blk00000003/sig00000049 ), + .A2(\blk00000003/sig000000ac ), + .A3(\blk00000003/sig00000049 ), + .CE(ce), + .CLK(clk), + .D(\blk00000003/sig000006ed ), + .Q(\blk00000003/sig00000745 ), + .Q15(\NLW_blk00000003/blk0000073e_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk0000073d ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig00000744 ), + .Q(\blk00000003/sig00000144 ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk0000073c ( + .A0(\blk00000003/sig00000049 ), + .A1(\blk00000003/sig00000049 ), + .A2(\blk00000003/sig000000ac ), + .A3(\blk00000003/sig00000049 ), + .CE(ce), + .CLK(clk), + .D(\blk00000003/sig000006f7 ), + .Q(\blk00000003/sig00000744 ), + .Q15(\NLW_blk00000003/blk0000073c_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk0000073b ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig00000743 ), + .Q(\blk00000003/sig00000140 ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk0000073a ( + .A0(\blk00000003/sig00000049 ), + .A1(\blk00000003/sig00000049 ), + .A2(\blk00000003/sig000000ac ), + .A3(\blk00000003/sig00000049 ), + .CE(ce), + .CLK(clk), + .D(\blk00000003/sig000006ef ), + .Q(\blk00000003/sig00000743 ), + .Q15(\NLW_blk00000003/blk0000073a_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000739 ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig00000742 ), + .Q(\blk00000003/sig0000013f ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000738 ( + .A0(\blk00000003/sig00000049 ), + .A1(\blk00000003/sig00000049 ), + .A2(\blk00000003/sig000000ac ), + .A3(\blk00000003/sig00000049 ), + .CE(ce), + .CLK(clk), + .D(\blk00000003/sig000006eb ), + .Q(\blk00000003/sig00000742 ), + .Q15(\NLW_blk00000003/blk00000738_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000737 ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig00000741 ), + .Q(\blk00000003/sig00000141 ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000736 ( + .A0(\blk00000003/sig00000049 ), + .A1(\blk00000003/sig00000049 ), + .A2(\blk00000003/sig000000ac ), + .A3(\blk00000003/sig00000049 ), + .CE(ce), + .CLK(clk), + .D(\blk00000003/sig000006f1 ), + .Q(\blk00000003/sig00000741 ), + .Q15(\NLW_blk00000003/blk00000736_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000735 ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig00000740 ), + .Q(\blk00000003/sig0000013d ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000734 ( + .A0(\blk00000003/sig00000049 ), + .A1(\blk00000003/sig00000049 ), + .A2(\blk00000003/sig000000ac ), + .A3(\blk00000003/sig00000049 ), + .CE(ce), + .CLK(clk), + .D(\blk00000003/sig000006e3 ), + .Q(\blk00000003/sig00000740 ), + .Q15(\NLW_blk00000003/blk00000734_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000733 ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig0000073f ), + .Q(\blk00000003/sig0000013c ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000732 ( + .A0(\blk00000003/sig00000049 ), + .A1(\blk00000003/sig00000049 ), + .A2(\blk00000003/sig000000ac ), + .A3(\blk00000003/sig00000049 ), + .CE(ce), + .CLK(clk), + .D(\blk00000003/sig000006e7 ), + .Q(\blk00000003/sig0000073f ), + .Q15(\NLW_blk00000003/blk00000732_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000731 ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig0000073e ), + .Q(\blk00000003/sig0000013e ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000730 ( + .A0(\blk00000003/sig00000049 ), + .A1(\blk00000003/sig00000049 ), + .A2(\blk00000003/sig000000ac ), + .A3(\blk00000003/sig00000049 ), + .CE(ce), + .CLK(clk), + .D(\blk00000003/sig000006e9 ), + .Q(\blk00000003/sig0000073e ), + .Q15(\NLW_blk00000003/blk00000730_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk0000072f ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig0000073d ), + .Q(\blk00000003/sig0000013b ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk0000072e ( + .A0(\blk00000003/sig00000049 ), + .A1(\blk00000003/sig00000049 ), + .A2(\blk00000003/sig000000ac ), + .A3(\blk00000003/sig00000049 ), + .CE(ce), + .CLK(clk), + .D(\blk00000003/sig000006e5 ), + .Q(\blk00000003/sig0000073d ), + .Q15(\NLW_blk00000003/blk0000072e_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk0000072d ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig0000073c ), + .Q(\blk00000003/sig0000013a ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk0000072c ( + .A0(\blk00000003/sig00000049 ), + .A1(\blk00000003/sig00000049 ), + .A2(\blk00000003/sig000000ac ), + .A3(\blk00000003/sig00000049 ), + .CE(ce), + .CLK(clk), + .D(\blk00000003/sig000006e1 ), + .Q(\blk00000003/sig0000073c ), + .Q15(\NLW_blk00000003/blk0000072c_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk0000072b ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig0000073b ), + .Q(\blk00000003/sig00000138 ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk0000072a ( + .A0(\blk00000003/sig00000049 ), + .A1(\blk00000003/sig00000049 ), + .A2(\blk00000003/sig000000ac ), + .A3(\blk00000003/sig00000049 ), + .CE(ce), + .CLK(clk), + .D(\blk00000003/sig000006d9 ), + .Q(\blk00000003/sig0000073b ), + .Q15(\NLW_blk00000003/blk0000072a_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000729 ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig0000073a ), + .Q(\blk00000003/sig00000137 ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000728 ( + .A0(\blk00000003/sig00000049 ), + .A1(\blk00000003/sig00000049 ), + .A2(\blk00000003/sig000000ac ), + .A3(\blk00000003/sig00000049 ), + .CE(ce), + .CLK(clk), + .D(\blk00000003/sig000006dd ), + .Q(\blk00000003/sig0000073a ), + .Q15(\NLW_blk00000003/blk00000728_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000727 ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig00000739 ), + .Q(\blk00000003/sig00000139 ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000726 ( + .A0(\blk00000003/sig00000049 ), + .A1(\blk00000003/sig00000049 ), + .A2(\blk00000003/sig000000ac ), + .A3(\blk00000003/sig00000049 ), + .CE(ce), + .CLK(clk), + .D(\blk00000003/sig000006df ), + .Q(\blk00000003/sig00000739 ), + .Q15(\NLW_blk00000003/blk00000726_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000725 ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig00000738 ), + .Q(\blk00000003/sig00000135 ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000724 ( + .A0(\blk00000003/sig00000049 ), + .A1(\blk00000003/sig00000049 ), + .A2(\blk00000003/sig000000ac ), + .A3(\blk00000003/sig00000049 ), + .CE(ce), + .CLK(clk), + .D(\blk00000003/sig000006d7 ), + .Q(\blk00000003/sig00000738 ), + .Q15(\NLW_blk00000003/blk00000724_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000723 ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig00000737 ), + .Q(\blk00000003/sig00000134 ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000722 ( + .A0(\blk00000003/sig00000049 ), + .A1(\blk00000003/sig00000049 ), + .A2(\blk00000003/sig000000ac ), + .A3(\blk00000003/sig00000049 ), + .CE(ce), + .CLK(clk), + .D(\blk00000003/sig000006d5 ), + .Q(\blk00000003/sig00000737 ), + .Q15(\NLW_blk00000003/blk00000722_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000721 ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig00000736 ), + .Q(\blk00000003/sig00000136 ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000720 ( + .A0(\blk00000003/sig00000049 ), + .A1(\blk00000003/sig00000049 ), + .A2(\blk00000003/sig000000ac ), + .A3(\blk00000003/sig00000049 ), + .CE(ce), + .CLK(clk), + .D(\blk00000003/sig000006db ), + .Q(\blk00000003/sig00000736 ), + .Q15(\NLW_blk00000003/blk00000720_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk0000071f ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig00000735 ), + .Q(\blk00000003/sig000004f6 ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk0000071e ( + .A0(\blk00000003/sig00000049 ), + .A1(\blk00000003/sig00000049 ), + .A2(\blk00000003/sig00000049 ), + .A3(\blk00000003/sig00000049 ), + .CE(ce), + .CLK(clk), + .D(\blk00000003/sig000001df ), + .Q(\blk00000003/sig00000735 ), + .Q15(\NLW_blk00000003/blk0000071e_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk0000071d ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig00000734 ), + .Q(\blk00000003/sig0000067a ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk0000071c ( + .A0(\blk00000003/sig000000ac ), + .A1(\blk00000003/sig00000049 ), + .A2(\blk00000003/sig00000049 ), + .A3(\blk00000003/sig000000ac ), + .CE(ce), + .CLK(clk), + .D(\blk00000003/sig000001c3 ), + .Q(\blk00000003/sig00000734 ), + .Q15(\NLW_blk00000003/blk0000071c_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk0000071b ( + .C(clk), + .CE(\blk00000003/sig00000683 ), + .D(\blk00000003/sig00000732 ), + .Q(\blk00000003/sig00000733 ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk0000071a ( + .A0(\blk00000003/sig00000049 ), + .A1(\blk00000003/sig000000ac ), + .A2(\blk00000003/sig00000049 ), + .A3(\blk00000003/sig000000ac ), + .CE(\blk00000003/sig00000683 ), + .CLK(clk), + .D(\blk00000003/sig00000216 ), + .Q(\blk00000003/sig00000732 ), + .Q15(\NLW_blk00000003/blk0000071a_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000719 ( + .C(clk), + .CE(\blk00000003/sig00000683 ), + .D(\blk00000003/sig00000730 ), + .Q(\blk00000003/sig00000731 ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000718 ( + .A0(\blk00000003/sig00000049 ), + .A1(\blk00000003/sig000000ac ), + .A2(\blk00000003/sig00000049 ), + .A3(\blk00000003/sig000000ac ), + .CE(\blk00000003/sig00000683 ), + .CLK(clk), + .D(\blk00000003/sig00000215 ), + .Q(\blk00000003/sig00000730 ), + .Q15(\NLW_blk00000003/blk00000718_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000717 ( + .C(clk), + .CE(\blk00000003/sig00000683 ), + .D(\blk00000003/sig0000072e ), + .Q(\blk00000003/sig0000072f ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000716 ( + .A0(\blk00000003/sig00000049 ), + .A1(\blk00000003/sig000000ac ), + .A2(\blk00000003/sig00000049 ), + .A3(\blk00000003/sig000000ac ), + .CE(\blk00000003/sig00000683 ), + .CLK(clk), + .D(\blk00000003/sig00000217 ), + .Q(\blk00000003/sig0000072e ), + .Q15(\NLW_blk00000003/blk00000716_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000715 ( + .C(clk), + .CE(\blk00000003/sig00000683 ), + .D(\blk00000003/sig0000072c ), + .Q(\blk00000003/sig0000072d ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000714 ( + .A0(\blk00000003/sig00000049 ), + .A1(\blk00000003/sig000000ac ), + .A2(\blk00000003/sig00000049 ), + .A3(\blk00000003/sig000000ac ), + .CE(\blk00000003/sig00000683 ), + .CLK(clk), + .D(\blk00000003/sig00000214 ), + .Q(\blk00000003/sig0000072c ), + .Q15(\NLW_blk00000003/blk00000714_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000713 ( + .C(clk), + .CE(\blk00000003/sig00000683 ), + .D(\blk00000003/sig0000072a ), + .Q(\blk00000003/sig0000072b ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000712 ( + .A0(\blk00000003/sig00000049 ), + .A1(\blk00000003/sig000000ac ), + .A2(\blk00000003/sig00000049 ), + .A3(\blk00000003/sig000000ac ), + .CE(\blk00000003/sig00000683 ), + .CLK(clk), + .D(\blk00000003/sig00000213 ), + .Q(\blk00000003/sig0000072a ), + .Q15(\NLW_blk00000003/blk00000712_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000711 ( + .C(clk), + .CE(\blk00000003/sig00000683 ), + .D(\blk00000003/sig00000728 ), + .Q(\blk00000003/sig00000729 ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000710 ( + .A0(\blk00000003/sig00000049 ), + .A1(\blk00000003/sig000000ac ), + .A2(\blk00000003/sig00000049 ), + .A3(\blk00000003/sig000000ac ), + .CE(\blk00000003/sig00000683 ), + .CLK(clk), + .D(\blk00000003/sig00000211 ), + .Q(\blk00000003/sig00000728 ), + .Q15(\NLW_blk00000003/blk00000710_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk0000070f ( + .C(clk), + .CE(\blk00000003/sig00000683 ), + .D(\blk00000003/sig00000726 ), + .Q(\blk00000003/sig00000727 ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk0000070e ( + .A0(\blk00000003/sig00000049 ), + .A1(\blk00000003/sig000000ac ), + .A2(\blk00000003/sig00000049 ), + .A3(\blk00000003/sig000000ac ), + .CE(\blk00000003/sig00000683 ), + .CLK(clk), + .D(\blk00000003/sig00000210 ), + .Q(\blk00000003/sig00000726 ), + .Q15(\NLW_blk00000003/blk0000070e_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk0000070d ( + .C(clk), + .CE(\blk00000003/sig00000683 ), + .D(\blk00000003/sig00000724 ), + .Q(\blk00000003/sig00000725 ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk0000070c ( + .A0(\blk00000003/sig00000049 ), + .A1(\blk00000003/sig000000ac ), + .A2(\blk00000003/sig00000049 ), + .A3(\blk00000003/sig000000ac ), + .CE(\blk00000003/sig00000683 ), + .CLK(clk), + .D(\blk00000003/sig00000212 ), + .Q(\blk00000003/sig00000724 ), + .Q15(\NLW_blk00000003/blk0000070c_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk0000070b ( + .C(clk), + .CE(\blk00000003/sig00000683 ), + .D(\blk00000003/sig00000722 ), + .Q(\blk00000003/sig00000723 ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk0000070a ( + .A0(\blk00000003/sig00000049 ), + .A1(\blk00000003/sig000000ac ), + .A2(\blk00000003/sig00000049 ), + .A3(\blk00000003/sig000000ac ), + .CE(\blk00000003/sig00000683 ), + .CLK(clk), + .D(\blk00000003/sig0000020e ), + .Q(\blk00000003/sig00000722 ), + .Q15(\NLW_blk00000003/blk0000070a_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000709 ( + .C(clk), + .CE(\blk00000003/sig00000683 ), + .D(\blk00000003/sig00000720 ), + .Q(\blk00000003/sig00000721 ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000708 ( + .A0(\blk00000003/sig00000049 ), + .A1(\blk00000003/sig000000ac ), + .A2(\blk00000003/sig00000049 ), + .A3(\blk00000003/sig000000ac ), + .CE(\blk00000003/sig00000683 ), + .CLK(clk), + .D(\blk00000003/sig0000020d ), + .Q(\blk00000003/sig00000720 ), + .Q15(\NLW_blk00000003/blk00000708_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000707 ( + .C(clk), + .CE(\blk00000003/sig00000683 ), + .D(\blk00000003/sig0000071e ), + .Q(\blk00000003/sig0000071f ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000706 ( + .A0(\blk00000003/sig00000049 ), + .A1(\blk00000003/sig000000ac ), + .A2(\blk00000003/sig00000049 ), + .A3(\blk00000003/sig000000ac ), + .CE(\blk00000003/sig00000683 ), + .CLK(clk), + .D(\blk00000003/sig0000020f ), + .Q(\blk00000003/sig0000071e ), + .Q15(\NLW_blk00000003/blk00000706_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000705 ( + .C(clk), + .CE(\blk00000003/sig00000683 ), + .D(\blk00000003/sig0000071c ), + .Q(\blk00000003/sig0000071d ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000704 ( + .A0(\blk00000003/sig00000049 ), + .A1(\blk00000003/sig000000ac ), + .A2(\blk00000003/sig00000049 ), + .A3(\blk00000003/sig000000ac ), + .CE(\blk00000003/sig00000683 ), + .CLK(clk), + .D(\blk00000003/sig0000020b ), + .Q(\blk00000003/sig0000071c ), + .Q15(\NLW_blk00000003/blk00000704_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000703 ( + .C(clk), + .CE(\blk00000003/sig00000683 ), + .D(\blk00000003/sig0000071a ), + .Q(\blk00000003/sig0000071b ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000702 ( + .A0(\blk00000003/sig00000049 ), + .A1(\blk00000003/sig000000ac ), + .A2(\blk00000003/sig00000049 ), + .A3(\blk00000003/sig000000ac ), + .CE(\blk00000003/sig00000683 ), + .CLK(clk), + .D(\blk00000003/sig0000020a ), + .Q(\blk00000003/sig0000071a ), + .Q15(\NLW_blk00000003/blk00000702_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000701 ( + .C(clk), + .CE(\blk00000003/sig00000683 ), + .D(\blk00000003/sig00000718 ), + .Q(\blk00000003/sig00000719 ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000700 ( + .A0(\blk00000003/sig00000049 ), + .A1(\blk00000003/sig000000ac ), + .A2(\blk00000003/sig00000049 ), + .A3(\blk00000003/sig000000ac ), + .CE(\blk00000003/sig00000683 ), + .CLK(clk), + .D(\blk00000003/sig0000020c ), + .Q(\blk00000003/sig00000718 ), + .Q15(\NLW_blk00000003/blk00000700_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000006ff ( + .C(clk), + .CE(\blk00000003/sig00000683 ), + .D(\blk00000003/sig00000716 ), + .Q(\blk00000003/sig00000717 ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk000006fe ( + .A0(\blk00000003/sig00000049 ), + .A1(\blk00000003/sig000000ac ), + .A2(\blk00000003/sig00000049 ), + .A3(\blk00000003/sig000000ac ), + .CE(\blk00000003/sig00000683 ), + .CLK(clk), + .D(\blk00000003/sig00000209 ), + .Q(\blk00000003/sig00000716 ), + .Q15(\NLW_blk00000003/blk000006fe_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000006fd ( + .C(clk), + .CE(\blk00000003/sig00000683 ), + .D(\blk00000003/sig00000714 ), + .Q(\blk00000003/sig00000715 ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk000006fc ( + .A0(\blk00000003/sig00000049 ), + .A1(\blk00000003/sig000000ac ), + .A2(\blk00000003/sig00000049 ), + .A3(\blk00000003/sig000000ac ), + .CE(\blk00000003/sig00000683 ), + .CLK(clk), + .D(\blk00000003/sig00000208 ), + .Q(\blk00000003/sig00000714 ), + .Q15(\NLW_blk00000003/blk000006fc_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000006fb ( + .C(clk), + .CE(\blk00000003/sig00000683 ), + .D(\blk00000003/sig00000712 ), + .Q(\blk00000003/sig00000713 ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk000006fa ( + .A0(\blk00000003/sig00000049 ), + .A1(\blk00000003/sig000000ac ), + .A2(\blk00000003/sig00000049 ), + .A3(\blk00000003/sig000000ac ), + .CE(\blk00000003/sig00000683 ), + .CLK(clk), + .D(\blk00000003/sig00000206 ), + .Q(\blk00000003/sig00000712 ), + .Q15(\NLW_blk00000003/blk000006fa_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000006f9 ( + .C(clk), + .CE(\blk00000003/sig00000683 ), + .D(\blk00000003/sig00000710 ), + .Q(\blk00000003/sig00000711 ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk000006f8 ( + .A0(\blk00000003/sig00000049 ), + .A1(\blk00000003/sig000000ac ), + .A2(\blk00000003/sig00000049 ), + .A3(\blk00000003/sig000000ac ), + .CE(\blk00000003/sig00000683 ), + .CLK(clk), + .D(\blk00000003/sig00000205 ), + .Q(\blk00000003/sig00000710 ), + .Q15(\NLW_blk00000003/blk000006f8_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000006f7 ( + .C(clk), + .CE(\blk00000003/sig00000683 ), + .D(\blk00000003/sig0000070e ), + .Q(\blk00000003/sig0000070f ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk000006f6 ( + .A0(\blk00000003/sig00000049 ), + .A1(\blk00000003/sig000000ac ), + .A2(\blk00000003/sig00000049 ), + .A3(\blk00000003/sig000000ac ), + .CE(\blk00000003/sig00000683 ), + .CLK(clk), + .D(\blk00000003/sig00000207 ), + .Q(\blk00000003/sig0000070e ), + .Q15(\NLW_blk00000003/blk000006f6_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000006f5 ( + .C(clk), + .CE(\blk00000003/sig00000683 ), + .D(\blk00000003/sig0000070c ), + .Q(\blk00000003/sig0000070d ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk000006f4 ( + .A0(\blk00000003/sig00000049 ), + .A1(\blk00000003/sig000000ac ), + .A2(\blk00000003/sig00000049 ), + .A3(\blk00000003/sig000000ac ), + .CE(\blk00000003/sig00000683 ), + .CLK(clk), + .D(\blk00000003/sig00000203 ), + .Q(\blk00000003/sig0000070c ), + .Q15(\NLW_blk00000003/blk000006f4_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000006f3 ( + .C(clk), + .CE(\blk00000003/sig00000683 ), + .D(\blk00000003/sig0000070a ), + .Q(\blk00000003/sig0000070b ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk000006f2 ( + .A0(\blk00000003/sig00000049 ), + .A1(\blk00000003/sig000000ac ), + .A2(\blk00000003/sig00000049 ), + .A3(\blk00000003/sig000000ac ), + .CE(\blk00000003/sig00000683 ), + .CLK(clk), + .D(\blk00000003/sig00000202 ), + .Q(\blk00000003/sig0000070a ), + .Q15(\NLW_blk00000003/blk000006f2_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000006f1 ( + .C(clk), + .CE(\blk00000003/sig00000683 ), + .D(\blk00000003/sig00000708 ), + .Q(\blk00000003/sig00000709 ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk000006f0 ( + .A0(\blk00000003/sig00000049 ), + .A1(\blk00000003/sig000000ac ), + .A2(\blk00000003/sig00000049 ), + .A3(\blk00000003/sig000000ac ), + .CE(\blk00000003/sig00000683 ), + .CLK(clk), + .D(\blk00000003/sig00000204 ), + .Q(\blk00000003/sig00000708 ), + .Q15(\NLW_blk00000003/blk000006f0_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000006ef ( + .C(clk), + .CE(\blk00000003/sig00000683 ), + .D(\blk00000003/sig00000706 ), + .Q(\blk00000003/sig00000707 ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk000006ee ( + .A0(\blk00000003/sig00000049 ), + .A1(\blk00000003/sig000000ac ), + .A2(\blk00000003/sig00000049 ), + .A3(\blk00000003/sig000000ac ), + .CE(\blk00000003/sig00000683 ), + .CLK(clk), + .D(\blk00000003/sig00000200 ), + .Q(\blk00000003/sig00000706 ), + .Q15(\NLW_blk00000003/blk000006ee_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000006ed ( + .C(clk), + .CE(\blk00000003/sig00000683 ), + .D(\blk00000003/sig00000704 ), + .Q(\blk00000003/sig00000705 ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk000006ec ( + .A0(\blk00000003/sig00000049 ), + .A1(\blk00000003/sig000000ac ), + .A2(\blk00000003/sig00000049 ), + .A3(\blk00000003/sig000000ac ), + .CE(\blk00000003/sig00000683 ), + .CLK(clk), + .D(\blk00000003/sig000001ff ), + .Q(\blk00000003/sig00000704 ), + .Q15(\NLW_blk00000003/blk000006ec_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000006eb ( + .C(clk), + .CE(\blk00000003/sig00000683 ), + .D(\blk00000003/sig00000702 ), + .Q(\blk00000003/sig00000703 ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk000006ea ( + .A0(\blk00000003/sig00000049 ), + .A1(\blk00000003/sig000000ac ), + .A2(\blk00000003/sig00000049 ), + .A3(\blk00000003/sig000000ac ), + .CE(\blk00000003/sig00000683 ), + .CLK(clk), + .D(\blk00000003/sig00000201 ), + .Q(\blk00000003/sig00000702 ), + .Q15(\NLW_blk00000003/blk000006ea_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000006e9 ( + .C(clk), + .CE(\blk00000003/sig00000683 ), + .D(\blk00000003/sig00000700 ), + .Q(\blk00000003/sig00000701 ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk000006e8 ( + .A0(\blk00000003/sig00000049 ), + .A1(\blk00000003/sig000000ac ), + .A2(\blk00000003/sig00000049 ), + .A3(\blk00000003/sig000000ac ), + .CE(\blk00000003/sig00000683 ), + .CLK(clk), + .D(\blk00000003/sig000001fe ), + .Q(\blk00000003/sig00000700 ), + .Q15(\NLW_blk00000003/blk000006e8_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000006e7 ( + .C(clk), + .CE(\blk00000003/sig00000683 ), + .D(\blk00000003/sig000006fe ), + .Q(\blk00000003/sig000006ff ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk000006e6 ( + .A0(\blk00000003/sig00000049 ), + .A1(\blk00000003/sig000000ac ), + .A2(\blk00000003/sig00000049 ), + .A3(\blk00000003/sig000000ac ), + .CE(\blk00000003/sig00000683 ), + .CLK(clk), + .D(\blk00000003/sig000001fd ), + .Q(\blk00000003/sig000006fe ), + .Q15(\NLW_blk00000003/blk000006e6_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000006e5 ( + .C(clk), + .CE(\blk00000003/sig00000683 ), + .D(\blk00000003/sig000006fc ), + .Q(\blk00000003/sig000006fd ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk000006e4 ( + .A0(\blk00000003/sig00000049 ), + .A1(\blk00000003/sig000000ac ), + .A2(\blk00000003/sig00000049 ), + .A3(\blk00000003/sig000000ac ), + .CE(\blk00000003/sig00000683 ), + .CLK(clk), + .D(\blk00000003/sig000001fb ), + .Q(\blk00000003/sig000006fc ), + .Q15(\NLW_blk00000003/blk000006e4_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000006e3 ( + .C(clk), + .CE(\blk00000003/sig00000683 ), + .D(\blk00000003/sig000006fa ), + .Q(\blk00000003/sig000006fb ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk000006e2 ( + .A0(\blk00000003/sig00000049 ), + .A1(\blk00000003/sig000000ac ), + .A2(\blk00000003/sig00000049 ), + .A3(\blk00000003/sig000000ac ), + .CE(\blk00000003/sig00000683 ), + .CLK(clk), + .D(\blk00000003/sig000001fa ), + .Q(\blk00000003/sig000006fa ), + .Q15(\NLW_blk00000003/blk000006e2_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000006e1 ( + .C(clk), + .CE(\blk00000003/sig00000683 ), + .D(\blk00000003/sig000006f8 ), + .Q(\blk00000003/sig000006f9 ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk000006e0 ( + .A0(\blk00000003/sig00000049 ), + .A1(\blk00000003/sig000000ac ), + .A2(\blk00000003/sig00000049 ), + .A3(\blk00000003/sig000000ac ), + .CE(\blk00000003/sig00000683 ), + .CLK(clk), + .D(\blk00000003/sig000001fc ), + .Q(\blk00000003/sig000006f8 ), + .Q15(\NLW_blk00000003/blk000006e0_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000006df ( + .C(clk), + .CE(\blk00000003/sig00000683 ), + .D(\blk00000003/sig000006f6 ), + .Q(\blk00000003/sig000006f7 ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk000006de ( + .A0(\blk00000003/sig00000049 ), + .A1(\blk00000003/sig000000ac ), + .A2(\blk00000003/sig00000049 ), + .A3(\blk00000003/sig000000ac ), + .CE(\blk00000003/sig00000683 ), + .CLK(clk), + .D(\blk00000003/sig000001f8 ), + .Q(\blk00000003/sig000006f6 ), + .Q15(\NLW_blk00000003/blk000006de_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000006dd ( + .C(clk), + .CE(\blk00000003/sig00000683 ), + .D(\blk00000003/sig000006f4 ), + .Q(\blk00000003/sig000006f5 ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk000006dc ( + .A0(\blk00000003/sig00000049 ), + .A1(\blk00000003/sig000000ac ), + .A2(\blk00000003/sig00000049 ), + .A3(\blk00000003/sig000000ac ), + .CE(\blk00000003/sig00000683 ), + .CLK(clk), + .D(\blk00000003/sig000001f7 ), + .Q(\blk00000003/sig000006f4 ), + .Q15(\NLW_blk00000003/blk000006dc_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000006db ( + .C(clk), + .CE(\blk00000003/sig00000683 ), + .D(\blk00000003/sig000006f2 ), + .Q(\blk00000003/sig000006f3 ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk000006da ( + .A0(\blk00000003/sig00000049 ), + .A1(\blk00000003/sig000000ac ), + .A2(\blk00000003/sig00000049 ), + .A3(\blk00000003/sig000000ac ), + .CE(\blk00000003/sig00000683 ), + .CLK(clk), + .D(\blk00000003/sig000001f9 ), + .Q(\blk00000003/sig000006f2 ), + .Q15(\NLW_blk00000003/blk000006da_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000006d9 ( + .C(clk), + .CE(\blk00000003/sig00000683 ), + .D(\blk00000003/sig000006f0 ), + .Q(\blk00000003/sig000006f1 ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk000006d8 ( + .A0(\blk00000003/sig00000049 ), + .A1(\blk00000003/sig000000ac ), + .A2(\blk00000003/sig00000049 ), + .A3(\blk00000003/sig000000ac ), + .CE(\blk00000003/sig00000683 ), + .CLK(clk), + .D(\blk00000003/sig000001f5 ), + .Q(\blk00000003/sig000006f0 ), + .Q15(\NLW_blk00000003/blk000006d8_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000006d7 ( + .C(clk), + .CE(\blk00000003/sig00000683 ), + .D(\blk00000003/sig000006ee ), + .Q(\blk00000003/sig000006ef ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk000006d6 ( + .A0(\blk00000003/sig00000049 ), + .A1(\blk00000003/sig000000ac ), + .A2(\blk00000003/sig00000049 ), + .A3(\blk00000003/sig000000ac ), + .CE(\blk00000003/sig00000683 ), + .CLK(clk), + .D(\blk00000003/sig000001f4 ), + .Q(\blk00000003/sig000006ee ), + .Q15(\NLW_blk00000003/blk000006d6_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000006d5 ( + .C(clk), + .CE(\blk00000003/sig00000683 ), + .D(\blk00000003/sig000006ec ), + .Q(\blk00000003/sig000006ed ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk000006d4 ( + .A0(\blk00000003/sig00000049 ), + .A1(\blk00000003/sig000000ac ), + .A2(\blk00000003/sig00000049 ), + .A3(\blk00000003/sig000000ac ), + .CE(\blk00000003/sig00000683 ), + .CLK(clk), + .D(\blk00000003/sig000001f6 ), + .Q(\blk00000003/sig000006ec ), + .Q15(\NLW_blk00000003/blk000006d4_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000006d3 ( + .C(clk), + .CE(\blk00000003/sig00000683 ), + .D(\blk00000003/sig000006ea ), + .Q(\blk00000003/sig000006eb ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk000006d2 ( + .A0(\blk00000003/sig00000049 ), + .A1(\blk00000003/sig000000ac ), + .A2(\blk00000003/sig00000049 ), + .A3(\blk00000003/sig000000ac ), + .CE(\blk00000003/sig00000683 ), + .CLK(clk), + .D(\blk00000003/sig000001f3 ), + .Q(\blk00000003/sig000006ea ), + .Q15(\NLW_blk00000003/blk000006d2_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000006d1 ( + .C(clk), + .CE(\blk00000003/sig00000683 ), + .D(\blk00000003/sig000006e8 ), + .Q(\blk00000003/sig000006e9 ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk000006d0 ( + .A0(\blk00000003/sig00000049 ), + .A1(\blk00000003/sig000000ac ), + .A2(\blk00000003/sig00000049 ), + .A3(\blk00000003/sig000000ac ), + .CE(\blk00000003/sig00000683 ), + .CLK(clk), + .D(\blk00000003/sig000001f2 ), + .Q(\blk00000003/sig000006e8 ), + .Q15(\NLW_blk00000003/blk000006d0_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000006cf ( + .C(clk), + .CE(\blk00000003/sig00000683 ), + .D(\blk00000003/sig000006e6 ), + .Q(\blk00000003/sig000006e7 ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk000006ce ( + .A0(\blk00000003/sig00000049 ), + .A1(\blk00000003/sig000000ac ), + .A2(\blk00000003/sig00000049 ), + .A3(\blk00000003/sig000000ac ), + .CE(\blk00000003/sig00000683 ), + .CLK(clk), + .D(\blk00000003/sig000001f0 ), + .Q(\blk00000003/sig000006e6 ), + .Q15(\NLW_blk00000003/blk000006ce_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000006cd ( + .C(clk), + .CE(\blk00000003/sig00000683 ), + .D(\blk00000003/sig000006e4 ), + .Q(\blk00000003/sig000006e5 ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk000006cc ( + .A0(\blk00000003/sig00000049 ), + .A1(\blk00000003/sig000000ac ), + .A2(\blk00000003/sig00000049 ), + .A3(\blk00000003/sig000000ac ), + .CE(\blk00000003/sig00000683 ), + .CLK(clk), + .D(\blk00000003/sig000001ef ), + .Q(\blk00000003/sig000006e4 ), + .Q15(\NLW_blk00000003/blk000006cc_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000006cb ( + .C(clk), + .CE(\blk00000003/sig00000683 ), + .D(\blk00000003/sig000006e2 ), + .Q(\blk00000003/sig000006e3 ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk000006ca ( + .A0(\blk00000003/sig00000049 ), + .A1(\blk00000003/sig000000ac ), + .A2(\blk00000003/sig00000049 ), + .A3(\blk00000003/sig000000ac ), + .CE(\blk00000003/sig00000683 ), + .CLK(clk), + .D(\blk00000003/sig000001f1 ), + .Q(\blk00000003/sig000006e2 ), + .Q15(\NLW_blk00000003/blk000006ca_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000006c9 ( + .C(clk), + .CE(\blk00000003/sig00000683 ), + .D(\blk00000003/sig000006e0 ), + .Q(\blk00000003/sig000006e1 ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk000006c8 ( + .A0(\blk00000003/sig00000049 ), + .A1(\blk00000003/sig000000ac ), + .A2(\blk00000003/sig00000049 ), + .A3(\blk00000003/sig000000ac ), + .CE(\blk00000003/sig00000683 ), + .CLK(clk), + .D(\blk00000003/sig000001ee ), + .Q(\blk00000003/sig000006e0 ), + .Q15(\NLW_blk00000003/blk000006c8_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000006c7 ( + .C(clk), + .CE(\blk00000003/sig00000683 ), + .D(\blk00000003/sig000006de ), + .Q(\blk00000003/sig000006df ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk000006c6 ( + .A0(\blk00000003/sig00000049 ), + .A1(\blk00000003/sig000000ac ), + .A2(\blk00000003/sig00000049 ), + .A3(\blk00000003/sig000000ac ), + .CE(\blk00000003/sig00000683 ), + .CLK(clk), + .D(\blk00000003/sig000001ed ), + .Q(\blk00000003/sig000006de ), + .Q15(\NLW_blk00000003/blk000006c6_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000006c5 ( + .C(clk), + .CE(\blk00000003/sig00000683 ), + .D(\blk00000003/sig000006dc ), + .Q(\blk00000003/sig000006dd ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk000006c4 ( + .A0(\blk00000003/sig00000049 ), + .A1(\blk00000003/sig000000ac ), + .A2(\blk00000003/sig00000049 ), + .A3(\blk00000003/sig000000ac ), + .CE(\blk00000003/sig00000683 ), + .CLK(clk), + .D(\blk00000003/sig000001eb ), + .Q(\blk00000003/sig000006dc ), + .Q15(\NLW_blk00000003/blk000006c4_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000006c3 ( + .C(clk), + .CE(\blk00000003/sig00000683 ), + .D(\blk00000003/sig000006da ), + .Q(\blk00000003/sig000006db ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk000006c2 ( + .A0(\blk00000003/sig00000049 ), + .A1(\blk00000003/sig000000ac ), + .A2(\blk00000003/sig00000049 ), + .A3(\blk00000003/sig000000ac ), + .CE(\blk00000003/sig00000683 ), + .CLK(clk), + .D(\blk00000003/sig000001ea ), + .Q(\blk00000003/sig000006da ), + .Q15(\NLW_blk00000003/blk000006c2_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000006c1 ( + .C(clk), + .CE(\blk00000003/sig00000683 ), + .D(\blk00000003/sig000006d8 ), + .Q(\blk00000003/sig000006d9 ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk000006c0 ( + .A0(\blk00000003/sig00000049 ), + .A1(\blk00000003/sig000000ac ), + .A2(\blk00000003/sig00000049 ), + .A3(\blk00000003/sig000000ac ), + .CE(\blk00000003/sig00000683 ), + .CLK(clk), + .D(\blk00000003/sig000001ec ), + .Q(\blk00000003/sig000006d8 ), + .Q15(\NLW_blk00000003/blk000006c0_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000006bf ( + .C(clk), + .CE(\blk00000003/sig00000683 ), + .D(\blk00000003/sig000006d6 ), + .Q(\blk00000003/sig000006d7 ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk000006be ( + .A0(\blk00000003/sig00000049 ), + .A1(\blk00000003/sig000000ac ), + .A2(\blk00000003/sig00000049 ), + .A3(\blk00000003/sig000000ac ), + .CE(\blk00000003/sig00000683 ), + .CLK(clk), + .D(\blk00000003/sig000001e9 ), + .Q(\blk00000003/sig000006d6 ), + .Q15(\NLW_blk00000003/blk000006be_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000006bd ( + .C(clk), + .CE(\blk00000003/sig00000683 ), + .D(\blk00000003/sig000006d4 ), + .Q(\blk00000003/sig000006d5 ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk000006bc ( + .A0(\blk00000003/sig00000049 ), + .A1(\blk00000003/sig000000ac ), + .A2(\blk00000003/sig00000049 ), + .A3(\blk00000003/sig000000ac ), + .CE(\blk00000003/sig00000683 ), + .CLK(clk), + .D(\blk00000003/sig000001e8 ), + .Q(\blk00000003/sig000006d4 ), + .Q15(\NLW_blk00000003/blk000006bc_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000006bb ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig000006d3 ), + .Q(\blk00000003/sig00000682 ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk000006ba ( + .A0(\blk00000003/sig00000049 ), + .A1(\blk00000003/sig00000049 ), + .A2(\blk00000003/sig00000049 ), + .A3(\blk00000003/sig00000049 ), + .CE(ce), + .CLK(clk), + .D(\blk00000003/sig000004e5 ), + .Q(\blk00000003/sig000006d3 ), + .Q15(\NLW_blk00000003/blk000006ba_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000006b9 ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig000006d2 ), + .Q(\blk00000003/sig0000056e ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk000006b8 ( + .A0(\blk00000003/sig000000ac ), + .A1(\blk00000003/sig00000049 ), + .A2(\blk00000003/sig00000049 ), + .A3(\blk00000003/sig00000049 ), + .CE(ce), + .CLK(clk), + .D(\blk00000003/sig00000217 ), + .Q(\blk00000003/sig000006d2 ), + .Q15(\NLW_blk00000003/blk000006b8_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000006b7 ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig000006d1 ), + .Q(\blk00000003/sig00000681 ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk000006b6 ( + .A0(\blk00000003/sig00000049 ), + .A1(\blk00000003/sig00000049 ), + .A2(\blk00000003/sig00000049 ), + .A3(\blk00000003/sig00000049 ), + .CE(ce), + .CLK(clk), + .D(\blk00000003/sig000004e6 ), + .Q(\blk00000003/sig000006d1 ), + .Q15(\NLW_blk00000003/blk000006b6_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000006b5 ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig000006d0 ), + .Q(\blk00000003/sig0000056c ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk000006b4 ( + .A0(\blk00000003/sig000000ac ), + .A1(\blk00000003/sig00000049 ), + .A2(\blk00000003/sig00000049 ), + .A3(\blk00000003/sig00000049 ), + .CE(ce), + .CLK(clk), + .D(\blk00000003/sig00000215 ), + .Q(\blk00000003/sig000006d0 ), + .Q15(\NLW_blk00000003/blk000006b4_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000006b3 ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig000006cf ), + .Q(\blk00000003/sig0000056b ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk000006b2 ( + .A0(\blk00000003/sig000000ac ), + .A1(\blk00000003/sig00000049 ), + .A2(\blk00000003/sig00000049 ), + .A3(\blk00000003/sig00000049 ), + .CE(ce), + .CLK(clk), + .D(\blk00000003/sig00000214 ), + .Q(\blk00000003/sig000006cf ), + .Q15(\NLW_blk00000003/blk000006b2_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000006b1 ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig000006ce ), + .Q(\blk00000003/sig0000056d ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk000006b0 ( + .A0(\blk00000003/sig000000ac ), + .A1(\blk00000003/sig00000049 ), + .A2(\blk00000003/sig00000049 ), + .A3(\blk00000003/sig00000049 ), + .CE(ce), + .CLK(clk), + .D(\blk00000003/sig00000216 ), + .Q(\blk00000003/sig000006ce ), + .Q15(\NLW_blk00000003/blk000006b0_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000006af ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig000006cd ), + .Q(\blk00000003/sig00000569 ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk000006ae ( + .A0(\blk00000003/sig000000ac ), + .A1(\blk00000003/sig00000049 ), + .A2(\blk00000003/sig00000049 ), + .A3(\blk00000003/sig00000049 ), + .CE(ce), + .CLK(clk), + .D(\blk00000003/sig00000212 ), + .Q(\blk00000003/sig000006cd ), + .Q15(\NLW_blk00000003/blk000006ae_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000006ad ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig000006cc ), + .Q(\blk00000003/sig00000568 ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk000006ac ( + .A0(\blk00000003/sig000000ac ), + .A1(\blk00000003/sig00000049 ), + .A2(\blk00000003/sig00000049 ), + .A3(\blk00000003/sig00000049 ), + .CE(ce), + .CLK(clk), + .D(\blk00000003/sig00000211 ), + .Q(\blk00000003/sig000006cc ), + .Q15(\NLW_blk00000003/blk000006ac_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000006ab ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig000006cb ), + .Q(\blk00000003/sig0000056a ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk000006aa ( + .A0(\blk00000003/sig000000ac ), + .A1(\blk00000003/sig00000049 ), + .A2(\blk00000003/sig00000049 ), + .A3(\blk00000003/sig00000049 ), + .CE(ce), + .CLK(clk), + .D(\blk00000003/sig00000213 ), + .Q(\blk00000003/sig000006cb ), + .Q15(\NLW_blk00000003/blk000006aa_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000006a9 ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig000006ca ), + .Q(\blk00000003/sig00000567 ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk000006a8 ( + .A0(\blk00000003/sig000000ac ), + .A1(\blk00000003/sig00000049 ), + .A2(\blk00000003/sig00000049 ), + .A3(\blk00000003/sig00000049 ), + .CE(ce), + .CLK(clk), + .D(\blk00000003/sig00000210 ), + .Q(\blk00000003/sig000006ca ), + .Q15(\NLW_blk00000003/blk000006a8_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000006a7 ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig000006c9 ), + .Q(\blk00000003/sig00000566 ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk000006a6 ( + .A0(\blk00000003/sig000000ac ), + .A1(\blk00000003/sig00000049 ), + .A2(\blk00000003/sig00000049 ), + .A3(\blk00000003/sig00000049 ), + .CE(ce), + .CLK(clk), + .D(\blk00000003/sig0000020f ), + .Q(\blk00000003/sig000006c9 ), + .Q15(\NLW_blk00000003/blk000006a6_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000006a5 ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig000006c8 ), + .Q(\blk00000003/sig00000564 ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk000006a4 ( + .A0(\blk00000003/sig000000ac ), + .A1(\blk00000003/sig00000049 ), + .A2(\blk00000003/sig00000049 ), + .A3(\blk00000003/sig00000049 ), + .CE(ce), + .CLK(clk), + .D(\blk00000003/sig0000020d ), + .Q(\blk00000003/sig000006c8 ), + .Q15(\NLW_blk00000003/blk000006a4_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000006a3 ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig000006c7 ), + .Q(\blk00000003/sig00000563 ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk000006a2 ( + .A0(\blk00000003/sig000000ac ), + .A1(\blk00000003/sig00000049 ), + .A2(\blk00000003/sig00000049 ), + .A3(\blk00000003/sig00000049 ), + .CE(ce), + .CLK(clk), + .D(\blk00000003/sig0000020c ), + .Q(\blk00000003/sig000006c7 ), + .Q15(\NLW_blk00000003/blk000006a2_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000006a1 ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig000006c6 ), + .Q(\blk00000003/sig00000565 ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk000006a0 ( + .A0(\blk00000003/sig000000ac ), + .A1(\blk00000003/sig00000049 ), + .A2(\blk00000003/sig00000049 ), + .A3(\blk00000003/sig00000049 ), + .CE(ce), + .CLK(clk), + .D(\blk00000003/sig0000020e ), + .Q(\blk00000003/sig000006c6 ), + .Q15(\NLW_blk00000003/blk000006a0_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk0000069f ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig000006c5 ), + .Q(\blk00000003/sig00000561 ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk0000069e ( + .A0(\blk00000003/sig000000ac ), + .A1(\blk00000003/sig00000049 ), + .A2(\blk00000003/sig00000049 ), + .A3(\blk00000003/sig00000049 ), + .CE(ce), + .CLK(clk), + .D(\blk00000003/sig0000020a ), + .Q(\blk00000003/sig000006c5 ), + .Q15(\NLW_blk00000003/blk0000069e_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk0000069d ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig000006c4 ), + .Q(\blk00000003/sig00000560 ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk0000069c ( + .A0(\blk00000003/sig000000ac ), + .A1(\blk00000003/sig00000049 ), + .A2(\blk00000003/sig00000049 ), + .A3(\blk00000003/sig00000049 ), + .CE(ce), + .CLK(clk), + .D(\blk00000003/sig00000209 ), + .Q(\blk00000003/sig000006c4 ), + .Q15(\NLW_blk00000003/blk0000069c_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk0000069b ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig000006c3 ), + .Q(\blk00000003/sig00000562 ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk0000069a ( + .A0(\blk00000003/sig000000ac ), + .A1(\blk00000003/sig00000049 ), + .A2(\blk00000003/sig00000049 ), + .A3(\blk00000003/sig00000049 ), + .CE(ce), + .CLK(clk), + .D(\blk00000003/sig0000020b ), + .Q(\blk00000003/sig000006c3 ), + .Q15(\NLW_blk00000003/blk0000069a_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000699 ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig000006c2 ), + .Q(\blk00000003/sig0000055e ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000698 ( + .A0(\blk00000003/sig000000ac ), + .A1(\blk00000003/sig00000049 ), + .A2(\blk00000003/sig00000049 ), + .A3(\blk00000003/sig00000049 ), + .CE(ce), + .CLK(clk), + .D(\blk00000003/sig00000207 ), + .Q(\blk00000003/sig000006c2 ), + .Q15(\NLW_blk00000003/blk00000698_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000697 ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig000006c1 ), + .Q(\blk00000003/sig0000055d ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000696 ( + .A0(\blk00000003/sig000000ac ), + .A1(\blk00000003/sig00000049 ), + .A2(\blk00000003/sig00000049 ), + .A3(\blk00000003/sig00000049 ), + .CE(ce), + .CLK(clk), + .D(\blk00000003/sig00000206 ), + .Q(\blk00000003/sig000006c1 ), + .Q15(\NLW_blk00000003/blk00000696_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000695 ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig000006c0 ), + .Q(\blk00000003/sig0000055f ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000694 ( + .A0(\blk00000003/sig000000ac ), + .A1(\blk00000003/sig00000049 ), + .A2(\blk00000003/sig00000049 ), + .A3(\blk00000003/sig00000049 ), + .CE(ce), + .CLK(clk), + .D(\blk00000003/sig00000208 ), + .Q(\blk00000003/sig000006c0 ), + .Q15(\NLW_blk00000003/blk00000694_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000693 ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig000006bf ), + .Q(\blk00000003/sig0000055c ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000692 ( + .A0(\blk00000003/sig000000ac ), + .A1(\blk00000003/sig00000049 ), + .A2(\blk00000003/sig00000049 ), + .A3(\blk00000003/sig00000049 ), + .CE(ce), + .CLK(clk), + .D(\blk00000003/sig00000205 ), + .Q(\blk00000003/sig000006bf ), + .Q15(\NLW_blk00000003/blk00000692_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000691 ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig000006be ), + .Q(\blk00000003/sig0000055b ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000690 ( + .A0(\blk00000003/sig000000ac ), + .A1(\blk00000003/sig00000049 ), + .A2(\blk00000003/sig00000049 ), + .A3(\blk00000003/sig00000049 ), + .CE(ce), + .CLK(clk), + .D(\blk00000003/sig00000204 ), + .Q(\blk00000003/sig000006be ), + .Q15(\NLW_blk00000003/blk00000690_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk0000068f ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig000006bd ), + .Q(\blk00000003/sig00000559 ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk0000068e ( + .A0(\blk00000003/sig000000ac ), + .A1(\blk00000003/sig00000049 ), + .A2(\blk00000003/sig00000049 ), + .A3(\blk00000003/sig00000049 ), + .CE(ce), + .CLK(clk), + .D(\blk00000003/sig00000202 ), + .Q(\blk00000003/sig000006bd ), + .Q15(\NLW_blk00000003/blk0000068e_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk0000068d ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig000006bc ), + .Q(\blk00000003/sig00000558 ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk0000068c ( + .A0(\blk00000003/sig000000ac ), + .A1(\blk00000003/sig00000049 ), + .A2(\blk00000003/sig00000049 ), + .A3(\blk00000003/sig00000049 ), + .CE(ce), + .CLK(clk), + .D(\blk00000003/sig00000201 ), + .Q(\blk00000003/sig000006bc ), + .Q15(\NLW_blk00000003/blk0000068c_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk0000068b ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig000006bb ), + .Q(\blk00000003/sig0000055a ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk0000068a ( + .A0(\blk00000003/sig000000ac ), + .A1(\blk00000003/sig00000049 ), + .A2(\blk00000003/sig00000049 ), + .A3(\blk00000003/sig00000049 ), + .CE(ce), + .CLK(clk), + .D(\blk00000003/sig00000203 ), + .Q(\blk00000003/sig000006bb ), + .Q15(\NLW_blk00000003/blk0000068a_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000689 ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig000006ba ), + .Q(\blk00000003/sig0000059e ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000688 ( + .A0(\blk00000003/sig000000ac ), + .A1(\blk00000003/sig00000049 ), + .A2(\blk00000003/sig00000049 ), + .A3(\blk00000003/sig00000049 ), + .CE(ce), + .CLK(clk), + .D(\blk00000003/sig000001ff ), + .Q(\blk00000003/sig000006ba ), + .Q15(\NLW_blk00000003/blk00000688_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000687 ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig000006b9 ), + .Q(\blk00000003/sig0000059d ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000686 ( + .A0(\blk00000003/sig000000ac ), + .A1(\blk00000003/sig00000049 ), + .A2(\blk00000003/sig00000049 ), + .A3(\blk00000003/sig00000049 ), + .CE(ce), + .CLK(clk), + .D(\blk00000003/sig000001fe ), + .Q(\blk00000003/sig000006b9 ), + .Q15(\NLW_blk00000003/blk00000686_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000685 ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig000006b8 ), + .Q(\blk00000003/sig00000557 ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000684 ( + .A0(\blk00000003/sig000000ac ), + .A1(\blk00000003/sig00000049 ), + .A2(\blk00000003/sig00000049 ), + .A3(\blk00000003/sig00000049 ), + .CE(ce), + .CLK(clk), + .D(\blk00000003/sig00000200 ), + .Q(\blk00000003/sig000006b8 ), + .Q15(\NLW_blk00000003/blk00000684_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000683 ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig000006b7 ), + .Q(\blk00000003/sig0000059b ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000682 ( + .A0(\blk00000003/sig000000ac ), + .A1(\blk00000003/sig00000049 ), + .A2(\blk00000003/sig00000049 ), + .A3(\blk00000003/sig00000049 ), + .CE(ce), + .CLK(clk), + .D(\blk00000003/sig000001fc ), + .Q(\blk00000003/sig000006b7 ), + .Q15(\NLW_blk00000003/blk00000682_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000681 ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig000006b6 ), + .Q(\blk00000003/sig0000059a ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000680 ( + .A0(\blk00000003/sig000000ac ), + .A1(\blk00000003/sig00000049 ), + .A2(\blk00000003/sig00000049 ), + .A3(\blk00000003/sig00000049 ), + .CE(ce), + .CLK(clk), + .D(\blk00000003/sig000001fb ), + .Q(\blk00000003/sig000006b6 ), + .Q15(\NLW_blk00000003/blk00000680_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk0000067f ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig000006b5 ), + .Q(\blk00000003/sig0000059c ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk0000067e ( + .A0(\blk00000003/sig000000ac ), + .A1(\blk00000003/sig00000049 ), + .A2(\blk00000003/sig00000049 ), + .A3(\blk00000003/sig00000049 ), + .CE(ce), + .CLK(clk), + .D(\blk00000003/sig000001fd ), + .Q(\blk00000003/sig000006b5 ), + .Q15(\NLW_blk00000003/blk0000067e_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk0000067d ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig000006b4 ), + .Q(\blk00000003/sig00000599 ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk0000067c ( + .A0(\blk00000003/sig000000ac ), + .A1(\blk00000003/sig00000049 ), + .A2(\blk00000003/sig00000049 ), + .A3(\blk00000003/sig00000049 ), + .CE(ce), + .CLK(clk), + .D(\blk00000003/sig000001fa ), + .Q(\blk00000003/sig000006b4 ), + .Q15(\NLW_blk00000003/blk0000067c_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk0000067b ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig000006b3 ), + .Q(\blk00000003/sig00000598 ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk0000067a ( + .A0(\blk00000003/sig000000ac ), + .A1(\blk00000003/sig00000049 ), + .A2(\blk00000003/sig00000049 ), + .A3(\blk00000003/sig00000049 ), + .CE(ce), + .CLK(clk), + .D(\blk00000003/sig000001f9 ), + .Q(\blk00000003/sig000006b3 ), + .Q15(\NLW_blk00000003/blk0000067a_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000679 ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig000006b2 ), + .Q(\blk00000003/sig00000596 ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000678 ( + .A0(\blk00000003/sig000000ac ), + .A1(\blk00000003/sig00000049 ), + .A2(\blk00000003/sig00000049 ), + .A3(\blk00000003/sig00000049 ), + .CE(ce), + .CLK(clk), + .D(\blk00000003/sig000001f7 ), + .Q(\blk00000003/sig000006b2 ), + .Q15(\NLW_blk00000003/blk00000678_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000677 ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig000006b1 ), + .Q(\blk00000003/sig00000595 ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000676 ( + .A0(\blk00000003/sig000000ac ), + .A1(\blk00000003/sig00000049 ), + .A2(\blk00000003/sig00000049 ), + .A3(\blk00000003/sig00000049 ), + .CE(ce), + .CLK(clk), + .D(\blk00000003/sig000001f6 ), + .Q(\blk00000003/sig000006b1 ), + .Q15(\NLW_blk00000003/blk00000676_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000675 ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig000006b0 ), + .Q(\blk00000003/sig00000597 ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000674 ( + .A0(\blk00000003/sig000000ac ), + .A1(\blk00000003/sig00000049 ), + .A2(\blk00000003/sig00000049 ), + .A3(\blk00000003/sig00000049 ), + .CE(ce), + .CLK(clk), + .D(\blk00000003/sig000001f8 ), + .Q(\blk00000003/sig000006b0 ), + .Q15(\NLW_blk00000003/blk00000674_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000673 ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig000006af ), + .Q(\blk00000003/sig00000593 ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000672 ( + .A0(\blk00000003/sig000000ac ), + .A1(\blk00000003/sig00000049 ), + .A2(\blk00000003/sig00000049 ), + .A3(\blk00000003/sig00000049 ), + .CE(ce), + .CLK(clk), + .D(\blk00000003/sig000001f4 ), + .Q(\blk00000003/sig000006af ), + .Q15(\NLW_blk00000003/blk00000672_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000671 ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig000006ae ), + .Q(\blk00000003/sig00000592 ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000670 ( + .A0(\blk00000003/sig000000ac ), + .A1(\blk00000003/sig00000049 ), + .A2(\blk00000003/sig00000049 ), + .A3(\blk00000003/sig00000049 ), + .CE(ce), + .CLK(clk), + .D(\blk00000003/sig000001f3 ), + .Q(\blk00000003/sig000006ae ), + .Q15(\NLW_blk00000003/blk00000670_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk0000066f ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig000006ad ), + .Q(\blk00000003/sig00000594 ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk0000066e ( + .A0(\blk00000003/sig000000ac ), + .A1(\blk00000003/sig00000049 ), + .A2(\blk00000003/sig00000049 ), + .A3(\blk00000003/sig00000049 ), + .CE(ce), + .CLK(clk), + .D(\blk00000003/sig000001f5 ), + .Q(\blk00000003/sig000006ad ), + .Q15(\NLW_blk00000003/blk0000066e_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk0000066d ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig000006ac ), + .Q(\blk00000003/sig00000590 ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk0000066c ( + .A0(\blk00000003/sig000000ac ), + .A1(\blk00000003/sig00000049 ), + .A2(\blk00000003/sig00000049 ), + .A3(\blk00000003/sig00000049 ), + .CE(ce), + .CLK(clk), + .D(\blk00000003/sig000001f1 ), + .Q(\blk00000003/sig000006ac ), + .Q15(\NLW_blk00000003/blk0000066c_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk0000066b ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig000006ab ), + .Q(\blk00000003/sig0000058f ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk0000066a ( + .A0(\blk00000003/sig000000ac ), + .A1(\blk00000003/sig00000049 ), + .A2(\blk00000003/sig00000049 ), + .A3(\blk00000003/sig00000049 ), + .CE(ce), + .CLK(clk), + .D(\blk00000003/sig000001f0 ), + .Q(\blk00000003/sig000006ab ), + .Q15(\NLW_blk00000003/blk0000066a_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000669 ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig000006aa ), + .Q(\blk00000003/sig00000591 ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000668 ( + .A0(\blk00000003/sig000000ac ), + .A1(\blk00000003/sig00000049 ), + .A2(\blk00000003/sig00000049 ), + .A3(\blk00000003/sig00000049 ), + .CE(ce), + .CLK(clk), + .D(\blk00000003/sig000001f2 ), + .Q(\blk00000003/sig000006aa ), + .Q15(\NLW_blk00000003/blk00000668_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000667 ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig000006a9 ), + .Q(\blk00000003/sig0000058e ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000666 ( + .A0(\blk00000003/sig000000ac ), + .A1(\blk00000003/sig00000049 ), + .A2(\blk00000003/sig00000049 ), + .A3(\blk00000003/sig00000049 ), + .CE(ce), + .CLK(clk), + .D(\blk00000003/sig000001ef ), + .Q(\blk00000003/sig000006a9 ), + .Q15(\NLW_blk00000003/blk00000666_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000665 ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig000006a8 ), + .Q(\blk00000003/sig0000058d ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000664 ( + .A0(\blk00000003/sig000000ac ), + .A1(\blk00000003/sig00000049 ), + .A2(\blk00000003/sig00000049 ), + .A3(\blk00000003/sig00000049 ), + .CE(ce), + .CLK(clk), + .D(\blk00000003/sig000001ee ), + .Q(\blk00000003/sig000006a8 ), + .Q15(\NLW_blk00000003/blk00000664_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000663 ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig000006a7 ), + .Q(\blk00000003/sig0000058b ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000662 ( + .A0(\blk00000003/sig000000ac ), + .A1(\blk00000003/sig00000049 ), + .A2(\blk00000003/sig00000049 ), + .A3(\blk00000003/sig00000049 ), + .CE(ce), + .CLK(clk), + .D(\blk00000003/sig000001ec ), + .Q(\blk00000003/sig000006a7 ), + .Q15(\NLW_blk00000003/blk00000662_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000661 ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig000006a6 ), + .Q(\blk00000003/sig0000058a ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000660 ( + .A0(\blk00000003/sig000000ac ), + .A1(\blk00000003/sig00000049 ), + .A2(\blk00000003/sig00000049 ), + .A3(\blk00000003/sig00000049 ), + .CE(ce), + .CLK(clk), + .D(\blk00000003/sig000001eb ), + .Q(\blk00000003/sig000006a6 ), + .Q15(\NLW_blk00000003/blk00000660_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk0000065f ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig000006a5 ), + .Q(\blk00000003/sig0000058c ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk0000065e ( + .A0(\blk00000003/sig000000ac ), + .A1(\blk00000003/sig00000049 ), + .A2(\blk00000003/sig00000049 ), + .A3(\blk00000003/sig00000049 ), + .CE(ce), + .CLK(clk), + .D(\blk00000003/sig000001ed ), + .Q(\blk00000003/sig000006a5 ), + .Q15(\NLW_blk00000003/blk0000065e_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk0000065d ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig000006a4 ), + .Q(\blk00000003/sig00000588 ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk0000065c ( + .A0(\blk00000003/sig000000ac ), + .A1(\blk00000003/sig00000049 ), + .A2(\blk00000003/sig00000049 ), + .A3(\blk00000003/sig00000049 ), + .CE(ce), + .CLK(clk), + .D(\blk00000003/sig000001e9 ), + .Q(\blk00000003/sig000006a4 ), + .Q15(\NLW_blk00000003/blk0000065c_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk0000065b ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig000006a3 ), + .Q(\blk00000003/sig00000587 ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk0000065a ( + .A0(\blk00000003/sig000000ac ), + .A1(\blk00000003/sig00000049 ), + .A2(\blk00000003/sig00000049 ), + .A3(\blk00000003/sig00000049 ), + .CE(ce), + .CLK(clk), + .D(\blk00000003/sig000001e8 ), + .Q(\blk00000003/sig000006a3 ), + .Q15(\NLW_blk00000003/blk0000065a_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000659 ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig000006a2 ), + .Q(\blk00000003/sig00000589 ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000658 ( + .A0(\blk00000003/sig000000ac ), + .A1(\blk00000003/sig00000049 ), + .A2(\blk00000003/sig00000049 ), + .A3(\blk00000003/sig00000049 ), + .CE(ce), + .CLK(clk), + .D(\blk00000003/sig000001ea ), + .Q(\blk00000003/sig000006a2 ), + .Q15(\NLW_blk00000003/blk00000658_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000657 ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig000006a1 ), + .Q(\blk00000003/sig000002c2 ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000656 ( + .A0(\blk00000003/sig00000049 ), + .A1(\blk00000003/sig000000ac ), + .A2(\blk00000003/sig00000049 ), + .A3(\blk00000003/sig00000049 ), + .CE(ce), + .CLK(clk), + .D(\blk00000003/sig000002a8 ), + .Q(\blk00000003/sig000006a1 ), + .Q15(\NLW_blk00000003/blk00000656_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000655 ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig000006a0 ), + .Q(\blk00000003/sig00000680 ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000654 ( + .A0(\blk00000003/sig00000049 ), + .A1(\blk00000003/sig000000ac ), + .A2(\blk00000003/sig00000049 ), + .A3(\blk00000003/sig00000049 ), + .CE(ce), + .CLK(clk), + .D(\blk00000003/sig000001d0 ), + .Q(\blk00000003/sig000006a0 ), + .Q15(\NLW_blk00000003/blk00000654_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000653 ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig0000069f ), + .Q(\blk00000003/sig000002c1 ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000652 ( + .A0(\blk00000003/sig000000ac ), + .A1(\blk00000003/sig000000ac ), + .A2(\blk00000003/sig00000049 ), + .A3(\blk00000003/sig00000049 ), + .CE(ce), + .CLK(clk), + .D(\blk00000003/sig000001d4 ), + .Q(\blk00000003/sig0000069f ), + .Q15(\NLW_blk00000003/blk00000652_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000651 ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig0000069e ), + .Q(\blk00000003/sig000005c8 ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000650 ( + .A0(\blk00000003/sig00000049 ), + .A1(\blk00000003/sig00000049 ), + .A2(\blk00000003/sig00000049 ), + .A3(\blk00000003/sig00000049 ), + .CE(ce), + .CLK(clk), + .D(coef_din_0[0]), + .Q(\blk00000003/sig0000069e ), + .Q15(\NLW_blk00000003/blk00000650_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk0000064f ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig0000069d ), + .Q(\blk00000003/sig000005c7 ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk0000064e ( + .A0(\blk00000003/sig00000049 ), + .A1(\blk00000003/sig00000049 ), + .A2(\blk00000003/sig00000049 ), + .A3(\blk00000003/sig00000049 ), + .CE(ce), + .CLK(clk), + .D(coef_din_0[1]), + .Q(\blk00000003/sig0000069d ), + .Q15(\NLW_blk00000003/blk0000064e_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk0000064d ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig0000069c ), + .Q(\blk00000003/sig000005c5 ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk0000064c ( + .A0(\blk00000003/sig00000049 ), + .A1(\blk00000003/sig00000049 ), + .A2(\blk00000003/sig00000049 ), + .A3(\blk00000003/sig00000049 ), + .CE(ce), + .CLK(clk), + .D(coef_din_0[3]), + .Q(\blk00000003/sig0000069c ), + .Q15(\NLW_blk00000003/blk0000064c_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk0000064b ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig0000069b ), + .Q(\blk00000003/sig000005c4 ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk0000064a ( + .A0(\blk00000003/sig00000049 ), + .A1(\blk00000003/sig00000049 ), + .A2(\blk00000003/sig00000049 ), + .A3(\blk00000003/sig00000049 ), + .CE(ce), + .CLK(clk), + .D(coef_din_0[4]), + .Q(\blk00000003/sig0000069b ), + .Q15(\NLW_blk00000003/blk0000064a_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000649 ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig0000069a ), + .Q(\blk00000003/sig000005c6 ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000648 ( + .A0(\blk00000003/sig00000049 ), + .A1(\blk00000003/sig00000049 ), + .A2(\blk00000003/sig00000049 ), + .A3(\blk00000003/sig00000049 ), + .CE(ce), + .CLK(clk), + .D(coef_din_0[2]), + .Q(\blk00000003/sig0000069a ), + .Q15(\NLW_blk00000003/blk00000648_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000647 ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig00000699 ), + .Q(\blk00000003/sig000005c2 ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000646 ( + .A0(\blk00000003/sig00000049 ), + .A1(\blk00000003/sig00000049 ), + .A2(\blk00000003/sig00000049 ), + .A3(\blk00000003/sig00000049 ), + .CE(ce), + .CLK(clk), + .D(coef_din_0[6]), + .Q(\blk00000003/sig00000699 ), + .Q15(\NLW_blk00000003/blk00000646_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000645 ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig00000698 ), + .Q(\blk00000003/sig000005c1 ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000644 ( + .A0(\blk00000003/sig00000049 ), + .A1(\blk00000003/sig00000049 ), + .A2(\blk00000003/sig00000049 ), + .A3(\blk00000003/sig00000049 ), + .CE(ce), + .CLK(clk), + .D(coef_din_0[7]), + .Q(\blk00000003/sig00000698 ), + .Q15(\NLW_blk00000003/blk00000644_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000643 ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig00000697 ), + .Q(\blk00000003/sig000005c3 ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000642 ( + .A0(\blk00000003/sig00000049 ), + .A1(\blk00000003/sig00000049 ), + .A2(\blk00000003/sig00000049 ), + .A3(\blk00000003/sig00000049 ), + .CE(ce), + .CLK(clk), + .D(coef_din_0[5]), + .Q(\blk00000003/sig00000697 ), + .Q15(\NLW_blk00000003/blk00000642_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000641 ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig00000696 ), + .Q(\blk00000003/sig000005bf ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000640 ( + .A0(\blk00000003/sig00000049 ), + .A1(\blk00000003/sig00000049 ), + .A2(\blk00000003/sig00000049 ), + .A3(\blk00000003/sig00000049 ), + .CE(ce), + .CLK(clk), + .D(coef_din_0[9]), + .Q(\blk00000003/sig00000696 ), + .Q15(\NLW_blk00000003/blk00000640_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk0000063f ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig00000695 ), + .Q(\blk00000003/sig000005be ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk0000063e ( + .A0(\blk00000003/sig00000049 ), + .A1(\blk00000003/sig00000049 ), + .A2(\blk00000003/sig00000049 ), + .A3(\blk00000003/sig00000049 ), + .CE(ce), + .CLK(clk), + .D(coef_din_0[10]), + .Q(\blk00000003/sig00000695 ), + .Q15(\NLW_blk00000003/blk0000063e_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk0000063d ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig00000694 ), + .Q(\blk00000003/sig000005c0 ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk0000063c ( + .A0(\blk00000003/sig00000049 ), + .A1(\blk00000003/sig00000049 ), + .A2(\blk00000003/sig00000049 ), + .A3(\blk00000003/sig00000049 ), + .CE(ce), + .CLK(clk), + .D(coef_din_0[8]), + .Q(\blk00000003/sig00000694 ), + .Q15(\NLW_blk00000003/blk0000063c_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk0000063b ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig00000693 ), + .Q(\blk00000003/sig000005bd ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk0000063a ( + .A0(\blk00000003/sig00000049 ), + .A1(\blk00000003/sig00000049 ), + .A2(\blk00000003/sig00000049 ), + .A3(\blk00000003/sig00000049 ), + .CE(ce), + .CLK(clk), + .D(coef_din_0[11]), + .Q(\blk00000003/sig00000693 ), + .Q15(\NLW_blk00000003/blk0000063a_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000639 ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig00000692 ), + .Q(\blk00000003/sig000005bc ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000638 ( + .A0(\blk00000003/sig00000049 ), + .A1(\blk00000003/sig00000049 ), + .A2(\blk00000003/sig00000049 ), + .A3(\blk00000003/sig00000049 ), + .CE(ce), + .CLK(clk), + .D(coef_din_0[12]), + .Q(\blk00000003/sig00000692 ), + .Q15(\NLW_blk00000003/blk00000638_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000637 ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig00000691 ), + .Q(\blk00000003/sig000005ba ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000636 ( + .A0(\blk00000003/sig00000049 ), + .A1(\blk00000003/sig00000049 ), + .A2(\blk00000003/sig00000049 ), + .A3(\blk00000003/sig00000049 ), + .CE(ce), + .CLK(clk), + .D(coef_din_0[14]), + .Q(\blk00000003/sig00000691 ), + .Q15(\NLW_blk00000003/blk00000636_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000635 ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig00000690 ), + .Q(\blk00000003/sig000005b9 ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000634 ( + .A0(\blk00000003/sig00000049 ), + .A1(\blk00000003/sig00000049 ), + .A2(\blk00000003/sig00000049 ), + .A3(\blk00000003/sig00000049 ), + .CE(ce), + .CLK(clk), + .D(coef_din_0[15]), + .Q(\blk00000003/sig00000690 ), + .Q15(\NLW_blk00000003/blk00000634_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000633 ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig0000068f ), + .Q(\blk00000003/sig000005bb ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000632 ( + .A0(\blk00000003/sig00000049 ), + .A1(\blk00000003/sig00000049 ), + .A2(\blk00000003/sig00000049 ), + .A3(\blk00000003/sig00000049 ), + .CE(ce), + .CLK(clk), + .D(coef_din_0[13]), + .Q(\blk00000003/sig0000068f ), + .Q15(\NLW_blk00000003/blk00000632_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000631 ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig0000068e ), + .Q(\blk00000003/sig000005b7 ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000630 ( + .A0(\blk00000003/sig00000049 ), + .A1(\blk00000003/sig00000049 ), + .A2(\blk00000003/sig00000049 ), + .A3(\blk00000003/sig00000049 ), + .CE(ce), + .CLK(clk), + .D(coef_din_0[17]), + .Q(\blk00000003/sig0000068e ), + .Q15(\NLW_blk00000003/blk00000630_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk0000062f ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig0000068d ), + .Q(\blk00000003/sig000005b8 ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk0000062e ( + .A0(\blk00000003/sig00000049 ), + .A1(\blk00000003/sig00000049 ), + .A2(\blk00000003/sig00000049 ), + .A3(\blk00000003/sig00000049 ), + .CE(ce), + .CLK(clk), + .D(coef_din_0[16]), + .Q(\blk00000003/sig0000068d ), + .Q15(\NLW_blk00000003/blk0000062e_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk0000062d ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig0000068c ), + .Q(\blk00000003/sig000004f5 ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk0000062c ( + .A0(\blk00000003/sig00000049 ), + .A1(\blk00000003/sig00000049 ), + .A2(\blk00000003/sig000000ac ), + .A3(\blk00000003/sig00000049 ), + .CE(ce), + .CLK(clk), + .D(\blk00000003/sig000001d6 ), + .Q(\blk00000003/sig0000068c ), + .Q15(\NLW_blk00000003/blk0000062c_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk0000062b ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig0000068b ), + .Q(\blk00000003/sig000005f0 ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk0000062a ( + .A0(\blk00000003/sig00000049 ), + .A1(\blk00000003/sig00000049 ), + .A2(\blk00000003/sig00000049 ), + .A3(\blk00000003/sig00000049 ), + .CE(ce), + .CLK(clk), + .D(\blk00000003/sig000001ce ), + .Q(\blk00000003/sig0000068b ), + .Q15(\NLW_blk00000003/blk0000062a_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000629 ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig0000068a ), + .Q(\blk00000003/sig000001df ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000628 ( + .A0(\blk00000003/sig000000ac ), + .A1(\blk00000003/sig00000049 ), + .A2(\blk00000003/sig00000049 ), + .A3(\blk00000003/sig00000049 ), + .CE(ce), + .CLK(clk), + .D(\blk00000003/sig000001e1 ), + .Q(\blk00000003/sig0000068a ), + .Q15(\NLW_blk00000003/blk00000628_Q15_UNCONNECTED ) + ); + INV \blk00000003/blk00000627 ( + .I(\blk00000003/sig0000023e ), + .O(\blk00000003/sig0000027e ) + ); + INV \blk00000003/blk00000626 ( + .I(\blk00000003/sig00000287 ), + .O(\blk00000003/sig00000277 ) + ); + INV \blk00000003/blk00000625 ( + .I(\blk00000003/sig000001ce ), + .O(\blk00000003/sig0000028c ) + ); + INV \blk00000003/blk00000624 ( + .I(\blk00000003/sig0000028e ), + .O(\blk00000003/sig0000027d ) + ); + INV \blk00000003/blk00000623 ( + .I(\blk00000003/sig000005ff ), + .O(\blk00000003/sig00000678 ) + ); + INV \blk00000003/blk00000622 ( + .I(\blk00000003/sig00000242 ), + .O(\blk00000003/sig0000028f ) + ); + INV \blk00000003/blk00000621 ( + .I(\blk00000003/sig0000023e ), + .O(\blk00000003/sig00000278 ) + ); + INV \blk00000003/blk00000620 ( + .I(\blk00000003/sig0000021b ), + .O(\blk00000003/sig00000243 ) + ); + INV \blk00000003/blk0000061f ( + .I(\blk00000003/sig000001cc ), + .O(\blk00000003/sig000000ba ) + ); + INV \blk00000003/blk0000061e ( + .I(\blk00000003/sig000000ad ), + .O(\blk00000003/sig000001c7 ) + ); + INV \blk00000003/blk0000061d ( + .I(\blk00000003/sig000000b7 ), + .O(\blk00000003/sig000000b8 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk0000061c ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig00000604 ), + .Q(\blk00000003/sig0000067c ) + ); + LUT3 #( + .INIT ( 8'h40 )) + \blk00000003/blk0000061b ( + .I0(\blk00000003/sig0000024b ), + .I1(\blk00000003/sig00000234 ), + .I2(coef_ld), + .O(\blk00000003/sig00000247 ) + ); + LUT5 #( + .INIT ( 32'h4F444444 )) + \blk00000003/blk0000061a ( + .I0(\blk00000003/sig00000248 ), + .I1(\blk00000003/sig0000023c ), + .I2(\blk00000003/sig0000024b ), + .I3(coef_ld), + .I4(\blk00000003/sig00000234 ), + .O(\blk00000003/sig0000023f ) + ); + LUT4 #( + .INIT ( 16'h1000 )) + \blk00000003/blk00000619 ( + .I0(coef_ld), + .I1(\blk00000003/sig00000236 ), + .I2(coef_we), + .I3(\blk00000003/sig00000234 ), + .O(\blk00000003/sig00000246 ) + ); + LUT5 #( + .INIT ( 32'h20AA2020 )) + \blk00000003/blk00000618 ( + .I0(\blk00000003/sig00000234 ), + .I1(\blk00000003/sig00000236 ), + .I2(coef_we), + .I3(\blk00000003/sig0000024b ), + .I4(coef_ld), + .O(\blk00000003/sig00000245 ) + ); + LUT4 #( + .INIT ( 16'hEA2A )) + \blk00000003/blk00000617 ( + .I0(\blk00000003/sig00000287 ), + .I1(ce), + .I2(\blk00000003/sig0000023c ), + .I3(\blk00000003/sig00000219 ), + .O(\blk00000003/sig00000689 ) + ); + LUT4 #( + .INIT ( 16'hEA2A )) + \blk00000003/blk00000616 ( + .I0(\blk00000003/sig0000028e ), + .I1(ce), + .I2(\blk00000003/sig0000023a ), + .I3(\blk00000003/sig0000027f ), + .O(\blk00000003/sig00000688 ) + ); + LUT4 #( + .INIT ( 16'hEA2A )) + \blk00000003/blk00000615 ( + .I0(\blk00000003/sig0000067b ), + .I1(ce), + .I2(\blk00000003/sig000001d4 ), + .I3(\blk00000003/sig000001d6 ), + .O(\blk00000003/sig00000686 ) + ); + LUT3 #( + .INIT ( 8'hF4 )) + \blk00000003/blk00000614 ( + .I0(ce), + .I1(sclr), + .I2(\blk00000003/sig0000067f ), + .O(\blk00000003/sig00000685 ) + ); + LUT3 #( + .INIT ( 8'hF4 )) + \blk00000003/blk00000613 ( + .I0(ce), + .I1(\blk00000003/sig0000024b ), + .I2(\blk00000003/sig0000067d ), + .O(\blk00000003/sig00000684 ) + ); + LUT5 #( + .INIT ( 32'h6AAAAAAA )) + \blk00000003/blk00000612 ( + .I0(\blk00000003/sig0000067e ), + .I1(\blk00000003/sig00000291 ), + .I2(ce), + .I3(nd), + .I4(NlwRenamedSig_OI_rfd), + .O(\blk00000003/sig00000687 ) + ); + FD #( + .INIT ( 1'b1 )) + \blk00000003/blk00000611 ( + .C(clk), + .D(\blk00000003/sig00000689 ), + .Q(\blk00000003/sig00000287 ) + ); + FD #( + .INIT ( 1'b1 )) + \blk00000003/blk00000610 ( + .C(clk), + .D(\blk00000003/sig00000688 ), + .Q(\blk00000003/sig0000028e ) + ); + FDR #( + .INIT ( 1'b0 )) + \blk00000003/blk0000060f ( + .C(clk), + .D(\blk00000003/sig00000687 ), + .R(sclr), + .Q(\blk00000003/sig0000067e ) + ); + FDR #( + .INIT ( 1'b0 )) + \blk00000003/blk0000060e ( + .C(clk), + .D(\blk00000003/sig00000686 ), + .R(sclr), + .Q(\blk00000003/sig0000067b ) + ); + LUT1 #( + .INIT ( 2'h2 )) + \blk00000003/blk0000060d ( + .I0(\blk00000003/sig00000602 ), + .O(\blk00000003/sig000005fd ) + ); + LUT1 #( + .INIT ( 2'h2 )) + \blk00000003/blk0000060c ( + .I0(\blk00000003/sig00000601 ), + .O(\blk00000003/sig000005fa ) + ); + LUT1 #( + .INIT ( 2'h2 )) + \blk00000003/blk0000060b ( + .I0(\blk00000003/sig00000600 ), + .O(\blk00000003/sig000005f7 ) + ); + LUT1 #( + .INIT ( 2'h2 )) + \blk00000003/blk0000060a ( + .I0(\blk00000003/sig000005ff ), + .O(\blk00000003/sig000005f4 ) + ); + LUT1 #( + .INIT ( 2'h2 )) + \blk00000003/blk00000609 ( + .I0(\blk00000003/sig000002be ), + .O(\blk00000003/sig000002bf ) + ); + LUT1 #( + .INIT ( 2'h2 )) + \blk00000003/blk00000608 ( + .I0(\blk00000003/sig000002ba ), + .O(\blk00000003/sig000002bb ) + ); + LUT1 #( + .INIT ( 2'h2 )) + \blk00000003/blk00000607 ( + .I0(\blk00000003/sig000002a6 ), + .O(\blk00000003/sig000002a0 ) + ); + LUT1 #( + .INIT ( 2'h2 )) + \blk00000003/blk00000606 ( + .I0(\blk00000003/sig0000067e ), + .O(\blk00000003/sig00000296 ) + ); + LUT1 #( + .INIT ( 2'h2 )) + \blk00000003/blk00000605 ( + .I0(\blk00000003/sig00000268 ), + .O(\blk00000003/sig00000269 ) + ); + LUT1 #( + .INIT ( 2'h2 )) + \blk00000003/blk00000604 ( + .I0(\blk00000003/sig00000264 ), + .O(\blk00000003/sig00000265 ) + ); + LUT1 #( + .INIT ( 2'h2 )) + \blk00000003/blk00000603 ( + .I0(\blk00000003/sig00000256 ), + .O(\blk00000003/sig00000254 ) + ); + LUT1 #( + .INIT ( 2'h2 )) + \blk00000003/blk00000602 ( + .I0(\blk00000003/sig0000024f ), + .O(\blk00000003/sig0000024d ) + ); + LUT2 #( + .INIT ( 4'h2 )) + \blk00000003/blk00000601 ( + .I0(\blk00000003/sig0000024f ), + .I1(\blk00000003/sig00000252 ), + .O(\blk00000003/sig0000022a ) + ); + LUT1 #( + .INIT ( 2'h2 )) + \blk00000003/blk00000600 ( + .I0(\blk00000003/sig000001cc ), + .O(\blk00000003/sig000000bb ) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk000005ff ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig00000672 ), + .R(sclr), + .Q(\blk00000003/sig00000677 ) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk000005fe ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig0000066f ), + .R(sclr), + .Q(\blk00000003/sig00000676 ) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk000005fd ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig0000066c ), + .R(sclr), + .Q(\blk00000003/sig00000675 ) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk000005fc ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig00000669 ), + .R(sclr), + .Q(\blk00000003/sig00000674 ) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk000005fb ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig00000666 ), + .R(sclr), + .Q(\blk00000003/sig00000673 ) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk000005fa ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig000005f2 ), + .R(sclr), + .Q(\blk00000003/sig00000603 ) + ); + FDSE #( + .INIT ( 1'b1 )) + \blk00000003/blk000005f9 ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig000005fe ), + .S(sclr), + .Q(\blk00000003/sig00000602 ) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk000005f8 ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig000005fb ), + .R(sclr), + .Q(\blk00000003/sig00000601 ) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk000005f7 ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig000005f8 ), + .R(sclr), + .Q(\blk00000003/sig00000600 ) + ); + FDSE #( + .INIT ( 1'b1 )) + \blk00000003/blk000005f6 ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig000005f5 ), + .S(sclr), + .Q(\blk00000003/sig000005ff ) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk000005f5 ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig000002c0 ), + .R(\blk00000003/sig000002c3 ), + .Q(\blk00000003/sig000002be ) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk000005f4 ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig000002bd ), + .R(\blk00000003/sig000002c3 ), + .Q(\blk00000003/sig000002ba ) + ); + FDSE #( + .INIT ( 1'b1 )) + \blk00000003/blk000005f3 ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig000002b3 ), + .S(\blk00000003/sig000002c2 ), + .Q(\blk00000003/sig000002b8 ) + ); + FDSE #( + .INIT ( 1'b1 )) + \blk00000003/blk000005f2 ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig000002b6 ), + .S(\blk00000003/sig000002c2 ), + .Q(\blk00000003/sig000002b7 ) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk000005f1 ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig000002ab ), + .R(\blk00000003/sig000002c2 ), + .Q(\blk00000003/sig000002b1 ) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk000005f0 ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig000002ae ), + .R(\blk00000003/sig000002c2 ), + .Q(\blk00000003/sig000002b0 ) + ); + FDR \blk00000003/blk000005ef ( + .C(clk), + .D(\blk00000003/sig00000685 ), + .R(ce), + .Q(\blk00000003/sig0000067f ) + ); + FDSE #( + .INIT ( 1'b1 )) + \blk00000003/blk000005ee ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig000002a1 ), + .S(sclr), + .Q(\blk00000003/sig000002a6 ) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk000005ed ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig000002a4 ), + .R(sclr), + .Q(\blk00000003/sig000002a5 ) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk000005ec ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig0000029b ), + .R(sclr), + .Q(\blk00000003/sig000001e7 ) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk000005eb ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig0000029e ), + .R(sclr), + .Q(\blk00000003/sig000001e6 ) + ); + FDR \blk00000003/blk000005ea ( + .C(clk), + .D(\blk00000003/sig00000684 ), + .R(ce), + .Q(\blk00000003/sig0000067d ) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk000005e9 ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig0000026a ), + .R(\blk00000003/sig0000026d ), + .Q(\blk00000003/sig00000268 ) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk000005e8 ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig00000267 ), + .R(\blk00000003/sig0000026d ), + .Q(\blk00000003/sig00000264 ) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk000005e7 ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig0000025c ), + .R(coef_ld), + .Q(\blk00000003/sig00000262 ) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk000005e6 ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig0000025f ), + .R(coef_ld), + .Q(\blk00000003/sig00000261 ) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk000005e5 ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig00000258 ), + .R(sclr), + .Q(\blk00000003/sig00000259 ) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk000005e4 ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig00000255 ), + .R(sclr), + .Q(\blk00000003/sig00000256 ) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk000005e3 ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig00000251 ), + .R(coef_ld), + .Q(\blk00000003/sig00000252 ) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk000005e2 ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig0000024e ), + .R(coef_ld), + .Q(\blk00000003/sig0000024f ) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk000005e1 ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig000000af ), + .R(sclr), + .Q(\blk00000003/sig000000ad ) + ); + LUT2 #( + .INIT ( 4'hE )) + \blk00000003/blk000005e0 ( + .I0(\blk00000003/sig00000673 ), + .I1(\blk00000003/sig000005ff ), + .O(\blk00000003/sig00000665 ) + ); + LUT2 #( + .INIT ( 4'hE )) + \blk00000003/blk000005df ( + .I0(\blk00000003/sig00000674 ), + .I1(\blk00000003/sig000005ff ), + .O(\blk00000003/sig00000668 ) + ); + LUT2 #( + .INIT ( 4'hE )) + \blk00000003/blk000005de ( + .I0(\blk00000003/sig00000675 ), + .I1(\blk00000003/sig000005ff ), + .O(\blk00000003/sig0000066b ) + ); + LUT2 #( + .INIT ( 4'hE )) + \blk00000003/blk000005dd ( + .I0(\blk00000003/sig00000676 ), + .I1(\blk00000003/sig000005ff ), + .O(\blk00000003/sig0000066e ) + ); + LUT3 #( + .INIT ( 8'hDE )) + \blk00000003/blk000005dc ( + .I0(\blk00000003/sig00000677 ), + .I1(\blk00000003/sig000005ff ), + .I2(\blk00000003/sig000001dd ), + .O(\blk00000003/sig00000671 ) + ); + LUT3 #( + .INIT ( 8'h04 )) + \blk00000003/blk000005db ( + .I0(\blk00000003/sig000001dd ), + .I1(\blk00000003/sig0000004a ), + .I2(\blk00000003/sig000005ff ), + .O(\blk00000003/sig00000663 ) + ); + LUT4 #( + .INIT ( 16'h5140 )) + \blk00000003/blk000005da ( + .I0(\blk00000003/sig000001cc ), + .I1(\blk00000003/sig000001dd ), + .I2(\blk00000003/sig00000106 ), + .I3(NlwRenamedSig_OI_dout_2[45]), + .O(\blk00000003/sig00000661 ) + ); + LUT4 #( + .INIT ( 16'h5140 )) + \blk00000003/blk000005d9 ( + .I0(\blk00000003/sig000001cc ), + .I1(\blk00000003/sig000001dd ), + .I2(\blk00000003/sig00000105 ), + .I3(NlwRenamedSig_OI_dout_2[46]), + .O(\blk00000003/sig00000662 ) + ); + LUT4 #( + .INIT ( 16'h5140 )) + \blk00000003/blk000005d8 ( + .I0(\blk00000003/sig000001cc ), + .I1(\blk00000003/sig000001dd ), + .I2(\blk00000003/sig00000107 ), + .I3(NlwRenamedSig_OI_dout_2[44]), + .O(\blk00000003/sig00000660 ) + ); + LUT4 #( + .INIT ( 16'h5140 )) + \blk00000003/blk000005d7 ( + .I0(\blk00000003/sig000001cc ), + .I1(\blk00000003/sig000001dd ), + .I2(\blk00000003/sig00000109 ), + .I3(NlwRenamedSig_OI_dout_2[42]), + .O(\blk00000003/sig0000065e ) + ); + LUT4 #( + .INIT ( 16'h5140 )) + \blk00000003/blk000005d6 ( + .I0(\blk00000003/sig000001cc ), + .I1(\blk00000003/sig000001dd ), + .I2(\blk00000003/sig00000108 ), + .I3(NlwRenamedSig_OI_dout_2[43]), + .O(\blk00000003/sig0000065f ) + ); + LUT4 #( + .INIT ( 16'h5140 )) + \blk00000003/blk000005d5 ( + .I0(\blk00000003/sig000001cc ), + .I1(\blk00000003/sig000001dd ), + .I2(\blk00000003/sig0000010a ), + .I3(NlwRenamedSig_OI_dout_2[41]), + .O(\blk00000003/sig0000065d ) + ); + LUT4 #( + .INIT ( 16'h5140 )) + \blk00000003/blk000005d4 ( + .I0(\blk00000003/sig000001cc ), + .I1(\blk00000003/sig000001dd ), + .I2(\blk00000003/sig0000010c ), + .I3(NlwRenamedSig_OI_dout_2[39]), + .O(\blk00000003/sig0000065b ) + ); + LUT4 #( + .INIT ( 16'h5140 )) + \blk00000003/blk000005d3 ( + .I0(\blk00000003/sig000001cc ), + .I1(\blk00000003/sig000001dd ), + .I2(\blk00000003/sig0000010b ), + .I3(NlwRenamedSig_OI_dout_2[40]), + .O(\blk00000003/sig0000065c ) + ); + LUT4 #( + .INIT ( 16'h5140 )) + \blk00000003/blk000005d2 ( + .I0(\blk00000003/sig000001cc ), + .I1(\blk00000003/sig000001dd ), + .I2(\blk00000003/sig0000010d ), + .I3(NlwRenamedSig_OI_dout_2[38]), + .O(\blk00000003/sig0000065a ) + ); + LUT4 #( + .INIT ( 16'h5140 )) + \blk00000003/blk000005d1 ( + .I0(\blk00000003/sig000001cc ), + .I1(\blk00000003/sig000001dd ), + .I2(\blk00000003/sig0000010f ), + .I3(NlwRenamedSig_OI_dout_2[36]), + .O(\blk00000003/sig00000658 ) + ); + LUT4 #( + .INIT ( 16'h5140 )) + \blk00000003/blk000005d0 ( + .I0(\blk00000003/sig000001cc ), + .I1(\blk00000003/sig000001dd ), + .I2(\blk00000003/sig0000010e ), + .I3(NlwRenamedSig_OI_dout_2[37]), + .O(\blk00000003/sig00000659 ) + ); + LUT4 #( + .INIT ( 16'h5140 )) + \blk00000003/blk000005cf ( + .I0(\blk00000003/sig000001cc ), + .I1(\blk00000003/sig000001dd ), + .I2(\blk00000003/sig00000110 ), + .I3(NlwRenamedSig_OI_dout_2[35]), + .O(\blk00000003/sig00000657 ) + ); + LUT4 #( + .INIT ( 16'h5140 )) + \blk00000003/blk000005ce ( + .I0(\blk00000003/sig000001cc ), + .I1(\blk00000003/sig000001dd ), + .I2(\blk00000003/sig00000112 ), + .I3(NlwRenamedSig_OI_dout_2[33]), + .O(\blk00000003/sig00000655 ) + ); + LUT4 #( + .INIT ( 16'h5140 )) + \blk00000003/blk000005cd ( + .I0(\blk00000003/sig000001cc ), + .I1(\blk00000003/sig000001dd ), + .I2(\blk00000003/sig00000111 ), + .I3(NlwRenamedSig_OI_dout_2[34]), + .O(\blk00000003/sig00000656 ) + ); + LUT4 #( + .INIT ( 16'h5140 )) + \blk00000003/blk000005cc ( + .I0(\blk00000003/sig000001cc ), + .I1(\blk00000003/sig000001dd ), + .I2(\blk00000003/sig00000113 ), + .I3(NlwRenamedSig_OI_dout_2[32]), + .O(\blk00000003/sig00000654 ) + ); + LUT4 #( + .INIT ( 16'h5140 )) + \blk00000003/blk000005cb ( + .I0(\blk00000003/sig000001cc ), + .I1(\blk00000003/sig000001dd ), + .I2(\blk00000003/sig00000115 ), + .I3(NlwRenamedSig_OI_dout_2[30]), + .O(\blk00000003/sig00000652 ) + ); + LUT4 #( + .INIT ( 16'h5140 )) + \blk00000003/blk000005ca ( + .I0(\blk00000003/sig000001cc ), + .I1(\blk00000003/sig000001dd ), + .I2(\blk00000003/sig00000114 ), + .I3(NlwRenamedSig_OI_dout_2[31]), + .O(\blk00000003/sig00000653 ) + ); + LUT4 #( + .INIT ( 16'h5140 )) + \blk00000003/blk000005c9 ( + .I0(\blk00000003/sig000001cc ), + .I1(\blk00000003/sig000001dd ), + .I2(\blk00000003/sig00000116 ), + .I3(NlwRenamedSig_OI_dout_2[29]), + .O(\blk00000003/sig00000651 ) + ); + LUT4 #( + .INIT ( 16'h5140 )) + \blk00000003/blk000005c8 ( + .I0(\blk00000003/sig000001cc ), + .I1(\blk00000003/sig000001dd ), + .I2(\blk00000003/sig00000118 ), + .I3(NlwRenamedSig_OI_dout_2[27]), + .O(\blk00000003/sig0000064f ) + ); + LUT4 #( + .INIT ( 16'h5140 )) + \blk00000003/blk000005c7 ( + .I0(\blk00000003/sig000001cc ), + .I1(\blk00000003/sig000001dd ), + .I2(\blk00000003/sig00000117 ), + .I3(NlwRenamedSig_OI_dout_2[28]), + .O(\blk00000003/sig00000650 ) + ); + LUT4 #( + .INIT ( 16'h5140 )) + \blk00000003/blk000005c6 ( + .I0(\blk00000003/sig000001cc ), + .I1(\blk00000003/sig000001dd ), + .I2(\blk00000003/sig00000119 ), + .I3(NlwRenamedSig_OI_dout_2[26]), + .O(\blk00000003/sig0000064e ) + ); + LUT4 #( + .INIT ( 16'h5140 )) + \blk00000003/blk000005c5 ( + .I0(\blk00000003/sig000001cc ), + .I1(\blk00000003/sig000001dd ), + .I2(\blk00000003/sig0000011b ), + .I3(NlwRenamedSig_OI_dout_2[24]), + .O(\blk00000003/sig0000064c ) + ); + LUT4 #( + .INIT ( 16'h5140 )) + \blk00000003/blk000005c4 ( + .I0(\blk00000003/sig000001cc ), + .I1(\blk00000003/sig000001dd ), + .I2(\blk00000003/sig0000011a ), + .I3(NlwRenamedSig_OI_dout_2[25]), + .O(\blk00000003/sig0000064d ) + ); + LUT4 #( + .INIT ( 16'h5140 )) + \blk00000003/blk000005c3 ( + .I0(\blk00000003/sig000001cc ), + .I1(\blk00000003/sig000001dd ), + .I2(\blk00000003/sig0000011c ), + .I3(NlwRenamedSig_OI_dout_2[23]), + .O(\blk00000003/sig0000064b ) + ); + LUT4 #( + .INIT ( 16'h5140 )) + \blk00000003/blk000005c2 ( + .I0(\blk00000003/sig000001cc ), + .I1(\blk00000003/sig000001dd ), + .I2(\blk00000003/sig0000011e ), + .I3(NlwRenamedSig_OI_dout_2[21]), + .O(\blk00000003/sig00000649 ) + ); + LUT4 #( + .INIT ( 16'h5140 )) + \blk00000003/blk000005c1 ( + .I0(\blk00000003/sig000001cc ), + .I1(\blk00000003/sig000001dd ), + .I2(\blk00000003/sig0000011d ), + .I3(NlwRenamedSig_OI_dout_2[22]), + .O(\blk00000003/sig0000064a ) + ); + LUT4 #( + .INIT ( 16'h5140 )) + \blk00000003/blk000005c0 ( + .I0(\blk00000003/sig000001cc ), + .I1(\blk00000003/sig000001dd ), + .I2(\blk00000003/sig0000011f ), + .I3(NlwRenamedSig_OI_dout_2[20]), + .O(\blk00000003/sig00000648 ) + ); + LUT4 #( + .INIT ( 16'h5140 )) + \blk00000003/blk000005bf ( + .I0(\blk00000003/sig000001cc ), + .I1(\blk00000003/sig000001dd ), + .I2(\blk00000003/sig00000121 ), + .I3(NlwRenamedSig_OI_dout_2[18]), + .O(\blk00000003/sig00000646 ) + ); + LUT4 #( + .INIT ( 16'h5140 )) + \blk00000003/blk000005be ( + .I0(\blk00000003/sig000001cc ), + .I1(\blk00000003/sig000001dd ), + .I2(\blk00000003/sig00000120 ), + .I3(NlwRenamedSig_OI_dout_2[19]), + .O(\blk00000003/sig00000647 ) + ); + LUT4 #( + .INIT ( 16'h5140 )) + \blk00000003/blk000005bd ( + .I0(\blk00000003/sig000001cc ), + .I1(\blk00000003/sig000001dd ), + .I2(\blk00000003/sig00000122 ), + .I3(NlwRenamedSig_OI_dout_2[17]), + .O(\blk00000003/sig00000645 ) + ); + LUT4 #( + .INIT ( 16'h5140 )) + \blk00000003/blk000005bc ( + .I0(\blk00000003/sig000001cc ), + .I1(\blk00000003/sig000001dd ), + .I2(\blk00000003/sig00000124 ), + .I3(NlwRenamedSig_OI_dout_2[15]), + .O(\blk00000003/sig00000643 ) + ); + LUT4 #( + .INIT ( 16'h5140 )) + \blk00000003/blk000005bb ( + .I0(\blk00000003/sig000001cc ), + .I1(\blk00000003/sig000001dd ), + .I2(\blk00000003/sig00000123 ), + .I3(NlwRenamedSig_OI_dout_2[16]), + .O(\blk00000003/sig00000644 ) + ); + LUT4 #( + .INIT ( 16'h5140 )) + \blk00000003/blk000005ba ( + .I0(\blk00000003/sig000001cc ), + .I1(\blk00000003/sig000001dd ), + .I2(\blk00000003/sig00000125 ), + .I3(NlwRenamedSig_OI_dout_2[14]), + .O(\blk00000003/sig00000642 ) + ); + LUT4 #( + .INIT ( 16'h5140 )) + \blk00000003/blk000005b9 ( + .I0(\blk00000003/sig000001cc ), + .I1(\blk00000003/sig000001dd ), + .I2(\blk00000003/sig00000127 ), + .I3(NlwRenamedSig_OI_dout_2[12]), + .O(\blk00000003/sig00000640 ) + ); + LUT4 #( + .INIT ( 16'h5140 )) + \blk00000003/blk000005b8 ( + .I0(\blk00000003/sig000001cc ), + .I1(\blk00000003/sig000001dd ), + .I2(\blk00000003/sig00000126 ), + .I3(NlwRenamedSig_OI_dout_2[13]), + .O(\blk00000003/sig00000641 ) + ); + LUT4 #( + .INIT ( 16'h5140 )) + \blk00000003/blk000005b7 ( + .I0(\blk00000003/sig000001cc ), + .I1(\blk00000003/sig000001dd ), + .I2(\blk00000003/sig00000128 ), + .I3(NlwRenamedSig_OI_dout_2[11]), + .O(\blk00000003/sig0000063f ) + ); + LUT4 #( + .INIT ( 16'h5140 )) + \blk00000003/blk000005b6 ( + .I0(\blk00000003/sig000001cc ), + .I1(\blk00000003/sig000001dd ), + .I2(\blk00000003/sig0000012a ), + .I3(NlwRenamedSig_OI_dout_2[9]), + .O(\blk00000003/sig0000063d ) + ); + LUT4 #( + .INIT ( 16'h5140 )) + \blk00000003/blk000005b5 ( + .I0(\blk00000003/sig000001cc ), + .I1(\blk00000003/sig000001dd ), + .I2(\blk00000003/sig00000129 ), + .I3(NlwRenamedSig_OI_dout_2[10]), + .O(\blk00000003/sig0000063e ) + ); + LUT4 #( + .INIT ( 16'h5140 )) + \blk00000003/blk000005b4 ( + .I0(\blk00000003/sig000001cc ), + .I1(\blk00000003/sig000001dd ), + .I2(\blk00000003/sig0000012b ), + .I3(NlwRenamedSig_OI_dout_2[8]), + .O(\blk00000003/sig0000063c ) + ); + LUT4 #( + .INIT ( 16'h5140 )) + \blk00000003/blk000005b3 ( + .I0(\blk00000003/sig000001cc ), + .I1(\blk00000003/sig000001dd ), + .I2(\blk00000003/sig0000012d ), + .I3(NlwRenamedSig_OI_dout_2[6]), + .O(\blk00000003/sig0000063a ) + ); + LUT4 #( + .INIT ( 16'h5140 )) + \blk00000003/blk000005b2 ( + .I0(\blk00000003/sig000001cc ), + .I1(\blk00000003/sig000001dd ), + .I2(\blk00000003/sig0000012c ), + .I3(NlwRenamedSig_OI_dout_2[7]), + .O(\blk00000003/sig0000063b ) + ); + LUT4 #( + .INIT ( 16'h5140 )) + \blk00000003/blk000005b1 ( + .I0(\blk00000003/sig000001cc ), + .I1(\blk00000003/sig000001dd ), + .I2(\blk00000003/sig0000012e ), + .I3(NlwRenamedSig_OI_dout_2[5]), + .O(\blk00000003/sig00000639 ) + ); + LUT4 #( + .INIT ( 16'h5140 )) + \blk00000003/blk000005b0 ( + .I0(\blk00000003/sig000001cc ), + .I1(\blk00000003/sig000001dd ), + .I2(\blk00000003/sig00000130 ), + .I3(NlwRenamedSig_OI_dout_2[3]), + .O(\blk00000003/sig00000637 ) + ); + LUT4 #( + .INIT ( 16'h5140 )) + \blk00000003/blk000005af ( + .I0(\blk00000003/sig000001cc ), + .I1(\blk00000003/sig000001dd ), + .I2(\blk00000003/sig0000012f ), + .I3(NlwRenamedSig_OI_dout_2[4]), + .O(\blk00000003/sig00000638 ) + ); + LUT4 #( + .INIT ( 16'h5140 )) + \blk00000003/blk000005ae ( + .I0(\blk00000003/sig000001cc ), + .I1(\blk00000003/sig000001dd ), + .I2(\blk00000003/sig00000131 ), + .I3(NlwRenamedSig_OI_dout_2[2]), + .O(\blk00000003/sig00000636 ) + ); + LUT4 #( + .INIT ( 16'h5140 )) + \blk00000003/blk000005ad ( + .I0(\blk00000003/sig000001cc ), + .I1(\blk00000003/sig000001dd ), + .I2(\blk00000003/sig00000132 ), + .I3(NlwRenamedSig_OI_dout_2[1]), + .O(\blk00000003/sig00000635 ) + ); + LUT4 #( + .INIT ( 16'h5140 )) + \blk00000003/blk000005ac ( + .I0(\blk00000003/sig000001cc ), + .I1(\blk00000003/sig000001dd ), + .I2(\blk00000003/sig0000017c ), + .I3(NlwRenamedSig_OI_dout_1[46]), + .O(\blk00000003/sig00000633 ) + ); + LUT4 #( + .INIT ( 16'h5140 )) + \blk00000003/blk000005ab ( + .I0(\blk00000003/sig000001cc ), + .I1(\blk00000003/sig000001dd ), + .I2(\blk00000003/sig00000133 ), + .I3(NlwRenamedSig_OI_dout_2[0]), + .O(\blk00000003/sig00000634 ) + ); + LUT4 #( + .INIT ( 16'h5140 )) + \blk00000003/blk000005aa ( + .I0(\blk00000003/sig000001cc ), + .I1(\blk00000003/sig000001dd ), + .I2(\blk00000003/sig0000017d ), + .I3(NlwRenamedSig_OI_dout_1[45]), + .O(\blk00000003/sig00000632 ) + ); + LUT4 #( + .INIT ( 16'h5140 )) + \blk00000003/blk000005a9 ( + .I0(\blk00000003/sig000001cc ), + .I1(\blk00000003/sig000001dd ), + .I2(\blk00000003/sig0000017f ), + .I3(NlwRenamedSig_OI_dout_1[43]), + .O(\blk00000003/sig00000630 ) + ); + LUT4 #( + .INIT ( 16'h5140 )) + \blk00000003/blk000005a8 ( + .I0(\blk00000003/sig000001cc ), + .I1(\blk00000003/sig000001dd ), + .I2(\blk00000003/sig0000017e ), + .I3(NlwRenamedSig_OI_dout_1[44]), + .O(\blk00000003/sig00000631 ) + ); + LUT4 #( + .INIT ( 16'h5140 )) + \blk00000003/blk000005a7 ( + .I0(\blk00000003/sig000001cc ), + .I1(\blk00000003/sig000001dd ), + .I2(\blk00000003/sig00000180 ), + .I3(NlwRenamedSig_OI_dout_1[42]), + .O(\blk00000003/sig0000062f ) + ); + LUT4 #( + .INIT ( 16'h5140 )) + \blk00000003/blk000005a6 ( + .I0(\blk00000003/sig000001cc ), + .I1(\blk00000003/sig000001dd ), + .I2(\blk00000003/sig00000182 ), + .I3(NlwRenamedSig_OI_dout_1[40]), + .O(\blk00000003/sig0000062d ) + ); + LUT4 #( + .INIT ( 16'h5140 )) + \blk00000003/blk000005a5 ( + .I0(\blk00000003/sig000001cc ), + .I1(\blk00000003/sig000001dd ), + .I2(\blk00000003/sig00000181 ), + .I3(NlwRenamedSig_OI_dout_1[41]), + .O(\blk00000003/sig0000062e ) + ); + LUT4 #( + .INIT ( 16'h5140 )) + \blk00000003/blk000005a4 ( + .I0(\blk00000003/sig000001cc ), + .I1(\blk00000003/sig000001dd ), + .I2(\blk00000003/sig00000183 ), + .I3(NlwRenamedSig_OI_dout_1[39]), + .O(\blk00000003/sig0000062c ) + ); + LUT4 #( + .INIT ( 16'h5140 )) + \blk00000003/blk000005a3 ( + .I0(\blk00000003/sig000001cc ), + .I1(\blk00000003/sig000001dd ), + .I2(\blk00000003/sig00000185 ), + .I3(NlwRenamedSig_OI_dout_1[37]), + .O(\blk00000003/sig0000062a ) + ); + LUT4 #( + .INIT ( 16'h5140 )) + \blk00000003/blk000005a2 ( + .I0(\blk00000003/sig000001cc ), + .I1(\blk00000003/sig000001dd ), + .I2(\blk00000003/sig00000184 ), + .I3(NlwRenamedSig_OI_dout_1[38]), + .O(\blk00000003/sig0000062b ) + ); + LUT4 #( + .INIT ( 16'h5140 )) + \blk00000003/blk000005a1 ( + .I0(\blk00000003/sig000001cc ), + .I1(\blk00000003/sig000001dd ), + .I2(\blk00000003/sig00000186 ), + .I3(NlwRenamedSig_OI_dout_1[36]), + .O(\blk00000003/sig00000629 ) + ); + LUT4 #( + .INIT ( 16'h5140 )) + \blk00000003/blk000005a0 ( + .I0(\blk00000003/sig000001cc ), + .I1(\blk00000003/sig000001dd ), + .I2(\blk00000003/sig00000188 ), + .I3(NlwRenamedSig_OI_dout_1[34]), + .O(\blk00000003/sig00000627 ) + ); + LUT4 #( + .INIT ( 16'h5140 )) + \blk00000003/blk0000059f ( + .I0(\blk00000003/sig000001cc ), + .I1(\blk00000003/sig000001dd ), + .I2(\blk00000003/sig00000187 ), + .I3(NlwRenamedSig_OI_dout_1[35]), + .O(\blk00000003/sig00000628 ) + ); + LUT4 #( + .INIT ( 16'h5140 )) + \blk00000003/blk0000059e ( + .I0(\blk00000003/sig000001cc ), + .I1(\blk00000003/sig000001dd ), + .I2(\blk00000003/sig00000189 ), + .I3(NlwRenamedSig_OI_dout_1[33]), + .O(\blk00000003/sig00000626 ) + ); + LUT4 #( + .INIT ( 16'h5140 )) + \blk00000003/blk0000059d ( + .I0(\blk00000003/sig000001cc ), + .I1(\blk00000003/sig000001dd ), + .I2(\blk00000003/sig0000018b ), + .I3(NlwRenamedSig_OI_dout_1[31]), + .O(\blk00000003/sig00000624 ) + ); + LUT4 #( + .INIT ( 16'h5140 )) + \blk00000003/blk0000059c ( + .I0(\blk00000003/sig000001cc ), + .I1(\blk00000003/sig000001dd ), + .I2(\blk00000003/sig0000018a ), + .I3(NlwRenamedSig_OI_dout_1[32]), + .O(\blk00000003/sig00000625 ) + ); + LUT4 #( + .INIT ( 16'h5140 )) + \blk00000003/blk0000059b ( + .I0(\blk00000003/sig000001cc ), + .I1(\blk00000003/sig000001dd ), + .I2(\blk00000003/sig0000018c ), + .I3(NlwRenamedSig_OI_dout_1[30]), + .O(\blk00000003/sig00000623 ) + ); + LUT4 #( + .INIT ( 16'h5140 )) + \blk00000003/blk0000059a ( + .I0(\blk00000003/sig000001cc ), + .I1(\blk00000003/sig000001dd ), + .I2(\blk00000003/sig0000018e ), + .I3(NlwRenamedSig_OI_dout_1[28]), + .O(\blk00000003/sig00000621 ) + ); + LUT4 #( + .INIT ( 16'h5140 )) + \blk00000003/blk00000599 ( + .I0(\blk00000003/sig000001cc ), + .I1(\blk00000003/sig000001dd ), + .I2(\blk00000003/sig0000018d ), + .I3(NlwRenamedSig_OI_dout_1[29]), + .O(\blk00000003/sig00000622 ) + ); + LUT4 #( + .INIT ( 16'h5140 )) + \blk00000003/blk00000598 ( + .I0(\blk00000003/sig000001cc ), + .I1(\blk00000003/sig000001dd ), + .I2(\blk00000003/sig0000018f ), + .I3(NlwRenamedSig_OI_dout_1[27]), + .O(\blk00000003/sig00000620 ) + ); + LUT4 #( + .INIT ( 16'h5140 )) + \blk00000003/blk00000597 ( + .I0(\blk00000003/sig000001cc ), + .I1(\blk00000003/sig000001dd ), + .I2(\blk00000003/sig00000191 ), + .I3(NlwRenamedSig_OI_dout_1[25]), + .O(\blk00000003/sig0000061e ) + ); + LUT4 #( + .INIT ( 16'h5140 )) + \blk00000003/blk00000596 ( + .I0(\blk00000003/sig000001cc ), + .I1(\blk00000003/sig000001dd ), + .I2(\blk00000003/sig00000190 ), + .I3(NlwRenamedSig_OI_dout_1[26]), + .O(\blk00000003/sig0000061f ) + ); + LUT4 #( + .INIT ( 16'h5140 )) + \blk00000003/blk00000595 ( + .I0(\blk00000003/sig000001cc ), + .I1(\blk00000003/sig000001dd ), + .I2(\blk00000003/sig00000192 ), + .I3(NlwRenamedSig_OI_dout_1[24]), + .O(\blk00000003/sig0000061d ) + ); + LUT4 #( + .INIT ( 16'h5140 )) + \blk00000003/blk00000594 ( + .I0(\blk00000003/sig000001cc ), + .I1(\blk00000003/sig000001dd ), + .I2(\blk00000003/sig00000194 ), + .I3(NlwRenamedSig_OI_dout_1[22]), + .O(\blk00000003/sig0000061b ) + ); + LUT4 #( + .INIT ( 16'h5140 )) + \blk00000003/blk00000593 ( + .I0(\blk00000003/sig000001cc ), + .I1(\blk00000003/sig000001dd ), + .I2(\blk00000003/sig00000193 ), + .I3(NlwRenamedSig_OI_dout_1[23]), + .O(\blk00000003/sig0000061c ) + ); + LUT4 #( + .INIT ( 16'h5140 )) + \blk00000003/blk00000592 ( + .I0(\blk00000003/sig000001cc ), + .I1(\blk00000003/sig000001dd ), + .I2(\blk00000003/sig00000195 ), + .I3(NlwRenamedSig_OI_dout_1[21]), + .O(\blk00000003/sig0000061a ) + ); + LUT4 #( + .INIT ( 16'h5140 )) + \blk00000003/blk00000591 ( + .I0(\blk00000003/sig000001cc ), + .I1(\blk00000003/sig000001dd ), + .I2(\blk00000003/sig00000197 ), + .I3(NlwRenamedSig_OI_dout_1[19]), + .O(\blk00000003/sig00000618 ) + ); + LUT4 #( + .INIT ( 16'h5140 )) + \blk00000003/blk00000590 ( + .I0(\blk00000003/sig000001cc ), + .I1(\blk00000003/sig000001dd ), + .I2(\blk00000003/sig00000196 ), + .I3(NlwRenamedSig_OI_dout_1[20]), + .O(\blk00000003/sig00000619 ) + ); + LUT4 #( + .INIT ( 16'h5140 )) + \blk00000003/blk0000058f ( + .I0(\blk00000003/sig000001cc ), + .I1(\blk00000003/sig000001dd ), + .I2(\blk00000003/sig00000198 ), + .I3(NlwRenamedSig_OI_dout_1[18]), + .O(\blk00000003/sig00000617 ) + ); + LUT4 #( + .INIT ( 16'h5140 )) + \blk00000003/blk0000058e ( + .I0(\blk00000003/sig000001cc ), + .I1(\blk00000003/sig000001dd ), + .I2(\blk00000003/sig0000019a ), + .I3(NlwRenamedSig_OI_dout_1[16]), + .O(\blk00000003/sig00000615 ) + ); + LUT4 #( + .INIT ( 16'h5140 )) + \blk00000003/blk0000058d ( + .I0(\blk00000003/sig000001cc ), + .I1(\blk00000003/sig000001dd ), + .I2(\blk00000003/sig00000199 ), + .I3(NlwRenamedSig_OI_dout_1[17]), + .O(\blk00000003/sig00000616 ) + ); + LUT4 #( + .INIT ( 16'h5140 )) + \blk00000003/blk0000058c ( + .I0(\blk00000003/sig000001cc ), + .I1(\blk00000003/sig000001dd ), + .I2(\blk00000003/sig0000019b ), + .I3(NlwRenamedSig_OI_dout_1[15]), + .O(\blk00000003/sig00000614 ) + ); + LUT4 #( + .INIT ( 16'h5140 )) + \blk00000003/blk0000058b ( + .I0(\blk00000003/sig000001cc ), + .I1(\blk00000003/sig000001dd ), + .I2(\blk00000003/sig0000019d ), + .I3(NlwRenamedSig_OI_dout_1[13]), + .O(\blk00000003/sig00000612 ) + ); + LUT4 #( + .INIT ( 16'h5140 )) + \blk00000003/blk0000058a ( + .I0(\blk00000003/sig000001cc ), + .I1(\blk00000003/sig000001dd ), + .I2(\blk00000003/sig0000019c ), + .I3(NlwRenamedSig_OI_dout_1[14]), + .O(\blk00000003/sig00000613 ) + ); + LUT4 #( + .INIT ( 16'h5140 )) + \blk00000003/blk00000589 ( + .I0(\blk00000003/sig000001cc ), + .I1(\blk00000003/sig000001dd ), + .I2(\blk00000003/sig0000019e ), + .I3(NlwRenamedSig_OI_dout_1[12]), + .O(\blk00000003/sig00000611 ) + ); + LUT4 #( + .INIT ( 16'h5140 )) + \blk00000003/blk00000588 ( + .I0(\blk00000003/sig000001cc ), + .I1(\blk00000003/sig000001dd ), + .I2(\blk00000003/sig000001a0 ), + .I3(NlwRenamedSig_OI_dout_1[10]), + .O(\blk00000003/sig0000060f ) + ); + LUT4 #( + .INIT ( 16'h5140 )) + \blk00000003/blk00000587 ( + .I0(\blk00000003/sig000001cc ), + .I1(\blk00000003/sig000001dd ), + .I2(\blk00000003/sig0000019f ), + .I3(NlwRenamedSig_OI_dout_1[11]), + .O(\blk00000003/sig00000610 ) + ); + LUT4 #( + .INIT ( 16'h5140 )) + \blk00000003/blk00000586 ( + .I0(\blk00000003/sig000001cc ), + .I1(\blk00000003/sig000001dd ), + .I2(\blk00000003/sig000001a1 ), + .I3(NlwRenamedSig_OI_dout_1[9]), + .O(\blk00000003/sig0000060e ) + ); + LUT4 #( + .INIT ( 16'h5140 )) + \blk00000003/blk00000585 ( + .I0(\blk00000003/sig000001cc ), + .I1(\blk00000003/sig000001dd ), + .I2(\blk00000003/sig000001a3 ), + .I3(NlwRenamedSig_OI_dout_1[7]), + .O(\blk00000003/sig0000060c ) + ); + LUT4 #( + .INIT ( 16'h5140 )) + \blk00000003/blk00000584 ( + .I0(\blk00000003/sig000001cc ), + .I1(\blk00000003/sig000001dd ), + .I2(\blk00000003/sig000001a2 ), + .I3(NlwRenamedSig_OI_dout_1[8]), + .O(\blk00000003/sig0000060d ) + ); + LUT4 #( + .INIT ( 16'h5140 )) + \blk00000003/blk00000583 ( + .I0(\blk00000003/sig000001cc ), + .I1(\blk00000003/sig000001dd ), + .I2(\blk00000003/sig000001a4 ), + .I3(NlwRenamedSig_OI_dout_1[6]), + .O(\blk00000003/sig0000060b ) + ); + LUT4 #( + .INIT ( 16'h5140 )) + \blk00000003/blk00000582 ( + .I0(\blk00000003/sig000001cc ), + .I1(\blk00000003/sig000001dd ), + .I2(\blk00000003/sig000001a6 ), + .I3(NlwRenamedSig_OI_dout_1[4]), + .O(\blk00000003/sig00000609 ) + ); + LUT4 #( + .INIT ( 16'h5140 )) + \blk00000003/blk00000581 ( + .I0(\blk00000003/sig000001cc ), + .I1(\blk00000003/sig000001dd ), + .I2(\blk00000003/sig000001a5 ), + .I3(NlwRenamedSig_OI_dout_1[5]), + .O(\blk00000003/sig0000060a ) + ); + LUT4 #( + .INIT ( 16'h5140 )) + \blk00000003/blk00000580 ( + .I0(\blk00000003/sig000001cc ), + .I1(\blk00000003/sig000001dd ), + .I2(\blk00000003/sig000001a7 ), + .I3(NlwRenamedSig_OI_dout_1[3]), + .O(\blk00000003/sig00000608 ) + ); + LUT4 #( + .INIT ( 16'h5140 )) + \blk00000003/blk0000057f ( + .I0(\blk00000003/sig000001cc ), + .I1(\blk00000003/sig000001dd ), + .I2(\blk00000003/sig000001a9 ), + .I3(NlwRenamedSig_OI_dout_1[1]), + .O(\blk00000003/sig00000606 ) + ); + LUT4 #( + .INIT ( 16'h5140 )) + \blk00000003/blk0000057e ( + .I0(\blk00000003/sig000001cc ), + .I1(\blk00000003/sig000001dd ), + .I2(\blk00000003/sig000001a8 ), + .I3(NlwRenamedSig_OI_dout_1[2]), + .O(\blk00000003/sig00000607 ) + ); + LUT4 #( + .INIT ( 16'h5140 )) + \blk00000003/blk0000057d ( + .I0(\blk00000003/sig000001cc ), + .I1(\blk00000003/sig000001dd ), + .I2(\blk00000003/sig000001aa ), + .I3(NlwRenamedSig_OI_dout_1[0]), + .O(\blk00000003/sig00000605 ) + ); + LUT2 #( + .INIT ( 4'h6 )) + \blk00000003/blk0000057c ( + .I0(\blk00000003/sig00000603 ), + .I1(\blk00000003/sig000005ff ), + .O(\blk00000003/sig000005f1 ) + ); + LUT2 #( + .INIT ( 4'h8 )) + \blk00000003/blk0000057b ( + .I0(ce), + .I1(\blk00000003/sig000001df ), + .O(\blk00000003/sig00000683 ) + ); + LUT2 #( + .INIT ( 4'h8 )) + \blk00000003/blk0000057a ( + .I0(ce), + .I1(\blk00000003/sig000004e4 ), + .O(\blk00000003/sig000005ef ) + ); + LUT2 #( + .INIT ( 4'h8 )) + \blk00000003/blk00000579 ( + .I0(ce), + .I1(\blk00000003/sig00000682 ), + .O(\blk00000003/sig000005ee ) + ); + LUT2 #( + .INIT ( 4'h8 )) + \blk00000003/blk00000578 ( + .I0(ce), + .I1(\blk00000003/sig00000681 ), + .O(\blk00000003/sig000005ed ) + ); + LUT2 #( + .INIT ( 4'h6 )) + \blk00000003/blk00000577 ( + .I0(\blk00000003/sig000002b7 ), + .I1(\blk00000003/sig000002c1 ), + .O(\blk00000003/sig000002b5 ) + ); + LUT2 #( + .INIT ( 4'h6 )) + \blk00000003/blk00000576 ( + .I0(\blk00000003/sig000002c1 ), + .I1(\blk00000003/sig000002b8 ), + .O(\blk00000003/sig000002b2 ) + ); + LUT2 #( + .INIT ( 4'h7 )) + \blk00000003/blk00000575 ( + .I0(\blk00000003/sig000002c1 ), + .I1(\blk00000003/sig00000680 ), + .O(\blk00000003/sig000002af ) + ); + LUT3 #( + .INIT ( 8'hEA )) + \blk00000003/blk00000574 ( + .I0(\blk00000003/sig000002b0 ), + .I1(\blk00000003/sig000002c1 ), + .I2(\blk00000003/sig00000680 ), + .O(\blk00000003/sig000002ad ) + ); + LUT3 #( + .INIT ( 8'hBC )) + \blk00000003/blk00000573 ( + .I0(\blk00000003/sig00000680 ), + .I1(\blk00000003/sig000002c1 ), + .I2(\blk00000003/sig000002b1 ), + .O(\blk00000003/sig000002aa ) + ); + LUT2 #( + .INIT ( 4'hE )) + \blk00000003/blk00000572 ( + .I0(sclr), + .I1(\blk00000003/sig0000067f ), + .O(\blk00000003/sig000002a7 ) + ); + LUT2 #( + .INIT ( 4'h6 )) + \blk00000003/blk00000571 ( + .I0(\blk00000003/sig000002a5 ), + .I1(\blk00000003/sig000001d6 ), + .O(\blk00000003/sig000002a3 ) + ); + LUT3 #( + .INIT ( 8'h7F )) + \blk00000003/blk00000570 ( + .I0(nd), + .I1(\blk00000003/sig00000298 ), + .I2(NlwRenamedSig_OI_rfd), + .O(\blk00000003/sig0000029f ) + ); + LUT4 #( + .INIT ( 16'hEAAA )) + \blk00000003/blk0000056f ( + .I0(\blk00000003/sig000001e6 ), + .I1(nd), + .I2(NlwRenamedSig_OI_rfd), + .I3(\blk00000003/sig00000298 ), + .O(\blk00000003/sig0000029d ) + ); + LUT4 #( + .INIT ( 16'hDFA0 )) + \blk00000003/blk0000056e ( + .I0(nd), + .I1(\blk00000003/sig00000298 ), + .I2(NlwRenamedSig_OI_rfd), + .I3(\blk00000003/sig000001e7 ), + .O(\blk00000003/sig0000029a ) + ); + LUT2 #( + .INIT ( 4'h8 )) + \blk00000003/blk0000056d ( + .I0(nd), + .I1(NlwRenamedSig_OI_rfd), + .O(\blk00000003/sig00000293 ) + ); + LUT3 #( + .INIT ( 8'h09 )) + \blk00000003/blk0000056c ( + .I0(\blk00000003/sig0000067e ), + .I1(\blk00000003/sig000001e6 ), + .I2(\blk00000003/sig000001e7 ), + .O(\blk00000003/sig00000295 ) + ); + LUT2 #( + .INIT ( 4'h7 )) + \blk00000003/blk0000056b ( + .I0(\blk00000003/sig0000023b ), + .I1(\blk00000003/sig00000242 ), + .O(\blk00000003/sig0000028d ) + ); + LUT2 #( + .INIT ( 4'h7 )) + \blk00000003/blk0000056a ( + .I0(\blk00000003/sig00000242 ), + .I1(\blk00000003/sig0000023a ), + .O(\blk00000003/sig0000028a ) + ); + LUT2 #( + .INIT ( 4'h7 )) + \blk00000003/blk00000569 ( + .I0(\blk00000003/sig00000242 ), + .I1(\blk00000003/sig0000023e ), + .O(\blk00000003/sig00000288 ) + ); + LUT3 #( + .INIT ( 8'h7F )) + \blk00000003/blk00000568 ( + .I0(\blk00000003/sig00000240 ), + .I1(\blk00000003/sig00000248 ), + .I2(\blk00000003/sig00000242 ), + .O(\blk00000003/sig00000283 ) + ); + LUT3 #( + .INIT ( 8'h7F )) + \blk00000003/blk00000567 ( + .I0(\blk00000003/sig00000240 ), + .I1(\blk00000003/sig0000023e ), + .I2(\blk00000003/sig00000242 ), + .O(\blk00000003/sig00000285 ) + ); + LUT2 #( + .INIT ( 4'h7 )) + \blk00000003/blk00000566 ( + .I0(\blk00000003/sig0000023b ), + .I1(\blk00000003/sig0000023e ), + .O(\blk00000003/sig0000027c ) + ); + LUT2 #( + .INIT ( 4'h7 )) + \blk00000003/blk00000565 ( + .I0(\blk00000003/sig0000023a ), + .I1(\blk00000003/sig0000023e ), + .O(\blk00000003/sig0000027a ) + ); + LUT3 #( + .INIT ( 8'hDF )) + \blk00000003/blk00000564 ( + .I0(\blk00000003/sig00000238 ), + .I1(\blk00000003/sig00000242 ), + .I2(\blk00000003/sig0000023e ), + .O(\blk00000003/sig00000275 ) + ); + LUT2 #( + .INIT ( 4'h7 )) + \blk00000003/blk00000563 ( + .I0(\blk00000003/sig0000023d ), + .I1(\blk00000003/sig0000023e ), + .O(\blk00000003/sig00000271 ) + ); + LUT3 #( + .INIT ( 8'h7F )) + \blk00000003/blk00000562 ( + .I0(\blk00000003/sig0000023c ), + .I1(\blk00000003/sig0000023e ), + .I2(\blk00000003/sig00000248 ), + .O(\blk00000003/sig00000273 ) + ); + LUT2 #( + .INIT ( 4'hE )) + \blk00000003/blk00000561 ( + .I0(\blk00000003/sig0000024b ), + .I1(\blk00000003/sig0000067d ), + .O(\blk00000003/sig0000026c ) + ); + LUT3 #( + .INIT ( 8'h7F )) + \blk00000003/blk00000560 ( + .I0(coef_we), + .I1(\blk00000003/sig00000222 ), + .I2(\blk00000003/sig00000227 ), + .O(\blk00000003/sig00000260 ) + ); + LUT4 #( + .INIT ( 16'hEAAA )) + \blk00000003/blk0000055f ( + .I0(\blk00000003/sig00000261 ), + .I1(coef_we), + .I2(\blk00000003/sig00000227 ), + .I3(\blk00000003/sig00000222 ), + .O(\blk00000003/sig0000025e ) + ); + LUT4 #( + .INIT ( 16'hE6CC )) + \blk00000003/blk0000055e ( + .I0(coef_we), + .I1(\blk00000003/sig00000262 ), + .I2(\blk00000003/sig00000222 ), + .I3(\blk00000003/sig00000227 ), + .O(\blk00000003/sig0000025b ) + ); + LUT2 #( + .INIT ( 4'h6 )) + \blk00000003/blk0000055d ( + .I0(\blk00000003/sig00000259 ), + .I1(\blk00000003/sig000001c3 ), + .O(\blk00000003/sig00000257 ) + ); + LUT2 #( + .INIT ( 4'h6 )) + \blk00000003/blk0000055c ( + .I0(\blk00000003/sig00000252 ), + .I1(coef_we), + .O(\blk00000003/sig00000250 ) + ); + LUT2 #( + .INIT ( 4'h2 )) + \blk00000003/blk0000055b ( + .I0(coef_ld), + .I1(\blk00000003/sig0000024b ), + .O(\blk00000003/sig00000241 ) + ); + LUT2 #( + .INIT ( 4'h8 )) + \blk00000003/blk0000055a ( + .I0(coef_we), + .I1(\blk00000003/sig00000227 ), + .O(\blk00000003/sig00000223 ) + ); + LUT3 #( + .INIT ( 8'h40 )) + \blk00000003/blk00000559 ( + .I0(coef_ld), + .I1(coef_we), + .I2(\blk00000003/sig00000236 ), + .O(\blk00000003/sig00000249 ) + ); + LUT2 #( + .INIT ( 4'h2 )) + \blk00000003/blk00000558 ( + .I0(\blk00000003/sig00000261 ), + .I1(\blk00000003/sig00000262 ), + .O(\blk00000003/sig0000022d ) + ); + LUT2 #( + .INIT ( 4'h2 )) + \blk00000003/blk00000557 ( + .I0(\blk00000003/sig0000024f ), + .I1(\blk00000003/sig00000252 ), + .O(\blk00000003/sig00000229 ) + ); + LUT2 #( + .INIT ( 4'h2 )) + \blk00000003/blk00000556 ( + .I0(\blk00000003/sig00000262 ), + .I1(\blk00000003/sig00000261 ), + .O(\blk00000003/sig00000225 ) + ); + LUT3 #( + .INIT ( 8'hDF )) + \blk00000003/blk00000555 ( + .I0(coef_ld), + .I1(\blk00000003/sig0000024b ), + .I2(\blk00000003/sig00000234 ), + .O(\blk00000003/sig00000220 ) + ); + LUT3 #( + .INIT ( 8'hDF )) + \blk00000003/blk00000554 ( + .I0(coef_we), + .I1(\blk00000003/sig00000236 ), + .I2(\blk00000003/sig00000234 ), + .O(\blk00000003/sig0000021d ) + ); + LUT5 #( + .INIT ( 32'hFFFF2AAA )) + \blk00000003/blk00000553 ( + .I0(\blk00000003/sig00000236 ), + .I1(coef_we), + .I2(\blk00000003/sig00000227 ), + .I3(\blk00000003/sig00000222 ), + .I4(coef_ld), + .O(\blk00000003/sig00000235 ) + ); + LUT4 #( + .INIT ( 16'hFF8A )) + \blk00000003/blk00000552 ( + .I0(\blk00000003/sig00000234 ), + .I1(\blk00000003/sig00000236 ), + .I2(coef_we), + .I3(coef_ld), + .O(\blk00000003/sig00000233 ) + ); + LUT3 #( + .INIT ( 8'h80 )) + \blk00000003/blk00000551 ( + .I0(nd), + .I1(\blk00000003/sig00000291 ), + .I2(NlwRenamedSig_OI_rfd), + .O(\blk00000003/sig000001e5 ) + ); + LUT2 #( + .INIT ( 4'h8 )) + \blk00000003/blk00000550 ( + .I0(\blk00000003/sig000000bf ), + .I1(\blk00000003/sig000001dd ), + .O(\blk00000003/sig000001e3 ) + ); + LUT3 #( + .INIT ( 8'h10 )) + \blk00000003/blk0000054f ( + .I0(\blk00000003/sig000000bf ), + .I1(\blk00000003/sig000005ff ), + .I2(\blk00000003/sig0000067c ), + .O(\blk00000003/sig000000c0 ) + ); + LUT3 #( + .INIT ( 8'hEA )) + \blk00000003/blk0000054e ( + .I0(sclr), + .I1(ce), + .I2(\blk00000003/sig000005ff ), + .O(\blk00000003/sig000001de ) + ); + LUT2 #( + .INIT ( 4'hD )) + \blk00000003/blk0000054d ( + .I0(NlwRenamedSig_OI_rfd), + .I1(nd), + .O(\blk00000003/sig000001ca ) + ); + LUT2 #( + .INIT ( 4'h2 )) + \blk00000003/blk0000054c ( + .I0(\blk00000003/sig00000256 ), + .I1(\blk00000003/sig00000259 ), + .O(\blk00000003/sig000001c4 ) + ); + LUT5 #( + .INIT ( 32'h00002000 )) + \blk00000003/blk0000054b ( + .I0(\blk00000003/sig00000673 ), + .I1(\blk00000003/sig00000674 ), + .I2(\blk00000003/sig00000675 ), + .I3(\blk00000003/sig00000676 ), + .I4(\blk00000003/sig00000677 ), + .O(\blk00000003/sig000000c2 ) + ); + LUT3 #( + .INIT ( 8'hF4 )) + \blk00000003/blk0000054a ( + .I0(\blk00000003/sig000001d6 ), + .I1(\blk00000003/sig000001c3 ), + .I2(\blk00000003/sig000001e4 ), + .O(\blk00000003/sig000001d5 ) + ); + LUT2 #( + .INIT ( 4'h6 )) + \blk00000003/blk00000549 ( + .I0(\blk00000003/sig000002a6 ), + .I1(\blk00000003/sig000001e2 ), + .O(\blk00000003/sig000001db ) + ); + LUT3 #( + .INIT ( 8'hD8 )) + \blk00000003/blk00000548 ( + .I0(ce), + .I1(\blk00000003/sig00000679 ), + .I2(\blk00000003/sig000000b5 ), + .O(\blk00000003/sig000000b4 ) + ); + LUT3 #( + .INIT ( 8'h72 )) + \blk00000003/blk00000547 ( + .I0(ce), + .I1(\blk00000003/sig00000679 ), + .I2(\blk00000003/sig000000b3 ), + .O(\blk00000003/sig000000b2 ) + ); + LUT4 #( + .INIT ( 16'h8F88 )) + \blk00000003/blk00000546 ( + .I0(NlwRenamedSig_OI_rfd), + .I1(nd), + .I2(\blk00000003/sig000001d8 ), + .I3(\blk00000003/sig000001c6 ), + .O(\blk00000003/sig000001d7 ) + ); + LUT2 #( + .INIT ( 4'h6 )) + \blk00000003/blk00000545 ( + .I0(\blk00000003/sig000000ad ), + .I1(\blk00000003/sig000001c6 ), + .O(\blk00000003/sig000000ae ) + ); + LUT5 #( + .INIT ( 32'hCEEE8AAA )) + \blk00000003/blk00000544 ( + .I0(\blk00000003/sig000001c3 ), + .I1(\blk00000003/sig000001e4 ), + .I2(\blk00000003/sig000001d4 ), + .I3(\blk00000003/sig000001d6 ), + .I4(\blk00000003/sig000001d2 ), + .O(\blk00000003/sig000001d3 ) + ); + LUT4 #( + .INIT ( 16'h8808 )) + \blk00000003/blk00000543 ( + .I0(\blk00000003/sig000001d4 ), + .I1(\blk00000003/sig0000067b ), + .I2(\blk00000003/sig000001d6 ), + .I3(\blk00000003/sig000001e4 ), + .O(\blk00000003/sig000001cf ) + ); + LUT4 #( + .INIT ( 16'h5540 )) + \blk00000003/blk00000542 ( + .I0(\blk00000003/sig000001e4 ), + .I1(\blk00000003/sig000001d4 ), + .I2(\blk00000003/sig000001d6 ), + .I3(\blk00000003/sig000001d2 ), + .O(\blk00000003/sig000001d1 ) + ); + LUT3 #( + .INIT ( 8'h9A )) + \blk00000003/blk00000541 ( + .I0(\blk00000003/sig000002a5 ), + .I1(\blk00000003/sig000002a6 ), + .I2(\blk00000003/sig000001e2 ), + .O(\blk00000003/sig000001d9 ) + ); + LUT4 #( + .INIT ( 16'hFDA8 )) + \blk00000003/blk00000540 ( + .I0(ce), + .I1(\blk00000003/sig00000679 ), + .I2(\blk00000003/sig0000067a ), + .I3(\blk00000003/sig000000b1 ), + .O(\blk00000003/sig000000b0 ) + ); + MUXCY \blk00000003/blk0000053f ( + .CI(\blk00000003/sig00000049 ), + .DI(\blk00000003/sig000000ac ), + .S(\blk00000003/sig00000678 ), + .O(\blk00000003/sig00000670 ) + ); + MUXCY_L \blk00000003/blk0000053e ( + .CI(\blk00000003/sig00000670 ), + .DI(\blk00000003/sig00000677 ), + .S(\blk00000003/sig00000671 ), + .LO(\blk00000003/sig0000066d ) + ); + MUXCY_L \blk00000003/blk0000053d ( + .CI(\blk00000003/sig0000066d ), + .DI(\blk00000003/sig00000676 ), + .S(\blk00000003/sig0000066e ), + .LO(\blk00000003/sig0000066a ) + ); + MUXCY_L \blk00000003/blk0000053c ( + .CI(\blk00000003/sig0000066a ), + .DI(\blk00000003/sig00000675 ), + .S(\blk00000003/sig0000066b ), + .LO(\blk00000003/sig00000667 ) + ); + MUXCY_L \blk00000003/blk0000053b ( + .CI(\blk00000003/sig00000667 ), + .DI(\blk00000003/sig00000674 ), + .S(\blk00000003/sig00000668 ), + .LO(\blk00000003/sig00000664 ) + ); + MUXCY_D \blk00000003/blk0000053a ( + .CI(\blk00000003/sig00000664 ), + .DI(\blk00000003/sig00000673 ), + .S(\blk00000003/sig00000665 ), + .O(\NLW_blk00000003/blk0000053a_O_UNCONNECTED ), + .LO(\NLW_blk00000003/blk0000053a_LO_UNCONNECTED ) + ); + XORCY \blk00000003/blk00000539 ( + .CI(\blk00000003/sig00000670 ), + .LI(\blk00000003/sig00000671 ), + .O(\blk00000003/sig00000672 ) + ); + XORCY \blk00000003/blk00000538 ( + .CI(\blk00000003/sig0000066d ), + .LI(\blk00000003/sig0000066e ), + .O(\blk00000003/sig0000066f ) + ); + XORCY \blk00000003/blk00000537 ( + .CI(\blk00000003/sig0000066a ), + .LI(\blk00000003/sig0000066b ), + .O(\blk00000003/sig0000066c ) + ); + XORCY \blk00000003/blk00000536 ( + .CI(\blk00000003/sig00000667 ), + .LI(\blk00000003/sig00000668 ), + .O(\blk00000003/sig00000669 ) + ); + XORCY \blk00000003/blk00000535 ( + .CI(\blk00000003/sig00000664 ), + .LI(\blk00000003/sig00000665 ), + .O(\blk00000003/sig00000666 ) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000534 ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig00000663 ), + .R(sclr), + .Q(\blk00000003/sig0000004a ) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000533 ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig00000662 ), + .R(sclr), + .Q(NlwRenamedSig_OI_dout_2[46]) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000532 ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig00000661 ), + .R(sclr), + .Q(NlwRenamedSig_OI_dout_2[45]) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000531 ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig00000660 ), + .R(sclr), + .Q(NlwRenamedSig_OI_dout_2[44]) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000530 ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig0000065f ), + .R(sclr), + .Q(NlwRenamedSig_OI_dout_2[43]) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk0000052f ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig0000065e ), + .R(sclr), + .Q(NlwRenamedSig_OI_dout_2[42]) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk0000052e ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig0000065d ), + .R(sclr), + .Q(NlwRenamedSig_OI_dout_2[41]) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk0000052d ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig0000065c ), + .R(sclr), + .Q(NlwRenamedSig_OI_dout_2[40]) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk0000052c ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig0000065b ), + .R(sclr), + .Q(NlwRenamedSig_OI_dout_2[39]) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk0000052b ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig0000065a ), + .R(sclr), + .Q(NlwRenamedSig_OI_dout_2[38]) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk0000052a ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig00000659 ), + .R(sclr), + .Q(NlwRenamedSig_OI_dout_2[37]) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000529 ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig00000658 ), + .R(sclr), + .Q(NlwRenamedSig_OI_dout_2[36]) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000528 ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig00000657 ), + .R(sclr), + .Q(NlwRenamedSig_OI_dout_2[35]) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000527 ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig00000656 ), + .R(sclr), + .Q(NlwRenamedSig_OI_dout_2[34]) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000526 ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig00000655 ), + .R(sclr), + .Q(NlwRenamedSig_OI_dout_2[33]) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000525 ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig00000654 ), + .R(sclr), + .Q(NlwRenamedSig_OI_dout_2[32]) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000524 ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig00000653 ), + .R(sclr), + .Q(NlwRenamedSig_OI_dout_2[31]) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000523 ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig00000652 ), + .R(sclr), + .Q(NlwRenamedSig_OI_dout_2[30]) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000522 ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig00000651 ), + .R(sclr), + .Q(NlwRenamedSig_OI_dout_2[29]) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000521 ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig00000650 ), + .R(sclr), + .Q(NlwRenamedSig_OI_dout_2[28]) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000520 ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig0000064f ), + .R(sclr), + .Q(NlwRenamedSig_OI_dout_2[27]) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk0000051f ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig0000064e ), + .R(sclr), + .Q(NlwRenamedSig_OI_dout_2[26]) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk0000051e ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig0000064d ), + .R(sclr), + .Q(NlwRenamedSig_OI_dout_2[25]) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk0000051d ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig0000064c ), + .R(sclr), + .Q(NlwRenamedSig_OI_dout_2[24]) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk0000051c ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig0000064b ), + .R(sclr), + .Q(NlwRenamedSig_OI_dout_2[23]) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk0000051b ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig0000064a ), + .R(sclr), + .Q(NlwRenamedSig_OI_dout_2[22]) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk0000051a ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig00000649 ), + .R(sclr), + .Q(NlwRenamedSig_OI_dout_2[21]) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000519 ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig00000648 ), + .R(sclr), + .Q(NlwRenamedSig_OI_dout_2[20]) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000518 ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig00000647 ), + .R(sclr), + .Q(NlwRenamedSig_OI_dout_2[19]) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000517 ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig00000646 ), + .R(sclr), + .Q(NlwRenamedSig_OI_dout_2[18]) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000516 ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig00000645 ), + .R(sclr), + .Q(NlwRenamedSig_OI_dout_2[17]) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000515 ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig00000644 ), + .R(sclr), + .Q(NlwRenamedSig_OI_dout_2[16]) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000514 ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig00000643 ), + .R(sclr), + .Q(NlwRenamedSig_OI_dout_2[15]) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000513 ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig00000642 ), + .R(sclr), + .Q(NlwRenamedSig_OI_dout_2[14]) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000512 ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig00000641 ), + .R(sclr), + .Q(NlwRenamedSig_OI_dout_2[13]) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000511 ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig00000640 ), + .R(sclr), + .Q(NlwRenamedSig_OI_dout_2[12]) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000510 ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig0000063f ), + .R(sclr), + .Q(NlwRenamedSig_OI_dout_2[11]) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk0000050f ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig0000063e ), + .R(sclr), + .Q(NlwRenamedSig_OI_dout_2[10]) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk0000050e ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig0000063d ), + .R(sclr), + .Q(NlwRenamedSig_OI_dout_2[9]) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk0000050d ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig0000063c ), + .R(sclr), + .Q(NlwRenamedSig_OI_dout_2[8]) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk0000050c ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig0000063b ), + .R(sclr), + .Q(NlwRenamedSig_OI_dout_2[7]) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk0000050b ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig0000063a ), + .R(sclr), + .Q(NlwRenamedSig_OI_dout_2[6]) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk0000050a ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig00000639 ), + .R(sclr), + .Q(NlwRenamedSig_OI_dout_2[5]) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000509 ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig00000638 ), + .R(sclr), + .Q(NlwRenamedSig_OI_dout_2[4]) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000508 ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig00000637 ), + .R(sclr), + .Q(NlwRenamedSig_OI_dout_2[3]) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000507 ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig00000636 ), + .R(sclr), + .Q(NlwRenamedSig_OI_dout_2[2]) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000506 ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig00000635 ), + .R(sclr), + .Q(NlwRenamedSig_OI_dout_2[1]) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000505 ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig00000634 ), + .R(sclr), + .Q(NlwRenamedSig_OI_dout_2[0]) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000504 ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig00000633 ), + .R(sclr), + .Q(NlwRenamedSig_OI_dout_1[46]) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000503 ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig00000632 ), + .R(sclr), + .Q(NlwRenamedSig_OI_dout_1[45]) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000502 ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig00000631 ), + .R(sclr), + .Q(NlwRenamedSig_OI_dout_1[44]) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000501 ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig00000630 ), + .R(sclr), + .Q(NlwRenamedSig_OI_dout_1[43]) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000500 ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig0000062f ), + .R(sclr), + .Q(NlwRenamedSig_OI_dout_1[42]) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk000004ff ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig0000062e ), + .R(sclr), + .Q(NlwRenamedSig_OI_dout_1[41]) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk000004fe ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig0000062d ), + .R(sclr), + .Q(NlwRenamedSig_OI_dout_1[40]) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk000004fd ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig0000062c ), + .R(sclr), + .Q(NlwRenamedSig_OI_dout_1[39]) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk000004fc ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig0000062b ), + .R(sclr), + .Q(NlwRenamedSig_OI_dout_1[38]) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk000004fb ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig0000062a ), + .R(sclr), + .Q(NlwRenamedSig_OI_dout_1[37]) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk000004fa ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig00000629 ), + .R(sclr), + .Q(NlwRenamedSig_OI_dout_1[36]) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk000004f9 ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig00000628 ), + .R(sclr), + .Q(NlwRenamedSig_OI_dout_1[35]) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk000004f8 ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig00000627 ), + .R(sclr), + .Q(NlwRenamedSig_OI_dout_1[34]) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk000004f7 ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig00000626 ), + .R(sclr), + .Q(NlwRenamedSig_OI_dout_1[33]) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk000004f6 ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig00000625 ), + .R(sclr), + .Q(NlwRenamedSig_OI_dout_1[32]) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk000004f5 ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig00000624 ), + .R(sclr), + .Q(NlwRenamedSig_OI_dout_1[31]) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk000004f4 ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig00000623 ), + .R(sclr), + .Q(NlwRenamedSig_OI_dout_1[30]) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk000004f3 ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig00000622 ), + .R(sclr), + .Q(NlwRenamedSig_OI_dout_1[29]) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk000004f2 ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig00000621 ), + .R(sclr), + .Q(NlwRenamedSig_OI_dout_1[28]) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk000004f1 ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig00000620 ), + .R(sclr), + .Q(NlwRenamedSig_OI_dout_1[27]) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk000004f0 ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig0000061f ), + .R(sclr), + .Q(NlwRenamedSig_OI_dout_1[26]) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk000004ef ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig0000061e ), + .R(sclr), + .Q(NlwRenamedSig_OI_dout_1[25]) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk000004ee ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig0000061d ), + .R(sclr), + .Q(NlwRenamedSig_OI_dout_1[24]) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk000004ed ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig0000061c ), + .R(sclr), + .Q(NlwRenamedSig_OI_dout_1[23]) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk000004ec ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig0000061b ), + .R(sclr), + .Q(NlwRenamedSig_OI_dout_1[22]) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk000004eb ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig0000061a ), + .R(sclr), + .Q(NlwRenamedSig_OI_dout_1[21]) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk000004ea ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig00000619 ), + .R(sclr), + .Q(NlwRenamedSig_OI_dout_1[20]) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk000004e9 ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig00000618 ), + .R(sclr), + .Q(NlwRenamedSig_OI_dout_1[19]) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk000004e8 ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig00000617 ), + .R(sclr), + .Q(NlwRenamedSig_OI_dout_1[18]) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk000004e7 ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig00000616 ), + .R(sclr), + .Q(NlwRenamedSig_OI_dout_1[17]) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk000004e6 ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig00000615 ), + .R(sclr), + .Q(NlwRenamedSig_OI_dout_1[16]) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk000004e5 ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig00000614 ), + .R(sclr), + .Q(NlwRenamedSig_OI_dout_1[15]) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk000004e4 ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig00000613 ), + .R(sclr), + .Q(NlwRenamedSig_OI_dout_1[14]) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk000004e3 ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig00000612 ), + .R(sclr), + .Q(NlwRenamedSig_OI_dout_1[13]) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk000004e2 ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig00000611 ), + .R(sclr), + .Q(NlwRenamedSig_OI_dout_1[12]) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk000004e1 ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig00000610 ), + .R(sclr), + .Q(NlwRenamedSig_OI_dout_1[11]) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk000004e0 ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig0000060f ), + .R(sclr), + .Q(NlwRenamedSig_OI_dout_1[10]) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk000004df ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig0000060e ), + .R(sclr), + .Q(NlwRenamedSig_OI_dout_1[9]) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk000004de ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig0000060d ), + .R(sclr), + .Q(NlwRenamedSig_OI_dout_1[8]) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk000004dd ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig0000060c ), + .R(sclr), + .Q(NlwRenamedSig_OI_dout_1[7]) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk000004dc ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig0000060b ), + .R(sclr), + .Q(NlwRenamedSig_OI_dout_1[6]) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk000004db ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig0000060a ), + .R(sclr), + .Q(NlwRenamedSig_OI_dout_1[5]) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk000004da ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig00000609 ), + .R(sclr), + .Q(NlwRenamedSig_OI_dout_1[4]) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk000004d9 ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig00000608 ), + .R(sclr), + .Q(NlwRenamedSig_OI_dout_1[3]) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk000004d8 ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig00000607 ), + .R(sclr), + .Q(NlwRenamedSig_OI_dout_1[2]) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk000004d7 ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig00000606 ), + .R(sclr), + .Q(NlwRenamedSig_OI_dout_1[1]) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk000004d6 ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig00000605 ), + .R(sclr), + .Q(NlwRenamedSig_OI_dout_1[0]) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000004d5 ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig00000604 ), + .Q(\blk00000003/sig000001dd ) + ); + MUXCY_L \blk00000003/blk000004d4 ( + .CI(\blk00000003/sig00000049 ), + .DI(\blk00000003/sig00000603 ), + .S(\blk00000003/sig000005f1 ), + .LO(\blk00000003/sig000005fc ) + ); + MUXCY_L \blk00000003/blk000004d3 ( + .CI(\blk00000003/sig000005fc ), + .DI(\blk00000003/sig00000602 ), + .S(\blk00000003/sig000005fd ), + .LO(\blk00000003/sig000005f9 ) + ); + MUXCY_L \blk00000003/blk000004d2 ( + .CI(\blk00000003/sig000005f9 ), + .DI(\blk00000003/sig00000601 ), + .S(\blk00000003/sig000005fa ), + .LO(\blk00000003/sig000005f6 ) + ); + MUXCY_L \blk00000003/blk000004d1 ( + .CI(\blk00000003/sig000005f6 ), + .DI(\blk00000003/sig00000600 ), + .S(\blk00000003/sig000005f7 ), + .LO(\blk00000003/sig000005f3 ) + ); + MUXCY_D \blk00000003/blk000004d0 ( + .CI(\blk00000003/sig000005f3 ), + .DI(\blk00000003/sig000005ff ), + .S(\blk00000003/sig000005f4 ), + .O(\NLW_blk00000003/blk000004d0_O_UNCONNECTED ), + .LO(\NLW_blk00000003/blk000004d0_LO_UNCONNECTED ) + ); + XORCY \blk00000003/blk000004cf ( + .CI(\blk00000003/sig000005fc ), + .LI(\blk00000003/sig000005fd ), + .O(\blk00000003/sig000005fe ) + ); + XORCY \blk00000003/blk000004ce ( + .CI(\blk00000003/sig000005f9 ), + .LI(\blk00000003/sig000005fa ), + .O(\blk00000003/sig000005fb ) + ); + XORCY \blk00000003/blk000004cd ( + .CI(\blk00000003/sig000005f6 ), + .LI(\blk00000003/sig000005f7 ), + .O(\blk00000003/sig000005f8 ) + ); + XORCY \blk00000003/blk000004cc ( + .CI(\blk00000003/sig000005f3 ), + .LI(\blk00000003/sig000005f4 ), + .O(\blk00000003/sig000005f5 ) + ); + XORCY \blk00000003/blk000004cb ( + .CI(\blk00000003/sig00000049 ), + .LI(\blk00000003/sig000005f1 ), + .O(\blk00000003/sig000005f2 ) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk000004a3 ( + .C(clk), + .CE(\blk00000003/sig000005ef ), + .D(\blk00000003/sig000003f0 ), + .R(sclr), + .Q(\blk00000003/sig0000050e ) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk000004a2 ( + .C(clk), + .CE(\blk00000003/sig000005ef ), + .D(\blk00000003/sig000003ef ), + .R(sclr), + .Q(\blk00000003/sig0000050d ) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk000004a1 ( + .C(clk), + .CE(\blk00000003/sig000005ef ), + .D(\blk00000003/sig000003ee ), + .R(sclr), + .Q(\blk00000003/sig0000050c ) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk000004a0 ( + .C(clk), + .CE(\blk00000003/sig000005ef ), + .D(\blk00000003/sig000003ed ), + .R(sclr), + .Q(\blk00000003/sig0000050b ) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk0000049f ( + .C(clk), + .CE(\blk00000003/sig000005ef ), + .D(\blk00000003/sig000003ec ), + .R(sclr), + .Q(\blk00000003/sig0000050a ) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk0000049e ( + .C(clk), + .CE(\blk00000003/sig000005ef ), + .D(\blk00000003/sig000003eb ), + .R(sclr), + .Q(\blk00000003/sig00000509 ) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk0000049d ( + .C(clk), + .CE(\blk00000003/sig000005ef ), + .D(\blk00000003/sig000003ea ), + .R(sclr), + .Q(\blk00000003/sig00000508 ) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk0000049c ( + .C(clk), + .CE(\blk00000003/sig000005ef ), + .D(\blk00000003/sig000003e9 ), + .R(sclr), + .Q(\blk00000003/sig00000507 ) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk0000049b ( + .C(clk), + .CE(\blk00000003/sig000005ef ), + .D(\blk00000003/sig000003e8 ), + .R(sclr), + .Q(\blk00000003/sig00000506 ) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk0000049a ( + .C(clk), + .CE(\blk00000003/sig000005ef ), + .D(\blk00000003/sig000003e7 ), + .R(sclr), + .Q(\blk00000003/sig00000505 ) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000499 ( + .C(clk), + .CE(\blk00000003/sig000005ef ), + .D(\blk00000003/sig000003e6 ), + .R(sclr), + .Q(\blk00000003/sig00000504 ) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000498 ( + .C(clk), + .CE(\blk00000003/sig000005ef ), + .D(\blk00000003/sig000003e5 ), + .R(sclr), + .Q(\blk00000003/sig00000503 ) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000497 ( + .C(clk), + .CE(\blk00000003/sig000005ef ), + .D(\blk00000003/sig000003e4 ), + .R(sclr), + .Q(\blk00000003/sig00000502 ) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000496 ( + .C(clk), + .CE(\blk00000003/sig000005ef ), + .D(\blk00000003/sig000003e3 ), + .R(sclr), + .Q(\blk00000003/sig00000501 ) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000495 ( + .C(clk), + .CE(\blk00000003/sig000005ef ), + .D(\blk00000003/sig000003e2 ), + .R(sclr), + .Q(\blk00000003/sig00000500 ) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000494 ( + .C(clk), + .CE(\blk00000003/sig000005ef ), + .D(\blk00000003/sig000003e1 ), + .R(sclr), + .Q(\blk00000003/sig000004ff ) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000493 ( + .C(clk), + .CE(\blk00000003/sig000005ef ), + .D(\blk00000003/sig000003e0 ), + .R(sclr), + .Q(\blk00000003/sig000004fe ) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000492 ( + .C(clk), + .CE(\blk00000003/sig000005ef ), + .D(\blk00000003/sig000003df ), + .R(sclr), + .Q(\blk00000003/sig000004fd ) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000491 ( + .C(clk), + .CE(\blk00000003/sig000005ef ), + .D(\blk00000003/sig000003de ), + .R(sclr), + .Q(\blk00000003/sig000004fc ) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000490 ( + .C(clk), + .CE(\blk00000003/sig000005ef ), + .D(\blk00000003/sig000003dd ), + .R(sclr), + .Q(\blk00000003/sig000004fb ) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk0000048f ( + .C(clk), + .CE(\blk00000003/sig000005ef ), + .D(\blk00000003/sig000003dc ), + .R(sclr), + .Q(\blk00000003/sig000004fa ) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk0000048e ( + .C(clk), + .CE(\blk00000003/sig000005ef ), + .D(\blk00000003/sig000003db ), + .R(sclr), + .Q(\blk00000003/sig000004f9 ) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk0000048d ( + .C(clk), + .CE(\blk00000003/sig000005ef ), + .D(\blk00000003/sig000003da ), + .R(sclr), + .Q(\blk00000003/sig000004f8 ) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk0000048c ( + .C(clk), + .CE(\blk00000003/sig000005ef ), + .D(\blk00000003/sig000003d9 ), + .R(sclr), + .Q(\blk00000003/sig000004f7 ) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk0000048b ( + .C(clk), + .CE(\blk00000003/sig000005ef ), + .D(\blk00000003/sig00000450 ), + .R(sclr), + .Q(\blk00000003/sig00000526 ) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk0000048a ( + .C(clk), + .CE(\blk00000003/sig000005ef ), + .D(\blk00000003/sig0000044f ), + .R(sclr), + .Q(\blk00000003/sig00000525 ) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000489 ( + .C(clk), + .CE(\blk00000003/sig000005ef ), + .D(\blk00000003/sig0000044e ), + .R(sclr), + .Q(\blk00000003/sig00000524 ) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000488 ( + .C(clk), + .CE(\blk00000003/sig000005ef ), + .D(\blk00000003/sig0000044d ), + .R(sclr), + .Q(\blk00000003/sig00000523 ) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000487 ( + .C(clk), + .CE(\blk00000003/sig000005ef ), + .D(\blk00000003/sig0000044c ), + .R(sclr), + .Q(\blk00000003/sig00000522 ) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000486 ( + .C(clk), + .CE(\blk00000003/sig000005ef ), + .D(\blk00000003/sig0000044b ), + .R(sclr), + .Q(\blk00000003/sig00000521 ) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000485 ( + .C(clk), + .CE(\blk00000003/sig000005ef ), + .D(\blk00000003/sig0000044a ), + .R(sclr), + .Q(\blk00000003/sig00000520 ) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000484 ( + .C(clk), + .CE(\blk00000003/sig000005ef ), + .D(\blk00000003/sig00000449 ), + .R(sclr), + .Q(\blk00000003/sig0000051f ) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000483 ( + .C(clk), + .CE(\blk00000003/sig000005ef ), + .D(\blk00000003/sig00000448 ), + .R(sclr), + .Q(\blk00000003/sig0000051e ) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000482 ( + .C(clk), + .CE(\blk00000003/sig000005ef ), + .D(\blk00000003/sig00000447 ), + .R(sclr), + .Q(\blk00000003/sig0000051d ) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000481 ( + .C(clk), + .CE(\blk00000003/sig000005ef ), + .D(\blk00000003/sig00000446 ), + .R(sclr), + .Q(\blk00000003/sig0000051c ) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000480 ( + .C(clk), + .CE(\blk00000003/sig000005ef ), + .D(\blk00000003/sig00000445 ), + .R(sclr), + .Q(\blk00000003/sig0000051b ) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk0000047f ( + .C(clk), + .CE(\blk00000003/sig000005ef ), + .D(\blk00000003/sig00000444 ), + .R(sclr), + .Q(\blk00000003/sig0000051a ) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk0000047e ( + .C(clk), + .CE(\blk00000003/sig000005ef ), + .D(\blk00000003/sig00000443 ), + .R(sclr), + .Q(\blk00000003/sig00000519 ) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk0000047d ( + .C(clk), + .CE(\blk00000003/sig000005ef ), + .D(\blk00000003/sig00000442 ), + .R(sclr), + .Q(\blk00000003/sig00000518 ) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk0000047c ( + .C(clk), + .CE(\blk00000003/sig000005ef ), + .D(\blk00000003/sig00000441 ), + .R(sclr), + .Q(\blk00000003/sig00000517 ) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk0000047b ( + .C(clk), + .CE(\blk00000003/sig000005ef ), + .D(\blk00000003/sig00000440 ), + .R(sclr), + .Q(\blk00000003/sig00000516 ) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk0000047a ( + .C(clk), + .CE(\blk00000003/sig000005ef ), + .D(\blk00000003/sig0000043f ), + .R(sclr), + .Q(\blk00000003/sig00000515 ) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000479 ( + .C(clk), + .CE(\blk00000003/sig000005ef ), + .D(\blk00000003/sig0000043e ), + .R(sclr), + .Q(\blk00000003/sig00000514 ) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000478 ( + .C(clk), + .CE(\blk00000003/sig000005ef ), + .D(\blk00000003/sig0000043d ), + .R(sclr), + .Q(\blk00000003/sig00000513 ) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000477 ( + .C(clk), + .CE(\blk00000003/sig000005ef ), + .D(\blk00000003/sig0000043c ), + .R(sclr), + .Q(\blk00000003/sig00000512 ) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000476 ( + .C(clk), + .CE(\blk00000003/sig000005ef ), + .D(\blk00000003/sig0000043b ), + .R(sclr), + .Q(\blk00000003/sig00000511 ) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000475 ( + .C(clk), + .CE(\blk00000003/sig000005ef ), + .D(\blk00000003/sig0000043a ), + .R(sclr), + .Q(\blk00000003/sig00000510 ) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000474 ( + .C(clk), + .CE(\blk00000003/sig000005ef ), + .D(\blk00000003/sig00000439 ), + .R(sclr), + .Q(\blk00000003/sig0000050f ) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk0000044c ( + .C(clk), + .CE(\blk00000003/sig000005ee ), + .D(\blk00000003/sig000004aa ), + .R(sclr), + .Q(\blk00000003/sig00000586 ) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk0000044b ( + .C(clk), + .CE(\blk00000003/sig000005ee ), + .D(\blk00000003/sig000004a9 ), + .R(sclr), + .Q(\blk00000003/sig00000585 ) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk0000044a ( + .C(clk), + .CE(\blk00000003/sig000005ee ), + .D(\blk00000003/sig000004a8 ), + .R(sclr), + .Q(\blk00000003/sig00000584 ) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000449 ( + .C(clk), + .CE(\blk00000003/sig000005ee ), + .D(\blk00000003/sig000004a7 ), + .R(sclr), + .Q(\blk00000003/sig00000583 ) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000448 ( + .C(clk), + .CE(\blk00000003/sig000005ee ), + .D(\blk00000003/sig000004a6 ), + .R(sclr), + .Q(\blk00000003/sig00000582 ) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000447 ( + .C(clk), + .CE(\blk00000003/sig000005ee ), + .D(\blk00000003/sig000004a5 ), + .R(sclr), + .Q(\blk00000003/sig00000581 ) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000446 ( + .C(clk), + .CE(\blk00000003/sig000005ee ), + .D(\blk00000003/sig000004a4 ), + .R(sclr), + .Q(\blk00000003/sig00000580 ) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000445 ( + .C(clk), + .CE(\blk00000003/sig000005ee ), + .D(\blk00000003/sig000004a3 ), + .R(sclr), + .Q(\blk00000003/sig0000057f ) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000444 ( + .C(clk), + .CE(\blk00000003/sig000005ee ), + .D(\blk00000003/sig000004a2 ), + .R(sclr), + .Q(\blk00000003/sig0000057e ) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000443 ( + .C(clk), + .CE(\blk00000003/sig000005ee ), + .D(\blk00000003/sig000004a1 ), + .R(sclr), + .Q(\blk00000003/sig0000057d ) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000442 ( + .C(clk), + .CE(\blk00000003/sig000005ee ), + .D(\blk00000003/sig000004a0 ), + .R(sclr), + .Q(\blk00000003/sig0000057c ) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000441 ( + .C(clk), + .CE(\blk00000003/sig000005ee ), + .D(\blk00000003/sig0000049f ), + .R(sclr), + .Q(\blk00000003/sig0000057b ) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000440 ( + .C(clk), + .CE(\blk00000003/sig000005ee ), + .D(\blk00000003/sig0000049e ), + .R(sclr), + .Q(\blk00000003/sig0000057a ) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk0000043f ( + .C(clk), + .CE(\blk00000003/sig000005ee ), + .D(\blk00000003/sig0000049d ), + .R(sclr), + .Q(\blk00000003/sig00000579 ) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk0000043e ( + .C(clk), + .CE(\blk00000003/sig000005ee ), + .D(\blk00000003/sig0000049c ), + .R(sclr), + .Q(\blk00000003/sig00000578 ) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk0000043d ( + .C(clk), + .CE(\blk00000003/sig000005ee ), + .D(\blk00000003/sig0000049b ), + .R(sclr), + .Q(\blk00000003/sig00000577 ) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk0000043c ( + .C(clk), + .CE(\blk00000003/sig000005ee ), + .D(\blk00000003/sig0000049a ), + .R(sclr), + .Q(\blk00000003/sig00000576 ) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk0000043b ( + .C(clk), + .CE(\blk00000003/sig000005ee ), + .D(\blk00000003/sig00000499 ), + .R(sclr), + .Q(\blk00000003/sig00000575 ) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk0000043a ( + .C(clk), + .CE(\blk00000003/sig000005ee ), + .D(\blk00000003/sig00000498 ), + .R(sclr), + .Q(\blk00000003/sig00000574 ) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000439 ( + .C(clk), + .CE(\blk00000003/sig000005ee ), + .D(\blk00000003/sig00000497 ), + .R(sclr), + .Q(\blk00000003/sig00000573 ) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000438 ( + .C(clk), + .CE(\blk00000003/sig000005ee ), + .D(\blk00000003/sig00000496 ), + .R(sclr), + .Q(\blk00000003/sig00000572 ) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000437 ( + .C(clk), + .CE(\blk00000003/sig000005ee ), + .D(\blk00000003/sig00000495 ), + .R(sclr), + .Q(\blk00000003/sig00000571 ) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000436 ( + .C(clk), + .CE(\blk00000003/sig000005ee ), + .D(\blk00000003/sig00000494 ), + .R(sclr), + .Q(\blk00000003/sig00000570 ) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000435 ( + .C(clk), + .CE(\blk00000003/sig000005ee ), + .D(\blk00000003/sig00000493 ), + .R(sclr), + .Q(\blk00000003/sig0000056f ) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000434 ( + .C(clk), + .CE(\blk00000003/sig000005ed ), + .D(\blk00000003/sig00000408 ), + .R(sclr), + .Q(\blk00000003/sig0000053e ) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000433 ( + .C(clk), + .CE(\blk00000003/sig000005ed ), + .D(\blk00000003/sig00000407 ), + .R(sclr), + .Q(\blk00000003/sig0000053d ) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000432 ( + .C(clk), + .CE(\blk00000003/sig000005ed ), + .D(\blk00000003/sig00000406 ), + .R(sclr), + .Q(\blk00000003/sig0000053c ) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000431 ( + .C(clk), + .CE(\blk00000003/sig000005ed ), + .D(\blk00000003/sig00000405 ), + .R(sclr), + .Q(\blk00000003/sig0000053b ) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000430 ( + .C(clk), + .CE(\blk00000003/sig000005ed ), + .D(\blk00000003/sig00000404 ), + .R(sclr), + .Q(\blk00000003/sig0000053a ) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk0000042f ( + .C(clk), + .CE(\blk00000003/sig000005ed ), + .D(\blk00000003/sig00000403 ), + .R(sclr), + .Q(\blk00000003/sig00000539 ) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk0000042e ( + .C(clk), + .CE(\blk00000003/sig000005ed ), + .D(\blk00000003/sig00000402 ), + .R(sclr), + .Q(\blk00000003/sig00000538 ) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk0000042d ( + .C(clk), + .CE(\blk00000003/sig000005ed ), + .D(\blk00000003/sig00000401 ), + .R(sclr), + .Q(\blk00000003/sig00000537 ) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk0000042c ( + .C(clk), + .CE(\blk00000003/sig000005ed ), + .D(\blk00000003/sig00000400 ), + .R(sclr), + .Q(\blk00000003/sig00000536 ) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk0000042b ( + .C(clk), + .CE(\blk00000003/sig000005ed ), + .D(\blk00000003/sig000003ff ), + .R(sclr), + .Q(\blk00000003/sig00000535 ) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk0000042a ( + .C(clk), + .CE(\blk00000003/sig000005ed ), + .D(\blk00000003/sig000003fe ), + .R(sclr), + .Q(\blk00000003/sig00000534 ) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000429 ( + .C(clk), + .CE(\blk00000003/sig000005ed ), + .D(\blk00000003/sig000003fd ), + .R(sclr), + .Q(\blk00000003/sig00000533 ) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000428 ( + .C(clk), + .CE(\blk00000003/sig000005ed ), + .D(\blk00000003/sig000003fc ), + .R(sclr), + .Q(\blk00000003/sig00000532 ) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000427 ( + .C(clk), + .CE(\blk00000003/sig000005ed ), + .D(\blk00000003/sig000003fb ), + .R(sclr), + .Q(\blk00000003/sig00000531 ) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000426 ( + .C(clk), + .CE(\blk00000003/sig000005ed ), + .D(\blk00000003/sig000003fa ), + .R(sclr), + .Q(\blk00000003/sig00000530 ) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000425 ( + .C(clk), + .CE(\blk00000003/sig000005ed ), + .D(\blk00000003/sig000003f9 ), + .R(sclr), + .Q(\blk00000003/sig0000052f ) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000424 ( + .C(clk), + .CE(\blk00000003/sig000005ed ), + .D(\blk00000003/sig000003f8 ), + .R(sclr), + .Q(\blk00000003/sig0000052e ) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000423 ( + .C(clk), + .CE(\blk00000003/sig000005ed ), + .D(\blk00000003/sig000003f7 ), + .R(sclr), + .Q(\blk00000003/sig0000052d ) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000422 ( + .C(clk), + .CE(\blk00000003/sig000005ed ), + .D(\blk00000003/sig000003f6 ), + .R(sclr), + .Q(\blk00000003/sig0000052c ) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000421 ( + .C(clk), + .CE(\blk00000003/sig000005ed ), + .D(\blk00000003/sig000003f5 ), + .R(sclr), + .Q(\blk00000003/sig0000052b ) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000420 ( + .C(clk), + .CE(\blk00000003/sig000005ed ), + .D(\blk00000003/sig000003f4 ), + .R(sclr), + .Q(\blk00000003/sig0000052a ) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk0000041f ( + .C(clk), + .CE(\blk00000003/sig000005ed ), + .D(\blk00000003/sig000003f3 ), + .R(sclr), + .Q(\blk00000003/sig00000529 ) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk0000041e ( + .C(clk), + .CE(\blk00000003/sig000005ed ), + .D(\blk00000003/sig000003f2 ), + .R(sclr), + .Q(\blk00000003/sig00000528 ) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk0000041d ( + .C(clk), + .CE(\blk00000003/sig000005ed ), + .D(\blk00000003/sig000003f1 ), + .R(sclr), + .Q(\blk00000003/sig00000527 ) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk0000041c ( + .C(clk), + .CE(\blk00000003/sig000005ee ), + .D(\blk00000003/sig000004da ), + .R(sclr), + .Q(\blk00000003/sig000005b6 ) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk0000041b ( + .C(clk), + .CE(\blk00000003/sig000005ee ), + .D(\blk00000003/sig000004d9 ), + .R(sclr), + .Q(\blk00000003/sig000005b5 ) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk0000041a ( + .C(clk), + .CE(\blk00000003/sig000005ee ), + .D(\blk00000003/sig000004d8 ), + .R(sclr), + .Q(\blk00000003/sig000005b4 ) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000419 ( + .C(clk), + .CE(\blk00000003/sig000005ee ), + .D(\blk00000003/sig000004d7 ), + .R(sclr), + .Q(\blk00000003/sig000005b3 ) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000418 ( + .C(clk), + .CE(\blk00000003/sig000005ee ), + .D(\blk00000003/sig000004d6 ), + .R(sclr), + .Q(\blk00000003/sig000005b2 ) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000417 ( + .C(clk), + .CE(\blk00000003/sig000005ee ), + .D(\blk00000003/sig000004d5 ), + .R(sclr), + .Q(\blk00000003/sig000005b1 ) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000416 ( + .C(clk), + .CE(\blk00000003/sig000005ee ), + .D(\blk00000003/sig000004d4 ), + .R(sclr), + .Q(\blk00000003/sig000005b0 ) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000415 ( + .C(clk), + .CE(\blk00000003/sig000005ee ), + .D(\blk00000003/sig000004d3 ), + .R(sclr), + .Q(\blk00000003/sig000005af ) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000414 ( + .C(clk), + .CE(\blk00000003/sig000005ee ), + .D(\blk00000003/sig000004d2 ), + .R(sclr), + .Q(\blk00000003/sig000005ae ) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000413 ( + .C(clk), + .CE(\blk00000003/sig000005ee ), + .D(\blk00000003/sig000004d1 ), + .R(sclr), + .Q(\blk00000003/sig000005ad ) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000412 ( + .C(clk), + .CE(\blk00000003/sig000005ee ), + .D(\blk00000003/sig000004d0 ), + .R(sclr), + .Q(\blk00000003/sig000005ac ) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000411 ( + .C(clk), + .CE(\blk00000003/sig000005ee ), + .D(\blk00000003/sig000004cf ), + .R(sclr), + .Q(\blk00000003/sig000005ab ) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000410 ( + .C(clk), + .CE(\blk00000003/sig000005ee ), + .D(\blk00000003/sig000004ce ), + .R(sclr), + .Q(\blk00000003/sig000005aa ) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk0000040f ( + .C(clk), + .CE(\blk00000003/sig000005ee ), + .D(\blk00000003/sig000004cd ), + .R(sclr), + .Q(\blk00000003/sig000005a9 ) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk0000040e ( + .C(clk), + .CE(\blk00000003/sig000005ee ), + .D(\blk00000003/sig000004cc ), + .R(sclr), + .Q(\blk00000003/sig000005a8 ) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk0000040d ( + .C(clk), + .CE(\blk00000003/sig000005ee ), + .D(\blk00000003/sig000004cb ), + .R(sclr), + .Q(\blk00000003/sig000005a7 ) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk0000040c ( + .C(clk), + .CE(\blk00000003/sig000005ee ), + .D(\blk00000003/sig000004ca ), + .R(sclr), + .Q(\blk00000003/sig000005a6 ) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk0000040b ( + .C(clk), + .CE(\blk00000003/sig000005ee ), + .D(\blk00000003/sig000004c9 ), + .R(sclr), + .Q(\blk00000003/sig000005a5 ) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk0000040a ( + .C(clk), + .CE(\blk00000003/sig000005ee ), + .D(\blk00000003/sig000004c8 ), + .R(sclr), + .Q(\blk00000003/sig000005a4 ) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000409 ( + .C(clk), + .CE(\blk00000003/sig000005ee ), + .D(\blk00000003/sig000004c7 ), + .R(sclr), + .Q(\blk00000003/sig000005a3 ) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000408 ( + .C(clk), + .CE(\blk00000003/sig000005ee ), + .D(\blk00000003/sig000004c6 ), + .R(sclr), + .Q(\blk00000003/sig000005a2 ) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000407 ( + .C(clk), + .CE(\blk00000003/sig000005ee ), + .D(\blk00000003/sig000004c5 ), + .R(sclr), + .Q(\blk00000003/sig000005a1 ) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000406 ( + .C(clk), + .CE(\blk00000003/sig000005ee ), + .D(\blk00000003/sig000004c4 ), + .R(sclr), + .Q(\blk00000003/sig000005a0 ) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000405 ( + .C(clk), + .CE(\blk00000003/sig000005ee ), + .D(\blk00000003/sig000004c3 ), + .R(sclr), + .Q(\blk00000003/sig0000059f ) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000404 ( + .C(clk), + .CE(\blk00000003/sig000005ed ), + .D(\blk00000003/sig00000468 ), + .R(sclr), + .Q(\blk00000003/sig00000556 ) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000403 ( + .C(clk), + .CE(\blk00000003/sig000005ed ), + .D(\blk00000003/sig00000467 ), + .R(sclr), + .Q(\blk00000003/sig00000555 ) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000402 ( + .C(clk), + .CE(\blk00000003/sig000005ed ), + .D(\blk00000003/sig00000466 ), + .R(sclr), + .Q(\blk00000003/sig00000554 ) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000401 ( + .C(clk), + .CE(\blk00000003/sig000005ed ), + .D(\blk00000003/sig00000465 ), + .R(sclr), + .Q(\blk00000003/sig00000553 ) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000400 ( + .C(clk), + .CE(\blk00000003/sig000005ed ), + .D(\blk00000003/sig00000464 ), + .R(sclr), + .Q(\blk00000003/sig00000552 ) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk000003ff ( + .C(clk), + .CE(\blk00000003/sig000005ed ), + .D(\blk00000003/sig00000463 ), + .R(sclr), + .Q(\blk00000003/sig00000551 ) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk000003fe ( + .C(clk), + .CE(\blk00000003/sig000005ed ), + .D(\blk00000003/sig00000462 ), + .R(sclr), + .Q(\blk00000003/sig00000550 ) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk000003fd ( + .C(clk), + .CE(\blk00000003/sig000005ed ), + .D(\blk00000003/sig00000461 ), + .R(sclr), + .Q(\blk00000003/sig0000054f ) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk000003fc ( + .C(clk), + .CE(\blk00000003/sig000005ed ), + .D(\blk00000003/sig00000460 ), + .R(sclr), + .Q(\blk00000003/sig0000054e ) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk000003fb ( + .C(clk), + .CE(\blk00000003/sig000005ed ), + .D(\blk00000003/sig0000045f ), + .R(sclr), + .Q(\blk00000003/sig0000054d ) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk000003fa ( + .C(clk), + .CE(\blk00000003/sig000005ed ), + .D(\blk00000003/sig0000045e ), + .R(sclr), + .Q(\blk00000003/sig0000054c ) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk000003f9 ( + .C(clk), + .CE(\blk00000003/sig000005ed ), + .D(\blk00000003/sig0000045d ), + .R(sclr), + .Q(\blk00000003/sig0000054b ) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk000003f8 ( + .C(clk), + .CE(\blk00000003/sig000005ed ), + .D(\blk00000003/sig0000045c ), + .R(sclr), + .Q(\blk00000003/sig0000054a ) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk000003f7 ( + .C(clk), + .CE(\blk00000003/sig000005ed ), + .D(\blk00000003/sig0000045b ), + .R(sclr), + .Q(\blk00000003/sig00000549 ) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk000003f6 ( + .C(clk), + .CE(\blk00000003/sig000005ed ), + .D(\blk00000003/sig0000045a ), + .R(sclr), + .Q(\blk00000003/sig00000548 ) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk000003f5 ( + .C(clk), + .CE(\blk00000003/sig000005ed ), + .D(\blk00000003/sig00000459 ), + .R(sclr), + .Q(\blk00000003/sig00000547 ) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk000003f4 ( + .C(clk), + .CE(\blk00000003/sig000005ed ), + .D(\blk00000003/sig00000458 ), + .R(sclr), + .Q(\blk00000003/sig00000546 ) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk000003f3 ( + .C(clk), + .CE(\blk00000003/sig000005ed ), + .D(\blk00000003/sig00000457 ), + .R(sclr), + .Q(\blk00000003/sig00000545 ) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk000003f2 ( + .C(clk), + .CE(\blk00000003/sig000005ed ), + .D(\blk00000003/sig00000456 ), + .R(sclr), + .Q(\blk00000003/sig00000544 ) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk000003f1 ( + .C(clk), + .CE(\blk00000003/sig000005ed ), + .D(\blk00000003/sig00000455 ), + .R(sclr), + .Q(\blk00000003/sig00000543 ) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk000003f0 ( + .C(clk), + .CE(\blk00000003/sig000005ed ), + .D(\blk00000003/sig00000454 ), + .R(sclr), + .Q(\blk00000003/sig00000542 ) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk000003ef ( + .C(clk), + .CE(\blk00000003/sig000005ed ), + .D(\blk00000003/sig00000453 ), + .R(sclr), + .Q(\blk00000003/sig00000541 ) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk000003ee ( + .C(clk), + .CE(\blk00000003/sig000005ed ), + .D(\blk00000003/sig00000452 ), + .R(sclr), + .Q(\blk00000003/sig00000540 ) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk000003ed ( + .C(clk), + .CE(\blk00000003/sig000005ed ), + .D(\blk00000003/sig00000451 ), + .R(sclr), + .Q(\blk00000003/sig0000053f ) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000116 ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig000002b8 ), + .R(sclr), + .Q(\blk00000003/sig000004ef ) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000115 ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig000002b7 ), + .R(sclr), + .Q(\blk00000003/sig000004ed ) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000114 ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig000004f6 ), + .R(sclr), + .Q(\blk00000003/sig000004e5 ) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000113 ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig000002ba ), + .R(sclr), + .Q(\blk00000003/sig000004eb ) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000112 ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig000002be ), + .R(sclr), + .Q(\blk00000003/sig000004e9 ) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000111 ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig000002c4 ), + .R(sclr), + .Q(\blk00000003/sig000004e7 ) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000110 ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig000004f5 ), + .R(sclr), + .Q(\blk00000003/sig000004e3 ) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk0000010f ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig000002b1 ), + .R(sclr), + .Q(\blk00000003/sig000004f3 ) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk0000010e ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig000002b0 ), + .R(sclr), + .Q(\blk00000003/sig000004f1 ) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk0000010d ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig000004f3 ), + .R(sclr), + .Q(\blk00000003/sig000004f4 ) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk0000010c ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig000004f1 ), + .R(sclr), + .Q(\blk00000003/sig000004f2 ) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk0000010b ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig000004ef ), + .R(sclr), + .Q(\blk00000003/sig000004f0 ) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk0000010a ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig000004ed ), + .R(sclr), + .Q(\blk00000003/sig000004ee ) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000109 ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig000004eb ), + .R(sclr), + .Q(\blk00000003/sig000004ec ) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000108 ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig000004e9 ), + .R(sclr), + .Q(\blk00000003/sig000004ea ) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000107 ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig000004e7 ), + .R(sclr), + .Q(\blk00000003/sig000004e8 ) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000106 ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig000004e5 ), + .R(sclr), + .Q(\blk00000003/sig000004e6 ) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000105 ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig000004e3 ), + .R(sclr), + .Q(\blk00000003/sig000004e4 ) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000104 ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig000004e1 ), + .R(\blk00000003/sig00000049 ), + .Q(\blk00000003/sig000004e2 ) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000103 ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig00000232 ), + .R(\blk00000003/sig00000049 ), + .Q(\blk00000003/sig000004e1 ) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000102 ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig000004dd ), + .R(\blk00000003/sig00000049 ), + .Q(\blk00000003/sig000004e0 ) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000101 ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig000004dc ), + .R(\blk00000003/sig00000049 ), + .Q(\blk00000003/sig000004df ) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000100 ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig000004db ), + .R(\blk00000003/sig00000049 ), + .Q(\blk00000003/sig000004de ) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk000000ff ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig0000026b ), + .R(\blk00000003/sig00000049 ), + .Q(\blk00000003/sig000004dd ) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk000000fe ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig00000268 ), + .R(\blk00000003/sig00000049 ), + .Q(\blk00000003/sig000004dc ) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk000000fd ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig00000264 ), + .R(\blk00000003/sig00000049 ), + .Q(\blk00000003/sig000004db ) + ); + DSP48E1 #( + .ACASCREG ( 1 ), + .ADREG ( 1 ), + .ALUMODEREG ( 0 ), + .AREG ( 1 ), + .AUTORESET_PATDET ( "NO_RESET" ), + .A_INPUT ( "DIRECT" ), + .BCASCREG ( 1 ), + .BREG ( 1 ), + .B_INPUT ( "DIRECT" ), + .CARRYINREG ( 1 ), + .CARRYINSELREG ( 1 ), + .CREG ( 1 ), + .DREG ( 1 ), + .INMODEREG ( 1 ), + .MASK ( 48'hFFFFFFFFFFFE ), + .MREG ( 1 ), + .OPMODEREG ( 0 ), + .PATTERN ( 48'h000000000000 ), + .PREG ( 1 ), + .SEL_MASK ( "MASK" ), + .SEL_PATTERN ( "PATTERN" ), + .USE_DPORT ( "TRUE" ), + .USE_MULT ( "MULTIPLY" ), + .USE_PATTERN_DETECT ( "NO_PATDET" ), + .USE_SIMD ( "ONE48" )) + \blk00000003/blk000000fc ( + .PATTERNBDETECT(\NLW_blk00000003/blk000000fc_PATTERNBDETECT_UNCONNECTED ), + .RSTC(\blk00000003/sig00000049 ), + .CEB1(\blk00000003/sig00000049 ), + .CEAD(ce), + .MULTSIGNOUT(\NLW_blk00000003/blk000000fc_MULTSIGNOUT_UNCONNECTED ), + .CEC(ce), + .RSTM(\blk00000003/sig00000049 ), + .MULTSIGNIN(\blk00000003/sig00000049 ), + .CEB2(ce), + .RSTCTRL(\blk00000003/sig00000049 ), + .CEP(ce), + .CARRYCASCOUT(\NLW_blk00000003/blk000000fc_CARRYCASCOUT_UNCONNECTED ), + .RSTA(\blk00000003/sig00000049 ), + .CECARRYIN(ce), + .UNDERFLOW(\NLW_blk00000003/blk000000fc_UNDERFLOW_UNCONNECTED ), + .PATTERNDETECT(\NLW_blk00000003/blk000000fc_PATTERNDETECT_UNCONNECTED ), + .RSTALUMODE(\blk00000003/sig00000049 ), + .RSTALLCARRYIN(\blk00000003/sig00000049 ), + .CED(ce), + .RSTD(\blk00000003/sig00000049 ), + .CEALUMODE(ce), + .CEA2(ce), + .CLK(clk), + .CEA1(\blk00000003/sig00000049 ), + .RSTB(\blk00000003/sig00000049 ), + .OVERFLOW(\NLW_blk00000003/blk000000fc_OVERFLOW_UNCONNECTED ), + .CECTRL(ce), + .CEM(ce), + .CARRYIN(\blk00000003/sig00000049 ), + .CARRYCASCIN(\blk00000003/sig00000049 ), + .RSTINMODE(\blk00000003/sig00000049 ), + .CEINMODE(ce), + .RSTP(\blk00000003/sig00000049 ), + .ACOUT({\NLW_blk00000003/blk000000fc_ACOUT<29>_UNCONNECTED , \NLW_blk00000003/blk000000fc_ACOUT<28>_UNCONNECTED , +\NLW_blk00000003/blk000000fc_ACOUT<27>_UNCONNECTED , \NLW_blk00000003/blk000000fc_ACOUT<26>_UNCONNECTED , +\NLW_blk00000003/blk000000fc_ACOUT<25>_UNCONNECTED , \NLW_blk00000003/blk000000fc_ACOUT<24>_UNCONNECTED , +\NLW_blk00000003/blk000000fc_ACOUT<23>_UNCONNECTED , \NLW_blk00000003/blk000000fc_ACOUT<22>_UNCONNECTED , +\NLW_blk00000003/blk000000fc_ACOUT<21>_UNCONNECTED , \NLW_blk00000003/blk000000fc_ACOUT<20>_UNCONNECTED , +\NLW_blk00000003/blk000000fc_ACOUT<19>_UNCONNECTED , \NLW_blk00000003/blk000000fc_ACOUT<18>_UNCONNECTED , +\NLW_blk00000003/blk000000fc_ACOUT<17>_UNCONNECTED , \NLW_blk00000003/blk000000fc_ACOUT<16>_UNCONNECTED , +\NLW_blk00000003/blk000000fc_ACOUT<15>_UNCONNECTED , \NLW_blk00000003/blk000000fc_ACOUT<14>_UNCONNECTED , +\NLW_blk00000003/blk000000fc_ACOUT<13>_UNCONNECTED , \NLW_blk00000003/blk000000fc_ACOUT<12>_UNCONNECTED , +\NLW_blk00000003/blk000000fc_ACOUT<11>_UNCONNECTED , \NLW_blk00000003/blk000000fc_ACOUT<10>_UNCONNECTED , +\NLW_blk00000003/blk000000fc_ACOUT<9>_UNCONNECTED , \NLW_blk00000003/blk000000fc_ACOUT<8>_UNCONNECTED , +\NLW_blk00000003/blk000000fc_ACOUT<7>_UNCONNECTED , \NLW_blk00000003/blk000000fc_ACOUT<6>_UNCONNECTED , +\NLW_blk00000003/blk000000fc_ACOUT<5>_UNCONNECTED , \NLW_blk00000003/blk000000fc_ACOUT<4>_UNCONNECTED , +\NLW_blk00000003/blk000000fc_ACOUT<3>_UNCONNECTED , \NLW_blk00000003/blk000000fc_ACOUT<2>_UNCONNECTED , +\NLW_blk00000003/blk000000fc_ACOUT<1>_UNCONNECTED , \NLW_blk00000003/blk000000fc_ACOUT<0>_UNCONNECTED }), + .OPMODE({\blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig000000ac , \blk00000003/sig00000049 , \blk00000003/sig000000ac , +\blk00000003/sig00000049 , \blk00000003/sig000000ac }), + .PCIN({\blk00000003/sig00000367 , \blk00000003/sig00000368 , \blk00000003/sig00000369 , \blk00000003/sig0000036a , \blk00000003/sig0000036b , +\blk00000003/sig0000036c , \blk00000003/sig0000036d , \blk00000003/sig0000036e , \blk00000003/sig0000036f , \blk00000003/sig00000370 , +\blk00000003/sig00000371 , \blk00000003/sig00000372 , \blk00000003/sig00000373 , \blk00000003/sig00000374 , \blk00000003/sig00000375 , +\blk00000003/sig00000376 , \blk00000003/sig00000377 , \blk00000003/sig00000378 , \blk00000003/sig00000379 , \blk00000003/sig0000037a , +\blk00000003/sig0000037b , \blk00000003/sig0000037c , \blk00000003/sig0000037d , \blk00000003/sig0000037e , \blk00000003/sig0000037f , +\blk00000003/sig00000380 , \blk00000003/sig00000381 , \blk00000003/sig00000382 , \blk00000003/sig00000383 , \blk00000003/sig00000384 , +\blk00000003/sig00000385 , \blk00000003/sig00000386 , \blk00000003/sig00000387 , \blk00000003/sig00000388 , \blk00000003/sig00000389 , +\blk00000003/sig0000038a , \blk00000003/sig0000038b , \blk00000003/sig0000038c , \blk00000003/sig0000038d , \blk00000003/sig0000038e , +\blk00000003/sig0000038f , \blk00000003/sig00000390 , \blk00000003/sig00000391 , \blk00000003/sig00000392 , \blk00000003/sig00000393 , +\blk00000003/sig00000394 , \blk00000003/sig00000395 , \blk00000003/sig00000396 }), + .ALUMODE({\blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 }), + .C({\blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , +\blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , +\blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , +\blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , +\blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , +\blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , +\blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , +\blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , +\blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , +\blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 }), + .CARRYOUT({\NLW_blk00000003/blk000000fc_CARRYOUT<3>_UNCONNECTED , \NLW_blk00000003/blk000000fc_CARRYOUT<2>_UNCONNECTED , +\NLW_blk00000003/blk000000fc_CARRYOUT<1>_UNCONNECTED , \NLW_blk00000003/blk000000fc_CARRYOUT<0>_UNCONNECTED }), + .INMODE({\blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig000000ac , \blk00000003/sig00000049 , \blk00000003/sig00000049 }), + .BCIN({\blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , +\blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , +\blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , +\blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 }), + .B({\blk00000003/sig00000469 , \blk00000003/sig0000046a , \blk00000003/sig0000046b , \blk00000003/sig0000046c , \blk00000003/sig0000046d , +\blk00000003/sig0000046e , \blk00000003/sig0000046f , \blk00000003/sig00000470 , \blk00000003/sig00000471 , \blk00000003/sig00000472 , +\blk00000003/sig00000473 , \blk00000003/sig00000474 , \blk00000003/sig00000475 , \blk00000003/sig00000476 , \blk00000003/sig00000477 , +\blk00000003/sig00000478 , \blk00000003/sig00000479 , \blk00000003/sig0000047a }), + .BCOUT({\NLW_blk00000003/blk000000fc_BCOUT<17>_UNCONNECTED , \NLW_blk00000003/blk000000fc_BCOUT<16>_UNCONNECTED , +\NLW_blk00000003/blk000000fc_BCOUT<15>_UNCONNECTED , \NLW_blk00000003/blk000000fc_BCOUT<14>_UNCONNECTED , +\NLW_blk00000003/blk000000fc_BCOUT<13>_UNCONNECTED , \NLW_blk00000003/blk000000fc_BCOUT<12>_UNCONNECTED , +\NLW_blk00000003/blk000000fc_BCOUT<11>_UNCONNECTED , \NLW_blk00000003/blk000000fc_BCOUT<10>_UNCONNECTED , +\NLW_blk00000003/blk000000fc_BCOUT<9>_UNCONNECTED , \NLW_blk00000003/blk000000fc_BCOUT<8>_UNCONNECTED , +\NLW_blk00000003/blk000000fc_BCOUT<7>_UNCONNECTED , \NLW_blk00000003/blk000000fc_BCOUT<6>_UNCONNECTED , +\NLW_blk00000003/blk000000fc_BCOUT<5>_UNCONNECTED , \NLW_blk00000003/blk000000fc_BCOUT<4>_UNCONNECTED , +\NLW_blk00000003/blk000000fc_BCOUT<3>_UNCONNECTED , \NLW_blk00000003/blk000000fc_BCOUT<2>_UNCONNECTED , +\NLW_blk00000003/blk000000fc_BCOUT<1>_UNCONNECTED , \NLW_blk00000003/blk000000fc_BCOUT<0>_UNCONNECTED }), + .D({\blk00000003/sig000004ab , \blk00000003/sig000004ab , \blk00000003/sig000004ac , \blk00000003/sig000004ad , \blk00000003/sig000004ae , +\blk00000003/sig000004af , \blk00000003/sig000004b0 , \blk00000003/sig000004b1 , \blk00000003/sig000004b2 , \blk00000003/sig000004b3 , +\blk00000003/sig000004b4 , \blk00000003/sig000004b5 , \blk00000003/sig000004b6 , \blk00000003/sig000004b7 , \blk00000003/sig000004b8 , +\blk00000003/sig000004b9 , \blk00000003/sig000004ba , \blk00000003/sig000004bb , \blk00000003/sig000004bc , \blk00000003/sig000004bd , +\blk00000003/sig000004be , \blk00000003/sig000004bf , \blk00000003/sig000004c0 , \blk00000003/sig000004c1 , \blk00000003/sig000004c2 }), + .P({\NLW_blk00000003/blk000000fc_P<47>_UNCONNECTED , \NLW_blk00000003/blk000000fc_P<46>_UNCONNECTED , +\NLW_blk00000003/blk000000fc_P<45>_UNCONNECTED , \NLW_blk00000003/blk000000fc_P<44>_UNCONNECTED , \NLW_blk00000003/blk000000fc_P<43>_UNCONNECTED , +\NLW_blk00000003/blk000000fc_P<42>_UNCONNECTED , \NLW_blk00000003/blk000000fc_P<41>_UNCONNECTED , \NLW_blk00000003/blk000000fc_P<40>_UNCONNECTED , +\NLW_blk00000003/blk000000fc_P<39>_UNCONNECTED , \NLW_blk00000003/blk000000fc_P<38>_UNCONNECTED , \NLW_blk00000003/blk000000fc_P<37>_UNCONNECTED , +\NLW_blk00000003/blk000000fc_P<36>_UNCONNECTED , \NLW_blk00000003/blk000000fc_P<35>_UNCONNECTED , \NLW_blk00000003/blk000000fc_P<34>_UNCONNECTED , +\NLW_blk00000003/blk000000fc_P<33>_UNCONNECTED , \NLW_blk00000003/blk000000fc_P<32>_UNCONNECTED , \NLW_blk00000003/blk000000fc_P<31>_UNCONNECTED , +\NLW_blk00000003/blk000000fc_P<30>_UNCONNECTED , \NLW_blk00000003/blk000000fc_P<29>_UNCONNECTED , \NLW_blk00000003/blk000000fc_P<28>_UNCONNECTED , +\NLW_blk00000003/blk000000fc_P<27>_UNCONNECTED , \NLW_blk00000003/blk000000fc_P<26>_UNCONNECTED , \NLW_blk00000003/blk000000fc_P<25>_UNCONNECTED , +\NLW_blk00000003/blk000000fc_P<24>_UNCONNECTED , \NLW_blk00000003/blk000000fc_P<23>_UNCONNECTED , \NLW_blk00000003/blk000000fc_P<22>_UNCONNECTED , +\NLW_blk00000003/blk000000fc_P<21>_UNCONNECTED , \NLW_blk00000003/blk000000fc_P<20>_UNCONNECTED , \NLW_blk00000003/blk000000fc_P<19>_UNCONNECTED , +\NLW_blk00000003/blk000000fc_P<18>_UNCONNECTED , \NLW_blk00000003/blk000000fc_P<17>_UNCONNECTED , \NLW_blk00000003/blk000000fc_P<16>_UNCONNECTED , +\NLW_blk00000003/blk000000fc_P<15>_UNCONNECTED , \NLW_blk00000003/blk000000fc_P<14>_UNCONNECTED , \NLW_blk00000003/blk000000fc_P<13>_UNCONNECTED , +\NLW_blk00000003/blk000000fc_P<12>_UNCONNECTED , \NLW_blk00000003/blk000000fc_P<11>_UNCONNECTED , \NLW_blk00000003/blk000000fc_P<10>_UNCONNECTED , +\NLW_blk00000003/blk000000fc_P<9>_UNCONNECTED , \NLW_blk00000003/blk000000fc_P<8>_UNCONNECTED , \NLW_blk00000003/blk000000fc_P<7>_UNCONNECTED , +\NLW_blk00000003/blk000000fc_P<6>_UNCONNECTED , \NLW_blk00000003/blk000000fc_P<5>_UNCONNECTED , \NLW_blk00000003/blk000000fc_P<4>_UNCONNECTED , +\NLW_blk00000003/blk000000fc_P<3>_UNCONNECTED , \NLW_blk00000003/blk000000fc_P<2>_UNCONNECTED , \NLW_blk00000003/blk000000fc_P<1>_UNCONNECTED , +\NLW_blk00000003/blk000000fc_P<0>_UNCONNECTED }), + .A({\blk00000003/sig000004c3 , \blk00000003/sig000004c3 , \blk00000003/sig000004c3 , \blk00000003/sig000004c3 , \blk00000003/sig000004c3 , +\blk00000003/sig000004c3 , \blk00000003/sig000004c3 , \blk00000003/sig000004c4 , \blk00000003/sig000004c5 , \blk00000003/sig000004c6 , +\blk00000003/sig000004c7 , \blk00000003/sig000004c8 , \blk00000003/sig000004c9 , \blk00000003/sig000004ca , \blk00000003/sig000004cb , +\blk00000003/sig000004cc , \blk00000003/sig000004cd , \blk00000003/sig000004ce , \blk00000003/sig000004cf , \blk00000003/sig000004d0 , +\blk00000003/sig000004d1 , \blk00000003/sig000004d2 , \blk00000003/sig000004d3 , \blk00000003/sig000004d4 , \blk00000003/sig000004d5 , +\blk00000003/sig000004d6 , \blk00000003/sig000004d7 , \blk00000003/sig000004d8 , \blk00000003/sig000004d9 , \blk00000003/sig000004da }), + .PCOUT({\blk00000003/sig00000409 , \blk00000003/sig0000040a , \blk00000003/sig0000040b , \blk00000003/sig0000040c , \blk00000003/sig0000040d , +\blk00000003/sig0000040e , \blk00000003/sig0000040f , \blk00000003/sig00000410 , \blk00000003/sig00000411 , \blk00000003/sig00000412 , +\blk00000003/sig00000413 , \blk00000003/sig00000414 , \blk00000003/sig00000415 , \blk00000003/sig00000416 , \blk00000003/sig00000417 , +\blk00000003/sig00000418 , \blk00000003/sig00000419 , \blk00000003/sig0000041a , \blk00000003/sig0000041b , \blk00000003/sig0000041c , +\blk00000003/sig0000041d , \blk00000003/sig0000041e , \blk00000003/sig0000041f , \blk00000003/sig00000420 , \blk00000003/sig00000421 , +\blk00000003/sig00000422 , \blk00000003/sig00000423 , \blk00000003/sig00000424 , \blk00000003/sig00000425 , \blk00000003/sig00000426 , +\blk00000003/sig00000427 , \blk00000003/sig00000428 , \blk00000003/sig00000429 , \blk00000003/sig0000042a , \blk00000003/sig0000042b , +\blk00000003/sig0000042c , \blk00000003/sig0000042d , \blk00000003/sig0000042e , \blk00000003/sig0000042f , \blk00000003/sig00000430 , +\blk00000003/sig00000431 , \blk00000003/sig00000432 , \blk00000003/sig00000433 , \blk00000003/sig00000434 , \blk00000003/sig00000435 , +\blk00000003/sig00000436 , \blk00000003/sig00000437 , \blk00000003/sig00000438 }), + .ACIN({\blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , +\blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , +\blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , +\blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , +\blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , +\blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 }), + .CARRYINSEL({\blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 }) + ); + DSP48E1 #( + .ACASCREG ( 1 ), + .ADREG ( 1 ), + .ALUMODEREG ( 0 ), + .AREG ( 1 ), + .AUTORESET_PATDET ( "NO_RESET" ), + .A_INPUT ( "DIRECT" ), + .BCASCREG ( 1 ), + .BREG ( 1 ), + .B_INPUT ( "DIRECT" ), + .CARRYINREG ( 1 ), + .CARRYINSELREG ( 1 ), + .CREG ( 1 ), + .DREG ( 1 ), + .INMODEREG ( 1 ), + .MASK ( 48'hFFFFFFFFFFFE ), + .MREG ( 1 ), + .OPMODEREG ( 0 ), + .PATTERN ( 48'h000000000000 ), + .PREG ( 1 ), + .SEL_MASK ( "MASK" ), + .SEL_PATTERN ( "PATTERN" ), + .USE_DPORT ( "TRUE" ), + .USE_MULT ( "MULTIPLY" ), + .USE_PATTERN_DETECT ( "NO_PATDET" ), + .USE_SIMD ( "ONE48" )) + \blk00000003/blk000000fb ( + .PATTERNBDETECT(\NLW_blk00000003/blk000000fb_PATTERNBDETECT_UNCONNECTED ), + .RSTC(\blk00000003/sig00000049 ), + .CEB1(\blk00000003/sig00000049 ), + .CEAD(ce), + .MULTSIGNOUT(\NLW_blk00000003/blk000000fb_MULTSIGNOUT_UNCONNECTED ), + .CEC(ce), + .RSTM(\blk00000003/sig00000049 ), + .MULTSIGNIN(\blk00000003/sig00000049 ), + .CEB2(ce), + .RSTCTRL(\blk00000003/sig00000049 ), + .CEP(ce), + .CARRYCASCOUT(\NLW_blk00000003/blk000000fb_CARRYCASCOUT_UNCONNECTED ), + .RSTA(\blk00000003/sig00000049 ), + .CECARRYIN(ce), + .UNDERFLOW(\NLW_blk00000003/blk000000fb_UNDERFLOW_UNCONNECTED ), + .PATTERNDETECT(\NLW_blk00000003/blk000000fb_PATTERNDETECT_UNCONNECTED ), + .RSTALUMODE(\blk00000003/sig00000049 ), + .RSTALLCARRYIN(\blk00000003/sig00000049 ), + .CED(ce), + .RSTD(\blk00000003/sig00000049 ), + .CEALUMODE(ce), + .CEA2(ce), + .CLK(clk), + .CEA1(\blk00000003/sig00000049 ), + .RSTB(\blk00000003/sig00000049 ), + .OVERFLOW(\NLW_blk00000003/blk000000fb_OVERFLOW_UNCONNECTED ), + .CECTRL(ce), + .CEM(ce), + .CARRYIN(\blk00000003/sig00000049 ), + .CARRYCASCIN(\blk00000003/sig00000049 ), + .RSTINMODE(\blk00000003/sig00000049 ), + .CEINMODE(ce), + .RSTP(\blk00000003/sig00000049 ), + .ACOUT({\NLW_blk00000003/blk000000fb_ACOUT<29>_UNCONNECTED , \NLW_blk00000003/blk000000fb_ACOUT<28>_UNCONNECTED , +\NLW_blk00000003/blk000000fb_ACOUT<27>_UNCONNECTED , \NLW_blk00000003/blk000000fb_ACOUT<26>_UNCONNECTED , +\NLW_blk00000003/blk000000fb_ACOUT<25>_UNCONNECTED , \NLW_blk00000003/blk000000fb_ACOUT<24>_UNCONNECTED , +\NLW_blk00000003/blk000000fb_ACOUT<23>_UNCONNECTED , \NLW_blk00000003/blk000000fb_ACOUT<22>_UNCONNECTED , +\NLW_blk00000003/blk000000fb_ACOUT<21>_UNCONNECTED , \NLW_blk00000003/blk000000fb_ACOUT<20>_UNCONNECTED , +\NLW_blk00000003/blk000000fb_ACOUT<19>_UNCONNECTED , \NLW_blk00000003/blk000000fb_ACOUT<18>_UNCONNECTED , +\NLW_blk00000003/blk000000fb_ACOUT<17>_UNCONNECTED , \NLW_blk00000003/blk000000fb_ACOUT<16>_UNCONNECTED , +\NLW_blk00000003/blk000000fb_ACOUT<15>_UNCONNECTED , \NLW_blk00000003/blk000000fb_ACOUT<14>_UNCONNECTED , +\NLW_blk00000003/blk000000fb_ACOUT<13>_UNCONNECTED , \NLW_blk00000003/blk000000fb_ACOUT<12>_UNCONNECTED , +\NLW_blk00000003/blk000000fb_ACOUT<11>_UNCONNECTED , \NLW_blk00000003/blk000000fb_ACOUT<10>_UNCONNECTED , +\NLW_blk00000003/blk000000fb_ACOUT<9>_UNCONNECTED , \NLW_blk00000003/blk000000fb_ACOUT<8>_UNCONNECTED , +\NLW_blk00000003/blk000000fb_ACOUT<7>_UNCONNECTED , \NLW_blk00000003/blk000000fb_ACOUT<6>_UNCONNECTED , +\NLW_blk00000003/blk000000fb_ACOUT<5>_UNCONNECTED , \NLW_blk00000003/blk000000fb_ACOUT<4>_UNCONNECTED , +\NLW_blk00000003/blk000000fb_ACOUT<3>_UNCONNECTED , \NLW_blk00000003/blk000000fb_ACOUT<2>_UNCONNECTED , +\NLW_blk00000003/blk000000fb_ACOUT<1>_UNCONNECTED , \NLW_blk00000003/blk000000fb_ACOUT<0>_UNCONNECTED }), + .OPMODE({\blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig000000ac , \blk00000003/sig00000049 , \blk00000003/sig000000ac , +\blk00000003/sig00000049 , \blk00000003/sig000000ac }), + .PCIN({\blk00000003/sig00000307 , \blk00000003/sig00000308 , \blk00000003/sig00000309 , \blk00000003/sig0000030a , \blk00000003/sig0000030b , +\blk00000003/sig0000030c , \blk00000003/sig0000030d , \blk00000003/sig0000030e , \blk00000003/sig0000030f , \blk00000003/sig00000310 , +\blk00000003/sig00000311 , \blk00000003/sig00000312 , \blk00000003/sig00000313 , \blk00000003/sig00000314 , \blk00000003/sig00000315 , +\blk00000003/sig00000316 , \blk00000003/sig00000317 , \blk00000003/sig00000318 , \blk00000003/sig00000319 , \blk00000003/sig0000031a , +\blk00000003/sig0000031b , \blk00000003/sig0000031c , \blk00000003/sig0000031d , \blk00000003/sig0000031e , \blk00000003/sig0000031f , +\blk00000003/sig00000320 , \blk00000003/sig00000321 , \blk00000003/sig00000322 , \blk00000003/sig00000323 , \blk00000003/sig00000324 , +\blk00000003/sig00000325 , \blk00000003/sig00000326 , \blk00000003/sig00000327 , \blk00000003/sig00000328 , \blk00000003/sig00000329 , +\blk00000003/sig0000032a , \blk00000003/sig0000032b , \blk00000003/sig0000032c , \blk00000003/sig0000032d , \blk00000003/sig0000032e , +\blk00000003/sig0000032f , \blk00000003/sig00000330 , \blk00000003/sig00000331 , \blk00000003/sig00000332 , \blk00000003/sig00000333 , +\blk00000003/sig00000334 , \blk00000003/sig00000335 , \blk00000003/sig00000336 }), + .ALUMODE({\blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 }), + .C({\blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , +\blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , +\blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , +\blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , +\blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , +\blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , +\blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , +\blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , +\blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , +\blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 }), + .CARRYOUT({\NLW_blk00000003/blk000000fb_CARRYOUT<3>_UNCONNECTED , \NLW_blk00000003/blk000000fb_CARRYOUT<2>_UNCONNECTED , +\NLW_blk00000003/blk000000fb_CARRYOUT<1>_UNCONNECTED , \NLW_blk00000003/blk000000fb_CARRYOUT<0>_UNCONNECTED }), + .INMODE({\blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig000000ac , \blk00000003/sig00000049 , \blk00000003/sig00000049 }), + .BCIN({\blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , +\blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , +\blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , +\blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 }), + .B({\blk00000003/sig00000469 , \blk00000003/sig0000046a , \blk00000003/sig0000046b , \blk00000003/sig0000046c , \blk00000003/sig0000046d , +\blk00000003/sig0000046e , \blk00000003/sig0000046f , \blk00000003/sig00000470 , \blk00000003/sig00000471 , \blk00000003/sig00000472 , +\blk00000003/sig00000473 , \blk00000003/sig00000474 , \blk00000003/sig00000475 , \blk00000003/sig00000476 , \blk00000003/sig00000477 , +\blk00000003/sig00000478 , \blk00000003/sig00000479 , \blk00000003/sig0000047a }), + .BCOUT({\NLW_blk00000003/blk000000fb_BCOUT<17>_UNCONNECTED , \NLW_blk00000003/blk000000fb_BCOUT<16>_UNCONNECTED , +\NLW_blk00000003/blk000000fb_BCOUT<15>_UNCONNECTED , \NLW_blk00000003/blk000000fb_BCOUT<14>_UNCONNECTED , +\NLW_blk00000003/blk000000fb_BCOUT<13>_UNCONNECTED , \NLW_blk00000003/blk000000fb_BCOUT<12>_UNCONNECTED , +\NLW_blk00000003/blk000000fb_BCOUT<11>_UNCONNECTED , \NLW_blk00000003/blk000000fb_BCOUT<10>_UNCONNECTED , +\NLW_blk00000003/blk000000fb_BCOUT<9>_UNCONNECTED , \NLW_blk00000003/blk000000fb_BCOUT<8>_UNCONNECTED , +\NLW_blk00000003/blk000000fb_BCOUT<7>_UNCONNECTED , \NLW_blk00000003/blk000000fb_BCOUT<6>_UNCONNECTED , +\NLW_blk00000003/blk000000fb_BCOUT<5>_UNCONNECTED , \NLW_blk00000003/blk000000fb_BCOUT<4>_UNCONNECTED , +\NLW_blk00000003/blk000000fb_BCOUT<3>_UNCONNECTED , \NLW_blk00000003/blk000000fb_BCOUT<2>_UNCONNECTED , +\NLW_blk00000003/blk000000fb_BCOUT<1>_UNCONNECTED , \NLW_blk00000003/blk000000fb_BCOUT<0>_UNCONNECTED }), + .D({\blk00000003/sig0000047b , \blk00000003/sig0000047b , \blk00000003/sig0000047c , \blk00000003/sig0000047d , \blk00000003/sig0000047e , +\blk00000003/sig0000047f , \blk00000003/sig00000480 , \blk00000003/sig00000481 , \blk00000003/sig00000482 , \blk00000003/sig00000483 , +\blk00000003/sig00000484 , \blk00000003/sig00000485 , \blk00000003/sig00000486 , \blk00000003/sig00000487 , \blk00000003/sig00000488 , +\blk00000003/sig00000489 , \blk00000003/sig0000048a , \blk00000003/sig0000048b , \blk00000003/sig0000048c , \blk00000003/sig0000048d , +\blk00000003/sig0000048e , \blk00000003/sig0000048f , \blk00000003/sig00000490 , \blk00000003/sig00000491 , \blk00000003/sig00000492 }), + .P({\NLW_blk00000003/blk000000fb_P<47>_UNCONNECTED , \NLW_blk00000003/blk000000fb_P<46>_UNCONNECTED , +\NLW_blk00000003/blk000000fb_P<45>_UNCONNECTED , \NLW_blk00000003/blk000000fb_P<44>_UNCONNECTED , \NLW_blk00000003/blk000000fb_P<43>_UNCONNECTED , +\NLW_blk00000003/blk000000fb_P<42>_UNCONNECTED , \NLW_blk00000003/blk000000fb_P<41>_UNCONNECTED , \NLW_blk00000003/blk000000fb_P<40>_UNCONNECTED , +\NLW_blk00000003/blk000000fb_P<39>_UNCONNECTED , \NLW_blk00000003/blk000000fb_P<38>_UNCONNECTED , \NLW_blk00000003/blk000000fb_P<37>_UNCONNECTED , +\NLW_blk00000003/blk000000fb_P<36>_UNCONNECTED , \NLW_blk00000003/blk000000fb_P<35>_UNCONNECTED , \NLW_blk00000003/blk000000fb_P<34>_UNCONNECTED , +\NLW_blk00000003/blk000000fb_P<33>_UNCONNECTED , \NLW_blk00000003/blk000000fb_P<32>_UNCONNECTED , \NLW_blk00000003/blk000000fb_P<31>_UNCONNECTED , +\NLW_blk00000003/blk000000fb_P<30>_UNCONNECTED , \NLW_blk00000003/blk000000fb_P<29>_UNCONNECTED , \NLW_blk00000003/blk000000fb_P<28>_UNCONNECTED , +\NLW_blk00000003/blk000000fb_P<27>_UNCONNECTED , \NLW_blk00000003/blk000000fb_P<26>_UNCONNECTED , \NLW_blk00000003/blk000000fb_P<25>_UNCONNECTED , +\NLW_blk00000003/blk000000fb_P<24>_UNCONNECTED , \NLW_blk00000003/blk000000fb_P<23>_UNCONNECTED , \NLW_blk00000003/blk000000fb_P<22>_UNCONNECTED , +\NLW_blk00000003/blk000000fb_P<21>_UNCONNECTED , \NLW_blk00000003/blk000000fb_P<20>_UNCONNECTED , \NLW_blk00000003/blk000000fb_P<19>_UNCONNECTED , +\NLW_blk00000003/blk000000fb_P<18>_UNCONNECTED , \NLW_blk00000003/blk000000fb_P<17>_UNCONNECTED , \NLW_blk00000003/blk000000fb_P<16>_UNCONNECTED , +\NLW_blk00000003/blk000000fb_P<15>_UNCONNECTED , \NLW_blk00000003/blk000000fb_P<14>_UNCONNECTED , \NLW_blk00000003/blk000000fb_P<13>_UNCONNECTED , +\NLW_blk00000003/blk000000fb_P<12>_UNCONNECTED , \NLW_blk00000003/blk000000fb_P<11>_UNCONNECTED , \NLW_blk00000003/blk000000fb_P<10>_UNCONNECTED , +\NLW_blk00000003/blk000000fb_P<9>_UNCONNECTED , \NLW_blk00000003/blk000000fb_P<8>_UNCONNECTED , \NLW_blk00000003/blk000000fb_P<7>_UNCONNECTED , +\NLW_blk00000003/blk000000fb_P<6>_UNCONNECTED , \NLW_blk00000003/blk000000fb_P<5>_UNCONNECTED , \NLW_blk00000003/blk000000fb_P<4>_UNCONNECTED , +\NLW_blk00000003/blk000000fb_P<3>_UNCONNECTED , \NLW_blk00000003/blk000000fb_P<2>_UNCONNECTED , \NLW_blk00000003/blk000000fb_P<1>_UNCONNECTED , +\NLW_blk00000003/blk000000fb_P<0>_UNCONNECTED }), + .A({\blk00000003/sig00000493 , \blk00000003/sig00000493 , \blk00000003/sig00000493 , \blk00000003/sig00000493 , \blk00000003/sig00000493 , +\blk00000003/sig00000493 , \blk00000003/sig00000493 , \blk00000003/sig00000494 , \blk00000003/sig00000495 , \blk00000003/sig00000496 , +\blk00000003/sig00000497 , \blk00000003/sig00000498 , \blk00000003/sig00000499 , \blk00000003/sig0000049a , \blk00000003/sig0000049b , +\blk00000003/sig0000049c , \blk00000003/sig0000049d , \blk00000003/sig0000049e , \blk00000003/sig0000049f , \blk00000003/sig000004a0 , +\blk00000003/sig000004a1 , \blk00000003/sig000004a2 , \blk00000003/sig000004a3 , \blk00000003/sig000004a4 , \blk00000003/sig000004a5 , +\blk00000003/sig000004a6 , \blk00000003/sig000004a7 , \blk00000003/sig000004a8 , \blk00000003/sig000004a9 , \blk00000003/sig000004aa }), + .PCOUT({\blk00000003/sig00000397 , \blk00000003/sig00000398 , \blk00000003/sig00000399 , \blk00000003/sig0000039a , \blk00000003/sig0000039b , +\blk00000003/sig0000039c , \blk00000003/sig0000039d , \blk00000003/sig0000039e , \blk00000003/sig0000039f , \blk00000003/sig000003a0 , +\blk00000003/sig000003a1 , \blk00000003/sig000003a2 , \blk00000003/sig000003a3 , \blk00000003/sig000003a4 , \blk00000003/sig000003a5 , +\blk00000003/sig000003a6 , \blk00000003/sig000003a7 , \blk00000003/sig000003a8 , \blk00000003/sig000003a9 , \blk00000003/sig000003aa , +\blk00000003/sig000003ab , \blk00000003/sig000003ac , \blk00000003/sig000003ad , \blk00000003/sig000003ae , \blk00000003/sig000003af , +\blk00000003/sig000003b0 , \blk00000003/sig000003b1 , \blk00000003/sig000003b2 , \blk00000003/sig000003b3 , \blk00000003/sig000003b4 , +\blk00000003/sig000003b5 , \blk00000003/sig000003b6 , \blk00000003/sig000003b7 , \blk00000003/sig000003b8 , \blk00000003/sig000003b9 , +\blk00000003/sig000003ba , \blk00000003/sig000003bb , \blk00000003/sig000003bc , \blk00000003/sig000003bd , \blk00000003/sig000003be , +\blk00000003/sig000003bf , \blk00000003/sig000003c0 , \blk00000003/sig000003c1 , \blk00000003/sig000003c2 , \blk00000003/sig000003c3 , +\blk00000003/sig000003c4 , \blk00000003/sig000003c5 , \blk00000003/sig000003c6 }), + .ACIN({\blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , +\blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , +\blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , +\blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , +\blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , +\blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 }), + .CARRYINSEL({\blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 }) + ); + DSP48E1 #( + .ACASCREG ( 1 ), + .ADREG ( 1 ), + .ALUMODEREG ( 0 ), + .AREG ( 1 ), + .AUTORESET_PATDET ( "NO_RESET" ), + .A_INPUT ( "DIRECT" ), + .BCASCREG ( 1 ), + .BREG ( 1 ), + .B_INPUT ( "DIRECT" ), + .CARRYINREG ( 1 ), + .CARRYINSELREG ( 1 ), + .CREG ( 1 ), + .DREG ( 1 ), + .INMODEREG ( 1 ), + .MASK ( 48'hFFFFFFFFFFFE ), + .MREG ( 1 ), + .OPMODEREG ( 0 ), + .PATTERN ( 48'h000000000000 ), + .PREG ( 1 ), + .SEL_MASK ( "MASK" ), + .SEL_PATTERN ( "PATTERN" ), + .USE_DPORT ( "TRUE" ), + .USE_MULT ( "MULTIPLY" ), + .USE_PATTERN_DETECT ( "NO_PATDET" ), + .USE_SIMD ( "ONE48" )) + \blk00000003/blk000000fa ( + .PATTERNBDETECT(\NLW_blk00000003/blk000000fa_PATTERNBDETECT_UNCONNECTED ), + .RSTC(\blk00000003/sig00000049 ), + .CEB1(\blk00000003/sig00000049 ), + .CEAD(ce), + .MULTSIGNOUT(\NLW_blk00000003/blk000000fa_MULTSIGNOUT_UNCONNECTED ), + .CEC(ce), + .RSTM(\blk00000003/sig00000049 ), + .MULTSIGNIN(\blk00000003/sig00000049 ), + .CEB2(ce), + .RSTCTRL(\blk00000003/sig00000049 ), + .CEP(ce), + .CARRYCASCOUT(\NLW_blk00000003/blk000000fa_CARRYCASCOUT_UNCONNECTED ), + .RSTA(\blk00000003/sig00000049 ), + .CECARRYIN(ce), + .UNDERFLOW(\NLW_blk00000003/blk000000fa_UNDERFLOW_UNCONNECTED ), + .PATTERNDETECT(\NLW_blk00000003/blk000000fa_PATTERNDETECT_UNCONNECTED ), + .RSTALUMODE(\blk00000003/sig00000049 ), + .RSTALLCARRYIN(\blk00000003/sig00000049 ), + .CED(ce), + .RSTD(\blk00000003/sig00000049 ), + .CEALUMODE(ce), + .CEA2(ce), + .CLK(clk), + .CEA1(\blk00000003/sig00000049 ), + .RSTB(\blk00000003/sig00000049 ), + .OVERFLOW(\NLW_blk00000003/blk000000fa_OVERFLOW_UNCONNECTED ), + .CECTRL(ce), + .CEM(ce), + .CARRYIN(\blk00000003/sig00000049 ), + .CARRYCASCIN(\blk00000003/sig00000049 ), + .RSTINMODE(\blk00000003/sig00000049 ), + .CEINMODE(ce), + .RSTP(\blk00000003/sig00000049 ), + .ACOUT({\NLW_blk00000003/blk000000fa_ACOUT<29>_UNCONNECTED , \NLW_blk00000003/blk000000fa_ACOUT<28>_UNCONNECTED , +\NLW_blk00000003/blk000000fa_ACOUT<27>_UNCONNECTED , \NLW_blk00000003/blk000000fa_ACOUT<26>_UNCONNECTED , +\NLW_blk00000003/blk000000fa_ACOUT<25>_UNCONNECTED , \NLW_blk00000003/blk000000fa_ACOUT<24>_UNCONNECTED , +\NLW_blk00000003/blk000000fa_ACOUT<23>_UNCONNECTED , \NLW_blk00000003/blk000000fa_ACOUT<22>_UNCONNECTED , +\NLW_blk00000003/blk000000fa_ACOUT<21>_UNCONNECTED , \NLW_blk00000003/blk000000fa_ACOUT<20>_UNCONNECTED , +\NLW_blk00000003/blk000000fa_ACOUT<19>_UNCONNECTED , \NLW_blk00000003/blk000000fa_ACOUT<18>_UNCONNECTED , +\NLW_blk00000003/blk000000fa_ACOUT<17>_UNCONNECTED , \NLW_blk00000003/blk000000fa_ACOUT<16>_UNCONNECTED , +\NLW_blk00000003/blk000000fa_ACOUT<15>_UNCONNECTED , \NLW_blk00000003/blk000000fa_ACOUT<14>_UNCONNECTED , +\NLW_blk00000003/blk000000fa_ACOUT<13>_UNCONNECTED , \NLW_blk00000003/blk000000fa_ACOUT<12>_UNCONNECTED , +\NLW_blk00000003/blk000000fa_ACOUT<11>_UNCONNECTED , \NLW_blk00000003/blk000000fa_ACOUT<10>_UNCONNECTED , +\NLW_blk00000003/blk000000fa_ACOUT<9>_UNCONNECTED , \NLW_blk00000003/blk000000fa_ACOUT<8>_UNCONNECTED , +\NLW_blk00000003/blk000000fa_ACOUT<7>_UNCONNECTED , \NLW_blk00000003/blk000000fa_ACOUT<6>_UNCONNECTED , +\NLW_blk00000003/blk000000fa_ACOUT<5>_UNCONNECTED , \NLW_blk00000003/blk000000fa_ACOUT<4>_UNCONNECTED , +\NLW_blk00000003/blk000000fa_ACOUT<3>_UNCONNECTED , \NLW_blk00000003/blk000000fa_ACOUT<2>_UNCONNECTED , +\NLW_blk00000003/blk000000fa_ACOUT<1>_UNCONNECTED , \NLW_blk00000003/blk000000fa_ACOUT<0>_UNCONNECTED }), + .OPMODE({\blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig000000ac , \blk00000003/sig00000049 , \blk00000003/sig000000ac , +\blk00000003/sig00000049 , \blk00000003/sig000000ac }), + .PCIN({\blk00000003/sig00000409 , \blk00000003/sig0000040a , \blk00000003/sig0000040b , \blk00000003/sig0000040c , \blk00000003/sig0000040d , +\blk00000003/sig0000040e , \blk00000003/sig0000040f , \blk00000003/sig00000410 , \blk00000003/sig00000411 , \blk00000003/sig00000412 , +\blk00000003/sig00000413 , \blk00000003/sig00000414 , \blk00000003/sig00000415 , \blk00000003/sig00000416 , \blk00000003/sig00000417 , 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\blk00000003/sig00000049 }), + .C({\blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , +\blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , +\blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , +\blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , +\blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , +\blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , +\blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , +\blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , +\blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , +\blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 }), + .CARRYOUT({\NLW_blk00000003/blk000000fa_CARRYOUT<3>_UNCONNECTED , \NLW_blk00000003/blk000000fa_CARRYOUT<2>_UNCONNECTED , +\NLW_blk00000003/blk000000fa_CARRYOUT<1>_UNCONNECTED , \NLW_blk00000003/blk000000fa_CARRYOUT<0>_UNCONNECTED }), + .INMODE({\blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig000000ac , \blk00000003/sig00000049 , \blk00000003/sig00000049 }), + .BCIN({\blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , +\blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , +\blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , +\blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 }), + .B({\blk00000003/sig000003c7 , \blk00000003/sig000003c8 , \blk00000003/sig000003c9 , \blk00000003/sig000003ca , \blk00000003/sig000003cb , +\blk00000003/sig000003cc , \blk00000003/sig000003cd , \blk00000003/sig000003ce , \blk00000003/sig000003cf , \blk00000003/sig000003d0 , +\blk00000003/sig000003d1 , \blk00000003/sig000003d2 , \blk00000003/sig000003d3 , \blk00000003/sig000003d4 , \blk00000003/sig000003d5 , +\blk00000003/sig000003d6 , \blk00000003/sig000003d7 , \blk00000003/sig000003d8 }), + .BCOUT({\NLW_blk00000003/blk000000fa_BCOUT<17>_UNCONNECTED , \NLW_blk00000003/blk000000fa_BCOUT<16>_UNCONNECTED , +\NLW_blk00000003/blk000000fa_BCOUT<15>_UNCONNECTED , \NLW_blk00000003/blk000000fa_BCOUT<14>_UNCONNECTED , +\NLW_blk00000003/blk000000fa_BCOUT<13>_UNCONNECTED , \NLW_blk00000003/blk000000fa_BCOUT<12>_UNCONNECTED , +\NLW_blk00000003/blk000000fa_BCOUT<11>_UNCONNECTED , \NLW_blk00000003/blk000000fa_BCOUT<10>_UNCONNECTED , +\NLW_blk00000003/blk000000fa_BCOUT<9>_UNCONNECTED , \NLW_blk00000003/blk000000fa_BCOUT<8>_UNCONNECTED , +\NLW_blk00000003/blk000000fa_BCOUT<7>_UNCONNECTED , \NLW_blk00000003/blk000000fa_BCOUT<6>_UNCONNECTED , +\NLW_blk00000003/blk000000fa_BCOUT<5>_UNCONNECTED , \NLW_blk00000003/blk000000fa_BCOUT<4>_UNCONNECTED , +\NLW_blk00000003/blk000000fa_BCOUT<3>_UNCONNECTED , \NLW_blk00000003/blk000000fa_BCOUT<2>_UNCONNECTED , +\NLW_blk00000003/blk000000fa_BCOUT<1>_UNCONNECTED , \NLW_blk00000003/blk000000fa_BCOUT<0>_UNCONNECTED }), + .D({\blk00000003/sig00000439 , \blk00000003/sig00000439 , \blk00000003/sig0000043a , \blk00000003/sig0000043b , \blk00000003/sig0000043c , +\blk00000003/sig0000043d , \blk00000003/sig0000043e , \blk00000003/sig0000043f , \blk00000003/sig00000440 , \blk00000003/sig00000441 , +\blk00000003/sig00000442 , \blk00000003/sig00000443 , \blk00000003/sig00000444 , \blk00000003/sig00000445 , \blk00000003/sig00000446 , +\blk00000003/sig00000447 , \blk00000003/sig00000448 , \blk00000003/sig00000449 , \blk00000003/sig0000044a , \blk00000003/sig0000044b , +\blk00000003/sig0000044c , \blk00000003/sig0000044d , \blk00000003/sig0000044e , \blk00000003/sig0000044f , \blk00000003/sig00000450 }), + .P({\NLW_blk00000003/blk000000fa_P<47>_UNCONNECTED , \NLW_blk00000003/blk000000fa_P<46>_UNCONNECTED , +\NLW_blk00000003/blk000000fa_P<45>_UNCONNECTED , \NLW_blk00000003/blk000000fa_P<44>_UNCONNECTED , \NLW_blk00000003/blk000000fa_P<43>_UNCONNECTED , +\NLW_blk00000003/blk000000fa_P<42>_UNCONNECTED , \NLW_blk00000003/blk000000fa_P<41>_UNCONNECTED , \NLW_blk00000003/blk000000fa_P<40>_UNCONNECTED , +\NLW_blk00000003/blk000000fa_P<39>_UNCONNECTED , \NLW_blk00000003/blk000000fa_P<38>_UNCONNECTED , \NLW_blk00000003/blk000000fa_P<37>_UNCONNECTED , +\NLW_blk00000003/blk000000fa_P<36>_UNCONNECTED , \NLW_blk00000003/blk000000fa_P<35>_UNCONNECTED , \NLW_blk00000003/blk000000fa_P<34>_UNCONNECTED , +\NLW_blk00000003/blk000000fa_P<33>_UNCONNECTED , \NLW_blk00000003/blk000000fa_P<32>_UNCONNECTED , \NLW_blk00000003/blk000000fa_P<31>_UNCONNECTED , +\NLW_blk00000003/blk000000fa_P<30>_UNCONNECTED , \NLW_blk00000003/blk000000fa_P<29>_UNCONNECTED , \NLW_blk00000003/blk000000fa_P<28>_UNCONNECTED , +\NLW_blk00000003/blk000000fa_P<27>_UNCONNECTED , \NLW_blk00000003/blk000000fa_P<26>_UNCONNECTED , \NLW_blk00000003/blk000000fa_P<25>_UNCONNECTED , +\NLW_blk00000003/blk000000fa_P<24>_UNCONNECTED , \NLW_blk00000003/blk000000fa_P<23>_UNCONNECTED , \NLW_blk00000003/blk000000fa_P<22>_UNCONNECTED , +\NLW_blk00000003/blk000000fa_P<21>_UNCONNECTED , \NLW_blk00000003/blk000000fa_P<20>_UNCONNECTED , \NLW_blk00000003/blk000000fa_P<19>_UNCONNECTED , +\NLW_blk00000003/blk000000fa_P<18>_UNCONNECTED , \NLW_blk00000003/blk000000fa_P<17>_UNCONNECTED , \NLW_blk00000003/blk000000fa_P<16>_UNCONNECTED , +\NLW_blk00000003/blk000000fa_P<15>_UNCONNECTED , \NLW_blk00000003/blk000000fa_P<14>_UNCONNECTED , \NLW_blk00000003/blk000000fa_P<13>_UNCONNECTED , +\NLW_blk00000003/blk000000fa_P<12>_UNCONNECTED , \NLW_blk00000003/blk000000fa_P<11>_UNCONNECTED , \NLW_blk00000003/blk000000fa_P<10>_UNCONNECTED , +\NLW_blk00000003/blk000000fa_P<9>_UNCONNECTED , \NLW_blk00000003/blk000000fa_P<8>_UNCONNECTED , \NLW_blk00000003/blk000000fa_P<7>_UNCONNECTED , +\NLW_blk00000003/blk000000fa_P<6>_UNCONNECTED , \NLW_blk00000003/blk000000fa_P<5>_UNCONNECTED , \NLW_blk00000003/blk000000fa_P<4>_UNCONNECTED , +\NLW_blk00000003/blk000000fa_P<3>_UNCONNECTED , \NLW_blk00000003/blk000000fa_P<2>_UNCONNECTED , \NLW_blk00000003/blk000000fa_P<1>_UNCONNECTED , +\NLW_blk00000003/blk000000fa_P<0>_UNCONNECTED }), + .A({\blk00000003/sig00000451 , \blk00000003/sig00000451 , \blk00000003/sig00000451 , \blk00000003/sig00000451 , \blk00000003/sig00000451 , +\blk00000003/sig00000451 , \blk00000003/sig00000451 , \blk00000003/sig00000452 , \blk00000003/sig00000453 , \blk00000003/sig00000454 , +\blk00000003/sig00000455 , \blk00000003/sig00000456 , \blk00000003/sig00000457 , \blk00000003/sig00000458 , \blk00000003/sig00000459 , +\blk00000003/sig0000045a , \blk00000003/sig0000045b , \blk00000003/sig0000045c , \blk00000003/sig0000045d , \blk00000003/sig0000045e , +\blk00000003/sig0000045f , \blk00000003/sig00000460 , \blk00000003/sig00000461 , \blk00000003/sig00000462 , \blk00000003/sig00000463 , +\blk00000003/sig00000464 , \blk00000003/sig00000465 , \blk00000003/sig00000466 , \blk00000003/sig00000467 , \blk00000003/sig00000468 }), + .PCOUT({\blk00000003/sig000000c3 , \blk00000003/sig000000c4 , \blk00000003/sig000000c5 , \blk00000003/sig000000c6 , \blk00000003/sig000000c7 , +\blk00000003/sig000000c8 , \blk00000003/sig000000c9 , \blk00000003/sig000000ca , \blk00000003/sig000000cb , \blk00000003/sig000000cc , +\blk00000003/sig000000cd , \blk00000003/sig000000ce , \blk00000003/sig000000cf , \blk00000003/sig000000d0 , \blk00000003/sig000000d1 , +\blk00000003/sig000000d2 , \blk00000003/sig000000d3 , \blk00000003/sig000000d4 , \blk00000003/sig000000d5 , \blk00000003/sig000000d6 , +\blk00000003/sig000000d7 , \blk00000003/sig000000d8 , \blk00000003/sig000000d9 , \blk00000003/sig000000da , \blk00000003/sig000000db , +\blk00000003/sig000000dc , \blk00000003/sig000000dd , \blk00000003/sig000000de , \blk00000003/sig000000df , \blk00000003/sig000000e0 , +\blk00000003/sig000000e1 , \blk00000003/sig000000e2 , \blk00000003/sig000000e3 , \blk00000003/sig000000e4 , \blk00000003/sig000000e5 , +\blk00000003/sig000000e6 , \blk00000003/sig000000e7 , \blk00000003/sig000000e8 , \blk00000003/sig000000e9 , \blk00000003/sig000000ea , +\blk00000003/sig000000eb , \blk00000003/sig000000ec , \blk00000003/sig000000ed , \blk00000003/sig000000ee , \blk00000003/sig000000ef , +\blk00000003/sig000000f0 , \blk00000003/sig000000f1 , \blk00000003/sig000000f2 }), + .ACIN({\blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , +\blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , +\blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , +\blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , +\blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , +\blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 }), + .CARRYINSEL({\blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 }) + ); + DSP48E1 #( + .ACASCREG ( 1 ), + .ADREG ( 1 ), + .ALUMODEREG ( 0 ), + .AREG ( 1 ), + .AUTORESET_PATDET ( "NO_RESET" ), + .A_INPUT ( "DIRECT" ), + .BCASCREG ( 1 ), + .BREG ( 1 ), + .B_INPUT ( "DIRECT" ), + .CARRYINREG ( 1 ), + .CARRYINSELREG ( 1 ), + .CREG ( 1 ), + .DREG ( 1 ), + .INMODEREG ( 1 ), + .MASK ( 48'hFFFFFFFFFFFE ), + .MREG ( 1 ), + .OPMODEREG ( 0 ), + .PATTERN ( 48'h000000000000 ), + .PREG ( 1 ), + .SEL_MASK ( "MASK" ), + .SEL_PATTERN ( "PATTERN" ), + .USE_DPORT ( "TRUE" ), + .USE_MULT ( "MULTIPLY" ), + .USE_PATTERN_DETECT ( "NO_PATDET" ), + .USE_SIMD ( "ONE48" )) + \blk00000003/blk000000f9 ( + .PATTERNBDETECT(\NLW_blk00000003/blk000000f9_PATTERNBDETECT_UNCONNECTED ), + .RSTC(\blk00000003/sig00000049 ), + .CEB1(\blk00000003/sig00000049 ), + .CEAD(ce), + .MULTSIGNOUT(\NLW_blk00000003/blk000000f9_MULTSIGNOUT_UNCONNECTED ), + .CEC(ce), + .RSTM(\blk00000003/sig00000049 ), + .MULTSIGNIN(\blk00000003/sig00000049 ), + .CEB2(ce), + .RSTCTRL(\blk00000003/sig00000049 ), + .CEP(ce), + .CARRYCASCOUT(\NLW_blk00000003/blk000000f9_CARRYCASCOUT_UNCONNECTED ), + .RSTA(\blk00000003/sig00000049 ), + .CECARRYIN(ce), + .UNDERFLOW(\NLW_blk00000003/blk000000f9_UNDERFLOW_UNCONNECTED ), + .PATTERNDETECT(\NLW_blk00000003/blk000000f9_PATTERNDETECT_UNCONNECTED ), + .RSTALUMODE(\blk00000003/sig00000049 ), + .RSTALLCARRYIN(\blk00000003/sig00000049 ), + .CED(ce), + .RSTD(\blk00000003/sig00000049 ), + .CEALUMODE(ce), + .CEA2(ce), + .CLK(clk), + .CEA1(\blk00000003/sig00000049 ), + .RSTB(\blk00000003/sig00000049 ), + .OVERFLOW(\NLW_blk00000003/blk000000f9_OVERFLOW_UNCONNECTED ), + .CECTRL(ce), + .CEM(ce), + .CARRYIN(\blk00000003/sig00000049 ), + .CARRYCASCIN(\blk00000003/sig00000049 ), + .RSTINMODE(\blk00000003/sig00000049 ), + .CEINMODE(ce), + .RSTP(\blk00000003/sig00000049 ), + .ACOUT({\NLW_blk00000003/blk000000f9_ACOUT<29>_UNCONNECTED , \NLW_blk00000003/blk000000f9_ACOUT<28>_UNCONNECTED , +\NLW_blk00000003/blk000000f9_ACOUT<27>_UNCONNECTED , \NLW_blk00000003/blk000000f9_ACOUT<26>_UNCONNECTED , +\NLW_blk00000003/blk000000f9_ACOUT<25>_UNCONNECTED , \NLW_blk00000003/blk000000f9_ACOUT<24>_UNCONNECTED , +\NLW_blk00000003/blk000000f9_ACOUT<23>_UNCONNECTED , \NLW_blk00000003/blk000000f9_ACOUT<22>_UNCONNECTED , +\NLW_blk00000003/blk000000f9_ACOUT<21>_UNCONNECTED , \NLW_blk00000003/blk000000f9_ACOUT<20>_UNCONNECTED , +\NLW_blk00000003/blk000000f9_ACOUT<19>_UNCONNECTED , \NLW_blk00000003/blk000000f9_ACOUT<18>_UNCONNECTED , +\NLW_blk00000003/blk000000f9_ACOUT<17>_UNCONNECTED , \NLW_blk00000003/blk000000f9_ACOUT<16>_UNCONNECTED , +\NLW_blk00000003/blk000000f9_ACOUT<15>_UNCONNECTED , \NLW_blk00000003/blk000000f9_ACOUT<14>_UNCONNECTED , +\NLW_blk00000003/blk000000f9_ACOUT<13>_UNCONNECTED , \NLW_blk00000003/blk000000f9_ACOUT<12>_UNCONNECTED , +\NLW_blk00000003/blk000000f9_ACOUT<11>_UNCONNECTED , \NLW_blk00000003/blk000000f9_ACOUT<10>_UNCONNECTED , +\NLW_blk00000003/blk000000f9_ACOUT<9>_UNCONNECTED , \NLW_blk00000003/blk000000f9_ACOUT<8>_UNCONNECTED , +\NLW_blk00000003/blk000000f9_ACOUT<7>_UNCONNECTED , \NLW_blk00000003/blk000000f9_ACOUT<6>_UNCONNECTED , +\NLW_blk00000003/blk000000f9_ACOUT<5>_UNCONNECTED , \NLW_blk00000003/blk000000f9_ACOUT<4>_UNCONNECTED , +\NLW_blk00000003/blk000000f9_ACOUT<3>_UNCONNECTED , \NLW_blk00000003/blk000000f9_ACOUT<2>_UNCONNECTED , +\NLW_blk00000003/blk000000f9_ACOUT<1>_UNCONNECTED , \NLW_blk00000003/blk000000f9_ACOUT<0>_UNCONNECTED }), + .OPMODE({\blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig000000ac , \blk00000003/sig00000049 , \blk00000003/sig000000ac , +\blk00000003/sig00000049 , \blk00000003/sig000000ac }), + .PCIN({\blk00000003/sig00000397 , \blk00000003/sig00000398 , \blk00000003/sig00000399 , \blk00000003/sig0000039a , \blk00000003/sig0000039b , +\blk00000003/sig0000039c , \blk00000003/sig0000039d , \blk00000003/sig0000039e , \blk00000003/sig0000039f , \blk00000003/sig000003a0 , +\blk00000003/sig000003a1 , \blk00000003/sig000003a2 , \blk00000003/sig000003a3 , \blk00000003/sig000003a4 , \blk00000003/sig000003a5 , +\blk00000003/sig000003a6 , \blk00000003/sig000003a7 , \blk00000003/sig000003a8 , \blk00000003/sig000003a9 , \blk00000003/sig000003aa , +\blk00000003/sig000003ab , \blk00000003/sig000003ac , \blk00000003/sig000003ad , \blk00000003/sig000003ae , \blk00000003/sig000003af , +\blk00000003/sig000003b0 , \blk00000003/sig000003b1 , \blk00000003/sig000003b2 , \blk00000003/sig000003b3 , \blk00000003/sig000003b4 , +\blk00000003/sig000003b5 , \blk00000003/sig000003b6 , \blk00000003/sig000003b7 , \blk00000003/sig000003b8 , \blk00000003/sig000003b9 , +\blk00000003/sig000003ba , \blk00000003/sig000003bb , \blk00000003/sig000003bc , \blk00000003/sig000003bd , \blk00000003/sig000003be , +\blk00000003/sig000003bf , \blk00000003/sig000003c0 , \blk00000003/sig000003c1 , \blk00000003/sig000003c2 , \blk00000003/sig000003c3 , +\blk00000003/sig000003c4 , \blk00000003/sig000003c5 , \blk00000003/sig000003c6 }), + .ALUMODE({\blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 }), + .C({\blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , +\blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , +\blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , +\blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , +\blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , +\blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , +\blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , +\blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , +\blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , +\blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 }), + .CARRYOUT({\NLW_blk00000003/blk000000f9_CARRYOUT<3>_UNCONNECTED , \NLW_blk00000003/blk000000f9_CARRYOUT<2>_UNCONNECTED , +\NLW_blk00000003/blk000000f9_CARRYOUT<1>_UNCONNECTED , \NLW_blk00000003/blk000000f9_CARRYOUT<0>_UNCONNECTED }), + .INMODE({\blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig000000ac , \blk00000003/sig00000049 , \blk00000003/sig00000049 }), + .BCIN({\blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , +\blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , +\blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , +\blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 }), + .B({\blk00000003/sig000003c7 , \blk00000003/sig000003c8 , \blk00000003/sig000003c9 , \blk00000003/sig000003ca , \blk00000003/sig000003cb , +\blk00000003/sig000003cc , \blk00000003/sig000003cd , \blk00000003/sig000003ce , \blk00000003/sig000003cf , \blk00000003/sig000003d0 , +\blk00000003/sig000003d1 , \blk00000003/sig000003d2 , \blk00000003/sig000003d3 , \blk00000003/sig000003d4 , \blk00000003/sig000003d5 , +\blk00000003/sig000003d6 , \blk00000003/sig000003d7 , \blk00000003/sig000003d8 }), + .BCOUT({\NLW_blk00000003/blk000000f9_BCOUT<17>_UNCONNECTED , \NLW_blk00000003/blk000000f9_BCOUT<16>_UNCONNECTED , +\NLW_blk00000003/blk000000f9_BCOUT<15>_UNCONNECTED , \NLW_blk00000003/blk000000f9_BCOUT<14>_UNCONNECTED , +\NLW_blk00000003/blk000000f9_BCOUT<13>_UNCONNECTED , \NLW_blk00000003/blk000000f9_BCOUT<12>_UNCONNECTED , +\NLW_blk00000003/blk000000f9_BCOUT<11>_UNCONNECTED , \NLW_blk00000003/blk000000f9_BCOUT<10>_UNCONNECTED , +\NLW_blk00000003/blk000000f9_BCOUT<9>_UNCONNECTED , \NLW_blk00000003/blk000000f9_BCOUT<8>_UNCONNECTED , +\NLW_blk00000003/blk000000f9_BCOUT<7>_UNCONNECTED , \NLW_blk00000003/blk000000f9_BCOUT<6>_UNCONNECTED , +\NLW_blk00000003/blk000000f9_BCOUT<5>_UNCONNECTED , \NLW_blk00000003/blk000000f9_BCOUT<4>_UNCONNECTED , +\NLW_blk00000003/blk000000f9_BCOUT<3>_UNCONNECTED , \NLW_blk00000003/blk000000f9_BCOUT<2>_UNCONNECTED , +\NLW_blk00000003/blk000000f9_BCOUT<1>_UNCONNECTED , \NLW_blk00000003/blk000000f9_BCOUT<0>_UNCONNECTED }), + .D({\blk00000003/sig000003d9 , \blk00000003/sig000003d9 , \blk00000003/sig000003da , \blk00000003/sig000003db , \blk00000003/sig000003dc , +\blk00000003/sig000003dd , \blk00000003/sig000003de , \blk00000003/sig000003df , \blk00000003/sig000003e0 , \blk00000003/sig000003e1 , +\blk00000003/sig000003e2 , \blk00000003/sig000003e3 , \blk00000003/sig000003e4 , \blk00000003/sig000003e5 , \blk00000003/sig000003e6 , +\blk00000003/sig000003e7 , \blk00000003/sig000003e8 , \blk00000003/sig000003e9 , \blk00000003/sig000003ea , \blk00000003/sig000003eb , +\blk00000003/sig000003ec , \blk00000003/sig000003ed , \blk00000003/sig000003ee , \blk00000003/sig000003ef , \blk00000003/sig000003f0 }), + .P({\NLW_blk00000003/blk000000f9_P<47>_UNCONNECTED , \NLW_blk00000003/blk000000f9_P<46>_UNCONNECTED , +\NLW_blk00000003/blk000000f9_P<45>_UNCONNECTED , \NLW_blk00000003/blk000000f9_P<44>_UNCONNECTED , \NLW_blk00000003/blk000000f9_P<43>_UNCONNECTED , +\NLW_blk00000003/blk000000f9_P<42>_UNCONNECTED , \NLW_blk00000003/blk000000f9_P<41>_UNCONNECTED , \NLW_blk00000003/blk000000f9_P<40>_UNCONNECTED , +\NLW_blk00000003/blk000000f9_P<39>_UNCONNECTED , \NLW_blk00000003/blk000000f9_P<38>_UNCONNECTED , \NLW_blk00000003/blk000000f9_P<37>_UNCONNECTED , +\NLW_blk00000003/blk000000f9_P<36>_UNCONNECTED , \NLW_blk00000003/blk000000f9_P<35>_UNCONNECTED , \NLW_blk00000003/blk000000f9_P<34>_UNCONNECTED , +\NLW_blk00000003/blk000000f9_P<33>_UNCONNECTED , \NLW_blk00000003/blk000000f9_P<32>_UNCONNECTED , \NLW_blk00000003/blk000000f9_P<31>_UNCONNECTED , +\NLW_blk00000003/blk000000f9_P<30>_UNCONNECTED , \NLW_blk00000003/blk000000f9_P<29>_UNCONNECTED , \NLW_blk00000003/blk000000f9_P<28>_UNCONNECTED , +\NLW_blk00000003/blk000000f9_P<27>_UNCONNECTED , \NLW_blk00000003/blk000000f9_P<26>_UNCONNECTED , \NLW_blk00000003/blk000000f9_P<25>_UNCONNECTED , +\NLW_blk00000003/blk000000f9_P<24>_UNCONNECTED , \NLW_blk00000003/blk000000f9_P<23>_UNCONNECTED , \NLW_blk00000003/blk000000f9_P<22>_UNCONNECTED , +\NLW_blk00000003/blk000000f9_P<21>_UNCONNECTED , \NLW_blk00000003/blk000000f9_P<20>_UNCONNECTED , \NLW_blk00000003/blk000000f9_P<19>_UNCONNECTED , +\NLW_blk00000003/blk000000f9_P<18>_UNCONNECTED , \NLW_blk00000003/blk000000f9_P<17>_UNCONNECTED , \NLW_blk00000003/blk000000f9_P<16>_UNCONNECTED , +\NLW_blk00000003/blk000000f9_P<15>_UNCONNECTED , \NLW_blk00000003/blk000000f9_P<14>_UNCONNECTED , \NLW_blk00000003/blk000000f9_P<13>_UNCONNECTED , +\NLW_blk00000003/blk000000f9_P<12>_UNCONNECTED , \NLW_blk00000003/blk000000f9_P<11>_UNCONNECTED , \NLW_blk00000003/blk000000f9_P<10>_UNCONNECTED , +\NLW_blk00000003/blk000000f9_P<9>_UNCONNECTED , \NLW_blk00000003/blk000000f9_P<8>_UNCONNECTED , \NLW_blk00000003/blk000000f9_P<7>_UNCONNECTED , +\NLW_blk00000003/blk000000f9_P<6>_UNCONNECTED , \NLW_blk00000003/blk000000f9_P<5>_UNCONNECTED , \NLW_blk00000003/blk000000f9_P<4>_UNCONNECTED , +\NLW_blk00000003/blk000000f9_P<3>_UNCONNECTED , \NLW_blk00000003/blk000000f9_P<2>_UNCONNECTED , \NLW_blk00000003/blk000000f9_P<1>_UNCONNECTED , +\NLW_blk00000003/blk000000f9_P<0>_UNCONNECTED }), + .A({\blk00000003/sig000003f1 , \blk00000003/sig000003f1 , \blk00000003/sig000003f1 , \blk00000003/sig000003f1 , \blk00000003/sig000003f1 , +\blk00000003/sig000003f1 , \blk00000003/sig000003f1 , \blk00000003/sig000003f2 , \blk00000003/sig000003f3 , \blk00000003/sig000003f4 , +\blk00000003/sig000003f5 , \blk00000003/sig000003f6 , \blk00000003/sig000003f7 , \blk00000003/sig000003f8 , \blk00000003/sig000003f9 , +\blk00000003/sig000003fa , \blk00000003/sig000003fb , \blk00000003/sig000003fc , \blk00000003/sig000003fd , \blk00000003/sig000003fe , +\blk00000003/sig000003ff , \blk00000003/sig00000400 , \blk00000003/sig00000401 , \blk00000003/sig00000402 , \blk00000003/sig00000403 , +\blk00000003/sig00000404 , \blk00000003/sig00000405 , \blk00000003/sig00000406 , \blk00000003/sig00000407 , \blk00000003/sig00000408 }), + .PCOUT({\blk00000003/sig0000014c , \blk00000003/sig0000014d , \blk00000003/sig0000014e , \blk00000003/sig0000014f , \blk00000003/sig00000150 , +\blk00000003/sig00000151 , \blk00000003/sig00000152 , \blk00000003/sig00000153 , \blk00000003/sig00000154 , \blk00000003/sig00000155 , +\blk00000003/sig00000156 , \blk00000003/sig00000157 , \blk00000003/sig00000158 , \blk00000003/sig00000159 , \blk00000003/sig0000015a , +\blk00000003/sig0000015b , \blk00000003/sig0000015c , \blk00000003/sig0000015d , \blk00000003/sig0000015e , \blk00000003/sig0000015f , +\blk00000003/sig00000160 , \blk00000003/sig00000161 , \blk00000003/sig00000162 , \blk00000003/sig00000163 , \blk00000003/sig00000164 , +\blk00000003/sig00000165 , \blk00000003/sig00000166 , \blk00000003/sig00000167 , \blk00000003/sig00000168 , \blk00000003/sig00000169 , +\blk00000003/sig0000016a , \blk00000003/sig0000016b , \blk00000003/sig0000016c , \blk00000003/sig0000016d , \blk00000003/sig0000016e , +\blk00000003/sig0000016f , \blk00000003/sig00000170 , \blk00000003/sig00000171 , \blk00000003/sig00000172 , \blk00000003/sig00000173 , +\blk00000003/sig00000174 , \blk00000003/sig00000175 , \blk00000003/sig00000176 , \blk00000003/sig00000177 , \blk00000003/sig00000178 , +\blk00000003/sig00000179 , \blk00000003/sig0000017a , \blk00000003/sig0000017b }), + .ACIN({\blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , +\blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , +\blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , +\blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , +\blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , +\blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 }), + .CARRYINSEL({\blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 }) + ); + DSP48E1 #( + .ACASCREG ( 1 ), + .ADREG ( 1 ), + .ALUMODEREG ( 0 ), + .AREG ( 1 ), + .AUTORESET_PATDET ( "NO_RESET" ), + .A_INPUT ( "DIRECT" ), + .BCASCREG ( 1 ), + .BREG ( 1 ), + .B_INPUT ( "DIRECT" ), + .CARRYINREG ( 1 ), + .CARRYINSELREG ( 1 ), + .CREG ( 1 ), + .DREG ( 1 ), + .INMODEREG ( 1 ), + .MASK ( 48'hFFFFFFFFFFFE ), + .MREG ( 1 ), + .OPMODEREG ( 0 ), + .PATTERN ( 48'h000000000000 ), + .PREG ( 1 ), + .SEL_MASK ( "MASK" ), + .SEL_PATTERN ( "PATTERN" ), + .USE_DPORT ( "TRUE" ), + .USE_MULT ( "MULTIPLY" ), + .USE_PATTERN_DETECT ( "NO_PATDET" ), + .USE_SIMD ( "ONE48" )) + \blk00000003/blk000000f8 ( + .PATTERNBDETECT(\NLW_blk00000003/blk000000f8_PATTERNBDETECT_UNCONNECTED ), + .RSTC(\blk00000003/sig00000049 ), + .CEB1(\blk00000003/sig00000049 ), + .CEAD(ce), + .MULTSIGNOUT(\NLW_blk00000003/blk000000f8_MULTSIGNOUT_UNCONNECTED ), + .CEC(ce), + .RSTM(\blk00000003/sig00000049 ), + .MULTSIGNIN(\blk00000003/sig00000049 ), + .CEB2(ce), + .RSTCTRL(\blk00000003/sig00000049 ), + .CEP(ce), + .CARRYCASCOUT(\NLW_blk00000003/blk000000f8_CARRYCASCOUT_UNCONNECTED ), + .RSTA(\blk00000003/sig00000049 ), + .CECARRYIN(ce), + .UNDERFLOW(\NLW_blk00000003/blk000000f8_UNDERFLOW_UNCONNECTED ), + .PATTERNDETECT(\NLW_blk00000003/blk000000f8_PATTERNDETECT_UNCONNECTED ), + .RSTALUMODE(\blk00000003/sig00000049 ), + .RSTALLCARRYIN(\blk00000003/sig00000049 ), + .CED(ce), + .RSTD(\blk00000003/sig00000049 ), + .CEALUMODE(ce), + .CEA2(ce), + .CLK(clk), + .CEA1(\blk00000003/sig00000049 ), + .RSTB(\blk00000003/sig00000049 ), + .OVERFLOW(\NLW_blk00000003/blk000000f8_OVERFLOW_UNCONNECTED ), + .CECTRL(ce), + .CEM(ce), + .CARRYIN(\blk00000003/sig00000049 ), + .CARRYCASCIN(\blk00000003/sig00000049 ), + .RSTINMODE(\blk00000003/sig00000049 ), + .CEINMODE(ce), + .RSTP(\blk00000003/sig00000049 ), + .ACOUT({\NLW_blk00000003/blk000000f8_ACOUT<29>_UNCONNECTED , \NLW_blk00000003/blk000000f8_ACOUT<28>_UNCONNECTED , +\NLW_blk00000003/blk000000f8_ACOUT<27>_UNCONNECTED , \NLW_blk00000003/blk000000f8_ACOUT<26>_UNCONNECTED , +\NLW_blk00000003/blk000000f8_ACOUT<25>_UNCONNECTED , \NLW_blk00000003/blk000000f8_ACOUT<24>_UNCONNECTED , +\NLW_blk00000003/blk000000f8_ACOUT<23>_UNCONNECTED , \NLW_blk00000003/blk000000f8_ACOUT<22>_UNCONNECTED , +\NLW_blk00000003/blk000000f8_ACOUT<21>_UNCONNECTED , \NLW_blk00000003/blk000000f8_ACOUT<20>_UNCONNECTED , +\NLW_blk00000003/blk000000f8_ACOUT<19>_UNCONNECTED , \NLW_blk00000003/blk000000f8_ACOUT<18>_UNCONNECTED , +\NLW_blk00000003/blk000000f8_ACOUT<17>_UNCONNECTED , \NLW_blk00000003/blk000000f8_ACOUT<16>_UNCONNECTED , +\NLW_blk00000003/blk000000f8_ACOUT<15>_UNCONNECTED , \NLW_blk00000003/blk000000f8_ACOUT<14>_UNCONNECTED , +\NLW_blk00000003/blk000000f8_ACOUT<13>_UNCONNECTED , \NLW_blk00000003/blk000000f8_ACOUT<12>_UNCONNECTED , +\NLW_blk00000003/blk000000f8_ACOUT<11>_UNCONNECTED , \NLW_blk00000003/blk000000f8_ACOUT<10>_UNCONNECTED , +\NLW_blk00000003/blk000000f8_ACOUT<9>_UNCONNECTED , \NLW_blk00000003/blk000000f8_ACOUT<8>_UNCONNECTED , +\NLW_blk00000003/blk000000f8_ACOUT<7>_UNCONNECTED , \NLW_blk00000003/blk000000f8_ACOUT<6>_UNCONNECTED , +\NLW_blk00000003/blk000000f8_ACOUT<5>_UNCONNECTED , \NLW_blk00000003/blk000000f8_ACOUT<4>_UNCONNECTED , +\NLW_blk00000003/blk000000f8_ACOUT<3>_UNCONNECTED , \NLW_blk00000003/blk000000f8_ACOUT<2>_UNCONNECTED , +\NLW_blk00000003/blk000000f8_ACOUT<1>_UNCONNECTED , \NLW_blk00000003/blk000000f8_ACOUT<0>_UNCONNECTED }), + .OPMODE({\blk00000003/sig00000049 , \blk00000003/sig000000ac , \blk00000003/sig000000ac , \blk00000003/sig00000049 , \blk00000003/sig000000ac , +\blk00000003/sig00000049 , \blk00000003/sig000000ac }), + .PCIN({\blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , +\blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , +\blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , +\blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , +\blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , +\blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , +\blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , +\blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , +\blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , +\blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 }), + .ALUMODE({\blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 }), + .C({\blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , +\blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , +\blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , +\blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , +\blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , +\blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , +\blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , +\blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , +\blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , +\blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 }), + .CARRYOUT({\NLW_blk00000003/blk000000f8_CARRYOUT<3>_UNCONNECTED , \NLW_blk00000003/blk000000f8_CARRYOUT<2>_UNCONNECTED , +\NLW_blk00000003/blk000000f8_CARRYOUT<1>_UNCONNECTED , \NLW_blk00000003/blk000000f8_CARRYOUT<0>_UNCONNECTED }), + .INMODE({\blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig000000ac , \blk00000003/sig00000049 , \blk00000003/sig00000049 }), + .BCIN({\blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , +\blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , +\blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , +\blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 }), + .B({\blk00000003/sig000002c5 , \blk00000003/sig000002c6 , \blk00000003/sig000002c7 , \blk00000003/sig000002c8 , \blk00000003/sig000002c9 , +\blk00000003/sig000002ca , \blk00000003/sig000002cb , \blk00000003/sig000002cc , \blk00000003/sig000002cd , \blk00000003/sig000002ce , +\blk00000003/sig000002cf , \blk00000003/sig000002d0 , \blk00000003/sig000002d1 , \blk00000003/sig000002d2 , \blk00000003/sig000002d3 , +\blk00000003/sig000002d4 , \blk00000003/sig000002d5 , \blk00000003/sig000002d6 }), + .BCOUT({\NLW_blk00000003/blk000000f8_BCOUT<17>_UNCONNECTED , \NLW_blk00000003/blk000000f8_BCOUT<16>_UNCONNECTED , +\NLW_blk00000003/blk000000f8_BCOUT<15>_UNCONNECTED , \NLW_blk00000003/blk000000f8_BCOUT<14>_UNCONNECTED , +\NLW_blk00000003/blk000000f8_BCOUT<13>_UNCONNECTED , \NLW_blk00000003/blk000000f8_BCOUT<12>_UNCONNECTED , +\NLW_blk00000003/blk000000f8_BCOUT<11>_UNCONNECTED , \NLW_blk00000003/blk000000f8_BCOUT<10>_UNCONNECTED , +\NLW_blk00000003/blk000000f8_BCOUT<9>_UNCONNECTED , \NLW_blk00000003/blk000000f8_BCOUT<8>_UNCONNECTED , +\NLW_blk00000003/blk000000f8_BCOUT<7>_UNCONNECTED , \NLW_blk00000003/blk000000f8_BCOUT<6>_UNCONNECTED , +\NLW_blk00000003/blk000000f8_BCOUT<5>_UNCONNECTED , \NLW_blk00000003/blk000000f8_BCOUT<4>_UNCONNECTED , +\NLW_blk00000003/blk000000f8_BCOUT<3>_UNCONNECTED , \NLW_blk00000003/blk000000f8_BCOUT<2>_UNCONNECTED , +\NLW_blk00000003/blk000000f8_BCOUT<1>_UNCONNECTED , \NLW_blk00000003/blk000000f8_BCOUT<0>_UNCONNECTED }), + .D({\blk00000003/sig00000337 , \blk00000003/sig00000337 , \blk00000003/sig00000338 , \blk00000003/sig00000339 , \blk00000003/sig0000033a , +\blk00000003/sig0000033b , \blk00000003/sig0000033c , \blk00000003/sig0000033d , \blk00000003/sig0000033e , \blk00000003/sig0000033f , +\blk00000003/sig00000340 , \blk00000003/sig00000341 , \blk00000003/sig00000342 , \blk00000003/sig00000343 , \blk00000003/sig00000344 , +\blk00000003/sig00000345 , \blk00000003/sig00000346 , \blk00000003/sig00000347 , \blk00000003/sig00000348 , \blk00000003/sig00000349 , +\blk00000003/sig0000034a , \blk00000003/sig0000034b , \blk00000003/sig0000034c , \blk00000003/sig0000034d , \blk00000003/sig0000034e }), + .P({\NLW_blk00000003/blk000000f8_P<47>_UNCONNECTED , \NLW_blk00000003/blk000000f8_P<46>_UNCONNECTED , +\NLW_blk00000003/blk000000f8_P<45>_UNCONNECTED , \NLW_blk00000003/blk000000f8_P<44>_UNCONNECTED , \NLW_blk00000003/blk000000f8_P<43>_UNCONNECTED , +\NLW_blk00000003/blk000000f8_P<42>_UNCONNECTED , \NLW_blk00000003/blk000000f8_P<41>_UNCONNECTED , \NLW_blk00000003/blk000000f8_P<40>_UNCONNECTED , +\NLW_blk00000003/blk000000f8_P<39>_UNCONNECTED , \NLW_blk00000003/blk000000f8_P<38>_UNCONNECTED , \NLW_blk00000003/blk000000f8_P<37>_UNCONNECTED , +\NLW_blk00000003/blk000000f8_P<36>_UNCONNECTED , \NLW_blk00000003/blk000000f8_P<35>_UNCONNECTED , \NLW_blk00000003/blk000000f8_P<34>_UNCONNECTED , +\NLW_blk00000003/blk000000f8_P<33>_UNCONNECTED , \NLW_blk00000003/blk000000f8_P<32>_UNCONNECTED , \NLW_blk00000003/blk000000f8_P<31>_UNCONNECTED , +\NLW_blk00000003/blk000000f8_P<30>_UNCONNECTED , \NLW_blk00000003/blk000000f8_P<29>_UNCONNECTED , \NLW_blk00000003/blk000000f8_P<28>_UNCONNECTED , +\NLW_blk00000003/blk000000f8_P<27>_UNCONNECTED , \NLW_blk00000003/blk000000f8_P<26>_UNCONNECTED , \NLW_blk00000003/blk000000f8_P<25>_UNCONNECTED , +\NLW_blk00000003/blk000000f8_P<24>_UNCONNECTED , \NLW_blk00000003/blk000000f8_P<23>_UNCONNECTED , \NLW_blk00000003/blk000000f8_P<22>_UNCONNECTED , +\NLW_blk00000003/blk000000f8_P<21>_UNCONNECTED , \NLW_blk00000003/blk000000f8_P<20>_UNCONNECTED , \NLW_blk00000003/blk000000f8_P<19>_UNCONNECTED , +\NLW_blk00000003/blk000000f8_P<18>_UNCONNECTED , \NLW_blk00000003/blk000000f8_P<17>_UNCONNECTED , \NLW_blk00000003/blk000000f8_P<16>_UNCONNECTED , +\NLW_blk00000003/blk000000f8_P<15>_UNCONNECTED , \NLW_blk00000003/blk000000f8_P<14>_UNCONNECTED , \NLW_blk00000003/blk000000f8_P<13>_UNCONNECTED , +\NLW_blk00000003/blk000000f8_P<12>_UNCONNECTED , \NLW_blk00000003/blk000000f8_P<11>_UNCONNECTED , \NLW_blk00000003/blk000000f8_P<10>_UNCONNECTED , +\NLW_blk00000003/blk000000f8_P<9>_UNCONNECTED , \NLW_blk00000003/blk000000f8_P<8>_UNCONNECTED , \NLW_blk00000003/blk000000f8_P<7>_UNCONNECTED , +\NLW_blk00000003/blk000000f8_P<6>_UNCONNECTED , \NLW_blk00000003/blk000000f8_P<5>_UNCONNECTED , \NLW_blk00000003/blk000000f8_P<4>_UNCONNECTED , +\NLW_blk00000003/blk000000f8_P<3>_UNCONNECTED , \NLW_blk00000003/blk000000f8_P<2>_UNCONNECTED , \NLW_blk00000003/blk000000f8_P<1>_UNCONNECTED , +\NLW_blk00000003/blk000000f8_P<0>_UNCONNECTED }), + .A({\blk00000003/sig0000034f , \blk00000003/sig0000034f , \blk00000003/sig0000034f , \blk00000003/sig0000034f , \blk00000003/sig0000034f , +\blk00000003/sig0000034f , \blk00000003/sig0000034f , \blk00000003/sig00000350 , \blk00000003/sig00000351 , \blk00000003/sig00000352 , +\blk00000003/sig00000353 , \blk00000003/sig00000354 , \blk00000003/sig00000355 , \blk00000003/sig00000356 , \blk00000003/sig00000357 , +\blk00000003/sig00000358 , \blk00000003/sig00000359 , \blk00000003/sig0000035a , \blk00000003/sig0000035b , \blk00000003/sig0000035c , +\blk00000003/sig0000035d , \blk00000003/sig0000035e , \blk00000003/sig0000035f , \blk00000003/sig00000360 , \blk00000003/sig00000361 , +\blk00000003/sig00000362 , \blk00000003/sig00000363 , \blk00000003/sig00000364 , \blk00000003/sig00000365 , \blk00000003/sig00000366 }), + .PCOUT({\blk00000003/sig00000367 , \blk00000003/sig00000368 , \blk00000003/sig00000369 , \blk00000003/sig0000036a , \blk00000003/sig0000036b , +\blk00000003/sig0000036c , \blk00000003/sig0000036d , \blk00000003/sig0000036e , \blk00000003/sig0000036f , \blk00000003/sig00000370 , +\blk00000003/sig00000371 , \blk00000003/sig00000372 , \blk00000003/sig00000373 , \blk00000003/sig00000374 , \blk00000003/sig00000375 , +\blk00000003/sig00000376 , \blk00000003/sig00000377 , \blk00000003/sig00000378 , \blk00000003/sig00000379 , \blk00000003/sig0000037a , +\blk00000003/sig0000037b , \blk00000003/sig0000037c , \blk00000003/sig0000037d , \blk00000003/sig0000037e , \blk00000003/sig0000037f , +\blk00000003/sig00000380 , \blk00000003/sig00000381 , \blk00000003/sig00000382 , \blk00000003/sig00000383 , \blk00000003/sig00000384 , +\blk00000003/sig00000385 , \blk00000003/sig00000386 , \blk00000003/sig00000387 , \blk00000003/sig00000388 , \blk00000003/sig00000389 , +\blk00000003/sig0000038a , \blk00000003/sig0000038b , \blk00000003/sig0000038c , \blk00000003/sig0000038d , \blk00000003/sig0000038e , +\blk00000003/sig0000038f , \blk00000003/sig00000390 , \blk00000003/sig00000391 , \blk00000003/sig00000392 , \blk00000003/sig00000393 , +\blk00000003/sig00000394 , \blk00000003/sig00000395 , \blk00000003/sig00000396 }), + .ACIN({\blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , +\blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , +\blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , +\blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , +\blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , +\blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 }), + .CARRYINSEL({\blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 }) + ); + DSP48E1 #( + .ACASCREG ( 1 ), + .ADREG ( 1 ), + .ALUMODEREG ( 0 ), + .AREG ( 1 ), + .AUTORESET_PATDET ( "NO_RESET" ), + .A_INPUT ( "DIRECT" ), + .BCASCREG ( 1 ), + .BREG ( 1 ), + .B_INPUT ( "DIRECT" ), + .CARRYINREG ( 1 ), + .CARRYINSELREG ( 1 ), + .CREG ( 1 ), + .DREG ( 1 ), + .INMODEREG ( 1 ), + .MASK ( 48'hFFFFFFFFFFFE ), + .MREG ( 1 ), + .OPMODEREG ( 0 ), + .PATTERN ( 48'h000000000000 ), + .PREG ( 1 ), + .SEL_MASK ( "MASK" ), + .SEL_PATTERN ( "PATTERN" ), + .USE_DPORT ( "TRUE" ), + .USE_MULT ( "MULTIPLY" ), + .USE_PATTERN_DETECT ( "NO_PATDET" ), + .USE_SIMD ( "ONE48" )) + \blk00000003/blk000000f7 ( + .PATTERNBDETECT(\NLW_blk00000003/blk000000f7_PATTERNBDETECT_UNCONNECTED ), + .RSTC(\blk00000003/sig00000049 ), + .CEB1(\blk00000003/sig00000049 ), + .CEAD(ce), + .MULTSIGNOUT(\NLW_blk00000003/blk000000f7_MULTSIGNOUT_UNCONNECTED ), + .CEC(ce), + .RSTM(\blk00000003/sig00000049 ), + .MULTSIGNIN(\blk00000003/sig00000049 ), + .CEB2(ce), + .RSTCTRL(\blk00000003/sig00000049 ), + .CEP(ce), + .CARRYCASCOUT(\NLW_blk00000003/blk000000f7_CARRYCASCOUT_UNCONNECTED ), + .RSTA(\blk00000003/sig00000049 ), + .CECARRYIN(ce), + .UNDERFLOW(\NLW_blk00000003/blk000000f7_UNDERFLOW_UNCONNECTED ), + .PATTERNDETECT(\NLW_blk00000003/blk000000f7_PATTERNDETECT_UNCONNECTED ), + .RSTALUMODE(\blk00000003/sig00000049 ), + .RSTALLCARRYIN(\blk00000003/sig00000049 ), + .CED(ce), + .RSTD(\blk00000003/sig00000049 ), + .CEALUMODE(ce), + .CEA2(ce), + .CLK(clk), + .CEA1(\blk00000003/sig00000049 ), + .RSTB(\blk00000003/sig00000049 ), + .OVERFLOW(\NLW_blk00000003/blk000000f7_OVERFLOW_UNCONNECTED ), + .CECTRL(ce), + .CEM(ce), + .CARRYIN(\blk00000003/sig00000049 ), + .CARRYCASCIN(\blk00000003/sig00000049 ), + .RSTINMODE(\blk00000003/sig00000049 ), + .CEINMODE(ce), + .RSTP(\blk00000003/sig00000049 ), + .ACOUT({\NLW_blk00000003/blk000000f7_ACOUT<29>_UNCONNECTED , \NLW_blk00000003/blk000000f7_ACOUT<28>_UNCONNECTED , +\NLW_blk00000003/blk000000f7_ACOUT<27>_UNCONNECTED , \NLW_blk00000003/blk000000f7_ACOUT<26>_UNCONNECTED , +\NLW_blk00000003/blk000000f7_ACOUT<25>_UNCONNECTED , \NLW_blk00000003/blk000000f7_ACOUT<24>_UNCONNECTED , +\NLW_blk00000003/blk000000f7_ACOUT<23>_UNCONNECTED , \NLW_blk00000003/blk000000f7_ACOUT<22>_UNCONNECTED , +\NLW_blk00000003/blk000000f7_ACOUT<21>_UNCONNECTED , \NLW_blk00000003/blk000000f7_ACOUT<20>_UNCONNECTED , +\NLW_blk00000003/blk000000f7_ACOUT<19>_UNCONNECTED , \NLW_blk00000003/blk000000f7_ACOUT<18>_UNCONNECTED , +\NLW_blk00000003/blk000000f7_ACOUT<17>_UNCONNECTED , \NLW_blk00000003/blk000000f7_ACOUT<16>_UNCONNECTED , +\NLW_blk00000003/blk000000f7_ACOUT<15>_UNCONNECTED , \NLW_blk00000003/blk000000f7_ACOUT<14>_UNCONNECTED , +\NLW_blk00000003/blk000000f7_ACOUT<13>_UNCONNECTED , \NLW_blk00000003/blk000000f7_ACOUT<12>_UNCONNECTED , +\NLW_blk00000003/blk000000f7_ACOUT<11>_UNCONNECTED , \NLW_blk00000003/blk000000f7_ACOUT<10>_UNCONNECTED , +\NLW_blk00000003/blk000000f7_ACOUT<9>_UNCONNECTED , \NLW_blk00000003/blk000000f7_ACOUT<8>_UNCONNECTED , +\NLW_blk00000003/blk000000f7_ACOUT<7>_UNCONNECTED , \NLW_blk00000003/blk000000f7_ACOUT<6>_UNCONNECTED , +\NLW_blk00000003/blk000000f7_ACOUT<5>_UNCONNECTED , \NLW_blk00000003/blk000000f7_ACOUT<4>_UNCONNECTED , +\NLW_blk00000003/blk000000f7_ACOUT<3>_UNCONNECTED , \NLW_blk00000003/blk000000f7_ACOUT<2>_UNCONNECTED , +\NLW_blk00000003/blk000000f7_ACOUT<1>_UNCONNECTED , \NLW_blk00000003/blk000000f7_ACOUT<0>_UNCONNECTED }), + .OPMODE({\blk00000003/sig00000049 , \blk00000003/sig000000ac , \blk00000003/sig000000ac , \blk00000003/sig00000049 , \blk00000003/sig000000ac , +\blk00000003/sig00000049 , \blk00000003/sig000000ac }), + .PCIN({\blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , +\blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , +\blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , +\blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , +\blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , +\blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , +\blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , +\blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , +\blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , +\blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 }), + .ALUMODE({\blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 }), + .C({\blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , +\blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , +\blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , +\blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , +\blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , +\blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , +\blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , +\blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , +\blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , +\blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 }), + .CARRYOUT({\NLW_blk00000003/blk000000f7_CARRYOUT<3>_UNCONNECTED , \NLW_blk00000003/blk000000f7_CARRYOUT<2>_UNCONNECTED , +\NLW_blk00000003/blk000000f7_CARRYOUT<1>_UNCONNECTED , \NLW_blk00000003/blk000000f7_CARRYOUT<0>_UNCONNECTED }), + .INMODE({\blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig000000ac , \blk00000003/sig00000049 , \blk00000003/sig00000049 }), + .BCIN({\blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , +\blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , +\blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , +\blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 }), + .B({\blk00000003/sig000002c5 , \blk00000003/sig000002c6 , \blk00000003/sig000002c7 , \blk00000003/sig000002c8 , \blk00000003/sig000002c9 , +\blk00000003/sig000002ca , \blk00000003/sig000002cb , \blk00000003/sig000002cc , \blk00000003/sig000002cd , \blk00000003/sig000002ce , +\blk00000003/sig000002cf , \blk00000003/sig000002d0 , \blk00000003/sig000002d1 , \blk00000003/sig000002d2 , \blk00000003/sig000002d3 , +\blk00000003/sig000002d4 , \blk00000003/sig000002d5 , \blk00000003/sig000002d6 }), + .BCOUT({\NLW_blk00000003/blk000000f7_BCOUT<17>_UNCONNECTED , \NLW_blk00000003/blk000000f7_BCOUT<16>_UNCONNECTED , +\NLW_blk00000003/blk000000f7_BCOUT<15>_UNCONNECTED , \NLW_blk00000003/blk000000f7_BCOUT<14>_UNCONNECTED , +\NLW_blk00000003/blk000000f7_BCOUT<13>_UNCONNECTED , \NLW_blk00000003/blk000000f7_BCOUT<12>_UNCONNECTED , +\NLW_blk00000003/blk000000f7_BCOUT<11>_UNCONNECTED , \NLW_blk00000003/blk000000f7_BCOUT<10>_UNCONNECTED , +\NLW_blk00000003/blk000000f7_BCOUT<9>_UNCONNECTED , \NLW_blk00000003/blk000000f7_BCOUT<8>_UNCONNECTED , +\NLW_blk00000003/blk000000f7_BCOUT<7>_UNCONNECTED , \NLW_blk00000003/blk000000f7_BCOUT<6>_UNCONNECTED , +\NLW_blk00000003/blk000000f7_BCOUT<5>_UNCONNECTED , \NLW_blk00000003/blk000000f7_BCOUT<4>_UNCONNECTED , +\NLW_blk00000003/blk000000f7_BCOUT<3>_UNCONNECTED , \NLW_blk00000003/blk000000f7_BCOUT<2>_UNCONNECTED , +\NLW_blk00000003/blk000000f7_BCOUT<1>_UNCONNECTED , \NLW_blk00000003/blk000000f7_BCOUT<0>_UNCONNECTED }), + .D({\blk00000003/sig000002d7 , \blk00000003/sig000002d7 , \blk00000003/sig000002d8 , \blk00000003/sig000002d9 , \blk00000003/sig000002da , +\blk00000003/sig000002db , \blk00000003/sig000002dc , \blk00000003/sig000002dd , \blk00000003/sig000002de , \blk00000003/sig000002df , +\blk00000003/sig000002e0 , \blk00000003/sig000002e1 , \blk00000003/sig000002e2 , \blk00000003/sig000002e3 , \blk00000003/sig000002e4 , +\blk00000003/sig000002e5 , \blk00000003/sig000002e6 , \blk00000003/sig000002e7 , \blk00000003/sig000002e8 , \blk00000003/sig000002e9 , +\blk00000003/sig000002ea , \blk00000003/sig000002eb , \blk00000003/sig000002ec , \blk00000003/sig000002ed , \blk00000003/sig000002ee }), + .P({\NLW_blk00000003/blk000000f7_P<47>_UNCONNECTED , \NLW_blk00000003/blk000000f7_P<46>_UNCONNECTED , +\NLW_blk00000003/blk000000f7_P<45>_UNCONNECTED , \NLW_blk00000003/blk000000f7_P<44>_UNCONNECTED , \NLW_blk00000003/blk000000f7_P<43>_UNCONNECTED , +\NLW_blk00000003/blk000000f7_P<42>_UNCONNECTED , \NLW_blk00000003/blk000000f7_P<41>_UNCONNECTED , \NLW_blk00000003/blk000000f7_P<40>_UNCONNECTED , +\NLW_blk00000003/blk000000f7_P<39>_UNCONNECTED , \NLW_blk00000003/blk000000f7_P<38>_UNCONNECTED , \NLW_blk00000003/blk000000f7_P<37>_UNCONNECTED , +\NLW_blk00000003/blk000000f7_P<36>_UNCONNECTED , \NLW_blk00000003/blk000000f7_P<35>_UNCONNECTED , \NLW_blk00000003/blk000000f7_P<34>_UNCONNECTED , +\NLW_blk00000003/blk000000f7_P<33>_UNCONNECTED , \NLW_blk00000003/blk000000f7_P<32>_UNCONNECTED , \NLW_blk00000003/blk000000f7_P<31>_UNCONNECTED , +\NLW_blk00000003/blk000000f7_P<30>_UNCONNECTED , \NLW_blk00000003/blk000000f7_P<29>_UNCONNECTED , \NLW_blk00000003/blk000000f7_P<28>_UNCONNECTED , +\NLW_blk00000003/blk000000f7_P<27>_UNCONNECTED , \NLW_blk00000003/blk000000f7_P<26>_UNCONNECTED , \NLW_blk00000003/blk000000f7_P<25>_UNCONNECTED , +\NLW_blk00000003/blk000000f7_P<24>_UNCONNECTED , \NLW_blk00000003/blk000000f7_P<23>_UNCONNECTED , \NLW_blk00000003/blk000000f7_P<22>_UNCONNECTED , +\NLW_blk00000003/blk000000f7_P<21>_UNCONNECTED , \NLW_blk00000003/blk000000f7_P<20>_UNCONNECTED , \NLW_blk00000003/blk000000f7_P<19>_UNCONNECTED , +\NLW_blk00000003/blk000000f7_P<18>_UNCONNECTED , \NLW_blk00000003/blk000000f7_P<17>_UNCONNECTED , \NLW_blk00000003/blk000000f7_P<16>_UNCONNECTED , +\NLW_blk00000003/blk000000f7_P<15>_UNCONNECTED , \NLW_blk00000003/blk000000f7_P<14>_UNCONNECTED , \NLW_blk00000003/blk000000f7_P<13>_UNCONNECTED , +\NLW_blk00000003/blk000000f7_P<12>_UNCONNECTED , \NLW_blk00000003/blk000000f7_P<11>_UNCONNECTED , \NLW_blk00000003/blk000000f7_P<10>_UNCONNECTED , +\NLW_blk00000003/blk000000f7_P<9>_UNCONNECTED , \NLW_blk00000003/blk000000f7_P<8>_UNCONNECTED , \NLW_blk00000003/blk000000f7_P<7>_UNCONNECTED , +\NLW_blk00000003/blk000000f7_P<6>_UNCONNECTED , \NLW_blk00000003/blk000000f7_P<5>_UNCONNECTED , \NLW_blk00000003/blk000000f7_P<4>_UNCONNECTED , +\NLW_blk00000003/blk000000f7_P<3>_UNCONNECTED , \NLW_blk00000003/blk000000f7_P<2>_UNCONNECTED , \NLW_blk00000003/blk000000f7_P<1>_UNCONNECTED , +\NLW_blk00000003/blk000000f7_P<0>_UNCONNECTED }), + .A({\blk00000003/sig000002ef , \blk00000003/sig000002ef , \blk00000003/sig000002ef , \blk00000003/sig000002ef , \blk00000003/sig000002ef , +\blk00000003/sig000002ef , \blk00000003/sig000002ef , \blk00000003/sig000002f0 , \blk00000003/sig000002f1 , \blk00000003/sig000002f2 , +\blk00000003/sig000002f3 , \blk00000003/sig000002f4 , \blk00000003/sig000002f5 , \blk00000003/sig000002f6 , \blk00000003/sig000002f7 , +\blk00000003/sig000002f8 , \blk00000003/sig000002f9 , \blk00000003/sig000002fa , \blk00000003/sig000002fb , \blk00000003/sig000002fc , +\blk00000003/sig000002fd , \blk00000003/sig000002fe , \blk00000003/sig000002ff , \blk00000003/sig00000300 , \blk00000003/sig00000301 , +\blk00000003/sig00000302 , \blk00000003/sig00000303 , \blk00000003/sig00000304 , \blk00000003/sig00000305 , \blk00000003/sig00000306 }), + .PCOUT({\blk00000003/sig00000307 , \blk00000003/sig00000308 , \blk00000003/sig00000309 , \blk00000003/sig0000030a , \blk00000003/sig0000030b , +\blk00000003/sig0000030c , \blk00000003/sig0000030d , \blk00000003/sig0000030e , \blk00000003/sig0000030f , \blk00000003/sig00000310 , +\blk00000003/sig00000311 , \blk00000003/sig00000312 , \blk00000003/sig00000313 , \blk00000003/sig00000314 , \blk00000003/sig00000315 , +\blk00000003/sig00000316 , \blk00000003/sig00000317 , \blk00000003/sig00000318 , \blk00000003/sig00000319 , \blk00000003/sig0000031a , +\blk00000003/sig0000031b , \blk00000003/sig0000031c , \blk00000003/sig0000031d , \blk00000003/sig0000031e , \blk00000003/sig0000031f , +\blk00000003/sig00000320 , \blk00000003/sig00000321 , \blk00000003/sig00000322 , \blk00000003/sig00000323 , \blk00000003/sig00000324 , +\blk00000003/sig00000325 , \blk00000003/sig00000326 , \blk00000003/sig00000327 , \blk00000003/sig00000328 , \blk00000003/sig00000329 , +\blk00000003/sig0000032a , \blk00000003/sig0000032b , \blk00000003/sig0000032c , \blk00000003/sig0000032d , \blk00000003/sig0000032e , +\blk00000003/sig0000032f , \blk00000003/sig00000330 , \blk00000003/sig00000331 , \blk00000003/sig00000332 , \blk00000003/sig00000333 , +\blk00000003/sig00000334 , \blk00000003/sig00000335 , \blk00000003/sig00000336 }), + .ACIN({\blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , +\blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , +\blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , +\blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , +\blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , +\blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 }), + .CARRYINSEL({\blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 }) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk000000f6 ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig000001cd ), + .R(\blk00000003/sig00000049 ), + .Q(\blk00000003/sig000002c4 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000000f5 ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig000002c2 ), + .Q(\blk00000003/sig000002c3 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000000f4 ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig000002c1 ), + .Q(\blk00000003/sig000002b9 ) + ); + XORCY \blk00000003/blk000000f3 ( + .CI(\blk00000003/sig000002bc ), + .LI(\blk00000003/sig000002bf ), + .O(\blk00000003/sig000002c0 ) + ); + MUXCY_D \blk00000003/blk000000f2 ( + .CI(\blk00000003/sig000002bc ), + .DI(\blk00000003/sig000002be ), + .S(\blk00000003/sig000002bf ), + .O(\NLW_blk00000003/blk000000f2_O_UNCONNECTED ), + .LO(\NLW_blk00000003/blk000000f2_LO_UNCONNECTED ) + ); + XORCY \blk00000003/blk000000f1 ( + .CI(\blk00000003/sig000002b9 ), + .LI(\blk00000003/sig000002bb ), + .O(\blk00000003/sig000002bd ) + ); + MUXCY_L \blk00000003/blk000000f0 ( + .CI(\blk00000003/sig000002b9 ), + .DI(\blk00000003/sig000002ba ), + .S(\blk00000003/sig000002bb ), + .LO(\blk00000003/sig000002bc ) + ); + MUXCY_L \blk00000003/blk000000ef ( + .CI(\blk00000003/sig00000049 ), + .DI(\blk00000003/sig000002b8 ), + .S(\blk00000003/sig000002b2 ), + .LO(\blk00000003/sig000002b4 ) + ); + MUXCY_D \blk00000003/blk000000ee ( + .CI(\blk00000003/sig000002b4 ), + .DI(\blk00000003/sig000002b7 ), + .S(\blk00000003/sig000002b5 ), + .O(\NLW_blk00000003/blk000000ee_O_UNCONNECTED ), + .LO(\NLW_blk00000003/blk000000ee_LO_UNCONNECTED ) + ); + XORCY \blk00000003/blk000000ed ( + .CI(\blk00000003/sig000002b4 ), + .LI(\blk00000003/sig000002b5 ), + .O(\blk00000003/sig000002b6 ) + ); + XORCY \blk00000003/blk000000ec ( + .CI(\blk00000003/sig00000049 ), + .LI(\blk00000003/sig000002b2 ), + .O(\blk00000003/sig000002b3 ) + ); + MUXCY_L \blk00000003/blk000000eb ( + .CI(\blk00000003/sig000002a9 ), + .DI(\blk00000003/sig000002b1 ), + .S(\blk00000003/sig000002aa ), + .LO(\blk00000003/sig000002ac ) + ); + MUXCY_D \blk00000003/blk000000ea ( + .CI(\blk00000003/sig000002ac ), + .DI(\blk00000003/sig000002b0 ), + .S(\blk00000003/sig000002ad ), + .O(\NLW_blk00000003/blk000000ea_O_UNCONNECTED ), + .LO(\NLW_blk00000003/blk000000ea_LO_UNCONNECTED ) + ); + MUXCY \blk00000003/blk000000e9 ( + .CI(\blk00000003/sig00000049 ), + .DI(\blk00000003/sig000000ac ), + .S(\blk00000003/sig000002af ), + .O(\blk00000003/sig000002a9 ) + ); + XORCY \blk00000003/blk000000e8 ( + .CI(\blk00000003/sig000002ac ), + .LI(\blk00000003/sig000002ad ), + .O(\blk00000003/sig000002ae ) + ); + XORCY \blk00000003/blk000000e7 ( + .CI(\blk00000003/sig000002a9 ), + .LI(\blk00000003/sig000002aa ), + .O(\blk00000003/sig000002ab ) + ); + FDE \blk00000003/blk000000e6 ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig000002a7 ), + .Q(\blk00000003/sig000002a8 ) + ); + MUXCY_L \blk00000003/blk000000e5 ( + .CI(\blk00000003/sig00000049 ), + .DI(\blk00000003/sig000002a6 ), + .S(\blk00000003/sig000002a0 ), + .LO(\blk00000003/sig000002a2 ) + ); + MUXCY_D \blk00000003/blk000000e4 ( + .CI(\blk00000003/sig000002a2 ), + .DI(\blk00000003/sig000002a5 ), + .S(\blk00000003/sig000002a3 ), + .O(\NLW_blk00000003/blk000000e4_O_UNCONNECTED ), + .LO(\NLW_blk00000003/blk000000e4_LO_UNCONNECTED ) + ); + XORCY \blk00000003/blk000000e3 ( + .CI(\blk00000003/sig000002a2 ), + .LI(\blk00000003/sig000002a3 ), + .O(\blk00000003/sig000002a4 ) + ); + XORCY \blk00000003/blk000000e2 ( + .CI(\blk00000003/sig00000049 ), + .LI(\blk00000003/sig000002a0 ), + .O(\blk00000003/sig000002a1 ) + ); + MUXCY_L \blk00000003/blk000000e1 ( + .CI(\blk00000003/sig00000299 ), + .DI(\blk00000003/sig000001e7 ), + .S(\blk00000003/sig0000029a ), + .LO(\blk00000003/sig0000029c ) + ); + MUXCY_D \blk00000003/blk000000e0 ( + .CI(\blk00000003/sig0000029c ), + .DI(\blk00000003/sig000001e6 ), + .S(\blk00000003/sig0000029d ), + .O(\NLW_blk00000003/blk000000e0_O_UNCONNECTED ), + .LO(\NLW_blk00000003/blk000000e0_LO_UNCONNECTED ) + ); + MUXCY \blk00000003/blk000000df ( + .CI(\blk00000003/sig00000049 ), + .DI(\blk00000003/sig000000ac ), + .S(\blk00000003/sig0000029f ), + .O(\blk00000003/sig00000299 ) + ); + XORCY \blk00000003/blk000000de ( + .CI(\blk00000003/sig0000029c ), + .LI(\blk00000003/sig0000029d ), + .O(\blk00000003/sig0000029e ) + ); + XORCY \blk00000003/blk000000dd ( + .CI(\blk00000003/sig00000299 ), + .LI(\blk00000003/sig0000029a ), + .O(\blk00000003/sig0000029b ) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk000000dc ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig00000297 ), + .R(sclr), + .Q(\blk00000003/sig00000298 ) + ); + MUXCY_D \blk00000003/blk000000db ( + .CI(\blk00000003/sig00000294 ), + .DI(\blk00000003/sig00000049 ), + .S(\blk00000003/sig00000296 ), + .O(\NLW_blk00000003/blk000000db_O_UNCONNECTED ), + .LO(\blk00000003/sig00000297 ) + ); + MUXCY_D \blk00000003/blk000000da ( + .CI(\blk00000003/sig000000ac ), + .DI(\blk00000003/sig00000049 ), + .S(\blk00000003/sig00000295 ), + .O(\blk00000003/sig00000292 ), + .LO(\NLW_blk00000003/blk000000da_LO_UNCONNECTED ) + ); + MUXCY_D \blk00000003/blk000000d9 ( + .CI(\blk00000003/sig00000292 ), + .DI(\blk00000003/sig00000291 ), + .S(\blk00000003/sig00000293 ), + .O(\blk00000003/sig00000294 ), + .LO(\blk00000003/sig00000290 ) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk000000d8 ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig00000290 ), + .R(sclr), + .Q(\blk00000003/sig00000291 ) + ); + FDSE #( + .INIT ( 1'b1 )) + \blk00000003/blk000000d7 ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig00000281 ), + .S(\blk00000003/sig00000049 ), + .Q(\blk00000003/sig0000021f ) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk000000d6 ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig00000280 ), + .R(\blk00000003/sig00000049 ), + .Q(\blk00000003/sig0000021c ) + ); + MUXCY_D \blk00000003/blk000000d5 ( + .CI(\blk00000003/sig0000021c ), + .DI(\blk00000003/sig0000028e ), + .S(\blk00000003/sig0000028f ), + .O(\blk00000003/sig0000028b ), + .LO(\NLW_blk00000003/blk000000d5_LO_UNCONNECTED ) + ); + MUXCY_D \blk00000003/blk000000d4 ( + .CI(\blk00000003/sig0000028b ), + .DI(\blk00000003/sig0000028c ), + .S(\blk00000003/sig0000028d ), + .O(\blk00000003/sig00000289 ), + .LO(\NLW_blk00000003/blk000000d4_LO_UNCONNECTED ) + ); + MUXCY_D \blk00000003/blk000000d3 ( + .CI(\blk00000003/sig00000289 ), + .DI(\blk00000003/sig0000027f ), + .S(\blk00000003/sig0000028a ), + .O(\blk00000003/sig00000286 ), + .LO(\NLW_blk00000003/blk000000d3_LO_UNCONNECTED ) + ); + MUXCY_D \blk00000003/blk000000d2 ( + .CI(\blk00000003/sig00000286 ), + .DI(\blk00000003/sig00000287 ), + .S(\blk00000003/sig00000288 ), + .O(\blk00000003/sig00000284 ), + .LO(\NLW_blk00000003/blk000000d2_LO_UNCONNECTED ) + ); + MUXCY_D \blk00000003/blk000000d1 ( + .CI(\blk00000003/sig00000284 ), + .DI(\blk00000003/sig00000244 ), + .S(\blk00000003/sig00000285 ), + .O(\blk00000003/sig00000282 ), + .LO(\NLW_blk00000003/blk000000d1_LO_UNCONNECTED ) + ); + MUXCY_D \blk00000003/blk000000d0 ( + .CI(\blk00000003/sig00000282 ), + .DI(\blk00000003/sig00000219 ), + .S(\blk00000003/sig00000283 ), + .O(\NLW_blk00000003/blk000000d0_O_UNCONNECTED ), + .LO(\blk00000003/sig00000280 ) + ); + XORCY \blk00000003/blk000000cf ( + .CI(\blk00000003/sig00000280 ), + .LI(\blk00000003/sig000000ac ), + .O(\blk00000003/sig00000281 ) + ); + FDSE #( + .INIT ( 1'b1 )) + \blk00000003/blk000000ce ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig0000026f ), + .S(\blk00000003/sig00000049 ), + .Q(\blk00000003/sig0000027f ) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk000000cd ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig0000026e ), + .R(\blk00000003/sig00000049 ), + .Q(\blk00000003/sig000001cd ) + ); + MUXCY_D \blk00000003/blk000000cc ( + .CI(\blk00000003/sig000001cd ), + .DI(\blk00000003/sig0000027d ), + .S(\blk00000003/sig0000027e ), + .O(\blk00000003/sig0000027b ), + .LO(\NLW_blk00000003/blk000000cc_LO_UNCONNECTED ) + ); + MUXCY_D \blk00000003/blk000000cb ( + .CI(\blk00000003/sig0000027b ), + .DI(\blk00000003/sig000001ce ), + .S(\blk00000003/sig0000027c ), + .O(\blk00000003/sig00000279 ), + .LO(\NLW_blk00000003/blk000000cb_LO_UNCONNECTED ) + ); + MUXCY_D \blk00000003/blk000000ca ( + .CI(\blk00000003/sig00000279 ), + .DI(\blk00000003/sig000001cd ), + .S(\blk00000003/sig0000027a ), + .O(\blk00000003/sig00000276 ), + .LO(\NLW_blk00000003/blk000000ca_LO_UNCONNECTED ) + ); + MUXCY_D \blk00000003/blk000000c9 ( + .CI(\blk00000003/sig00000276 ), + .DI(\blk00000003/sig00000277 ), + .S(\blk00000003/sig00000278 ), + .O(\blk00000003/sig00000274 ), + .LO(\NLW_blk00000003/blk000000c9_LO_UNCONNECTED ) + ); + MUXCY_D \blk00000003/blk000000c8 ( + .CI(\blk00000003/sig00000274 ), + .DI(\blk00000003/sig0000021f ), + .S(\blk00000003/sig00000275 ), + .O(\blk00000003/sig00000270 ), + .LO(\NLW_blk00000003/blk000000c8_LO_UNCONNECTED ) + ); + MUXCY_D \blk00000003/blk000000c7 ( + .CI(\blk00000003/sig00000272 ), + .DI(\blk00000003/sig0000021f ), + .S(\blk00000003/sig00000273 ), + .O(\NLW_blk00000003/blk000000c7_O_UNCONNECTED ), + .LO(\blk00000003/sig0000026e ) + ); + MUXCY_D \blk00000003/blk000000c6 ( + .CI(\blk00000003/sig00000270 ), + .DI(\blk00000003/sig00000239 ), + .S(\blk00000003/sig00000271 ), + .O(\blk00000003/sig00000272 ), + .LO(\NLW_blk00000003/blk000000c6_LO_UNCONNECTED ) + ); + XORCY \blk00000003/blk000000c5 ( + .CI(\blk00000003/sig0000026e ), + .LI(\blk00000003/sig000000ac ), + .O(\blk00000003/sig0000026f ) + ); + FDE \blk00000003/blk000000c4 ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig0000026c ), + .Q(\blk00000003/sig0000026d ) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk000000c3 ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig0000021c ), + .R(\blk00000003/sig00000049 ), + .Q(\blk00000003/sig0000026b ) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk000000c2 ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig0000024a ), + .R(\blk00000003/sig00000049 ), + .Q(\blk00000003/sig00000263 ) + ); + XORCY \blk00000003/blk000000c1 ( + .CI(\blk00000003/sig00000266 ), + .LI(\blk00000003/sig00000269 ), + .O(\blk00000003/sig0000026a ) + ); + MUXCY_D \blk00000003/blk000000c0 ( + .CI(\blk00000003/sig00000266 ), + .DI(\blk00000003/sig00000268 ), + .S(\blk00000003/sig00000269 ), + .O(\NLW_blk00000003/blk000000c0_O_UNCONNECTED ), + .LO(\NLW_blk00000003/blk000000c0_LO_UNCONNECTED ) + ); + XORCY \blk00000003/blk000000bf ( + .CI(\blk00000003/sig00000263 ), + .LI(\blk00000003/sig00000265 ), + .O(\blk00000003/sig00000267 ) + ); + MUXCY_L \blk00000003/blk000000be ( + .CI(\blk00000003/sig00000263 ), + .DI(\blk00000003/sig00000264 ), + .S(\blk00000003/sig00000265 ), + .LO(\blk00000003/sig00000266 ) + ); + MUXCY_L \blk00000003/blk000000bd ( + .CI(\blk00000003/sig0000025a ), + .DI(\blk00000003/sig00000262 ), + .S(\blk00000003/sig0000025b ), + .LO(\blk00000003/sig0000025d ) + ); + MUXCY_D \blk00000003/blk000000bc ( + .CI(\blk00000003/sig0000025d ), + .DI(\blk00000003/sig00000261 ), + .S(\blk00000003/sig0000025e ), + .O(\NLW_blk00000003/blk000000bc_O_UNCONNECTED ), + .LO(\NLW_blk00000003/blk000000bc_LO_UNCONNECTED ) + ); + MUXCY \blk00000003/blk000000bb ( + .CI(\blk00000003/sig00000049 ), + .DI(\blk00000003/sig000000ac ), + .S(\blk00000003/sig00000260 ), + .O(\blk00000003/sig0000025a ) + ); + XORCY \blk00000003/blk000000ba ( + .CI(\blk00000003/sig0000025d ), + .LI(\blk00000003/sig0000025e ), + .O(\blk00000003/sig0000025f ) + ); + XORCY \blk00000003/blk000000b9 ( + .CI(\blk00000003/sig0000025a ), + .LI(\blk00000003/sig0000025b ), + .O(\blk00000003/sig0000025c ) + ); + MUXCY_L \blk00000003/blk000000b8 ( + .CI(\blk00000003/sig00000049 ), + .DI(\blk00000003/sig00000259 ), + .S(\blk00000003/sig00000257 ), + .LO(\blk00000003/sig00000253 ) + ); + XORCY \blk00000003/blk000000b7 ( + .CI(\blk00000003/sig00000049 ), + .LI(\blk00000003/sig00000257 ), + .O(\blk00000003/sig00000258 ) + ); + MUXCY_D \blk00000003/blk000000b6 ( + .CI(\blk00000003/sig00000253 ), + .DI(\blk00000003/sig00000256 ), + .S(\blk00000003/sig00000254 ), + .O(\NLW_blk00000003/blk000000b6_O_UNCONNECTED ), + .LO(\NLW_blk00000003/blk000000b6_LO_UNCONNECTED ) + ); + XORCY \blk00000003/blk000000b5 ( + .CI(\blk00000003/sig00000253 ), + .LI(\blk00000003/sig00000254 ), + .O(\blk00000003/sig00000255 ) + ); + MUXCY_L \blk00000003/blk000000b4 ( + .CI(\blk00000003/sig00000049 ), + .DI(\blk00000003/sig00000252 ), + .S(\blk00000003/sig00000250 ), + .LO(\blk00000003/sig0000024c ) + ); + XORCY \blk00000003/blk000000b3 ( + .CI(\blk00000003/sig00000049 ), + .LI(\blk00000003/sig00000250 ), + .O(\blk00000003/sig00000251 ) + ); + MUXCY_D \blk00000003/blk000000b2 ( + .CI(\blk00000003/sig0000024c ), + .DI(\blk00000003/sig0000024f ), + .S(\blk00000003/sig0000024d ), + .O(\NLW_blk00000003/blk000000b2_O_UNCONNECTED ), + .LO(\NLW_blk00000003/blk000000b2_LO_UNCONNECTED ) + ); + XORCY \blk00000003/blk000000b1 ( + .CI(\blk00000003/sig0000024c ), + .LI(\blk00000003/sig0000024d ), + .O(\blk00000003/sig0000024e ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000000b0 ( + .C(clk), + .CE(ce), + .D(coef_ld), + .Q(\blk00000003/sig0000024b ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000000af ( + .C(clk), + .CE(ce), + .D(coef_we), + .Q(\blk00000003/sig0000024a ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000000ae ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig000001e0 ), + .Q(\blk00000003/sig0000023e ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000000ad ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig00000249 ), + .Q(\blk00000003/sig00000231 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000000ac ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig00000247 ), + .Q(\blk00000003/sig00000248 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000000ab ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig00000246 ), + .Q(\blk00000003/sig0000022f ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000000aa ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig00000245 ), + .Q(\blk00000003/sig0000023c ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000000a9 ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig00000243 ), + .Q(\blk00000003/sig00000244 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000000a8 ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig00000241 ), + .Q(\blk00000003/sig00000242 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000000a7 ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig0000023f ), + .Q(\blk00000003/sig00000240 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000000a6 ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig0000023e ), + .Q(\blk00000003/sig0000023a ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000000a5 ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig0000023c ), + .Q(\blk00000003/sig0000023d ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000000a4 ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig0000023a ), + .Q(\blk00000003/sig0000023b ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000000a3 ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig0000021b ), + .Q(\blk00000003/sig00000239 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000000a2 ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig00000234 ), + .Q(\blk00000003/sig00000238 ) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk000000a1 ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig0000022e ), + .R(coef_ld), + .Q(\NLW_blk00000003/blk000000a1_Q_UNCONNECTED ) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk000000a0 ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig0000022c ), + .R(coef_ld), + .Q(\NLW_blk00000003/blk000000a0_Q_UNCONNECTED ) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk0000009f ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig00000228 ), + .R(coef_ld), + .Q(\blk00000003/sig00000227 ) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk0000009e ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig00000224 ), + .R(coef_ld), + .Q(\blk00000003/sig00000222 ) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk0000009d ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig0000021c ), + .R(\blk00000003/sig00000049 ), + .Q(\blk00000003/sig00000237 ) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk0000009c ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig00000235 ), + .R(\blk00000003/sig00000049 ), + .Q(\blk00000003/sig00000236 ) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk0000009b ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig00000233 ), + .R(\blk00000003/sig00000049 ), + .Q(\blk00000003/sig00000234 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk0000009a ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig00000231 ), + .Q(\blk00000003/sig00000232 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000099 ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig0000022f ), + .Q(\blk00000003/sig00000230 ) + ); + MUXCY_D \blk00000003/blk00000098 ( + .CI(\blk00000003/sig0000022b ), + .DI(\blk00000003/sig00000049 ), + .S(\blk00000003/sig0000022d ), + .O(\NLW_blk00000003/blk00000098_O_UNCONNECTED ), + .LO(\blk00000003/sig0000022e ) + ); + MUXCY_D \blk00000003/blk00000097 ( + .CI(coef_we), + .DI(\blk00000003/sig00000049 ), + .S(\blk00000003/sig0000022a ), + .O(\blk00000003/sig0000022b ), + .LO(\blk00000003/sig0000022c ) + ); + MUXCY_D \blk00000003/blk00000096 ( + .CI(\blk00000003/sig000000ac ), + .DI(\blk00000003/sig00000049 ), + .S(\blk00000003/sig00000229 ), + .O(\blk00000003/sig00000226 ), + .LO(\NLW_blk00000003/blk00000096_LO_UNCONNECTED ) + ); + MUXCY_D \blk00000003/blk00000095 ( + .CI(\blk00000003/sig00000226 ), + .DI(\blk00000003/sig00000227 ), + .S(coef_we), + .O(\NLW_blk00000003/blk00000095_O_UNCONNECTED ), + .LO(\blk00000003/sig00000228 ) + ); + MUXCY_D \blk00000003/blk00000094 ( + .CI(\blk00000003/sig000000ac ), + .DI(\blk00000003/sig00000049 ), + .S(\blk00000003/sig00000225 ), + .O(\blk00000003/sig00000221 ), + .LO(\NLW_blk00000003/blk00000094_LO_UNCONNECTED ) + ); + MUXCY_D \blk00000003/blk00000093 ( + .CI(\blk00000003/sig00000221 ), + .DI(\blk00000003/sig00000222 ), + .S(\blk00000003/sig00000223 ), + .O(\NLW_blk00000003/blk00000093_O_UNCONNECTED ), + .LO(\blk00000003/sig00000224 ) + ); + XORCY \blk00000003/blk00000092 ( + .CI(\blk00000003/sig0000021a ), + .LI(\blk00000003/sig000000ac ), + .O(\blk00000003/sig00000218 ) + ); + MUXCY_D \blk00000003/blk00000091 ( + .CI(\blk00000003/sig0000021e ), + .DI(\blk00000003/sig0000021f ), + .S(\blk00000003/sig00000220 ), + .O(\NLW_blk00000003/blk00000091_O_UNCONNECTED ), + .LO(\blk00000003/sig0000021a ) + ); + MUXCY_D \blk00000003/blk00000090 ( + .CI(\blk00000003/sig0000021b ), + .DI(\blk00000003/sig0000021c ), + .S(\blk00000003/sig0000021d ), + .O(\blk00000003/sig0000021e ), + .LO(\NLW_blk00000003/blk00000090_LO_UNCONNECTED ) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk0000008f ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig0000021a ), + .R(\blk00000003/sig00000049 ), + .Q(\blk00000003/sig0000021b ) + ); + FDSE #( + .INIT ( 1'b1 )) + \blk00000003/blk0000008e ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig00000218 ), + .S(\blk00000003/sig00000049 ), + .Q(\blk00000003/sig00000219 ) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk0000002a ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig000001e5 ), + .R(sclr), + .Q(\blk00000003/sig000001e4 ) + ); + FDR #( + .INIT ( 1'b1 )) + \blk00000003/blk00000029 ( + .C(clk), + .D(\blk00000003/sig000000b7 ), + .R(sclr), + .Q(\blk00000003/sig000000b7 ) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000028 ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig000001e4 ), + .R(sclr), + .Q(\blk00000003/sig000001e1 ) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000027 ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig000001e3 ), + .R(\blk00000003/sig000001de ), + .Q(data_valid) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000026 ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig000001e1 ), + .R(sclr), + .Q(\blk00000003/sig000001e2 ) + ); + FDRE \blk00000003/blk00000025 ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig000001df ), + .R(sclr), + .Q(\blk00000003/sig000001e0 ) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000024 ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig000001dd ), + .R(\blk00000003/sig000001de ), + .Q(rdy) + ); + FDSE \blk00000003/blk00000023 ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig000001db ), + .S(sclr), + .Q(\blk00000003/sig000001dc ) + ); + FDRE \blk00000003/blk00000022 ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig000001d9 ), + .R(sclr), + .Q(\blk00000003/sig000001da ) + ); + FDSE #( + .INIT ( 1'b1 )) + \blk00000003/blk00000021 ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig000001cb ), + .S(sclr), + .Q(NlwRenamedSig_OI_rfd) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000020 ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig000001c9 ), + .R(sclr), + .Q(\blk00000003/sig000001d8 ) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk0000001f ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig000001d7 ), + .R(sclr), + .Q(\blk00000003/sig000001c6 ) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk0000001e ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig000001c5 ), + .R(sclr), + .Q(\blk00000003/sig000001d6 ) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk0000001d ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig000001d5 ), + .R(sclr), + .Q(\blk00000003/sig000001c3 ) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk0000001c ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig000001d3 ), + .R(sclr), + .Q(\blk00000003/sig000001d4 ) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk0000001b ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig000001d1 ), + .R(sclr), + .Q(\blk00000003/sig000001d2 ) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk0000001a ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig000001cf ), + .R(sclr), + .Q(\NLW_blk00000003/blk0000001a_Q_UNCONNECTED ) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000019 ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig000001cf ), + .R(sclr), + .Q(\blk00000003/sig000001d0 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000018 ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig000001cd ), + .Q(\blk00000003/sig000001ce ) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000017 ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig000000c1 ), + .R(sclr), + .Q(\blk00000003/sig000000bf ) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000016 ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig000000bc ), + .R(sclr), + .Q(\NLW_blk00000003/blk00000016_Q_UNCONNECTED ) + ); + FDSE #( + .INIT ( 1'b1 )) + \blk00000003/blk00000015 ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig000000bd ), + .S(sclr), + .Q(\blk00000003/sig000001cc ) + ); + MUXCY \blk00000003/blk00000014 ( + .CI(\blk00000003/sig000001c8 ), + .DI(\blk00000003/sig000000ac ), + .S(\blk00000003/sig000001ca ), + .O(\blk00000003/sig000001cb ) + ); + MUXCY_D \blk00000003/blk00000013 ( + .CI(\blk00000003/sig000001c6 ), + .DI(\blk00000003/sig00000049 ), + .S(\blk00000003/sig000001c7 ), + .O(\blk00000003/sig000001c8 ), + .LO(\blk00000003/sig000001c9 ) + ); + MUXCY_D \blk00000003/blk00000012 ( + .CI(\blk00000003/sig000001c3 ), + .DI(\blk00000003/sig00000049 ), + .S(\blk00000003/sig000001c4 ), + .O(\NLW_blk00000003/blk00000012_O_UNCONNECTED ), + .LO(\blk00000003/sig000001c5 ) + ); + DSP48E1 #( + .ACASCREG ( 2 ), + .ADREG ( 0 ), + .ALUMODEREG ( 1 ), + .AREG ( 2 ), + .AUTORESET_PATDET ( "NO_RESET" ), + .A_INPUT ( "DIRECT" ), + .BCASCREG ( 2 ), + .BREG ( 2 ), + .B_INPUT ( "DIRECT" ), + .CARRYINREG ( 1 ), + .CARRYINSELREG ( 1 ), + .CREG ( 1 ), + .DREG ( 0 ), + .INMODEREG ( 0 ), + .MASK ( 48'hFFFFFFFFFFFE ), + .MREG ( 1 ), + .OPMODEREG ( 1 ), + .PATTERN ( 48'h000000000000 ), + .PREG ( 1 ), + .SEL_MASK ( "MASK" ), + .SEL_PATTERN ( "PATTERN" ), + .USE_DPORT ( "FALSE" ), + .USE_MULT ( "MULTIPLY" ), + .USE_PATTERN_DETECT ( "NO_PATDET" ), + .USE_SIMD ( "ONE48" )) + \blk00000003/blk00000011 ( + .PATTERNBDETECT(\NLW_blk00000003/blk00000011_PATTERNBDETECT_UNCONNECTED ), + .RSTC(\blk00000003/sig00000049 ), + .CEB1(ce), + .CEAD(\blk00000003/sig00000049 ), + .MULTSIGNOUT(\NLW_blk00000003/blk00000011_MULTSIGNOUT_UNCONNECTED ), + .CEC(ce), + .RSTM(\blk00000003/sig00000049 ), + .MULTSIGNIN(\blk00000003/sig00000049 ), + .CEB2(ce), + .RSTCTRL(\blk00000003/sig00000049 ), + .CEP(ce), + .CARRYCASCOUT(\NLW_blk00000003/blk00000011_CARRYCASCOUT_UNCONNECTED ), + .RSTA(\blk00000003/sig00000049 ), + .CECARRYIN(ce), + .UNDERFLOW(\NLW_blk00000003/blk00000011_UNDERFLOW_UNCONNECTED ), + .PATTERNDETECT(\NLW_blk00000003/blk00000011_PATTERNDETECT_UNCONNECTED ), + .RSTALUMODE(\blk00000003/sig00000049 ), + .RSTALLCARRYIN(\blk00000003/sig00000049 ), + .CED(\blk00000003/sig00000049 ), + .RSTD(\blk00000003/sig00000049 ), + .CEALUMODE(ce), + .CEA2(ce), + .CLK(clk), + .CEA1(ce), + .RSTB(\blk00000003/sig00000049 ), + .OVERFLOW(\NLW_blk00000003/blk00000011_OVERFLOW_UNCONNECTED ), + .CECTRL(ce), + .CEM(ce), + .CARRYIN(\blk00000003/sig00000049 ), + .CARRYCASCIN(\blk00000003/sig00000049 ), + .RSTINMODE(\blk00000003/sig00000049 ), + .CEINMODE(ce), + .RSTP(\blk00000003/sig00000049 ), + .ACOUT({\NLW_blk00000003/blk00000011_ACOUT<29>_UNCONNECTED , \NLW_blk00000003/blk00000011_ACOUT<28>_UNCONNECTED , +\NLW_blk00000003/blk00000011_ACOUT<27>_UNCONNECTED , \NLW_blk00000003/blk00000011_ACOUT<26>_UNCONNECTED , +\NLW_blk00000003/blk00000011_ACOUT<25>_UNCONNECTED , \NLW_blk00000003/blk00000011_ACOUT<24>_UNCONNECTED , +\NLW_blk00000003/blk00000011_ACOUT<23>_UNCONNECTED , \NLW_blk00000003/blk00000011_ACOUT<22>_UNCONNECTED , +\NLW_blk00000003/blk00000011_ACOUT<21>_UNCONNECTED , \NLW_blk00000003/blk00000011_ACOUT<20>_UNCONNECTED , +\NLW_blk00000003/blk00000011_ACOUT<19>_UNCONNECTED , \NLW_blk00000003/blk00000011_ACOUT<18>_UNCONNECTED , +\NLW_blk00000003/blk00000011_ACOUT<17>_UNCONNECTED , \NLW_blk00000003/blk00000011_ACOUT<16>_UNCONNECTED , +\NLW_blk00000003/blk00000011_ACOUT<15>_UNCONNECTED , \NLW_blk00000003/blk00000011_ACOUT<14>_UNCONNECTED , +\NLW_blk00000003/blk00000011_ACOUT<13>_UNCONNECTED , \NLW_blk00000003/blk00000011_ACOUT<12>_UNCONNECTED , +\NLW_blk00000003/blk00000011_ACOUT<11>_UNCONNECTED , \NLW_blk00000003/blk00000011_ACOUT<10>_UNCONNECTED , +\NLW_blk00000003/blk00000011_ACOUT<9>_UNCONNECTED , \NLW_blk00000003/blk00000011_ACOUT<8>_UNCONNECTED , +\NLW_blk00000003/blk00000011_ACOUT<7>_UNCONNECTED , \NLW_blk00000003/blk00000011_ACOUT<6>_UNCONNECTED , +\NLW_blk00000003/blk00000011_ACOUT<5>_UNCONNECTED , \NLW_blk00000003/blk00000011_ACOUT<4>_UNCONNECTED , +\NLW_blk00000003/blk00000011_ACOUT<3>_UNCONNECTED , \NLW_blk00000003/blk00000011_ACOUT<2>_UNCONNECTED , +\NLW_blk00000003/blk00000011_ACOUT<1>_UNCONNECTED , \NLW_blk00000003/blk00000011_ACOUT<0>_UNCONNECTED }), + .OPMODE({\blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig000000b1 , \blk00000003/sig00000049 , \blk00000003/sig000000b5 , +\blk00000003/sig000000b3 , \blk00000003/sig000000b5 }), + .PCIN({\blk00000003/sig0000014c , \blk00000003/sig0000014d , \blk00000003/sig0000014e , \blk00000003/sig0000014f , \blk00000003/sig00000150 , +\blk00000003/sig00000151 , \blk00000003/sig00000152 , \blk00000003/sig00000153 , \blk00000003/sig00000154 , \blk00000003/sig00000155 , +\blk00000003/sig00000156 , \blk00000003/sig00000157 , \blk00000003/sig00000158 , \blk00000003/sig00000159 , \blk00000003/sig0000015a , +\blk00000003/sig0000015b , \blk00000003/sig0000015c , \blk00000003/sig0000015d , \blk00000003/sig0000015e , \blk00000003/sig0000015f , +\blk00000003/sig00000160 , \blk00000003/sig00000161 , \blk00000003/sig00000162 , \blk00000003/sig00000163 , \blk00000003/sig00000164 , +\blk00000003/sig00000165 , \blk00000003/sig00000166 , \blk00000003/sig00000167 , \blk00000003/sig00000168 , \blk00000003/sig00000169 , +\blk00000003/sig0000016a , \blk00000003/sig0000016b , \blk00000003/sig0000016c , \blk00000003/sig0000016d , \blk00000003/sig0000016e , +\blk00000003/sig0000016f , \blk00000003/sig00000170 , \blk00000003/sig00000171 , \blk00000003/sig00000172 , \blk00000003/sig00000173 , +\blk00000003/sig00000174 , \blk00000003/sig00000175 , \blk00000003/sig00000176 , \blk00000003/sig00000177 , \blk00000003/sig00000178 , +\blk00000003/sig00000179 , \blk00000003/sig0000017a , \blk00000003/sig0000017b }), + .ALUMODE({\blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 }), + .C({\blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , +\blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , +\blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , +\blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , +\blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , +\blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , +\blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , +\blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , +\blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , +\blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 }), + .CARRYOUT({\NLW_blk00000003/blk00000011_CARRYOUT<3>_UNCONNECTED , \NLW_blk00000003/blk00000011_CARRYOUT<2>_UNCONNECTED , +\NLW_blk00000003/blk00000011_CARRYOUT<1>_UNCONNECTED , \NLW_blk00000003/blk00000011_CARRYOUT<0>_UNCONNECTED }), + .INMODE({\blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig000000ac , \blk00000003/sig00000049 , \blk00000003/sig00000049 }), + .BCIN({\blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , +\blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , +\blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , +\blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 }), + .B({\blk00000003/sig000000f3 , \blk00000003/sig000000f4 , \blk00000003/sig000000f5 , \blk00000003/sig000000f6 , \blk00000003/sig000000f7 , +\blk00000003/sig000000f8 , \blk00000003/sig000000f9 , \blk00000003/sig000000fa , \blk00000003/sig000000fb , \blk00000003/sig000000fc , +\blk00000003/sig000000fd , \blk00000003/sig000000fe , \blk00000003/sig000000ff , \blk00000003/sig00000100 , \blk00000003/sig00000101 , +\blk00000003/sig00000102 , \blk00000003/sig00000103 , \blk00000003/sig00000104 }), + .BCOUT({\NLW_blk00000003/blk00000011_BCOUT<17>_UNCONNECTED , \NLW_blk00000003/blk00000011_BCOUT<16>_UNCONNECTED , +\NLW_blk00000003/blk00000011_BCOUT<15>_UNCONNECTED , \NLW_blk00000003/blk00000011_BCOUT<14>_UNCONNECTED , +\NLW_blk00000003/blk00000011_BCOUT<13>_UNCONNECTED , \NLW_blk00000003/blk00000011_BCOUT<12>_UNCONNECTED , +\NLW_blk00000003/blk00000011_BCOUT<11>_UNCONNECTED , \NLW_blk00000003/blk00000011_BCOUT<10>_UNCONNECTED , +\NLW_blk00000003/blk00000011_BCOUT<9>_UNCONNECTED , \NLW_blk00000003/blk00000011_BCOUT<8>_UNCONNECTED , +\NLW_blk00000003/blk00000011_BCOUT<7>_UNCONNECTED , \NLW_blk00000003/blk00000011_BCOUT<6>_UNCONNECTED , +\NLW_blk00000003/blk00000011_BCOUT<5>_UNCONNECTED , \NLW_blk00000003/blk00000011_BCOUT<4>_UNCONNECTED , +\NLW_blk00000003/blk00000011_BCOUT<3>_UNCONNECTED , \NLW_blk00000003/blk00000011_BCOUT<2>_UNCONNECTED , +\NLW_blk00000003/blk00000011_BCOUT<1>_UNCONNECTED , \NLW_blk00000003/blk00000011_BCOUT<0>_UNCONNECTED }), + .D({\blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , +\blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , +\blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , +\blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , +\blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 }), + .P({\NLW_blk00000003/blk00000011_P<47>_UNCONNECTED , \blk00000003/sig0000017c , \blk00000003/sig0000017d , \blk00000003/sig0000017e , +\blk00000003/sig0000017f , \blk00000003/sig00000180 , \blk00000003/sig00000181 , \blk00000003/sig00000182 , \blk00000003/sig00000183 , +\blk00000003/sig00000184 , \blk00000003/sig00000185 , \blk00000003/sig00000186 , \blk00000003/sig00000187 , \blk00000003/sig00000188 , +\blk00000003/sig00000189 , \blk00000003/sig0000018a , \blk00000003/sig0000018b , \blk00000003/sig0000018c , \blk00000003/sig0000018d , +\blk00000003/sig0000018e , \blk00000003/sig0000018f , \blk00000003/sig00000190 , \blk00000003/sig00000191 , \blk00000003/sig00000192 , +\blk00000003/sig00000193 , \blk00000003/sig00000194 , \blk00000003/sig00000195 , \blk00000003/sig00000196 , \blk00000003/sig00000197 , +\blk00000003/sig00000198 , \blk00000003/sig00000199 , \blk00000003/sig0000019a , \blk00000003/sig0000019b , \blk00000003/sig0000019c , +\blk00000003/sig0000019d , \blk00000003/sig0000019e , \blk00000003/sig0000019f , \blk00000003/sig000001a0 , \blk00000003/sig000001a1 , +\blk00000003/sig000001a2 , \blk00000003/sig000001a3 , \blk00000003/sig000001a4 , \blk00000003/sig000001a5 , \blk00000003/sig000001a6 , +\blk00000003/sig000001a7 , \blk00000003/sig000001a8 , \blk00000003/sig000001a9 , \blk00000003/sig000001aa }), + .A({\blk00000003/sig000001ab , \blk00000003/sig000001ab , \blk00000003/sig000001ab , \blk00000003/sig000001ab , \blk00000003/sig000001ab , +\blk00000003/sig000001ab , \blk00000003/sig000001ab , \blk00000003/sig000001ac , \blk00000003/sig000001ad , \blk00000003/sig000001ae , +\blk00000003/sig000001af , \blk00000003/sig000001b0 , \blk00000003/sig000001b1 , \blk00000003/sig000001b2 , \blk00000003/sig000001b3 , +\blk00000003/sig000001b4 , \blk00000003/sig000001b5 , \blk00000003/sig000001b6 , \blk00000003/sig000001b7 , \blk00000003/sig000001b8 , +\blk00000003/sig000001b9 , \blk00000003/sig000001ba , \blk00000003/sig000001bb , \blk00000003/sig000001bc , \blk00000003/sig000001bd , +\blk00000003/sig000001be , \blk00000003/sig000001bf , \blk00000003/sig000001c0 , \blk00000003/sig000001c1 , \blk00000003/sig000001c2 }), + .PCOUT({\NLW_blk00000003/blk00000011_PCOUT<47>_UNCONNECTED , \NLW_blk00000003/blk00000011_PCOUT<46>_UNCONNECTED , +\NLW_blk00000003/blk00000011_PCOUT<45>_UNCONNECTED , \NLW_blk00000003/blk00000011_PCOUT<44>_UNCONNECTED , +\NLW_blk00000003/blk00000011_PCOUT<43>_UNCONNECTED , \NLW_blk00000003/blk00000011_PCOUT<42>_UNCONNECTED , +\NLW_blk00000003/blk00000011_PCOUT<41>_UNCONNECTED , \NLW_blk00000003/blk00000011_PCOUT<40>_UNCONNECTED , +\NLW_blk00000003/blk00000011_PCOUT<39>_UNCONNECTED , \NLW_blk00000003/blk00000011_PCOUT<38>_UNCONNECTED , +\NLW_blk00000003/blk00000011_PCOUT<37>_UNCONNECTED , \NLW_blk00000003/blk00000011_PCOUT<36>_UNCONNECTED , +\NLW_blk00000003/blk00000011_PCOUT<35>_UNCONNECTED , \NLW_blk00000003/blk00000011_PCOUT<34>_UNCONNECTED , +\NLW_blk00000003/blk00000011_PCOUT<33>_UNCONNECTED , \NLW_blk00000003/blk00000011_PCOUT<32>_UNCONNECTED , +\NLW_blk00000003/blk00000011_PCOUT<31>_UNCONNECTED , \NLW_blk00000003/blk00000011_PCOUT<30>_UNCONNECTED , +\NLW_blk00000003/blk00000011_PCOUT<29>_UNCONNECTED , \NLW_blk00000003/blk00000011_PCOUT<28>_UNCONNECTED , +\NLW_blk00000003/blk00000011_PCOUT<27>_UNCONNECTED , \NLW_blk00000003/blk00000011_PCOUT<26>_UNCONNECTED , +\NLW_blk00000003/blk00000011_PCOUT<25>_UNCONNECTED , \NLW_blk00000003/blk00000011_PCOUT<24>_UNCONNECTED , +\NLW_blk00000003/blk00000011_PCOUT<23>_UNCONNECTED , \NLW_blk00000003/blk00000011_PCOUT<22>_UNCONNECTED , +\NLW_blk00000003/blk00000011_PCOUT<21>_UNCONNECTED , \NLW_blk00000003/blk00000011_PCOUT<20>_UNCONNECTED , +\NLW_blk00000003/blk00000011_PCOUT<19>_UNCONNECTED , \NLW_blk00000003/blk00000011_PCOUT<18>_UNCONNECTED , +\NLW_blk00000003/blk00000011_PCOUT<17>_UNCONNECTED , \NLW_blk00000003/blk00000011_PCOUT<16>_UNCONNECTED , +\NLW_blk00000003/blk00000011_PCOUT<15>_UNCONNECTED , \NLW_blk00000003/blk00000011_PCOUT<14>_UNCONNECTED , +\NLW_blk00000003/blk00000011_PCOUT<13>_UNCONNECTED , \NLW_blk00000003/blk00000011_PCOUT<12>_UNCONNECTED , +\NLW_blk00000003/blk00000011_PCOUT<11>_UNCONNECTED , \NLW_blk00000003/blk00000011_PCOUT<10>_UNCONNECTED , +\NLW_blk00000003/blk00000011_PCOUT<9>_UNCONNECTED , \NLW_blk00000003/blk00000011_PCOUT<8>_UNCONNECTED , +\NLW_blk00000003/blk00000011_PCOUT<7>_UNCONNECTED , \NLW_blk00000003/blk00000011_PCOUT<6>_UNCONNECTED , +\NLW_blk00000003/blk00000011_PCOUT<5>_UNCONNECTED , \NLW_blk00000003/blk00000011_PCOUT<4>_UNCONNECTED , +\NLW_blk00000003/blk00000011_PCOUT<3>_UNCONNECTED , \NLW_blk00000003/blk00000011_PCOUT<2>_UNCONNECTED , +\NLW_blk00000003/blk00000011_PCOUT<1>_UNCONNECTED , \NLW_blk00000003/blk00000011_PCOUT<0>_UNCONNECTED }), + .ACIN({\blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , +\blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , +\blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , +\blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , +\blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , +\blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 }), + .CARRYINSEL({\blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 }) + ); + DSP48E1 #( + .ACASCREG ( 2 ), + .ADREG ( 0 ), + .ALUMODEREG ( 1 ), + .AREG ( 2 ), + .AUTORESET_PATDET ( "NO_RESET" ), + .A_INPUT ( "DIRECT" ), + .BCASCREG ( 2 ), + .BREG ( 2 ), + .B_INPUT ( "DIRECT" ), + .CARRYINREG ( 1 ), + .CARRYINSELREG ( 1 ), + .CREG ( 1 ), + .DREG ( 0 ), + .INMODEREG ( 0 ), + .MASK ( 48'hFFFFFFFFFFFE ), + .MREG ( 1 ), + .OPMODEREG ( 1 ), + .PATTERN ( 48'h000000000000 ), + .PREG ( 1 ), + .SEL_MASK ( "MASK" ), + .SEL_PATTERN ( "PATTERN" ), + .USE_DPORT ( "FALSE" ), + .USE_MULT ( "MULTIPLY" ), + .USE_PATTERN_DETECT ( "NO_PATDET" ), + .USE_SIMD ( "ONE48" )) + \blk00000003/blk00000010 ( + .PATTERNBDETECT(\NLW_blk00000003/blk00000010_PATTERNBDETECT_UNCONNECTED ), + .RSTC(\blk00000003/sig00000049 ), + .CEB1(ce), + .CEAD(\blk00000003/sig00000049 ), + .MULTSIGNOUT(\NLW_blk00000003/blk00000010_MULTSIGNOUT_UNCONNECTED ), + .CEC(ce), + .RSTM(\blk00000003/sig00000049 ), + .MULTSIGNIN(\blk00000003/sig00000049 ), + .CEB2(ce), + .RSTCTRL(\blk00000003/sig00000049 ), + .CEP(ce), + .CARRYCASCOUT(\NLW_blk00000003/blk00000010_CARRYCASCOUT_UNCONNECTED ), + .RSTA(\blk00000003/sig00000049 ), + .CECARRYIN(ce), + .UNDERFLOW(\NLW_blk00000003/blk00000010_UNDERFLOW_UNCONNECTED ), + .PATTERNDETECT(\NLW_blk00000003/blk00000010_PATTERNDETECT_UNCONNECTED ), + .RSTALUMODE(\blk00000003/sig00000049 ), + .RSTALLCARRYIN(\blk00000003/sig00000049 ), + .CED(\blk00000003/sig00000049 ), + .RSTD(\blk00000003/sig00000049 ), + .CEALUMODE(ce), + .CEA2(ce), + .CLK(clk), + .CEA1(ce), + .RSTB(\blk00000003/sig00000049 ), + .OVERFLOW(\NLW_blk00000003/blk00000010_OVERFLOW_UNCONNECTED ), + .CECTRL(ce), + .CEM(ce), + .CARRYIN(\blk00000003/sig00000049 ), + .CARRYCASCIN(\blk00000003/sig00000049 ), + .RSTINMODE(\blk00000003/sig00000049 ), + .CEINMODE(ce), + .RSTP(\blk00000003/sig00000049 ), + .ACOUT({\NLW_blk00000003/blk00000010_ACOUT<29>_UNCONNECTED , \NLW_blk00000003/blk00000010_ACOUT<28>_UNCONNECTED , +\NLW_blk00000003/blk00000010_ACOUT<27>_UNCONNECTED , \NLW_blk00000003/blk00000010_ACOUT<26>_UNCONNECTED , +\NLW_blk00000003/blk00000010_ACOUT<25>_UNCONNECTED , \NLW_blk00000003/blk00000010_ACOUT<24>_UNCONNECTED , +\NLW_blk00000003/blk00000010_ACOUT<23>_UNCONNECTED , \NLW_blk00000003/blk00000010_ACOUT<22>_UNCONNECTED , +\NLW_blk00000003/blk00000010_ACOUT<21>_UNCONNECTED , \NLW_blk00000003/blk00000010_ACOUT<20>_UNCONNECTED , +\NLW_blk00000003/blk00000010_ACOUT<19>_UNCONNECTED , \NLW_blk00000003/blk00000010_ACOUT<18>_UNCONNECTED , +\NLW_blk00000003/blk00000010_ACOUT<17>_UNCONNECTED , \NLW_blk00000003/blk00000010_ACOUT<16>_UNCONNECTED , +\NLW_blk00000003/blk00000010_ACOUT<15>_UNCONNECTED , \NLW_blk00000003/blk00000010_ACOUT<14>_UNCONNECTED , +\NLW_blk00000003/blk00000010_ACOUT<13>_UNCONNECTED , \NLW_blk00000003/blk00000010_ACOUT<12>_UNCONNECTED , +\NLW_blk00000003/blk00000010_ACOUT<11>_UNCONNECTED , \NLW_blk00000003/blk00000010_ACOUT<10>_UNCONNECTED , +\NLW_blk00000003/blk00000010_ACOUT<9>_UNCONNECTED , \NLW_blk00000003/blk00000010_ACOUT<8>_UNCONNECTED , +\NLW_blk00000003/blk00000010_ACOUT<7>_UNCONNECTED , \NLW_blk00000003/blk00000010_ACOUT<6>_UNCONNECTED , +\NLW_blk00000003/blk00000010_ACOUT<5>_UNCONNECTED , \NLW_blk00000003/blk00000010_ACOUT<4>_UNCONNECTED , +\NLW_blk00000003/blk00000010_ACOUT<3>_UNCONNECTED , \NLW_blk00000003/blk00000010_ACOUT<2>_UNCONNECTED , +\NLW_blk00000003/blk00000010_ACOUT<1>_UNCONNECTED , \NLW_blk00000003/blk00000010_ACOUT<0>_UNCONNECTED }), + .OPMODE({\blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig000000b1 , \blk00000003/sig00000049 , \blk00000003/sig000000b5 , +\blk00000003/sig000000b3 , \blk00000003/sig000000b5 }), + .PCIN({\blk00000003/sig000000c3 , \blk00000003/sig000000c4 , \blk00000003/sig000000c5 , \blk00000003/sig000000c6 , \blk00000003/sig000000c7 , +\blk00000003/sig000000c8 , \blk00000003/sig000000c9 , \blk00000003/sig000000ca , \blk00000003/sig000000cb , \blk00000003/sig000000cc , +\blk00000003/sig000000cd , \blk00000003/sig000000ce , \blk00000003/sig000000cf , \blk00000003/sig000000d0 , \blk00000003/sig000000d1 , +\blk00000003/sig000000d2 , \blk00000003/sig000000d3 , \blk00000003/sig000000d4 , \blk00000003/sig000000d5 , \blk00000003/sig000000d6 , +\blk00000003/sig000000d7 , \blk00000003/sig000000d8 , \blk00000003/sig000000d9 , \blk00000003/sig000000da , \blk00000003/sig000000db , +\blk00000003/sig000000dc , \blk00000003/sig000000dd , \blk00000003/sig000000de , \blk00000003/sig000000df , \blk00000003/sig000000e0 , +\blk00000003/sig000000e1 , \blk00000003/sig000000e2 , \blk00000003/sig000000e3 , \blk00000003/sig000000e4 , \blk00000003/sig000000e5 , +\blk00000003/sig000000e6 , \blk00000003/sig000000e7 , \blk00000003/sig000000e8 , \blk00000003/sig000000e9 , \blk00000003/sig000000ea , +\blk00000003/sig000000eb , \blk00000003/sig000000ec , \blk00000003/sig000000ed , \blk00000003/sig000000ee , \blk00000003/sig000000ef , +\blk00000003/sig000000f0 , \blk00000003/sig000000f1 , \blk00000003/sig000000f2 }), + .ALUMODE({\blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 }), + .C({\blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , +\blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , +\blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , +\blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , +\blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , +\blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , +\blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , +\blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , +\blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , +\blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 }), + .CARRYOUT({\NLW_blk00000003/blk00000010_CARRYOUT<3>_UNCONNECTED , \NLW_blk00000003/blk00000010_CARRYOUT<2>_UNCONNECTED , +\NLW_blk00000003/blk00000010_CARRYOUT<1>_UNCONNECTED , \NLW_blk00000003/blk00000010_CARRYOUT<0>_UNCONNECTED }), + .INMODE({\blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig000000ac , \blk00000003/sig00000049 , \blk00000003/sig00000049 }), + .BCIN({\blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , +\blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , +\blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , +\blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 }), + .B({\blk00000003/sig000000f3 , \blk00000003/sig000000f4 , \blk00000003/sig000000f5 , \blk00000003/sig000000f6 , \blk00000003/sig000000f7 , +\blk00000003/sig000000f8 , \blk00000003/sig000000f9 , \blk00000003/sig000000fa , \blk00000003/sig000000fb , \blk00000003/sig000000fc , +\blk00000003/sig000000fd , \blk00000003/sig000000fe , \blk00000003/sig000000ff , \blk00000003/sig00000100 , \blk00000003/sig00000101 , +\blk00000003/sig00000102 , \blk00000003/sig00000103 , \blk00000003/sig00000104 }), + .BCOUT({\NLW_blk00000003/blk00000010_BCOUT<17>_UNCONNECTED , \NLW_blk00000003/blk00000010_BCOUT<16>_UNCONNECTED , +\NLW_blk00000003/blk00000010_BCOUT<15>_UNCONNECTED , \NLW_blk00000003/blk00000010_BCOUT<14>_UNCONNECTED , +\NLW_blk00000003/blk00000010_BCOUT<13>_UNCONNECTED , \NLW_blk00000003/blk00000010_BCOUT<12>_UNCONNECTED , +\NLW_blk00000003/blk00000010_BCOUT<11>_UNCONNECTED , \NLW_blk00000003/blk00000010_BCOUT<10>_UNCONNECTED , +\NLW_blk00000003/blk00000010_BCOUT<9>_UNCONNECTED , \NLW_blk00000003/blk00000010_BCOUT<8>_UNCONNECTED , +\NLW_blk00000003/blk00000010_BCOUT<7>_UNCONNECTED , \NLW_blk00000003/blk00000010_BCOUT<6>_UNCONNECTED , +\NLW_blk00000003/blk00000010_BCOUT<5>_UNCONNECTED , \NLW_blk00000003/blk00000010_BCOUT<4>_UNCONNECTED , +\NLW_blk00000003/blk00000010_BCOUT<3>_UNCONNECTED , \NLW_blk00000003/blk00000010_BCOUT<2>_UNCONNECTED , +\NLW_blk00000003/blk00000010_BCOUT<1>_UNCONNECTED , \NLW_blk00000003/blk00000010_BCOUT<0>_UNCONNECTED }), + .D({\blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , +\blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , +\blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , +\blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , +\blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 }), + .P({\NLW_blk00000003/blk00000010_P<47>_UNCONNECTED , \blk00000003/sig00000105 , \blk00000003/sig00000106 , \blk00000003/sig00000107 , +\blk00000003/sig00000108 , \blk00000003/sig00000109 , \blk00000003/sig0000010a , \blk00000003/sig0000010b , \blk00000003/sig0000010c , +\blk00000003/sig0000010d , \blk00000003/sig0000010e , \blk00000003/sig0000010f , \blk00000003/sig00000110 , \blk00000003/sig00000111 , +\blk00000003/sig00000112 , \blk00000003/sig00000113 , \blk00000003/sig00000114 , \blk00000003/sig00000115 , \blk00000003/sig00000116 , +\blk00000003/sig00000117 , \blk00000003/sig00000118 , \blk00000003/sig00000119 , \blk00000003/sig0000011a , \blk00000003/sig0000011b , +\blk00000003/sig0000011c , \blk00000003/sig0000011d , \blk00000003/sig0000011e , \blk00000003/sig0000011f , \blk00000003/sig00000120 , +\blk00000003/sig00000121 , \blk00000003/sig00000122 , \blk00000003/sig00000123 , \blk00000003/sig00000124 , \blk00000003/sig00000125 , +\blk00000003/sig00000126 , \blk00000003/sig00000127 , \blk00000003/sig00000128 , \blk00000003/sig00000129 , \blk00000003/sig0000012a , +\blk00000003/sig0000012b , \blk00000003/sig0000012c , \blk00000003/sig0000012d , \blk00000003/sig0000012e , \blk00000003/sig0000012f , +\blk00000003/sig00000130 , \blk00000003/sig00000131 , \blk00000003/sig00000132 , \blk00000003/sig00000133 }), + .A({\blk00000003/sig00000134 , \blk00000003/sig00000134 , \blk00000003/sig00000134 , \blk00000003/sig00000134 , \blk00000003/sig00000134 , +\blk00000003/sig00000134 , \blk00000003/sig00000134 , \blk00000003/sig00000135 , \blk00000003/sig00000136 , \blk00000003/sig00000137 , +\blk00000003/sig00000138 , \blk00000003/sig00000139 , \blk00000003/sig0000013a , \blk00000003/sig0000013b , \blk00000003/sig0000013c , +\blk00000003/sig0000013d , \blk00000003/sig0000013e , \blk00000003/sig0000013f , \blk00000003/sig00000140 , \blk00000003/sig00000141 , +\blk00000003/sig00000142 , \blk00000003/sig00000143 , \blk00000003/sig00000144 , \blk00000003/sig00000145 , \blk00000003/sig00000146 , +\blk00000003/sig00000147 , \blk00000003/sig00000148 , \blk00000003/sig00000149 , \blk00000003/sig0000014a , \blk00000003/sig0000014b }), + .PCOUT({\NLW_blk00000003/blk00000010_PCOUT<47>_UNCONNECTED , \NLW_blk00000003/blk00000010_PCOUT<46>_UNCONNECTED , +\NLW_blk00000003/blk00000010_PCOUT<45>_UNCONNECTED , \NLW_blk00000003/blk00000010_PCOUT<44>_UNCONNECTED , +\NLW_blk00000003/blk00000010_PCOUT<43>_UNCONNECTED , \NLW_blk00000003/blk00000010_PCOUT<42>_UNCONNECTED , +\NLW_blk00000003/blk00000010_PCOUT<41>_UNCONNECTED , \NLW_blk00000003/blk00000010_PCOUT<40>_UNCONNECTED , +\NLW_blk00000003/blk00000010_PCOUT<39>_UNCONNECTED , \NLW_blk00000003/blk00000010_PCOUT<38>_UNCONNECTED , +\NLW_blk00000003/blk00000010_PCOUT<37>_UNCONNECTED , \NLW_blk00000003/blk00000010_PCOUT<36>_UNCONNECTED , +\NLW_blk00000003/blk00000010_PCOUT<35>_UNCONNECTED , \NLW_blk00000003/blk00000010_PCOUT<34>_UNCONNECTED , +\NLW_blk00000003/blk00000010_PCOUT<33>_UNCONNECTED , \NLW_blk00000003/blk00000010_PCOUT<32>_UNCONNECTED , +\NLW_blk00000003/blk00000010_PCOUT<31>_UNCONNECTED , \NLW_blk00000003/blk00000010_PCOUT<30>_UNCONNECTED , +\NLW_blk00000003/blk00000010_PCOUT<29>_UNCONNECTED , \NLW_blk00000003/blk00000010_PCOUT<28>_UNCONNECTED , +\NLW_blk00000003/blk00000010_PCOUT<27>_UNCONNECTED , \NLW_blk00000003/blk00000010_PCOUT<26>_UNCONNECTED , +\NLW_blk00000003/blk00000010_PCOUT<25>_UNCONNECTED , \NLW_blk00000003/blk00000010_PCOUT<24>_UNCONNECTED , +\NLW_blk00000003/blk00000010_PCOUT<23>_UNCONNECTED , \NLW_blk00000003/blk00000010_PCOUT<22>_UNCONNECTED , +\NLW_blk00000003/blk00000010_PCOUT<21>_UNCONNECTED , \NLW_blk00000003/blk00000010_PCOUT<20>_UNCONNECTED , +\NLW_blk00000003/blk00000010_PCOUT<19>_UNCONNECTED , \NLW_blk00000003/blk00000010_PCOUT<18>_UNCONNECTED , +\NLW_blk00000003/blk00000010_PCOUT<17>_UNCONNECTED , \NLW_blk00000003/blk00000010_PCOUT<16>_UNCONNECTED , +\NLW_blk00000003/blk00000010_PCOUT<15>_UNCONNECTED , \NLW_blk00000003/blk00000010_PCOUT<14>_UNCONNECTED , +\NLW_blk00000003/blk00000010_PCOUT<13>_UNCONNECTED , \NLW_blk00000003/blk00000010_PCOUT<12>_UNCONNECTED , +\NLW_blk00000003/blk00000010_PCOUT<11>_UNCONNECTED , \NLW_blk00000003/blk00000010_PCOUT<10>_UNCONNECTED , +\NLW_blk00000003/blk00000010_PCOUT<9>_UNCONNECTED , \NLW_blk00000003/blk00000010_PCOUT<8>_UNCONNECTED , +\NLW_blk00000003/blk00000010_PCOUT<7>_UNCONNECTED , \NLW_blk00000003/blk00000010_PCOUT<6>_UNCONNECTED , +\NLW_blk00000003/blk00000010_PCOUT<5>_UNCONNECTED , \NLW_blk00000003/blk00000010_PCOUT<4>_UNCONNECTED , +\NLW_blk00000003/blk00000010_PCOUT<3>_UNCONNECTED , \NLW_blk00000003/blk00000010_PCOUT<2>_UNCONNECTED , +\NLW_blk00000003/blk00000010_PCOUT<1>_UNCONNECTED , \NLW_blk00000003/blk00000010_PCOUT<0>_UNCONNECTED }), + .ACIN({\blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , +\blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , +\blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , +\blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , +\blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , +\blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 }), + .CARRYINSEL({\blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 }) + ); + MUXCY_D \blk00000003/blk0000000f ( + .CI(\blk00000003/sig000000ac ), + .DI(\blk00000003/sig00000049 ), + .S(\blk00000003/sig000000c2 ), + .O(\blk00000003/sig000000be ), + .LO(\NLW_blk00000003/blk0000000f_LO_UNCONNECTED ) + ); + MUXCY_D \blk00000003/blk0000000e ( + .CI(\blk00000003/sig000000be ), + .DI(\blk00000003/sig000000bf ), + .S(\blk00000003/sig000000c0 ), + .O(\blk00000003/sig000000b6 ), + .LO(\blk00000003/sig000000c1 ) + ); + XORCY \blk00000003/blk0000000d ( + .CI(\blk00000003/sig000000bc ), + .LI(\blk00000003/sig000000ac ), + .O(\blk00000003/sig000000bd ) + ); + MUXCY_D \blk00000003/blk0000000c ( + .CI(\blk00000003/sig000000b9 ), + .DI(\blk00000003/sig000000ba ), + .S(\blk00000003/sig000000bb ), + .O(\NLW_blk00000003/blk0000000c_O_UNCONNECTED ), + .LO(\blk00000003/sig000000bc ) + ); + MUXCY_D \blk00000003/blk0000000b ( + .CI(\blk00000003/sig000000b6 ), + .DI(\blk00000003/sig000000b7 ), + .S(\blk00000003/sig000000b8 ), + .O(\blk00000003/sig000000b9 ), + .LO(\NLW_blk00000003/blk0000000b_LO_UNCONNECTED ) + ); + FD #( + .INIT ( 1'b0 )) + \blk00000003/blk0000000a ( + .C(clk), + .D(\blk00000003/sig000000b4 ), + .Q(\blk00000003/sig000000b5 ) + ); + FD #( + .INIT ( 1'b0 )) + \blk00000003/blk00000009 ( + .C(clk), + .D(\blk00000003/sig000000b2 ), + .Q(\blk00000003/sig000000b3 ) + ); + FD #( + .INIT ( 1'b0 )) + \blk00000003/blk00000008 ( + .C(clk), + .D(\blk00000003/sig000000b0 ), + .Q(\blk00000003/sig000000b1 ) + ); + XORCY \blk00000003/blk00000007 ( + .CI(\blk00000003/sig00000049 ), + .LI(\blk00000003/sig000000ae ), + .O(\blk00000003/sig000000af ) + ); + MUXCY_D \blk00000003/blk00000006 ( + .CI(\blk00000003/sig00000049 ), + .DI(\blk00000003/sig000000ad ), + .S(\blk00000003/sig000000ae ), + .O(\NLW_blk00000003/blk00000006_O_UNCONNECTED ), + .LO(\NLW_blk00000003/blk00000006_LO_UNCONNECTED ) + ); + VCC \blk00000003/blk00000005 ( + .P(\blk00000003/sig000000ac ) + ); + GND \blk00000003/blk00000004 ( + .G(\blk00000003/sig00000049 ) + ); + LUT2 #( + .INIT ( 4'h8 )) + \blk00000003/blk0000002b/blk0000008d ( + .I0(nd), + .I1(ce), + .O(\blk00000003/blk0000002b/sig00000800 ) + ); + RAM32X1D #( + .INIT ( 32'h00000000 )) + \blk00000003/blk0000002b/blk0000008c ( + .A0(\blk00000003/sig000001e7 ), + .A1(\blk00000003/sig000001e6 ), + .A2(\blk00000003/blk0000002b/sig000007cf ), + .A3(\blk00000003/blk0000002b/sig000007cf ), + .A4(\blk00000003/blk0000002b/sig000007cf ), + .D(din_2_2[22]), + .DPRA0(\blk00000003/sig000001dc ), + .DPRA1(\blk00000003/sig000001da ), + .DPRA2(\blk00000003/blk0000002b/sig000007cf ), + .DPRA3(\blk00000003/blk0000002b/sig000007cf ), + .DPRA4(\blk00000003/blk0000002b/sig000007cf ), + .WCLK(clk), + .WE(\blk00000003/blk0000002b/sig00000800 ), + .SPO(\NLW_blk00000003/blk0000002b/blk0000008c_SPO_UNCONNECTED ), + .DPO(\blk00000003/blk0000002b/sig000007fe ) + ); + RAM32X1D #( + .INIT ( 32'h00000000 )) + \blk00000003/blk0000002b/blk0000008b ( + .A0(\blk00000003/sig000001e7 ), + .A1(\blk00000003/sig000001e6 ), + .A2(\blk00000003/blk0000002b/sig000007cf ), + .A3(\blk00000003/blk0000002b/sig000007cf ), + .A4(\blk00000003/blk0000002b/sig000007cf ), + .D(din_2_2[21]), + .DPRA0(\blk00000003/sig000001dc ), + .DPRA1(\blk00000003/sig000001da ), + .DPRA2(\blk00000003/blk0000002b/sig000007cf ), + .DPRA3(\blk00000003/blk0000002b/sig000007cf ), + .DPRA4(\blk00000003/blk0000002b/sig000007cf ), + .WCLK(clk), + .WE(\blk00000003/blk0000002b/sig00000800 ), + .SPO(\NLW_blk00000003/blk0000002b/blk0000008b_SPO_UNCONNECTED ), + .DPO(\blk00000003/blk0000002b/sig000007fd ) + ); + RAM32X1D #( + .INIT ( 32'h00000000 )) + \blk00000003/blk0000002b/blk0000008a ( + .A0(\blk00000003/sig000001e7 ), + .A1(\blk00000003/sig000001e6 ), + .A2(\blk00000003/blk0000002b/sig000007cf ), + .A3(\blk00000003/blk0000002b/sig000007cf ), + .A4(\blk00000003/blk0000002b/sig000007cf ), + .D(din_2_2[23]), + .DPRA0(\blk00000003/sig000001dc ), + .DPRA1(\blk00000003/sig000001da ), + .DPRA2(\blk00000003/blk0000002b/sig000007cf ), + .DPRA3(\blk00000003/blk0000002b/sig000007cf ), + .DPRA4(\blk00000003/blk0000002b/sig000007cf ), + .WCLK(clk), + .WE(\blk00000003/blk0000002b/sig00000800 ), + .SPO(\NLW_blk00000003/blk0000002b/blk0000008a_SPO_UNCONNECTED ), + .DPO(\blk00000003/blk0000002b/sig000007ff ) + ); + RAM32X1D #( + .INIT ( 32'h00000000 )) + \blk00000003/blk0000002b/blk00000089 ( + .A0(\blk00000003/sig000001e7 ), + .A1(\blk00000003/sig000001e6 ), + .A2(\blk00000003/blk0000002b/sig000007cf ), + .A3(\blk00000003/blk0000002b/sig000007cf ), + .A4(\blk00000003/blk0000002b/sig000007cf ), + .D(din_2_2[19]), + .DPRA0(\blk00000003/sig000001dc ), + .DPRA1(\blk00000003/sig000001da ), + .DPRA2(\blk00000003/blk0000002b/sig000007cf ), + .DPRA3(\blk00000003/blk0000002b/sig000007cf ), + .DPRA4(\blk00000003/blk0000002b/sig000007cf ), + .WCLK(clk), + .WE(\blk00000003/blk0000002b/sig00000800 ), + .SPO(\NLW_blk00000003/blk0000002b/blk00000089_SPO_UNCONNECTED ), + .DPO(\blk00000003/blk0000002b/sig000007fb ) + ); + RAM32X1D #( + .INIT ( 32'h00000000 )) + \blk00000003/blk0000002b/blk00000088 ( + .A0(\blk00000003/sig000001e7 ), + .A1(\blk00000003/sig000001e6 ), + .A2(\blk00000003/blk0000002b/sig000007cf ), + .A3(\blk00000003/blk0000002b/sig000007cf ), + .A4(\blk00000003/blk0000002b/sig000007cf ), + .D(din_2_2[18]), + .DPRA0(\blk00000003/sig000001dc ), + .DPRA1(\blk00000003/sig000001da ), + .DPRA2(\blk00000003/blk0000002b/sig000007cf ), + .DPRA3(\blk00000003/blk0000002b/sig000007cf ), + .DPRA4(\blk00000003/blk0000002b/sig000007cf ), + .WCLK(clk), + .WE(\blk00000003/blk0000002b/sig00000800 ), + .SPO(\NLW_blk00000003/blk0000002b/blk00000088_SPO_UNCONNECTED ), + .DPO(\blk00000003/blk0000002b/sig000007fa ) + ); + RAM32X1D #( + .INIT ( 32'h00000000 )) + \blk00000003/blk0000002b/blk00000087 ( + .A0(\blk00000003/sig000001e7 ), + .A1(\blk00000003/sig000001e6 ), + .A2(\blk00000003/blk0000002b/sig000007cf ), + .A3(\blk00000003/blk0000002b/sig000007cf ), + .A4(\blk00000003/blk0000002b/sig000007cf ), + .D(din_2_2[20]), + .DPRA0(\blk00000003/sig000001dc ), + .DPRA1(\blk00000003/sig000001da ), + .DPRA2(\blk00000003/blk0000002b/sig000007cf ), + .DPRA3(\blk00000003/blk0000002b/sig000007cf ), + .DPRA4(\blk00000003/blk0000002b/sig000007cf ), + .WCLK(clk), + .WE(\blk00000003/blk0000002b/sig00000800 ), + .SPO(\NLW_blk00000003/blk0000002b/blk00000087_SPO_UNCONNECTED ), + .DPO(\blk00000003/blk0000002b/sig000007fc ) + ); + RAM32X1D #( + .INIT ( 32'h00000000 )) + \blk00000003/blk0000002b/blk00000086 ( + .A0(\blk00000003/sig000001e7 ), + .A1(\blk00000003/sig000001e6 ), + .A2(\blk00000003/blk0000002b/sig000007cf ), + .A3(\blk00000003/blk0000002b/sig000007cf ), + .A4(\blk00000003/blk0000002b/sig000007cf ), + .D(din_2_2[16]), + .DPRA0(\blk00000003/sig000001dc ), + .DPRA1(\blk00000003/sig000001da ), + .DPRA2(\blk00000003/blk0000002b/sig000007cf ), + .DPRA3(\blk00000003/blk0000002b/sig000007cf ), + .DPRA4(\blk00000003/blk0000002b/sig000007cf ), + .WCLK(clk), + .WE(\blk00000003/blk0000002b/sig00000800 ), + .SPO(\NLW_blk00000003/blk0000002b/blk00000086_SPO_UNCONNECTED ), + .DPO(\blk00000003/blk0000002b/sig000007f8 ) + ); + RAM32X1D #( + .INIT ( 32'h00000000 )) + \blk00000003/blk0000002b/blk00000085 ( + .A0(\blk00000003/sig000001e7 ), + .A1(\blk00000003/sig000001e6 ), + .A2(\blk00000003/blk0000002b/sig000007cf ), + .A3(\blk00000003/blk0000002b/sig000007cf ), + .A4(\blk00000003/blk0000002b/sig000007cf ), + .D(din_2_2[15]), + .DPRA0(\blk00000003/sig000001dc ), + .DPRA1(\blk00000003/sig000001da ), + .DPRA2(\blk00000003/blk0000002b/sig000007cf ), + .DPRA3(\blk00000003/blk0000002b/sig000007cf ), + .DPRA4(\blk00000003/blk0000002b/sig000007cf ), + .WCLK(clk), + .WE(\blk00000003/blk0000002b/sig00000800 ), + .SPO(\NLW_blk00000003/blk0000002b/blk00000085_SPO_UNCONNECTED ), + .DPO(\blk00000003/blk0000002b/sig000007f7 ) + ); + RAM32X1D #( + .INIT ( 32'h00000000 )) + \blk00000003/blk0000002b/blk00000084 ( + .A0(\blk00000003/sig000001e7 ), + .A1(\blk00000003/sig000001e6 ), + .A2(\blk00000003/blk0000002b/sig000007cf ), + .A3(\blk00000003/blk0000002b/sig000007cf ), + .A4(\blk00000003/blk0000002b/sig000007cf ), + .D(din_2_2[17]), + .DPRA0(\blk00000003/sig000001dc ), + .DPRA1(\blk00000003/sig000001da ), + .DPRA2(\blk00000003/blk0000002b/sig000007cf ), + .DPRA3(\blk00000003/blk0000002b/sig000007cf ), + .DPRA4(\blk00000003/blk0000002b/sig000007cf ), + .WCLK(clk), + .WE(\blk00000003/blk0000002b/sig00000800 ), + .SPO(\NLW_blk00000003/blk0000002b/blk00000084_SPO_UNCONNECTED ), + .DPO(\blk00000003/blk0000002b/sig000007f9 ) + ); + RAM32X1D #( + .INIT ( 32'h00000000 )) + \blk00000003/blk0000002b/blk00000083 ( + .A0(\blk00000003/sig000001e7 ), + .A1(\blk00000003/sig000001e6 ), + .A2(\blk00000003/blk0000002b/sig000007cf ), + .A3(\blk00000003/blk0000002b/sig000007cf ), + .A4(\blk00000003/blk0000002b/sig000007cf ), + .D(din_2_2[13]), + .DPRA0(\blk00000003/sig000001dc ), + .DPRA1(\blk00000003/sig000001da ), + .DPRA2(\blk00000003/blk0000002b/sig000007cf ), + .DPRA3(\blk00000003/blk0000002b/sig000007cf ), + .DPRA4(\blk00000003/blk0000002b/sig000007cf ), + .WCLK(clk), + .WE(\blk00000003/blk0000002b/sig00000800 ), + .SPO(\NLW_blk00000003/blk0000002b/blk00000083_SPO_UNCONNECTED ), + .DPO(\blk00000003/blk0000002b/sig000007f5 ) + ); + RAM32X1D #( + .INIT ( 32'h00000000 )) + \blk00000003/blk0000002b/blk00000082 ( + .A0(\blk00000003/sig000001e7 ), + .A1(\blk00000003/sig000001e6 ), + .A2(\blk00000003/blk0000002b/sig000007cf ), + .A3(\blk00000003/blk0000002b/sig000007cf ), + .A4(\blk00000003/blk0000002b/sig000007cf ), + .D(din_2_2[12]), + .DPRA0(\blk00000003/sig000001dc ), + .DPRA1(\blk00000003/sig000001da ), + .DPRA2(\blk00000003/blk0000002b/sig000007cf ), + .DPRA3(\blk00000003/blk0000002b/sig000007cf ), + .DPRA4(\blk00000003/blk0000002b/sig000007cf ), + .WCLK(clk), + .WE(\blk00000003/blk0000002b/sig00000800 ), + .SPO(\NLW_blk00000003/blk0000002b/blk00000082_SPO_UNCONNECTED ), + .DPO(\blk00000003/blk0000002b/sig000007f4 ) + ); + RAM32X1D #( + .INIT ( 32'h00000000 )) + \blk00000003/blk0000002b/blk00000081 ( + .A0(\blk00000003/sig000001e7 ), + .A1(\blk00000003/sig000001e6 ), + .A2(\blk00000003/blk0000002b/sig000007cf ), + .A3(\blk00000003/blk0000002b/sig000007cf ), + .A4(\blk00000003/blk0000002b/sig000007cf ), + .D(din_2_2[14]), + .DPRA0(\blk00000003/sig000001dc ), + .DPRA1(\blk00000003/sig000001da ), + .DPRA2(\blk00000003/blk0000002b/sig000007cf ), + .DPRA3(\blk00000003/blk0000002b/sig000007cf ), + .DPRA4(\blk00000003/blk0000002b/sig000007cf ), + .WCLK(clk), + .WE(\blk00000003/blk0000002b/sig00000800 ), + .SPO(\NLW_blk00000003/blk0000002b/blk00000081_SPO_UNCONNECTED ), + .DPO(\blk00000003/blk0000002b/sig000007f6 ) + ); + RAM32X1D #( + .INIT ( 32'h00000000 )) + \blk00000003/blk0000002b/blk00000080 ( + .A0(\blk00000003/sig000001e7 ), + .A1(\blk00000003/sig000001e6 ), + .A2(\blk00000003/blk0000002b/sig000007cf ), + .A3(\blk00000003/blk0000002b/sig000007cf ), + .A4(\blk00000003/blk0000002b/sig000007cf ), + .D(din_2_2[10]), + .DPRA0(\blk00000003/sig000001dc ), + .DPRA1(\blk00000003/sig000001da ), + .DPRA2(\blk00000003/blk0000002b/sig000007cf ), + .DPRA3(\blk00000003/blk0000002b/sig000007cf ), + .DPRA4(\blk00000003/blk0000002b/sig000007cf ), + .WCLK(clk), + .WE(\blk00000003/blk0000002b/sig00000800 ), + .SPO(\NLW_blk00000003/blk0000002b/blk00000080_SPO_UNCONNECTED ), + .DPO(\blk00000003/blk0000002b/sig000007f2 ) + ); + RAM32X1D #( + .INIT ( 32'h00000000 )) + \blk00000003/blk0000002b/blk0000007f ( + .A0(\blk00000003/sig000001e7 ), + .A1(\blk00000003/sig000001e6 ), + .A2(\blk00000003/blk0000002b/sig000007cf ), + .A3(\blk00000003/blk0000002b/sig000007cf ), + .A4(\blk00000003/blk0000002b/sig000007cf ), + .D(din_2_2[9]), + .DPRA0(\blk00000003/sig000001dc ), + .DPRA1(\blk00000003/sig000001da ), + .DPRA2(\blk00000003/blk0000002b/sig000007cf ), + .DPRA3(\blk00000003/blk0000002b/sig000007cf ), + .DPRA4(\blk00000003/blk0000002b/sig000007cf ), + .WCLK(clk), + .WE(\blk00000003/blk0000002b/sig00000800 ), + .SPO(\NLW_blk00000003/blk0000002b/blk0000007f_SPO_UNCONNECTED ), + .DPO(\blk00000003/blk0000002b/sig000007f1 ) + ); + RAM32X1D #( + .INIT ( 32'h00000000 )) + \blk00000003/blk0000002b/blk0000007e ( + .A0(\blk00000003/sig000001e7 ), + .A1(\blk00000003/sig000001e6 ), + .A2(\blk00000003/blk0000002b/sig000007cf ), + .A3(\blk00000003/blk0000002b/sig000007cf ), + .A4(\blk00000003/blk0000002b/sig000007cf ), + .D(din_2_2[11]), + .DPRA0(\blk00000003/sig000001dc ), + .DPRA1(\blk00000003/sig000001da ), + .DPRA2(\blk00000003/blk0000002b/sig000007cf ), + .DPRA3(\blk00000003/blk0000002b/sig000007cf ), + .DPRA4(\blk00000003/blk0000002b/sig000007cf ), + .WCLK(clk), + .WE(\blk00000003/blk0000002b/sig00000800 ), + .SPO(\NLW_blk00000003/blk0000002b/blk0000007e_SPO_UNCONNECTED ), + .DPO(\blk00000003/blk0000002b/sig000007f3 ) + ); + RAM32X1D #( + .INIT ( 32'h00000000 )) + \blk00000003/blk0000002b/blk0000007d ( + .A0(\blk00000003/sig000001e7 ), + .A1(\blk00000003/sig000001e6 ), + .A2(\blk00000003/blk0000002b/sig000007cf ), + .A3(\blk00000003/blk0000002b/sig000007cf ), + .A4(\blk00000003/blk0000002b/sig000007cf ), + .D(din_2_2[7]), + .DPRA0(\blk00000003/sig000001dc ), + .DPRA1(\blk00000003/sig000001da ), + .DPRA2(\blk00000003/blk0000002b/sig000007cf ), + .DPRA3(\blk00000003/blk0000002b/sig000007cf ), + .DPRA4(\blk00000003/blk0000002b/sig000007cf ), + .WCLK(clk), + .WE(\blk00000003/blk0000002b/sig00000800 ), + .SPO(\NLW_blk00000003/blk0000002b/blk0000007d_SPO_UNCONNECTED ), + .DPO(\blk00000003/blk0000002b/sig000007ef ) + ); + RAM32X1D #( + .INIT ( 32'h00000000 )) + \blk00000003/blk0000002b/blk0000007c ( + .A0(\blk00000003/sig000001e7 ), + .A1(\blk00000003/sig000001e6 ), + .A2(\blk00000003/blk0000002b/sig000007cf ), + .A3(\blk00000003/blk0000002b/sig000007cf ), + .A4(\blk00000003/blk0000002b/sig000007cf ), + .D(din_2_2[6]), + .DPRA0(\blk00000003/sig000001dc ), + .DPRA1(\blk00000003/sig000001da ), + .DPRA2(\blk00000003/blk0000002b/sig000007cf ), + .DPRA3(\blk00000003/blk0000002b/sig000007cf ), + .DPRA4(\blk00000003/blk0000002b/sig000007cf ), + .WCLK(clk), + .WE(\blk00000003/blk0000002b/sig00000800 ), + .SPO(\NLW_blk00000003/blk0000002b/blk0000007c_SPO_UNCONNECTED ), + .DPO(\blk00000003/blk0000002b/sig000007ee ) + ); + RAM32X1D #( + .INIT ( 32'h00000000 )) + \blk00000003/blk0000002b/blk0000007b ( + .A0(\blk00000003/sig000001e7 ), + .A1(\blk00000003/sig000001e6 ), + .A2(\blk00000003/blk0000002b/sig000007cf ), + .A3(\blk00000003/blk0000002b/sig000007cf ), + .A4(\blk00000003/blk0000002b/sig000007cf ), + .D(din_2_2[8]), + .DPRA0(\blk00000003/sig000001dc ), + .DPRA1(\blk00000003/sig000001da ), + .DPRA2(\blk00000003/blk0000002b/sig000007cf ), + .DPRA3(\blk00000003/blk0000002b/sig000007cf ), + .DPRA4(\blk00000003/blk0000002b/sig000007cf ), + .WCLK(clk), + .WE(\blk00000003/blk0000002b/sig00000800 ), + .SPO(\NLW_blk00000003/blk0000002b/blk0000007b_SPO_UNCONNECTED ), + .DPO(\blk00000003/blk0000002b/sig000007f0 ) + ); + RAM32X1D #( + .INIT ( 32'h00000000 )) + \blk00000003/blk0000002b/blk0000007a ( + .A0(\blk00000003/sig000001e7 ), + .A1(\blk00000003/sig000001e6 ), + .A2(\blk00000003/blk0000002b/sig000007cf ), + .A3(\blk00000003/blk0000002b/sig000007cf ), + .A4(\blk00000003/blk0000002b/sig000007cf ), + .D(din_2_2[4]), + .DPRA0(\blk00000003/sig000001dc ), + .DPRA1(\blk00000003/sig000001da ), + .DPRA2(\blk00000003/blk0000002b/sig000007cf ), + .DPRA3(\blk00000003/blk0000002b/sig000007cf ), + .DPRA4(\blk00000003/blk0000002b/sig000007cf ), + .WCLK(clk), + .WE(\blk00000003/blk0000002b/sig00000800 ), + .SPO(\NLW_blk00000003/blk0000002b/blk0000007a_SPO_UNCONNECTED ), + .DPO(\blk00000003/blk0000002b/sig000007ec ) + ); + RAM32X1D #( + .INIT ( 32'h00000000 )) + \blk00000003/blk0000002b/blk00000079 ( + .A0(\blk00000003/sig000001e7 ), + .A1(\blk00000003/sig000001e6 ), + .A2(\blk00000003/blk0000002b/sig000007cf ), + .A3(\blk00000003/blk0000002b/sig000007cf ), + .A4(\blk00000003/blk0000002b/sig000007cf ), + .D(din_2_2[3]), + .DPRA0(\blk00000003/sig000001dc ), + .DPRA1(\blk00000003/sig000001da ), + .DPRA2(\blk00000003/blk0000002b/sig000007cf ), + .DPRA3(\blk00000003/blk0000002b/sig000007cf ), + .DPRA4(\blk00000003/blk0000002b/sig000007cf ), + .WCLK(clk), + .WE(\blk00000003/blk0000002b/sig00000800 ), + .SPO(\NLW_blk00000003/blk0000002b/blk00000079_SPO_UNCONNECTED ), + .DPO(\blk00000003/blk0000002b/sig000007eb ) + ); + RAM32X1D #( + .INIT ( 32'h00000000 )) + \blk00000003/blk0000002b/blk00000078 ( + .A0(\blk00000003/sig000001e7 ), + .A1(\blk00000003/sig000001e6 ), + .A2(\blk00000003/blk0000002b/sig000007cf ), + .A3(\blk00000003/blk0000002b/sig000007cf ), + .A4(\blk00000003/blk0000002b/sig000007cf ), + .D(din_2_2[5]), + .DPRA0(\blk00000003/sig000001dc ), + .DPRA1(\blk00000003/sig000001da ), + .DPRA2(\blk00000003/blk0000002b/sig000007cf ), + .DPRA3(\blk00000003/blk0000002b/sig000007cf ), + .DPRA4(\blk00000003/blk0000002b/sig000007cf ), + .WCLK(clk), + .WE(\blk00000003/blk0000002b/sig00000800 ), + .SPO(\NLW_blk00000003/blk0000002b/blk00000078_SPO_UNCONNECTED ), + .DPO(\blk00000003/blk0000002b/sig000007ed ) + ); + RAM32X1D #( + .INIT ( 32'h00000000 )) + \blk00000003/blk0000002b/blk00000077 ( + .A0(\blk00000003/sig000001e7 ), + .A1(\blk00000003/sig000001e6 ), + .A2(\blk00000003/blk0000002b/sig000007cf ), + .A3(\blk00000003/blk0000002b/sig000007cf ), + .A4(\blk00000003/blk0000002b/sig000007cf ), + .D(din_2_2[1]), + .DPRA0(\blk00000003/sig000001dc ), + .DPRA1(\blk00000003/sig000001da ), + .DPRA2(\blk00000003/blk0000002b/sig000007cf ), + .DPRA3(\blk00000003/blk0000002b/sig000007cf ), + .DPRA4(\blk00000003/blk0000002b/sig000007cf ), + .WCLK(clk), + .WE(\blk00000003/blk0000002b/sig00000800 ), + .SPO(\NLW_blk00000003/blk0000002b/blk00000077_SPO_UNCONNECTED ), + .DPO(\blk00000003/blk0000002b/sig000007e9 ) + ); + RAM32X1D #( + .INIT ( 32'h00000000 )) + \blk00000003/blk0000002b/blk00000076 ( + .A0(\blk00000003/sig000001e7 ), + .A1(\blk00000003/sig000001e6 ), + .A2(\blk00000003/blk0000002b/sig000007cf ), + .A3(\blk00000003/blk0000002b/sig000007cf ), + .A4(\blk00000003/blk0000002b/sig000007cf ), + .D(din_2_2[0]), + .DPRA0(\blk00000003/sig000001dc ), + .DPRA1(\blk00000003/sig000001da ), + .DPRA2(\blk00000003/blk0000002b/sig000007cf ), + .DPRA3(\blk00000003/blk0000002b/sig000007cf ), + .DPRA4(\blk00000003/blk0000002b/sig000007cf ), + .WCLK(clk), + .WE(\blk00000003/blk0000002b/sig00000800 ), + .SPO(\NLW_blk00000003/blk0000002b/blk00000076_SPO_UNCONNECTED ), + .DPO(\blk00000003/blk0000002b/sig000007e8 ) + ); + RAM32X1D #( + .INIT ( 32'h00000000 )) + \blk00000003/blk0000002b/blk00000075 ( + .A0(\blk00000003/sig000001e7 ), + .A1(\blk00000003/sig000001e6 ), + .A2(\blk00000003/blk0000002b/sig000007cf ), + .A3(\blk00000003/blk0000002b/sig000007cf ), + .A4(\blk00000003/blk0000002b/sig000007cf ), + .D(din_2_2[2]), + .DPRA0(\blk00000003/sig000001dc ), + .DPRA1(\blk00000003/sig000001da ), + .DPRA2(\blk00000003/blk0000002b/sig000007cf ), + .DPRA3(\blk00000003/blk0000002b/sig000007cf ), + .DPRA4(\blk00000003/blk0000002b/sig000007cf ), + .WCLK(clk), + .WE(\blk00000003/blk0000002b/sig00000800 ), + .SPO(\NLW_blk00000003/blk0000002b/blk00000075_SPO_UNCONNECTED ), + .DPO(\blk00000003/blk0000002b/sig000007ea ) + ); + RAM32X1D #( + .INIT ( 32'h00000000 )) + \blk00000003/blk0000002b/blk00000074 ( + .A0(\blk00000003/sig000001e7 ), + .A1(\blk00000003/sig000001e6 ), + .A2(\blk00000003/blk0000002b/sig000007cf ), + .A3(\blk00000003/blk0000002b/sig000007cf ), + .A4(\blk00000003/blk0000002b/sig000007cf ), + .D(din_1_1[22]), + .DPRA0(\blk00000003/sig000001dc ), + .DPRA1(\blk00000003/sig000001da ), + .DPRA2(\blk00000003/blk0000002b/sig000007cf ), + .DPRA3(\blk00000003/blk0000002b/sig000007cf ), + .DPRA4(\blk00000003/blk0000002b/sig000007cf ), + .WCLK(clk), + .WE(\blk00000003/blk0000002b/sig00000800 ), + .SPO(\NLW_blk00000003/blk0000002b/blk00000074_SPO_UNCONNECTED ), + .DPO(\blk00000003/blk0000002b/sig000007e6 ) + ); + RAM32X1D #( + .INIT ( 32'h00000000 )) + \blk00000003/blk0000002b/blk00000073 ( + .A0(\blk00000003/sig000001e7 ), + .A1(\blk00000003/sig000001e6 ), + .A2(\blk00000003/blk0000002b/sig000007cf ), + .A3(\blk00000003/blk0000002b/sig000007cf ), + .A4(\blk00000003/blk0000002b/sig000007cf ), + .D(din_1_1[21]), + .DPRA0(\blk00000003/sig000001dc ), + .DPRA1(\blk00000003/sig000001da ), + .DPRA2(\blk00000003/blk0000002b/sig000007cf ), + .DPRA3(\blk00000003/blk0000002b/sig000007cf ), + .DPRA4(\blk00000003/blk0000002b/sig000007cf ), + .WCLK(clk), + .WE(\blk00000003/blk0000002b/sig00000800 ), + .SPO(\NLW_blk00000003/blk0000002b/blk00000073_SPO_UNCONNECTED ), + .DPO(\blk00000003/blk0000002b/sig000007e5 ) + ); + RAM32X1D #( + .INIT ( 32'h00000000 )) + \blk00000003/blk0000002b/blk00000072 ( + .A0(\blk00000003/sig000001e7 ), + .A1(\blk00000003/sig000001e6 ), + .A2(\blk00000003/blk0000002b/sig000007cf ), + .A3(\blk00000003/blk0000002b/sig000007cf ), + .A4(\blk00000003/blk0000002b/sig000007cf ), + .D(din_1_1[23]), + .DPRA0(\blk00000003/sig000001dc ), + .DPRA1(\blk00000003/sig000001da ), + .DPRA2(\blk00000003/blk0000002b/sig000007cf ), + .DPRA3(\blk00000003/blk0000002b/sig000007cf ), + .DPRA4(\blk00000003/blk0000002b/sig000007cf ), + .WCLK(clk), + .WE(\blk00000003/blk0000002b/sig00000800 ), + .SPO(\NLW_blk00000003/blk0000002b/blk00000072_SPO_UNCONNECTED ), + .DPO(\blk00000003/blk0000002b/sig000007e7 ) + ); + RAM32X1D #( + .INIT ( 32'h00000000 )) + \blk00000003/blk0000002b/blk00000071 ( + .A0(\blk00000003/sig000001e7 ), + .A1(\blk00000003/sig000001e6 ), + .A2(\blk00000003/blk0000002b/sig000007cf ), + .A3(\blk00000003/blk0000002b/sig000007cf ), + .A4(\blk00000003/blk0000002b/sig000007cf ), + .D(din_1_1[19]), + .DPRA0(\blk00000003/sig000001dc ), + .DPRA1(\blk00000003/sig000001da ), + .DPRA2(\blk00000003/blk0000002b/sig000007cf ), + .DPRA3(\blk00000003/blk0000002b/sig000007cf ), + .DPRA4(\blk00000003/blk0000002b/sig000007cf ), + .WCLK(clk), + .WE(\blk00000003/blk0000002b/sig00000800 ), + .SPO(\NLW_blk00000003/blk0000002b/blk00000071_SPO_UNCONNECTED ), + .DPO(\blk00000003/blk0000002b/sig000007e3 ) + ); + RAM32X1D #( + .INIT ( 32'h00000000 )) + \blk00000003/blk0000002b/blk00000070 ( + .A0(\blk00000003/sig000001e7 ), + .A1(\blk00000003/sig000001e6 ), + .A2(\blk00000003/blk0000002b/sig000007cf ), + .A3(\blk00000003/blk0000002b/sig000007cf ), + .A4(\blk00000003/blk0000002b/sig000007cf ), + .D(din_1_1[18]), + .DPRA0(\blk00000003/sig000001dc ), + .DPRA1(\blk00000003/sig000001da ), + .DPRA2(\blk00000003/blk0000002b/sig000007cf ), + .DPRA3(\blk00000003/blk0000002b/sig000007cf ), + .DPRA4(\blk00000003/blk0000002b/sig000007cf ), + .WCLK(clk), + .WE(\blk00000003/blk0000002b/sig00000800 ), + .SPO(\NLW_blk00000003/blk0000002b/blk00000070_SPO_UNCONNECTED ), + .DPO(\blk00000003/blk0000002b/sig000007e2 ) + ); + RAM32X1D #( + .INIT ( 32'h00000000 )) + \blk00000003/blk0000002b/blk0000006f ( + .A0(\blk00000003/sig000001e7 ), + .A1(\blk00000003/sig000001e6 ), + .A2(\blk00000003/blk0000002b/sig000007cf ), + .A3(\blk00000003/blk0000002b/sig000007cf ), + .A4(\blk00000003/blk0000002b/sig000007cf ), + .D(din_1_1[20]), + .DPRA0(\blk00000003/sig000001dc ), + .DPRA1(\blk00000003/sig000001da ), + .DPRA2(\blk00000003/blk0000002b/sig000007cf ), + .DPRA3(\blk00000003/blk0000002b/sig000007cf ), + .DPRA4(\blk00000003/blk0000002b/sig000007cf ), + .WCLK(clk), + .WE(\blk00000003/blk0000002b/sig00000800 ), + .SPO(\NLW_blk00000003/blk0000002b/blk0000006f_SPO_UNCONNECTED ), + .DPO(\blk00000003/blk0000002b/sig000007e4 ) + ); + RAM32X1D #( + .INIT ( 32'h00000000 )) + \blk00000003/blk0000002b/blk0000006e ( + .A0(\blk00000003/sig000001e7 ), + .A1(\blk00000003/sig000001e6 ), + .A2(\blk00000003/blk0000002b/sig000007cf ), + .A3(\blk00000003/blk0000002b/sig000007cf ), + .A4(\blk00000003/blk0000002b/sig000007cf ), + .D(din_1_1[16]), + .DPRA0(\blk00000003/sig000001dc ), + .DPRA1(\blk00000003/sig000001da ), + .DPRA2(\blk00000003/blk0000002b/sig000007cf ), + .DPRA3(\blk00000003/blk0000002b/sig000007cf ), + .DPRA4(\blk00000003/blk0000002b/sig000007cf ), + .WCLK(clk), + .WE(\blk00000003/blk0000002b/sig00000800 ), + .SPO(\NLW_blk00000003/blk0000002b/blk0000006e_SPO_UNCONNECTED ), + .DPO(\blk00000003/blk0000002b/sig000007e0 ) + ); + RAM32X1D #( + .INIT ( 32'h00000000 )) + \blk00000003/blk0000002b/blk0000006d ( + .A0(\blk00000003/sig000001e7 ), + .A1(\blk00000003/sig000001e6 ), + .A2(\blk00000003/blk0000002b/sig000007cf ), + .A3(\blk00000003/blk0000002b/sig000007cf ), + .A4(\blk00000003/blk0000002b/sig000007cf ), + .D(din_1_1[15]), + .DPRA0(\blk00000003/sig000001dc ), + .DPRA1(\blk00000003/sig000001da ), + .DPRA2(\blk00000003/blk0000002b/sig000007cf ), + .DPRA3(\blk00000003/blk0000002b/sig000007cf ), + .DPRA4(\blk00000003/blk0000002b/sig000007cf ), + .WCLK(clk), + .WE(\blk00000003/blk0000002b/sig00000800 ), + .SPO(\NLW_blk00000003/blk0000002b/blk0000006d_SPO_UNCONNECTED ), + .DPO(\blk00000003/blk0000002b/sig000007df ) + ); + RAM32X1D #( + .INIT ( 32'h00000000 )) + \blk00000003/blk0000002b/blk0000006c ( + .A0(\blk00000003/sig000001e7 ), + .A1(\blk00000003/sig000001e6 ), + .A2(\blk00000003/blk0000002b/sig000007cf ), + .A3(\blk00000003/blk0000002b/sig000007cf ), + .A4(\blk00000003/blk0000002b/sig000007cf ), + .D(din_1_1[17]), + .DPRA0(\blk00000003/sig000001dc ), + .DPRA1(\blk00000003/sig000001da ), + .DPRA2(\blk00000003/blk0000002b/sig000007cf ), + .DPRA3(\blk00000003/blk0000002b/sig000007cf ), + .DPRA4(\blk00000003/blk0000002b/sig000007cf ), + .WCLK(clk), + .WE(\blk00000003/blk0000002b/sig00000800 ), + .SPO(\NLW_blk00000003/blk0000002b/blk0000006c_SPO_UNCONNECTED ), + .DPO(\blk00000003/blk0000002b/sig000007e1 ) + ); + RAM32X1D #( + .INIT ( 32'h00000000 )) + \blk00000003/blk0000002b/blk0000006b ( + .A0(\blk00000003/sig000001e7 ), + .A1(\blk00000003/sig000001e6 ), + .A2(\blk00000003/blk0000002b/sig000007cf ), + .A3(\blk00000003/blk0000002b/sig000007cf ), + .A4(\blk00000003/blk0000002b/sig000007cf ), + .D(din_1_1[13]), + .DPRA0(\blk00000003/sig000001dc ), + .DPRA1(\blk00000003/sig000001da ), + .DPRA2(\blk00000003/blk0000002b/sig000007cf ), + .DPRA3(\blk00000003/blk0000002b/sig000007cf ), + .DPRA4(\blk00000003/blk0000002b/sig000007cf ), + .WCLK(clk), + .WE(\blk00000003/blk0000002b/sig00000800 ), + .SPO(\NLW_blk00000003/blk0000002b/blk0000006b_SPO_UNCONNECTED ), + .DPO(\blk00000003/blk0000002b/sig000007dd ) + ); + RAM32X1D #( + .INIT ( 32'h00000000 )) + \blk00000003/blk0000002b/blk0000006a ( + .A0(\blk00000003/sig000001e7 ), + .A1(\blk00000003/sig000001e6 ), + .A2(\blk00000003/blk0000002b/sig000007cf ), + .A3(\blk00000003/blk0000002b/sig000007cf ), + .A4(\blk00000003/blk0000002b/sig000007cf ), + .D(din_1_1[12]), + .DPRA0(\blk00000003/sig000001dc ), + .DPRA1(\blk00000003/sig000001da ), + .DPRA2(\blk00000003/blk0000002b/sig000007cf ), + .DPRA3(\blk00000003/blk0000002b/sig000007cf ), + .DPRA4(\blk00000003/blk0000002b/sig000007cf ), + .WCLK(clk), + .WE(\blk00000003/blk0000002b/sig00000800 ), + .SPO(\NLW_blk00000003/blk0000002b/blk0000006a_SPO_UNCONNECTED ), + .DPO(\blk00000003/blk0000002b/sig000007dc ) + ); + RAM32X1D #( + .INIT ( 32'h00000000 )) + \blk00000003/blk0000002b/blk00000069 ( + .A0(\blk00000003/sig000001e7 ), + .A1(\blk00000003/sig000001e6 ), + .A2(\blk00000003/blk0000002b/sig000007cf ), + .A3(\blk00000003/blk0000002b/sig000007cf ), + .A4(\blk00000003/blk0000002b/sig000007cf ), + .D(din_1_1[14]), + .DPRA0(\blk00000003/sig000001dc ), + .DPRA1(\blk00000003/sig000001da ), + .DPRA2(\blk00000003/blk0000002b/sig000007cf ), + .DPRA3(\blk00000003/blk0000002b/sig000007cf ), + .DPRA4(\blk00000003/blk0000002b/sig000007cf ), + .WCLK(clk), + .WE(\blk00000003/blk0000002b/sig00000800 ), + .SPO(\NLW_blk00000003/blk0000002b/blk00000069_SPO_UNCONNECTED ), + .DPO(\blk00000003/blk0000002b/sig000007de ) + ); + RAM32X1D #( + .INIT ( 32'h00000000 )) + \blk00000003/blk0000002b/blk00000068 ( + .A0(\blk00000003/sig000001e7 ), + .A1(\blk00000003/sig000001e6 ), + .A2(\blk00000003/blk0000002b/sig000007cf ), + .A3(\blk00000003/blk0000002b/sig000007cf ), + .A4(\blk00000003/blk0000002b/sig000007cf ), + .D(din_1_1[10]), + .DPRA0(\blk00000003/sig000001dc ), + .DPRA1(\blk00000003/sig000001da ), + .DPRA2(\blk00000003/blk0000002b/sig000007cf ), + .DPRA3(\blk00000003/blk0000002b/sig000007cf ), + .DPRA4(\blk00000003/blk0000002b/sig000007cf ), + .WCLK(clk), + .WE(\blk00000003/blk0000002b/sig00000800 ), + .SPO(\NLW_blk00000003/blk0000002b/blk00000068_SPO_UNCONNECTED ), + .DPO(\blk00000003/blk0000002b/sig000007da ) + ); + RAM32X1D #( + .INIT ( 32'h00000000 )) + \blk00000003/blk0000002b/blk00000067 ( + .A0(\blk00000003/sig000001e7 ), + .A1(\blk00000003/sig000001e6 ), + .A2(\blk00000003/blk0000002b/sig000007cf ), + .A3(\blk00000003/blk0000002b/sig000007cf ), + .A4(\blk00000003/blk0000002b/sig000007cf ), + .D(din_1_1[9]), + .DPRA0(\blk00000003/sig000001dc ), + .DPRA1(\blk00000003/sig000001da ), + .DPRA2(\blk00000003/blk0000002b/sig000007cf ), + .DPRA3(\blk00000003/blk0000002b/sig000007cf ), + .DPRA4(\blk00000003/blk0000002b/sig000007cf ), + .WCLK(clk), + .WE(\blk00000003/blk0000002b/sig00000800 ), + .SPO(\NLW_blk00000003/blk0000002b/blk00000067_SPO_UNCONNECTED ), + .DPO(\blk00000003/blk0000002b/sig000007d9 ) + ); + RAM32X1D #( + .INIT ( 32'h00000000 )) + \blk00000003/blk0000002b/blk00000066 ( + .A0(\blk00000003/sig000001e7 ), + .A1(\blk00000003/sig000001e6 ), + .A2(\blk00000003/blk0000002b/sig000007cf ), + .A3(\blk00000003/blk0000002b/sig000007cf ), + .A4(\blk00000003/blk0000002b/sig000007cf ), + .D(din_1_1[11]), + .DPRA0(\blk00000003/sig000001dc ), + .DPRA1(\blk00000003/sig000001da ), + .DPRA2(\blk00000003/blk0000002b/sig000007cf ), + .DPRA3(\blk00000003/blk0000002b/sig000007cf ), + .DPRA4(\blk00000003/blk0000002b/sig000007cf ), + .WCLK(clk), + .WE(\blk00000003/blk0000002b/sig00000800 ), + .SPO(\NLW_blk00000003/blk0000002b/blk00000066_SPO_UNCONNECTED ), + .DPO(\blk00000003/blk0000002b/sig000007db ) + ); + RAM32X1D #( + .INIT ( 32'h00000000 )) + \blk00000003/blk0000002b/blk00000065 ( + .A0(\blk00000003/sig000001e7 ), + .A1(\blk00000003/sig000001e6 ), + .A2(\blk00000003/blk0000002b/sig000007cf ), + .A3(\blk00000003/blk0000002b/sig000007cf ), + .A4(\blk00000003/blk0000002b/sig000007cf ), + .D(din_1_1[7]), + .DPRA0(\blk00000003/sig000001dc ), + .DPRA1(\blk00000003/sig000001da ), + .DPRA2(\blk00000003/blk0000002b/sig000007cf ), + .DPRA3(\blk00000003/blk0000002b/sig000007cf ), + .DPRA4(\blk00000003/blk0000002b/sig000007cf ), + .WCLK(clk), + .WE(\blk00000003/blk0000002b/sig00000800 ), + .SPO(\NLW_blk00000003/blk0000002b/blk00000065_SPO_UNCONNECTED ), + .DPO(\blk00000003/blk0000002b/sig000007d7 ) + ); + RAM32X1D #( + .INIT ( 32'h00000000 )) + \blk00000003/blk0000002b/blk00000064 ( + .A0(\blk00000003/sig000001e7 ), + .A1(\blk00000003/sig000001e6 ), + .A2(\blk00000003/blk0000002b/sig000007cf ), + .A3(\blk00000003/blk0000002b/sig000007cf ), + .A4(\blk00000003/blk0000002b/sig000007cf ), + .D(din_1_1[6]), + .DPRA0(\blk00000003/sig000001dc ), + .DPRA1(\blk00000003/sig000001da ), + .DPRA2(\blk00000003/blk0000002b/sig000007cf ), + .DPRA3(\blk00000003/blk0000002b/sig000007cf ), + .DPRA4(\blk00000003/blk0000002b/sig000007cf ), + .WCLK(clk), + .WE(\blk00000003/blk0000002b/sig00000800 ), + .SPO(\NLW_blk00000003/blk0000002b/blk00000064_SPO_UNCONNECTED ), + .DPO(\blk00000003/blk0000002b/sig000007d6 ) + ); + RAM32X1D #( + .INIT ( 32'h00000000 )) + \blk00000003/blk0000002b/blk00000063 ( + .A0(\blk00000003/sig000001e7 ), + .A1(\blk00000003/sig000001e6 ), + .A2(\blk00000003/blk0000002b/sig000007cf ), + .A3(\blk00000003/blk0000002b/sig000007cf ), + .A4(\blk00000003/blk0000002b/sig000007cf ), + .D(din_1_1[8]), + .DPRA0(\blk00000003/sig000001dc ), + .DPRA1(\blk00000003/sig000001da ), + .DPRA2(\blk00000003/blk0000002b/sig000007cf ), + .DPRA3(\blk00000003/blk0000002b/sig000007cf ), + .DPRA4(\blk00000003/blk0000002b/sig000007cf ), + .WCLK(clk), + .WE(\blk00000003/blk0000002b/sig00000800 ), + .SPO(\NLW_blk00000003/blk0000002b/blk00000063_SPO_UNCONNECTED ), + .DPO(\blk00000003/blk0000002b/sig000007d8 ) + ); + RAM32X1D #( + .INIT ( 32'h00000000 )) + \blk00000003/blk0000002b/blk00000062 ( + .A0(\blk00000003/sig000001e7 ), + .A1(\blk00000003/sig000001e6 ), + .A2(\blk00000003/blk0000002b/sig000007cf ), + .A3(\blk00000003/blk0000002b/sig000007cf ), + .A4(\blk00000003/blk0000002b/sig000007cf ), + .D(din_1_1[4]), + .DPRA0(\blk00000003/sig000001dc ), + .DPRA1(\blk00000003/sig000001da ), + .DPRA2(\blk00000003/blk0000002b/sig000007cf ), + .DPRA3(\blk00000003/blk0000002b/sig000007cf ), + .DPRA4(\blk00000003/blk0000002b/sig000007cf ), + .WCLK(clk), + .WE(\blk00000003/blk0000002b/sig00000800 ), + .SPO(\NLW_blk00000003/blk0000002b/blk00000062_SPO_UNCONNECTED ), + .DPO(\blk00000003/blk0000002b/sig000007d4 ) + ); + RAM32X1D #( + .INIT ( 32'h00000000 )) + \blk00000003/blk0000002b/blk00000061 ( + .A0(\blk00000003/sig000001e7 ), + .A1(\blk00000003/sig000001e6 ), + .A2(\blk00000003/blk0000002b/sig000007cf ), + .A3(\blk00000003/blk0000002b/sig000007cf ), + .A4(\blk00000003/blk0000002b/sig000007cf ), + .D(din_1_1[3]), + .DPRA0(\blk00000003/sig000001dc ), + .DPRA1(\blk00000003/sig000001da ), + .DPRA2(\blk00000003/blk0000002b/sig000007cf ), + .DPRA3(\blk00000003/blk0000002b/sig000007cf ), + .DPRA4(\blk00000003/blk0000002b/sig000007cf ), + .WCLK(clk), + .WE(\blk00000003/blk0000002b/sig00000800 ), + .SPO(\NLW_blk00000003/blk0000002b/blk00000061_SPO_UNCONNECTED ), + .DPO(\blk00000003/blk0000002b/sig000007d3 ) + ); + RAM32X1D #( + .INIT ( 32'h00000000 )) + \blk00000003/blk0000002b/blk00000060 ( + .A0(\blk00000003/sig000001e7 ), + .A1(\blk00000003/sig000001e6 ), + .A2(\blk00000003/blk0000002b/sig000007cf ), + .A3(\blk00000003/blk0000002b/sig000007cf ), + .A4(\blk00000003/blk0000002b/sig000007cf ), + .D(din_1_1[5]), + .DPRA0(\blk00000003/sig000001dc ), + .DPRA1(\blk00000003/sig000001da ), + .DPRA2(\blk00000003/blk0000002b/sig000007cf ), + .DPRA3(\blk00000003/blk0000002b/sig000007cf ), + .DPRA4(\blk00000003/blk0000002b/sig000007cf ), + .WCLK(clk), + .WE(\blk00000003/blk0000002b/sig00000800 ), + .SPO(\NLW_blk00000003/blk0000002b/blk00000060_SPO_UNCONNECTED ), + .DPO(\blk00000003/blk0000002b/sig000007d5 ) + ); + RAM32X1D #( + .INIT ( 32'h00000000 )) + \blk00000003/blk0000002b/blk0000005f ( + .A0(\blk00000003/sig000001e7 ), + .A1(\blk00000003/sig000001e6 ), + .A2(\blk00000003/blk0000002b/sig000007cf ), + .A3(\blk00000003/blk0000002b/sig000007cf ), + .A4(\blk00000003/blk0000002b/sig000007cf ), + .D(din_1_1[1]), + .DPRA0(\blk00000003/sig000001dc ), + .DPRA1(\blk00000003/sig000001da ), + .DPRA2(\blk00000003/blk0000002b/sig000007cf ), + .DPRA3(\blk00000003/blk0000002b/sig000007cf ), + .DPRA4(\blk00000003/blk0000002b/sig000007cf ), + .WCLK(clk), + .WE(\blk00000003/blk0000002b/sig00000800 ), + .SPO(\NLW_blk00000003/blk0000002b/blk0000005f_SPO_UNCONNECTED ), + .DPO(\blk00000003/blk0000002b/sig000007d1 ) + ); + RAM32X1D #( + .INIT ( 32'h00000000 )) + \blk00000003/blk0000002b/blk0000005e ( + .A0(\blk00000003/sig000001e7 ), + .A1(\blk00000003/sig000001e6 ), + .A2(\blk00000003/blk0000002b/sig000007cf ), + .A3(\blk00000003/blk0000002b/sig000007cf ), + .A4(\blk00000003/blk0000002b/sig000007cf ), + .D(din_1_1[0]), + .DPRA0(\blk00000003/sig000001dc ), + .DPRA1(\blk00000003/sig000001da ), + .DPRA2(\blk00000003/blk0000002b/sig000007cf ), + .DPRA3(\blk00000003/blk0000002b/sig000007cf ), + .DPRA4(\blk00000003/blk0000002b/sig000007cf ), + .WCLK(clk), + .WE(\blk00000003/blk0000002b/sig00000800 ), + .SPO(\NLW_blk00000003/blk0000002b/blk0000005e_SPO_UNCONNECTED ), + .DPO(\blk00000003/blk0000002b/sig000007d0 ) + ); + RAM32X1D #( + .INIT ( 32'h00000000 )) + \blk00000003/blk0000002b/blk0000005d ( + .A0(\blk00000003/sig000001e7 ), + .A1(\blk00000003/sig000001e6 ), + .A2(\blk00000003/blk0000002b/sig000007cf ), + .A3(\blk00000003/blk0000002b/sig000007cf ), + .A4(\blk00000003/blk0000002b/sig000007cf ), + .D(din_1_1[2]), + .DPRA0(\blk00000003/sig000001dc ), + .DPRA1(\blk00000003/sig000001da ), + .DPRA2(\blk00000003/blk0000002b/sig000007cf ), + .DPRA3(\blk00000003/blk0000002b/sig000007cf ), + .DPRA4(\blk00000003/blk0000002b/sig000007cf ), + .WCLK(clk), + .WE(\blk00000003/blk0000002b/sig00000800 ), + .SPO(\NLW_blk00000003/blk0000002b/blk0000005d_SPO_UNCONNECTED ), + .DPO(\blk00000003/blk0000002b/sig000007d2 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk0000002b/blk0000005c ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk0000002b/sig000007ff ), + .Q(\blk00000003/sig000001e8 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk0000002b/blk0000005b ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk0000002b/sig000007fe ), + .Q(\blk00000003/sig000001e9 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk0000002b/blk0000005a ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk0000002b/sig000007fd ), + .Q(\blk00000003/sig000001ea ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk0000002b/blk00000059 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk0000002b/sig000007fc ), + .Q(\blk00000003/sig000001eb ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk0000002b/blk00000058 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk0000002b/sig000007fb ), + .Q(\blk00000003/sig000001ec ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk0000002b/blk00000057 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk0000002b/sig000007fa ), + .Q(\blk00000003/sig000001ed ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk0000002b/blk00000056 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk0000002b/sig000007f9 ), + .Q(\blk00000003/sig000001ee ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk0000002b/blk00000055 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk0000002b/sig000007f8 ), + .Q(\blk00000003/sig000001ef ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk0000002b/blk00000054 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk0000002b/sig000007f7 ), + .Q(\blk00000003/sig000001f0 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk0000002b/blk00000053 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk0000002b/sig000007f6 ), + .Q(\blk00000003/sig000001f1 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk0000002b/blk00000052 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk0000002b/sig000007f5 ), + .Q(\blk00000003/sig000001f2 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk0000002b/blk00000051 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk0000002b/sig000007f4 ), + .Q(\blk00000003/sig000001f3 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk0000002b/blk00000050 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk0000002b/sig000007f3 ), + .Q(\blk00000003/sig000001f4 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk0000002b/blk0000004f ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk0000002b/sig000007f2 ), + .Q(\blk00000003/sig000001f5 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk0000002b/blk0000004e ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk0000002b/sig000007f1 ), + .Q(\blk00000003/sig000001f6 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk0000002b/blk0000004d ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk0000002b/sig000007f0 ), + .Q(\blk00000003/sig000001f7 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk0000002b/blk0000004c ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk0000002b/sig000007ef ), + .Q(\blk00000003/sig000001f8 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk0000002b/blk0000004b ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk0000002b/sig000007ee ), + .Q(\blk00000003/sig000001f9 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk0000002b/blk0000004a ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk0000002b/sig000007ed ), + .Q(\blk00000003/sig000001fa ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk0000002b/blk00000049 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk0000002b/sig000007ec ), + .Q(\blk00000003/sig000001fb ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk0000002b/blk00000048 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk0000002b/sig000007eb ), + .Q(\blk00000003/sig000001fc ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk0000002b/blk00000047 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk0000002b/sig000007ea ), + .Q(\blk00000003/sig000001fd ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk0000002b/blk00000046 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk0000002b/sig000007e9 ), + .Q(\blk00000003/sig000001fe ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk0000002b/blk00000045 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk0000002b/sig000007e8 ), + .Q(\blk00000003/sig000001ff ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk0000002b/blk00000044 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk0000002b/sig000007e7 ), + .Q(\blk00000003/sig00000200 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk0000002b/blk00000043 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk0000002b/sig000007e6 ), + .Q(\blk00000003/sig00000201 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk0000002b/blk00000042 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk0000002b/sig000007e5 ), + .Q(\blk00000003/sig00000202 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk0000002b/blk00000041 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk0000002b/sig000007e4 ), + .Q(\blk00000003/sig00000203 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk0000002b/blk00000040 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk0000002b/sig000007e3 ), + .Q(\blk00000003/sig00000204 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk0000002b/blk0000003f ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk0000002b/sig000007e2 ), + .Q(\blk00000003/sig00000205 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk0000002b/blk0000003e ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk0000002b/sig000007e1 ), + .Q(\blk00000003/sig00000206 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk0000002b/blk0000003d ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk0000002b/sig000007e0 ), + .Q(\blk00000003/sig00000207 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk0000002b/blk0000003c ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk0000002b/sig000007df ), + .Q(\blk00000003/sig00000208 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk0000002b/blk0000003b ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk0000002b/sig000007de ), + .Q(\blk00000003/sig00000209 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk0000002b/blk0000003a ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk0000002b/sig000007dd ), + .Q(\blk00000003/sig0000020a ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk0000002b/blk00000039 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk0000002b/sig000007dc ), + .Q(\blk00000003/sig0000020b ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk0000002b/blk00000038 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk0000002b/sig000007db ), + .Q(\blk00000003/sig0000020c ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk0000002b/blk00000037 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk0000002b/sig000007da ), + .Q(\blk00000003/sig0000020d ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk0000002b/blk00000036 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk0000002b/sig000007d9 ), + .Q(\blk00000003/sig0000020e ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk0000002b/blk00000035 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk0000002b/sig000007d8 ), + .Q(\blk00000003/sig0000020f ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk0000002b/blk00000034 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk0000002b/sig000007d7 ), + .Q(\blk00000003/sig00000210 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk0000002b/blk00000033 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk0000002b/sig000007d6 ), + .Q(\blk00000003/sig00000211 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk0000002b/blk00000032 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk0000002b/sig000007d5 ), + .Q(\blk00000003/sig00000212 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk0000002b/blk00000031 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk0000002b/sig000007d4 ), + .Q(\blk00000003/sig00000213 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk0000002b/blk00000030 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk0000002b/sig000007d3 ), + .Q(\blk00000003/sig00000214 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk0000002b/blk0000002f ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk0000002b/sig000007d2 ), + .Q(\blk00000003/sig00000215 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk0000002b/blk0000002e ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk0000002b/sig000007d1 ), + .Q(\blk00000003/sig00000216 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk0000002b/blk0000002d ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk0000002b/sig000007d0 ), + .Q(\blk00000003/sig00000217 ) + ); + GND \blk00000003/blk0000002b/blk0000002c ( + .G(\blk00000003/blk0000002b/sig000007cf ) + ); + LUT2 #( + .INIT ( 4'h8 )) + \blk00000003/blk00000117/blk00000149 ( + .I0(ce), + .I1(\blk00000003/sig000004e6 ), + .O(\blk00000003/blk00000117/sig0000084f ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000117/blk00000148 ( + .A0(\blk00000003/sig000004f4 ), + .A1(\blk00000003/sig000004f2 ), + .A2(\blk00000003/blk00000117/sig00000836 ), + .A3(\blk00000003/blk00000117/sig00000836 ), + .CE(\blk00000003/blk00000117/sig0000084f ), + .CLK(clk), + .D(\blk00000003/sig0000047c ), + .Q(\blk00000003/blk00000117/sig0000084d ), + .Q15(\NLW_blk00000003/blk00000117/blk00000148_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000117/blk00000147 ( + .A0(\blk00000003/sig000004f4 ), + .A1(\blk00000003/sig000004f2 ), + .A2(\blk00000003/blk00000117/sig00000836 ), + .A3(\blk00000003/blk00000117/sig00000836 ), + .CE(\blk00000003/blk00000117/sig0000084f ), + .CLK(clk), + .D(\blk00000003/sig0000047d ), + .Q(\blk00000003/blk00000117/sig0000084c ), + .Q15(\NLW_blk00000003/blk00000117/blk00000147_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000117/blk00000146 ( + .A0(\blk00000003/sig000004f4 ), + .A1(\blk00000003/sig000004f2 ), + .A2(\blk00000003/blk00000117/sig00000836 ), + .A3(\blk00000003/blk00000117/sig00000836 ), + .CE(\blk00000003/blk00000117/sig0000084f ), + .CLK(clk), + .D(\blk00000003/sig0000047b ), + .Q(\blk00000003/blk00000117/sig0000084e ), + .Q15(\NLW_blk00000003/blk00000117/blk00000146_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000117/blk00000145 ( + .A0(\blk00000003/sig000004f4 ), + .A1(\blk00000003/sig000004f2 ), + .A2(\blk00000003/blk00000117/sig00000836 ), + .A3(\blk00000003/blk00000117/sig00000836 ), + .CE(\blk00000003/blk00000117/sig0000084f ), + .CLK(clk), + .D(\blk00000003/sig0000047f ), + .Q(\blk00000003/blk00000117/sig0000084a ), + .Q15(\NLW_blk00000003/blk00000117/blk00000145_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000117/blk00000144 ( + .A0(\blk00000003/sig000004f4 ), + .A1(\blk00000003/sig000004f2 ), + .A2(\blk00000003/blk00000117/sig00000836 ), + .A3(\blk00000003/blk00000117/sig00000836 ), + .CE(\blk00000003/blk00000117/sig0000084f ), + .CLK(clk), + .D(\blk00000003/sig00000480 ), + .Q(\blk00000003/blk00000117/sig00000849 ), + .Q15(\NLW_blk00000003/blk00000117/blk00000144_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000117/blk00000143 ( + .A0(\blk00000003/sig000004f4 ), + .A1(\blk00000003/sig000004f2 ), + .A2(\blk00000003/blk00000117/sig00000836 ), + .A3(\blk00000003/blk00000117/sig00000836 ), + .CE(\blk00000003/blk00000117/sig0000084f ), + .CLK(clk), + .D(\blk00000003/sig0000047e ), + .Q(\blk00000003/blk00000117/sig0000084b ), + .Q15(\NLW_blk00000003/blk00000117/blk00000143_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000117/blk00000142 ( + .A0(\blk00000003/sig000004f4 ), + .A1(\blk00000003/sig000004f2 ), + .A2(\blk00000003/blk00000117/sig00000836 ), + .A3(\blk00000003/blk00000117/sig00000836 ), + .CE(\blk00000003/blk00000117/sig0000084f ), + .CLK(clk), + .D(\blk00000003/sig00000482 ), + .Q(\blk00000003/blk00000117/sig00000847 ), + .Q15(\NLW_blk00000003/blk00000117/blk00000142_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000117/blk00000141 ( + .A0(\blk00000003/sig000004f4 ), + .A1(\blk00000003/sig000004f2 ), + .A2(\blk00000003/blk00000117/sig00000836 ), + .A3(\blk00000003/blk00000117/sig00000836 ), + .CE(\blk00000003/blk00000117/sig0000084f ), + .CLK(clk), + .D(\blk00000003/sig00000483 ), + .Q(\blk00000003/blk00000117/sig00000846 ), + .Q15(\NLW_blk00000003/blk00000117/blk00000141_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000117/blk00000140 ( + .A0(\blk00000003/sig000004f4 ), + .A1(\blk00000003/sig000004f2 ), + .A2(\blk00000003/blk00000117/sig00000836 ), + .A3(\blk00000003/blk00000117/sig00000836 ), + .CE(\blk00000003/blk00000117/sig0000084f ), + .CLK(clk), + .D(\blk00000003/sig00000481 ), + .Q(\blk00000003/blk00000117/sig00000848 ), + .Q15(\NLW_blk00000003/blk00000117/blk00000140_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000117/blk0000013f ( + .A0(\blk00000003/sig000004f4 ), + .A1(\blk00000003/sig000004f2 ), + .A2(\blk00000003/blk00000117/sig00000836 ), + .A3(\blk00000003/blk00000117/sig00000836 ), + .CE(\blk00000003/blk00000117/sig0000084f ), + .CLK(clk), + .D(\blk00000003/sig00000485 ), + .Q(\blk00000003/blk00000117/sig00000844 ), + .Q15(\NLW_blk00000003/blk00000117/blk0000013f_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000117/blk0000013e ( + .A0(\blk00000003/sig000004f4 ), + .A1(\blk00000003/sig000004f2 ), + .A2(\blk00000003/blk00000117/sig00000836 ), + .A3(\blk00000003/blk00000117/sig00000836 ), + .CE(\blk00000003/blk00000117/sig0000084f ), + .CLK(clk), + .D(\blk00000003/sig00000486 ), + .Q(\blk00000003/blk00000117/sig00000843 ), + .Q15(\NLW_blk00000003/blk00000117/blk0000013e_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000117/blk0000013d ( + .A0(\blk00000003/sig000004f4 ), + .A1(\blk00000003/sig000004f2 ), + .A2(\blk00000003/blk00000117/sig00000836 ), + .A3(\blk00000003/blk00000117/sig00000836 ), + .CE(\blk00000003/blk00000117/sig0000084f ), + .CLK(clk), + .D(\blk00000003/sig00000484 ), + .Q(\blk00000003/blk00000117/sig00000845 ), + .Q15(\NLW_blk00000003/blk00000117/blk0000013d_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000117/blk0000013c ( + .A0(\blk00000003/sig000004f4 ), + .A1(\blk00000003/sig000004f2 ), + .A2(\blk00000003/blk00000117/sig00000836 ), + .A3(\blk00000003/blk00000117/sig00000836 ), + .CE(\blk00000003/blk00000117/sig0000084f ), + .CLK(clk), + .D(\blk00000003/sig00000488 ), + .Q(\blk00000003/blk00000117/sig00000841 ), + .Q15(\NLW_blk00000003/blk00000117/blk0000013c_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000117/blk0000013b ( + .A0(\blk00000003/sig000004f4 ), + .A1(\blk00000003/sig000004f2 ), + .A2(\blk00000003/blk00000117/sig00000836 ), + .A3(\blk00000003/blk00000117/sig00000836 ), + .CE(\blk00000003/blk00000117/sig0000084f ), + .CLK(clk), + .D(\blk00000003/sig00000489 ), + .Q(\blk00000003/blk00000117/sig00000840 ), + .Q15(\NLW_blk00000003/blk00000117/blk0000013b_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000117/blk0000013a ( + .A0(\blk00000003/sig000004f4 ), + .A1(\blk00000003/sig000004f2 ), + .A2(\blk00000003/blk00000117/sig00000836 ), + .A3(\blk00000003/blk00000117/sig00000836 ), + .CE(\blk00000003/blk00000117/sig0000084f ), + .CLK(clk), + .D(\blk00000003/sig00000487 ), + .Q(\blk00000003/blk00000117/sig00000842 ), + .Q15(\NLW_blk00000003/blk00000117/blk0000013a_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000117/blk00000139 ( + .A0(\blk00000003/sig000004f4 ), + .A1(\blk00000003/sig000004f2 ), + .A2(\blk00000003/blk00000117/sig00000836 ), + .A3(\blk00000003/blk00000117/sig00000836 ), + .CE(\blk00000003/blk00000117/sig0000084f ), + .CLK(clk), + .D(\blk00000003/sig0000048b ), + .Q(\blk00000003/blk00000117/sig0000083e ), + .Q15(\NLW_blk00000003/blk00000117/blk00000139_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000117/blk00000138 ( + .A0(\blk00000003/sig000004f4 ), + .A1(\blk00000003/sig000004f2 ), + .A2(\blk00000003/blk00000117/sig00000836 ), + .A3(\blk00000003/blk00000117/sig00000836 ), + .CE(\blk00000003/blk00000117/sig0000084f ), + .CLK(clk), + .D(\blk00000003/sig0000048c ), + .Q(\blk00000003/blk00000117/sig0000083d ), + .Q15(\NLW_blk00000003/blk00000117/blk00000138_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000117/blk00000137 ( + .A0(\blk00000003/sig000004f4 ), + .A1(\blk00000003/sig000004f2 ), + .A2(\blk00000003/blk00000117/sig00000836 ), + .A3(\blk00000003/blk00000117/sig00000836 ), + .CE(\blk00000003/blk00000117/sig0000084f ), + .CLK(clk), + .D(\blk00000003/sig0000048a ), + .Q(\blk00000003/blk00000117/sig0000083f ), + .Q15(\NLW_blk00000003/blk00000117/blk00000137_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000117/blk00000136 ( + .A0(\blk00000003/sig000004f4 ), + .A1(\blk00000003/sig000004f2 ), + .A2(\blk00000003/blk00000117/sig00000836 ), + .A3(\blk00000003/blk00000117/sig00000836 ), + .CE(\blk00000003/blk00000117/sig0000084f ), + .CLK(clk), + .D(\blk00000003/sig0000048e ), + .Q(\blk00000003/blk00000117/sig0000083b ), + .Q15(\NLW_blk00000003/blk00000117/blk00000136_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000117/blk00000135 ( + .A0(\blk00000003/sig000004f4 ), + .A1(\blk00000003/sig000004f2 ), + .A2(\blk00000003/blk00000117/sig00000836 ), + .A3(\blk00000003/blk00000117/sig00000836 ), + .CE(\blk00000003/blk00000117/sig0000084f ), + .CLK(clk), + .D(\blk00000003/sig0000048f ), + .Q(\blk00000003/blk00000117/sig0000083a ), + .Q15(\NLW_blk00000003/blk00000117/blk00000135_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000117/blk00000134 ( + .A0(\blk00000003/sig000004f4 ), + .A1(\blk00000003/sig000004f2 ), + .A2(\blk00000003/blk00000117/sig00000836 ), + .A3(\blk00000003/blk00000117/sig00000836 ), + .CE(\blk00000003/blk00000117/sig0000084f ), + .CLK(clk), + .D(\blk00000003/sig0000048d ), + .Q(\blk00000003/blk00000117/sig0000083c ), + .Q15(\NLW_blk00000003/blk00000117/blk00000134_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000117/blk00000133 ( + .A0(\blk00000003/sig000004f4 ), + .A1(\blk00000003/sig000004f2 ), + .A2(\blk00000003/blk00000117/sig00000836 ), + .A3(\blk00000003/blk00000117/sig00000836 ), + .CE(\blk00000003/blk00000117/sig0000084f ), + .CLK(clk), + .D(\blk00000003/sig00000491 ), + .Q(\blk00000003/blk00000117/sig00000838 ), + .Q15(\NLW_blk00000003/blk00000117/blk00000133_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000117/blk00000132 ( + .A0(\blk00000003/sig000004f4 ), + .A1(\blk00000003/sig000004f2 ), + .A2(\blk00000003/blk00000117/sig00000836 ), + .A3(\blk00000003/blk00000117/sig00000836 ), + .CE(\blk00000003/blk00000117/sig0000084f ), + .CLK(clk), + .D(\blk00000003/sig00000492 ), + .Q(\blk00000003/blk00000117/sig00000837 ), + .Q15(\NLW_blk00000003/blk00000117/blk00000132_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000117/blk00000131 ( + .A0(\blk00000003/sig000004f4 ), + .A1(\blk00000003/sig000004f2 ), + .A2(\blk00000003/blk00000117/sig00000836 ), + .A3(\blk00000003/blk00000117/sig00000836 ), + .CE(\blk00000003/blk00000117/sig0000084f ), + .CLK(clk), + .D(\blk00000003/sig00000490 ), + .Q(\blk00000003/blk00000117/sig00000839 ), + .Q15(\NLW_blk00000003/blk00000117/blk00000131_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000117/blk00000130 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk00000117/sig0000084e ), + .Q(\blk00000003/sig000003d9 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000117/blk0000012f ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk00000117/sig0000084d ), + .Q(\blk00000003/sig000003da ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000117/blk0000012e ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk00000117/sig0000084c ), + .Q(\blk00000003/sig000003db ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000117/blk0000012d ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk00000117/sig0000084b ), + .Q(\blk00000003/sig000003dc ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000117/blk0000012c ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk00000117/sig0000084a ), + .Q(\blk00000003/sig000003dd ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000117/blk0000012b ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk00000117/sig00000849 ), + .Q(\blk00000003/sig000003de ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000117/blk0000012a ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk00000117/sig00000848 ), + .Q(\blk00000003/sig000003df ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000117/blk00000129 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk00000117/sig00000847 ), + .Q(\blk00000003/sig000003e0 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000117/blk00000128 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk00000117/sig00000846 ), + .Q(\blk00000003/sig000003e1 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000117/blk00000127 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk00000117/sig00000845 ), + .Q(\blk00000003/sig000003e2 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000117/blk00000126 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk00000117/sig00000844 ), + .Q(\blk00000003/sig000003e3 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000117/blk00000125 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk00000117/sig00000843 ), + .Q(\blk00000003/sig000003e4 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000117/blk00000124 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk00000117/sig00000842 ), + .Q(\blk00000003/sig000003e5 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000117/blk00000123 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk00000117/sig00000841 ), + .Q(\blk00000003/sig000003e6 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000117/blk00000122 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk00000117/sig00000840 ), + .Q(\blk00000003/sig000003e7 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000117/blk00000121 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk00000117/sig0000083f ), + .Q(\blk00000003/sig000003e8 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000117/blk00000120 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk00000117/sig0000083e ), + .Q(\blk00000003/sig000003e9 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000117/blk0000011f ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk00000117/sig0000083d ), + .Q(\blk00000003/sig000003ea ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000117/blk0000011e ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk00000117/sig0000083c ), + .Q(\blk00000003/sig000003eb ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000117/blk0000011d ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk00000117/sig0000083b ), + .Q(\blk00000003/sig000003ec ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000117/blk0000011c ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk00000117/sig0000083a ), + .Q(\blk00000003/sig000003ed ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000117/blk0000011b ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk00000117/sig00000839 ), + .Q(\blk00000003/sig000003ee ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000117/blk0000011a ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk00000117/sig00000838 ), + .Q(\blk00000003/sig000003ef ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000117/blk00000119 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk00000117/sig00000837 ), + .Q(\blk00000003/sig000003f0 ) + ); + GND \blk00000003/blk00000117/blk00000118 ( + .G(\blk00000003/blk00000117/sig00000836 ) + ); + LUT2 #( + .INIT ( 4'h8 )) + \blk00000003/blk0000014a/blk0000017c ( + .I0(ce), + .I1(\blk00000003/sig000004e4 ), + .O(\blk00000003/blk0000014a/sig0000089e ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk0000014a/blk0000017b ( + .A0(\blk00000003/sig000004f0 ), + .A1(\blk00000003/sig000004ee ), + .A2(\blk00000003/blk0000014a/sig00000885 ), + .A3(\blk00000003/blk0000014a/sig00000885 ), + .CE(\blk00000003/blk0000014a/sig0000089e ), + .CLK(clk), + .D(\blk00000003/sig000004f8 ), + .Q(\blk00000003/blk0000014a/sig0000089c ), + .Q15(\NLW_blk00000003/blk0000014a/blk0000017b_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk0000014a/blk0000017a ( + .A0(\blk00000003/sig000004f0 ), + .A1(\blk00000003/sig000004ee ), + .A2(\blk00000003/blk0000014a/sig00000885 ), + .A3(\blk00000003/blk0000014a/sig00000885 ), + .CE(\blk00000003/blk0000014a/sig0000089e ), + .CLK(clk), + .D(\blk00000003/sig000004f9 ), + .Q(\blk00000003/blk0000014a/sig0000089b ), + .Q15(\NLW_blk00000003/blk0000014a/blk0000017a_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk0000014a/blk00000179 ( + .A0(\blk00000003/sig000004f0 ), + .A1(\blk00000003/sig000004ee ), + .A2(\blk00000003/blk0000014a/sig00000885 ), + .A3(\blk00000003/blk0000014a/sig00000885 ), + .CE(\blk00000003/blk0000014a/sig0000089e ), + .CLK(clk), + .D(\blk00000003/sig000004f7 ), + .Q(\blk00000003/blk0000014a/sig0000089d ), + .Q15(\NLW_blk00000003/blk0000014a/blk00000179_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk0000014a/blk00000178 ( + .A0(\blk00000003/sig000004f0 ), + .A1(\blk00000003/sig000004ee ), + .A2(\blk00000003/blk0000014a/sig00000885 ), + .A3(\blk00000003/blk0000014a/sig00000885 ), + .CE(\blk00000003/blk0000014a/sig0000089e ), + .CLK(clk), + .D(\blk00000003/sig000004fb ), + .Q(\blk00000003/blk0000014a/sig00000899 ), + .Q15(\NLW_blk00000003/blk0000014a/blk00000178_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk0000014a/blk00000177 ( + .A0(\blk00000003/sig000004f0 ), + .A1(\blk00000003/sig000004ee ), + .A2(\blk00000003/blk0000014a/sig00000885 ), + .A3(\blk00000003/blk0000014a/sig00000885 ), + .CE(\blk00000003/blk0000014a/sig0000089e ), + .CLK(clk), + .D(\blk00000003/sig000004fc ), + .Q(\blk00000003/blk0000014a/sig00000898 ), + .Q15(\NLW_blk00000003/blk0000014a/blk00000177_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk0000014a/blk00000176 ( + .A0(\blk00000003/sig000004f0 ), + .A1(\blk00000003/sig000004ee ), + .A2(\blk00000003/blk0000014a/sig00000885 ), + .A3(\blk00000003/blk0000014a/sig00000885 ), + .CE(\blk00000003/blk0000014a/sig0000089e ), + .CLK(clk), + .D(\blk00000003/sig000004fa ), + .Q(\blk00000003/blk0000014a/sig0000089a ), + .Q15(\NLW_blk00000003/blk0000014a/blk00000176_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk0000014a/blk00000175 ( + .A0(\blk00000003/sig000004f0 ), + .A1(\blk00000003/sig000004ee ), + .A2(\blk00000003/blk0000014a/sig00000885 ), + .A3(\blk00000003/blk0000014a/sig00000885 ), + .CE(\blk00000003/blk0000014a/sig0000089e ), + .CLK(clk), + .D(\blk00000003/sig000004fe ), + .Q(\blk00000003/blk0000014a/sig00000896 ), + .Q15(\NLW_blk00000003/blk0000014a/blk00000175_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk0000014a/blk00000174 ( + .A0(\blk00000003/sig000004f0 ), + .A1(\blk00000003/sig000004ee ), + .A2(\blk00000003/blk0000014a/sig00000885 ), + .A3(\blk00000003/blk0000014a/sig00000885 ), + .CE(\blk00000003/blk0000014a/sig0000089e ), + .CLK(clk), + .D(\blk00000003/sig000004ff ), + .Q(\blk00000003/blk0000014a/sig00000895 ), + .Q15(\NLW_blk00000003/blk0000014a/blk00000174_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk0000014a/blk00000173 ( + .A0(\blk00000003/sig000004f0 ), + .A1(\blk00000003/sig000004ee ), + .A2(\blk00000003/blk0000014a/sig00000885 ), + .A3(\blk00000003/blk0000014a/sig00000885 ), + .CE(\blk00000003/blk0000014a/sig0000089e ), + .CLK(clk), + .D(\blk00000003/sig000004fd ), + .Q(\blk00000003/blk0000014a/sig00000897 ), + .Q15(\NLW_blk00000003/blk0000014a/blk00000173_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk0000014a/blk00000172 ( + .A0(\blk00000003/sig000004f0 ), + .A1(\blk00000003/sig000004ee ), + .A2(\blk00000003/blk0000014a/sig00000885 ), + .A3(\blk00000003/blk0000014a/sig00000885 ), + .CE(\blk00000003/blk0000014a/sig0000089e ), + .CLK(clk), + .D(\blk00000003/sig00000501 ), + .Q(\blk00000003/blk0000014a/sig00000893 ), + .Q15(\NLW_blk00000003/blk0000014a/blk00000172_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk0000014a/blk00000171 ( + .A0(\blk00000003/sig000004f0 ), + .A1(\blk00000003/sig000004ee ), + .A2(\blk00000003/blk0000014a/sig00000885 ), + .A3(\blk00000003/blk0000014a/sig00000885 ), + .CE(\blk00000003/blk0000014a/sig0000089e ), + .CLK(clk), + .D(\blk00000003/sig00000502 ), + .Q(\blk00000003/blk0000014a/sig00000892 ), + .Q15(\NLW_blk00000003/blk0000014a/blk00000171_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk0000014a/blk00000170 ( + .A0(\blk00000003/sig000004f0 ), + .A1(\blk00000003/sig000004ee ), + .A2(\blk00000003/blk0000014a/sig00000885 ), + .A3(\blk00000003/blk0000014a/sig00000885 ), + .CE(\blk00000003/blk0000014a/sig0000089e ), + .CLK(clk), + .D(\blk00000003/sig00000500 ), + .Q(\blk00000003/blk0000014a/sig00000894 ), + .Q15(\NLW_blk00000003/blk0000014a/blk00000170_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk0000014a/blk0000016f ( + .A0(\blk00000003/sig000004f0 ), + .A1(\blk00000003/sig000004ee ), + .A2(\blk00000003/blk0000014a/sig00000885 ), + .A3(\blk00000003/blk0000014a/sig00000885 ), + .CE(\blk00000003/blk0000014a/sig0000089e ), + .CLK(clk), + .D(\blk00000003/sig00000504 ), + .Q(\blk00000003/blk0000014a/sig00000890 ), + .Q15(\NLW_blk00000003/blk0000014a/blk0000016f_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk0000014a/blk0000016e ( + .A0(\blk00000003/sig000004f0 ), + .A1(\blk00000003/sig000004ee ), + .A2(\blk00000003/blk0000014a/sig00000885 ), + .A3(\blk00000003/blk0000014a/sig00000885 ), + .CE(\blk00000003/blk0000014a/sig0000089e ), + .CLK(clk), + .D(\blk00000003/sig00000505 ), + .Q(\blk00000003/blk0000014a/sig0000088f ), + .Q15(\NLW_blk00000003/blk0000014a/blk0000016e_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk0000014a/blk0000016d ( + .A0(\blk00000003/sig000004f0 ), + .A1(\blk00000003/sig000004ee ), + .A2(\blk00000003/blk0000014a/sig00000885 ), + .A3(\blk00000003/blk0000014a/sig00000885 ), + .CE(\blk00000003/blk0000014a/sig0000089e ), + .CLK(clk), + .D(\blk00000003/sig00000503 ), + .Q(\blk00000003/blk0000014a/sig00000891 ), + .Q15(\NLW_blk00000003/blk0000014a/blk0000016d_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk0000014a/blk0000016c ( + .A0(\blk00000003/sig000004f0 ), + .A1(\blk00000003/sig000004ee ), + .A2(\blk00000003/blk0000014a/sig00000885 ), + .A3(\blk00000003/blk0000014a/sig00000885 ), + .CE(\blk00000003/blk0000014a/sig0000089e ), + .CLK(clk), + .D(\blk00000003/sig00000507 ), + .Q(\blk00000003/blk0000014a/sig0000088d ), + .Q15(\NLW_blk00000003/blk0000014a/blk0000016c_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk0000014a/blk0000016b ( + .A0(\blk00000003/sig000004f0 ), + .A1(\blk00000003/sig000004ee ), + .A2(\blk00000003/blk0000014a/sig00000885 ), + .A3(\blk00000003/blk0000014a/sig00000885 ), + .CE(\blk00000003/blk0000014a/sig0000089e ), + .CLK(clk), + .D(\blk00000003/sig00000508 ), + .Q(\blk00000003/blk0000014a/sig0000088c ), + .Q15(\NLW_blk00000003/blk0000014a/blk0000016b_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk0000014a/blk0000016a ( + .A0(\blk00000003/sig000004f0 ), + .A1(\blk00000003/sig000004ee ), + .A2(\blk00000003/blk0000014a/sig00000885 ), + .A3(\blk00000003/blk0000014a/sig00000885 ), + .CE(\blk00000003/blk0000014a/sig0000089e ), + .CLK(clk), + .D(\blk00000003/sig00000506 ), + .Q(\blk00000003/blk0000014a/sig0000088e ), + .Q15(\NLW_blk00000003/blk0000014a/blk0000016a_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk0000014a/blk00000169 ( + .A0(\blk00000003/sig000004f0 ), + .A1(\blk00000003/sig000004ee ), + .A2(\blk00000003/blk0000014a/sig00000885 ), + .A3(\blk00000003/blk0000014a/sig00000885 ), + .CE(\blk00000003/blk0000014a/sig0000089e ), + .CLK(clk), + .D(\blk00000003/sig0000050a ), + .Q(\blk00000003/blk0000014a/sig0000088a ), + .Q15(\NLW_blk00000003/blk0000014a/blk00000169_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk0000014a/blk00000168 ( + .A0(\blk00000003/sig000004f0 ), + .A1(\blk00000003/sig000004ee ), + .A2(\blk00000003/blk0000014a/sig00000885 ), + .A3(\blk00000003/blk0000014a/sig00000885 ), + .CE(\blk00000003/blk0000014a/sig0000089e ), + .CLK(clk), + .D(\blk00000003/sig0000050b ), + .Q(\blk00000003/blk0000014a/sig00000889 ), + .Q15(\NLW_blk00000003/blk0000014a/blk00000168_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk0000014a/blk00000167 ( + .A0(\blk00000003/sig000004f0 ), + .A1(\blk00000003/sig000004ee ), + .A2(\blk00000003/blk0000014a/sig00000885 ), + .A3(\blk00000003/blk0000014a/sig00000885 ), + .CE(\blk00000003/blk0000014a/sig0000089e ), + .CLK(clk), + .D(\blk00000003/sig00000509 ), + .Q(\blk00000003/blk0000014a/sig0000088b ), + .Q15(\NLW_blk00000003/blk0000014a/blk00000167_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk0000014a/blk00000166 ( + .A0(\blk00000003/sig000004f0 ), + .A1(\blk00000003/sig000004ee ), + .A2(\blk00000003/blk0000014a/sig00000885 ), + .A3(\blk00000003/blk0000014a/sig00000885 ), + .CE(\blk00000003/blk0000014a/sig0000089e ), + .CLK(clk), + .D(\blk00000003/sig0000050d ), + .Q(\blk00000003/blk0000014a/sig00000887 ), + .Q15(\NLW_blk00000003/blk0000014a/blk00000166_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk0000014a/blk00000165 ( + .A0(\blk00000003/sig000004f0 ), + .A1(\blk00000003/sig000004ee ), + .A2(\blk00000003/blk0000014a/sig00000885 ), + .A3(\blk00000003/blk0000014a/sig00000885 ), + .CE(\blk00000003/blk0000014a/sig0000089e ), + .CLK(clk), + .D(\blk00000003/sig0000050e ), + .Q(\blk00000003/blk0000014a/sig00000886 ), + .Q15(\NLW_blk00000003/blk0000014a/blk00000165_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk0000014a/blk00000164 ( + .A0(\blk00000003/sig000004f0 ), + .A1(\blk00000003/sig000004ee ), + .A2(\blk00000003/blk0000014a/sig00000885 ), + .A3(\blk00000003/blk0000014a/sig00000885 ), + .CE(\blk00000003/blk0000014a/sig0000089e ), + .CLK(clk), + .D(\blk00000003/sig0000050c ), + .Q(\blk00000003/blk0000014a/sig00000888 ), + .Q15(\NLW_blk00000003/blk0000014a/blk00000164_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk0000014a/blk00000163 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk0000014a/sig0000089d ), + .Q(\blk00000003/sig000003f1 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk0000014a/blk00000162 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk0000014a/sig0000089c ), + .Q(\blk00000003/sig000003f2 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk0000014a/blk00000161 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk0000014a/sig0000089b ), + .Q(\blk00000003/sig000003f3 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk0000014a/blk00000160 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk0000014a/sig0000089a ), + .Q(\blk00000003/sig000003f4 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk0000014a/blk0000015f ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk0000014a/sig00000899 ), + .Q(\blk00000003/sig000003f5 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk0000014a/blk0000015e ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk0000014a/sig00000898 ), + .Q(\blk00000003/sig000003f6 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk0000014a/blk0000015d ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk0000014a/sig00000897 ), + .Q(\blk00000003/sig000003f7 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk0000014a/blk0000015c ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk0000014a/sig00000896 ), + .Q(\blk00000003/sig000003f8 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk0000014a/blk0000015b ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk0000014a/sig00000895 ), + .Q(\blk00000003/sig000003f9 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk0000014a/blk0000015a ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk0000014a/sig00000894 ), + .Q(\blk00000003/sig000003fa ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk0000014a/blk00000159 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk0000014a/sig00000893 ), + .Q(\blk00000003/sig000003fb ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk0000014a/blk00000158 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk0000014a/sig00000892 ), + .Q(\blk00000003/sig000003fc ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk0000014a/blk00000157 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk0000014a/sig00000891 ), + .Q(\blk00000003/sig000003fd ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk0000014a/blk00000156 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk0000014a/sig00000890 ), + .Q(\blk00000003/sig000003fe ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk0000014a/blk00000155 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk0000014a/sig0000088f ), + .Q(\blk00000003/sig000003ff ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk0000014a/blk00000154 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk0000014a/sig0000088e ), + .Q(\blk00000003/sig00000400 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk0000014a/blk00000153 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk0000014a/sig0000088d ), + .Q(\blk00000003/sig00000401 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk0000014a/blk00000152 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk0000014a/sig0000088c ), + .Q(\blk00000003/sig00000402 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk0000014a/blk00000151 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk0000014a/sig0000088b ), + .Q(\blk00000003/sig00000403 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk0000014a/blk00000150 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk0000014a/sig0000088a ), + .Q(\blk00000003/sig00000404 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk0000014a/blk0000014f ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk0000014a/sig00000889 ), + .Q(\blk00000003/sig00000405 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk0000014a/blk0000014e ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk0000014a/sig00000888 ), + .Q(\blk00000003/sig00000406 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk0000014a/blk0000014d ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk0000014a/sig00000887 ), + .Q(\blk00000003/sig00000407 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk0000014a/blk0000014c ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk0000014a/sig00000886 ), + .Q(\blk00000003/sig00000408 ) + ); + GND \blk00000003/blk0000014a/blk0000014b ( + .G(\blk00000003/blk0000014a/sig00000885 ) + ); + LUT2 #( + .INIT ( 4'h8 )) + \blk00000003/blk0000017d/blk000001af ( + .I0(ce), + .I1(\blk00000003/sig000004e6 ), + .O(\blk00000003/blk0000017d/sig000008ed ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk0000017d/blk000001ae ( + .A0(\blk00000003/sig000004f4 ), + .A1(\blk00000003/sig000004f2 ), + .A2(\blk00000003/blk0000017d/sig000008d4 ), + .A3(\blk00000003/blk0000017d/sig000008d4 ), + .CE(\blk00000003/blk0000017d/sig000008ed ), + .CLK(clk), + .D(\blk00000003/sig000004ac ), + .Q(\blk00000003/blk0000017d/sig000008eb ), + .Q15(\NLW_blk00000003/blk0000017d/blk000001ae_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk0000017d/blk000001ad ( + .A0(\blk00000003/sig000004f4 ), + .A1(\blk00000003/sig000004f2 ), + .A2(\blk00000003/blk0000017d/sig000008d4 ), + .A3(\blk00000003/blk0000017d/sig000008d4 ), + .CE(\blk00000003/blk0000017d/sig000008ed ), + .CLK(clk), + .D(\blk00000003/sig000004ad ), + .Q(\blk00000003/blk0000017d/sig000008ea ), + .Q15(\NLW_blk00000003/blk0000017d/blk000001ad_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk0000017d/blk000001ac ( + .A0(\blk00000003/sig000004f4 ), + .A1(\blk00000003/sig000004f2 ), + .A2(\blk00000003/blk0000017d/sig000008d4 ), + .A3(\blk00000003/blk0000017d/sig000008d4 ), + .CE(\blk00000003/blk0000017d/sig000008ed ), + .CLK(clk), + .D(\blk00000003/sig000004ab ), + .Q(\blk00000003/blk0000017d/sig000008ec ), + .Q15(\NLW_blk00000003/blk0000017d/blk000001ac_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk0000017d/blk000001ab ( + .A0(\blk00000003/sig000004f4 ), + .A1(\blk00000003/sig000004f2 ), + .A2(\blk00000003/blk0000017d/sig000008d4 ), + .A3(\blk00000003/blk0000017d/sig000008d4 ), + .CE(\blk00000003/blk0000017d/sig000008ed ), + .CLK(clk), + .D(\blk00000003/sig000004af ), + .Q(\blk00000003/blk0000017d/sig000008e8 ), + .Q15(\NLW_blk00000003/blk0000017d/blk000001ab_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk0000017d/blk000001aa ( + .A0(\blk00000003/sig000004f4 ), + .A1(\blk00000003/sig000004f2 ), + .A2(\blk00000003/blk0000017d/sig000008d4 ), + .A3(\blk00000003/blk0000017d/sig000008d4 ), + .CE(\blk00000003/blk0000017d/sig000008ed ), + .CLK(clk), + .D(\blk00000003/sig000004b0 ), + .Q(\blk00000003/blk0000017d/sig000008e7 ), + .Q15(\NLW_blk00000003/blk0000017d/blk000001aa_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk0000017d/blk000001a9 ( + .A0(\blk00000003/sig000004f4 ), + .A1(\blk00000003/sig000004f2 ), + .A2(\blk00000003/blk0000017d/sig000008d4 ), + .A3(\blk00000003/blk0000017d/sig000008d4 ), + .CE(\blk00000003/blk0000017d/sig000008ed ), + .CLK(clk), + .D(\blk00000003/sig000004ae ), + .Q(\blk00000003/blk0000017d/sig000008e9 ), + .Q15(\NLW_blk00000003/blk0000017d/blk000001a9_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk0000017d/blk000001a8 ( + .A0(\blk00000003/sig000004f4 ), + .A1(\blk00000003/sig000004f2 ), + .A2(\blk00000003/blk0000017d/sig000008d4 ), + .A3(\blk00000003/blk0000017d/sig000008d4 ), + .CE(\blk00000003/blk0000017d/sig000008ed ), + .CLK(clk), + .D(\blk00000003/sig000004b2 ), + .Q(\blk00000003/blk0000017d/sig000008e5 ), + .Q15(\NLW_blk00000003/blk0000017d/blk000001a8_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk0000017d/blk000001a7 ( + .A0(\blk00000003/sig000004f4 ), + .A1(\blk00000003/sig000004f2 ), + .A2(\blk00000003/blk0000017d/sig000008d4 ), + .A3(\blk00000003/blk0000017d/sig000008d4 ), + .CE(\blk00000003/blk0000017d/sig000008ed ), + .CLK(clk), + .D(\blk00000003/sig000004b3 ), + .Q(\blk00000003/blk0000017d/sig000008e4 ), + .Q15(\NLW_blk00000003/blk0000017d/blk000001a7_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk0000017d/blk000001a6 ( + .A0(\blk00000003/sig000004f4 ), + .A1(\blk00000003/sig000004f2 ), + .A2(\blk00000003/blk0000017d/sig000008d4 ), + .A3(\blk00000003/blk0000017d/sig000008d4 ), + .CE(\blk00000003/blk0000017d/sig000008ed ), + .CLK(clk), + .D(\blk00000003/sig000004b1 ), + .Q(\blk00000003/blk0000017d/sig000008e6 ), + .Q15(\NLW_blk00000003/blk0000017d/blk000001a6_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk0000017d/blk000001a5 ( + .A0(\blk00000003/sig000004f4 ), + .A1(\blk00000003/sig000004f2 ), + .A2(\blk00000003/blk0000017d/sig000008d4 ), + .A3(\blk00000003/blk0000017d/sig000008d4 ), + .CE(\blk00000003/blk0000017d/sig000008ed ), + .CLK(clk), + .D(\blk00000003/sig000004b5 ), + .Q(\blk00000003/blk0000017d/sig000008e2 ), + .Q15(\NLW_blk00000003/blk0000017d/blk000001a5_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk0000017d/blk000001a4 ( + .A0(\blk00000003/sig000004f4 ), + .A1(\blk00000003/sig000004f2 ), + .A2(\blk00000003/blk0000017d/sig000008d4 ), + .A3(\blk00000003/blk0000017d/sig000008d4 ), + .CE(\blk00000003/blk0000017d/sig000008ed ), + .CLK(clk), + .D(\blk00000003/sig000004b6 ), + .Q(\blk00000003/blk0000017d/sig000008e1 ), + .Q15(\NLW_blk00000003/blk0000017d/blk000001a4_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk0000017d/blk000001a3 ( + .A0(\blk00000003/sig000004f4 ), + .A1(\blk00000003/sig000004f2 ), + .A2(\blk00000003/blk0000017d/sig000008d4 ), + .A3(\blk00000003/blk0000017d/sig000008d4 ), + .CE(\blk00000003/blk0000017d/sig000008ed ), + .CLK(clk), + .D(\blk00000003/sig000004b4 ), + .Q(\blk00000003/blk0000017d/sig000008e3 ), + .Q15(\NLW_blk00000003/blk0000017d/blk000001a3_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk0000017d/blk000001a2 ( + .A0(\blk00000003/sig000004f4 ), + .A1(\blk00000003/sig000004f2 ), + .A2(\blk00000003/blk0000017d/sig000008d4 ), + .A3(\blk00000003/blk0000017d/sig000008d4 ), + .CE(\blk00000003/blk0000017d/sig000008ed ), + .CLK(clk), + .D(\blk00000003/sig000004b8 ), + .Q(\blk00000003/blk0000017d/sig000008df ), + .Q15(\NLW_blk00000003/blk0000017d/blk000001a2_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk0000017d/blk000001a1 ( + .A0(\blk00000003/sig000004f4 ), + .A1(\blk00000003/sig000004f2 ), + .A2(\blk00000003/blk0000017d/sig000008d4 ), + .A3(\blk00000003/blk0000017d/sig000008d4 ), + .CE(\blk00000003/blk0000017d/sig000008ed ), + .CLK(clk), + .D(\blk00000003/sig000004b9 ), + .Q(\blk00000003/blk0000017d/sig000008de ), + .Q15(\NLW_blk00000003/blk0000017d/blk000001a1_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk0000017d/blk000001a0 ( + .A0(\blk00000003/sig000004f4 ), + .A1(\blk00000003/sig000004f2 ), + .A2(\blk00000003/blk0000017d/sig000008d4 ), + .A3(\blk00000003/blk0000017d/sig000008d4 ), + .CE(\blk00000003/blk0000017d/sig000008ed ), + .CLK(clk), + .D(\blk00000003/sig000004b7 ), + .Q(\blk00000003/blk0000017d/sig000008e0 ), + .Q15(\NLW_blk00000003/blk0000017d/blk000001a0_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk0000017d/blk0000019f ( + .A0(\blk00000003/sig000004f4 ), + .A1(\blk00000003/sig000004f2 ), + .A2(\blk00000003/blk0000017d/sig000008d4 ), + .A3(\blk00000003/blk0000017d/sig000008d4 ), + .CE(\blk00000003/blk0000017d/sig000008ed ), + .CLK(clk), + .D(\blk00000003/sig000004bb ), + .Q(\blk00000003/blk0000017d/sig000008dc ), + .Q15(\NLW_blk00000003/blk0000017d/blk0000019f_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk0000017d/blk0000019e ( + .A0(\blk00000003/sig000004f4 ), + .A1(\blk00000003/sig000004f2 ), + .A2(\blk00000003/blk0000017d/sig000008d4 ), + .A3(\blk00000003/blk0000017d/sig000008d4 ), + .CE(\blk00000003/blk0000017d/sig000008ed ), + .CLK(clk), + .D(\blk00000003/sig000004bc ), + .Q(\blk00000003/blk0000017d/sig000008db ), + .Q15(\NLW_blk00000003/blk0000017d/blk0000019e_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk0000017d/blk0000019d ( + .A0(\blk00000003/sig000004f4 ), + .A1(\blk00000003/sig000004f2 ), + .A2(\blk00000003/blk0000017d/sig000008d4 ), + .A3(\blk00000003/blk0000017d/sig000008d4 ), + .CE(\blk00000003/blk0000017d/sig000008ed ), + .CLK(clk), + .D(\blk00000003/sig000004ba ), + .Q(\blk00000003/blk0000017d/sig000008dd ), + .Q15(\NLW_blk00000003/blk0000017d/blk0000019d_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk0000017d/blk0000019c ( + .A0(\blk00000003/sig000004f4 ), + .A1(\blk00000003/sig000004f2 ), + .A2(\blk00000003/blk0000017d/sig000008d4 ), + .A3(\blk00000003/blk0000017d/sig000008d4 ), + .CE(\blk00000003/blk0000017d/sig000008ed ), + .CLK(clk), + .D(\blk00000003/sig000004be ), + .Q(\blk00000003/blk0000017d/sig000008d9 ), + .Q15(\NLW_blk00000003/blk0000017d/blk0000019c_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk0000017d/blk0000019b ( + .A0(\blk00000003/sig000004f4 ), + .A1(\blk00000003/sig000004f2 ), + .A2(\blk00000003/blk0000017d/sig000008d4 ), + .A3(\blk00000003/blk0000017d/sig000008d4 ), + .CE(\blk00000003/blk0000017d/sig000008ed ), + .CLK(clk), + .D(\blk00000003/sig000004bf ), + .Q(\blk00000003/blk0000017d/sig000008d8 ), + .Q15(\NLW_blk00000003/blk0000017d/blk0000019b_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk0000017d/blk0000019a ( + .A0(\blk00000003/sig000004f4 ), + .A1(\blk00000003/sig000004f2 ), + .A2(\blk00000003/blk0000017d/sig000008d4 ), + .A3(\blk00000003/blk0000017d/sig000008d4 ), + .CE(\blk00000003/blk0000017d/sig000008ed ), + .CLK(clk), + .D(\blk00000003/sig000004bd ), + .Q(\blk00000003/blk0000017d/sig000008da ), + .Q15(\NLW_blk00000003/blk0000017d/blk0000019a_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk0000017d/blk00000199 ( + .A0(\blk00000003/sig000004f4 ), + .A1(\blk00000003/sig000004f2 ), + .A2(\blk00000003/blk0000017d/sig000008d4 ), + .A3(\blk00000003/blk0000017d/sig000008d4 ), + .CE(\blk00000003/blk0000017d/sig000008ed ), + .CLK(clk), + .D(\blk00000003/sig000004c1 ), + .Q(\blk00000003/blk0000017d/sig000008d6 ), + .Q15(\NLW_blk00000003/blk0000017d/blk00000199_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk0000017d/blk00000198 ( + .A0(\blk00000003/sig000004f4 ), + .A1(\blk00000003/sig000004f2 ), + .A2(\blk00000003/blk0000017d/sig000008d4 ), + .A3(\blk00000003/blk0000017d/sig000008d4 ), + .CE(\blk00000003/blk0000017d/sig000008ed ), + .CLK(clk), + .D(\blk00000003/sig000004c2 ), + .Q(\blk00000003/blk0000017d/sig000008d5 ), + .Q15(\NLW_blk00000003/blk0000017d/blk00000198_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk0000017d/blk00000197 ( + .A0(\blk00000003/sig000004f4 ), + .A1(\blk00000003/sig000004f2 ), + .A2(\blk00000003/blk0000017d/sig000008d4 ), + .A3(\blk00000003/blk0000017d/sig000008d4 ), + .CE(\blk00000003/blk0000017d/sig000008ed ), + .CLK(clk), + .D(\blk00000003/sig000004c0 ), + .Q(\blk00000003/blk0000017d/sig000008d7 ), + .Q15(\NLW_blk00000003/blk0000017d/blk00000197_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk0000017d/blk00000196 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk0000017d/sig000008ec ), + .Q(\blk00000003/sig00000439 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk0000017d/blk00000195 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk0000017d/sig000008eb ), + .Q(\blk00000003/sig0000043a ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk0000017d/blk00000194 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk0000017d/sig000008ea ), + .Q(\blk00000003/sig0000043b ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk0000017d/blk00000193 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk0000017d/sig000008e9 ), + .Q(\blk00000003/sig0000043c ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk0000017d/blk00000192 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk0000017d/sig000008e8 ), + .Q(\blk00000003/sig0000043d ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk0000017d/blk00000191 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk0000017d/sig000008e7 ), + .Q(\blk00000003/sig0000043e ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk0000017d/blk00000190 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk0000017d/sig000008e6 ), + .Q(\blk00000003/sig0000043f ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk0000017d/blk0000018f ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk0000017d/sig000008e5 ), + .Q(\blk00000003/sig00000440 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk0000017d/blk0000018e ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk0000017d/sig000008e4 ), + .Q(\blk00000003/sig00000441 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk0000017d/blk0000018d ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk0000017d/sig000008e3 ), + .Q(\blk00000003/sig00000442 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk0000017d/blk0000018c ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk0000017d/sig000008e2 ), + .Q(\blk00000003/sig00000443 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk0000017d/blk0000018b ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk0000017d/sig000008e1 ), + .Q(\blk00000003/sig00000444 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk0000017d/blk0000018a ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk0000017d/sig000008e0 ), + .Q(\blk00000003/sig00000445 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk0000017d/blk00000189 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk0000017d/sig000008df ), + .Q(\blk00000003/sig00000446 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk0000017d/blk00000188 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk0000017d/sig000008de ), + .Q(\blk00000003/sig00000447 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk0000017d/blk00000187 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk0000017d/sig000008dd ), + .Q(\blk00000003/sig00000448 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk0000017d/blk00000186 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk0000017d/sig000008dc ), + .Q(\blk00000003/sig00000449 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk0000017d/blk00000185 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk0000017d/sig000008db ), + .Q(\blk00000003/sig0000044a ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk0000017d/blk00000184 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk0000017d/sig000008da ), + .Q(\blk00000003/sig0000044b ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk0000017d/blk00000183 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk0000017d/sig000008d9 ), + .Q(\blk00000003/sig0000044c ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk0000017d/blk00000182 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk0000017d/sig000008d8 ), + .Q(\blk00000003/sig0000044d ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk0000017d/blk00000181 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk0000017d/sig000008d7 ), + .Q(\blk00000003/sig0000044e ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk0000017d/blk00000180 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk0000017d/sig000008d6 ), + .Q(\blk00000003/sig0000044f ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk0000017d/blk0000017f ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk0000017d/sig000008d5 ), + .Q(\blk00000003/sig00000450 ) + ); + GND \blk00000003/blk0000017d/blk0000017e ( + .G(\blk00000003/blk0000017d/sig000008d4 ) + ); + LUT2 #( + .INIT ( 4'h8 )) + \blk00000003/blk000001b0/blk000001e2 ( + .I0(ce), + .I1(\blk00000003/sig000004e4 ), + .O(\blk00000003/blk000001b0/sig0000093c ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk000001b0/blk000001e1 ( + .A0(\blk00000003/sig000004f0 ), + .A1(\blk00000003/sig000004ee ), + .A2(\blk00000003/blk000001b0/sig00000923 ), + .A3(\blk00000003/blk000001b0/sig00000923 ), + .CE(\blk00000003/blk000001b0/sig0000093c ), + .CLK(clk), + .D(\blk00000003/sig00000510 ), + .Q(\blk00000003/blk000001b0/sig0000093a ), + .Q15(\NLW_blk00000003/blk000001b0/blk000001e1_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk000001b0/blk000001e0 ( + .A0(\blk00000003/sig000004f0 ), + .A1(\blk00000003/sig000004ee ), + .A2(\blk00000003/blk000001b0/sig00000923 ), + .A3(\blk00000003/blk000001b0/sig00000923 ), + .CE(\blk00000003/blk000001b0/sig0000093c ), + .CLK(clk), + .D(\blk00000003/sig00000511 ), + .Q(\blk00000003/blk000001b0/sig00000939 ), + .Q15(\NLW_blk00000003/blk000001b0/blk000001e0_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk000001b0/blk000001df ( + .A0(\blk00000003/sig000004f0 ), + .A1(\blk00000003/sig000004ee ), + .A2(\blk00000003/blk000001b0/sig00000923 ), + .A3(\blk00000003/blk000001b0/sig00000923 ), + .CE(\blk00000003/blk000001b0/sig0000093c ), + .CLK(clk), + .D(\blk00000003/sig0000050f ), + .Q(\blk00000003/blk000001b0/sig0000093b ), + .Q15(\NLW_blk00000003/blk000001b0/blk000001df_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk000001b0/blk000001de ( + .A0(\blk00000003/sig000004f0 ), + .A1(\blk00000003/sig000004ee ), + .A2(\blk00000003/blk000001b0/sig00000923 ), + .A3(\blk00000003/blk000001b0/sig00000923 ), + .CE(\blk00000003/blk000001b0/sig0000093c ), + .CLK(clk), + .D(\blk00000003/sig00000513 ), + .Q(\blk00000003/blk000001b0/sig00000937 ), + .Q15(\NLW_blk00000003/blk000001b0/blk000001de_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk000001b0/blk000001dd ( + .A0(\blk00000003/sig000004f0 ), + .A1(\blk00000003/sig000004ee ), + .A2(\blk00000003/blk000001b0/sig00000923 ), + .A3(\blk00000003/blk000001b0/sig00000923 ), + .CE(\blk00000003/blk000001b0/sig0000093c ), + .CLK(clk), + .D(\blk00000003/sig00000514 ), + .Q(\blk00000003/blk000001b0/sig00000936 ), + .Q15(\NLW_blk00000003/blk000001b0/blk000001dd_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk000001b0/blk000001dc ( + .A0(\blk00000003/sig000004f0 ), + .A1(\blk00000003/sig000004ee ), + .A2(\blk00000003/blk000001b0/sig00000923 ), + .A3(\blk00000003/blk000001b0/sig00000923 ), + .CE(\blk00000003/blk000001b0/sig0000093c ), + .CLK(clk), + .D(\blk00000003/sig00000512 ), + .Q(\blk00000003/blk000001b0/sig00000938 ), + .Q15(\NLW_blk00000003/blk000001b0/blk000001dc_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk000001b0/blk000001db ( + .A0(\blk00000003/sig000004f0 ), + .A1(\blk00000003/sig000004ee ), + .A2(\blk00000003/blk000001b0/sig00000923 ), + .A3(\blk00000003/blk000001b0/sig00000923 ), + .CE(\blk00000003/blk000001b0/sig0000093c ), + .CLK(clk), + .D(\blk00000003/sig00000516 ), + .Q(\blk00000003/blk000001b0/sig00000934 ), + .Q15(\NLW_blk00000003/blk000001b0/blk000001db_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk000001b0/blk000001da ( + .A0(\blk00000003/sig000004f0 ), + .A1(\blk00000003/sig000004ee ), + .A2(\blk00000003/blk000001b0/sig00000923 ), + .A3(\blk00000003/blk000001b0/sig00000923 ), + .CE(\blk00000003/blk000001b0/sig0000093c ), + .CLK(clk), + .D(\blk00000003/sig00000517 ), + .Q(\blk00000003/blk000001b0/sig00000933 ), + .Q15(\NLW_blk00000003/blk000001b0/blk000001da_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk000001b0/blk000001d9 ( + .A0(\blk00000003/sig000004f0 ), + .A1(\blk00000003/sig000004ee ), + .A2(\blk00000003/blk000001b0/sig00000923 ), + .A3(\blk00000003/blk000001b0/sig00000923 ), + .CE(\blk00000003/blk000001b0/sig0000093c ), + .CLK(clk), + .D(\blk00000003/sig00000515 ), + .Q(\blk00000003/blk000001b0/sig00000935 ), + .Q15(\NLW_blk00000003/blk000001b0/blk000001d9_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk000001b0/blk000001d8 ( + .A0(\blk00000003/sig000004f0 ), + .A1(\blk00000003/sig000004ee ), + .A2(\blk00000003/blk000001b0/sig00000923 ), + .A3(\blk00000003/blk000001b0/sig00000923 ), + .CE(\blk00000003/blk000001b0/sig0000093c ), + .CLK(clk), + .D(\blk00000003/sig00000519 ), + .Q(\blk00000003/blk000001b0/sig00000931 ), + .Q15(\NLW_blk00000003/blk000001b0/blk000001d8_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk000001b0/blk000001d7 ( + .A0(\blk00000003/sig000004f0 ), + .A1(\blk00000003/sig000004ee ), + .A2(\blk00000003/blk000001b0/sig00000923 ), + .A3(\blk00000003/blk000001b0/sig00000923 ), + .CE(\blk00000003/blk000001b0/sig0000093c ), + .CLK(clk), + .D(\blk00000003/sig0000051a ), + .Q(\blk00000003/blk000001b0/sig00000930 ), + .Q15(\NLW_blk00000003/blk000001b0/blk000001d7_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk000001b0/blk000001d6 ( + .A0(\blk00000003/sig000004f0 ), + .A1(\blk00000003/sig000004ee ), + .A2(\blk00000003/blk000001b0/sig00000923 ), + .A3(\blk00000003/blk000001b0/sig00000923 ), + .CE(\blk00000003/blk000001b0/sig0000093c ), + .CLK(clk), + .D(\blk00000003/sig00000518 ), + .Q(\blk00000003/blk000001b0/sig00000932 ), + .Q15(\NLW_blk00000003/blk000001b0/blk000001d6_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk000001b0/blk000001d5 ( + .A0(\blk00000003/sig000004f0 ), + .A1(\blk00000003/sig000004ee ), + .A2(\blk00000003/blk000001b0/sig00000923 ), + .A3(\blk00000003/blk000001b0/sig00000923 ), + .CE(\blk00000003/blk000001b0/sig0000093c ), + .CLK(clk), + .D(\blk00000003/sig0000051c ), + .Q(\blk00000003/blk000001b0/sig0000092e ), + .Q15(\NLW_blk00000003/blk000001b0/blk000001d5_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk000001b0/blk000001d4 ( + .A0(\blk00000003/sig000004f0 ), + .A1(\blk00000003/sig000004ee ), + .A2(\blk00000003/blk000001b0/sig00000923 ), + .A3(\blk00000003/blk000001b0/sig00000923 ), + .CE(\blk00000003/blk000001b0/sig0000093c ), + .CLK(clk), + .D(\blk00000003/sig0000051d ), + .Q(\blk00000003/blk000001b0/sig0000092d ), + .Q15(\NLW_blk00000003/blk000001b0/blk000001d4_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk000001b0/blk000001d3 ( + .A0(\blk00000003/sig000004f0 ), + .A1(\blk00000003/sig000004ee ), + .A2(\blk00000003/blk000001b0/sig00000923 ), + .A3(\blk00000003/blk000001b0/sig00000923 ), + .CE(\blk00000003/blk000001b0/sig0000093c ), + .CLK(clk), + .D(\blk00000003/sig0000051b ), + .Q(\blk00000003/blk000001b0/sig0000092f ), + .Q15(\NLW_blk00000003/blk000001b0/blk000001d3_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk000001b0/blk000001d2 ( + .A0(\blk00000003/sig000004f0 ), + .A1(\blk00000003/sig000004ee ), + .A2(\blk00000003/blk000001b0/sig00000923 ), + .A3(\blk00000003/blk000001b0/sig00000923 ), + .CE(\blk00000003/blk000001b0/sig0000093c ), + .CLK(clk), + .D(\blk00000003/sig0000051f ), + .Q(\blk00000003/blk000001b0/sig0000092b ), + .Q15(\NLW_blk00000003/blk000001b0/blk000001d2_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk000001b0/blk000001d1 ( + .A0(\blk00000003/sig000004f0 ), + .A1(\blk00000003/sig000004ee ), + .A2(\blk00000003/blk000001b0/sig00000923 ), + .A3(\blk00000003/blk000001b0/sig00000923 ), + .CE(\blk00000003/blk000001b0/sig0000093c ), + .CLK(clk), + .D(\blk00000003/sig00000520 ), + .Q(\blk00000003/blk000001b0/sig0000092a ), + .Q15(\NLW_blk00000003/blk000001b0/blk000001d1_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk000001b0/blk000001d0 ( + .A0(\blk00000003/sig000004f0 ), + .A1(\blk00000003/sig000004ee ), + .A2(\blk00000003/blk000001b0/sig00000923 ), + .A3(\blk00000003/blk000001b0/sig00000923 ), + .CE(\blk00000003/blk000001b0/sig0000093c ), + .CLK(clk), + .D(\blk00000003/sig0000051e ), + .Q(\blk00000003/blk000001b0/sig0000092c ), + .Q15(\NLW_blk00000003/blk000001b0/blk000001d0_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk000001b0/blk000001cf ( + .A0(\blk00000003/sig000004f0 ), + .A1(\blk00000003/sig000004ee ), + .A2(\blk00000003/blk000001b0/sig00000923 ), + .A3(\blk00000003/blk000001b0/sig00000923 ), + .CE(\blk00000003/blk000001b0/sig0000093c ), + .CLK(clk), + .D(\blk00000003/sig00000522 ), + .Q(\blk00000003/blk000001b0/sig00000928 ), + .Q15(\NLW_blk00000003/blk000001b0/blk000001cf_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk000001b0/blk000001ce ( + .A0(\blk00000003/sig000004f0 ), + .A1(\blk00000003/sig000004ee ), + .A2(\blk00000003/blk000001b0/sig00000923 ), + .A3(\blk00000003/blk000001b0/sig00000923 ), + .CE(\blk00000003/blk000001b0/sig0000093c ), + .CLK(clk), + .D(\blk00000003/sig00000523 ), + .Q(\blk00000003/blk000001b0/sig00000927 ), + .Q15(\NLW_blk00000003/blk000001b0/blk000001ce_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk000001b0/blk000001cd ( + .A0(\blk00000003/sig000004f0 ), + .A1(\blk00000003/sig000004ee ), + .A2(\blk00000003/blk000001b0/sig00000923 ), + .A3(\blk00000003/blk000001b0/sig00000923 ), + .CE(\blk00000003/blk000001b0/sig0000093c ), + .CLK(clk), + .D(\blk00000003/sig00000521 ), + .Q(\blk00000003/blk000001b0/sig00000929 ), + .Q15(\NLW_blk00000003/blk000001b0/blk000001cd_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk000001b0/blk000001cc ( + .A0(\blk00000003/sig000004f0 ), + .A1(\blk00000003/sig000004ee ), + .A2(\blk00000003/blk000001b0/sig00000923 ), + .A3(\blk00000003/blk000001b0/sig00000923 ), + .CE(\blk00000003/blk000001b0/sig0000093c ), + .CLK(clk), + .D(\blk00000003/sig00000525 ), + .Q(\blk00000003/blk000001b0/sig00000925 ), + .Q15(\NLW_blk00000003/blk000001b0/blk000001cc_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk000001b0/blk000001cb ( + .A0(\blk00000003/sig000004f0 ), + .A1(\blk00000003/sig000004ee ), + .A2(\blk00000003/blk000001b0/sig00000923 ), + .A3(\blk00000003/blk000001b0/sig00000923 ), + .CE(\blk00000003/blk000001b0/sig0000093c ), + .CLK(clk), + .D(\blk00000003/sig00000526 ), + .Q(\blk00000003/blk000001b0/sig00000924 ), + .Q15(\NLW_blk00000003/blk000001b0/blk000001cb_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk000001b0/blk000001ca ( + .A0(\blk00000003/sig000004f0 ), + .A1(\blk00000003/sig000004ee ), + .A2(\blk00000003/blk000001b0/sig00000923 ), + .A3(\blk00000003/blk000001b0/sig00000923 ), + .CE(\blk00000003/blk000001b0/sig0000093c ), + .CLK(clk), + .D(\blk00000003/sig00000524 ), + .Q(\blk00000003/blk000001b0/sig00000926 ), + .Q15(\NLW_blk00000003/blk000001b0/blk000001ca_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000001b0/blk000001c9 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk000001b0/sig0000093b ), + .Q(\blk00000003/sig00000451 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000001b0/blk000001c8 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk000001b0/sig0000093a ), + .Q(\blk00000003/sig00000452 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000001b0/blk000001c7 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk000001b0/sig00000939 ), + .Q(\blk00000003/sig00000453 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000001b0/blk000001c6 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk000001b0/sig00000938 ), + .Q(\blk00000003/sig00000454 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000001b0/blk000001c5 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk000001b0/sig00000937 ), + .Q(\blk00000003/sig00000455 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000001b0/blk000001c4 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk000001b0/sig00000936 ), + .Q(\blk00000003/sig00000456 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000001b0/blk000001c3 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk000001b0/sig00000935 ), + .Q(\blk00000003/sig00000457 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000001b0/blk000001c2 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk000001b0/sig00000934 ), + .Q(\blk00000003/sig00000458 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000001b0/blk000001c1 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk000001b0/sig00000933 ), + .Q(\blk00000003/sig00000459 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000001b0/blk000001c0 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk000001b0/sig00000932 ), + .Q(\blk00000003/sig0000045a ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000001b0/blk000001bf ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk000001b0/sig00000931 ), + .Q(\blk00000003/sig0000045b ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000001b0/blk000001be ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk000001b0/sig00000930 ), + .Q(\blk00000003/sig0000045c ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000001b0/blk000001bd ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk000001b0/sig0000092f ), + .Q(\blk00000003/sig0000045d ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000001b0/blk000001bc ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk000001b0/sig0000092e ), + .Q(\blk00000003/sig0000045e ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000001b0/blk000001bb ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk000001b0/sig0000092d ), + .Q(\blk00000003/sig0000045f ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000001b0/blk000001ba ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk000001b0/sig0000092c ), + .Q(\blk00000003/sig00000460 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000001b0/blk000001b9 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk000001b0/sig0000092b ), + .Q(\blk00000003/sig00000461 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000001b0/blk000001b8 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk000001b0/sig0000092a ), + .Q(\blk00000003/sig00000462 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000001b0/blk000001b7 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk000001b0/sig00000929 ), + .Q(\blk00000003/sig00000463 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000001b0/blk000001b6 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk000001b0/sig00000928 ), + .Q(\blk00000003/sig00000464 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000001b0/blk000001b5 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk000001b0/sig00000927 ), + .Q(\blk00000003/sig00000465 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000001b0/blk000001b4 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk000001b0/sig00000926 ), + .Q(\blk00000003/sig00000466 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000001b0/blk000001b3 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk000001b0/sig00000925 ), + .Q(\blk00000003/sig00000467 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000001b0/blk000001b2 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk000001b0/sig00000924 ), + .Q(\blk00000003/sig00000468 ) + ); + GND \blk00000003/blk000001b0/blk000001b1 ( + .G(\blk00000003/blk000001b0/sig00000923 ) + ); + LUT2 #( + .INIT ( 4'h8 )) + \blk00000003/blk000001e3/blk00000215 ( + .I0(ce), + .I1(\blk00000003/sig000004e5 ), + .O(\blk00000003/blk000001e3/sig0000098b ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk000001e3/blk00000214 ( + .A0(\blk00000003/sig000004f3 ), + .A1(\blk00000003/sig000004f1 ), + .A2(\blk00000003/blk000001e3/sig00000972 ), + .A3(\blk00000003/blk000001e3/sig00000972 ), + .CE(\blk00000003/blk000001e3/sig0000098b ), + .CLK(clk), + .D(\blk00000003/sig000002d8 ), + .Q(\blk00000003/blk000001e3/sig00000989 ), + .Q15(\NLW_blk00000003/blk000001e3/blk00000214_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk000001e3/blk00000213 ( + .A0(\blk00000003/sig000004f3 ), + .A1(\blk00000003/sig000004f1 ), + .A2(\blk00000003/blk000001e3/sig00000972 ), + .A3(\blk00000003/blk000001e3/sig00000972 ), + .CE(\blk00000003/blk000001e3/sig0000098b ), + .CLK(clk), + .D(\blk00000003/sig000002d9 ), + .Q(\blk00000003/blk000001e3/sig00000988 ), + .Q15(\NLW_blk00000003/blk000001e3/blk00000213_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk000001e3/blk00000212 ( + .A0(\blk00000003/sig000004f3 ), + .A1(\blk00000003/sig000004f1 ), + .A2(\blk00000003/blk000001e3/sig00000972 ), + .A3(\blk00000003/blk000001e3/sig00000972 ), + .CE(\blk00000003/blk000001e3/sig0000098b ), + .CLK(clk), + .D(\blk00000003/sig000002d7 ), + .Q(\blk00000003/blk000001e3/sig0000098a ), + .Q15(\NLW_blk00000003/blk000001e3/blk00000212_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk000001e3/blk00000211 ( + .A0(\blk00000003/sig000004f3 ), + .A1(\blk00000003/sig000004f1 ), + .A2(\blk00000003/blk000001e3/sig00000972 ), + .A3(\blk00000003/blk000001e3/sig00000972 ), + .CE(\blk00000003/blk000001e3/sig0000098b ), + .CLK(clk), + .D(\blk00000003/sig000002db ), + .Q(\blk00000003/blk000001e3/sig00000986 ), + .Q15(\NLW_blk00000003/blk000001e3/blk00000211_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk000001e3/blk00000210 ( + .A0(\blk00000003/sig000004f3 ), + .A1(\blk00000003/sig000004f1 ), + .A2(\blk00000003/blk000001e3/sig00000972 ), + .A3(\blk00000003/blk000001e3/sig00000972 ), + .CE(\blk00000003/blk000001e3/sig0000098b ), + .CLK(clk), + .D(\blk00000003/sig000002dc ), + .Q(\blk00000003/blk000001e3/sig00000985 ), + .Q15(\NLW_blk00000003/blk000001e3/blk00000210_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk000001e3/blk0000020f ( + .A0(\blk00000003/sig000004f3 ), + .A1(\blk00000003/sig000004f1 ), + .A2(\blk00000003/blk000001e3/sig00000972 ), + .A3(\blk00000003/blk000001e3/sig00000972 ), + .CE(\blk00000003/blk000001e3/sig0000098b ), + .CLK(clk), + .D(\blk00000003/sig000002da ), + .Q(\blk00000003/blk000001e3/sig00000987 ), + .Q15(\NLW_blk00000003/blk000001e3/blk0000020f_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk000001e3/blk0000020e ( + .A0(\blk00000003/sig000004f3 ), + .A1(\blk00000003/sig000004f1 ), + .A2(\blk00000003/blk000001e3/sig00000972 ), + .A3(\blk00000003/blk000001e3/sig00000972 ), + .CE(\blk00000003/blk000001e3/sig0000098b ), + .CLK(clk), + .D(\blk00000003/sig000002de ), + .Q(\blk00000003/blk000001e3/sig00000983 ), + .Q15(\NLW_blk00000003/blk000001e3/blk0000020e_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk000001e3/blk0000020d ( + .A0(\blk00000003/sig000004f3 ), + .A1(\blk00000003/sig000004f1 ), + .A2(\blk00000003/blk000001e3/sig00000972 ), + .A3(\blk00000003/blk000001e3/sig00000972 ), + .CE(\blk00000003/blk000001e3/sig0000098b ), + .CLK(clk), + .D(\blk00000003/sig000002df ), + .Q(\blk00000003/blk000001e3/sig00000982 ), + .Q15(\NLW_blk00000003/blk000001e3/blk0000020d_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk000001e3/blk0000020c ( + .A0(\blk00000003/sig000004f3 ), + .A1(\blk00000003/sig000004f1 ), + .A2(\blk00000003/blk000001e3/sig00000972 ), + .A3(\blk00000003/blk000001e3/sig00000972 ), + .CE(\blk00000003/blk000001e3/sig0000098b ), + .CLK(clk), + .D(\blk00000003/sig000002dd ), + .Q(\blk00000003/blk000001e3/sig00000984 ), + .Q15(\NLW_blk00000003/blk000001e3/blk0000020c_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk000001e3/blk0000020b ( + .A0(\blk00000003/sig000004f3 ), + .A1(\blk00000003/sig000004f1 ), + .A2(\blk00000003/blk000001e3/sig00000972 ), + .A3(\blk00000003/blk000001e3/sig00000972 ), + .CE(\blk00000003/blk000001e3/sig0000098b ), + .CLK(clk), + .D(\blk00000003/sig000002e1 ), + .Q(\blk00000003/blk000001e3/sig00000980 ), + .Q15(\NLW_blk00000003/blk000001e3/blk0000020b_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk000001e3/blk0000020a ( + .A0(\blk00000003/sig000004f3 ), + .A1(\blk00000003/sig000004f1 ), + .A2(\blk00000003/blk000001e3/sig00000972 ), + .A3(\blk00000003/blk000001e3/sig00000972 ), + .CE(\blk00000003/blk000001e3/sig0000098b ), + .CLK(clk), + .D(\blk00000003/sig000002e2 ), + .Q(\blk00000003/blk000001e3/sig0000097f ), + .Q15(\NLW_blk00000003/blk000001e3/blk0000020a_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk000001e3/blk00000209 ( + .A0(\blk00000003/sig000004f3 ), + .A1(\blk00000003/sig000004f1 ), + .A2(\blk00000003/blk000001e3/sig00000972 ), + .A3(\blk00000003/blk000001e3/sig00000972 ), + .CE(\blk00000003/blk000001e3/sig0000098b ), + .CLK(clk), + .D(\blk00000003/sig000002e0 ), + .Q(\blk00000003/blk000001e3/sig00000981 ), + .Q15(\NLW_blk00000003/blk000001e3/blk00000209_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk000001e3/blk00000208 ( + .A0(\blk00000003/sig000004f3 ), + .A1(\blk00000003/sig000004f1 ), + .A2(\blk00000003/blk000001e3/sig00000972 ), + .A3(\blk00000003/blk000001e3/sig00000972 ), + .CE(\blk00000003/blk000001e3/sig0000098b ), + .CLK(clk), + .D(\blk00000003/sig000002e4 ), + .Q(\blk00000003/blk000001e3/sig0000097d ), + .Q15(\NLW_blk00000003/blk000001e3/blk00000208_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk000001e3/blk00000207 ( + .A0(\blk00000003/sig000004f3 ), + .A1(\blk00000003/sig000004f1 ), + .A2(\blk00000003/blk000001e3/sig00000972 ), + .A3(\blk00000003/blk000001e3/sig00000972 ), + .CE(\blk00000003/blk000001e3/sig0000098b ), + .CLK(clk), + .D(\blk00000003/sig000002e5 ), + .Q(\blk00000003/blk000001e3/sig0000097c ), + .Q15(\NLW_blk00000003/blk000001e3/blk00000207_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk000001e3/blk00000206 ( + .A0(\blk00000003/sig000004f3 ), + .A1(\blk00000003/sig000004f1 ), + .A2(\blk00000003/blk000001e3/sig00000972 ), + .A3(\blk00000003/blk000001e3/sig00000972 ), + .CE(\blk00000003/blk000001e3/sig0000098b ), + .CLK(clk), + .D(\blk00000003/sig000002e3 ), + .Q(\blk00000003/blk000001e3/sig0000097e ), + .Q15(\NLW_blk00000003/blk000001e3/blk00000206_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk000001e3/blk00000205 ( + .A0(\blk00000003/sig000004f3 ), + .A1(\blk00000003/sig000004f1 ), + .A2(\blk00000003/blk000001e3/sig00000972 ), + .A3(\blk00000003/blk000001e3/sig00000972 ), + .CE(\blk00000003/blk000001e3/sig0000098b ), + .CLK(clk), + .D(\blk00000003/sig000002e7 ), + .Q(\blk00000003/blk000001e3/sig0000097a ), + .Q15(\NLW_blk00000003/blk000001e3/blk00000205_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk000001e3/blk00000204 ( + .A0(\blk00000003/sig000004f3 ), + .A1(\blk00000003/sig000004f1 ), + .A2(\blk00000003/blk000001e3/sig00000972 ), + .A3(\blk00000003/blk000001e3/sig00000972 ), + .CE(\blk00000003/blk000001e3/sig0000098b ), + .CLK(clk), + .D(\blk00000003/sig000002e8 ), + .Q(\blk00000003/blk000001e3/sig00000979 ), + .Q15(\NLW_blk00000003/blk000001e3/blk00000204_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk000001e3/blk00000203 ( + .A0(\blk00000003/sig000004f3 ), + .A1(\blk00000003/sig000004f1 ), + .A2(\blk00000003/blk000001e3/sig00000972 ), + .A3(\blk00000003/blk000001e3/sig00000972 ), + .CE(\blk00000003/blk000001e3/sig0000098b ), + .CLK(clk), + .D(\blk00000003/sig000002e6 ), + .Q(\blk00000003/blk000001e3/sig0000097b ), + .Q15(\NLW_blk00000003/blk000001e3/blk00000203_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk000001e3/blk00000202 ( + .A0(\blk00000003/sig000004f3 ), + .A1(\blk00000003/sig000004f1 ), + .A2(\blk00000003/blk000001e3/sig00000972 ), + .A3(\blk00000003/blk000001e3/sig00000972 ), + .CE(\blk00000003/blk000001e3/sig0000098b ), + .CLK(clk), + .D(\blk00000003/sig000002ea ), + .Q(\blk00000003/blk000001e3/sig00000977 ), + .Q15(\NLW_blk00000003/blk000001e3/blk00000202_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk000001e3/blk00000201 ( + .A0(\blk00000003/sig000004f3 ), + .A1(\blk00000003/sig000004f1 ), + .A2(\blk00000003/blk000001e3/sig00000972 ), + .A3(\blk00000003/blk000001e3/sig00000972 ), + .CE(\blk00000003/blk000001e3/sig0000098b ), + .CLK(clk), + .D(\blk00000003/sig000002eb ), + .Q(\blk00000003/blk000001e3/sig00000976 ), + .Q15(\NLW_blk00000003/blk000001e3/blk00000201_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk000001e3/blk00000200 ( + .A0(\blk00000003/sig000004f3 ), + .A1(\blk00000003/sig000004f1 ), + .A2(\blk00000003/blk000001e3/sig00000972 ), + .A3(\blk00000003/blk000001e3/sig00000972 ), + .CE(\blk00000003/blk000001e3/sig0000098b ), + .CLK(clk), + .D(\blk00000003/sig000002e9 ), + .Q(\blk00000003/blk000001e3/sig00000978 ), + .Q15(\NLW_blk00000003/blk000001e3/blk00000200_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk000001e3/blk000001ff ( + .A0(\blk00000003/sig000004f3 ), + .A1(\blk00000003/sig000004f1 ), + .A2(\blk00000003/blk000001e3/sig00000972 ), + .A3(\blk00000003/blk000001e3/sig00000972 ), + .CE(\blk00000003/blk000001e3/sig0000098b ), + .CLK(clk), + .D(\blk00000003/sig000002ed ), + .Q(\blk00000003/blk000001e3/sig00000974 ), + .Q15(\NLW_blk00000003/blk000001e3/blk000001ff_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk000001e3/blk000001fe ( + .A0(\blk00000003/sig000004f3 ), + .A1(\blk00000003/sig000004f1 ), + .A2(\blk00000003/blk000001e3/sig00000972 ), + .A3(\blk00000003/blk000001e3/sig00000972 ), + .CE(\blk00000003/blk000001e3/sig0000098b ), + .CLK(clk), + .D(\blk00000003/sig000002ee ), + .Q(\blk00000003/blk000001e3/sig00000973 ), + .Q15(\NLW_blk00000003/blk000001e3/blk000001fe_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk000001e3/blk000001fd ( + .A0(\blk00000003/sig000004f3 ), + .A1(\blk00000003/sig000004f1 ), + .A2(\blk00000003/blk000001e3/sig00000972 ), + .A3(\blk00000003/blk000001e3/sig00000972 ), + .CE(\blk00000003/blk000001e3/sig0000098b ), + .CLK(clk), + .D(\blk00000003/sig000002ec ), + .Q(\blk00000003/blk000001e3/sig00000975 ), + .Q15(\NLW_blk00000003/blk000001e3/blk000001fd_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000001e3/blk000001fc ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk000001e3/sig0000098a ), + .Q(\blk00000003/sig0000047b ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000001e3/blk000001fb ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk000001e3/sig00000989 ), + .Q(\blk00000003/sig0000047c ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000001e3/blk000001fa ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk000001e3/sig00000988 ), + .Q(\blk00000003/sig0000047d ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000001e3/blk000001f9 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk000001e3/sig00000987 ), + .Q(\blk00000003/sig0000047e ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000001e3/blk000001f8 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk000001e3/sig00000986 ), + .Q(\blk00000003/sig0000047f ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000001e3/blk000001f7 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk000001e3/sig00000985 ), + .Q(\blk00000003/sig00000480 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000001e3/blk000001f6 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk000001e3/sig00000984 ), + .Q(\blk00000003/sig00000481 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000001e3/blk000001f5 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk000001e3/sig00000983 ), + .Q(\blk00000003/sig00000482 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000001e3/blk000001f4 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk000001e3/sig00000982 ), + .Q(\blk00000003/sig00000483 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000001e3/blk000001f3 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk000001e3/sig00000981 ), + .Q(\blk00000003/sig00000484 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000001e3/blk000001f2 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk000001e3/sig00000980 ), + .Q(\blk00000003/sig00000485 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000001e3/blk000001f1 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk000001e3/sig0000097f ), + .Q(\blk00000003/sig00000486 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000001e3/blk000001f0 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk000001e3/sig0000097e ), + .Q(\blk00000003/sig00000487 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000001e3/blk000001ef ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk000001e3/sig0000097d ), + .Q(\blk00000003/sig00000488 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000001e3/blk000001ee ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk000001e3/sig0000097c ), + .Q(\blk00000003/sig00000489 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000001e3/blk000001ed ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk000001e3/sig0000097b ), + .Q(\blk00000003/sig0000048a ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000001e3/blk000001ec ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk000001e3/sig0000097a ), + .Q(\blk00000003/sig0000048b ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000001e3/blk000001eb ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk000001e3/sig00000979 ), + .Q(\blk00000003/sig0000048c ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000001e3/blk000001ea ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk000001e3/sig00000978 ), + .Q(\blk00000003/sig0000048d ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000001e3/blk000001e9 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk000001e3/sig00000977 ), + .Q(\blk00000003/sig0000048e ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000001e3/blk000001e8 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk000001e3/sig00000976 ), + .Q(\blk00000003/sig0000048f ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000001e3/blk000001e7 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk000001e3/sig00000975 ), + .Q(\blk00000003/sig00000490 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000001e3/blk000001e6 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk000001e3/sig00000974 ), + .Q(\blk00000003/sig00000491 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000001e3/blk000001e5 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk000001e3/sig00000973 ), + .Q(\blk00000003/sig00000492 ) + ); + GND \blk00000003/blk000001e3/blk000001e4 ( + .G(\blk00000003/blk000001e3/sig00000972 ) + ); + LUT2 #( + .INIT ( 4'h8 )) + \blk00000003/blk00000216/blk00000248 ( + .I0(ce), + .I1(\blk00000003/sig000004e3 ), + .O(\blk00000003/blk00000216/sig000009da ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000216/blk00000247 ( + .A0(\blk00000003/sig000004ef ), + .A1(\blk00000003/sig000004ed ), + .A2(\blk00000003/blk00000216/sig000009c1 ), + .A3(\blk00000003/blk00000216/sig000009c1 ), + .CE(\blk00000003/blk00000216/sig000009da ), + .CLK(clk), + .D(\blk00000003/sig00000528 ), + .Q(\blk00000003/blk00000216/sig000009d8 ), + .Q15(\NLW_blk00000003/blk00000216/blk00000247_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000216/blk00000246 ( + .A0(\blk00000003/sig000004ef ), + .A1(\blk00000003/sig000004ed ), + .A2(\blk00000003/blk00000216/sig000009c1 ), + .A3(\blk00000003/blk00000216/sig000009c1 ), + .CE(\blk00000003/blk00000216/sig000009da ), + .CLK(clk), + .D(\blk00000003/sig00000529 ), + .Q(\blk00000003/blk00000216/sig000009d7 ), + .Q15(\NLW_blk00000003/blk00000216/blk00000246_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000216/blk00000245 ( + .A0(\blk00000003/sig000004ef ), + .A1(\blk00000003/sig000004ed ), + .A2(\blk00000003/blk00000216/sig000009c1 ), + .A3(\blk00000003/blk00000216/sig000009c1 ), + .CE(\blk00000003/blk00000216/sig000009da ), + .CLK(clk), + .D(\blk00000003/sig00000527 ), + .Q(\blk00000003/blk00000216/sig000009d9 ), + .Q15(\NLW_blk00000003/blk00000216/blk00000245_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000216/blk00000244 ( + .A0(\blk00000003/sig000004ef ), + .A1(\blk00000003/sig000004ed ), + .A2(\blk00000003/blk00000216/sig000009c1 ), + .A3(\blk00000003/blk00000216/sig000009c1 ), + .CE(\blk00000003/blk00000216/sig000009da ), + .CLK(clk), + .D(\blk00000003/sig0000052b ), + .Q(\blk00000003/blk00000216/sig000009d5 ), + .Q15(\NLW_blk00000003/blk00000216/blk00000244_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000216/blk00000243 ( + .A0(\blk00000003/sig000004ef ), + .A1(\blk00000003/sig000004ed ), + .A2(\blk00000003/blk00000216/sig000009c1 ), + .A3(\blk00000003/blk00000216/sig000009c1 ), + .CE(\blk00000003/blk00000216/sig000009da ), + .CLK(clk), + .D(\blk00000003/sig0000052c ), + .Q(\blk00000003/blk00000216/sig000009d4 ), + .Q15(\NLW_blk00000003/blk00000216/blk00000243_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000216/blk00000242 ( + .A0(\blk00000003/sig000004ef ), + .A1(\blk00000003/sig000004ed ), + .A2(\blk00000003/blk00000216/sig000009c1 ), + .A3(\blk00000003/blk00000216/sig000009c1 ), + .CE(\blk00000003/blk00000216/sig000009da ), + .CLK(clk), + .D(\blk00000003/sig0000052a ), + .Q(\blk00000003/blk00000216/sig000009d6 ), + .Q15(\NLW_blk00000003/blk00000216/blk00000242_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000216/blk00000241 ( + .A0(\blk00000003/sig000004ef ), + .A1(\blk00000003/sig000004ed ), + .A2(\blk00000003/blk00000216/sig000009c1 ), + .A3(\blk00000003/blk00000216/sig000009c1 ), + .CE(\blk00000003/blk00000216/sig000009da ), + .CLK(clk), + .D(\blk00000003/sig0000052e ), + .Q(\blk00000003/blk00000216/sig000009d2 ), + .Q15(\NLW_blk00000003/blk00000216/blk00000241_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000216/blk00000240 ( + .A0(\blk00000003/sig000004ef ), + .A1(\blk00000003/sig000004ed ), + .A2(\blk00000003/blk00000216/sig000009c1 ), + .A3(\blk00000003/blk00000216/sig000009c1 ), + .CE(\blk00000003/blk00000216/sig000009da ), + .CLK(clk), + .D(\blk00000003/sig0000052f ), + .Q(\blk00000003/blk00000216/sig000009d1 ), + .Q15(\NLW_blk00000003/blk00000216/blk00000240_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000216/blk0000023f ( + .A0(\blk00000003/sig000004ef ), + .A1(\blk00000003/sig000004ed ), + .A2(\blk00000003/blk00000216/sig000009c1 ), + .A3(\blk00000003/blk00000216/sig000009c1 ), + .CE(\blk00000003/blk00000216/sig000009da ), + .CLK(clk), + .D(\blk00000003/sig0000052d ), + .Q(\blk00000003/blk00000216/sig000009d3 ), + .Q15(\NLW_blk00000003/blk00000216/blk0000023f_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000216/blk0000023e ( + .A0(\blk00000003/sig000004ef ), + .A1(\blk00000003/sig000004ed ), + .A2(\blk00000003/blk00000216/sig000009c1 ), + .A3(\blk00000003/blk00000216/sig000009c1 ), + .CE(\blk00000003/blk00000216/sig000009da ), + .CLK(clk), + .D(\blk00000003/sig00000531 ), + .Q(\blk00000003/blk00000216/sig000009cf ), + .Q15(\NLW_blk00000003/blk00000216/blk0000023e_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000216/blk0000023d ( + .A0(\blk00000003/sig000004ef ), + .A1(\blk00000003/sig000004ed ), + .A2(\blk00000003/blk00000216/sig000009c1 ), + .A3(\blk00000003/blk00000216/sig000009c1 ), + .CE(\blk00000003/blk00000216/sig000009da ), + .CLK(clk), + .D(\blk00000003/sig00000532 ), + .Q(\blk00000003/blk00000216/sig000009ce ), + .Q15(\NLW_blk00000003/blk00000216/blk0000023d_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000216/blk0000023c ( + .A0(\blk00000003/sig000004ef ), + .A1(\blk00000003/sig000004ed ), + .A2(\blk00000003/blk00000216/sig000009c1 ), + .A3(\blk00000003/blk00000216/sig000009c1 ), + .CE(\blk00000003/blk00000216/sig000009da ), + .CLK(clk), + .D(\blk00000003/sig00000530 ), + .Q(\blk00000003/blk00000216/sig000009d0 ), + .Q15(\NLW_blk00000003/blk00000216/blk0000023c_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000216/blk0000023b ( + .A0(\blk00000003/sig000004ef ), + .A1(\blk00000003/sig000004ed ), + .A2(\blk00000003/blk00000216/sig000009c1 ), + .A3(\blk00000003/blk00000216/sig000009c1 ), + .CE(\blk00000003/blk00000216/sig000009da ), + .CLK(clk), + .D(\blk00000003/sig00000534 ), + .Q(\blk00000003/blk00000216/sig000009cc ), + .Q15(\NLW_blk00000003/blk00000216/blk0000023b_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000216/blk0000023a ( + .A0(\blk00000003/sig000004ef ), + .A1(\blk00000003/sig000004ed ), + .A2(\blk00000003/blk00000216/sig000009c1 ), + .A3(\blk00000003/blk00000216/sig000009c1 ), + .CE(\blk00000003/blk00000216/sig000009da ), + .CLK(clk), + .D(\blk00000003/sig00000535 ), + .Q(\blk00000003/blk00000216/sig000009cb ), + .Q15(\NLW_blk00000003/blk00000216/blk0000023a_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000216/blk00000239 ( + .A0(\blk00000003/sig000004ef ), + .A1(\blk00000003/sig000004ed ), + .A2(\blk00000003/blk00000216/sig000009c1 ), + .A3(\blk00000003/blk00000216/sig000009c1 ), + .CE(\blk00000003/blk00000216/sig000009da ), + .CLK(clk), + .D(\blk00000003/sig00000533 ), + .Q(\blk00000003/blk00000216/sig000009cd ), + .Q15(\NLW_blk00000003/blk00000216/blk00000239_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000216/blk00000238 ( + .A0(\blk00000003/sig000004ef ), + .A1(\blk00000003/sig000004ed ), + .A2(\blk00000003/blk00000216/sig000009c1 ), + .A3(\blk00000003/blk00000216/sig000009c1 ), + .CE(\blk00000003/blk00000216/sig000009da ), + .CLK(clk), + .D(\blk00000003/sig00000537 ), + .Q(\blk00000003/blk00000216/sig000009c9 ), + .Q15(\NLW_blk00000003/blk00000216/blk00000238_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000216/blk00000237 ( + .A0(\blk00000003/sig000004ef ), + .A1(\blk00000003/sig000004ed ), + .A2(\blk00000003/blk00000216/sig000009c1 ), + .A3(\blk00000003/blk00000216/sig000009c1 ), + .CE(\blk00000003/blk00000216/sig000009da ), + .CLK(clk), + .D(\blk00000003/sig00000538 ), + .Q(\blk00000003/blk00000216/sig000009c8 ), + .Q15(\NLW_blk00000003/blk00000216/blk00000237_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000216/blk00000236 ( + .A0(\blk00000003/sig000004ef ), + .A1(\blk00000003/sig000004ed ), + .A2(\blk00000003/blk00000216/sig000009c1 ), + .A3(\blk00000003/blk00000216/sig000009c1 ), + .CE(\blk00000003/blk00000216/sig000009da ), + .CLK(clk), + .D(\blk00000003/sig00000536 ), + .Q(\blk00000003/blk00000216/sig000009ca ), + .Q15(\NLW_blk00000003/blk00000216/blk00000236_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000216/blk00000235 ( + .A0(\blk00000003/sig000004ef ), + .A1(\blk00000003/sig000004ed ), + .A2(\blk00000003/blk00000216/sig000009c1 ), + .A3(\blk00000003/blk00000216/sig000009c1 ), + .CE(\blk00000003/blk00000216/sig000009da ), + .CLK(clk), + .D(\blk00000003/sig0000053a ), + .Q(\blk00000003/blk00000216/sig000009c6 ), + .Q15(\NLW_blk00000003/blk00000216/blk00000235_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000216/blk00000234 ( + .A0(\blk00000003/sig000004ef ), + .A1(\blk00000003/sig000004ed ), + .A2(\blk00000003/blk00000216/sig000009c1 ), + .A3(\blk00000003/blk00000216/sig000009c1 ), + .CE(\blk00000003/blk00000216/sig000009da ), + .CLK(clk), + .D(\blk00000003/sig0000053b ), + .Q(\blk00000003/blk00000216/sig000009c5 ), + .Q15(\NLW_blk00000003/blk00000216/blk00000234_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000216/blk00000233 ( + .A0(\blk00000003/sig000004ef ), + .A1(\blk00000003/sig000004ed ), + .A2(\blk00000003/blk00000216/sig000009c1 ), + .A3(\blk00000003/blk00000216/sig000009c1 ), + .CE(\blk00000003/blk00000216/sig000009da ), + .CLK(clk), + .D(\blk00000003/sig00000539 ), + .Q(\blk00000003/blk00000216/sig000009c7 ), + .Q15(\NLW_blk00000003/blk00000216/blk00000233_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000216/blk00000232 ( + .A0(\blk00000003/sig000004ef ), + .A1(\blk00000003/sig000004ed ), + .A2(\blk00000003/blk00000216/sig000009c1 ), + .A3(\blk00000003/blk00000216/sig000009c1 ), + .CE(\blk00000003/blk00000216/sig000009da ), + .CLK(clk), + .D(\blk00000003/sig0000053d ), + .Q(\blk00000003/blk00000216/sig000009c3 ), + .Q15(\NLW_blk00000003/blk00000216/blk00000232_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000216/blk00000231 ( + .A0(\blk00000003/sig000004ef ), + .A1(\blk00000003/sig000004ed ), + .A2(\blk00000003/blk00000216/sig000009c1 ), + .A3(\blk00000003/blk00000216/sig000009c1 ), + .CE(\blk00000003/blk00000216/sig000009da ), + .CLK(clk), + .D(\blk00000003/sig0000053e ), + .Q(\blk00000003/blk00000216/sig000009c2 ), + .Q15(\NLW_blk00000003/blk00000216/blk00000231_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000216/blk00000230 ( + .A0(\blk00000003/sig000004ef ), + .A1(\blk00000003/sig000004ed ), + .A2(\blk00000003/blk00000216/sig000009c1 ), + .A3(\blk00000003/blk00000216/sig000009c1 ), + .CE(\blk00000003/blk00000216/sig000009da ), + .CLK(clk), + .D(\blk00000003/sig0000053c ), + .Q(\blk00000003/blk00000216/sig000009c4 ), + .Q15(\NLW_blk00000003/blk00000216/blk00000230_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000216/blk0000022f ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk00000216/sig000009d9 ), + .Q(\blk00000003/sig00000493 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000216/blk0000022e ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk00000216/sig000009d8 ), + .Q(\blk00000003/sig00000494 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000216/blk0000022d ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk00000216/sig000009d7 ), + .Q(\blk00000003/sig00000495 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000216/blk0000022c ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk00000216/sig000009d6 ), + .Q(\blk00000003/sig00000496 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000216/blk0000022b ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk00000216/sig000009d5 ), + .Q(\blk00000003/sig00000497 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000216/blk0000022a ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk00000216/sig000009d4 ), + .Q(\blk00000003/sig00000498 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000216/blk00000229 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk00000216/sig000009d3 ), + .Q(\blk00000003/sig00000499 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000216/blk00000228 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk00000216/sig000009d2 ), + .Q(\blk00000003/sig0000049a ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000216/blk00000227 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk00000216/sig000009d1 ), + .Q(\blk00000003/sig0000049b ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000216/blk00000226 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk00000216/sig000009d0 ), + .Q(\blk00000003/sig0000049c ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000216/blk00000225 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk00000216/sig000009cf ), + .Q(\blk00000003/sig0000049d ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000216/blk00000224 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk00000216/sig000009ce ), + .Q(\blk00000003/sig0000049e ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000216/blk00000223 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk00000216/sig000009cd ), + .Q(\blk00000003/sig0000049f ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000216/blk00000222 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk00000216/sig000009cc ), + .Q(\blk00000003/sig000004a0 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000216/blk00000221 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk00000216/sig000009cb ), + .Q(\blk00000003/sig000004a1 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000216/blk00000220 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk00000216/sig000009ca ), + .Q(\blk00000003/sig000004a2 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000216/blk0000021f ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk00000216/sig000009c9 ), + .Q(\blk00000003/sig000004a3 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000216/blk0000021e ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk00000216/sig000009c8 ), + .Q(\blk00000003/sig000004a4 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000216/blk0000021d ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk00000216/sig000009c7 ), + .Q(\blk00000003/sig000004a5 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000216/blk0000021c ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk00000216/sig000009c6 ), + .Q(\blk00000003/sig000004a6 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000216/blk0000021b ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk00000216/sig000009c5 ), + .Q(\blk00000003/sig000004a7 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000216/blk0000021a ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk00000216/sig000009c4 ), + .Q(\blk00000003/sig000004a8 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000216/blk00000219 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk00000216/sig000009c3 ), + .Q(\blk00000003/sig000004a9 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000216/blk00000218 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk00000216/sig000009c2 ), + .Q(\blk00000003/sig000004aa ) + ); + GND \blk00000003/blk00000216/blk00000217 ( + .G(\blk00000003/blk00000216/sig000009c1 ) + ); + LUT2 #( + .INIT ( 4'h8 )) + \blk00000003/blk00000249/blk0000027b ( + .I0(ce), + .I1(\blk00000003/sig000004e5 ), + .O(\blk00000003/blk00000249/sig00000a29 ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000249/blk0000027a ( + .A0(\blk00000003/sig000004f3 ), + .A1(\blk00000003/sig000004f1 ), + .A2(\blk00000003/blk00000249/sig00000a10 ), + .A3(\blk00000003/blk00000249/sig00000a10 ), + .CE(\blk00000003/blk00000249/sig00000a29 ), + .CLK(clk), + .D(\blk00000003/sig00000338 ), + .Q(\blk00000003/blk00000249/sig00000a27 ), + .Q15(\NLW_blk00000003/blk00000249/blk0000027a_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000249/blk00000279 ( + .A0(\blk00000003/sig000004f3 ), + .A1(\blk00000003/sig000004f1 ), + .A2(\blk00000003/blk00000249/sig00000a10 ), + .A3(\blk00000003/blk00000249/sig00000a10 ), + .CE(\blk00000003/blk00000249/sig00000a29 ), + .CLK(clk), + .D(\blk00000003/sig00000339 ), + .Q(\blk00000003/blk00000249/sig00000a26 ), + .Q15(\NLW_blk00000003/blk00000249/blk00000279_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000249/blk00000278 ( + .A0(\blk00000003/sig000004f3 ), + .A1(\blk00000003/sig000004f1 ), + .A2(\blk00000003/blk00000249/sig00000a10 ), + .A3(\blk00000003/blk00000249/sig00000a10 ), + .CE(\blk00000003/blk00000249/sig00000a29 ), + .CLK(clk), + .D(\blk00000003/sig00000337 ), + .Q(\blk00000003/blk00000249/sig00000a28 ), + .Q15(\NLW_blk00000003/blk00000249/blk00000278_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000249/blk00000277 ( + .A0(\blk00000003/sig000004f3 ), + .A1(\blk00000003/sig000004f1 ), + .A2(\blk00000003/blk00000249/sig00000a10 ), + .A3(\blk00000003/blk00000249/sig00000a10 ), + .CE(\blk00000003/blk00000249/sig00000a29 ), + .CLK(clk), + .D(\blk00000003/sig0000033b ), + .Q(\blk00000003/blk00000249/sig00000a24 ), + .Q15(\NLW_blk00000003/blk00000249/blk00000277_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000249/blk00000276 ( + .A0(\blk00000003/sig000004f3 ), + .A1(\blk00000003/sig000004f1 ), + .A2(\blk00000003/blk00000249/sig00000a10 ), + .A3(\blk00000003/blk00000249/sig00000a10 ), + .CE(\blk00000003/blk00000249/sig00000a29 ), + .CLK(clk), + .D(\blk00000003/sig0000033c ), + .Q(\blk00000003/blk00000249/sig00000a23 ), + .Q15(\NLW_blk00000003/blk00000249/blk00000276_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000249/blk00000275 ( + .A0(\blk00000003/sig000004f3 ), + .A1(\blk00000003/sig000004f1 ), + .A2(\blk00000003/blk00000249/sig00000a10 ), + .A3(\blk00000003/blk00000249/sig00000a10 ), + .CE(\blk00000003/blk00000249/sig00000a29 ), + .CLK(clk), + .D(\blk00000003/sig0000033a ), + .Q(\blk00000003/blk00000249/sig00000a25 ), + .Q15(\NLW_blk00000003/blk00000249/blk00000275_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000249/blk00000274 ( + .A0(\blk00000003/sig000004f3 ), + .A1(\blk00000003/sig000004f1 ), + .A2(\blk00000003/blk00000249/sig00000a10 ), + .A3(\blk00000003/blk00000249/sig00000a10 ), + .CE(\blk00000003/blk00000249/sig00000a29 ), + .CLK(clk), + .D(\blk00000003/sig0000033e ), + .Q(\blk00000003/blk00000249/sig00000a21 ), + .Q15(\NLW_blk00000003/blk00000249/blk00000274_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000249/blk00000273 ( + .A0(\blk00000003/sig000004f3 ), + .A1(\blk00000003/sig000004f1 ), + .A2(\blk00000003/blk00000249/sig00000a10 ), + .A3(\blk00000003/blk00000249/sig00000a10 ), + .CE(\blk00000003/blk00000249/sig00000a29 ), + .CLK(clk), + .D(\blk00000003/sig0000033f ), + .Q(\blk00000003/blk00000249/sig00000a20 ), + .Q15(\NLW_blk00000003/blk00000249/blk00000273_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000249/blk00000272 ( + .A0(\blk00000003/sig000004f3 ), + .A1(\blk00000003/sig000004f1 ), + .A2(\blk00000003/blk00000249/sig00000a10 ), + .A3(\blk00000003/blk00000249/sig00000a10 ), + .CE(\blk00000003/blk00000249/sig00000a29 ), + .CLK(clk), + .D(\blk00000003/sig0000033d ), + .Q(\blk00000003/blk00000249/sig00000a22 ), + .Q15(\NLW_blk00000003/blk00000249/blk00000272_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000249/blk00000271 ( + .A0(\blk00000003/sig000004f3 ), + .A1(\blk00000003/sig000004f1 ), + .A2(\blk00000003/blk00000249/sig00000a10 ), + .A3(\blk00000003/blk00000249/sig00000a10 ), + .CE(\blk00000003/blk00000249/sig00000a29 ), + .CLK(clk), + .D(\blk00000003/sig00000341 ), + .Q(\blk00000003/blk00000249/sig00000a1e ), + .Q15(\NLW_blk00000003/blk00000249/blk00000271_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000249/blk00000270 ( + .A0(\blk00000003/sig000004f3 ), + .A1(\blk00000003/sig000004f1 ), + .A2(\blk00000003/blk00000249/sig00000a10 ), + .A3(\blk00000003/blk00000249/sig00000a10 ), + .CE(\blk00000003/blk00000249/sig00000a29 ), + .CLK(clk), + .D(\blk00000003/sig00000342 ), + .Q(\blk00000003/blk00000249/sig00000a1d ), + .Q15(\NLW_blk00000003/blk00000249/blk00000270_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000249/blk0000026f ( + .A0(\blk00000003/sig000004f3 ), + .A1(\blk00000003/sig000004f1 ), + .A2(\blk00000003/blk00000249/sig00000a10 ), + .A3(\blk00000003/blk00000249/sig00000a10 ), + .CE(\blk00000003/blk00000249/sig00000a29 ), + .CLK(clk), + .D(\blk00000003/sig00000340 ), + .Q(\blk00000003/blk00000249/sig00000a1f ), + .Q15(\NLW_blk00000003/blk00000249/blk0000026f_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000249/blk0000026e ( + .A0(\blk00000003/sig000004f3 ), + .A1(\blk00000003/sig000004f1 ), + .A2(\blk00000003/blk00000249/sig00000a10 ), + .A3(\blk00000003/blk00000249/sig00000a10 ), + .CE(\blk00000003/blk00000249/sig00000a29 ), + .CLK(clk), + .D(\blk00000003/sig00000344 ), + .Q(\blk00000003/blk00000249/sig00000a1b ), + .Q15(\NLW_blk00000003/blk00000249/blk0000026e_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000249/blk0000026d ( + .A0(\blk00000003/sig000004f3 ), + .A1(\blk00000003/sig000004f1 ), + .A2(\blk00000003/blk00000249/sig00000a10 ), + .A3(\blk00000003/blk00000249/sig00000a10 ), + .CE(\blk00000003/blk00000249/sig00000a29 ), + .CLK(clk), + .D(\blk00000003/sig00000345 ), + .Q(\blk00000003/blk00000249/sig00000a1a ), + .Q15(\NLW_blk00000003/blk00000249/blk0000026d_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000249/blk0000026c ( + .A0(\blk00000003/sig000004f3 ), + .A1(\blk00000003/sig000004f1 ), + .A2(\blk00000003/blk00000249/sig00000a10 ), + .A3(\blk00000003/blk00000249/sig00000a10 ), + .CE(\blk00000003/blk00000249/sig00000a29 ), + .CLK(clk), + .D(\blk00000003/sig00000343 ), + .Q(\blk00000003/blk00000249/sig00000a1c ), + .Q15(\NLW_blk00000003/blk00000249/blk0000026c_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000249/blk0000026b ( + .A0(\blk00000003/sig000004f3 ), + .A1(\blk00000003/sig000004f1 ), + .A2(\blk00000003/blk00000249/sig00000a10 ), + .A3(\blk00000003/blk00000249/sig00000a10 ), + .CE(\blk00000003/blk00000249/sig00000a29 ), + .CLK(clk), + .D(\blk00000003/sig00000347 ), + .Q(\blk00000003/blk00000249/sig00000a18 ), + .Q15(\NLW_blk00000003/blk00000249/blk0000026b_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000249/blk0000026a ( + .A0(\blk00000003/sig000004f3 ), + .A1(\blk00000003/sig000004f1 ), + .A2(\blk00000003/blk00000249/sig00000a10 ), + .A3(\blk00000003/blk00000249/sig00000a10 ), + .CE(\blk00000003/blk00000249/sig00000a29 ), + .CLK(clk), + .D(\blk00000003/sig00000348 ), + .Q(\blk00000003/blk00000249/sig00000a17 ), + .Q15(\NLW_blk00000003/blk00000249/blk0000026a_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000249/blk00000269 ( + .A0(\blk00000003/sig000004f3 ), + .A1(\blk00000003/sig000004f1 ), + .A2(\blk00000003/blk00000249/sig00000a10 ), + .A3(\blk00000003/blk00000249/sig00000a10 ), + .CE(\blk00000003/blk00000249/sig00000a29 ), + .CLK(clk), + .D(\blk00000003/sig00000346 ), + .Q(\blk00000003/blk00000249/sig00000a19 ), + .Q15(\NLW_blk00000003/blk00000249/blk00000269_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000249/blk00000268 ( + .A0(\blk00000003/sig000004f3 ), + .A1(\blk00000003/sig000004f1 ), + .A2(\blk00000003/blk00000249/sig00000a10 ), + .A3(\blk00000003/blk00000249/sig00000a10 ), + .CE(\blk00000003/blk00000249/sig00000a29 ), + .CLK(clk), + .D(\blk00000003/sig0000034a ), + .Q(\blk00000003/blk00000249/sig00000a15 ), + .Q15(\NLW_blk00000003/blk00000249/blk00000268_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000249/blk00000267 ( + .A0(\blk00000003/sig000004f3 ), + .A1(\blk00000003/sig000004f1 ), + .A2(\blk00000003/blk00000249/sig00000a10 ), + .A3(\blk00000003/blk00000249/sig00000a10 ), + .CE(\blk00000003/blk00000249/sig00000a29 ), + .CLK(clk), + .D(\blk00000003/sig0000034b ), + .Q(\blk00000003/blk00000249/sig00000a14 ), + .Q15(\NLW_blk00000003/blk00000249/blk00000267_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000249/blk00000266 ( + .A0(\blk00000003/sig000004f3 ), + .A1(\blk00000003/sig000004f1 ), + .A2(\blk00000003/blk00000249/sig00000a10 ), + .A3(\blk00000003/blk00000249/sig00000a10 ), + .CE(\blk00000003/blk00000249/sig00000a29 ), + .CLK(clk), + .D(\blk00000003/sig00000349 ), + .Q(\blk00000003/blk00000249/sig00000a16 ), + .Q15(\NLW_blk00000003/blk00000249/blk00000266_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000249/blk00000265 ( + .A0(\blk00000003/sig000004f3 ), + .A1(\blk00000003/sig000004f1 ), + .A2(\blk00000003/blk00000249/sig00000a10 ), + .A3(\blk00000003/blk00000249/sig00000a10 ), + .CE(\blk00000003/blk00000249/sig00000a29 ), + .CLK(clk), + .D(\blk00000003/sig0000034d ), + .Q(\blk00000003/blk00000249/sig00000a12 ), + .Q15(\NLW_blk00000003/blk00000249/blk00000265_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000249/blk00000264 ( + .A0(\blk00000003/sig000004f3 ), + .A1(\blk00000003/sig000004f1 ), + .A2(\blk00000003/blk00000249/sig00000a10 ), + .A3(\blk00000003/blk00000249/sig00000a10 ), + .CE(\blk00000003/blk00000249/sig00000a29 ), + .CLK(clk), + .D(\blk00000003/sig0000034e ), + .Q(\blk00000003/blk00000249/sig00000a11 ), + .Q15(\NLW_blk00000003/blk00000249/blk00000264_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000249/blk00000263 ( + .A0(\blk00000003/sig000004f3 ), + .A1(\blk00000003/sig000004f1 ), + .A2(\blk00000003/blk00000249/sig00000a10 ), + .A3(\blk00000003/blk00000249/sig00000a10 ), + .CE(\blk00000003/blk00000249/sig00000a29 ), + .CLK(clk), + .D(\blk00000003/sig0000034c ), + .Q(\blk00000003/blk00000249/sig00000a13 ), + .Q15(\NLW_blk00000003/blk00000249/blk00000263_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000249/blk00000262 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk00000249/sig00000a28 ), + .Q(\blk00000003/sig000004ab ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000249/blk00000261 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk00000249/sig00000a27 ), + .Q(\blk00000003/sig000004ac ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000249/blk00000260 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk00000249/sig00000a26 ), + .Q(\blk00000003/sig000004ad ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000249/blk0000025f ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk00000249/sig00000a25 ), + .Q(\blk00000003/sig000004ae ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000249/blk0000025e ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk00000249/sig00000a24 ), + .Q(\blk00000003/sig000004af ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000249/blk0000025d ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk00000249/sig00000a23 ), + .Q(\blk00000003/sig000004b0 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000249/blk0000025c ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk00000249/sig00000a22 ), + .Q(\blk00000003/sig000004b1 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000249/blk0000025b ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk00000249/sig00000a21 ), + .Q(\blk00000003/sig000004b2 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000249/blk0000025a ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk00000249/sig00000a20 ), + .Q(\blk00000003/sig000004b3 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000249/blk00000259 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk00000249/sig00000a1f ), + .Q(\blk00000003/sig000004b4 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000249/blk00000258 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk00000249/sig00000a1e ), + .Q(\blk00000003/sig000004b5 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000249/blk00000257 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk00000249/sig00000a1d ), + .Q(\blk00000003/sig000004b6 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000249/blk00000256 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk00000249/sig00000a1c ), + .Q(\blk00000003/sig000004b7 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000249/blk00000255 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk00000249/sig00000a1b ), + .Q(\blk00000003/sig000004b8 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000249/blk00000254 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk00000249/sig00000a1a ), + .Q(\blk00000003/sig000004b9 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000249/blk00000253 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk00000249/sig00000a19 ), + .Q(\blk00000003/sig000004ba ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000249/blk00000252 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk00000249/sig00000a18 ), + .Q(\blk00000003/sig000004bb ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000249/blk00000251 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk00000249/sig00000a17 ), + .Q(\blk00000003/sig000004bc ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000249/blk00000250 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk00000249/sig00000a16 ), + .Q(\blk00000003/sig000004bd ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000249/blk0000024f ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk00000249/sig00000a15 ), + .Q(\blk00000003/sig000004be ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000249/blk0000024e ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk00000249/sig00000a14 ), + .Q(\blk00000003/sig000004bf ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000249/blk0000024d ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk00000249/sig00000a13 ), + .Q(\blk00000003/sig000004c0 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000249/blk0000024c ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk00000249/sig00000a12 ), + .Q(\blk00000003/sig000004c1 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000249/blk0000024b ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk00000249/sig00000a11 ), + .Q(\blk00000003/sig000004c2 ) + ); + GND \blk00000003/blk00000249/blk0000024a ( + .G(\blk00000003/blk00000249/sig00000a10 ) + ); + LUT2 #( + .INIT ( 4'h8 )) + \blk00000003/blk0000027c/blk000002ae ( + .I0(ce), + .I1(\blk00000003/sig000004e3 ), + .O(\blk00000003/blk0000027c/sig00000a78 ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk0000027c/blk000002ad ( + .A0(\blk00000003/sig000004ef ), + .A1(\blk00000003/sig000004ed ), + .A2(\blk00000003/blk0000027c/sig00000a5f ), + .A3(\blk00000003/blk0000027c/sig00000a5f ), + .CE(\blk00000003/blk0000027c/sig00000a78 ), + .CLK(clk), + .D(\blk00000003/sig00000540 ), + .Q(\blk00000003/blk0000027c/sig00000a76 ), + .Q15(\NLW_blk00000003/blk0000027c/blk000002ad_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk0000027c/blk000002ac ( + .A0(\blk00000003/sig000004ef ), + .A1(\blk00000003/sig000004ed ), + .A2(\blk00000003/blk0000027c/sig00000a5f ), + .A3(\blk00000003/blk0000027c/sig00000a5f ), + .CE(\blk00000003/blk0000027c/sig00000a78 ), + .CLK(clk), + .D(\blk00000003/sig00000541 ), + .Q(\blk00000003/blk0000027c/sig00000a75 ), + .Q15(\NLW_blk00000003/blk0000027c/blk000002ac_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk0000027c/blk000002ab ( + .A0(\blk00000003/sig000004ef ), + .A1(\blk00000003/sig000004ed ), + .A2(\blk00000003/blk0000027c/sig00000a5f ), + .A3(\blk00000003/blk0000027c/sig00000a5f ), + .CE(\blk00000003/blk0000027c/sig00000a78 ), + .CLK(clk), + .D(\blk00000003/sig0000053f ), + .Q(\blk00000003/blk0000027c/sig00000a77 ), + .Q15(\NLW_blk00000003/blk0000027c/blk000002ab_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk0000027c/blk000002aa ( + .A0(\blk00000003/sig000004ef ), + .A1(\blk00000003/sig000004ed ), + .A2(\blk00000003/blk0000027c/sig00000a5f ), + .A3(\blk00000003/blk0000027c/sig00000a5f ), + .CE(\blk00000003/blk0000027c/sig00000a78 ), + .CLK(clk), + .D(\blk00000003/sig00000543 ), + .Q(\blk00000003/blk0000027c/sig00000a73 ), + .Q15(\NLW_blk00000003/blk0000027c/blk000002aa_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk0000027c/blk000002a9 ( + .A0(\blk00000003/sig000004ef ), + .A1(\blk00000003/sig000004ed ), + .A2(\blk00000003/blk0000027c/sig00000a5f ), + .A3(\blk00000003/blk0000027c/sig00000a5f ), + .CE(\blk00000003/blk0000027c/sig00000a78 ), + .CLK(clk), + .D(\blk00000003/sig00000544 ), + .Q(\blk00000003/blk0000027c/sig00000a72 ), + .Q15(\NLW_blk00000003/blk0000027c/blk000002a9_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk0000027c/blk000002a8 ( + .A0(\blk00000003/sig000004ef ), + .A1(\blk00000003/sig000004ed ), + .A2(\blk00000003/blk0000027c/sig00000a5f ), + .A3(\blk00000003/blk0000027c/sig00000a5f ), + .CE(\blk00000003/blk0000027c/sig00000a78 ), + .CLK(clk), + .D(\blk00000003/sig00000542 ), + .Q(\blk00000003/blk0000027c/sig00000a74 ), + .Q15(\NLW_blk00000003/blk0000027c/blk000002a8_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk0000027c/blk000002a7 ( + .A0(\blk00000003/sig000004ef ), + .A1(\blk00000003/sig000004ed ), + .A2(\blk00000003/blk0000027c/sig00000a5f ), + .A3(\blk00000003/blk0000027c/sig00000a5f ), + .CE(\blk00000003/blk0000027c/sig00000a78 ), + .CLK(clk), + .D(\blk00000003/sig00000546 ), + .Q(\blk00000003/blk0000027c/sig00000a70 ), + .Q15(\NLW_blk00000003/blk0000027c/blk000002a7_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk0000027c/blk000002a6 ( + .A0(\blk00000003/sig000004ef ), + .A1(\blk00000003/sig000004ed ), + .A2(\blk00000003/blk0000027c/sig00000a5f ), + .A3(\blk00000003/blk0000027c/sig00000a5f ), + .CE(\blk00000003/blk0000027c/sig00000a78 ), + .CLK(clk), + .D(\blk00000003/sig00000547 ), + .Q(\blk00000003/blk0000027c/sig00000a6f ), + .Q15(\NLW_blk00000003/blk0000027c/blk000002a6_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk0000027c/blk000002a5 ( + .A0(\blk00000003/sig000004ef ), + .A1(\blk00000003/sig000004ed ), + .A2(\blk00000003/blk0000027c/sig00000a5f ), + .A3(\blk00000003/blk0000027c/sig00000a5f ), + .CE(\blk00000003/blk0000027c/sig00000a78 ), + .CLK(clk), + .D(\blk00000003/sig00000545 ), + .Q(\blk00000003/blk0000027c/sig00000a71 ), + .Q15(\NLW_blk00000003/blk0000027c/blk000002a5_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk0000027c/blk000002a4 ( + .A0(\blk00000003/sig000004ef ), + .A1(\blk00000003/sig000004ed ), + .A2(\blk00000003/blk0000027c/sig00000a5f ), + .A3(\blk00000003/blk0000027c/sig00000a5f ), + .CE(\blk00000003/blk0000027c/sig00000a78 ), + .CLK(clk), + .D(\blk00000003/sig00000549 ), + .Q(\blk00000003/blk0000027c/sig00000a6d ), + .Q15(\NLW_blk00000003/blk0000027c/blk000002a4_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk0000027c/blk000002a3 ( + .A0(\blk00000003/sig000004ef ), + .A1(\blk00000003/sig000004ed ), + .A2(\blk00000003/blk0000027c/sig00000a5f ), + .A3(\blk00000003/blk0000027c/sig00000a5f ), + .CE(\blk00000003/blk0000027c/sig00000a78 ), + .CLK(clk), + .D(\blk00000003/sig0000054a ), + .Q(\blk00000003/blk0000027c/sig00000a6c ), + .Q15(\NLW_blk00000003/blk0000027c/blk000002a3_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk0000027c/blk000002a2 ( + .A0(\blk00000003/sig000004ef ), + .A1(\blk00000003/sig000004ed ), + .A2(\blk00000003/blk0000027c/sig00000a5f ), + .A3(\blk00000003/blk0000027c/sig00000a5f ), + .CE(\blk00000003/blk0000027c/sig00000a78 ), + .CLK(clk), + .D(\blk00000003/sig00000548 ), + .Q(\blk00000003/blk0000027c/sig00000a6e ), + .Q15(\NLW_blk00000003/blk0000027c/blk000002a2_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk0000027c/blk000002a1 ( + .A0(\blk00000003/sig000004ef ), + .A1(\blk00000003/sig000004ed ), + .A2(\blk00000003/blk0000027c/sig00000a5f ), + .A3(\blk00000003/blk0000027c/sig00000a5f ), + .CE(\blk00000003/blk0000027c/sig00000a78 ), + .CLK(clk), + .D(\blk00000003/sig0000054c ), + .Q(\blk00000003/blk0000027c/sig00000a6a ), + .Q15(\NLW_blk00000003/blk0000027c/blk000002a1_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk0000027c/blk000002a0 ( + .A0(\blk00000003/sig000004ef ), + .A1(\blk00000003/sig000004ed ), + .A2(\blk00000003/blk0000027c/sig00000a5f ), + .A3(\blk00000003/blk0000027c/sig00000a5f ), + .CE(\blk00000003/blk0000027c/sig00000a78 ), + .CLK(clk), + .D(\blk00000003/sig0000054d ), + .Q(\blk00000003/blk0000027c/sig00000a69 ), + .Q15(\NLW_blk00000003/blk0000027c/blk000002a0_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk0000027c/blk0000029f ( + .A0(\blk00000003/sig000004ef ), + .A1(\blk00000003/sig000004ed ), + .A2(\blk00000003/blk0000027c/sig00000a5f ), + .A3(\blk00000003/blk0000027c/sig00000a5f ), + .CE(\blk00000003/blk0000027c/sig00000a78 ), + .CLK(clk), + .D(\blk00000003/sig0000054b ), + .Q(\blk00000003/blk0000027c/sig00000a6b ), + .Q15(\NLW_blk00000003/blk0000027c/blk0000029f_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk0000027c/blk0000029e ( + .A0(\blk00000003/sig000004ef ), + .A1(\blk00000003/sig000004ed ), + .A2(\blk00000003/blk0000027c/sig00000a5f ), + .A3(\blk00000003/blk0000027c/sig00000a5f ), + .CE(\blk00000003/blk0000027c/sig00000a78 ), + .CLK(clk), + .D(\blk00000003/sig0000054f ), + .Q(\blk00000003/blk0000027c/sig00000a67 ), + .Q15(\NLW_blk00000003/blk0000027c/blk0000029e_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk0000027c/blk0000029d ( + .A0(\blk00000003/sig000004ef ), + .A1(\blk00000003/sig000004ed ), + .A2(\blk00000003/blk0000027c/sig00000a5f ), + .A3(\blk00000003/blk0000027c/sig00000a5f ), + .CE(\blk00000003/blk0000027c/sig00000a78 ), + .CLK(clk), + .D(\blk00000003/sig00000550 ), + .Q(\blk00000003/blk0000027c/sig00000a66 ), + .Q15(\NLW_blk00000003/blk0000027c/blk0000029d_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk0000027c/blk0000029c ( + .A0(\blk00000003/sig000004ef ), + .A1(\blk00000003/sig000004ed ), + .A2(\blk00000003/blk0000027c/sig00000a5f ), + .A3(\blk00000003/blk0000027c/sig00000a5f ), + .CE(\blk00000003/blk0000027c/sig00000a78 ), + .CLK(clk), + .D(\blk00000003/sig0000054e ), + .Q(\blk00000003/blk0000027c/sig00000a68 ), + .Q15(\NLW_blk00000003/blk0000027c/blk0000029c_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk0000027c/blk0000029b ( + .A0(\blk00000003/sig000004ef ), + .A1(\blk00000003/sig000004ed ), + .A2(\blk00000003/blk0000027c/sig00000a5f ), + .A3(\blk00000003/blk0000027c/sig00000a5f ), + .CE(\blk00000003/blk0000027c/sig00000a78 ), + .CLK(clk), + .D(\blk00000003/sig00000552 ), + .Q(\blk00000003/blk0000027c/sig00000a64 ), + .Q15(\NLW_blk00000003/blk0000027c/blk0000029b_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk0000027c/blk0000029a ( + .A0(\blk00000003/sig000004ef ), + .A1(\blk00000003/sig000004ed ), + .A2(\blk00000003/blk0000027c/sig00000a5f ), + .A3(\blk00000003/blk0000027c/sig00000a5f ), + .CE(\blk00000003/blk0000027c/sig00000a78 ), + .CLK(clk), + .D(\blk00000003/sig00000553 ), + .Q(\blk00000003/blk0000027c/sig00000a63 ), + .Q15(\NLW_blk00000003/blk0000027c/blk0000029a_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk0000027c/blk00000299 ( + .A0(\blk00000003/sig000004ef ), + .A1(\blk00000003/sig000004ed ), + .A2(\blk00000003/blk0000027c/sig00000a5f ), + .A3(\blk00000003/blk0000027c/sig00000a5f ), + .CE(\blk00000003/blk0000027c/sig00000a78 ), + .CLK(clk), + .D(\blk00000003/sig00000551 ), + .Q(\blk00000003/blk0000027c/sig00000a65 ), + .Q15(\NLW_blk00000003/blk0000027c/blk00000299_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk0000027c/blk00000298 ( + .A0(\blk00000003/sig000004ef ), + .A1(\blk00000003/sig000004ed ), + .A2(\blk00000003/blk0000027c/sig00000a5f ), + .A3(\blk00000003/blk0000027c/sig00000a5f ), + .CE(\blk00000003/blk0000027c/sig00000a78 ), + .CLK(clk), + .D(\blk00000003/sig00000555 ), + .Q(\blk00000003/blk0000027c/sig00000a61 ), + .Q15(\NLW_blk00000003/blk0000027c/blk00000298_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk0000027c/blk00000297 ( + .A0(\blk00000003/sig000004ef ), + .A1(\blk00000003/sig000004ed ), + .A2(\blk00000003/blk0000027c/sig00000a5f ), + .A3(\blk00000003/blk0000027c/sig00000a5f ), + .CE(\blk00000003/blk0000027c/sig00000a78 ), + .CLK(clk), + .D(\blk00000003/sig00000556 ), + .Q(\blk00000003/blk0000027c/sig00000a60 ), + .Q15(\NLW_blk00000003/blk0000027c/blk00000297_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk0000027c/blk00000296 ( + .A0(\blk00000003/sig000004ef ), + .A1(\blk00000003/sig000004ed ), + .A2(\blk00000003/blk0000027c/sig00000a5f ), + .A3(\blk00000003/blk0000027c/sig00000a5f ), + .CE(\blk00000003/blk0000027c/sig00000a78 ), + .CLK(clk), + .D(\blk00000003/sig00000554 ), + .Q(\blk00000003/blk0000027c/sig00000a62 ), + .Q15(\NLW_blk00000003/blk0000027c/blk00000296_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk0000027c/blk00000295 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk0000027c/sig00000a77 ), + .Q(\blk00000003/sig000004c3 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk0000027c/blk00000294 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk0000027c/sig00000a76 ), + .Q(\blk00000003/sig000004c4 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk0000027c/blk00000293 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk0000027c/sig00000a75 ), + .Q(\blk00000003/sig000004c5 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk0000027c/blk00000292 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk0000027c/sig00000a74 ), + .Q(\blk00000003/sig000004c6 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk0000027c/blk00000291 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk0000027c/sig00000a73 ), + .Q(\blk00000003/sig000004c7 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk0000027c/blk00000290 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk0000027c/sig00000a72 ), + .Q(\blk00000003/sig000004c8 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk0000027c/blk0000028f ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk0000027c/sig00000a71 ), + .Q(\blk00000003/sig000004c9 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk0000027c/blk0000028e ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk0000027c/sig00000a70 ), + .Q(\blk00000003/sig000004ca ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk0000027c/blk0000028d ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk0000027c/sig00000a6f ), + .Q(\blk00000003/sig000004cb ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk0000027c/blk0000028c ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk0000027c/sig00000a6e ), + .Q(\blk00000003/sig000004cc ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk0000027c/blk0000028b ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk0000027c/sig00000a6d ), + .Q(\blk00000003/sig000004cd ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk0000027c/blk0000028a ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk0000027c/sig00000a6c ), + .Q(\blk00000003/sig000004ce ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk0000027c/blk00000289 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk0000027c/sig00000a6b ), + .Q(\blk00000003/sig000004cf ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk0000027c/blk00000288 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk0000027c/sig00000a6a ), + .Q(\blk00000003/sig000004d0 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk0000027c/blk00000287 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk0000027c/sig00000a69 ), + .Q(\blk00000003/sig000004d1 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk0000027c/blk00000286 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk0000027c/sig00000a68 ), + .Q(\blk00000003/sig000004d2 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk0000027c/blk00000285 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk0000027c/sig00000a67 ), + .Q(\blk00000003/sig000004d3 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk0000027c/blk00000284 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk0000027c/sig00000a66 ), + .Q(\blk00000003/sig000004d4 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk0000027c/blk00000283 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk0000027c/sig00000a65 ), + .Q(\blk00000003/sig000004d5 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk0000027c/blk00000282 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk0000027c/sig00000a64 ), + .Q(\blk00000003/sig000004d6 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk0000027c/blk00000281 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk0000027c/sig00000a63 ), + .Q(\blk00000003/sig000004d7 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk0000027c/blk00000280 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk0000027c/sig00000a62 ), + .Q(\blk00000003/sig000004d8 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk0000027c/blk0000027f ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk0000027c/sig00000a61 ), + .Q(\blk00000003/sig000004d9 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk0000027c/blk0000027e ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk0000027c/sig00000a60 ), + .Q(\blk00000003/sig000004da ) + ); + GND \blk00000003/blk0000027c/blk0000027d ( + .G(\blk00000003/blk0000027c/sig00000a5f ) + ); + LUT2 #( + .INIT ( 4'h8 )) + \blk00000003/blk000002af/blk000002e1 ( + .I0(ce), + .I1(\blk00000003/sig000004f6 ), + .O(\blk00000003/blk000002af/sig00000ac7 ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk000002af/blk000002e0 ( + .A0(\blk00000003/sig000002b1 ), + .A1(\blk00000003/sig000002b0 ), + .A2(\blk00000003/blk000002af/sig00000aae ), + .A3(\blk00000003/blk000002af/sig00000aae ), + .CE(\blk00000003/blk000002af/sig00000ac7 ), + .CLK(clk), + .D(\blk00000003/sig00000558 ), + .Q(\blk00000003/blk000002af/sig00000ac5 ), + .Q15(\NLW_blk00000003/blk000002af/blk000002e0_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk000002af/blk000002df ( + .A0(\blk00000003/sig000002b1 ), + .A1(\blk00000003/sig000002b0 ), + .A2(\blk00000003/blk000002af/sig00000aae ), + .A3(\blk00000003/blk000002af/sig00000aae ), + .CE(\blk00000003/blk000002af/sig00000ac7 ), + .CLK(clk), + .D(\blk00000003/sig00000559 ), + .Q(\blk00000003/blk000002af/sig00000ac4 ), + .Q15(\NLW_blk00000003/blk000002af/blk000002df_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk000002af/blk000002de ( + .A0(\blk00000003/sig000002b1 ), + .A1(\blk00000003/sig000002b0 ), + .A2(\blk00000003/blk000002af/sig00000aae ), + .A3(\blk00000003/blk000002af/sig00000aae ), + .CE(\blk00000003/blk000002af/sig00000ac7 ), + .CLK(clk), + .D(\blk00000003/sig00000557 ), + .Q(\blk00000003/blk000002af/sig00000ac6 ), + .Q15(\NLW_blk00000003/blk000002af/blk000002de_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk000002af/blk000002dd ( + .A0(\blk00000003/sig000002b1 ), + .A1(\blk00000003/sig000002b0 ), + .A2(\blk00000003/blk000002af/sig00000aae ), + .A3(\blk00000003/blk000002af/sig00000aae ), + .CE(\blk00000003/blk000002af/sig00000ac7 ), + .CLK(clk), + .D(\blk00000003/sig0000055b ), + .Q(\blk00000003/blk000002af/sig00000ac2 ), + .Q15(\NLW_blk00000003/blk000002af/blk000002dd_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk000002af/blk000002dc ( + .A0(\blk00000003/sig000002b1 ), + .A1(\blk00000003/sig000002b0 ), + .A2(\blk00000003/blk000002af/sig00000aae ), + .A3(\blk00000003/blk000002af/sig00000aae ), + .CE(\blk00000003/blk000002af/sig00000ac7 ), + .CLK(clk), + .D(\blk00000003/sig0000055c ), + .Q(\blk00000003/blk000002af/sig00000ac1 ), + .Q15(\NLW_blk00000003/blk000002af/blk000002dc_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk000002af/blk000002db ( + .A0(\blk00000003/sig000002b1 ), + .A1(\blk00000003/sig000002b0 ), + .A2(\blk00000003/blk000002af/sig00000aae ), + .A3(\blk00000003/blk000002af/sig00000aae ), + .CE(\blk00000003/blk000002af/sig00000ac7 ), + .CLK(clk), + .D(\blk00000003/sig0000055a ), + .Q(\blk00000003/blk000002af/sig00000ac3 ), + .Q15(\NLW_blk00000003/blk000002af/blk000002db_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk000002af/blk000002da ( + .A0(\blk00000003/sig000002b1 ), + .A1(\blk00000003/sig000002b0 ), + .A2(\blk00000003/blk000002af/sig00000aae ), + .A3(\blk00000003/blk000002af/sig00000aae ), + .CE(\blk00000003/blk000002af/sig00000ac7 ), + .CLK(clk), + .D(\blk00000003/sig0000055e ), + .Q(\blk00000003/blk000002af/sig00000abf ), + .Q15(\NLW_blk00000003/blk000002af/blk000002da_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk000002af/blk000002d9 ( + .A0(\blk00000003/sig000002b1 ), + .A1(\blk00000003/sig000002b0 ), + .A2(\blk00000003/blk000002af/sig00000aae ), + .A3(\blk00000003/blk000002af/sig00000aae ), + .CE(\blk00000003/blk000002af/sig00000ac7 ), + .CLK(clk), + .D(\blk00000003/sig0000055f ), + .Q(\blk00000003/blk000002af/sig00000abe ), + .Q15(\NLW_blk00000003/blk000002af/blk000002d9_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk000002af/blk000002d8 ( + .A0(\blk00000003/sig000002b1 ), + .A1(\blk00000003/sig000002b0 ), + .A2(\blk00000003/blk000002af/sig00000aae ), + .A3(\blk00000003/blk000002af/sig00000aae ), + .CE(\blk00000003/blk000002af/sig00000ac7 ), + .CLK(clk), + .D(\blk00000003/sig0000055d ), + .Q(\blk00000003/blk000002af/sig00000ac0 ), + .Q15(\NLW_blk00000003/blk000002af/blk000002d8_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk000002af/blk000002d7 ( + .A0(\blk00000003/sig000002b1 ), + .A1(\blk00000003/sig000002b0 ), + .A2(\blk00000003/blk000002af/sig00000aae ), + .A3(\blk00000003/blk000002af/sig00000aae ), + .CE(\blk00000003/blk000002af/sig00000ac7 ), + .CLK(clk), + .D(\blk00000003/sig00000561 ), + .Q(\blk00000003/blk000002af/sig00000abc ), + .Q15(\NLW_blk00000003/blk000002af/blk000002d7_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk000002af/blk000002d6 ( + .A0(\blk00000003/sig000002b1 ), + .A1(\blk00000003/sig000002b0 ), + .A2(\blk00000003/blk000002af/sig00000aae ), + .A3(\blk00000003/blk000002af/sig00000aae ), + .CE(\blk00000003/blk000002af/sig00000ac7 ), + .CLK(clk), + .D(\blk00000003/sig00000562 ), + .Q(\blk00000003/blk000002af/sig00000abb ), + .Q15(\NLW_blk00000003/blk000002af/blk000002d6_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk000002af/blk000002d5 ( + .A0(\blk00000003/sig000002b1 ), + .A1(\blk00000003/sig000002b0 ), + .A2(\blk00000003/blk000002af/sig00000aae ), + .A3(\blk00000003/blk000002af/sig00000aae ), + .CE(\blk00000003/blk000002af/sig00000ac7 ), + .CLK(clk), + .D(\blk00000003/sig00000560 ), + .Q(\blk00000003/blk000002af/sig00000abd ), + .Q15(\NLW_blk00000003/blk000002af/blk000002d5_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk000002af/blk000002d4 ( + .A0(\blk00000003/sig000002b1 ), + .A1(\blk00000003/sig000002b0 ), + .A2(\blk00000003/blk000002af/sig00000aae ), + .A3(\blk00000003/blk000002af/sig00000aae ), + .CE(\blk00000003/blk000002af/sig00000ac7 ), + .CLK(clk), + .D(\blk00000003/sig00000564 ), + .Q(\blk00000003/blk000002af/sig00000ab9 ), + .Q15(\NLW_blk00000003/blk000002af/blk000002d4_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk000002af/blk000002d3 ( + .A0(\blk00000003/sig000002b1 ), + .A1(\blk00000003/sig000002b0 ), + .A2(\blk00000003/blk000002af/sig00000aae ), + .A3(\blk00000003/blk000002af/sig00000aae ), + .CE(\blk00000003/blk000002af/sig00000ac7 ), + .CLK(clk), + .D(\blk00000003/sig00000565 ), + .Q(\blk00000003/blk000002af/sig00000ab8 ), + .Q15(\NLW_blk00000003/blk000002af/blk000002d3_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk000002af/blk000002d2 ( + .A0(\blk00000003/sig000002b1 ), + .A1(\blk00000003/sig000002b0 ), + .A2(\blk00000003/blk000002af/sig00000aae ), + .A3(\blk00000003/blk000002af/sig00000aae ), + .CE(\blk00000003/blk000002af/sig00000ac7 ), + .CLK(clk), + .D(\blk00000003/sig00000563 ), + .Q(\blk00000003/blk000002af/sig00000aba ), + .Q15(\NLW_blk00000003/blk000002af/blk000002d2_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk000002af/blk000002d1 ( + .A0(\blk00000003/sig000002b1 ), + .A1(\blk00000003/sig000002b0 ), + .A2(\blk00000003/blk000002af/sig00000aae ), + .A3(\blk00000003/blk000002af/sig00000aae ), + .CE(\blk00000003/blk000002af/sig00000ac7 ), + .CLK(clk), + .D(\blk00000003/sig00000567 ), + .Q(\blk00000003/blk000002af/sig00000ab6 ), + .Q15(\NLW_blk00000003/blk000002af/blk000002d1_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk000002af/blk000002d0 ( + .A0(\blk00000003/sig000002b1 ), + .A1(\blk00000003/sig000002b0 ), + .A2(\blk00000003/blk000002af/sig00000aae ), + .A3(\blk00000003/blk000002af/sig00000aae ), + .CE(\blk00000003/blk000002af/sig00000ac7 ), + .CLK(clk), + .D(\blk00000003/sig00000568 ), + .Q(\blk00000003/blk000002af/sig00000ab5 ), + .Q15(\NLW_blk00000003/blk000002af/blk000002d0_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk000002af/blk000002cf ( + .A0(\blk00000003/sig000002b1 ), + .A1(\blk00000003/sig000002b0 ), + .A2(\blk00000003/blk000002af/sig00000aae ), + .A3(\blk00000003/blk000002af/sig00000aae ), + .CE(\blk00000003/blk000002af/sig00000ac7 ), + .CLK(clk), + .D(\blk00000003/sig00000566 ), + .Q(\blk00000003/blk000002af/sig00000ab7 ), + .Q15(\NLW_blk00000003/blk000002af/blk000002cf_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk000002af/blk000002ce ( + .A0(\blk00000003/sig000002b1 ), + .A1(\blk00000003/sig000002b0 ), + .A2(\blk00000003/blk000002af/sig00000aae ), + .A3(\blk00000003/blk000002af/sig00000aae ), + .CE(\blk00000003/blk000002af/sig00000ac7 ), + .CLK(clk), + .D(\blk00000003/sig0000056a ), + .Q(\blk00000003/blk000002af/sig00000ab3 ), + .Q15(\NLW_blk00000003/blk000002af/blk000002ce_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk000002af/blk000002cd ( + .A0(\blk00000003/sig000002b1 ), + .A1(\blk00000003/sig000002b0 ), + .A2(\blk00000003/blk000002af/sig00000aae ), + .A3(\blk00000003/blk000002af/sig00000aae ), + .CE(\blk00000003/blk000002af/sig00000ac7 ), + .CLK(clk), + .D(\blk00000003/sig0000056b ), + .Q(\blk00000003/blk000002af/sig00000ab2 ), + .Q15(\NLW_blk00000003/blk000002af/blk000002cd_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk000002af/blk000002cc ( + .A0(\blk00000003/sig000002b1 ), + .A1(\blk00000003/sig000002b0 ), + .A2(\blk00000003/blk000002af/sig00000aae ), + .A3(\blk00000003/blk000002af/sig00000aae ), + .CE(\blk00000003/blk000002af/sig00000ac7 ), + .CLK(clk), + .D(\blk00000003/sig00000569 ), + .Q(\blk00000003/blk000002af/sig00000ab4 ), + .Q15(\NLW_blk00000003/blk000002af/blk000002cc_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk000002af/blk000002cb ( + .A0(\blk00000003/sig000002b1 ), + .A1(\blk00000003/sig000002b0 ), + .A2(\blk00000003/blk000002af/sig00000aae ), + .A3(\blk00000003/blk000002af/sig00000aae ), + .CE(\blk00000003/blk000002af/sig00000ac7 ), + .CLK(clk), + .D(\blk00000003/sig0000056d ), + .Q(\blk00000003/blk000002af/sig00000ab0 ), + .Q15(\NLW_blk00000003/blk000002af/blk000002cb_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk000002af/blk000002ca ( + .A0(\blk00000003/sig000002b1 ), + .A1(\blk00000003/sig000002b0 ), + .A2(\blk00000003/blk000002af/sig00000aae ), + .A3(\blk00000003/blk000002af/sig00000aae ), + .CE(\blk00000003/blk000002af/sig00000ac7 ), + .CLK(clk), + .D(\blk00000003/sig0000056e ), + .Q(\blk00000003/blk000002af/sig00000aaf ), + .Q15(\NLW_blk00000003/blk000002af/blk000002ca_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk000002af/blk000002c9 ( + .A0(\blk00000003/sig000002b1 ), + .A1(\blk00000003/sig000002b0 ), + .A2(\blk00000003/blk000002af/sig00000aae ), + .A3(\blk00000003/blk000002af/sig00000aae ), + .CE(\blk00000003/blk000002af/sig00000ac7 ), + .CLK(clk), + .D(\blk00000003/sig0000056c ), + .Q(\blk00000003/blk000002af/sig00000ab1 ), + .Q15(\NLW_blk00000003/blk000002af/blk000002c9_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000002af/blk000002c8 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk000002af/sig00000ac6 ), + .Q(\blk00000003/sig000002d7 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000002af/blk000002c7 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk000002af/sig00000ac5 ), + .Q(\blk00000003/sig000002d8 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000002af/blk000002c6 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk000002af/sig00000ac4 ), + .Q(\blk00000003/sig000002d9 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000002af/blk000002c5 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk000002af/sig00000ac3 ), + .Q(\blk00000003/sig000002da ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000002af/blk000002c4 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk000002af/sig00000ac2 ), + .Q(\blk00000003/sig000002db ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000002af/blk000002c3 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk000002af/sig00000ac1 ), + .Q(\blk00000003/sig000002dc ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000002af/blk000002c2 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk000002af/sig00000ac0 ), + .Q(\blk00000003/sig000002dd ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000002af/blk000002c1 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk000002af/sig00000abf ), + .Q(\blk00000003/sig000002de ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000002af/blk000002c0 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk000002af/sig00000abe ), + .Q(\blk00000003/sig000002df ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000002af/blk000002bf ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk000002af/sig00000abd ), + .Q(\blk00000003/sig000002e0 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000002af/blk000002be ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk000002af/sig00000abc ), + .Q(\blk00000003/sig000002e1 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000002af/blk000002bd ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk000002af/sig00000abb ), + .Q(\blk00000003/sig000002e2 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000002af/blk000002bc ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk000002af/sig00000aba ), + .Q(\blk00000003/sig000002e3 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000002af/blk000002bb ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk000002af/sig00000ab9 ), + .Q(\blk00000003/sig000002e4 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000002af/blk000002ba ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk000002af/sig00000ab8 ), + .Q(\blk00000003/sig000002e5 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000002af/blk000002b9 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk000002af/sig00000ab7 ), + .Q(\blk00000003/sig000002e6 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000002af/blk000002b8 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk000002af/sig00000ab6 ), + .Q(\blk00000003/sig000002e7 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000002af/blk000002b7 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk000002af/sig00000ab5 ), + .Q(\blk00000003/sig000002e8 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000002af/blk000002b6 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk000002af/sig00000ab4 ), + .Q(\blk00000003/sig000002e9 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000002af/blk000002b5 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk000002af/sig00000ab3 ), + .Q(\blk00000003/sig000002ea ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000002af/blk000002b4 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk000002af/sig00000ab2 ), + .Q(\blk00000003/sig000002eb ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000002af/blk000002b3 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk000002af/sig00000ab1 ), + .Q(\blk00000003/sig000002ec ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000002af/blk000002b2 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk000002af/sig00000ab0 ), + .Q(\blk00000003/sig000002ed ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000002af/blk000002b1 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk000002af/sig00000aaf ), + .Q(\blk00000003/sig000002ee ) + ); + GND \blk00000003/blk000002af/blk000002b0 ( + .G(\blk00000003/blk000002af/sig00000aae ) + ); + LUT2 #( + .INIT ( 4'h8 )) + \blk00000003/blk000002e2/blk00000314 ( + .I0(ce), + .I1(\blk00000003/sig000004f5 ), + .O(\blk00000003/blk000002e2/sig00000b16 ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk000002e2/blk00000313 ( + .A0(\blk00000003/sig000002b8 ), + .A1(\blk00000003/sig000002b7 ), + .A2(\blk00000003/blk000002e2/sig00000afd ), + .A3(\blk00000003/blk000002e2/sig00000afd ), + .CE(\blk00000003/blk000002e2/sig00000b16 ), + .CLK(clk), + .D(\blk00000003/sig00000570 ), + .Q(\blk00000003/blk000002e2/sig00000b14 ), + .Q15(\NLW_blk00000003/blk000002e2/blk00000313_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk000002e2/blk00000312 ( + .A0(\blk00000003/sig000002b8 ), + .A1(\blk00000003/sig000002b7 ), + .A2(\blk00000003/blk000002e2/sig00000afd ), + .A3(\blk00000003/blk000002e2/sig00000afd ), + .CE(\blk00000003/blk000002e2/sig00000b16 ), + .CLK(clk), + .D(\blk00000003/sig00000571 ), + .Q(\blk00000003/blk000002e2/sig00000b13 ), + .Q15(\NLW_blk00000003/blk000002e2/blk00000312_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk000002e2/blk00000311 ( + .A0(\blk00000003/sig000002b8 ), + .A1(\blk00000003/sig000002b7 ), + .A2(\blk00000003/blk000002e2/sig00000afd ), + .A3(\blk00000003/blk000002e2/sig00000afd ), + .CE(\blk00000003/blk000002e2/sig00000b16 ), + .CLK(clk), + .D(\blk00000003/sig0000056f ), + .Q(\blk00000003/blk000002e2/sig00000b15 ), + .Q15(\NLW_blk00000003/blk000002e2/blk00000311_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk000002e2/blk00000310 ( + .A0(\blk00000003/sig000002b8 ), + .A1(\blk00000003/sig000002b7 ), + .A2(\blk00000003/blk000002e2/sig00000afd ), + .A3(\blk00000003/blk000002e2/sig00000afd ), + .CE(\blk00000003/blk000002e2/sig00000b16 ), + .CLK(clk), + .D(\blk00000003/sig00000573 ), + .Q(\blk00000003/blk000002e2/sig00000b11 ), + .Q15(\NLW_blk00000003/blk000002e2/blk00000310_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk000002e2/blk0000030f ( + .A0(\blk00000003/sig000002b8 ), + .A1(\blk00000003/sig000002b7 ), + .A2(\blk00000003/blk000002e2/sig00000afd ), + .A3(\blk00000003/blk000002e2/sig00000afd ), + .CE(\blk00000003/blk000002e2/sig00000b16 ), + .CLK(clk), + .D(\blk00000003/sig00000574 ), + .Q(\blk00000003/blk000002e2/sig00000b10 ), + .Q15(\NLW_blk00000003/blk000002e2/blk0000030f_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk000002e2/blk0000030e ( + .A0(\blk00000003/sig000002b8 ), + .A1(\blk00000003/sig000002b7 ), + .A2(\blk00000003/blk000002e2/sig00000afd ), + .A3(\blk00000003/blk000002e2/sig00000afd ), + .CE(\blk00000003/blk000002e2/sig00000b16 ), + .CLK(clk), + .D(\blk00000003/sig00000572 ), + .Q(\blk00000003/blk000002e2/sig00000b12 ), + .Q15(\NLW_blk00000003/blk000002e2/blk0000030e_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk000002e2/blk0000030d ( + .A0(\blk00000003/sig000002b8 ), + .A1(\blk00000003/sig000002b7 ), + .A2(\blk00000003/blk000002e2/sig00000afd ), + .A3(\blk00000003/blk000002e2/sig00000afd ), + .CE(\blk00000003/blk000002e2/sig00000b16 ), + .CLK(clk), + .D(\blk00000003/sig00000576 ), + .Q(\blk00000003/blk000002e2/sig00000b0e ), + .Q15(\NLW_blk00000003/blk000002e2/blk0000030d_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk000002e2/blk0000030c ( + .A0(\blk00000003/sig000002b8 ), + .A1(\blk00000003/sig000002b7 ), + .A2(\blk00000003/blk000002e2/sig00000afd ), + .A3(\blk00000003/blk000002e2/sig00000afd ), + .CE(\blk00000003/blk000002e2/sig00000b16 ), + .CLK(clk), + .D(\blk00000003/sig00000577 ), + .Q(\blk00000003/blk000002e2/sig00000b0d ), + .Q15(\NLW_blk00000003/blk000002e2/blk0000030c_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk000002e2/blk0000030b ( + .A0(\blk00000003/sig000002b8 ), + .A1(\blk00000003/sig000002b7 ), + .A2(\blk00000003/blk000002e2/sig00000afd ), + .A3(\blk00000003/blk000002e2/sig00000afd ), + .CE(\blk00000003/blk000002e2/sig00000b16 ), + .CLK(clk), + .D(\blk00000003/sig00000575 ), + .Q(\blk00000003/blk000002e2/sig00000b0f ), + .Q15(\NLW_blk00000003/blk000002e2/blk0000030b_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk000002e2/blk0000030a ( + .A0(\blk00000003/sig000002b8 ), + .A1(\blk00000003/sig000002b7 ), + .A2(\blk00000003/blk000002e2/sig00000afd ), + .A3(\blk00000003/blk000002e2/sig00000afd ), + .CE(\blk00000003/blk000002e2/sig00000b16 ), + .CLK(clk), + .D(\blk00000003/sig00000579 ), + .Q(\blk00000003/blk000002e2/sig00000b0b ), + .Q15(\NLW_blk00000003/blk000002e2/blk0000030a_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk000002e2/blk00000309 ( + .A0(\blk00000003/sig000002b8 ), + .A1(\blk00000003/sig000002b7 ), + .A2(\blk00000003/blk000002e2/sig00000afd ), + .A3(\blk00000003/blk000002e2/sig00000afd ), + .CE(\blk00000003/blk000002e2/sig00000b16 ), + .CLK(clk), + .D(\blk00000003/sig0000057a ), + .Q(\blk00000003/blk000002e2/sig00000b0a ), + .Q15(\NLW_blk00000003/blk000002e2/blk00000309_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk000002e2/blk00000308 ( + .A0(\blk00000003/sig000002b8 ), + .A1(\blk00000003/sig000002b7 ), + .A2(\blk00000003/blk000002e2/sig00000afd ), + .A3(\blk00000003/blk000002e2/sig00000afd ), + .CE(\blk00000003/blk000002e2/sig00000b16 ), + .CLK(clk), + .D(\blk00000003/sig00000578 ), + .Q(\blk00000003/blk000002e2/sig00000b0c ), + .Q15(\NLW_blk00000003/blk000002e2/blk00000308_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk000002e2/blk00000307 ( + .A0(\blk00000003/sig000002b8 ), + .A1(\blk00000003/sig000002b7 ), + .A2(\blk00000003/blk000002e2/sig00000afd ), + .A3(\blk00000003/blk000002e2/sig00000afd ), + .CE(\blk00000003/blk000002e2/sig00000b16 ), + .CLK(clk), + .D(\blk00000003/sig0000057c ), + .Q(\blk00000003/blk000002e2/sig00000b08 ), + .Q15(\NLW_blk00000003/blk000002e2/blk00000307_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk000002e2/blk00000306 ( + .A0(\blk00000003/sig000002b8 ), + .A1(\blk00000003/sig000002b7 ), + .A2(\blk00000003/blk000002e2/sig00000afd ), + .A3(\blk00000003/blk000002e2/sig00000afd ), + .CE(\blk00000003/blk000002e2/sig00000b16 ), + .CLK(clk), + .D(\blk00000003/sig0000057d ), + .Q(\blk00000003/blk000002e2/sig00000b07 ), + .Q15(\NLW_blk00000003/blk000002e2/blk00000306_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk000002e2/blk00000305 ( + .A0(\blk00000003/sig000002b8 ), + .A1(\blk00000003/sig000002b7 ), + .A2(\blk00000003/blk000002e2/sig00000afd ), + .A3(\blk00000003/blk000002e2/sig00000afd ), + .CE(\blk00000003/blk000002e2/sig00000b16 ), + .CLK(clk), + .D(\blk00000003/sig0000057b ), + .Q(\blk00000003/blk000002e2/sig00000b09 ), + .Q15(\NLW_blk00000003/blk000002e2/blk00000305_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk000002e2/blk00000304 ( + .A0(\blk00000003/sig000002b8 ), + .A1(\blk00000003/sig000002b7 ), + .A2(\blk00000003/blk000002e2/sig00000afd ), + .A3(\blk00000003/blk000002e2/sig00000afd ), + .CE(\blk00000003/blk000002e2/sig00000b16 ), + .CLK(clk), + .D(\blk00000003/sig0000057f ), + .Q(\blk00000003/blk000002e2/sig00000b05 ), + .Q15(\NLW_blk00000003/blk000002e2/blk00000304_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk000002e2/blk00000303 ( + .A0(\blk00000003/sig000002b8 ), + .A1(\blk00000003/sig000002b7 ), + .A2(\blk00000003/blk000002e2/sig00000afd ), + .A3(\blk00000003/blk000002e2/sig00000afd ), + .CE(\blk00000003/blk000002e2/sig00000b16 ), + .CLK(clk), + .D(\blk00000003/sig00000580 ), + .Q(\blk00000003/blk000002e2/sig00000b04 ), + .Q15(\NLW_blk00000003/blk000002e2/blk00000303_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk000002e2/blk00000302 ( + .A0(\blk00000003/sig000002b8 ), + .A1(\blk00000003/sig000002b7 ), + .A2(\blk00000003/blk000002e2/sig00000afd ), + .A3(\blk00000003/blk000002e2/sig00000afd ), + .CE(\blk00000003/blk000002e2/sig00000b16 ), + .CLK(clk), + .D(\blk00000003/sig0000057e ), + .Q(\blk00000003/blk000002e2/sig00000b06 ), + .Q15(\NLW_blk00000003/blk000002e2/blk00000302_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk000002e2/blk00000301 ( + .A0(\blk00000003/sig000002b8 ), + .A1(\blk00000003/sig000002b7 ), + .A2(\blk00000003/blk000002e2/sig00000afd ), + .A3(\blk00000003/blk000002e2/sig00000afd ), + .CE(\blk00000003/blk000002e2/sig00000b16 ), + .CLK(clk), + .D(\blk00000003/sig00000582 ), + .Q(\blk00000003/blk000002e2/sig00000b02 ), + .Q15(\NLW_blk00000003/blk000002e2/blk00000301_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk000002e2/blk00000300 ( + .A0(\blk00000003/sig000002b8 ), + .A1(\blk00000003/sig000002b7 ), + .A2(\blk00000003/blk000002e2/sig00000afd ), + .A3(\blk00000003/blk000002e2/sig00000afd ), + .CE(\blk00000003/blk000002e2/sig00000b16 ), + .CLK(clk), + .D(\blk00000003/sig00000583 ), + .Q(\blk00000003/blk000002e2/sig00000b01 ), + .Q15(\NLW_blk00000003/blk000002e2/blk00000300_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk000002e2/blk000002ff ( + .A0(\blk00000003/sig000002b8 ), + .A1(\blk00000003/sig000002b7 ), + .A2(\blk00000003/blk000002e2/sig00000afd ), + .A3(\blk00000003/blk000002e2/sig00000afd ), + .CE(\blk00000003/blk000002e2/sig00000b16 ), + .CLK(clk), + .D(\blk00000003/sig00000581 ), + .Q(\blk00000003/blk000002e2/sig00000b03 ), + .Q15(\NLW_blk00000003/blk000002e2/blk000002ff_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk000002e2/blk000002fe ( + .A0(\blk00000003/sig000002b8 ), + .A1(\blk00000003/sig000002b7 ), + .A2(\blk00000003/blk000002e2/sig00000afd ), + .A3(\blk00000003/blk000002e2/sig00000afd ), + .CE(\blk00000003/blk000002e2/sig00000b16 ), + .CLK(clk), + .D(\blk00000003/sig00000585 ), + .Q(\blk00000003/blk000002e2/sig00000aff ), + .Q15(\NLW_blk00000003/blk000002e2/blk000002fe_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk000002e2/blk000002fd ( + .A0(\blk00000003/sig000002b8 ), + .A1(\blk00000003/sig000002b7 ), + .A2(\blk00000003/blk000002e2/sig00000afd ), + .A3(\blk00000003/blk000002e2/sig00000afd ), + .CE(\blk00000003/blk000002e2/sig00000b16 ), + .CLK(clk), + .D(\blk00000003/sig00000586 ), + .Q(\blk00000003/blk000002e2/sig00000afe ), + .Q15(\NLW_blk00000003/blk000002e2/blk000002fd_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk000002e2/blk000002fc ( + .A0(\blk00000003/sig000002b8 ), + .A1(\blk00000003/sig000002b7 ), + .A2(\blk00000003/blk000002e2/sig00000afd ), + .A3(\blk00000003/blk000002e2/sig00000afd ), + .CE(\blk00000003/blk000002e2/sig00000b16 ), + .CLK(clk), + .D(\blk00000003/sig00000584 ), + .Q(\blk00000003/blk000002e2/sig00000b00 ), + .Q15(\NLW_blk00000003/blk000002e2/blk000002fc_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000002e2/blk000002fb ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk000002e2/sig00000b15 ), + .Q(\blk00000003/sig000002ef ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000002e2/blk000002fa ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk000002e2/sig00000b14 ), + .Q(\blk00000003/sig000002f0 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000002e2/blk000002f9 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk000002e2/sig00000b13 ), + .Q(\blk00000003/sig000002f1 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000002e2/blk000002f8 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk000002e2/sig00000b12 ), + .Q(\blk00000003/sig000002f2 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000002e2/blk000002f7 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk000002e2/sig00000b11 ), + .Q(\blk00000003/sig000002f3 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000002e2/blk000002f6 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk000002e2/sig00000b10 ), + .Q(\blk00000003/sig000002f4 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000002e2/blk000002f5 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk000002e2/sig00000b0f ), + .Q(\blk00000003/sig000002f5 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000002e2/blk000002f4 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk000002e2/sig00000b0e ), + .Q(\blk00000003/sig000002f6 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000002e2/blk000002f3 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk000002e2/sig00000b0d ), + .Q(\blk00000003/sig000002f7 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000002e2/blk000002f2 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk000002e2/sig00000b0c ), + .Q(\blk00000003/sig000002f8 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000002e2/blk000002f1 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk000002e2/sig00000b0b ), + .Q(\blk00000003/sig000002f9 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000002e2/blk000002f0 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk000002e2/sig00000b0a ), + .Q(\blk00000003/sig000002fa ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000002e2/blk000002ef ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk000002e2/sig00000b09 ), + .Q(\blk00000003/sig000002fb ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000002e2/blk000002ee ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk000002e2/sig00000b08 ), + .Q(\blk00000003/sig000002fc ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000002e2/blk000002ed ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk000002e2/sig00000b07 ), + .Q(\blk00000003/sig000002fd ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000002e2/blk000002ec ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk000002e2/sig00000b06 ), + .Q(\blk00000003/sig000002fe ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000002e2/blk000002eb ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk000002e2/sig00000b05 ), + .Q(\blk00000003/sig000002ff ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000002e2/blk000002ea ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk000002e2/sig00000b04 ), + .Q(\blk00000003/sig00000300 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000002e2/blk000002e9 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk000002e2/sig00000b03 ), + .Q(\blk00000003/sig00000301 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000002e2/blk000002e8 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk000002e2/sig00000b02 ), + .Q(\blk00000003/sig00000302 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000002e2/blk000002e7 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk000002e2/sig00000b01 ), + .Q(\blk00000003/sig00000303 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000002e2/blk000002e6 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk000002e2/sig00000b00 ), + .Q(\blk00000003/sig00000304 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000002e2/blk000002e5 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk000002e2/sig00000aff ), + .Q(\blk00000003/sig00000305 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000002e2/blk000002e4 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk000002e2/sig00000afe ), + .Q(\blk00000003/sig00000306 ) + ); + GND \blk00000003/blk000002e2/blk000002e3 ( + .G(\blk00000003/blk000002e2/sig00000afd ) + ); + LUT2 #( + .INIT ( 4'h8 )) + \blk00000003/blk00000315/blk00000347 ( + .I0(ce), + .I1(\blk00000003/sig000004f6 ), + .O(\blk00000003/blk00000315/sig00000b65 ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000315/blk00000346 ( + .A0(\blk00000003/sig000002b1 ), + .A1(\blk00000003/sig000002b0 ), + .A2(\blk00000003/blk00000315/sig00000b4c ), + .A3(\blk00000003/blk00000315/sig00000b4c ), + .CE(\blk00000003/blk00000315/sig00000b65 ), + .CLK(clk), + .D(\blk00000003/sig00000588 ), + .Q(\blk00000003/blk00000315/sig00000b63 ), + .Q15(\NLW_blk00000003/blk00000315/blk00000346_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000315/blk00000345 ( + .A0(\blk00000003/sig000002b1 ), + .A1(\blk00000003/sig000002b0 ), + .A2(\blk00000003/blk00000315/sig00000b4c ), + .A3(\blk00000003/blk00000315/sig00000b4c ), + .CE(\blk00000003/blk00000315/sig00000b65 ), + .CLK(clk), + .D(\blk00000003/sig00000589 ), + .Q(\blk00000003/blk00000315/sig00000b62 ), + .Q15(\NLW_blk00000003/blk00000315/blk00000345_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000315/blk00000344 ( + .A0(\blk00000003/sig000002b1 ), + .A1(\blk00000003/sig000002b0 ), + .A2(\blk00000003/blk00000315/sig00000b4c ), + .A3(\blk00000003/blk00000315/sig00000b4c ), + .CE(\blk00000003/blk00000315/sig00000b65 ), + .CLK(clk), + .D(\blk00000003/sig00000587 ), + .Q(\blk00000003/blk00000315/sig00000b64 ), + .Q15(\NLW_blk00000003/blk00000315/blk00000344_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000315/blk00000343 ( + .A0(\blk00000003/sig000002b1 ), + .A1(\blk00000003/sig000002b0 ), + .A2(\blk00000003/blk00000315/sig00000b4c ), + .A3(\blk00000003/blk00000315/sig00000b4c ), + .CE(\blk00000003/blk00000315/sig00000b65 ), + .CLK(clk), + .D(\blk00000003/sig0000058b ), + .Q(\blk00000003/blk00000315/sig00000b60 ), + .Q15(\NLW_blk00000003/blk00000315/blk00000343_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000315/blk00000342 ( + .A0(\blk00000003/sig000002b1 ), + .A1(\blk00000003/sig000002b0 ), + .A2(\blk00000003/blk00000315/sig00000b4c ), + .A3(\blk00000003/blk00000315/sig00000b4c ), + .CE(\blk00000003/blk00000315/sig00000b65 ), + .CLK(clk), + .D(\blk00000003/sig0000058c ), + .Q(\blk00000003/blk00000315/sig00000b5f ), + .Q15(\NLW_blk00000003/blk00000315/blk00000342_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000315/blk00000341 ( + .A0(\blk00000003/sig000002b1 ), + .A1(\blk00000003/sig000002b0 ), + .A2(\blk00000003/blk00000315/sig00000b4c ), + .A3(\blk00000003/blk00000315/sig00000b4c ), + .CE(\blk00000003/blk00000315/sig00000b65 ), + .CLK(clk), + .D(\blk00000003/sig0000058a ), + .Q(\blk00000003/blk00000315/sig00000b61 ), + .Q15(\NLW_blk00000003/blk00000315/blk00000341_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000315/blk00000340 ( + .A0(\blk00000003/sig000002b1 ), + .A1(\blk00000003/sig000002b0 ), + .A2(\blk00000003/blk00000315/sig00000b4c ), + .A3(\blk00000003/blk00000315/sig00000b4c ), + .CE(\blk00000003/blk00000315/sig00000b65 ), + .CLK(clk), + .D(\blk00000003/sig0000058e ), + .Q(\blk00000003/blk00000315/sig00000b5d ), + .Q15(\NLW_blk00000003/blk00000315/blk00000340_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000315/blk0000033f ( + .A0(\blk00000003/sig000002b1 ), + .A1(\blk00000003/sig000002b0 ), + .A2(\blk00000003/blk00000315/sig00000b4c ), + .A3(\blk00000003/blk00000315/sig00000b4c ), + .CE(\blk00000003/blk00000315/sig00000b65 ), + .CLK(clk), + .D(\blk00000003/sig0000058f ), + .Q(\blk00000003/blk00000315/sig00000b5c ), + .Q15(\NLW_blk00000003/blk00000315/blk0000033f_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000315/blk0000033e ( + .A0(\blk00000003/sig000002b1 ), + .A1(\blk00000003/sig000002b0 ), + .A2(\blk00000003/blk00000315/sig00000b4c ), + .A3(\blk00000003/blk00000315/sig00000b4c ), + .CE(\blk00000003/blk00000315/sig00000b65 ), + .CLK(clk), + .D(\blk00000003/sig0000058d ), + .Q(\blk00000003/blk00000315/sig00000b5e ), + .Q15(\NLW_blk00000003/blk00000315/blk0000033e_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000315/blk0000033d ( + .A0(\blk00000003/sig000002b1 ), + .A1(\blk00000003/sig000002b0 ), + .A2(\blk00000003/blk00000315/sig00000b4c ), + .A3(\blk00000003/blk00000315/sig00000b4c ), + .CE(\blk00000003/blk00000315/sig00000b65 ), + .CLK(clk), + .D(\blk00000003/sig00000591 ), + .Q(\blk00000003/blk00000315/sig00000b5a ), + .Q15(\NLW_blk00000003/blk00000315/blk0000033d_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000315/blk0000033c ( + .A0(\blk00000003/sig000002b1 ), + .A1(\blk00000003/sig000002b0 ), + .A2(\blk00000003/blk00000315/sig00000b4c ), + .A3(\blk00000003/blk00000315/sig00000b4c ), + .CE(\blk00000003/blk00000315/sig00000b65 ), + .CLK(clk), + .D(\blk00000003/sig00000592 ), + .Q(\blk00000003/blk00000315/sig00000b59 ), + .Q15(\NLW_blk00000003/blk00000315/blk0000033c_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000315/blk0000033b ( + .A0(\blk00000003/sig000002b1 ), + .A1(\blk00000003/sig000002b0 ), + .A2(\blk00000003/blk00000315/sig00000b4c ), + .A3(\blk00000003/blk00000315/sig00000b4c ), + .CE(\blk00000003/blk00000315/sig00000b65 ), + .CLK(clk), + .D(\blk00000003/sig00000590 ), + .Q(\blk00000003/blk00000315/sig00000b5b ), + .Q15(\NLW_blk00000003/blk00000315/blk0000033b_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000315/blk0000033a ( + .A0(\blk00000003/sig000002b1 ), + .A1(\blk00000003/sig000002b0 ), + .A2(\blk00000003/blk00000315/sig00000b4c ), + .A3(\blk00000003/blk00000315/sig00000b4c ), + .CE(\blk00000003/blk00000315/sig00000b65 ), + .CLK(clk), + .D(\blk00000003/sig00000594 ), + .Q(\blk00000003/blk00000315/sig00000b57 ), + .Q15(\NLW_blk00000003/blk00000315/blk0000033a_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000315/blk00000339 ( + .A0(\blk00000003/sig000002b1 ), + .A1(\blk00000003/sig000002b0 ), + .A2(\blk00000003/blk00000315/sig00000b4c ), + .A3(\blk00000003/blk00000315/sig00000b4c ), + .CE(\blk00000003/blk00000315/sig00000b65 ), + .CLK(clk), + .D(\blk00000003/sig00000595 ), + .Q(\blk00000003/blk00000315/sig00000b56 ), + .Q15(\NLW_blk00000003/blk00000315/blk00000339_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000315/blk00000338 ( + .A0(\blk00000003/sig000002b1 ), + .A1(\blk00000003/sig000002b0 ), + .A2(\blk00000003/blk00000315/sig00000b4c ), + .A3(\blk00000003/blk00000315/sig00000b4c ), + .CE(\blk00000003/blk00000315/sig00000b65 ), + .CLK(clk), + .D(\blk00000003/sig00000593 ), + .Q(\blk00000003/blk00000315/sig00000b58 ), + .Q15(\NLW_blk00000003/blk00000315/blk00000338_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000315/blk00000337 ( + .A0(\blk00000003/sig000002b1 ), + .A1(\blk00000003/sig000002b0 ), + .A2(\blk00000003/blk00000315/sig00000b4c ), + .A3(\blk00000003/blk00000315/sig00000b4c ), + .CE(\blk00000003/blk00000315/sig00000b65 ), + .CLK(clk), + .D(\blk00000003/sig00000597 ), + .Q(\blk00000003/blk00000315/sig00000b54 ), + .Q15(\NLW_blk00000003/blk00000315/blk00000337_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000315/blk00000336 ( + .A0(\blk00000003/sig000002b1 ), + .A1(\blk00000003/sig000002b0 ), + .A2(\blk00000003/blk00000315/sig00000b4c ), + .A3(\blk00000003/blk00000315/sig00000b4c ), + .CE(\blk00000003/blk00000315/sig00000b65 ), + .CLK(clk), + .D(\blk00000003/sig00000598 ), + .Q(\blk00000003/blk00000315/sig00000b53 ), + .Q15(\NLW_blk00000003/blk00000315/blk00000336_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000315/blk00000335 ( + .A0(\blk00000003/sig000002b1 ), + .A1(\blk00000003/sig000002b0 ), + .A2(\blk00000003/blk00000315/sig00000b4c ), + .A3(\blk00000003/blk00000315/sig00000b4c ), + .CE(\blk00000003/blk00000315/sig00000b65 ), + .CLK(clk), + .D(\blk00000003/sig00000596 ), + .Q(\blk00000003/blk00000315/sig00000b55 ), + .Q15(\NLW_blk00000003/blk00000315/blk00000335_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000315/blk00000334 ( + .A0(\blk00000003/sig000002b1 ), + .A1(\blk00000003/sig000002b0 ), + .A2(\blk00000003/blk00000315/sig00000b4c ), + .A3(\blk00000003/blk00000315/sig00000b4c ), + .CE(\blk00000003/blk00000315/sig00000b65 ), + .CLK(clk), + .D(\blk00000003/sig0000059a ), + .Q(\blk00000003/blk00000315/sig00000b51 ), + .Q15(\NLW_blk00000003/blk00000315/blk00000334_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000315/blk00000333 ( + .A0(\blk00000003/sig000002b1 ), + .A1(\blk00000003/sig000002b0 ), + .A2(\blk00000003/blk00000315/sig00000b4c ), + .A3(\blk00000003/blk00000315/sig00000b4c ), + .CE(\blk00000003/blk00000315/sig00000b65 ), + .CLK(clk), + .D(\blk00000003/sig0000059b ), + .Q(\blk00000003/blk00000315/sig00000b50 ), + .Q15(\NLW_blk00000003/blk00000315/blk00000333_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000315/blk00000332 ( + .A0(\blk00000003/sig000002b1 ), + .A1(\blk00000003/sig000002b0 ), + .A2(\blk00000003/blk00000315/sig00000b4c ), + .A3(\blk00000003/blk00000315/sig00000b4c ), + .CE(\blk00000003/blk00000315/sig00000b65 ), + .CLK(clk), + .D(\blk00000003/sig00000599 ), + .Q(\blk00000003/blk00000315/sig00000b52 ), + .Q15(\NLW_blk00000003/blk00000315/blk00000332_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000315/blk00000331 ( + .A0(\blk00000003/sig000002b1 ), + .A1(\blk00000003/sig000002b0 ), + .A2(\blk00000003/blk00000315/sig00000b4c ), + .A3(\blk00000003/blk00000315/sig00000b4c ), + .CE(\blk00000003/blk00000315/sig00000b65 ), + .CLK(clk), + .D(\blk00000003/sig0000059d ), + .Q(\blk00000003/blk00000315/sig00000b4e ), + .Q15(\NLW_blk00000003/blk00000315/blk00000331_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000315/blk00000330 ( + .A0(\blk00000003/sig000002b1 ), + .A1(\blk00000003/sig000002b0 ), + .A2(\blk00000003/blk00000315/sig00000b4c ), + .A3(\blk00000003/blk00000315/sig00000b4c ), + .CE(\blk00000003/blk00000315/sig00000b65 ), + .CLK(clk), + .D(\blk00000003/sig0000059e ), + .Q(\blk00000003/blk00000315/sig00000b4d ), + .Q15(\NLW_blk00000003/blk00000315/blk00000330_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000315/blk0000032f ( + .A0(\blk00000003/sig000002b1 ), + .A1(\blk00000003/sig000002b0 ), + .A2(\blk00000003/blk00000315/sig00000b4c ), + .A3(\blk00000003/blk00000315/sig00000b4c ), + .CE(\blk00000003/blk00000315/sig00000b65 ), + .CLK(clk), + .D(\blk00000003/sig0000059c ), + .Q(\blk00000003/blk00000315/sig00000b4f ), + .Q15(\NLW_blk00000003/blk00000315/blk0000032f_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000315/blk0000032e ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk00000315/sig00000b64 ), + .Q(\blk00000003/sig00000337 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000315/blk0000032d ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk00000315/sig00000b63 ), + .Q(\blk00000003/sig00000338 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000315/blk0000032c ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk00000315/sig00000b62 ), + .Q(\blk00000003/sig00000339 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000315/blk0000032b ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk00000315/sig00000b61 ), + .Q(\blk00000003/sig0000033a ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000315/blk0000032a ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk00000315/sig00000b60 ), + .Q(\blk00000003/sig0000033b ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000315/blk00000329 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk00000315/sig00000b5f ), + .Q(\blk00000003/sig0000033c ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000315/blk00000328 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk00000315/sig00000b5e ), + .Q(\blk00000003/sig0000033d ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000315/blk00000327 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk00000315/sig00000b5d ), + .Q(\blk00000003/sig0000033e ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000315/blk00000326 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk00000315/sig00000b5c ), + .Q(\blk00000003/sig0000033f ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000315/blk00000325 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk00000315/sig00000b5b ), + .Q(\blk00000003/sig00000340 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000315/blk00000324 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk00000315/sig00000b5a ), + .Q(\blk00000003/sig00000341 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000315/blk00000323 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk00000315/sig00000b59 ), + .Q(\blk00000003/sig00000342 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000315/blk00000322 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk00000315/sig00000b58 ), + .Q(\blk00000003/sig00000343 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000315/blk00000321 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk00000315/sig00000b57 ), + .Q(\blk00000003/sig00000344 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000315/blk00000320 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk00000315/sig00000b56 ), + .Q(\blk00000003/sig00000345 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000315/blk0000031f ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk00000315/sig00000b55 ), + .Q(\blk00000003/sig00000346 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000315/blk0000031e ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk00000315/sig00000b54 ), + .Q(\blk00000003/sig00000347 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000315/blk0000031d ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk00000315/sig00000b53 ), + .Q(\blk00000003/sig00000348 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000315/blk0000031c ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk00000315/sig00000b52 ), + .Q(\blk00000003/sig00000349 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000315/blk0000031b ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk00000315/sig00000b51 ), + .Q(\blk00000003/sig0000034a ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000315/blk0000031a ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk00000315/sig00000b50 ), + .Q(\blk00000003/sig0000034b ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000315/blk00000319 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk00000315/sig00000b4f ), + .Q(\blk00000003/sig0000034c ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000315/blk00000318 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk00000315/sig00000b4e ), + .Q(\blk00000003/sig0000034d ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000315/blk00000317 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk00000315/sig00000b4d ), + .Q(\blk00000003/sig0000034e ) + ); + GND \blk00000003/blk00000315/blk00000316 ( + .G(\blk00000003/blk00000315/sig00000b4c ) + ); + LUT2 #( + .INIT ( 4'h8 )) + \blk00000003/blk00000348/blk0000037a ( + .I0(ce), + .I1(\blk00000003/sig000004f5 ), + .O(\blk00000003/blk00000348/sig00000bb4 ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000348/blk00000379 ( + .A0(\blk00000003/sig000002b8 ), + .A1(\blk00000003/sig000002b7 ), + .A2(\blk00000003/blk00000348/sig00000b9b ), + .A3(\blk00000003/blk00000348/sig00000b9b ), + .CE(\blk00000003/blk00000348/sig00000bb4 ), + .CLK(clk), + .D(\blk00000003/sig000005a0 ), + .Q(\blk00000003/blk00000348/sig00000bb2 ), + .Q15(\NLW_blk00000003/blk00000348/blk00000379_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000348/blk00000378 ( + .A0(\blk00000003/sig000002b8 ), + .A1(\blk00000003/sig000002b7 ), + .A2(\blk00000003/blk00000348/sig00000b9b ), + .A3(\blk00000003/blk00000348/sig00000b9b ), + .CE(\blk00000003/blk00000348/sig00000bb4 ), + .CLK(clk), + .D(\blk00000003/sig000005a1 ), + .Q(\blk00000003/blk00000348/sig00000bb1 ), + .Q15(\NLW_blk00000003/blk00000348/blk00000378_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000348/blk00000377 ( + .A0(\blk00000003/sig000002b8 ), + .A1(\blk00000003/sig000002b7 ), + .A2(\blk00000003/blk00000348/sig00000b9b ), + .A3(\blk00000003/blk00000348/sig00000b9b ), + .CE(\blk00000003/blk00000348/sig00000bb4 ), + .CLK(clk), + .D(\blk00000003/sig0000059f ), + .Q(\blk00000003/blk00000348/sig00000bb3 ), + .Q15(\NLW_blk00000003/blk00000348/blk00000377_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000348/blk00000376 ( + .A0(\blk00000003/sig000002b8 ), + .A1(\blk00000003/sig000002b7 ), + .A2(\blk00000003/blk00000348/sig00000b9b ), + .A3(\blk00000003/blk00000348/sig00000b9b ), + .CE(\blk00000003/blk00000348/sig00000bb4 ), + .CLK(clk), + .D(\blk00000003/sig000005a3 ), + .Q(\blk00000003/blk00000348/sig00000baf ), + .Q15(\NLW_blk00000003/blk00000348/blk00000376_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000348/blk00000375 ( + .A0(\blk00000003/sig000002b8 ), + .A1(\blk00000003/sig000002b7 ), + .A2(\blk00000003/blk00000348/sig00000b9b ), + .A3(\blk00000003/blk00000348/sig00000b9b ), + .CE(\blk00000003/blk00000348/sig00000bb4 ), + .CLK(clk), + .D(\blk00000003/sig000005a4 ), + .Q(\blk00000003/blk00000348/sig00000bae ), + .Q15(\NLW_blk00000003/blk00000348/blk00000375_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000348/blk00000374 ( + .A0(\blk00000003/sig000002b8 ), + .A1(\blk00000003/sig000002b7 ), + .A2(\blk00000003/blk00000348/sig00000b9b ), + .A3(\blk00000003/blk00000348/sig00000b9b ), + .CE(\blk00000003/blk00000348/sig00000bb4 ), + .CLK(clk), + .D(\blk00000003/sig000005a2 ), + .Q(\blk00000003/blk00000348/sig00000bb0 ), + .Q15(\NLW_blk00000003/blk00000348/blk00000374_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000348/blk00000373 ( + .A0(\blk00000003/sig000002b8 ), + .A1(\blk00000003/sig000002b7 ), + .A2(\blk00000003/blk00000348/sig00000b9b ), + .A3(\blk00000003/blk00000348/sig00000b9b ), + .CE(\blk00000003/blk00000348/sig00000bb4 ), + .CLK(clk), + .D(\blk00000003/sig000005a6 ), + .Q(\blk00000003/blk00000348/sig00000bac ), + .Q15(\NLW_blk00000003/blk00000348/blk00000373_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000348/blk00000372 ( + .A0(\blk00000003/sig000002b8 ), + .A1(\blk00000003/sig000002b7 ), + .A2(\blk00000003/blk00000348/sig00000b9b ), + .A3(\blk00000003/blk00000348/sig00000b9b ), + .CE(\blk00000003/blk00000348/sig00000bb4 ), + .CLK(clk), + .D(\blk00000003/sig000005a7 ), + .Q(\blk00000003/blk00000348/sig00000bab ), + .Q15(\NLW_blk00000003/blk00000348/blk00000372_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000348/blk00000371 ( + .A0(\blk00000003/sig000002b8 ), + .A1(\blk00000003/sig000002b7 ), + .A2(\blk00000003/blk00000348/sig00000b9b ), + .A3(\blk00000003/blk00000348/sig00000b9b ), + .CE(\blk00000003/blk00000348/sig00000bb4 ), + .CLK(clk), + .D(\blk00000003/sig000005a5 ), + .Q(\blk00000003/blk00000348/sig00000bad ), + .Q15(\NLW_blk00000003/blk00000348/blk00000371_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000348/blk00000370 ( + .A0(\blk00000003/sig000002b8 ), + .A1(\blk00000003/sig000002b7 ), + .A2(\blk00000003/blk00000348/sig00000b9b ), + .A3(\blk00000003/blk00000348/sig00000b9b ), + .CE(\blk00000003/blk00000348/sig00000bb4 ), + .CLK(clk), + .D(\blk00000003/sig000005a9 ), + .Q(\blk00000003/blk00000348/sig00000ba9 ), + .Q15(\NLW_blk00000003/blk00000348/blk00000370_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000348/blk0000036f ( + .A0(\blk00000003/sig000002b8 ), + .A1(\blk00000003/sig000002b7 ), + .A2(\blk00000003/blk00000348/sig00000b9b ), + .A3(\blk00000003/blk00000348/sig00000b9b ), + .CE(\blk00000003/blk00000348/sig00000bb4 ), + .CLK(clk), + .D(\blk00000003/sig000005aa ), + .Q(\blk00000003/blk00000348/sig00000ba8 ), + .Q15(\NLW_blk00000003/blk00000348/blk0000036f_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000348/blk0000036e ( + .A0(\blk00000003/sig000002b8 ), + .A1(\blk00000003/sig000002b7 ), + .A2(\blk00000003/blk00000348/sig00000b9b ), + .A3(\blk00000003/blk00000348/sig00000b9b ), + .CE(\blk00000003/blk00000348/sig00000bb4 ), + .CLK(clk), + .D(\blk00000003/sig000005a8 ), + .Q(\blk00000003/blk00000348/sig00000baa ), + .Q15(\NLW_blk00000003/blk00000348/blk0000036e_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000348/blk0000036d ( + .A0(\blk00000003/sig000002b8 ), + .A1(\blk00000003/sig000002b7 ), + .A2(\blk00000003/blk00000348/sig00000b9b ), + .A3(\blk00000003/blk00000348/sig00000b9b ), + .CE(\blk00000003/blk00000348/sig00000bb4 ), + .CLK(clk), + .D(\blk00000003/sig000005ac ), + .Q(\blk00000003/blk00000348/sig00000ba6 ), + .Q15(\NLW_blk00000003/blk00000348/blk0000036d_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000348/blk0000036c ( + .A0(\blk00000003/sig000002b8 ), + .A1(\blk00000003/sig000002b7 ), + .A2(\blk00000003/blk00000348/sig00000b9b ), + .A3(\blk00000003/blk00000348/sig00000b9b ), + .CE(\blk00000003/blk00000348/sig00000bb4 ), + .CLK(clk), + .D(\blk00000003/sig000005ad ), + .Q(\blk00000003/blk00000348/sig00000ba5 ), + .Q15(\NLW_blk00000003/blk00000348/blk0000036c_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000348/blk0000036b ( + .A0(\blk00000003/sig000002b8 ), + .A1(\blk00000003/sig000002b7 ), + .A2(\blk00000003/blk00000348/sig00000b9b ), + .A3(\blk00000003/blk00000348/sig00000b9b ), + .CE(\blk00000003/blk00000348/sig00000bb4 ), + .CLK(clk), + .D(\blk00000003/sig000005ab ), + .Q(\blk00000003/blk00000348/sig00000ba7 ), + .Q15(\NLW_blk00000003/blk00000348/blk0000036b_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000348/blk0000036a ( + .A0(\blk00000003/sig000002b8 ), + .A1(\blk00000003/sig000002b7 ), + .A2(\blk00000003/blk00000348/sig00000b9b ), + .A3(\blk00000003/blk00000348/sig00000b9b ), + .CE(\blk00000003/blk00000348/sig00000bb4 ), + .CLK(clk), + .D(\blk00000003/sig000005af ), + .Q(\blk00000003/blk00000348/sig00000ba3 ), + .Q15(\NLW_blk00000003/blk00000348/blk0000036a_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000348/blk00000369 ( + .A0(\blk00000003/sig000002b8 ), + .A1(\blk00000003/sig000002b7 ), + .A2(\blk00000003/blk00000348/sig00000b9b ), + .A3(\blk00000003/blk00000348/sig00000b9b ), + .CE(\blk00000003/blk00000348/sig00000bb4 ), + .CLK(clk), + .D(\blk00000003/sig000005b0 ), + .Q(\blk00000003/blk00000348/sig00000ba2 ), + .Q15(\NLW_blk00000003/blk00000348/blk00000369_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000348/blk00000368 ( + .A0(\blk00000003/sig000002b8 ), + .A1(\blk00000003/sig000002b7 ), + .A2(\blk00000003/blk00000348/sig00000b9b ), + .A3(\blk00000003/blk00000348/sig00000b9b ), + .CE(\blk00000003/blk00000348/sig00000bb4 ), + .CLK(clk), + .D(\blk00000003/sig000005ae ), + .Q(\blk00000003/blk00000348/sig00000ba4 ), + .Q15(\NLW_blk00000003/blk00000348/blk00000368_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000348/blk00000367 ( + .A0(\blk00000003/sig000002b8 ), + .A1(\blk00000003/sig000002b7 ), + .A2(\blk00000003/blk00000348/sig00000b9b ), + .A3(\blk00000003/blk00000348/sig00000b9b ), + .CE(\blk00000003/blk00000348/sig00000bb4 ), + .CLK(clk), + .D(\blk00000003/sig000005b2 ), + .Q(\blk00000003/blk00000348/sig00000ba0 ), + .Q15(\NLW_blk00000003/blk00000348/blk00000367_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000348/blk00000366 ( + .A0(\blk00000003/sig000002b8 ), + .A1(\blk00000003/sig000002b7 ), + .A2(\blk00000003/blk00000348/sig00000b9b ), + .A3(\blk00000003/blk00000348/sig00000b9b ), + .CE(\blk00000003/blk00000348/sig00000bb4 ), + .CLK(clk), + .D(\blk00000003/sig000005b3 ), + .Q(\blk00000003/blk00000348/sig00000b9f ), + .Q15(\NLW_blk00000003/blk00000348/blk00000366_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000348/blk00000365 ( + .A0(\blk00000003/sig000002b8 ), + .A1(\blk00000003/sig000002b7 ), + .A2(\blk00000003/blk00000348/sig00000b9b ), + .A3(\blk00000003/blk00000348/sig00000b9b ), + .CE(\blk00000003/blk00000348/sig00000bb4 ), + .CLK(clk), + .D(\blk00000003/sig000005b1 ), + .Q(\blk00000003/blk00000348/sig00000ba1 ), + .Q15(\NLW_blk00000003/blk00000348/blk00000365_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000348/blk00000364 ( + .A0(\blk00000003/sig000002b8 ), + .A1(\blk00000003/sig000002b7 ), + .A2(\blk00000003/blk00000348/sig00000b9b ), + .A3(\blk00000003/blk00000348/sig00000b9b ), + .CE(\blk00000003/blk00000348/sig00000bb4 ), + .CLK(clk), + .D(\blk00000003/sig000005b5 ), + .Q(\blk00000003/blk00000348/sig00000b9d ), + .Q15(\NLW_blk00000003/blk00000348/blk00000364_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000348/blk00000363 ( + .A0(\blk00000003/sig000002b8 ), + .A1(\blk00000003/sig000002b7 ), + .A2(\blk00000003/blk00000348/sig00000b9b ), + .A3(\blk00000003/blk00000348/sig00000b9b ), + .CE(\blk00000003/blk00000348/sig00000bb4 ), + .CLK(clk), + .D(\blk00000003/sig000005b6 ), + .Q(\blk00000003/blk00000348/sig00000b9c ), + .Q15(\NLW_blk00000003/blk00000348/blk00000363_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000348/blk00000362 ( + .A0(\blk00000003/sig000002b8 ), + .A1(\blk00000003/sig000002b7 ), + .A2(\blk00000003/blk00000348/sig00000b9b ), + .A3(\blk00000003/blk00000348/sig00000b9b ), + .CE(\blk00000003/blk00000348/sig00000bb4 ), + .CLK(clk), + .D(\blk00000003/sig000005b4 ), + .Q(\blk00000003/blk00000348/sig00000b9e ), + .Q15(\NLW_blk00000003/blk00000348/blk00000362_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000348/blk00000361 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk00000348/sig00000bb3 ), + .Q(\blk00000003/sig0000034f ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000348/blk00000360 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk00000348/sig00000bb2 ), + .Q(\blk00000003/sig00000350 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000348/blk0000035f ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk00000348/sig00000bb1 ), + .Q(\blk00000003/sig00000351 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000348/blk0000035e ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk00000348/sig00000bb0 ), + .Q(\blk00000003/sig00000352 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000348/blk0000035d ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk00000348/sig00000baf ), + .Q(\blk00000003/sig00000353 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000348/blk0000035c ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk00000348/sig00000bae ), + .Q(\blk00000003/sig00000354 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000348/blk0000035b ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk00000348/sig00000bad ), + .Q(\blk00000003/sig00000355 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000348/blk0000035a ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk00000348/sig00000bac ), + .Q(\blk00000003/sig00000356 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000348/blk00000359 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk00000348/sig00000bab ), + .Q(\blk00000003/sig00000357 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000348/blk00000358 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk00000348/sig00000baa ), + .Q(\blk00000003/sig00000358 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000348/blk00000357 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk00000348/sig00000ba9 ), + .Q(\blk00000003/sig00000359 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000348/blk00000356 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk00000348/sig00000ba8 ), + .Q(\blk00000003/sig0000035a ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000348/blk00000355 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk00000348/sig00000ba7 ), + .Q(\blk00000003/sig0000035b ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000348/blk00000354 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk00000348/sig00000ba6 ), + .Q(\blk00000003/sig0000035c ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000348/blk00000353 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk00000348/sig00000ba5 ), + .Q(\blk00000003/sig0000035d ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000348/blk00000352 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk00000348/sig00000ba4 ), + .Q(\blk00000003/sig0000035e ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000348/blk00000351 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk00000348/sig00000ba3 ), + .Q(\blk00000003/sig0000035f ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000348/blk00000350 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk00000348/sig00000ba2 ), + .Q(\blk00000003/sig00000360 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000348/blk0000034f ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk00000348/sig00000ba1 ), + .Q(\blk00000003/sig00000361 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000348/blk0000034e ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk00000348/sig00000ba0 ), + .Q(\blk00000003/sig00000362 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000348/blk0000034d ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk00000348/sig00000b9f ), + .Q(\blk00000003/sig00000363 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000348/blk0000034c ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk00000348/sig00000b9e ), + .Q(\blk00000003/sig00000364 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000348/blk0000034b ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk00000348/sig00000b9d ), + .Q(\blk00000003/sig00000365 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000348/blk0000034a ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk00000348/sig00000b9c ), + .Q(\blk00000003/sig00000366 ) + ); + GND \blk00000003/blk00000348/blk00000349 ( + .G(\blk00000003/blk00000348/sig00000b9b ) + ); + LUT2 #( + .INIT ( 4'h8 )) + \blk00000003/blk0000037b/blk000003b3 ( + .I0(ce), + .I1(\blk00000003/sig00000232 ), + .O(\blk00000003/blk0000037b/sig00000c19 ) + ); + RAM32X1D #( + .INIT ( 32'h00000005 )) + \blk00000003/blk0000037b/blk000003b2 ( + .A0(\blk00000003/sig00000264 ), + .A1(\blk00000003/sig00000268 ), + .A2(\blk00000003/sig0000026b ), + .A3(\blk00000003/blk0000037b/sig00000bf4 ), + .A4(\blk00000003/blk0000037b/sig00000bf4 ), + .D(\blk00000003/sig000005b7 ), + .DPRA0(\blk00000003/sig000002ba ), + .DPRA1(\blk00000003/sig000002be ), + .DPRA2(\blk00000003/sig000002c4 ), + .DPRA3(\blk00000003/blk0000037b/sig00000bf4 ), + .DPRA4(\blk00000003/blk0000037b/sig00000bf4 ), + .WCLK(clk), + .WE(\blk00000003/blk0000037b/sig00000c19 ), + .SPO(\blk00000003/blk0000037b/sig00000c06 ), + .DPO(\blk00000003/blk0000037b/sig00000c18 ) + ); + RAM32X1D #( + .INIT ( 32'h00000005 )) + \blk00000003/blk0000037b/blk000003b1 ( + .A0(\blk00000003/sig00000264 ), + .A1(\blk00000003/sig00000268 ), + .A2(\blk00000003/sig0000026b ), + .A3(\blk00000003/blk0000037b/sig00000bf4 ), + .A4(\blk00000003/blk0000037b/sig00000bf4 ), + .D(\blk00000003/sig000005b8 ), + .DPRA0(\blk00000003/sig000002ba ), + .DPRA1(\blk00000003/sig000002be ), + .DPRA2(\blk00000003/sig000002c4 ), + .DPRA3(\blk00000003/blk0000037b/sig00000bf4 ), + .DPRA4(\blk00000003/blk0000037b/sig00000bf4 ), + .WCLK(clk), + .WE(\blk00000003/blk0000037b/sig00000c19 ), + .SPO(\blk00000003/blk0000037b/sig00000c05 ), + .DPO(\blk00000003/blk0000037b/sig00000c17 ) + ); + RAM32X1D #( + .INIT ( 32'h00000005 )) + \blk00000003/blk0000037b/blk000003b0 ( + .A0(\blk00000003/sig00000264 ), + .A1(\blk00000003/sig00000268 ), + .A2(\blk00000003/sig0000026b ), + .A3(\blk00000003/blk0000037b/sig00000bf4 ), + .A4(\blk00000003/blk0000037b/sig00000bf4 ), + .D(\blk00000003/sig000005b9 ), + .DPRA0(\blk00000003/sig000002ba ), + .DPRA1(\blk00000003/sig000002be ), + .DPRA2(\blk00000003/sig000002c4 ), + .DPRA3(\blk00000003/blk0000037b/sig00000bf4 ), + .DPRA4(\blk00000003/blk0000037b/sig00000bf4 ), + .WCLK(clk), + .WE(\blk00000003/blk0000037b/sig00000c19 ), + .SPO(\blk00000003/blk0000037b/sig00000c04 ), + .DPO(\blk00000003/blk0000037b/sig00000c16 ) + ); + RAM32X1D #( + .INIT ( 32'h00000005 )) + \blk00000003/blk0000037b/blk000003af ( + .A0(\blk00000003/sig00000264 ), + .A1(\blk00000003/sig00000268 ), + .A2(\blk00000003/sig0000026b ), + .A3(\blk00000003/blk0000037b/sig00000bf4 ), + .A4(\blk00000003/blk0000037b/sig00000bf4 ), + .D(\blk00000003/sig000005ba ), + .DPRA0(\blk00000003/sig000002ba ), + .DPRA1(\blk00000003/sig000002be ), + .DPRA2(\blk00000003/sig000002c4 ), + .DPRA3(\blk00000003/blk0000037b/sig00000bf4 ), + .DPRA4(\blk00000003/blk0000037b/sig00000bf4 ), + .WCLK(clk), + .WE(\blk00000003/blk0000037b/sig00000c19 ), + .SPO(\blk00000003/blk0000037b/sig00000c03 ), + .DPO(\blk00000003/blk0000037b/sig00000c15 ) + ); + RAM32X1D #( + .INIT ( 32'h00000005 )) + \blk00000003/blk0000037b/blk000003ae ( + .A0(\blk00000003/sig00000264 ), + .A1(\blk00000003/sig00000268 ), + .A2(\blk00000003/sig0000026b ), + .A3(\blk00000003/blk0000037b/sig00000bf4 ), + .A4(\blk00000003/blk0000037b/sig00000bf4 ), + .D(\blk00000003/sig000005bb ), + .DPRA0(\blk00000003/sig000002ba ), + .DPRA1(\blk00000003/sig000002be ), + .DPRA2(\blk00000003/sig000002c4 ), + .DPRA3(\blk00000003/blk0000037b/sig00000bf4 ), + .DPRA4(\blk00000003/blk0000037b/sig00000bf4 ), + .WCLK(clk), + .WE(\blk00000003/blk0000037b/sig00000c19 ), + .SPO(\blk00000003/blk0000037b/sig00000c02 ), + .DPO(\blk00000003/blk0000037b/sig00000c14 ) + ); + RAM32X1D #( + .INIT ( 32'h00000005 )) + \blk00000003/blk0000037b/blk000003ad ( + .A0(\blk00000003/sig00000264 ), + .A1(\blk00000003/sig00000268 ), + .A2(\blk00000003/sig0000026b ), + .A3(\blk00000003/blk0000037b/sig00000bf4 ), + .A4(\blk00000003/blk0000037b/sig00000bf4 ), + .D(\blk00000003/sig000005bc ), + .DPRA0(\blk00000003/sig000002ba ), + .DPRA1(\blk00000003/sig000002be ), + .DPRA2(\blk00000003/sig000002c4 ), + .DPRA3(\blk00000003/blk0000037b/sig00000bf4 ), + .DPRA4(\blk00000003/blk0000037b/sig00000bf4 ), + .WCLK(clk), + .WE(\blk00000003/blk0000037b/sig00000c19 ), + .SPO(\blk00000003/blk0000037b/sig00000c01 ), + .DPO(\blk00000003/blk0000037b/sig00000c13 ) + ); + RAM32X1D #( + .INIT ( 32'h00000005 )) + \blk00000003/blk0000037b/blk000003ac ( + .A0(\blk00000003/sig00000264 ), + .A1(\blk00000003/sig00000268 ), + .A2(\blk00000003/sig0000026b ), + .A3(\blk00000003/blk0000037b/sig00000bf4 ), + .A4(\blk00000003/blk0000037b/sig00000bf4 ), + .D(\blk00000003/sig000005be ), + .DPRA0(\blk00000003/sig000002ba ), + .DPRA1(\blk00000003/sig000002be ), + .DPRA2(\blk00000003/sig000002c4 ), + .DPRA3(\blk00000003/blk0000037b/sig00000bf4 ), + .DPRA4(\blk00000003/blk0000037b/sig00000bf4 ), + .WCLK(clk), + .WE(\blk00000003/blk0000037b/sig00000c19 ), + .SPO(\blk00000003/blk0000037b/sig00000bff ), + .DPO(\blk00000003/blk0000037b/sig00000c11 ) + ); + RAM32X1D #( + .INIT ( 32'h0000000D )) + \blk00000003/blk0000037b/blk000003ab ( + .A0(\blk00000003/sig00000264 ), + .A1(\blk00000003/sig00000268 ), + .A2(\blk00000003/sig0000026b ), + .A3(\blk00000003/blk0000037b/sig00000bf4 ), + .A4(\blk00000003/blk0000037b/sig00000bf4 ), + .D(\blk00000003/sig000005bf ), + .DPRA0(\blk00000003/sig000002ba ), + .DPRA1(\blk00000003/sig000002be ), + .DPRA2(\blk00000003/sig000002c4 ), + .DPRA3(\blk00000003/blk0000037b/sig00000bf4 ), + .DPRA4(\blk00000003/blk0000037b/sig00000bf4 ), + .WCLK(clk), + .WE(\blk00000003/blk0000037b/sig00000c19 ), + .SPO(\blk00000003/blk0000037b/sig00000bfe ), + .DPO(\blk00000003/blk0000037b/sig00000c10 ) + ); + RAM32X1D #( + .INIT ( 32'h00000005 )) + \blk00000003/blk0000037b/blk000003aa ( + .A0(\blk00000003/sig00000264 ), + .A1(\blk00000003/sig00000268 ), + .A2(\blk00000003/sig0000026b ), + .A3(\blk00000003/blk0000037b/sig00000bf4 ), + .A4(\blk00000003/blk0000037b/sig00000bf4 ), + .D(\blk00000003/sig000005bd ), + .DPRA0(\blk00000003/sig000002ba ), + .DPRA1(\blk00000003/sig000002be ), + .DPRA2(\blk00000003/sig000002c4 ), + .DPRA3(\blk00000003/blk0000037b/sig00000bf4 ), + .DPRA4(\blk00000003/blk0000037b/sig00000bf4 ), + .WCLK(clk), + .WE(\blk00000003/blk0000037b/sig00000c19 ), + .SPO(\blk00000003/blk0000037b/sig00000c00 ), + .DPO(\blk00000003/blk0000037b/sig00000c12 ) + ); + RAM32X1D #( + .INIT ( 32'h00000009 )) + \blk00000003/blk0000037b/blk000003a9 ( + .A0(\blk00000003/sig00000264 ), + .A1(\blk00000003/sig00000268 ), + .A2(\blk00000003/sig0000026b ), + .A3(\blk00000003/blk0000037b/sig00000bf4 ), + .A4(\blk00000003/blk0000037b/sig00000bf4 ), + .D(\blk00000003/sig000005c0 ), + .DPRA0(\blk00000003/sig000002ba ), + .DPRA1(\blk00000003/sig000002be ), + .DPRA2(\blk00000003/sig000002c4 ), + .DPRA3(\blk00000003/blk0000037b/sig00000bf4 ), + .DPRA4(\blk00000003/blk0000037b/sig00000bf4 ), + .WCLK(clk), + .WE(\blk00000003/blk0000037b/sig00000c19 ), + .SPO(\blk00000003/blk0000037b/sig00000bfd ), + .DPO(\blk00000003/blk0000037b/sig00000c0f ) + ); + RAM32X1D #( + .INIT ( 32'h00000003 )) + \blk00000003/blk0000037b/blk000003a8 ( + .A0(\blk00000003/sig00000264 ), + .A1(\blk00000003/sig00000268 ), + .A2(\blk00000003/sig0000026b ), + .A3(\blk00000003/blk0000037b/sig00000bf4 ), + .A4(\blk00000003/blk0000037b/sig00000bf4 ), + .D(\blk00000003/sig000005c1 ), + .DPRA0(\blk00000003/sig000002ba ), + .DPRA1(\blk00000003/sig000002be ), + .DPRA2(\blk00000003/sig000002c4 ), + .DPRA3(\blk00000003/blk0000037b/sig00000bf4 ), + .DPRA4(\blk00000003/blk0000037b/sig00000bf4 ), + .WCLK(clk), + .WE(\blk00000003/blk0000037b/sig00000c19 ), + .SPO(\blk00000003/blk0000037b/sig00000bfc ), + .DPO(\blk00000003/blk0000037b/sig00000c0e ) + ); + RAM32X1D #( + .INIT ( 32'h0000000F )) + \blk00000003/blk0000037b/blk000003a7 ( + .A0(\blk00000003/sig00000264 ), + .A1(\blk00000003/sig00000268 ), + .A2(\blk00000003/sig0000026b ), + .A3(\blk00000003/blk0000037b/sig00000bf4 ), + .A4(\blk00000003/blk0000037b/sig00000bf4 ), + .D(\blk00000003/sig000005c2 ), + .DPRA0(\blk00000003/sig000002ba ), + .DPRA1(\blk00000003/sig000002be ), + .DPRA2(\blk00000003/sig000002c4 ), + .DPRA3(\blk00000003/blk0000037b/sig00000bf4 ), + .DPRA4(\blk00000003/blk0000037b/sig00000bf4 ), + .WCLK(clk), + .WE(\blk00000003/blk0000037b/sig00000c19 ), + .SPO(\blk00000003/blk0000037b/sig00000bfb ), + .DPO(\blk00000003/blk0000037b/sig00000c0d ) + ); + RAM32X1D #( + .INIT ( 32'h00000000 )) + \blk00000003/blk0000037b/blk000003a6 ( + .A0(\blk00000003/sig00000264 ), + .A1(\blk00000003/sig00000268 ), + .A2(\blk00000003/sig0000026b ), + .A3(\blk00000003/blk0000037b/sig00000bf4 ), + .A4(\blk00000003/blk0000037b/sig00000bf4 ), + .D(\blk00000003/sig000005c3 ), + .DPRA0(\blk00000003/sig000002ba ), + .DPRA1(\blk00000003/sig000002be ), + .DPRA2(\blk00000003/sig000002c4 ), + .DPRA3(\blk00000003/blk0000037b/sig00000bf4 ), + .DPRA4(\blk00000003/blk0000037b/sig00000bf4 ), + .WCLK(clk), + .WE(\blk00000003/blk0000037b/sig00000c19 ), + .SPO(\blk00000003/blk0000037b/sig00000bfa ), + .DPO(\blk00000003/blk0000037b/sig00000c0c ) + ); + RAM32X1D #( + .INIT ( 32'h00000008 )) + \blk00000003/blk0000037b/blk000003a5 ( + .A0(\blk00000003/sig00000264 ), + .A1(\blk00000003/sig00000268 ), + .A2(\blk00000003/sig0000026b ), + .A3(\blk00000003/blk0000037b/sig00000bf4 ), + .A4(\blk00000003/blk0000037b/sig00000bf4 ), + .D(\blk00000003/sig000005c4 ), + .DPRA0(\blk00000003/sig000002ba ), + .DPRA1(\blk00000003/sig000002be ), + .DPRA2(\blk00000003/sig000002c4 ), + .DPRA3(\blk00000003/blk0000037b/sig00000bf4 ), + .DPRA4(\blk00000003/blk0000037b/sig00000bf4 ), + .WCLK(clk), + .WE(\blk00000003/blk0000037b/sig00000c19 ), + .SPO(\blk00000003/blk0000037b/sig00000bf9 ), + .DPO(\blk00000003/blk0000037b/sig00000c0b ) + ); + RAM32X1D #( + .INIT ( 32'h00000004 )) + \blk00000003/blk0000037b/blk000003a4 ( + .A0(\blk00000003/sig00000264 ), + .A1(\blk00000003/sig00000268 ), + .A2(\blk00000003/sig0000026b ), + .A3(\blk00000003/blk0000037b/sig00000bf4 ), + .A4(\blk00000003/blk0000037b/sig00000bf4 ), + .D(\blk00000003/sig000005c5 ), + .DPRA0(\blk00000003/sig000002ba ), + .DPRA1(\blk00000003/sig000002be ), + .DPRA2(\blk00000003/sig000002c4 ), + .DPRA3(\blk00000003/blk0000037b/sig00000bf4 ), + .DPRA4(\blk00000003/blk0000037b/sig00000bf4 ), + .WCLK(clk), + .WE(\blk00000003/blk0000037b/sig00000c19 ), + .SPO(\blk00000003/blk0000037b/sig00000bf8 ), + .DPO(\blk00000003/blk0000037b/sig00000c0a ) + ); + RAM32X1D #( + .INIT ( 32'h0000000B )) + \blk00000003/blk0000037b/blk000003a3 ( + .A0(\blk00000003/sig00000264 ), + .A1(\blk00000003/sig00000268 ), + .A2(\blk00000003/sig0000026b ), + .A3(\blk00000003/blk0000037b/sig00000bf4 ), + .A4(\blk00000003/blk0000037b/sig00000bf4 ), + .D(\blk00000003/sig000005c7 ), + .DPRA0(\blk00000003/sig000002ba ), + .DPRA1(\blk00000003/sig000002be ), + .DPRA2(\blk00000003/sig000002c4 ), + .DPRA3(\blk00000003/blk0000037b/sig00000bf4 ), + .DPRA4(\blk00000003/blk0000037b/sig00000bf4 ), + .WCLK(clk), + .WE(\blk00000003/blk0000037b/sig00000c19 ), + .SPO(\blk00000003/blk0000037b/sig00000bf6 ), + .DPO(\blk00000003/blk0000037b/sig00000c08 ) + ); + RAM32X1D #( + .INIT ( 32'h00000008 )) + \blk00000003/blk0000037b/blk000003a2 ( + .A0(\blk00000003/sig00000264 ), + .A1(\blk00000003/sig00000268 ), + .A2(\blk00000003/sig0000026b ), + .A3(\blk00000003/blk0000037b/sig00000bf4 ), + .A4(\blk00000003/blk0000037b/sig00000bf4 ), + .D(\blk00000003/sig000005c8 ), + .DPRA0(\blk00000003/sig000002ba ), + .DPRA1(\blk00000003/sig000002be ), + .DPRA2(\blk00000003/sig000002c4 ), + .DPRA3(\blk00000003/blk0000037b/sig00000bf4 ), + .DPRA4(\blk00000003/blk0000037b/sig00000bf4 ), + .WCLK(clk), + .WE(\blk00000003/blk0000037b/sig00000c19 ), + .SPO(\blk00000003/blk0000037b/sig00000bf5 ), + .DPO(\blk00000003/blk0000037b/sig00000c07 ) + ); + RAM32X1D #( + .INIT ( 32'h00000008 )) + \blk00000003/blk0000037b/blk000003a1 ( + .A0(\blk00000003/sig00000264 ), + .A1(\blk00000003/sig00000268 ), + .A2(\blk00000003/sig0000026b ), + .A3(\blk00000003/blk0000037b/sig00000bf4 ), + .A4(\blk00000003/blk0000037b/sig00000bf4 ), + .D(\blk00000003/sig000005c6 ), + .DPRA0(\blk00000003/sig000002ba ), + .DPRA1(\blk00000003/sig000002be ), + .DPRA2(\blk00000003/sig000002c4 ), + .DPRA3(\blk00000003/blk0000037b/sig00000bf4 ), + .DPRA4(\blk00000003/blk0000037b/sig00000bf4 ), + .WCLK(clk), + .WE(\blk00000003/blk0000037b/sig00000c19 ), + .SPO(\blk00000003/blk0000037b/sig00000bf7 ), + .DPO(\blk00000003/blk0000037b/sig00000c09 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk0000037b/blk000003a0 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk0000037b/sig00000c18 ), + .Q(\blk00000003/sig000002c5 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk0000037b/blk0000039f ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk0000037b/sig00000c17 ), + .Q(\blk00000003/sig000002c6 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk0000037b/blk0000039e ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk0000037b/sig00000c16 ), + .Q(\blk00000003/sig000002c7 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk0000037b/blk0000039d ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk0000037b/sig00000c15 ), + .Q(\blk00000003/sig000002c8 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk0000037b/blk0000039c ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk0000037b/sig00000c14 ), + .Q(\blk00000003/sig000002c9 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk0000037b/blk0000039b ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk0000037b/sig00000c13 ), + .Q(\blk00000003/sig000002ca ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk0000037b/blk0000039a ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk0000037b/sig00000c12 ), + .Q(\blk00000003/sig000002cb ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk0000037b/blk00000399 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk0000037b/sig00000c11 ), + .Q(\blk00000003/sig000002cc ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk0000037b/blk00000398 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk0000037b/sig00000c10 ), + .Q(\blk00000003/sig000002cd ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk0000037b/blk00000397 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk0000037b/sig00000c0f ), + .Q(\blk00000003/sig000002ce ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk0000037b/blk00000396 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk0000037b/sig00000c0e ), + .Q(\blk00000003/sig000002cf ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk0000037b/blk00000395 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk0000037b/sig00000c0d ), + .Q(\blk00000003/sig000002d0 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk0000037b/blk00000394 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk0000037b/sig00000c0c ), + .Q(\blk00000003/sig000002d1 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk0000037b/blk00000393 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk0000037b/sig00000c0b ), + .Q(\blk00000003/sig000002d2 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk0000037b/blk00000392 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk0000037b/sig00000c0a ), + .Q(\blk00000003/sig000002d3 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk0000037b/blk00000391 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk0000037b/sig00000c09 ), + .Q(\blk00000003/sig000002d4 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk0000037b/blk00000390 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk0000037b/sig00000c08 ), + .Q(\blk00000003/sig000002d5 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk0000037b/blk0000038f ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk0000037b/sig00000c07 ), + .Q(\blk00000003/sig000002d6 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk0000037b/blk0000038e ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk0000037b/sig00000c06 ), + .Q(\blk00000003/sig000005c9 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk0000037b/blk0000038d ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk0000037b/sig00000c05 ), + .Q(\blk00000003/sig000005ca ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk0000037b/blk0000038c ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk0000037b/sig00000c04 ), + .Q(\blk00000003/sig000005cb ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk0000037b/blk0000038b ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk0000037b/sig00000c03 ), + .Q(\blk00000003/sig000005cc ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk0000037b/blk0000038a ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk0000037b/sig00000c02 ), + .Q(\blk00000003/sig000005cd ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk0000037b/blk00000389 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk0000037b/sig00000c01 ), + .Q(\blk00000003/sig000005ce ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk0000037b/blk00000388 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk0000037b/sig00000c00 ), + .Q(\blk00000003/sig000005cf ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk0000037b/blk00000387 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk0000037b/sig00000bff ), + .Q(\blk00000003/sig000005d0 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk0000037b/blk00000386 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk0000037b/sig00000bfe ), + .Q(\blk00000003/sig000005d1 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk0000037b/blk00000385 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk0000037b/sig00000bfd ), + .Q(\blk00000003/sig000005d2 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk0000037b/blk00000384 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk0000037b/sig00000bfc ), + .Q(\blk00000003/sig000005d3 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk0000037b/blk00000383 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk0000037b/sig00000bfb ), + .Q(\blk00000003/sig000005d4 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk0000037b/blk00000382 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk0000037b/sig00000bfa ), + .Q(\blk00000003/sig000005d5 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk0000037b/blk00000381 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk0000037b/sig00000bf9 ), + .Q(\blk00000003/sig000005d6 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk0000037b/blk00000380 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk0000037b/sig00000bf8 ), + .Q(\blk00000003/sig000005d7 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk0000037b/blk0000037f ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk0000037b/sig00000bf7 ), + .Q(\blk00000003/sig000005d8 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk0000037b/blk0000037e ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk0000037b/sig00000bf6 ), + .Q(\blk00000003/sig000005d9 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk0000037b/blk0000037d ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk0000037b/sig00000bf5 ), + .Q(\blk00000003/sig000005da ) + ); + GND \blk00000003/blk0000037b/blk0000037c ( + .G(\blk00000003/blk0000037b/sig00000bf4 ) + ); + LUT2 #( + .INIT ( 4'h8 )) + \blk00000003/blk000003b4/blk000003ec ( + .I0(ce), + .I1(\blk00000003/sig000004e1 ), + .O(\blk00000003/blk000003b4/sig00000c7e ) + ); + RAM32X1D #( + .INIT ( 32'h00000005 )) + \blk00000003/blk000003b4/blk000003eb ( + .A0(\blk00000003/sig000004db ), + .A1(\blk00000003/sig000004dc ), + .A2(\blk00000003/sig000004dd ), + .A3(\blk00000003/blk000003b4/sig00000c59 ), + .A4(\blk00000003/blk000003b4/sig00000c59 ), + .D(\blk00000003/sig000005c9 ), + .DPRA0(\blk00000003/sig000004eb ), + .DPRA1(\blk00000003/sig000004e9 ), + .DPRA2(\blk00000003/sig000004e7 ), + .DPRA3(\blk00000003/blk000003b4/sig00000c59 ), + .DPRA4(\blk00000003/blk000003b4/sig00000c59 ), + .WCLK(clk), + .WE(\blk00000003/blk000003b4/sig00000c7e ), + .SPO(\blk00000003/blk000003b4/sig00000c6b ), + .DPO(\blk00000003/blk000003b4/sig00000c7d ) + ); + RAM32X1D #( + .INIT ( 32'h00000005 )) + \blk00000003/blk000003b4/blk000003ea ( + .A0(\blk00000003/sig000004db ), + .A1(\blk00000003/sig000004dc ), + .A2(\blk00000003/sig000004dd ), + .A3(\blk00000003/blk000003b4/sig00000c59 ), + .A4(\blk00000003/blk000003b4/sig00000c59 ), + .D(\blk00000003/sig000005ca ), + .DPRA0(\blk00000003/sig000004eb ), + .DPRA1(\blk00000003/sig000004e9 ), + .DPRA2(\blk00000003/sig000004e7 ), + .DPRA3(\blk00000003/blk000003b4/sig00000c59 ), + .DPRA4(\blk00000003/blk000003b4/sig00000c59 ), + .WCLK(clk), + .WE(\blk00000003/blk000003b4/sig00000c7e ), + .SPO(\blk00000003/blk000003b4/sig00000c6a ), + .DPO(\blk00000003/blk000003b4/sig00000c7c ) + ); + RAM32X1D #( + .INIT ( 32'h00000005 )) + \blk00000003/blk000003b4/blk000003e9 ( + .A0(\blk00000003/sig000004db ), + .A1(\blk00000003/sig000004dc ), + .A2(\blk00000003/sig000004dd ), + .A3(\blk00000003/blk000003b4/sig00000c59 ), + .A4(\blk00000003/blk000003b4/sig00000c59 ), + .D(\blk00000003/sig000005cb ), + .DPRA0(\blk00000003/sig000004eb ), + .DPRA1(\blk00000003/sig000004e9 ), + .DPRA2(\blk00000003/sig000004e7 ), + .DPRA3(\blk00000003/blk000003b4/sig00000c59 ), + .DPRA4(\blk00000003/blk000003b4/sig00000c59 ), + .WCLK(clk), + .WE(\blk00000003/blk000003b4/sig00000c7e ), + .SPO(\blk00000003/blk000003b4/sig00000c69 ), + .DPO(\blk00000003/blk000003b4/sig00000c7b ) + ); + RAM32X1D #( + .INIT ( 32'h00000005 )) + \blk00000003/blk000003b4/blk000003e8 ( + .A0(\blk00000003/sig000004db ), + .A1(\blk00000003/sig000004dc ), + .A2(\blk00000003/sig000004dd ), + .A3(\blk00000003/blk000003b4/sig00000c59 ), + .A4(\blk00000003/blk000003b4/sig00000c59 ), + .D(\blk00000003/sig000005cc ), + .DPRA0(\blk00000003/sig000004eb ), + .DPRA1(\blk00000003/sig000004e9 ), + .DPRA2(\blk00000003/sig000004e7 ), + .DPRA3(\blk00000003/blk000003b4/sig00000c59 ), + .DPRA4(\blk00000003/blk000003b4/sig00000c59 ), + .WCLK(clk), + .WE(\blk00000003/blk000003b4/sig00000c7e ), + .SPO(\blk00000003/blk000003b4/sig00000c68 ), + .DPO(\blk00000003/blk000003b4/sig00000c7a ) + ); + RAM32X1D #( + .INIT ( 32'h00000005 )) + \blk00000003/blk000003b4/blk000003e7 ( + .A0(\blk00000003/sig000004db ), + .A1(\blk00000003/sig000004dc ), + .A2(\blk00000003/sig000004dd ), + .A3(\blk00000003/blk000003b4/sig00000c59 ), + .A4(\blk00000003/blk000003b4/sig00000c59 ), + .D(\blk00000003/sig000005cd ), + .DPRA0(\blk00000003/sig000004eb ), + .DPRA1(\blk00000003/sig000004e9 ), + .DPRA2(\blk00000003/sig000004e7 ), + .DPRA3(\blk00000003/blk000003b4/sig00000c59 ), + .DPRA4(\blk00000003/blk000003b4/sig00000c59 ), + .WCLK(clk), + .WE(\blk00000003/blk000003b4/sig00000c7e ), + .SPO(\blk00000003/blk000003b4/sig00000c67 ), + .DPO(\blk00000003/blk000003b4/sig00000c79 ) + ); + RAM32X1D #( + .INIT ( 32'h0000000D )) + \blk00000003/blk000003b4/blk000003e6 ( + .A0(\blk00000003/sig000004db ), + .A1(\blk00000003/sig000004dc ), + .A2(\blk00000003/sig000004dd ), + .A3(\blk00000003/blk000003b4/sig00000c59 ), + .A4(\blk00000003/blk000003b4/sig00000c59 ), + .D(\blk00000003/sig000005ce ), + .DPRA0(\blk00000003/sig000004eb ), + .DPRA1(\blk00000003/sig000004e9 ), + .DPRA2(\blk00000003/sig000004e7 ), + .DPRA3(\blk00000003/blk000003b4/sig00000c59 ), + .DPRA4(\blk00000003/blk000003b4/sig00000c59 ), + .WCLK(clk), + .WE(\blk00000003/blk000003b4/sig00000c7e ), + .SPO(\blk00000003/blk000003b4/sig00000c66 ), + .DPO(\blk00000003/blk000003b4/sig00000c78 ) + ); + RAM32X1D #( + .INIT ( 32'h00000008 )) + \blk00000003/blk000003b4/blk000003e5 ( + .A0(\blk00000003/sig000004db ), + .A1(\blk00000003/sig000004dc ), + .A2(\blk00000003/sig000004dd ), + .A3(\blk00000003/blk000003b4/sig00000c59 ), + .A4(\blk00000003/blk000003b4/sig00000c59 ), + .D(\blk00000003/sig000005d0 ), + .DPRA0(\blk00000003/sig000004eb ), + .DPRA1(\blk00000003/sig000004e9 ), + .DPRA2(\blk00000003/sig000004e7 ), + .DPRA3(\blk00000003/blk000003b4/sig00000c59 ), + .DPRA4(\blk00000003/blk000003b4/sig00000c59 ), + .WCLK(clk), + .WE(\blk00000003/blk000003b4/sig00000c7e ), + .SPO(\blk00000003/blk000003b4/sig00000c64 ), + .DPO(\blk00000003/blk000003b4/sig00000c76 ) + ); + RAM32X1D #( + .INIT ( 32'h00000009 )) + \blk00000003/blk000003b4/blk000003e4 ( + .A0(\blk00000003/sig000004db ), + .A1(\blk00000003/sig000004dc ), + .A2(\blk00000003/sig000004dd ), + .A3(\blk00000003/blk000003b4/sig00000c59 ), + .A4(\blk00000003/blk000003b4/sig00000c59 ), + .D(\blk00000003/sig000005d1 ), + .DPRA0(\blk00000003/sig000004eb ), + .DPRA1(\blk00000003/sig000004e9 ), + .DPRA2(\blk00000003/sig000004e7 ), + .DPRA3(\blk00000003/blk000003b4/sig00000c59 ), + .DPRA4(\blk00000003/blk000003b4/sig00000c59 ), + .WCLK(clk), + .WE(\blk00000003/blk000003b4/sig00000c7e ), + .SPO(\blk00000003/blk000003b4/sig00000c63 ), + .DPO(\blk00000003/blk000003b4/sig00000c75 ) + ); + RAM32X1D #( + .INIT ( 32'h00000003 )) + \blk00000003/blk000003b4/blk000003e3 ( + .A0(\blk00000003/sig000004db ), + .A1(\blk00000003/sig000004dc ), + .A2(\blk00000003/sig000004dd ), + .A3(\blk00000003/blk000003b4/sig00000c59 ), + .A4(\blk00000003/blk000003b4/sig00000c59 ), + .D(\blk00000003/sig000005cf ), + .DPRA0(\blk00000003/sig000004eb ), + .DPRA1(\blk00000003/sig000004e9 ), + .DPRA2(\blk00000003/sig000004e7 ), + .DPRA3(\blk00000003/blk000003b4/sig00000c59 ), + .DPRA4(\blk00000003/blk000003b4/sig00000c59 ), + .WCLK(clk), + .WE(\blk00000003/blk000003b4/sig00000c7e ), + .SPO(\blk00000003/blk000003b4/sig00000c65 ), + .DPO(\blk00000003/blk000003b4/sig00000c77 ) + ); + RAM32X1D #( + .INIT ( 32'h0000000A )) + \blk00000003/blk000003b4/blk000003e2 ( + .A0(\blk00000003/sig000004db ), + .A1(\blk00000003/sig000004dc ), + .A2(\blk00000003/sig000004dd ), + .A3(\blk00000003/blk000003b4/sig00000c59 ), + .A4(\blk00000003/blk000003b4/sig00000c59 ), + .D(\blk00000003/sig000005d2 ), + .DPRA0(\blk00000003/sig000004eb ), + .DPRA1(\blk00000003/sig000004e9 ), + .DPRA2(\blk00000003/sig000004e7 ), + .DPRA3(\blk00000003/blk000003b4/sig00000c59 ), + .DPRA4(\blk00000003/blk000003b4/sig00000c59 ), + .WCLK(clk), + .WE(\blk00000003/blk000003b4/sig00000c7e ), + .SPO(\blk00000003/blk000003b4/sig00000c62 ), + .DPO(\blk00000003/blk000003b4/sig00000c74 ) + ); + RAM32X1D #( + .INIT ( 32'h00000006 )) + \blk00000003/blk000003b4/blk000003e1 ( + .A0(\blk00000003/sig000004db ), + .A1(\blk00000003/sig000004dc ), + .A2(\blk00000003/sig000004dd ), + .A3(\blk00000003/blk000003b4/sig00000c59 ), + .A4(\blk00000003/blk000003b4/sig00000c59 ), + .D(\blk00000003/sig000005d3 ), + .DPRA0(\blk00000003/sig000004eb ), + .DPRA1(\blk00000003/sig000004e9 ), + .DPRA2(\blk00000003/sig000004e7 ), + .DPRA3(\blk00000003/blk000003b4/sig00000c59 ), + .DPRA4(\blk00000003/blk000003b4/sig00000c59 ), + .WCLK(clk), + .WE(\blk00000003/blk000003b4/sig00000c7e ), + .SPO(\blk00000003/blk000003b4/sig00000c61 ), + .DPO(\blk00000003/blk000003b4/sig00000c73 ) + ); + RAM32X1D #( + .INIT ( 32'h0000000C )) + \blk00000003/blk000003b4/blk000003e0 ( + .A0(\blk00000003/sig000004db ), + .A1(\blk00000003/sig000004dc ), + .A2(\blk00000003/sig000004dd ), + .A3(\blk00000003/blk000003b4/sig00000c59 ), + .A4(\blk00000003/blk000003b4/sig00000c59 ), + .D(\blk00000003/sig000005d4 ), + .DPRA0(\blk00000003/sig000004eb ), + .DPRA1(\blk00000003/sig000004e9 ), + .DPRA2(\blk00000003/sig000004e7 ), + .DPRA3(\blk00000003/blk000003b4/sig00000c59 ), + .DPRA4(\blk00000003/blk000003b4/sig00000c59 ), + .WCLK(clk), + .WE(\blk00000003/blk000003b4/sig00000c7e ), + .SPO(\blk00000003/blk000003b4/sig00000c60 ), + .DPO(\blk00000003/blk000003b4/sig00000c72 ) + ); + RAM32X1D #( + .INIT ( 32'h0000000A )) + \blk00000003/blk000003b4/blk000003df ( + .A0(\blk00000003/sig000004db ), + .A1(\blk00000003/sig000004dc ), + .A2(\blk00000003/sig000004dd ), + .A3(\blk00000003/blk000003b4/sig00000c59 ), + .A4(\blk00000003/blk000003b4/sig00000c59 ), + .D(\blk00000003/sig000005d5 ), + .DPRA0(\blk00000003/sig000004eb ), + .DPRA1(\blk00000003/sig000004e9 ), + .DPRA2(\blk00000003/sig000004e7 ), + .DPRA3(\blk00000003/blk000003b4/sig00000c59 ), + .DPRA4(\blk00000003/blk000003b4/sig00000c59 ), + .WCLK(clk), + .WE(\blk00000003/blk000003b4/sig00000c7e ), + .SPO(\blk00000003/blk000003b4/sig00000c5f ), + .DPO(\blk00000003/blk000003b4/sig00000c71 ) + ); + RAM32X1D #( + .INIT ( 32'h00000001 )) + \blk00000003/blk000003b4/blk000003de ( + .A0(\blk00000003/sig000004db ), + .A1(\blk00000003/sig000004dc ), + .A2(\blk00000003/sig000004dd ), + .A3(\blk00000003/blk000003b4/sig00000c59 ), + .A4(\blk00000003/blk000003b4/sig00000c59 ), + .D(\blk00000003/sig000005d6 ), + .DPRA0(\blk00000003/sig000004eb ), + .DPRA1(\blk00000003/sig000004e9 ), + .DPRA2(\blk00000003/sig000004e7 ), + .DPRA3(\blk00000003/blk000003b4/sig00000c59 ), + .DPRA4(\blk00000003/blk000003b4/sig00000c59 ), + .WCLK(clk), + .WE(\blk00000003/blk000003b4/sig00000c7e ), + .SPO(\blk00000003/blk000003b4/sig00000c5e ), + .DPO(\blk00000003/blk000003b4/sig00000c70 ) + ); + RAM32X1D #( + .INIT ( 32'h00000003 )) + \blk00000003/blk000003b4/blk000003dd ( + .A0(\blk00000003/sig000004db ), + .A1(\blk00000003/sig000004dc ), + .A2(\blk00000003/sig000004dd ), + .A3(\blk00000003/blk000003b4/sig00000c59 ), + .A4(\blk00000003/blk000003b4/sig00000c59 ), + .D(\blk00000003/sig000005d7 ), + .DPRA0(\blk00000003/sig000004eb ), + .DPRA1(\blk00000003/sig000004e9 ), + .DPRA2(\blk00000003/sig000004e7 ), + .DPRA3(\blk00000003/blk000003b4/sig00000c59 ), + .DPRA4(\blk00000003/blk000003b4/sig00000c59 ), + .WCLK(clk), + .WE(\blk00000003/blk000003b4/sig00000c7e ), + .SPO(\blk00000003/blk000003b4/sig00000c5d ), + .DPO(\blk00000003/blk000003b4/sig00000c6f ) + ); + RAM32X1D #( + .INIT ( 32'h0000000B )) + \blk00000003/blk000003b4/blk000003dc ( + .A0(\blk00000003/sig000004db ), + .A1(\blk00000003/sig000004dc ), + .A2(\blk00000003/sig000004dd ), + .A3(\blk00000003/blk000003b4/sig00000c59 ), + .A4(\blk00000003/blk000003b4/sig00000c59 ), + .D(\blk00000003/sig000005d9 ), + .DPRA0(\blk00000003/sig000004eb ), + .DPRA1(\blk00000003/sig000004e9 ), + .DPRA2(\blk00000003/sig000004e7 ), + .DPRA3(\blk00000003/blk000003b4/sig00000c59 ), + .DPRA4(\blk00000003/blk000003b4/sig00000c59 ), + .WCLK(clk), + .WE(\blk00000003/blk000003b4/sig00000c7e ), + .SPO(\blk00000003/blk000003b4/sig00000c5b ), + .DPO(\blk00000003/blk000003b4/sig00000c6d ) + ); + RAM32X1D #( + .INIT ( 32'h00000001 )) + \blk00000003/blk000003b4/blk000003db ( + .A0(\blk00000003/sig000004db ), + .A1(\blk00000003/sig000004dc ), + .A2(\blk00000003/sig000004dd ), + .A3(\blk00000003/blk000003b4/sig00000c59 ), + .A4(\blk00000003/blk000003b4/sig00000c59 ), + .D(\blk00000003/sig000005da ), + .DPRA0(\blk00000003/sig000004eb ), + .DPRA1(\blk00000003/sig000004e9 ), + .DPRA2(\blk00000003/sig000004e7 ), + .DPRA3(\blk00000003/blk000003b4/sig00000c59 ), + .DPRA4(\blk00000003/blk000003b4/sig00000c59 ), + .WCLK(clk), + .WE(\blk00000003/blk000003b4/sig00000c7e ), + .SPO(\blk00000003/blk000003b4/sig00000c5a ), + .DPO(\blk00000003/blk000003b4/sig00000c6c ) + ); + RAM32X1D #( + .INIT ( 32'h0000000F )) + \blk00000003/blk000003b4/blk000003da ( + .A0(\blk00000003/sig000004db ), + .A1(\blk00000003/sig000004dc ), + .A2(\blk00000003/sig000004dd ), + .A3(\blk00000003/blk000003b4/sig00000c59 ), + .A4(\blk00000003/blk000003b4/sig00000c59 ), + .D(\blk00000003/sig000005d8 ), + .DPRA0(\blk00000003/sig000004eb ), + .DPRA1(\blk00000003/sig000004e9 ), + .DPRA2(\blk00000003/sig000004e7 ), + .DPRA3(\blk00000003/blk000003b4/sig00000c59 ), + .DPRA4(\blk00000003/blk000003b4/sig00000c59 ), + .WCLK(clk), + .WE(\blk00000003/blk000003b4/sig00000c7e ), + .SPO(\blk00000003/blk000003b4/sig00000c5c ), + .DPO(\blk00000003/blk000003b4/sig00000c6e ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000003b4/blk000003d9 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk000003b4/sig00000c7d ), + .Q(\blk00000003/sig00000469 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000003b4/blk000003d8 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk000003b4/sig00000c7c ), + .Q(\blk00000003/sig0000046a ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000003b4/blk000003d7 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk000003b4/sig00000c7b ), + .Q(\blk00000003/sig0000046b ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000003b4/blk000003d6 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk000003b4/sig00000c7a ), + .Q(\blk00000003/sig0000046c ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000003b4/blk000003d5 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk000003b4/sig00000c79 ), + .Q(\blk00000003/sig0000046d ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000003b4/blk000003d4 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk000003b4/sig00000c78 ), + .Q(\blk00000003/sig0000046e ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000003b4/blk000003d3 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk000003b4/sig00000c77 ), + .Q(\blk00000003/sig0000046f ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000003b4/blk000003d2 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk000003b4/sig00000c76 ), + .Q(\blk00000003/sig00000470 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000003b4/blk000003d1 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk000003b4/sig00000c75 ), + .Q(\blk00000003/sig00000471 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000003b4/blk000003d0 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk000003b4/sig00000c74 ), + .Q(\blk00000003/sig00000472 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000003b4/blk000003cf ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk000003b4/sig00000c73 ), + .Q(\blk00000003/sig00000473 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000003b4/blk000003ce ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk000003b4/sig00000c72 ), + .Q(\blk00000003/sig00000474 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000003b4/blk000003cd ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk000003b4/sig00000c71 ), + .Q(\blk00000003/sig00000475 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000003b4/blk000003cc ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk000003b4/sig00000c70 ), + .Q(\blk00000003/sig00000476 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000003b4/blk000003cb ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk000003b4/sig00000c6f ), + .Q(\blk00000003/sig00000477 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000003b4/blk000003ca ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk000003b4/sig00000c6e ), + .Q(\blk00000003/sig00000478 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000003b4/blk000003c9 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk000003b4/sig00000c6d ), + .Q(\blk00000003/sig00000479 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000003b4/blk000003c8 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk000003b4/sig00000c6c ), + .Q(\blk00000003/sig0000047a ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000003b4/blk000003c7 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk000003b4/sig00000c6b ), + .Q(\blk00000003/sig000005db ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000003b4/blk000003c6 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk000003b4/sig00000c6a ), + .Q(\blk00000003/sig000005dc ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000003b4/blk000003c5 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk000003b4/sig00000c69 ), + .Q(\blk00000003/sig000005dd ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000003b4/blk000003c4 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk000003b4/sig00000c68 ), + .Q(\blk00000003/sig000005de ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000003b4/blk000003c3 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk000003b4/sig00000c67 ), + .Q(\blk00000003/sig000005df ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000003b4/blk000003c2 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk000003b4/sig00000c66 ), + .Q(\blk00000003/sig000005e0 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000003b4/blk000003c1 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk000003b4/sig00000c65 ), + .Q(\blk00000003/sig000005e1 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000003b4/blk000003c0 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk000003b4/sig00000c64 ), + .Q(\blk00000003/sig000005e2 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000003b4/blk000003bf ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk000003b4/sig00000c63 ), + .Q(\blk00000003/sig000005e3 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000003b4/blk000003be ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk000003b4/sig00000c62 ), + .Q(\blk00000003/sig000005e4 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000003b4/blk000003bd ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk000003b4/sig00000c61 ), + .Q(\blk00000003/sig000005e5 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000003b4/blk000003bc ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk000003b4/sig00000c60 ), + .Q(\blk00000003/sig000005e6 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000003b4/blk000003bb ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk000003b4/sig00000c5f ), + .Q(\blk00000003/sig000005e7 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000003b4/blk000003ba ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk000003b4/sig00000c5e ), + .Q(\blk00000003/sig000005e8 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000003b4/blk000003b9 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk000003b4/sig00000c5d ), + .Q(\blk00000003/sig000005e9 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000003b4/blk000003b8 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk000003b4/sig00000c5c ), + .Q(\blk00000003/sig000005ea ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000003b4/blk000003b7 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk000003b4/sig00000c5b ), + .Q(\blk00000003/sig000005eb ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000003b4/blk000003b6 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk000003b4/sig00000c5a ), + .Q(\blk00000003/sig000005ec ) + ); + GND \blk00000003/blk000003b4/blk000003b5 ( + .G(\blk00000003/blk000003b4/sig00000c59 ) + ); + LUT2 #( + .INIT ( 4'h8 )) + \blk00000003/blk0000044d/blk00000473 ( + .I0(ce), + .I1(\blk00000003/sig000004e2 ), + .O(\blk00000003/blk0000044d/sig00000cbf ) + ); + RAM32X1D #( + .INIT ( 32'h00000005 )) + \blk00000003/blk0000044d/blk00000472 ( + .A0(\blk00000003/sig000004de ), + .A1(\blk00000003/sig000004df ), + .A2(\blk00000003/sig000004e0 ), + .A3(\blk00000003/blk0000044d/sig00000cac ), + .A4(\blk00000003/blk0000044d/sig00000cac ), + .D(\blk00000003/sig000005db ), + .DPRA0(\blk00000003/sig000004ec ), + .DPRA1(\blk00000003/sig000004ea ), + .DPRA2(\blk00000003/sig000004e8 ), + .DPRA3(\blk00000003/blk0000044d/sig00000cac ), + .DPRA4(\blk00000003/blk0000044d/sig00000cac ), + .WCLK(clk), + .WE(\blk00000003/blk0000044d/sig00000cbf ), + .SPO(\NLW_blk00000003/blk0000044d/blk00000472_SPO_UNCONNECTED ), + .DPO(\blk00000003/blk0000044d/sig00000cbe ) + ); + RAM32X1D #( + .INIT ( 32'h0000000D )) + \blk00000003/blk0000044d/blk00000471 ( + .A0(\blk00000003/sig000004de ), + .A1(\blk00000003/sig000004df ), + .A2(\blk00000003/sig000004e0 ), + .A3(\blk00000003/blk0000044d/sig00000cac ), + .A4(\blk00000003/blk0000044d/sig00000cac ), + .D(\blk00000003/sig000005dc ), + .DPRA0(\blk00000003/sig000004ec ), + .DPRA1(\blk00000003/sig000004ea ), + .DPRA2(\blk00000003/sig000004e8 ), + .DPRA3(\blk00000003/blk0000044d/sig00000cac ), + .DPRA4(\blk00000003/blk0000044d/sig00000cac ), + .WCLK(clk), + .WE(\blk00000003/blk0000044d/sig00000cbf ), + .SPO(\NLW_blk00000003/blk0000044d/blk00000471_SPO_UNCONNECTED ), + .DPO(\blk00000003/blk0000044d/sig00000cbd ) + ); + RAM32X1D #( + .INIT ( 32'h00000005 )) + \blk00000003/blk0000044d/blk00000470 ( + .A0(\blk00000003/sig000004de ), + .A1(\blk00000003/sig000004df ), + .A2(\blk00000003/sig000004e0 ), + .A3(\blk00000003/blk0000044d/sig00000cac ), + .A4(\blk00000003/blk0000044d/sig00000cac ), + .D(\blk00000003/sig000005dd ), + .DPRA0(\blk00000003/sig000004ec ), + .DPRA1(\blk00000003/sig000004ea ), + .DPRA2(\blk00000003/sig000004e8 ), + .DPRA3(\blk00000003/blk0000044d/sig00000cac ), + .DPRA4(\blk00000003/blk0000044d/sig00000cac ), + .WCLK(clk), + .WE(\blk00000003/blk0000044d/sig00000cbf ), + .SPO(\NLW_blk00000003/blk0000044d/blk00000470_SPO_UNCONNECTED ), + .DPO(\blk00000003/blk0000044d/sig00000cbc ) + ); + RAM32X1D #( + .INIT ( 32'h00000009 )) + \blk00000003/blk0000044d/blk0000046f ( + .A0(\blk00000003/sig000004de ), + .A1(\blk00000003/sig000004df ), + .A2(\blk00000003/sig000004e0 ), + .A3(\blk00000003/blk0000044d/sig00000cac ), + .A4(\blk00000003/blk0000044d/sig00000cac ), + .D(\blk00000003/sig000005de ), + .DPRA0(\blk00000003/sig000004ec ), + .DPRA1(\blk00000003/sig000004ea ), + .DPRA2(\blk00000003/sig000004e8 ), + .DPRA3(\blk00000003/blk0000044d/sig00000cac ), + .DPRA4(\blk00000003/blk0000044d/sig00000cac ), + .WCLK(clk), + .WE(\blk00000003/blk0000044d/sig00000cbf ), + .SPO(\NLW_blk00000003/blk0000044d/blk0000046f_SPO_UNCONNECTED ), + .DPO(\blk00000003/blk0000044d/sig00000cbb ) + ); + RAM32X1D #( + .INIT ( 32'h00000002 )) + \blk00000003/blk0000044d/blk0000046e ( + .A0(\blk00000003/sig000004de ), + .A1(\blk00000003/sig000004df ), + .A2(\blk00000003/sig000004e0 ), + .A3(\blk00000003/blk0000044d/sig00000cac ), + .A4(\blk00000003/blk0000044d/sig00000cac ), + .D(\blk00000003/sig000005df ), + .DPRA0(\blk00000003/sig000004ec ), + .DPRA1(\blk00000003/sig000004ea ), + .DPRA2(\blk00000003/sig000004e8 ), + .DPRA3(\blk00000003/blk0000044d/sig00000cac ), + .DPRA4(\blk00000003/blk0000044d/sig00000cac ), + .WCLK(clk), + .WE(\blk00000003/blk0000044d/sig00000cbf ), + .SPO(\NLW_blk00000003/blk0000044d/blk0000046e_SPO_UNCONNECTED ), + .DPO(\blk00000003/blk0000044d/sig00000cba ) + ); + RAM32X1D #( + .INIT ( 32'h00000007 )) + \blk00000003/blk0000044d/blk0000046d ( + .A0(\blk00000003/sig000004de ), + .A1(\blk00000003/sig000004df ), + .A2(\blk00000003/sig000004e0 ), + .A3(\blk00000003/blk0000044d/sig00000cac ), + .A4(\blk00000003/blk0000044d/sig00000cac ), + .D(\blk00000003/sig000005e0 ), + .DPRA0(\blk00000003/sig000004ec ), + .DPRA1(\blk00000003/sig000004ea ), + .DPRA2(\blk00000003/sig000004e8 ), + .DPRA3(\blk00000003/blk0000044d/sig00000cac ), + .DPRA4(\blk00000003/blk0000044d/sig00000cac ), + .WCLK(clk), + .WE(\blk00000003/blk0000044d/sig00000cbf ), + .SPO(\NLW_blk00000003/blk0000044d/blk0000046d_SPO_UNCONNECTED ), + .DPO(\blk00000003/blk0000044d/sig00000cb9 ) + ); + RAM32X1D #( + .INIT ( 32'h00000009 )) + \blk00000003/blk0000044d/blk0000046c ( + .A0(\blk00000003/sig000004de ), + .A1(\blk00000003/sig000004df ), + .A2(\blk00000003/sig000004e0 ), + .A3(\blk00000003/blk0000044d/sig00000cac ), + .A4(\blk00000003/blk0000044d/sig00000cac ), + .D(\blk00000003/sig000005e2 ), + .DPRA0(\blk00000003/sig000004ec ), + .DPRA1(\blk00000003/sig000004ea ), + .DPRA2(\blk00000003/sig000004e8 ), + .DPRA3(\blk00000003/blk0000044d/sig00000cac ), + .DPRA4(\blk00000003/blk0000044d/sig00000cac ), + .WCLK(clk), + .WE(\blk00000003/blk0000044d/sig00000cbf ), + .SPO(\NLW_blk00000003/blk0000044d/blk0000046c_SPO_UNCONNECTED ), + .DPO(\blk00000003/blk0000044d/sig00000cb7 ) + ); + RAM32X1D #( + .INIT ( 32'h00000000 )) + \blk00000003/blk0000044d/blk0000046b ( + .A0(\blk00000003/sig000004de ), + .A1(\blk00000003/sig000004df ), + .A2(\blk00000003/sig000004e0 ), + .A3(\blk00000003/blk0000044d/sig00000cac ), + .A4(\blk00000003/blk0000044d/sig00000cac ), + .D(\blk00000003/sig000005e3 ), + .DPRA0(\blk00000003/sig000004ec ), + .DPRA1(\blk00000003/sig000004ea ), + .DPRA2(\blk00000003/sig000004e8 ), + .DPRA3(\blk00000003/blk0000044d/sig00000cac ), + .DPRA4(\blk00000003/blk0000044d/sig00000cac ), + .WCLK(clk), + .WE(\blk00000003/blk0000044d/sig00000cbf ), + .SPO(\NLW_blk00000003/blk0000044d/blk0000046b_SPO_UNCONNECTED ), + .DPO(\blk00000003/blk0000044d/sig00000cb6 ) + ); + RAM32X1D #( + .INIT ( 32'h00000007 )) + \blk00000003/blk0000044d/blk0000046a ( + .A0(\blk00000003/sig000004de ), + .A1(\blk00000003/sig000004df ), + .A2(\blk00000003/sig000004e0 ), + .A3(\blk00000003/blk0000044d/sig00000cac ), + .A4(\blk00000003/blk0000044d/sig00000cac ), + .D(\blk00000003/sig000005e1 ), + .DPRA0(\blk00000003/sig000004ec ), + .DPRA1(\blk00000003/sig000004ea ), + .DPRA2(\blk00000003/sig000004e8 ), + .DPRA3(\blk00000003/blk0000044d/sig00000cac ), + .DPRA4(\blk00000003/blk0000044d/sig00000cac ), + .WCLK(clk), + .WE(\blk00000003/blk0000044d/sig00000cbf ), + .SPO(\NLW_blk00000003/blk0000044d/blk0000046a_SPO_UNCONNECTED ), + .DPO(\blk00000003/blk0000044d/sig00000cb8 ) + ); + RAM32X1D #( + .INIT ( 32'h00000002 )) + \blk00000003/blk0000044d/blk00000469 ( + .A0(\blk00000003/sig000004de ), + .A1(\blk00000003/sig000004df ), + .A2(\blk00000003/sig000004e0 ), + .A3(\blk00000003/blk0000044d/sig00000cac ), + .A4(\blk00000003/blk0000044d/sig00000cac ), + .D(\blk00000003/sig000005e4 ), + .DPRA0(\blk00000003/sig000004ec ), + .DPRA1(\blk00000003/sig000004ea ), + .DPRA2(\blk00000003/sig000004e8 ), + .DPRA3(\blk00000003/blk0000044d/sig00000cac ), + .DPRA4(\blk00000003/blk0000044d/sig00000cac ), + .WCLK(clk), + .WE(\blk00000003/blk0000044d/sig00000cbf ), + .SPO(\NLW_blk00000003/blk0000044d/blk00000469_SPO_UNCONNECTED ), + .DPO(\blk00000003/blk0000044d/sig00000cb5 ) + ); + RAM32X1D #( + .INIT ( 32'h00000000 )) + \blk00000003/blk0000044d/blk00000468 ( + .A0(\blk00000003/sig000004de ), + .A1(\blk00000003/sig000004df ), + .A2(\blk00000003/sig000004e0 ), + .A3(\blk00000003/blk0000044d/sig00000cac ), + .A4(\blk00000003/blk0000044d/sig00000cac ), + .D(\blk00000003/sig000005e5 ), + .DPRA0(\blk00000003/sig000004ec ), + .DPRA1(\blk00000003/sig000004ea ), + .DPRA2(\blk00000003/sig000004e8 ), + .DPRA3(\blk00000003/blk0000044d/sig00000cac ), + .DPRA4(\blk00000003/blk0000044d/sig00000cac ), + .WCLK(clk), + .WE(\blk00000003/blk0000044d/sig00000cbf ), + .SPO(\NLW_blk00000003/blk0000044d/blk00000468_SPO_UNCONNECTED ), + .DPO(\blk00000003/blk0000044d/sig00000cb4 ) + ); + RAM32X1D #( + .INIT ( 32'h0000000C )) + \blk00000003/blk0000044d/blk00000467 ( + .A0(\blk00000003/sig000004de ), + .A1(\blk00000003/sig000004df ), + .A2(\blk00000003/sig000004e0 ), + .A3(\blk00000003/blk0000044d/sig00000cac ), + .A4(\blk00000003/blk0000044d/sig00000cac ), + .D(\blk00000003/sig000005e6 ), + .DPRA0(\blk00000003/sig000004ec ), + .DPRA1(\blk00000003/sig000004ea ), + .DPRA2(\blk00000003/sig000004e8 ), + .DPRA3(\blk00000003/blk0000044d/sig00000cac ), + .DPRA4(\blk00000003/blk0000044d/sig00000cac ), + .WCLK(clk), + .WE(\blk00000003/blk0000044d/sig00000cbf ), + .SPO(\NLW_blk00000003/blk0000044d/blk00000467_SPO_UNCONNECTED ), + .DPO(\blk00000003/blk0000044d/sig00000cb3 ) + ); + RAM32X1D #( + .INIT ( 32'h00000002 )) + \blk00000003/blk0000044d/blk00000466 ( + .A0(\blk00000003/sig000004de ), + .A1(\blk00000003/sig000004df ), + .A2(\blk00000003/sig000004e0 ), + .A3(\blk00000003/blk0000044d/sig00000cac ), + .A4(\blk00000003/blk0000044d/sig00000cac ), + .D(\blk00000003/sig000005e7 ), + .DPRA0(\blk00000003/sig000004ec ), + .DPRA1(\blk00000003/sig000004ea ), + .DPRA2(\blk00000003/sig000004e8 ), + .DPRA3(\blk00000003/blk0000044d/sig00000cac ), + .DPRA4(\blk00000003/blk0000044d/sig00000cac ), + .WCLK(clk), + .WE(\blk00000003/blk0000044d/sig00000cbf ), + .SPO(\NLW_blk00000003/blk0000044d/blk00000466_SPO_UNCONNECTED ), + .DPO(\blk00000003/blk0000044d/sig00000cb2 ) + ); + RAM32X1D #( + .INIT ( 32'h00000005 )) + \blk00000003/blk0000044d/blk00000465 ( + .A0(\blk00000003/sig000004de ), + .A1(\blk00000003/sig000004df ), + .A2(\blk00000003/sig000004e0 ), + .A3(\blk00000003/blk0000044d/sig00000cac ), + .A4(\blk00000003/blk0000044d/sig00000cac ), + .D(\blk00000003/sig000005e8 ), + .DPRA0(\blk00000003/sig000004ec ), + .DPRA1(\blk00000003/sig000004ea ), + .DPRA2(\blk00000003/sig000004e8 ), + .DPRA3(\blk00000003/blk0000044d/sig00000cac ), + .DPRA4(\blk00000003/blk0000044d/sig00000cac ), + .WCLK(clk), + .WE(\blk00000003/blk0000044d/sig00000cbf ), + .SPO(\NLW_blk00000003/blk0000044d/blk00000465_SPO_UNCONNECTED ), + .DPO(\blk00000003/blk0000044d/sig00000cb1 ) + ); + RAM32X1D #( + .INIT ( 32'h00000007 )) + \blk00000003/blk0000044d/blk00000464 ( + .A0(\blk00000003/sig000004de ), + .A1(\blk00000003/sig000004df ), + .A2(\blk00000003/sig000004e0 ), + .A3(\blk00000003/blk0000044d/sig00000cac ), + .A4(\blk00000003/blk0000044d/sig00000cac ), + .D(\blk00000003/sig000005e9 ), + .DPRA0(\blk00000003/sig000004ec ), + .DPRA1(\blk00000003/sig000004ea ), + .DPRA2(\blk00000003/sig000004e8 ), + .DPRA3(\blk00000003/blk0000044d/sig00000cac ), + .DPRA4(\blk00000003/blk0000044d/sig00000cac ), + .WCLK(clk), + .WE(\blk00000003/blk0000044d/sig00000cbf ), + .SPO(\NLW_blk00000003/blk0000044d/blk00000464_SPO_UNCONNECTED ), + .DPO(\blk00000003/blk0000044d/sig00000cb0 ) + ); + RAM32X1D #( + .INIT ( 32'h00000000 )) + \blk00000003/blk0000044d/blk00000463 ( + .A0(\blk00000003/sig000004de ), + .A1(\blk00000003/sig000004df ), + .A2(\blk00000003/sig000004e0 ), + .A3(\blk00000003/blk0000044d/sig00000cac ), + .A4(\blk00000003/blk0000044d/sig00000cac ), + .D(\blk00000003/sig000005eb ), + .DPRA0(\blk00000003/sig000004ec ), + .DPRA1(\blk00000003/sig000004ea ), + .DPRA2(\blk00000003/sig000004e8 ), + .DPRA3(\blk00000003/blk0000044d/sig00000cac ), + .DPRA4(\blk00000003/blk0000044d/sig00000cac ), + .WCLK(clk), + .WE(\blk00000003/blk0000044d/sig00000cbf ), + .SPO(\NLW_blk00000003/blk0000044d/blk00000463_SPO_UNCONNECTED ), + .DPO(\blk00000003/blk0000044d/sig00000cae ) + ); + RAM32X1D #( + .INIT ( 32'h00000009 )) + \blk00000003/blk0000044d/blk00000462 ( + .A0(\blk00000003/sig000004de ), + .A1(\blk00000003/sig000004df ), + .A2(\blk00000003/sig000004e0 ), + .A3(\blk00000003/blk0000044d/sig00000cac ), + .A4(\blk00000003/blk0000044d/sig00000cac ), + .D(\blk00000003/sig000005ec ), + .DPRA0(\blk00000003/sig000004ec ), + .DPRA1(\blk00000003/sig000004ea ), + .DPRA2(\blk00000003/sig000004e8 ), + .DPRA3(\blk00000003/blk0000044d/sig00000cac ), + .DPRA4(\blk00000003/blk0000044d/sig00000cac ), + .WCLK(clk), + .WE(\blk00000003/blk0000044d/sig00000cbf ), + .SPO(\NLW_blk00000003/blk0000044d/blk00000462_SPO_UNCONNECTED ), + .DPO(\blk00000003/blk0000044d/sig00000cad ) + ); + RAM32X1D #( + .INIT ( 32'h00000001 )) + \blk00000003/blk0000044d/blk00000461 ( + .A0(\blk00000003/sig000004de ), + .A1(\blk00000003/sig000004df ), + .A2(\blk00000003/sig000004e0 ), + .A3(\blk00000003/blk0000044d/sig00000cac ), + .A4(\blk00000003/blk0000044d/sig00000cac ), + .D(\blk00000003/sig000005ea ), + .DPRA0(\blk00000003/sig000004ec ), + .DPRA1(\blk00000003/sig000004ea ), + .DPRA2(\blk00000003/sig000004e8 ), + .DPRA3(\blk00000003/blk0000044d/sig00000cac ), + .DPRA4(\blk00000003/blk0000044d/sig00000cac ), + .WCLK(clk), + .WE(\blk00000003/blk0000044d/sig00000cbf ), + .SPO(\NLW_blk00000003/blk0000044d/blk00000461_SPO_UNCONNECTED ), + .DPO(\blk00000003/blk0000044d/sig00000caf ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk0000044d/blk00000460 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk0000044d/sig00000cbe ), + .Q(\blk00000003/sig000003c7 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk0000044d/blk0000045f ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk0000044d/sig00000cbd ), + .Q(\blk00000003/sig000003c8 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk0000044d/blk0000045e ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk0000044d/sig00000cbc ), + .Q(\blk00000003/sig000003c9 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk0000044d/blk0000045d ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk0000044d/sig00000cbb ), + .Q(\blk00000003/sig000003ca ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk0000044d/blk0000045c ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk0000044d/sig00000cba ), + .Q(\blk00000003/sig000003cb ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk0000044d/blk0000045b ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk0000044d/sig00000cb9 ), + .Q(\blk00000003/sig000003cc ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk0000044d/blk0000045a ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk0000044d/sig00000cb8 ), + .Q(\blk00000003/sig000003cd ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk0000044d/blk00000459 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk0000044d/sig00000cb7 ), + .Q(\blk00000003/sig000003ce ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk0000044d/blk00000458 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk0000044d/sig00000cb6 ), + .Q(\blk00000003/sig000003cf ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk0000044d/blk00000457 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk0000044d/sig00000cb5 ), + .Q(\blk00000003/sig000003d0 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk0000044d/blk00000456 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk0000044d/sig00000cb4 ), + .Q(\blk00000003/sig000003d1 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk0000044d/blk00000455 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk0000044d/sig00000cb3 ), + .Q(\blk00000003/sig000003d2 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk0000044d/blk00000454 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk0000044d/sig00000cb2 ), + .Q(\blk00000003/sig000003d3 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk0000044d/blk00000453 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk0000044d/sig00000cb1 ), + .Q(\blk00000003/sig000003d4 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk0000044d/blk00000452 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk0000044d/sig00000cb0 ), + .Q(\blk00000003/sig000003d5 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk0000044d/blk00000451 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk0000044d/sig00000caf ), + .Q(\blk00000003/sig000003d6 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk0000044d/blk00000450 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk0000044d/sig00000cae ), + .Q(\blk00000003/sig000003d7 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk0000044d/blk0000044f ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk0000044d/sig00000cad ), + .Q(\blk00000003/sig000003d8 ) + ); + GND \blk00000003/blk0000044d/blk0000044e ( + .G(\blk00000003/blk0000044d/sig00000cac ) + ); + LUT2 #( + .INIT ( 4'h8 )) + \blk00000003/blk000004a4/blk000004ca ( + .I0(ce), + .I1(\blk00000003/sig00000230 ), + .O(\blk00000003/blk000004a4/sig00000cfc ) + ); + RAM32X1D #( + .INIT ( 32'h00000000 )) + \blk00000003/blk000004a4/blk000004c9 ( + .A0(\blk00000003/sig00000237 ), + .A1(\blk00000003/blk000004a4/sig00000ce9 ), + .A2(\blk00000003/blk000004a4/sig00000ce9 ), + .A3(\blk00000003/blk000004a4/sig00000ce9 ), + .A4(\blk00000003/blk000004a4/sig00000ce9 ), + .D(\blk00000003/sig000005b7 ), + .DPRA0(\blk00000003/sig000005f0 ), + .DPRA1(\blk00000003/blk000004a4/sig00000ce9 ), + .DPRA2(\blk00000003/blk000004a4/sig00000ce9 ), + .DPRA3(\blk00000003/blk000004a4/sig00000ce9 ), + .DPRA4(\blk00000003/blk000004a4/sig00000ce9 ), + .WCLK(clk), + .WE(\blk00000003/blk000004a4/sig00000cfc ), + .SPO(\NLW_blk00000003/blk000004a4/blk000004c9_SPO_UNCONNECTED ), + .DPO(\blk00000003/blk000004a4/sig00000cfb ) + ); + RAM32X1D #( + .INIT ( 32'h00000001 )) + \blk00000003/blk000004a4/blk000004c8 ( + .A0(\blk00000003/sig00000237 ), + .A1(\blk00000003/blk000004a4/sig00000ce9 ), + .A2(\blk00000003/blk000004a4/sig00000ce9 ), + .A3(\blk00000003/blk000004a4/sig00000ce9 ), + .A4(\blk00000003/blk000004a4/sig00000ce9 ), + .D(\blk00000003/sig000005b8 ), + .DPRA0(\blk00000003/sig000005f0 ), + .DPRA1(\blk00000003/blk000004a4/sig00000ce9 ), + .DPRA2(\blk00000003/blk000004a4/sig00000ce9 ), + .DPRA3(\blk00000003/blk000004a4/sig00000ce9 ), + .DPRA4(\blk00000003/blk000004a4/sig00000ce9 ), + .WCLK(clk), + .WE(\blk00000003/blk000004a4/sig00000cfc ), + .SPO(\NLW_blk00000003/blk000004a4/blk000004c8_SPO_UNCONNECTED ), + .DPO(\blk00000003/blk000004a4/sig00000cfa ) + ); + RAM32X1D #( + .INIT ( 32'h00000001 )) + \blk00000003/blk000004a4/blk000004c7 ( + .A0(\blk00000003/sig00000237 ), + .A1(\blk00000003/blk000004a4/sig00000ce9 ), + .A2(\blk00000003/blk000004a4/sig00000ce9 ), + .A3(\blk00000003/blk000004a4/sig00000ce9 ), + .A4(\blk00000003/blk000004a4/sig00000ce9 ), + .D(\blk00000003/sig000005b9 ), + .DPRA0(\blk00000003/sig000005f0 ), + .DPRA1(\blk00000003/blk000004a4/sig00000ce9 ), + .DPRA2(\blk00000003/blk000004a4/sig00000ce9 ), + .DPRA3(\blk00000003/blk000004a4/sig00000ce9 ), + .DPRA4(\blk00000003/blk000004a4/sig00000ce9 ), + .WCLK(clk), + .WE(\blk00000003/blk000004a4/sig00000cfc ), + .SPO(\NLW_blk00000003/blk000004a4/blk000004c7_SPO_UNCONNECTED ), + .DPO(\blk00000003/blk000004a4/sig00000cf9 ) + ); + RAM32X1D #( + .INIT ( 32'h00000001 )) + \blk00000003/blk000004a4/blk000004c6 ( + .A0(\blk00000003/sig00000237 ), + .A1(\blk00000003/blk000004a4/sig00000ce9 ), + .A2(\blk00000003/blk000004a4/sig00000ce9 ), + .A3(\blk00000003/blk000004a4/sig00000ce9 ), + .A4(\blk00000003/blk000004a4/sig00000ce9 ), + .D(\blk00000003/sig000005ba ), + .DPRA0(\blk00000003/sig000005f0 ), + .DPRA1(\blk00000003/blk000004a4/sig00000ce9 ), + .DPRA2(\blk00000003/blk000004a4/sig00000ce9 ), + .DPRA3(\blk00000003/blk000004a4/sig00000ce9 ), + .DPRA4(\blk00000003/blk000004a4/sig00000ce9 ), + .WCLK(clk), + .WE(\blk00000003/blk000004a4/sig00000cfc ), + .SPO(\NLW_blk00000003/blk000004a4/blk000004c6_SPO_UNCONNECTED ), + .DPO(\blk00000003/blk000004a4/sig00000cf8 ) + ); + RAM32X1D #( + .INIT ( 32'h00000001 )) + \blk00000003/blk000004a4/blk000004c5 ( + .A0(\blk00000003/sig00000237 ), + .A1(\blk00000003/blk000004a4/sig00000ce9 ), + .A2(\blk00000003/blk000004a4/sig00000ce9 ), + .A3(\blk00000003/blk000004a4/sig00000ce9 ), + .A4(\blk00000003/blk000004a4/sig00000ce9 ), + .D(\blk00000003/sig000005bb ), + .DPRA0(\blk00000003/sig000005f0 ), + .DPRA1(\blk00000003/blk000004a4/sig00000ce9 ), + .DPRA2(\blk00000003/blk000004a4/sig00000ce9 ), + .DPRA3(\blk00000003/blk000004a4/sig00000ce9 ), + .DPRA4(\blk00000003/blk000004a4/sig00000ce9 ), + .WCLK(clk), + .WE(\blk00000003/blk000004a4/sig00000cfc ), + .SPO(\NLW_blk00000003/blk000004a4/blk000004c5_SPO_UNCONNECTED ), + .DPO(\blk00000003/blk000004a4/sig00000cf7 ) + ); + RAM32X1D #( + .INIT ( 32'h00000001 )) + \blk00000003/blk000004a4/blk000004c4 ( + .A0(\blk00000003/sig00000237 ), + .A1(\blk00000003/blk000004a4/sig00000ce9 ), + .A2(\blk00000003/blk000004a4/sig00000ce9 ), + .A3(\blk00000003/blk000004a4/sig00000ce9 ), + .A4(\blk00000003/blk000004a4/sig00000ce9 ), + .D(\blk00000003/sig000005bc ), + .DPRA0(\blk00000003/sig000005f0 ), + .DPRA1(\blk00000003/blk000004a4/sig00000ce9 ), + .DPRA2(\blk00000003/blk000004a4/sig00000ce9 ), + .DPRA3(\blk00000003/blk000004a4/sig00000ce9 ), + .DPRA4(\blk00000003/blk000004a4/sig00000ce9 ), + .WCLK(clk), + .WE(\blk00000003/blk000004a4/sig00000cfc ), + .SPO(\NLW_blk00000003/blk000004a4/blk000004c4_SPO_UNCONNECTED ), + .DPO(\blk00000003/blk000004a4/sig00000cf6 ) + ); + RAM32X1D #( + .INIT ( 32'h00000001 )) + \blk00000003/blk000004a4/blk000004c3 ( + .A0(\blk00000003/sig00000237 ), + .A1(\blk00000003/blk000004a4/sig00000ce9 ), + .A2(\blk00000003/blk000004a4/sig00000ce9 ), + .A3(\blk00000003/blk000004a4/sig00000ce9 ), + .A4(\blk00000003/blk000004a4/sig00000ce9 ), + .D(\blk00000003/sig000005be ), + .DPRA0(\blk00000003/sig000005f0 ), + .DPRA1(\blk00000003/blk000004a4/sig00000ce9 ), + .DPRA2(\blk00000003/blk000004a4/sig00000ce9 ), + .DPRA3(\blk00000003/blk000004a4/sig00000ce9 ), + .DPRA4(\blk00000003/blk000004a4/sig00000ce9 ), + .WCLK(clk), + .WE(\blk00000003/blk000004a4/sig00000cfc ), + .SPO(\NLW_blk00000003/blk000004a4/blk000004c3_SPO_UNCONNECTED ), + .DPO(\blk00000003/blk000004a4/sig00000cf4 ) + ); + RAM32X1D #( + .INIT ( 32'h00000001 )) + \blk00000003/blk000004a4/blk000004c2 ( + .A0(\blk00000003/sig00000237 ), + .A1(\blk00000003/blk000004a4/sig00000ce9 ), + .A2(\blk00000003/blk000004a4/sig00000ce9 ), + .A3(\blk00000003/blk000004a4/sig00000ce9 ), + .A4(\blk00000003/blk000004a4/sig00000ce9 ), + .D(\blk00000003/sig000005bf ), + .DPRA0(\blk00000003/sig000005f0 ), + .DPRA1(\blk00000003/blk000004a4/sig00000ce9 ), + .DPRA2(\blk00000003/blk000004a4/sig00000ce9 ), + .DPRA3(\blk00000003/blk000004a4/sig00000ce9 ), + .DPRA4(\blk00000003/blk000004a4/sig00000ce9 ), + .WCLK(clk), + .WE(\blk00000003/blk000004a4/sig00000cfc ), + .SPO(\NLW_blk00000003/blk000004a4/blk000004c2_SPO_UNCONNECTED ), + .DPO(\blk00000003/blk000004a4/sig00000cf3 ) + ); + RAM32X1D #( + .INIT ( 32'h00000001 )) + \blk00000003/blk000004a4/blk000004c1 ( + .A0(\blk00000003/sig00000237 ), + .A1(\blk00000003/blk000004a4/sig00000ce9 ), + .A2(\blk00000003/blk000004a4/sig00000ce9 ), + .A3(\blk00000003/blk000004a4/sig00000ce9 ), + .A4(\blk00000003/blk000004a4/sig00000ce9 ), + .D(\blk00000003/sig000005bd ), + .DPRA0(\blk00000003/sig000005f0 ), + .DPRA1(\blk00000003/blk000004a4/sig00000ce9 ), + .DPRA2(\blk00000003/blk000004a4/sig00000ce9 ), + .DPRA3(\blk00000003/blk000004a4/sig00000ce9 ), + .DPRA4(\blk00000003/blk000004a4/sig00000ce9 ), + .WCLK(clk), + .WE(\blk00000003/blk000004a4/sig00000cfc ), + .SPO(\NLW_blk00000003/blk000004a4/blk000004c1_SPO_UNCONNECTED ), + .DPO(\blk00000003/blk000004a4/sig00000cf5 ) + ); + RAM32X1D #( + .INIT ( 32'h00000001 )) + \blk00000003/blk000004a4/blk000004c0 ( + .A0(\blk00000003/sig00000237 ), + .A1(\blk00000003/blk000004a4/sig00000ce9 ), + .A2(\blk00000003/blk000004a4/sig00000ce9 ), + .A3(\blk00000003/blk000004a4/sig00000ce9 ), + .A4(\blk00000003/blk000004a4/sig00000ce9 ), + .D(\blk00000003/sig000005c0 ), + .DPRA0(\blk00000003/sig000005f0 ), + .DPRA1(\blk00000003/blk000004a4/sig00000ce9 ), + .DPRA2(\blk00000003/blk000004a4/sig00000ce9 ), + .DPRA3(\blk00000003/blk000004a4/sig00000ce9 ), + .DPRA4(\blk00000003/blk000004a4/sig00000ce9 ), + .WCLK(clk), + .WE(\blk00000003/blk000004a4/sig00000cfc ), + .SPO(\NLW_blk00000003/blk000004a4/blk000004c0_SPO_UNCONNECTED ), + .DPO(\blk00000003/blk000004a4/sig00000cf2 ) + ); + RAM32X1D #( + .INIT ( 32'h00000001 )) + \blk00000003/blk000004a4/blk000004bf ( + .A0(\blk00000003/sig00000237 ), + .A1(\blk00000003/blk000004a4/sig00000ce9 ), + .A2(\blk00000003/blk000004a4/sig00000ce9 ), + .A3(\blk00000003/blk000004a4/sig00000ce9 ), + .A4(\blk00000003/blk000004a4/sig00000ce9 ), + .D(\blk00000003/sig000005c1 ), + .DPRA0(\blk00000003/sig000005f0 ), + .DPRA1(\blk00000003/blk000004a4/sig00000ce9 ), + .DPRA2(\blk00000003/blk000004a4/sig00000ce9 ), + .DPRA3(\blk00000003/blk000004a4/sig00000ce9 ), + .DPRA4(\blk00000003/blk000004a4/sig00000ce9 ), + .WCLK(clk), + .WE(\blk00000003/blk000004a4/sig00000cfc ), + .SPO(\NLW_blk00000003/blk000004a4/blk000004bf_SPO_UNCONNECTED ), + .DPO(\blk00000003/blk000004a4/sig00000cf1 ) + ); + RAM32X1D #( + .INIT ( 32'h00000001 )) + \blk00000003/blk000004a4/blk000004be ( + .A0(\blk00000003/sig00000237 ), + .A1(\blk00000003/blk000004a4/sig00000ce9 ), + .A2(\blk00000003/blk000004a4/sig00000ce9 ), + .A3(\blk00000003/blk000004a4/sig00000ce9 ), + .A4(\blk00000003/blk000004a4/sig00000ce9 ), + .D(\blk00000003/sig000005c2 ), + .DPRA0(\blk00000003/sig000005f0 ), + .DPRA1(\blk00000003/blk000004a4/sig00000ce9 ), + .DPRA2(\blk00000003/blk000004a4/sig00000ce9 ), + .DPRA3(\blk00000003/blk000004a4/sig00000ce9 ), + .DPRA4(\blk00000003/blk000004a4/sig00000ce9 ), + .WCLK(clk), + .WE(\blk00000003/blk000004a4/sig00000cfc ), + .SPO(\NLW_blk00000003/blk000004a4/blk000004be_SPO_UNCONNECTED ), + .DPO(\blk00000003/blk000004a4/sig00000cf0 ) + ); + RAM32X1D #( + .INIT ( 32'h00000001 )) + \blk00000003/blk000004a4/blk000004bd ( + .A0(\blk00000003/sig00000237 ), + .A1(\blk00000003/blk000004a4/sig00000ce9 ), + .A2(\blk00000003/blk000004a4/sig00000ce9 ), + .A3(\blk00000003/blk000004a4/sig00000ce9 ), + .A4(\blk00000003/blk000004a4/sig00000ce9 ), + .D(\blk00000003/sig000005c3 ), + .DPRA0(\blk00000003/sig000005f0 ), + .DPRA1(\blk00000003/blk000004a4/sig00000ce9 ), + .DPRA2(\blk00000003/blk000004a4/sig00000ce9 ), + .DPRA3(\blk00000003/blk000004a4/sig00000ce9 ), + .DPRA4(\blk00000003/blk000004a4/sig00000ce9 ), + .WCLK(clk), + .WE(\blk00000003/blk000004a4/sig00000cfc ), + .SPO(\NLW_blk00000003/blk000004a4/blk000004bd_SPO_UNCONNECTED ), + .DPO(\blk00000003/blk000004a4/sig00000cef ) + ); + RAM32X1D #( + .INIT ( 32'h00000001 )) + \blk00000003/blk000004a4/blk000004bc ( + .A0(\blk00000003/sig00000237 ), + .A1(\blk00000003/blk000004a4/sig00000ce9 ), + .A2(\blk00000003/blk000004a4/sig00000ce9 ), + .A3(\blk00000003/blk000004a4/sig00000ce9 ), + .A4(\blk00000003/blk000004a4/sig00000ce9 ), + .D(\blk00000003/sig000005c4 ), + .DPRA0(\blk00000003/sig000005f0 ), + .DPRA1(\blk00000003/blk000004a4/sig00000ce9 ), + .DPRA2(\blk00000003/blk000004a4/sig00000ce9 ), + .DPRA3(\blk00000003/blk000004a4/sig00000ce9 ), + .DPRA4(\blk00000003/blk000004a4/sig00000ce9 ), + .WCLK(clk), + .WE(\blk00000003/blk000004a4/sig00000cfc ), + .SPO(\NLW_blk00000003/blk000004a4/blk000004bc_SPO_UNCONNECTED ), + .DPO(\blk00000003/blk000004a4/sig00000cee ) + ); + RAM32X1D #( + .INIT ( 32'h00000001 )) + \blk00000003/blk000004a4/blk000004bb ( + .A0(\blk00000003/sig00000237 ), + .A1(\blk00000003/blk000004a4/sig00000ce9 ), + .A2(\blk00000003/blk000004a4/sig00000ce9 ), + .A3(\blk00000003/blk000004a4/sig00000ce9 ), + .A4(\blk00000003/blk000004a4/sig00000ce9 ), + .D(\blk00000003/sig000005c5 ), + .DPRA0(\blk00000003/sig000005f0 ), + .DPRA1(\blk00000003/blk000004a4/sig00000ce9 ), + .DPRA2(\blk00000003/blk000004a4/sig00000ce9 ), + .DPRA3(\blk00000003/blk000004a4/sig00000ce9 ), + .DPRA4(\blk00000003/blk000004a4/sig00000ce9 ), + .WCLK(clk), + .WE(\blk00000003/blk000004a4/sig00000cfc ), + .SPO(\NLW_blk00000003/blk000004a4/blk000004bb_SPO_UNCONNECTED ), + .DPO(\blk00000003/blk000004a4/sig00000ced ) + ); + RAM32X1D #( + .INIT ( 32'h00000001 )) + \blk00000003/blk000004a4/blk000004ba ( + .A0(\blk00000003/sig00000237 ), + .A1(\blk00000003/blk000004a4/sig00000ce9 ), + .A2(\blk00000003/blk000004a4/sig00000ce9 ), + .A3(\blk00000003/blk000004a4/sig00000ce9 ), + .A4(\blk00000003/blk000004a4/sig00000ce9 ), + .D(\blk00000003/sig000005c7 ), + .DPRA0(\blk00000003/sig000005f0 ), + .DPRA1(\blk00000003/blk000004a4/sig00000ce9 ), + .DPRA2(\blk00000003/blk000004a4/sig00000ce9 ), + .DPRA3(\blk00000003/blk000004a4/sig00000ce9 ), + .DPRA4(\blk00000003/blk000004a4/sig00000ce9 ), + .WCLK(clk), + .WE(\blk00000003/blk000004a4/sig00000cfc ), + .SPO(\NLW_blk00000003/blk000004a4/blk000004ba_SPO_UNCONNECTED ), + .DPO(\blk00000003/blk000004a4/sig00000ceb ) + ); + RAM32X1D #( + .INIT ( 32'h00000001 )) + \blk00000003/blk000004a4/blk000004b9 ( + .A0(\blk00000003/sig00000237 ), + .A1(\blk00000003/blk000004a4/sig00000ce9 ), + .A2(\blk00000003/blk000004a4/sig00000ce9 ), + .A3(\blk00000003/blk000004a4/sig00000ce9 ), + .A4(\blk00000003/blk000004a4/sig00000ce9 ), + .D(\blk00000003/sig000005c8 ), + .DPRA0(\blk00000003/sig000005f0 ), + .DPRA1(\blk00000003/blk000004a4/sig00000ce9 ), + .DPRA2(\blk00000003/blk000004a4/sig00000ce9 ), + .DPRA3(\blk00000003/blk000004a4/sig00000ce9 ), + .DPRA4(\blk00000003/blk000004a4/sig00000ce9 ), + .WCLK(clk), + .WE(\blk00000003/blk000004a4/sig00000cfc ), + .SPO(\NLW_blk00000003/blk000004a4/blk000004b9_SPO_UNCONNECTED ), + .DPO(\blk00000003/blk000004a4/sig00000cea ) + ); + RAM32X1D #( + .INIT ( 32'h00000001 )) + \blk00000003/blk000004a4/blk000004b8 ( + .A0(\blk00000003/sig00000237 ), + .A1(\blk00000003/blk000004a4/sig00000ce9 ), + .A2(\blk00000003/blk000004a4/sig00000ce9 ), + .A3(\blk00000003/blk000004a4/sig00000ce9 ), + .A4(\blk00000003/blk000004a4/sig00000ce9 ), + .D(\blk00000003/sig000005c6 ), + .DPRA0(\blk00000003/sig000005f0 ), + .DPRA1(\blk00000003/blk000004a4/sig00000ce9 ), + .DPRA2(\blk00000003/blk000004a4/sig00000ce9 ), + .DPRA3(\blk00000003/blk000004a4/sig00000ce9 ), + .DPRA4(\blk00000003/blk000004a4/sig00000ce9 ), + .WCLK(clk), + .WE(\blk00000003/blk000004a4/sig00000cfc ), + .SPO(\NLW_blk00000003/blk000004a4/blk000004b8_SPO_UNCONNECTED ), + .DPO(\blk00000003/blk000004a4/sig00000cec ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000004a4/blk000004b7 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk000004a4/sig00000cfb ), + .Q(\blk00000003/sig000000f3 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000004a4/blk000004b6 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk000004a4/sig00000cfa ), + .Q(\blk00000003/sig000000f4 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000004a4/blk000004b5 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk000004a4/sig00000cf9 ), + .Q(\blk00000003/sig000000f5 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000004a4/blk000004b4 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk000004a4/sig00000cf8 ), + .Q(\blk00000003/sig000000f6 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000004a4/blk000004b3 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk000004a4/sig00000cf7 ), + .Q(\blk00000003/sig000000f7 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000004a4/blk000004b2 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk000004a4/sig00000cf6 ), + .Q(\blk00000003/sig000000f8 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000004a4/blk000004b1 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk000004a4/sig00000cf5 ), + .Q(\blk00000003/sig000000f9 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000004a4/blk000004b0 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk000004a4/sig00000cf4 ), + .Q(\blk00000003/sig000000fa ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000004a4/blk000004af ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk000004a4/sig00000cf3 ), + .Q(\blk00000003/sig000000fb ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000004a4/blk000004ae ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk000004a4/sig00000cf2 ), + .Q(\blk00000003/sig000000fc ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000004a4/blk000004ad ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk000004a4/sig00000cf1 ), + .Q(\blk00000003/sig000000fd ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000004a4/blk000004ac ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk000004a4/sig00000cf0 ), + .Q(\blk00000003/sig000000fe ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000004a4/blk000004ab ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk000004a4/sig00000cef ), + .Q(\blk00000003/sig000000ff ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000004a4/blk000004aa ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk000004a4/sig00000cee ), + .Q(\blk00000003/sig00000100 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000004a4/blk000004a9 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk000004a4/sig00000ced ), + .Q(\blk00000003/sig00000101 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000004a4/blk000004a8 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk000004a4/sig00000cec ), + .Q(\blk00000003/sig00000102 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000004a4/blk000004a7 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk000004a4/sig00000ceb ), + .Q(\blk00000003/sig00000103 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000004a4/blk000004a6 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk000004a4/sig00000cea ), + .Q(\blk00000003/sig00000104 ) + ); + GND \blk00000003/blk000004a4/blk000004a5 ( + .G(\blk00000003/blk000004a4/sig00000ce9 ) + ); + +// synthesis translate_on + +endmodule + +// synthesis translate_off + +`ifndef GLBL +`define GLBL + +`timescale 1 ps / 1 ps + +module glbl (); + + parameter ROC_WIDTH = 100000; + parameter TOC_WIDTH = 0; + +//-------- STARTUP Globals -------------- + wire GSR; + wire GTS; + wire GWE; + wire PRLD; + tri1 p_up_tmp; + tri (weak1, strong0) PLL_LOCKG = p_up_tmp; + + wire PROGB_GLBL; + wire CCLKO_GLBL; + + reg GSR_int; + reg GTS_int; + reg PRLD_int; + +//-------- JTAG Globals -------------- + wire JTAG_TDO_GLBL; + wire JTAG_TCK_GLBL; + wire JTAG_TDI_GLBL; + wire JTAG_TMS_GLBL; + wire JTAG_TRST_GLBL; + + reg JTAG_CAPTURE_GLBL; + reg JTAG_RESET_GLBL; + reg JTAG_SHIFT_GLBL; + reg JTAG_UPDATE_GLBL; + reg JTAG_RUNTEST_GLBL; + + reg JTAG_SEL1_GLBL = 0; + reg JTAG_SEL2_GLBL = 0 ; + reg JTAG_SEL3_GLBL = 0; + reg JTAG_SEL4_GLBL = 0; + + reg JTAG_USER_TDO1_GLBL = 1'bz; + reg JTAG_USER_TDO2_GLBL = 1'bz; + reg JTAG_USER_TDO3_GLBL = 1'bz; + reg JTAG_USER_TDO4_GLBL = 1'bz; + + assign (weak1, weak0) GSR = GSR_int; + assign (weak1, weak0) GTS = GTS_int; + assign (weak1, weak0) PRLD = PRLD_int; + + initial begin + GSR_int = 1'b1; + PRLD_int = 1'b1; + #(ROC_WIDTH) + GSR_int = 1'b0; + PRLD_int = 1'b0; + end + + initial begin + GTS_int = 1'b1; + #(TOC_WIDTH) + GTS_int = 1'b0; + end + +endmodule + +`endif + +// synthesis translate_on diff --git a/fpga/usrp3/top/x400/coregen_dsp/hbdec2_stub.v b/fpga/usrp3/top/x400/coregen_dsp/hbdec2_stub.v new file mode 100644 index 000000000..4e0ae6ac4 --- /dev/null +++ b/fpga/usrp3/top/x400/coregen_dsp/hbdec2_stub.v @@ -0,0 +1,20 @@ +module hbdec2( + sclr, ce, rfd, rdy, data_valid, coef_we, nd, clk, + coef_ld, dout_1, dout_2, din_1, din_2, coef_din +) +/* synthesis syn_black_box black_box_pad_pin="sclr,ce,rfd,rdy,data_valid,coef_we,nd,clk,coef_ld,dout_1[47:0],dout_2[47:0],din_1[23:0],din_2[23:0],coef_din[17:0]" */; + input sclr; + input ce; + output rfd; + output rdy; + output data_valid; + input coef_we; + input nd; + input clk; + input coef_ld; + output [46:0]dout_1; + output [46:0]dout_2; + input [23:0]din_1; + input [23:0]din_2; + input [17:0]coef_din; +endmodule diff --git a/fpga/usrp3/top/x400/coregen_dsp/hbdec3.edif b/fpga/usrp3/top/x400/coregen_dsp/hbdec3.edif new file mode 100644 index 000000000..a6ee381dd --- /dev/null +++ b/fpga/usrp3/top/x400/coregen_dsp/hbdec3.edif @@ -0,0 +1,36338 @@ +(edif hbdec3 + (edifVersion 2 0 0) + (edifLevel 0) + (keywordMap (keywordLevel 0)) + (status + (written + (timestamp 2018 8 29 14 59 46) + (program "Xilinx ngc2edif" (version "P_INT.20171106")) + (author "Xilinx. Inc ") + (comment "This EDIF netlist is to be used within supported synthesis tools") + (comment "for determining resource/timing estimates of the design component") + (comment "represented by this netlist.") + (comment "Command line: hbdec3.ngc hbdec3.edif "))) + (external UNISIMS + (edifLevel 0) + (technology (numberDefinition)) + (cell VCC + (cellType GENERIC) + (view view_1 + (viewType NETLIST) + (interface + (port P + (direction OUTPUT) + ) + ) + ) + ) + (cell GND + (cellType GENERIC) + (view view_1 + (viewType NETLIST) + (interface + (port G + (direction OUTPUT) + ) + ) + ) + ) + (cell FD + (cellType GENERIC) + (view view_1 + (viewType NETLIST) + (interface + (port C + (direction INPUT) + ) + (port D + (direction INPUT) + ) + (port Q + (direction OUTPUT) + ) + ) + ) + ) + (cell MUXCY_D + (cellType GENERIC) + (view view_1 + (viewType NETLIST) + (interface + (port CI + (direction INPUT) + ) + (port DI + (direction INPUT) + ) + (port S + (direction INPUT) + ) + (port O + (direction OUTPUT) + ) + (port LO + (direction OUTPUT) + ) + ) + ) + ) + (cell XORCY + (cellType GENERIC) + (view view_1 + (viewType NETLIST) + (interface + (port CI + (direction INPUT) + ) + (port LI + (direction INPUT) + ) + (port O + (direction OUTPUT) + ) + ) + ) + ) + (cell DSP48E1 + (cellType GENERIC) + (view view_1 + (viewType NETLIST) + (interface + (port PATTERNBDETECT + (direction OUTPUT) + ) + (port RSTC + (direction INPUT) + ) + (port CEB1 + (direction INPUT) + ) + (port CEAD + (direction INPUT) + ) + (port MULTSIGNOUT + (direction OUTPUT) + ) + (port CEC + (direction INPUT) + ) + (port RSTM + (direction INPUT) + ) + (port MULTSIGNIN + (direction INPUT) + ) + (port CEB2 + (direction INPUT) + ) + (port RSTCTRL + (direction INPUT) + ) + (port CEP + (direction INPUT) + ) + (port CARRYCASCOUT + (direction OUTPUT) + ) + (port RSTA + (direction INPUT) + ) + (port CECARRYIN + (direction INPUT) + ) + (port UNDERFLOW + (direction OUTPUT) + ) + (port PATTERNDETECT + (direction OUTPUT) + ) + (port RSTALUMODE + (direction INPUT) + ) + (port RSTALLCARRYIN + (direction INPUT) + ) + (port CED + (direction INPUT) + ) + (port RSTD + (direction INPUT) + ) + (port CEALUMODE + (direction INPUT) + ) + (port CEA2 + (direction INPUT) + ) + (port CLK + (direction INPUT) + ) + (port CEA1 + (direction INPUT) + ) + (port RSTB + (direction INPUT) + ) + (port OVERFLOW + (direction OUTPUT) + ) + (port CECTRL + (direction INPUT) + ) + (port CEM + (direction INPUT) + ) + (port CARRYIN + (direction INPUT) + ) + (port CARRYCASCIN + (direction INPUT) + ) + (port RSTINMODE + (direction INPUT) + ) + (port CEINMODE + (direction INPUT) + ) + (port RSTP + (direction INPUT) + ) + (port (rename ACOUT_29_ "ACOUT<29>") + (direction OUTPUT) + (property PIN_BUSNAME (string "ACOUT<29:0>") (owner "Xilinx")) + (property PIN_BUSIDX (integer 0) (owner "Xilinx")) + ) + (port (rename ACOUT_28_ "ACOUT<28>") + (direction OUTPUT) + (property PIN_BUSNAME (string "ACOUT<29:0>") (owner "Xilinx")) + (property PIN_BUSIDX (integer 1) (owner "Xilinx")) + ) + (port (rename ACOUT_27_ "ACOUT<27>") + (direction OUTPUT) + (property PIN_BUSNAME (string "ACOUT<29:0>") (owner "Xilinx")) + (property PIN_BUSIDX (integer 2) (owner "Xilinx")) + ) + (port (rename ACOUT_26_ "ACOUT<26>") + (direction OUTPUT) + (property PIN_BUSNAME (string "ACOUT<29:0>") (owner "Xilinx")) + (property PIN_BUSIDX (integer 3) (owner "Xilinx")) + ) + (port (rename ACOUT_25_ "ACOUT<25>") + (direction OUTPUT) + (property PIN_BUSNAME (string "ACOUT<29:0>") (owner "Xilinx")) + (property PIN_BUSIDX (integer 4) (owner "Xilinx")) + ) + (port (rename ACOUT_24_ "ACOUT<24>") + (direction OUTPUT) + (property PIN_BUSNAME (string "ACOUT<29:0>") (owner "Xilinx")) + (property PIN_BUSIDX (integer 5) (owner "Xilinx")) + ) + (port (rename ACOUT_23_ "ACOUT<23>") + (direction OUTPUT) + (property PIN_BUSNAME (string "ACOUT<29:0>") (owner "Xilinx")) + (property PIN_BUSIDX (integer 6) (owner "Xilinx")) + ) + (port (rename ACOUT_22_ "ACOUT<22>") + (direction OUTPUT) + (property PIN_BUSNAME (string "ACOUT<29:0>") (owner "Xilinx")) + (property PIN_BUSIDX (integer 7) (owner "Xilinx")) + ) + (port (rename ACOUT_21_ "ACOUT<21>") + (direction OUTPUT) + (property PIN_BUSNAME (string "ACOUT<29:0>") (owner "Xilinx")) + (property PIN_BUSIDX (integer 8) (owner "Xilinx")) + ) + (port (rename ACOUT_20_ "ACOUT<20>") + (direction OUTPUT) + (property PIN_BUSNAME (string "ACOUT<29:0>") (owner "Xilinx")) + (property PIN_BUSIDX (integer 9) (owner "Xilinx")) + ) + (port (rename ACOUT_19_ "ACOUT<19>") + (direction OUTPUT) + (property PIN_BUSNAME (string "ACOUT<29:0>") (owner "Xilinx")) + (property PIN_BUSIDX (integer 10) (owner "Xilinx")) + ) + (port (rename ACOUT_18_ "ACOUT<18>") + (direction OUTPUT) + (property PIN_BUSNAME (string "ACOUT<29:0>") (owner "Xilinx")) + (property PIN_BUSIDX (integer 11) (owner "Xilinx")) + ) + (port (rename ACOUT_17_ "ACOUT<17>") + (direction OUTPUT) + (property PIN_BUSNAME (string "ACOUT<29:0>") (owner "Xilinx")) + (property PIN_BUSIDX (integer 12) (owner "Xilinx")) + ) + (port (rename ACOUT_16_ "ACOUT<16>") + (direction OUTPUT) + (property PIN_BUSNAME (string "ACOUT<29:0>") (owner "Xilinx")) + (property PIN_BUSIDX (integer 13) (owner "Xilinx")) + ) + (port (rename ACOUT_15_ "ACOUT<15>") + (direction OUTPUT) + (property PIN_BUSNAME (string "ACOUT<29:0>") (owner "Xilinx")) + (property PIN_BUSIDX (integer 14) (owner "Xilinx")) + ) + (port (rename ACOUT_14_ "ACOUT<14>") + (direction OUTPUT) + (property PIN_BUSNAME (string "ACOUT<29:0>") (owner "Xilinx")) + (property PIN_BUSIDX (integer 15) (owner "Xilinx")) + ) + (port (rename ACOUT_13_ "ACOUT<13>") + (direction OUTPUT) + (property PIN_BUSNAME (string "ACOUT<29:0>") (owner "Xilinx")) + (property PIN_BUSIDX (integer 16) (owner "Xilinx")) + ) + (port (rename ACOUT_12_ "ACOUT<12>") + (direction OUTPUT) + (property PIN_BUSNAME (string "ACOUT<29:0>") (owner "Xilinx")) + (property PIN_BUSIDX (integer 17) (owner "Xilinx")) + ) + (port (rename ACOUT_11_ "ACOUT<11>") + (direction OUTPUT) + (property PIN_BUSNAME (string "ACOUT<29:0>") (owner "Xilinx")) + (property PIN_BUSIDX (integer 18) (owner "Xilinx")) + ) + (port (rename ACOUT_10_ "ACOUT<10>") + (direction OUTPUT) + (property PIN_BUSNAME (string "ACOUT<29:0>") (owner "Xilinx")) + (property PIN_BUSIDX (integer 19) (owner "Xilinx")) + ) + (port (rename ACOUT_9_ "ACOUT<9>") + (direction OUTPUT) + (property PIN_BUSNAME (string "ACOUT<29:0>") (owner "Xilinx")) + (property PIN_BUSIDX (integer 20) (owner "Xilinx")) + ) + (port (rename ACOUT_8_ "ACOUT<8>") + (direction OUTPUT) + (property PIN_BUSNAME (string "ACOUT<29:0>") (owner "Xilinx")) + (property PIN_BUSIDX (integer 21) (owner "Xilinx")) + ) + (port (rename ACOUT_7_ "ACOUT<7>") + (direction OUTPUT) + (property PIN_BUSNAME (string "ACOUT<29:0>") (owner "Xilinx")) + (property PIN_BUSIDX (integer 22) (owner "Xilinx")) + ) + (port (rename ACOUT_6_ "ACOUT<6>") + (direction OUTPUT) + (property PIN_BUSNAME (string "ACOUT<29:0>") (owner "Xilinx")) + (property PIN_BUSIDX (integer 23) (owner "Xilinx")) + ) + (port (rename ACOUT_5_ "ACOUT<5>") + (direction OUTPUT) + (property PIN_BUSNAME (string "ACOUT<29:0>") (owner "Xilinx")) + (property PIN_BUSIDX (integer 24) (owner "Xilinx")) + ) + (port (rename ACOUT_4_ "ACOUT<4>") + (direction OUTPUT) + (property PIN_BUSNAME (string "ACOUT<29:0>") (owner "Xilinx")) + (property PIN_BUSIDX (integer 25) (owner "Xilinx")) + ) + (port (rename ACOUT_3_ "ACOUT<3>") + (direction OUTPUT) + (property PIN_BUSNAME (string "ACOUT<29:0>") (owner "Xilinx")) + (property PIN_BUSIDX (integer 26) (owner "Xilinx")) + ) + (port (rename ACOUT_2_ "ACOUT<2>") + (direction OUTPUT) + (property PIN_BUSNAME (string "ACOUT<29:0>") (owner "Xilinx")) + (property PIN_BUSIDX (integer 27) (owner "Xilinx")) + ) + (port (rename ACOUT_1_ "ACOUT<1>") + (direction OUTPUT) + (property PIN_BUSNAME (string "ACOUT<29:0>") (owner "Xilinx")) + (property PIN_BUSIDX (integer 28) (owner "Xilinx")) + ) + (port (rename ACOUT_0_ "ACOUT<0>") + (direction OUTPUT) + (property PIN_BUSNAME (string "ACOUT<29:0>") (owner "Xilinx")) + (property PIN_BUSIDX (integer 29) (owner "Xilinx")) + ) + (port (rename OPMODE_6_ "OPMODE<6>") + (direction INPUT) + (property PIN_BUSNAME (string "OPMODE<6:0>") (owner "Xilinx")) + (property PIN_BUSIDX (integer 0) (owner "Xilinx")) + ) + (port (rename OPMODE_5_ "OPMODE<5>") + (direction INPUT) + (property PIN_BUSNAME (string "OPMODE<6:0>") (owner "Xilinx")) + (property PIN_BUSIDX (integer 1) (owner "Xilinx")) + ) + (port (rename OPMODE_4_ "OPMODE<4>") + (direction INPUT) + (property PIN_BUSNAME (string "OPMODE<6:0>") (owner "Xilinx")) + (property PIN_BUSIDX (integer 2) (owner "Xilinx")) + ) + (port (rename OPMODE_3_ "OPMODE<3>") + (direction INPUT) + (property PIN_BUSNAME (string "OPMODE<6:0>") (owner "Xilinx")) + (property PIN_BUSIDX (integer 3) (owner "Xilinx")) + ) + (port (rename OPMODE_2_ "OPMODE<2>") + (direction INPUT) + (property PIN_BUSNAME (string "OPMODE<6:0>") (owner "Xilinx")) + (property PIN_BUSIDX (integer 4) (owner "Xilinx")) + ) + (port (rename OPMODE_1_ "OPMODE<1>") + (direction INPUT) + (property PIN_BUSNAME (string "OPMODE<6:0>") (owner "Xilinx")) + (property PIN_BUSIDX (integer 5) (owner "Xilinx")) + ) + (port (rename OPMODE_0_ "OPMODE<0>") + (direction INPUT) + (property PIN_BUSNAME (string "OPMODE<6:0>") (owner "Xilinx")) + (property PIN_BUSIDX (integer 6) (owner "Xilinx")) + ) + (port (rename PCIN_47_ "PCIN<47>") + (direction INPUT) + (property PIN_BUSNAME (string "PCIN<47:0>") (owner "Xilinx")) + (property PIN_BUSIDX (integer 0) (owner "Xilinx")) + ) + (port (rename PCIN_46_ "PCIN<46>") + (direction INPUT) + (property PIN_BUSNAME (string "PCIN<47:0>") (owner "Xilinx")) + (property PIN_BUSIDX (integer 1) (owner "Xilinx")) + ) + (port (rename PCIN_45_ "PCIN<45>") + (direction INPUT) + (property PIN_BUSNAME (string "PCIN<47:0>") (owner "Xilinx")) + (property PIN_BUSIDX (integer 2) (owner "Xilinx")) + ) + (port (rename PCIN_44_ "PCIN<44>") + (direction INPUT) + (property PIN_BUSNAME (string "PCIN<47:0>") (owner "Xilinx")) + (property PIN_BUSIDX (integer 3) (owner "Xilinx")) + ) + (port (rename PCIN_43_ "PCIN<43>") + (direction INPUT) + (property PIN_BUSNAME (string "PCIN<47:0>") (owner "Xilinx")) + (property PIN_BUSIDX (integer 4) (owner "Xilinx")) + ) + (port (rename PCIN_42_ "PCIN<42>") + (direction INPUT) + (property PIN_BUSNAME (string "PCIN<47:0>") (owner "Xilinx")) + (property PIN_BUSIDX (integer 5) (owner "Xilinx")) + ) + (port (rename PCIN_41_ "PCIN<41>") + (direction INPUT) + (property PIN_BUSNAME (string "PCIN<47:0>") (owner "Xilinx")) + (property PIN_BUSIDX (integer 6) (owner "Xilinx")) + ) + (port (rename PCIN_40_ "PCIN<40>") + (direction INPUT) + (property PIN_BUSNAME (string "PCIN<47:0>") (owner "Xilinx")) + (property PIN_BUSIDX (integer 7) (owner "Xilinx")) + ) + (port (rename PCIN_39_ "PCIN<39>") + (direction INPUT) + (property PIN_BUSNAME (string "PCIN<47:0>") (owner "Xilinx")) + (property PIN_BUSIDX (integer 8) (owner "Xilinx")) + ) + (port (rename PCIN_38_ "PCIN<38>") + (direction INPUT) + (property PIN_BUSNAME (string "PCIN<47:0>") (owner "Xilinx")) + (property PIN_BUSIDX (integer 9) (owner "Xilinx")) + ) + (port (rename PCIN_37_ "PCIN<37>") + (direction INPUT) + (property PIN_BUSNAME (string "PCIN<47:0>") (owner "Xilinx")) + (property PIN_BUSIDX (integer 10) (owner "Xilinx")) + ) + (port (rename PCIN_36_ "PCIN<36>") + (direction INPUT) + (property PIN_BUSNAME (string "PCIN<47:0>") (owner "Xilinx")) + (property PIN_BUSIDX (integer 11) (owner "Xilinx")) + ) + (port (rename PCIN_35_ "PCIN<35>") + (direction INPUT) + (property PIN_BUSNAME (string "PCIN<47:0>") (owner "Xilinx")) + (property PIN_BUSIDX (integer 12) (owner "Xilinx")) + ) + (port (rename PCIN_34_ "PCIN<34>") + (direction INPUT) + (property PIN_BUSNAME (string "PCIN<47:0>") (owner "Xilinx")) + (property PIN_BUSIDX (integer 13) (owner "Xilinx")) + ) + (port (rename PCIN_33_ "PCIN<33>") + (direction INPUT) + (property PIN_BUSNAME (string "PCIN<47:0>") (owner "Xilinx")) + (property PIN_BUSIDX (integer 14) (owner "Xilinx")) + ) + (port (rename PCIN_32_ "PCIN<32>") + (direction INPUT) + (property PIN_BUSNAME (string "PCIN<47:0>") (owner "Xilinx")) + (property PIN_BUSIDX (integer 15) (owner "Xilinx")) + ) + (port (rename PCIN_31_ "PCIN<31>") + (direction INPUT) + (property PIN_BUSNAME (string "PCIN<47:0>") (owner "Xilinx")) + (property PIN_BUSIDX (integer 16) (owner "Xilinx")) + ) + (port (rename PCIN_30_ "PCIN<30>") + (direction INPUT) + (property PIN_BUSNAME (string "PCIN<47:0>") (owner "Xilinx")) + (property PIN_BUSIDX (integer 17) (owner "Xilinx")) + ) + (port (rename PCIN_29_ "PCIN<29>") + (direction INPUT) + (property PIN_BUSNAME (string "PCIN<47:0>") (owner "Xilinx")) + (property PIN_BUSIDX (integer 18) (owner "Xilinx")) + ) + (port (rename PCIN_28_ "PCIN<28>") + (direction INPUT) + (property PIN_BUSNAME (string "PCIN<47:0>") (owner "Xilinx")) + (property PIN_BUSIDX (integer 19) (owner "Xilinx")) + ) + (port (rename PCIN_27_ "PCIN<27>") + (direction INPUT) + (property PIN_BUSNAME (string "PCIN<47:0>") (owner "Xilinx")) + (property PIN_BUSIDX (integer 20) (owner "Xilinx")) + ) + (port (rename PCIN_26_ "PCIN<26>") + (direction INPUT) + (property PIN_BUSNAME (string "PCIN<47:0>") (owner "Xilinx")) + (property PIN_BUSIDX (integer 21) (owner "Xilinx")) + ) + (port (rename PCIN_25_ "PCIN<25>") + (direction INPUT) + (property PIN_BUSNAME (string "PCIN<47:0>") (owner "Xilinx")) + (property PIN_BUSIDX (integer 22) (owner "Xilinx")) + ) + (port (rename PCIN_24_ "PCIN<24>") + (direction INPUT) + (property PIN_BUSNAME (string "PCIN<47:0>") (owner "Xilinx")) + (property PIN_BUSIDX (integer 23) (owner "Xilinx")) + ) + (port (rename PCIN_23_ "PCIN<23>") + (direction INPUT) + (property PIN_BUSNAME (string "PCIN<47:0>") (owner "Xilinx")) + (property PIN_BUSIDX (integer 24) (owner "Xilinx")) + ) + (port (rename PCIN_22_ "PCIN<22>") + (direction INPUT) + (property PIN_BUSNAME (string "PCIN<47:0>") (owner "Xilinx")) + (property PIN_BUSIDX (integer 25) (owner "Xilinx")) + ) + (port (rename PCIN_21_ "PCIN<21>") + (direction INPUT) + (property PIN_BUSNAME (string "PCIN<47:0>") (owner "Xilinx")) + (property PIN_BUSIDX (integer 26) (owner "Xilinx")) + ) + (port (rename PCIN_20_ "PCIN<20>") + (direction INPUT) + (property PIN_BUSNAME (string "PCIN<47:0>") (owner "Xilinx")) + (property PIN_BUSIDX (integer 27) (owner "Xilinx")) + ) + (port (rename PCIN_19_ "PCIN<19>") + (direction INPUT) + (property PIN_BUSNAME (string "PCIN<47:0>") (owner "Xilinx")) + (property PIN_BUSIDX (integer 28) (owner "Xilinx")) + ) + (port (rename PCIN_18_ "PCIN<18>") + (direction INPUT) + (property PIN_BUSNAME (string "PCIN<47:0>") (owner "Xilinx")) + (property PIN_BUSIDX (integer 29) (owner "Xilinx")) + ) + (port (rename PCIN_17_ "PCIN<17>") + (direction INPUT) + (property PIN_BUSNAME (string "PCIN<47:0>") (owner "Xilinx")) + (property PIN_BUSIDX (integer 30) (owner "Xilinx")) + ) + (port (rename PCIN_16_ "PCIN<16>") + (direction INPUT) + (property PIN_BUSNAME (string "PCIN<47:0>") (owner "Xilinx")) + (property PIN_BUSIDX (integer 31) (owner "Xilinx")) + ) + (port (rename PCIN_15_ "PCIN<15>") + (direction INPUT) + (property PIN_BUSNAME (string "PCIN<47:0>") (owner "Xilinx")) + (property PIN_BUSIDX (integer 32) (owner "Xilinx")) + ) + (port (rename PCIN_14_ "PCIN<14>") + (direction INPUT) + (property PIN_BUSNAME (string "PCIN<47:0>") (owner "Xilinx")) + (property PIN_BUSIDX (integer 33) (owner "Xilinx")) + ) + (port (rename PCIN_13_ "PCIN<13>") + (direction INPUT) + (property PIN_BUSNAME (string "PCIN<47:0>") (owner "Xilinx")) + (property PIN_BUSIDX (integer 34) (owner "Xilinx")) + ) + (port (rename PCIN_12_ "PCIN<12>") + (direction INPUT) + (property PIN_BUSNAME (string "PCIN<47:0>") (owner "Xilinx")) + (property PIN_BUSIDX (integer 35) (owner "Xilinx")) + ) + (port (rename PCIN_11_ "PCIN<11>") + (direction INPUT) + (property PIN_BUSNAME (string "PCIN<47:0>") (owner "Xilinx")) + (property PIN_BUSIDX (integer 36) (owner "Xilinx")) + ) + (port (rename PCIN_10_ "PCIN<10>") + (direction INPUT) + (property PIN_BUSNAME (string "PCIN<47:0>") (owner "Xilinx")) + (property PIN_BUSIDX (integer 37) (owner "Xilinx")) + ) + (port (rename PCIN_9_ "PCIN<9>") + (direction INPUT) + (property PIN_BUSNAME (string "PCIN<47:0>") (owner "Xilinx")) + (property PIN_BUSIDX (integer 38) (owner "Xilinx")) + ) + (port (rename PCIN_8_ "PCIN<8>") + (direction INPUT) + (property PIN_BUSNAME (string "PCIN<47:0>") (owner "Xilinx")) + (property PIN_BUSIDX (integer 39) (owner "Xilinx")) + ) + (port (rename PCIN_7_ "PCIN<7>") + (direction INPUT) + (property PIN_BUSNAME (string "PCIN<47:0>") (owner "Xilinx")) + (property PIN_BUSIDX (integer 40) (owner "Xilinx")) + ) + (port (rename PCIN_6_ "PCIN<6>") + (direction INPUT) + (property PIN_BUSNAME (string "PCIN<47:0>") (owner "Xilinx")) + (property PIN_BUSIDX (integer 41) (owner "Xilinx")) + ) + (port (rename PCIN_5_ "PCIN<5>") + (direction INPUT) + (property PIN_BUSNAME (string "PCIN<47:0>") (owner "Xilinx")) + (property PIN_BUSIDX (integer 42) (owner "Xilinx")) + ) + (port (rename PCIN_4_ "PCIN<4>") + (direction INPUT) + (property PIN_BUSNAME (string "PCIN<47:0>") (owner "Xilinx")) + (property PIN_BUSIDX (integer 43) (owner "Xilinx")) + ) + (port (rename PCIN_3_ "PCIN<3>") + (direction INPUT) + (property PIN_BUSNAME (string "PCIN<47:0>") (owner "Xilinx")) + (property PIN_BUSIDX (integer 44) (owner "Xilinx")) + ) + (port (rename PCIN_2_ "PCIN<2>") + (direction INPUT) + (property PIN_BUSNAME (string "PCIN<47:0>") (owner "Xilinx")) + (property PIN_BUSIDX (integer 45) (owner "Xilinx")) + ) + (port (rename PCIN_1_ "PCIN<1>") + (direction INPUT) + (property PIN_BUSNAME (string "PCIN<47:0>") (owner "Xilinx")) + (property PIN_BUSIDX (integer 46) (owner "Xilinx")) + ) + (port (rename PCIN_0_ "PCIN<0>") + (direction INPUT) + (property PIN_BUSNAME (string "PCIN<47:0>") (owner "Xilinx")) + (property PIN_BUSIDX (integer 47) (owner "Xilinx")) + ) + (port (rename ALUMODE_3_ "ALUMODE<3>") + (direction INPUT) + (property PIN_BUSNAME (string "ALUMODE<3:0>") (owner "Xilinx")) + (property PIN_BUSIDX (integer 0) (owner "Xilinx")) + ) + (port (rename ALUMODE_2_ "ALUMODE<2>") + (direction INPUT) + (property PIN_BUSNAME (string "ALUMODE<3:0>") (owner "Xilinx")) + (property PIN_BUSIDX (integer 1) (owner "Xilinx")) + ) + (port (rename ALUMODE_1_ "ALUMODE<1>") + (direction INPUT) + (property PIN_BUSNAME (string "ALUMODE<3:0>") (owner "Xilinx")) + (property PIN_BUSIDX (integer 2) (owner "Xilinx")) + ) + (port (rename ALUMODE_0_ "ALUMODE<0>") + (direction INPUT) + (property PIN_BUSNAME (string "ALUMODE<3:0>") (owner "Xilinx")) + (property PIN_BUSIDX (integer 3) (owner "Xilinx")) + ) + (port (rename C_47_ "C<47>") + (direction INPUT) + (property PIN_BUSNAME (string "C<47:0>") (owner "Xilinx")) + (property PIN_BUSIDX (integer 0) (owner "Xilinx")) + ) + (port (rename C_46_ "C<46>") + (direction INPUT) + (property PIN_BUSNAME (string "C<47:0>") (owner "Xilinx")) + (property PIN_BUSIDX (integer 1) (owner "Xilinx")) + ) + (port (rename C_45_ "C<45>") + (direction INPUT) + (property PIN_BUSNAME (string "C<47:0>") (owner "Xilinx")) + (property PIN_BUSIDX (integer 2) (owner "Xilinx")) + ) + (port (rename C_44_ "C<44>") + (direction INPUT) + (property PIN_BUSNAME (string "C<47:0>") (owner "Xilinx")) + (property PIN_BUSIDX (integer 3) (owner "Xilinx")) + ) + (port (rename C_43_ "C<43>") + (direction INPUT) + (property PIN_BUSNAME (string "C<47:0>") (owner "Xilinx")) + (property PIN_BUSIDX (integer 4) (owner "Xilinx")) + ) + (port (rename C_42_ "C<42>") + (direction INPUT) + (property PIN_BUSNAME (string "C<47:0>") (owner "Xilinx")) + (property PIN_BUSIDX (integer 5) (owner "Xilinx")) + ) + (port (rename C_41_ "C<41>") + (direction INPUT) + (property PIN_BUSNAME (string "C<47:0>") (owner "Xilinx")) + (property PIN_BUSIDX (integer 6) (owner "Xilinx")) + ) + (port (rename C_40_ "C<40>") + (direction INPUT) + (property PIN_BUSNAME (string "C<47:0>") (owner "Xilinx")) + (property PIN_BUSIDX (integer 7) (owner "Xilinx")) + ) + (port (rename C_39_ "C<39>") + (direction INPUT) + (property PIN_BUSNAME (string "C<47:0>") (owner "Xilinx")) + (property PIN_BUSIDX (integer 8) (owner "Xilinx")) + ) + (port (rename C_38_ "C<38>") + (direction INPUT) + (property PIN_BUSNAME (string "C<47:0>") (owner "Xilinx")) + (property PIN_BUSIDX (integer 9) (owner "Xilinx")) + ) + (port (rename C_37_ "C<37>") + (direction INPUT) + (property PIN_BUSNAME (string "C<47:0>") (owner "Xilinx")) + (property PIN_BUSIDX (integer 10) (owner "Xilinx")) + ) + (port (rename C_36_ "C<36>") + (direction INPUT) + (property PIN_BUSNAME (string "C<47:0>") (owner "Xilinx")) + (property PIN_BUSIDX (integer 11) (owner "Xilinx")) + ) + (port (rename C_35_ "C<35>") + (direction INPUT) + (property PIN_BUSNAME (string "C<47:0>") (owner "Xilinx")) + (property PIN_BUSIDX (integer 12) (owner "Xilinx")) + ) + (port (rename C_34_ "C<34>") + (direction INPUT) + (property PIN_BUSNAME (string "C<47:0>") (owner "Xilinx")) + (property PIN_BUSIDX (integer 13) (owner "Xilinx")) + ) + (port (rename C_33_ "C<33>") + (direction INPUT) + (property PIN_BUSNAME (string "C<47:0>") (owner "Xilinx")) + (property PIN_BUSIDX (integer 14) (owner "Xilinx")) + ) + (port (rename C_32_ "C<32>") + (direction INPUT) + (property PIN_BUSNAME (string "C<47:0>") (owner "Xilinx")) + (property PIN_BUSIDX (integer 15) (owner "Xilinx")) + ) + (port (rename C_31_ "C<31>") + (direction INPUT) + (property PIN_BUSNAME (string "C<47:0>") (owner "Xilinx")) + (property PIN_BUSIDX (integer 16) (owner "Xilinx")) + ) + (port (rename C_30_ "C<30>") + (direction INPUT) + (property PIN_BUSNAME (string "C<47:0>") (owner "Xilinx")) + (property PIN_BUSIDX (integer 17) (owner "Xilinx")) + ) + (port (rename C_29_ "C<29>") + (direction INPUT) + (property PIN_BUSNAME (string "C<47:0>") (owner "Xilinx")) + (property PIN_BUSIDX (integer 18) (owner "Xilinx")) + ) + (port (rename C_28_ "C<28>") + (direction INPUT) + (property PIN_BUSNAME (string "C<47:0>") (owner "Xilinx")) + (property PIN_BUSIDX (integer 19) (owner "Xilinx")) + ) + (port (rename C_27_ "C<27>") + (direction INPUT) + (property PIN_BUSNAME (string "C<47:0>") (owner "Xilinx")) + (property PIN_BUSIDX (integer 20) (owner "Xilinx")) + ) + (port (rename C_26_ "C<26>") + (direction INPUT) + (property PIN_BUSNAME (string "C<47:0>") (owner "Xilinx")) + (property PIN_BUSIDX (integer 21) (owner "Xilinx")) + ) + (port (rename C_25_ "C<25>") + (direction INPUT) + (property PIN_BUSNAME (string "C<47:0>") (owner "Xilinx")) + (property PIN_BUSIDX (integer 22) (owner "Xilinx")) + ) + (port (rename C_24_ "C<24>") + (direction INPUT) + (property PIN_BUSNAME (string "C<47:0>") (owner "Xilinx")) + (property PIN_BUSIDX (integer 23) (owner "Xilinx")) + ) + (port (rename C_23_ "C<23>") + (direction INPUT) + (property PIN_BUSNAME (string "C<47:0>") (owner "Xilinx")) + (property PIN_BUSIDX (integer 24) (owner "Xilinx")) + ) + (port (rename C_22_ "C<22>") + (direction INPUT) + (property PIN_BUSNAME (string "C<47:0>") (owner "Xilinx")) + (property PIN_BUSIDX (integer 25) (owner "Xilinx")) + ) + (port (rename C_21_ "C<21>") + (direction INPUT) + (property PIN_BUSNAME (string "C<47:0>") (owner "Xilinx")) + (property PIN_BUSIDX (integer 26) (owner "Xilinx")) + ) + (port (rename C_20_ "C<20>") + (direction INPUT) + (property PIN_BUSNAME (string "C<47:0>") (owner "Xilinx")) + (property PIN_BUSIDX (integer 27) (owner "Xilinx")) + ) + (port (rename C_19_ "C<19>") + (direction INPUT) + (property PIN_BUSNAME (string "C<47:0>") (owner "Xilinx")) + (property PIN_BUSIDX (integer 28) (owner "Xilinx")) + ) + (port (rename C_18_ "C<18>") + (direction INPUT) + (property PIN_BUSNAME (string "C<47:0>") (owner "Xilinx")) + (property PIN_BUSIDX (integer 29) (owner "Xilinx")) + ) + (port (rename C_17_ "C<17>") + (direction INPUT) + (property PIN_BUSNAME (string "C<47:0>") (owner "Xilinx")) + (property PIN_BUSIDX (integer 30) (owner "Xilinx")) + ) + (port (rename C_16_ "C<16>") + (direction INPUT) + (property PIN_BUSNAME (string "C<47:0>") (owner "Xilinx")) + (property PIN_BUSIDX (integer 31) (owner "Xilinx")) + ) + (port (rename C_15_ "C<15>") + (direction INPUT) + (property PIN_BUSNAME (string "C<47:0>") (owner "Xilinx")) + (property PIN_BUSIDX (integer 32) (owner "Xilinx")) + ) + (port (rename C_14_ "C<14>") + (direction INPUT) + (property PIN_BUSNAME (string "C<47:0>") (owner "Xilinx")) + (property PIN_BUSIDX (integer 33) (owner "Xilinx")) + ) + (port (rename C_13_ "C<13>") + (direction INPUT) + (property PIN_BUSNAME (string "C<47:0>") (owner "Xilinx")) + (property PIN_BUSIDX (integer 34) (owner "Xilinx")) + ) + (port (rename C_12_ "C<12>") + (direction INPUT) + (property PIN_BUSNAME (string "C<47:0>") (owner "Xilinx")) + (property PIN_BUSIDX (integer 35) (owner "Xilinx")) + ) + (port (rename C_11_ "C<11>") + (direction INPUT) + (property PIN_BUSNAME (string "C<47:0>") (owner "Xilinx")) + (property PIN_BUSIDX (integer 36) (owner "Xilinx")) + ) + (port (rename C_10_ "C<10>") + (direction INPUT) + (property PIN_BUSNAME (string "C<47:0>") (owner "Xilinx")) + (property PIN_BUSIDX (integer 37) (owner "Xilinx")) + ) + (port (rename C_9_ "C<9>") + (direction INPUT) + (property PIN_BUSNAME (string "C<47:0>") (owner "Xilinx")) + (property PIN_BUSIDX (integer 38) (owner "Xilinx")) + ) + (port (rename C_8_ "C<8>") + (direction INPUT) + (property PIN_BUSNAME (string "C<47:0>") (owner "Xilinx")) + (property PIN_BUSIDX (integer 39) (owner "Xilinx")) + ) + (port (rename C_7_ "C<7>") + (direction INPUT) + (property PIN_BUSNAME (string "C<47:0>") (owner "Xilinx")) + (property PIN_BUSIDX (integer 40) (owner "Xilinx")) + ) + (port (rename C_6_ "C<6>") + (direction INPUT) + (property PIN_BUSNAME (string "C<47:0>") (owner "Xilinx")) + (property PIN_BUSIDX (integer 41) (owner "Xilinx")) + ) + (port (rename C_5_ "C<5>") + (direction INPUT) + (property PIN_BUSNAME (string "C<47:0>") (owner "Xilinx")) + (property PIN_BUSIDX (integer 42) (owner "Xilinx")) + ) + (port (rename C_4_ "C<4>") + (direction INPUT) + (property PIN_BUSNAME (string "C<47:0>") (owner "Xilinx")) + (property PIN_BUSIDX (integer 43) (owner "Xilinx")) + ) + (port (rename C_3_ "C<3>") + (direction INPUT) + (property PIN_BUSNAME (string "C<47:0>") (owner "Xilinx")) + (property PIN_BUSIDX (integer 44) (owner "Xilinx")) + ) + (port (rename C_2_ "C<2>") + (direction INPUT) + (property PIN_BUSNAME (string "C<47:0>") (owner "Xilinx")) + (property PIN_BUSIDX (integer 45) (owner "Xilinx")) + ) + (port (rename C_1_ "C<1>") + (direction INPUT) + (property PIN_BUSNAME (string "C<47:0>") (owner "Xilinx")) + (property PIN_BUSIDX (integer 46) (owner "Xilinx")) + ) + (port (rename C_0_ "C<0>") + (direction INPUT) + (property PIN_BUSNAME (string "C<47:0>") (owner "Xilinx")) + (property PIN_BUSIDX (integer 47) (owner "Xilinx")) + ) + (port (rename CARRYOUT_3_ "CARRYOUT<3>") + (direction OUTPUT) + (property PIN_BUSNAME (string "CARRYOUT<3:0>") (owner "Xilinx")) + (property PIN_BUSIDX (integer 0) (owner "Xilinx")) + ) + (port (rename CARRYOUT_2_ "CARRYOUT<2>") + (direction OUTPUT) + (property PIN_BUSNAME (string "CARRYOUT<3:0>") (owner "Xilinx")) + (property PIN_BUSIDX (integer 1) (owner "Xilinx")) + ) + (port (rename CARRYOUT_1_ "CARRYOUT<1>") + (direction OUTPUT) + (property PIN_BUSNAME (string "CARRYOUT<3:0>") (owner "Xilinx")) + (property PIN_BUSIDX (integer 2) (owner "Xilinx")) + ) + (port (rename CARRYOUT_0_ "CARRYOUT<0>") + (direction OUTPUT) + (property PIN_BUSNAME (string "CARRYOUT<3:0>") (owner "Xilinx")) + (property PIN_BUSIDX (integer 3) (owner "Xilinx")) + ) + (port (rename INMODE_4_ "INMODE<4>") + (direction INPUT) + (property PIN_BUSNAME (string "INMODE<4:0>") (owner "Xilinx")) + (property PIN_BUSIDX (integer 0) (owner "Xilinx")) + ) + (port (rename INMODE_3_ "INMODE<3>") + (direction INPUT) + (property PIN_BUSNAME (string "INMODE<4:0>") (owner "Xilinx")) + (property PIN_BUSIDX (integer 1) (owner "Xilinx")) + ) + (port (rename INMODE_2_ "INMODE<2>") + (direction INPUT) + (property PIN_BUSNAME (string "INMODE<4:0>") (owner "Xilinx")) + (property PIN_BUSIDX (integer 2) (owner "Xilinx")) + ) + (port (rename INMODE_1_ "INMODE<1>") + (direction INPUT) + (property PIN_BUSNAME (string "INMODE<4:0>") (owner "Xilinx")) + (property PIN_BUSIDX (integer 3) (owner "Xilinx")) + ) + (port (rename INMODE_0_ "INMODE<0>") + (direction INPUT) + (property PIN_BUSNAME (string "INMODE<4:0>") (owner "Xilinx")) + (property PIN_BUSIDX (integer 4) (owner "Xilinx")) + ) + (port (rename BCIN_17_ "BCIN<17>") + (direction INPUT) + (property PIN_BUSNAME (string "BCIN<17:0>") (owner "Xilinx")) + (property PIN_BUSIDX (integer 0) (owner "Xilinx")) + ) + (port (rename BCIN_16_ "BCIN<16>") + (direction INPUT) + (property PIN_BUSNAME (string "BCIN<17:0>") (owner "Xilinx")) + (property PIN_BUSIDX (integer 1) (owner "Xilinx")) + ) + (port (rename BCIN_15_ "BCIN<15>") + (direction INPUT) + (property PIN_BUSNAME (string "BCIN<17:0>") (owner "Xilinx")) + (property PIN_BUSIDX (integer 2) (owner "Xilinx")) + ) + (port (rename BCIN_14_ "BCIN<14>") + (direction INPUT) + (property PIN_BUSNAME (string "BCIN<17:0>") (owner "Xilinx")) + (property PIN_BUSIDX (integer 3) (owner "Xilinx")) + ) + (port (rename BCIN_13_ "BCIN<13>") + (direction INPUT) + (property PIN_BUSNAME (string "BCIN<17:0>") (owner "Xilinx")) + (property PIN_BUSIDX (integer 4) (owner "Xilinx")) + ) + (port (rename BCIN_12_ "BCIN<12>") + (direction INPUT) + (property PIN_BUSNAME (string "BCIN<17:0>") (owner "Xilinx")) + (property PIN_BUSIDX (integer 5) (owner "Xilinx")) + ) + (port (rename BCIN_11_ "BCIN<11>") + (direction INPUT) + (property PIN_BUSNAME (string "BCIN<17:0>") (owner "Xilinx")) + (property PIN_BUSIDX (integer 6) (owner "Xilinx")) + ) + (port (rename BCIN_10_ "BCIN<10>") + (direction INPUT) + (property PIN_BUSNAME (string "BCIN<17:0>") (owner "Xilinx")) + (property PIN_BUSIDX (integer 7) (owner "Xilinx")) + ) + (port (rename BCIN_9_ "BCIN<9>") + (direction INPUT) + (property PIN_BUSNAME (string "BCIN<17:0>") (owner "Xilinx")) + (property PIN_BUSIDX (integer 8) (owner "Xilinx")) + ) + (port (rename BCIN_8_ "BCIN<8>") + (direction INPUT) + (property PIN_BUSNAME (string "BCIN<17:0>") (owner "Xilinx")) + (property PIN_BUSIDX (integer 9) (owner "Xilinx")) + ) + (port (rename BCIN_7_ "BCIN<7>") + (direction INPUT) + (property PIN_BUSNAME (string "BCIN<17:0>") (owner "Xilinx")) + (property PIN_BUSIDX (integer 10) (owner "Xilinx")) + ) + (port (rename BCIN_6_ "BCIN<6>") + (direction INPUT) + (property PIN_BUSNAME (string "BCIN<17:0>") (owner "Xilinx")) + (property PIN_BUSIDX (integer 11) (owner "Xilinx")) + ) + (port (rename BCIN_5_ "BCIN<5>") + (direction INPUT) + (property PIN_BUSNAME (string "BCIN<17:0>") (owner "Xilinx")) + (property PIN_BUSIDX (integer 12) (owner "Xilinx")) + ) + (port (rename BCIN_4_ "BCIN<4>") + (direction INPUT) + (property PIN_BUSNAME (string "BCIN<17:0>") (owner "Xilinx")) + (property PIN_BUSIDX (integer 13) (owner "Xilinx")) + ) + (port (rename BCIN_3_ "BCIN<3>") + (direction INPUT) + (property PIN_BUSNAME (string "BCIN<17:0>") (owner "Xilinx")) + (property PIN_BUSIDX (integer 14) (owner "Xilinx")) + ) + (port (rename BCIN_2_ "BCIN<2>") + (direction INPUT) + (property PIN_BUSNAME (string "BCIN<17:0>") (owner "Xilinx")) + (property PIN_BUSIDX (integer 15) (owner "Xilinx")) + ) + (port (rename BCIN_1_ "BCIN<1>") + (direction INPUT) + (property PIN_BUSNAME (string "BCIN<17:0>") (owner "Xilinx")) + (property PIN_BUSIDX (integer 16) (owner "Xilinx")) + ) + (port (rename BCIN_0_ "BCIN<0>") + (direction INPUT) + (property PIN_BUSNAME (string "BCIN<17:0>") (owner "Xilinx")) + (property PIN_BUSIDX (integer 17) (owner "Xilinx")) + ) + (port (rename B_17_ "B<17>") + (direction INPUT) + (property PIN_BUSNAME (string "B<17:0>") (owner "Xilinx")) + (property PIN_BUSIDX (integer 0) (owner "Xilinx")) + ) + (port (rename B_16_ "B<16>") + (direction INPUT) + (property PIN_BUSNAME (string "B<17:0>") (owner "Xilinx")) + (property PIN_BUSIDX (integer 1) (owner "Xilinx")) + ) + (port (rename B_15_ "B<15>") + (direction INPUT) + (property PIN_BUSNAME (string "B<17:0>") (owner "Xilinx")) + (property PIN_BUSIDX (integer 2) (owner "Xilinx")) + ) + (port (rename B_14_ "B<14>") + (direction INPUT) + (property PIN_BUSNAME (string "B<17:0>") (owner "Xilinx")) + (property PIN_BUSIDX (integer 3) (owner "Xilinx")) + ) + (port (rename B_13_ "B<13>") + (direction INPUT) + (property PIN_BUSNAME (string "B<17:0>") (owner "Xilinx")) + (property PIN_BUSIDX (integer 4) (owner "Xilinx")) + ) + (port (rename B_12_ "B<12>") + (direction INPUT) + (property PIN_BUSNAME (string "B<17:0>") (owner "Xilinx")) + (property PIN_BUSIDX (integer 5) (owner "Xilinx")) + ) + (port (rename B_11_ "B<11>") + (direction INPUT) + (property PIN_BUSNAME (string "B<17:0>") (owner "Xilinx")) + (property PIN_BUSIDX (integer 6) (owner "Xilinx")) + ) + (port (rename B_10_ "B<10>") + (direction INPUT) + (property PIN_BUSNAME (string "B<17:0>") (owner "Xilinx")) + (property PIN_BUSIDX (integer 7) (owner "Xilinx")) + ) + (port (rename B_9_ "B<9>") + (direction INPUT) + (property PIN_BUSNAME (string "B<17:0>") (owner "Xilinx")) + (property PIN_BUSIDX (integer 8) (owner "Xilinx")) + ) + (port (rename B_8_ "B<8>") + (direction INPUT) + (property PIN_BUSNAME (string "B<17:0>") (owner "Xilinx")) + (property PIN_BUSIDX (integer 9) (owner "Xilinx")) + ) + (port (rename B_7_ "B<7>") + (direction INPUT) + (property PIN_BUSNAME (string "B<17:0>") (owner "Xilinx")) + (property PIN_BUSIDX (integer 10) (owner "Xilinx")) + ) + (port (rename B_6_ "B<6>") + (direction INPUT) + (property PIN_BUSNAME (string "B<17:0>") (owner "Xilinx")) + (property PIN_BUSIDX (integer 11) (owner "Xilinx")) + ) + (port (rename B_5_ "B<5>") + (direction INPUT) + (property PIN_BUSNAME (string "B<17:0>") (owner "Xilinx")) + (property PIN_BUSIDX (integer 12) (owner "Xilinx")) + ) + (port (rename B_4_ "B<4>") + (direction INPUT) + (property PIN_BUSNAME (string "B<17:0>") (owner "Xilinx")) + (property PIN_BUSIDX (integer 13) (owner "Xilinx")) + ) + (port (rename B_3_ "B<3>") + (direction INPUT) + (property PIN_BUSNAME (string "B<17:0>") (owner "Xilinx")) + (property PIN_BUSIDX (integer 14) (owner "Xilinx")) + ) + (port (rename B_2_ "B<2>") + (direction INPUT) + (property PIN_BUSNAME (string "B<17:0>") (owner "Xilinx")) + (property PIN_BUSIDX (integer 15) (owner "Xilinx")) + ) + (port (rename B_1_ "B<1>") + (direction INPUT) + (property PIN_BUSNAME (string "B<17:0>") (owner "Xilinx")) + (property PIN_BUSIDX (integer 16) (owner "Xilinx")) + ) + (port (rename B_0_ "B<0>") + (direction INPUT) + (property PIN_BUSNAME (string "B<17:0>") (owner "Xilinx")) + (property PIN_BUSIDX (integer 17) (owner "Xilinx")) + ) + (port (rename BCOUT_17_ "BCOUT<17>") + (direction OUTPUT) + (property PIN_BUSNAME (string "BCOUT<17:0>") (owner "Xilinx")) + (property PIN_BUSIDX (integer 0) (owner "Xilinx")) + ) + (port (rename BCOUT_16_ "BCOUT<16>") + (direction OUTPUT) + (property PIN_BUSNAME (string "BCOUT<17:0>") (owner "Xilinx")) + (property PIN_BUSIDX (integer 1) (owner "Xilinx")) + ) + (port (rename BCOUT_15_ "BCOUT<15>") + (direction OUTPUT) + (property PIN_BUSNAME (string "BCOUT<17:0>") (owner "Xilinx")) + (property PIN_BUSIDX (integer 2) (owner "Xilinx")) + ) + (port (rename BCOUT_14_ "BCOUT<14>") + (direction OUTPUT) + (property PIN_BUSNAME (string "BCOUT<17:0>") (owner "Xilinx")) + (property PIN_BUSIDX (integer 3) (owner "Xilinx")) + ) + (port (rename BCOUT_13_ "BCOUT<13>") + (direction OUTPUT) + (property PIN_BUSNAME (string "BCOUT<17:0>") (owner "Xilinx")) + (property PIN_BUSIDX (integer 4) (owner "Xilinx")) + ) + (port (rename BCOUT_12_ "BCOUT<12>") + (direction OUTPUT) + (property PIN_BUSNAME (string "BCOUT<17:0>") (owner "Xilinx")) + (property PIN_BUSIDX (integer 5) (owner "Xilinx")) + ) + (port (rename BCOUT_11_ "BCOUT<11>") + (direction OUTPUT) + (property PIN_BUSNAME (string "BCOUT<17:0>") (owner "Xilinx")) + (property PIN_BUSIDX (integer 6) (owner "Xilinx")) + ) + (port (rename BCOUT_10_ "BCOUT<10>") + (direction OUTPUT) + (property PIN_BUSNAME (string "BCOUT<17:0>") (owner "Xilinx")) + (property PIN_BUSIDX (integer 7) (owner "Xilinx")) + ) + (port (rename BCOUT_9_ "BCOUT<9>") + (direction OUTPUT) + (property PIN_BUSNAME (string "BCOUT<17:0>") (owner "Xilinx")) + (property PIN_BUSIDX (integer 8) (owner "Xilinx")) + ) + (port (rename BCOUT_8_ "BCOUT<8>") + (direction OUTPUT) + (property PIN_BUSNAME (string "BCOUT<17:0>") (owner "Xilinx")) + (property PIN_BUSIDX (integer 9) (owner "Xilinx")) + ) + (port (rename BCOUT_7_ "BCOUT<7>") + (direction OUTPUT) + (property PIN_BUSNAME (string "BCOUT<17:0>") (owner "Xilinx")) + (property PIN_BUSIDX (integer 10) (owner "Xilinx")) + ) + (port (rename BCOUT_6_ "BCOUT<6>") + (direction OUTPUT) + (property PIN_BUSNAME (string "BCOUT<17:0>") (owner "Xilinx")) + (property PIN_BUSIDX (integer 11) (owner "Xilinx")) + ) + (port (rename BCOUT_5_ "BCOUT<5>") + (direction OUTPUT) + (property PIN_BUSNAME (string "BCOUT<17:0>") (owner "Xilinx")) + (property PIN_BUSIDX (integer 12) (owner "Xilinx")) + ) + (port (rename BCOUT_4_ "BCOUT<4>") + (direction OUTPUT) + (property PIN_BUSNAME (string "BCOUT<17:0>") (owner "Xilinx")) + (property PIN_BUSIDX (integer 13) (owner "Xilinx")) + ) + (port (rename BCOUT_3_ "BCOUT<3>") + (direction OUTPUT) + (property PIN_BUSNAME (string "BCOUT<17:0>") (owner "Xilinx")) + (property PIN_BUSIDX (integer 14) (owner "Xilinx")) + ) + (port (rename BCOUT_2_ "BCOUT<2>") + (direction OUTPUT) + (property PIN_BUSNAME (string "BCOUT<17:0>") (owner "Xilinx")) + (property PIN_BUSIDX (integer 15) (owner "Xilinx")) + ) + (port (rename BCOUT_1_ "BCOUT<1>") + (direction OUTPUT) + (property PIN_BUSNAME (string "BCOUT<17:0>") (owner "Xilinx")) + (property PIN_BUSIDX (integer 16) (owner "Xilinx")) + ) + (port (rename BCOUT_0_ "BCOUT<0>") + (direction OUTPUT) + (property PIN_BUSNAME (string "BCOUT<17:0>") (owner "Xilinx")) + (property PIN_BUSIDX (integer 17) (owner "Xilinx")) + ) + (port (rename D_24_ "D<24>") + (direction INPUT) + (property PIN_BUSNAME (string "D<24:0>") (owner "Xilinx")) + (property PIN_BUSIDX (integer 0) (owner "Xilinx")) + ) + (port (rename D_23_ "D<23>") + (direction INPUT) + (property PIN_BUSNAME (string "D<24:0>") (owner "Xilinx")) + (property PIN_BUSIDX (integer 1) (owner "Xilinx")) + ) + (port (rename D_22_ "D<22>") + (direction INPUT) + (property PIN_BUSNAME (string "D<24:0>") (owner "Xilinx")) + (property PIN_BUSIDX (integer 2) (owner "Xilinx")) + ) + (port (rename D_21_ "D<21>") + (direction INPUT) + (property PIN_BUSNAME (string "D<24:0>") (owner "Xilinx")) + (property PIN_BUSIDX (integer 3) (owner "Xilinx")) + ) + (port (rename D_20_ "D<20>") + (direction INPUT) + (property PIN_BUSNAME (string "D<24:0>") (owner "Xilinx")) + (property PIN_BUSIDX (integer 4) (owner "Xilinx")) + ) + (port (rename D_19_ "D<19>") + (direction INPUT) + (property PIN_BUSNAME (string "D<24:0>") (owner "Xilinx")) + (property PIN_BUSIDX (integer 5) (owner "Xilinx")) + ) + (port (rename D_18_ "D<18>") + (direction INPUT) + (property PIN_BUSNAME (string "D<24:0>") (owner "Xilinx")) + (property PIN_BUSIDX (integer 6) (owner "Xilinx")) + ) + (port (rename D_17_ "D<17>") + (direction INPUT) + (property PIN_BUSNAME (string "D<24:0>") (owner "Xilinx")) + (property PIN_BUSIDX (integer 7) (owner "Xilinx")) + ) + (port (rename D_16_ "D<16>") + (direction INPUT) + (property PIN_BUSNAME (string "D<24:0>") (owner "Xilinx")) + (property PIN_BUSIDX (integer 8) (owner "Xilinx")) + ) + (port (rename D_15_ "D<15>") + (direction INPUT) + (property PIN_BUSNAME (string "D<24:0>") (owner "Xilinx")) + (property PIN_BUSIDX (integer 9) (owner "Xilinx")) + ) + (port (rename D_14_ "D<14>") + (direction INPUT) + (property PIN_BUSNAME (string "D<24:0>") (owner "Xilinx")) + (property PIN_BUSIDX (integer 10) (owner "Xilinx")) + ) + (port (rename D_13_ "D<13>") + (direction INPUT) + (property PIN_BUSNAME (string "D<24:0>") (owner "Xilinx")) + (property PIN_BUSIDX (integer 11) (owner "Xilinx")) + ) + (port (rename D_12_ "D<12>") + (direction INPUT) + (property PIN_BUSNAME (string "D<24:0>") (owner "Xilinx")) + (property PIN_BUSIDX (integer 12) (owner "Xilinx")) + ) + (port (rename D_11_ "D<11>") + (direction INPUT) + (property PIN_BUSNAME (string "D<24:0>") (owner "Xilinx")) + (property PIN_BUSIDX (integer 13) (owner "Xilinx")) + ) + (port (rename D_10_ "D<10>") + (direction INPUT) + (property PIN_BUSNAME (string "D<24:0>") (owner "Xilinx")) + (property PIN_BUSIDX (integer 14) (owner "Xilinx")) + ) + (port (rename D_9_ "D<9>") + (direction INPUT) + (property PIN_BUSNAME (string "D<24:0>") (owner "Xilinx")) + (property PIN_BUSIDX (integer 15) (owner "Xilinx")) + ) + (port (rename D_8_ "D<8>") + (direction INPUT) + (property PIN_BUSNAME (string "D<24:0>") (owner "Xilinx")) + (property PIN_BUSIDX (integer 16) (owner "Xilinx")) + ) + (port (rename D_7_ "D<7>") + (direction INPUT) + (property PIN_BUSNAME (string "D<24:0>") (owner "Xilinx")) + (property PIN_BUSIDX (integer 17) (owner "Xilinx")) + ) + (port (rename D_6_ "D<6>") + (direction INPUT) + (property PIN_BUSNAME (string "D<24:0>") (owner "Xilinx")) + (property PIN_BUSIDX (integer 18) (owner "Xilinx")) + ) + (port (rename D_5_ "D<5>") + (direction INPUT) + (property PIN_BUSNAME (string "D<24:0>") (owner "Xilinx")) + (property PIN_BUSIDX (integer 19) (owner "Xilinx")) + ) + (port (rename D_4_ "D<4>") + (direction INPUT) + (property PIN_BUSNAME (string "D<24:0>") (owner "Xilinx")) + (property PIN_BUSIDX (integer 20) (owner "Xilinx")) + ) + (port (rename D_3_ "D<3>") + (direction INPUT) + (property PIN_BUSNAME (string "D<24:0>") (owner "Xilinx")) + (property PIN_BUSIDX (integer 21) (owner "Xilinx")) + ) + (port (rename D_2_ "D<2>") + (direction INPUT) + (property PIN_BUSNAME (string "D<24:0>") (owner "Xilinx")) + (property PIN_BUSIDX (integer 22) (owner "Xilinx")) + ) + (port (rename D_1_ "D<1>") + (direction INPUT) + (property PIN_BUSNAME (string "D<24:0>") (owner "Xilinx")) + (property PIN_BUSIDX (integer 23) (owner "Xilinx")) + ) + (port (rename D_0_ "D<0>") + (direction INPUT) + (property PIN_BUSNAME (string "D<24:0>") (owner "Xilinx")) + (property PIN_BUSIDX (integer 24) (owner "Xilinx")) + ) + (port (rename P_47_ "P<47>") + (direction OUTPUT) + (property PIN_BUSNAME (string "P<47:0>") (owner "Xilinx")) + (property PIN_BUSIDX (integer 0) (owner "Xilinx")) + ) + (port (rename P_46_ "P<46>") + (direction OUTPUT) + (property PIN_BUSNAME (string "P<47:0>") (owner "Xilinx")) + (property PIN_BUSIDX (integer 1) (owner "Xilinx")) + ) + (port (rename P_45_ "P<45>") + (direction OUTPUT) + (property PIN_BUSNAME (string "P<47:0>") (owner "Xilinx")) + (property PIN_BUSIDX (integer 2) (owner "Xilinx")) + ) + (port (rename P_44_ "P<44>") + (direction OUTPUT) + (property PIN_BUSNAME (string "P<47:0>") (owner "Xilinx")) + (property PIN_BUSIDX (integer 3) (owner "Xilinx")) + ) + (port (rename P_43_ "P<43>") + (direction OUTPUT) + (property PIN_BUSNAME (string "P<47:0>") (owner "Xilinx")) + (property PIN_BUSIDX (integer 4) (owner "Xilinx")) + ) + (port (rename P_42_ "P<42>") + (direction OUTPUT) + (property PIN_BUSNAME (string "P<47:0>") (owner "Xilinx")) + (property PIN_BUSIDX (integer 5) (owner "Xilinx")) + ) + (port (rename P_41_ "P<41>") + (direction OUTPUT) + (property PIN_BUSNAME (string "P<47:0>") (owner "Xilinx")) + (property PIN_BUSIDX (integer 6) (owner "Xilinx")) + ) + (port (rename P_40_ "P<40>") + (direction OUTPUT) + (property PIN_BUSNAME (string "P<47:0>") (owner "Xilinx")) + (property PIN_BUSIDX (integer 7) (owner "Xilinx")) + ) + (port (rename P_39_ "P<39>") + (direction OUTPUT) + (property PIN_BUSNAME (string "P<47:0>") (owner "Xilinx")) + (property PIN_BUSIDX (integer 8) (owner "Xilinx")) + ) + (port (rename P_38_ "P<38>") + (direction OUTPUT) + (property PIN_BUSNAME (string "P<47:0>") (owner "Xilinx")) + (property PIN_BUSIDX (integer 9) (owner "Xilinx")) + ) + (port (rename P_37_ "P<37>") + (direction OUTPUT) + (property PIN_BUSNAME (string "P<47:0>") (owner "Xilinx")) + (property PIN_BUSIDX (integer 10) (owner "Xilinx")) + ) + (port (rename P_36_ "P<36>") + (direction OUTPUT) + (property PIN_BUSNAME (string "P<47:0>") (owner "Xilinx")) + (property PIN_BUSIDX (integer 11) (owner "Xilinx")) + ) + (port (rename P_35_ "P<35>") + (direction OUTPUT) + (property PIN_BUSNAME (string "P<47:0>") (owner "Xilinx")) + (property PIN_BUSIDX (integer 12) (owner "Xilinx")) + ) + (port (rename P_34_ "P<34>") + (direction OUTPUT) + (property PIN_BUSNAME (string "P<47:0>") (owner "Xilinx")) + (property PIN_BUSIDX (integer 13) (owner "Xilinx")) + ) + (port (rename P_33_ "P<33>") + (direction OUTPUT) + (property PIN_BUSNAME (string "P<47:0>") (owner "Xilinx")) + (property PIN_BUSIDX (integer 14) (owner "Xilinx")) + ) + (port (rename P_32_ "P<32>") + (direction OUTPUT) + (property PIN_BUSNAME (string "P<47:0>") (owner "Xilinx")) + (property PIN_BUSIDX (integer 15) (owner "Xilinx")) + ) + (port (rename P_31_ "P<31>") + (direction OUTPUT) + (property PIN_BUSNAME (string "P<47:0>") (owner "Xilinx")) + (property PIN_BUSIDX (integer 16) (owner "Xilinx")) + ) + (port (rename P_30_ "P<30>") + (direction OUTPUT) + (property PIN_BUSNAME (string "P<47:0>") (owner "Xilinx")) + (property PIN_BUSIDX (integer 17) (owner "Xilinx")) + ) + (port (rename P_29_ "P<29>") + (direction OUTPUT) + (property PIN_BUSNAME (string "P<47:0>") (owner "Xilinx")) + (property PIN_BUSIDX (integer 18) (owner "Xilinx")) + ) + (port (rename P_28_ "P<28>") + (direction OUTPUT) + (property PIN_BUSNAME (string "P<47:0>") (owner "Xilinx")) + (property PIN_BUSIDX (integer 19) (owner "Xilinx")) + ) + (port (rename P_27_ "P<27>") + (direction OUTPUT) + (property PIN_BUSNAME (string "P<47:0>") (owner "Xilinx")) + (property PIN_BUSIDX (integer 20) (owner "Xilinx")) + ) + (port (rename P_26_ "P<26>") + (direction OUTPUT) + (property PIN_BUSNAME (string "P<47:0>") (owner "Xilinx")) + (property PIN_BUSIDX (integer 21) (owner "Xilinx")) + ) + (port (rename P_25_ "P<25>") + (direction OUTPUT) + (property PIN_BUSNAME (string "P<47:0>") (owner "Xilinx")) + (property PIN_BUSIDX (integer 22) (owner "Xilinx")) + ) + (port (rename P_24_ "P<24>") + (direction OUTPUT) + (property PIN_BUSNAME (string "P<47:0>") (owner "Xilinx")) + (property PIN_BUSIDX (integer 23) (owner "Xilinx")) + ) + (port (rename P_23_ "P<23>") + (direction OUTPUT) + (property PIN_BUSNAME (string "P<47:0>") (owner "Xilinx")) + (property PIN_BUSIDX (integer 24) (owner "Xilinx")) + ) + (port (rename P_22_ "P<22>") + (direction OUTPUT) + (property PIN_BUSNAME (string "P<47:0>") (owner "Xilinx")) + (property PIN_BUSIDX (integer 25) (owner "Xilinx")) + ) + (port (rename P_21_ "P<21>") + (direction OUTPUT) + (property PIN_BUSNAME (string "P<47:0>") (owner "Xilinx")) + (property PIN_BUSIDX (integer 26) (owner "Xilinx")) + ) + (port (rename P_20_ "P<20>") + (direction OUTPUT) + (property PIN_BUSNAME (string "P<47:0>") (owner "Xilinx")) + (property PIN_BUSIDX (integer 27) (owner "Xilinx")) + ) + (port (rename P_19_ "P<19>") + (direction OUTPUT) + (property PIN_BUSNAME (string "P<47:0>") (owner "Xilinx")) + (property PIN_BUSIDX (integer 28) (owner "Xilinx")) + ) + (port (rename P_18_ "P<18>") + (direction OUTPUT) + (property PIN_BUSNAME (string "P<47:0>") (owner "Xilinx")) + (property PIN_BUSIDX (integer 29) (owner "Xilinx")) + ) + (port (rename P_17_ "P<17>") + (direction OUTPUT) + (property PIN_BUSNAME (string "P<47:0>") (owner "Xilinx")) + (property PIN_BUSIDX (integer 30) (owner "Xilinx")) + ) + (port (rename P_16_ "P<16>") + (direction OUTPUT) + (property PIN_BUSNAME (string "P<47:0>") (owner "Xilinx")) + (property PIN_BUSIDX (integer 31) (owner "Xilinx")) + ) + (port (rename P_15_ "P<15>") + (direction OUTPUT) + (property PIN_BUSNAME (string "P<47:0>") (owner "Xilinx")) + (property PIN_BUSIDX (integer 32) (owner "Xilinx")) + ) + (port (rename P_14_ "P<14>") + (direction OUTPUT) + (property PIN_BUSNAME (string "P<47:0>") (owner "Xilinx")) + (property PIN_BUSIDX (integer 33) (owner "Xilinx")) + ) + (port (rename P_13_ "P<13>") + (direction OUTPUT) + (property PIN_BUSNAME (string "P<47:0>") (owner "Xilinx")) + (property PIN_BUSIDX (integer 34) (owner "Xilinx")) + ) + (port (rename P_12_ "P<12>") + (direction OUTPUT) + (property PIN_BUSNAME (string "P<47:0>") (owner "Xilinx")) + (property PIN_BUSIDX (integer 35) (owner "Xilinx")) + ) + (port (rename P_11_ "P<11>") + (direction OUTPUT) + (property PIN_BUSNAME (string "P<47:0>") (owner "Xilinx")) + (property PIN_BUSIDX (integer 36) (owner "Xilinx")) + ) + (port (rename P_10_ "P<10>") + (direction OUTPUT) + (property PIN_BUSNAME (string "P<47:0>") (owner "Xilinx")) + (property PIN_BUSIDX (integer 37) (owner "Xilinx")) + ) + (port (rename P_9_ "P<9>") + (direction OUTPUT) + (property PIN_BUSNAME (string "P<47:0>") (owner "Xilinx")) + (property PIN_BUSIDX (integer 38) (owner "Xilinx")) + ) + (port (rename P_8_ "P<8>") + (direction OUTPUT) + (property PIN_BUSNAME (string "P<47:0>") (owner "Xilinx")) + (property PIN_BUSIDX (integer 39) (owner "Xilinx")) + ) + (port (rename P_7_ "P<7>") + (direction OUTPUT) + (property PIN_BUSNAME (string "P<47:0>") (owner "Xilinx")) + (property PIN_BUSIDX (integer 40) (owner "Xilinx")) + ) + (port (rename P_6_ "P<6>") + (direction OUTPUT) + (property PIN_BUSNAME (string "P<47:0>") (owner "Xilinx")) + (property PIN_BUSIDX (integer 41) (owner "Xilinx")) + ) + (port (rename P_5_ "P<5>") + (direction OUTPUT) + (property PIN_BUSNAME (string "P<47:0>") (owner "Xilinx")) + (property PIN_BUSIDX (integer 42) (owner "Xilinx")) + ) + (port (rename P_4_ "P<4>") + (direction OUTPUT) + (property PIN_BUSNAME (string "P<47:0>") (owner "Xilinx")) + (property PIN_BUSIDX (integer 43) (owner "Xilinx")) + ) + (port (rename P_3_ "P<3>") + (direction OUTPUT) + (property PIN_BUSNAME (string "P<47:0>") (owner "Xilinx")) + (property PIN_BUSIDX (integer 44) (owner "Xilinx")) + ) + (port (rename P_2_ "P<2>") + (direction OUTPUT) + (property PIN_BUSNAME (string "P<47:0>") (owner "Xilinx")) + (property PIN_BUSIDX (integer 45) (owner "Xilinx")) + ) + (port (rename P_1_ "P<1>") + (direction OUTPUT) + (property PIN_BUSNAME (string "P<47:0>") (owner "Xilinx")) + (property PIN_BUSIDX (integer 46) (owner "Xilinx")) + ) + (port (rename P_0_ "P<0>") + (direction OUTPUT) + (property PIN_BUSNAME (string "P<47:0>") (owner "Xilinx")) + (property PIN_BUSIDX (integer 47) (owner "Xilinx")) + ) + (port (rename A_29_ "A<29>") + (direction INPUT) + (property PIN_BUSNAME (string "A<29:0>") (owner "Xilinx")) + (property PIN_BUSIDX (integer 0) (owner "Xilinx")) + ) + (port (rename A_28_ "A<28>") + (direction INPUT) + (property PIN_BUSNAME (string "A<29:0>") (owner "Xilinx")) + (property PIN_BUSIDX (integer 1) (owner "Xilinx")) + ) + (port (rename A_27_ "A<27>") + (direction INPUT) + (property PIN_BUSNAME (string "A<29:0>") (owner "Xilinx")) + (property PIN_BUSIDX (integer 2) (owner "Xilinx")) + ) + (port (rename A_26_ "A<26>") + (direction INPUT) + (property PIN_BUSNAME (string "A<29:0>") (owner "Xilinx")) + (property PIN_BUSIDX (integer 3) (owner "Xilinx")) + ) + (port (rename A_25_ "A<25>") + (direction INPUT) + (property PIN_BUSNAME (string "A<29:0>") (owner "Xilinx")) + (property PIN_BUSIDX (integer 4) (owner "Xilinx")) + ) + (port (rename A_24_ "A<24>") + (direction INPUT) + (property PIN_BUSNAME (string "A<29:0>") (owner "Xilinx")) + (property PIN_BUSIDX (integer 5) (owner "Xilinx")) + ) + (port (rename A_23_ "A<23>") + (direction INPUT) + (property PIN_BUSNAME (string "A<29:0>") (owner "Xilinx")) + (property PIN_BUSIDX (integer 6) (owner "Xilinx")) + ) + (port (rename A_22_ "A<22>") + (direction INPUT) + (property PIN_BUSNAME (string "A<29:0>") (owner "Xilinx")) + (property PIN_BUSIDX (integer 7) (owner "Xilinx")) + ) + (port (rename A_21_ "A<21>") + (direction INPUT) + (property PIN_BUSNAME (string "A<29:0>") (owner "Xilinx")) + (property PIN_BUSIDX (integer 8) (owner "Xilinx")) + ) + (port (rename A_20_ "A<20>") + (direction INPUT) + (property PIN_BUSNAME (string "A<29:0>") (owner "Xilinx")) + (property PIN_BUSIDX (integer 9) (owner "Xilinx")) + ) + (port (rename A_19_ "A<19>") + (direction INPUT) + (property PIN_BUSNAME (string "A<29:0>") (owner "Xilinx")) + (property PIN_BUSIDX (integer 10) (owner "Xilinx")) + ) + (port (rename A_18_ "A<18>") + (direction INPUT) + (property PIN_BUSNAME (string "A<29:0>") (owner "Xilinx")) + (property PIN_BUSIDX (integer 11) (owner "Xilinx")) + ) + (port (rename A_17_ "A<17>") + (direction INPUT) + (property PIN_BUSNAME (string "A<29:0>") (owner "Xilinx")) + (property PIN_BUSIDX (integer 12) (owner "Xilinx")) + ) + (port (rename A_16_ "A<16>") + (direction INPUT) + (property PIN_BUSNAME (string "A<29:0>") (owner "Xilinx")) + (property PIN_BUSIDX (integer 13) (owner "Xilinx")) + ) + (port (rename A_15_ "A<15>") + (direction INPUT) + (property PIN_BUSNAME (string "A<29:0>") (owner "Xilinx")) + (property PIN_BUSIDX (integer 14) (owner "Xilinx")) + ) + (port (rename A_14_ "A<14>") + (direction INPUT) + (property PIN_BUSNAME (string "A<29:0>") (owner "Xilinx")) + (property PIN_BUSIDX (integer 15) (owner "Xilinx")) + ) + (port (rename A_13_ "A<13>") + (direction INPUT) + (property PIN_BUSNAME (string "A<29:0>") (owner "Xilinx")) + (property PIN_BUSIDX (integer 16) (owner "Xilinx")) + ) + (port (rename A_12_ "A<12>") + (direction INPUT) + (property PIN_BUSNAME (string "A<29:0>") (owner "Xilinx")) + (property PIN_BUSIDX (integer 17) (owner "Xilinx")) + ) + (port (rename A_11_ "A<11>") + (direction INPUT) + (property PIN_BUSNAME (string "A<29:0>") (owner "Xilinx")) + (property PIN_BUSIDX (integer 18) (owner "Xilinx")) + ) + (port (rename A_10_ "A<10>") + (direction INPUT) + (property PIN_BUSNAME (string "A<29:0>") (owner "Xilinx")) + (property PIN_BUSIDX (integer 19) (owner "Xilinx")) + ) + (port (rename A_9_ "A<9>") + (direction INPUT) + (property PIN_BUSNAME (string "A<29:0>") (owner "Xilinx")) + (property PIN_BUSIDX (integer 20) (owner "Xilinx")) + ) + (port (rename A_8_ "A<8>") + (direction INPUT) + (property PIN_BUSNAME (string "A<29:0>") (owner "Xilinx")) + (property PIN_BUSIDX (integer 21) (owner "Xilinx")) + ) + (port (rename A_7_ "A<7>") + (direction INPUT) + (property PIN_BUSNAME (string "A<29:0>") (owner "Xilinx")) + (property PIN_BUSIDX (integer 22) (owner "Xilinx")) + ) + (port (rename A_6_ "A<6>") + (direction INPUT) + (property PIN_BUSNAME (string "A<29:0>") (owner "Xilinx")) + (property PIN_BUSIDX (integer 23) (owner "Xilinx")) + ) + (port (rename A_5_ "A<5>") + (direction INPUT) + (property PIN_BUSNAME (string "A<29:0>") (owner "Xilinx")) + (property PIN_BUSIDX (integer 24) (owner "Xilinx")) + ) + (port (rename A_4_ "A<4>") + (direction INPUT) + (property PIN_BUSNAME (string "A<29:0>") (owner "Xilinx")) + (property PIN_BUSIDX (integer 25) (owner "Xilinx")) + ) + (port (rename A_3_ "A<3>") + (direction INPUT) + (property PIN_BUSNAME (string "A<29:0>") (owner "Xilinx")) + (property PIN_BUSIDX (integer 26) (owner "Xilinx")) + ) + (port (rename A_2_ "A<2>") + (direction INPUT) + (property PIN_BUSNAME (string "A<29:0>") (owner "Xilinx")) + (property PIN_BUSIDX (integer 27) (owner "Xilinx")) + ) + (port (rename A_1_ "A<1>") + (direction INPUT) + (property PIN_BUSNAME (string "A<29:0>") (owner "Xilinx")) + (property PIN_BUSIDX (integer 28) (owner "Xilinx")) + ) + (port (rename A_0_ "A<0>") + (direction INPUT) + (property PIN_BUSNAME (string "A<29:0>") (owner "Xilinx")) + (property PIN_BUSIDX (integer 29) (owner "Xilinx")) + ) + (port (rename PCOUT_47_ "PCOUT<47>") + (direction OUTPUT) + (property PIN_BUSNAME (string "PCOUT<47:0>") (owner "Xilinx")) + (property PIN_BUSIDX (integer 0) (owner "Xilinx")) + ) + (port (rename PCOUT_46_ "PCOUT<46>") + (direction OUTPUT) + (property PIN_BUSNAME (string "PCOUT<47:0>") (owner "Xilinx")) + (property PIN_BUSIDX (integer 1) (owner "Xilinx")) + ) + (port (rename PCOUT_45_ "PCOUT<45>") + (direction OUTPUT) + (property PIN_BUSNAME (string "PCOUT<47:0>") (owner "Xilinx")) + (property PIN_BUSIDX (integer 2) (owner "Xilinx")) + ) + (port (rename PCOUT_44_ "PCOUT<44>") + (direction OUTPUT) + (property PIN_BUSNAME (string "PCOUT<47:0>") (owner "Xilinx")) + (property PIN_BUSIDX (integer 3) (owner "Xilinx")) + ) + (port (rename PCOUT_43_ "PCOUT<43>") + (direction OUTPUT) + (property PIN_BUSNAME (string "PCOUT<47:0>") (owner "Xilinx")) + (property PIN_BUSIDX (integer 4) (owner "Xilinx")) + ) + (port (rename PCOUT_42_ "PCOUT<42>") + (direction OUTPUT) + (property PIN_BUSNAME (string "PCOUT<47:0>") (owner "Xilinx")) + (property PIN_BUSIDX (integer 5) (owner "Xilinx")) + ) + (port (rename PCOUT_41_ "PCOUT<41>") + (direction OUTPUT) + (property PIN_BUSNAME (string "PCOUT<47:0>") (owner "Xilinx")) + (property PIN_BUSIDX (integer 6) (owner "Xilinx")) + ) + (port (rename PCOUT_40_ "PCOUT<40>") + (direction OUTPUT) + (property PIN_BUSNAME (string "PCOUT<47:0>") (owner "Xilinx")) + (property PIN_BUSIDX (integer 7) (owner "Xilinx")) + ) + (port (rename PCOUT_39_ "PCOUT<39>") + (direction OUTPUT) + (property PIN_BUSNAME (string "PCOUT<47:0>") (owner "Xilinx")) + (property PIN_BUSIDX (integer 8) (owner "Xilinx")) + ) + (port (rename PCOUT_38_ "PCOUT<38>") + (direction OUTPUT) + (property PIN_BUSNAME (string "PCOUT<47:0>") (owner "Xilinx")) + (property PIN_BUSIDX (integer 9) (owner "Xilinx")) + ) + (port (rename PCOUT_37_ "PCOUT<37>") + (direction OUTPUT) + (property PIN_BUSNAME (string "PCOUT<47:0>") (owner "Xilinx")) + (property PIN_BUSIDX (integer 10) (owner "Xilinx")) + ) + (port (rename PCOUT_36_ "PCOUT<36>") + (direction OUTPUT) + (property PIN_BUSNAME (string "PCOUT<47:0>") (owner "Xilinx")) + (property PIN_BUSIDX (integer 11) (owner "Xilinx")) + ) + (port (rename PCOUT_35_ "PCOUT<35>") + (direction OUTPUT) + (property PIN_BUSNAME (string "PCOUT<47:0>") (owner "Xilinx")) + (property PIN_BUSIDX (integer 12) (owner "Xilinx")) + ) + (port (rename PCOUT_34_ "PCOUT<34>") + (direction OUTPUT) + (property PIN_BUSNAME (string "PCOUT<47:0>") (owner "Xilinx")) + (property PIN_BUSIDX (integer 13) (owner "Xilinx")) + ) + (port (rename PCOUT_33_ "PCOUT<33>") + (direction OUTPUT) + (property PIN_BUSNAME (string "PCOUT<47:0>") (owner "Xilinx")) + (property PIN_BUSIDX (integer 14) (owner "Xilinx")) + ) + (port (rename PCOUT_32_ "PCOUT<32>") + (direction OUTPUT) + (property PIN_BUSNAME (string "PCOUT<47:0>") (owner "Xilinx")) + (property PIN_BUSIDX (integer 15) (owner "Xilinx")) + ) + (port (rename PCOUT_31_ "PCOUT<31>") + (direction OUTPUT) + (property PIN_BUSNAME (string "PCOUT<47:0>") (owner "Xilinx")) + (property PIN_BUSIDX (integer 16) (owner "Xilinx")) + ) + (port (rename PCOUT_30_ "PCOUT<30>") + (direction OUTPUT) + (property PIN_BUSNAME (string "PCOUT<47:0>") (owner "Xilinx")) + (property PIN_BUSIDX (integer 17) (owner "Xilinx")) + ) + (port (rename PCOUT_29_ "PCOUT<29>") + (direction OUTPUT) + (property PIN_BUSNAME (string "PCOUT<47:0>") (owner "Xilinx")) + (property PIN_BUSIDX (integer 18) (owner "Xilinx")) + ) + (port (rename PCOUT_28_ "PCOUT<28>") + (direction OUTPUT) + (property PIN_BUSNAME (string "PCOUT<47:0>") (owner "Xilinx")) + (property PIN_BUSIDX (integer 19) (owner "Xilinx")) + ) + (port (rename PCOUT_27_ "PCOUT<27>") + (direction OUTPUT) + (property PIN_BUSNAME (string "PCOUT<47:0>") (owner "Xilinx")) + (property PIN_BUSIDX (integer 20) (owner "Xilinx")) + ) + (port (rename PCOUT_26_ "PCOUT<26>") + (direction OUTPUT) + (property PIN_BUSNAME (string "PCOUT<47:0>") (owner "Xilinx")) + (property PIN_BUSIDX (integer 21) (owner "Xilinx")) + ) + (port (rename PCOUT_25_ "PCOUT<25>") + (direction OUTPUT) + (property PIN_BUSNAME (string "PCOUT<47:0>") (owner "Xilinx")) + (property PIN_BUSIDX (integer 22) (owner "Xilinx")) + ) + (port (rename PCOUT_24_ "PCOUT<24>") + (direction OUTPUT) + (property PIN_BUSNAME (string "PCOUT<47:0>") (owner "Xilinx")) + (property PIN_BUSIDX (integer 23) (owner "Xilinx")) + ) + (port (rename PCOUT_23_ "PCOUT<23>") + (direction OUTPUT) + (property PIN_BUSNAME (string "PCOUT<47:0>") (owner "Xilinx")) + (property PIN_BUSIDX (integer 24) (owner "Xilinx")) + ) + (port (rename PCOUT_22_ "PCOUT<22>") + (direction OUTPUT) + (property PIN_BUSNAME (string "PCOUT<47:0>") (owner "Xilinx")) + (property PIN_BUSIDX (integer 25) (owner "Xilinx")) + ) + (port (rename PCOUT_21_ "PCOUT<21>") + (direction OUTPUT) + (property PIN_BUSNAME (string "PCOUT<47:0>") (owner "Xilinx")) + (property PIN_BUSIDX (integer 26) (owner "Xilinx")) + ) + (port (rename PCOUT_20_ "PCOUT<20>") + (direction OUTPUT) + (property PIN_BUSNAME (string "PCOUT<47:0>") (owner "Xilinx")) + (property PIN_BUSIDX (integer 27) (owner "Xilinx")) + ) + (port (rename PCOUT_19_ "PCOUT<19>") + (direction OUTPUT) + (property PIN_BUSNAME (string "PCOUT<47:0>") (owner "Xilinx")) + (property PIN_BUSIDX (integer 28) (owner "Xilinx")) + ) + (port (rename PCOUT_18_ "PCOUT<18>") + (direction OUTPUT) + (property PIN_BUSNAME (string "PCOUT<47:0>") (owner "Xilinx")) + (property PIN_BUSIDX (integer 29) (owner "Xilinx")) + ) + (port (rename PCOUT_17_ "PCOUT<17>") + (direction OUTPUT) + (property PIN_BUSNAME (string "PCOUT<47:0>") (owner "Xilinx")) + (property PIN_BUSIDX (integer 30) (owner "Xilinx")) + ) + (port (rename PCOUT_16_ "PCOUT<16>") + (direction OUTPUT) + (property PIN_BUSNAME (string "PCOUT<47:0>") (owner "Xilinx")) + (property PIN_BUSIDX (integer 31) (owner "Xilinx")) + ) + (port (rename PCOUT_15_ "PCOUT<15>") + (direction OUTPUT) + (property PIN_BUSNAME (string "PCOUT<47:0>") (owner "Xilinx")) + (property PIN_BUSIDX (integer 32) (owner "Xilinx")) + ) + (port (rename PCOUT_14_ "PCOUT<14>") + (direction OUTPUT) + (property PIN_BUSNAME (string "PCOUT<47:0>") (owner "Xilinx")) + (property PIN_BUSIDX (integer 33) (owner "Xilinx")) + ) + (port (rename PCOUT_13_ "PCOUT<13>") + (direction OUTPUT) + (property PIN_BUSNAME (string "PCOUT<47:0>") (owner "Xilinx")) + (property PIN_BUSIDX (integer 34) (owner "Xilinx")) + ) + (port (rename PCOUT_12_ "PCOUT<12>") + (direction OUTPUT) + (property PIN_BUSNAME (string "PCOUT<47:0>") (owner "Xilinx")) + (property PIN_BUSIDX (integer 35) (owner "Xilinx")) + ) + (port (rename PCOUT_11_ "PCOUT<11>") + (direction OUTPUT) + (property PIN_BUSNAME (string "PCOUT<47:0>") (owner "Xilinx")) + (property PIN_BUSIDX (integer 36) (owner "Xilinx")) + ) + (port (rename PCOUT_10_ "PCOUT<10>") + (direction OUTPUT) + (property PIN_BUSNAME (string "PCOUT<47:0>") (owner "Xilinx")) + (property PIN_BUSIDX (integer 37) (owner "Xilinx")) + ) + (port (rename PCOUT_9_ "PCOUT<9>") + (direction OUTPUT) + (property PIN_BUSNAME (string "PCOUT<47:0>") (owner "Xilinx")) + (property PIN_BUSIDX (integer 38) (owner "Xilinx")) + ) + (port (rename PCOUT_8_ "PCOUT<8>") + (direction OUTPUT) + (property PIN_BUSNAME (string "PCOUT<47:0>") (owner "Xilinx")) + (property PIN_BUSIDX (integer 39) (owner "Xilinx")) + ) + (port (rename PCOUT_7_ "PCOUT<7>") + (direction OUTPUT) + (property PIN_BUSNAME (string "PCOUT<47:0>") (owner "Xilinx")) + (property PIN_BUSIDX (integer 40) (owner "Xilinx")) + ) + (port (rename PCOUT_6_ "PCOUT<6>") + (direction OUTPUT) + (property PIN_BUSNAME (string "PCOUT<47:0>") (owner "Xilinx")) + (property PIN_BUSIDX (integer 41) (owner "Xilinx")) + ) + (port (rename PCOUT_5_ "PCOUT<5>") + (direction OUTPUT) + (property PIN_BUSNAME (string "PCOUT<47:0>") (owner "Xilinx")) + (property PIN_BUSIDX (integer 42) (owner "Xilinx")) + ) + (port (rename PCOUT_4_ "PCOUT<4>") + (direction OUTPUT) + (property PIN_BUSNAME (string "PCOUT<47:0>") (owner "Xilinx")) + (property PIN_BUSIDX (integer 43) (owner "Xilinx")) + ) + (port (rename PCOUT_3_ "PCOUT<3>") + (direction OUTPUT) + (property PIN_BUSNAME (string "PCOUT<47:0>") (owner "Xilinx")) + (property PIN_BUSIDX (integer 44) (owner "Xilinx")) + ) + (port (rename PCOUT_2_ "PCOUT<2>") + (direction OUTPUT) + (property PIN_BUSNAME (string "PCOUT<47:0>") (owner "Xilinx")) + (property PIN_BUSIDX (integer 45) (owner "Xilinx")) + ) + (port (rename PCOUT_1_ "PCOUT<1>") + (direction OUTPUT) + (property PIN_BUSNAME (string "PCOUT<47:0>") (owner "Xilinx")) + (property PIN_BUSIDX (integer 46) (owner "Xilinx")) + ) + (port (rename PCOUT_0_ "PCOUT<0>") + (direction OUTPUT) + (property PIN_BUSNAME (string "PCOUT<47:0>") (owner "Xilinx")) + (property PIN_BUSIDX (integer 47) (owner "Xilinx")) + ) + (port (rename ACIN_29_ "ACIN<29>") + (direction INPUT) + (property PIN_BUSNAME (string "ACIN<29:0>") (owner "Xilinx")) + (property PIN_BUSIDX (integer 0) (owner "Xilinx")) + ) + (port (rename ACIN_28_ "ACIN<28>") + (direction INPUT) + (property PIN_BUSNAME (string "ACIN<29:0>") (owner "Xilinx")) + (property PIN_BUSIDX (integer 1) (owner "Xilinx")) + ) + (port (rename ACIN_27_ "ACIN<27>") + (direction INPUT) + (property PIN_BUSNAME (string "ACIN<29:0>") (owner "Xilinx")) + (property PIN_BUSIDX (integer 2) (owner "Xilinx")) + ) + (port (rename ACIN_26_ "ACIN<26>") + (direction INPUT) + (property PIN_BUSNAME (string "ACIN<29:0>") (owner "Xilinx")) + (property PIN_BUSIDX (integer 3) (owner "Xilinx")) + ) + (port (rename ACIN_25_ "ACIN<25>") + (direction INPUT) + (property PIN_BUSNAME (string "ACIN<29:0>") (owner "Xilinx")) + (property PIN_BUSIDX (integer 4) (owner "Xilinx")) + ) + (port (rename ACIN_24_ "ACIN<24>") + (direction INPUT) + (property PIN_BUSNAME (string "ACIN<29:0>") (owner "Xilinx")) + (property PIN_BUSIDX (integer 5) (owner "Xilinx")) + ) + (port (rename ACIN_23_ "ACIN<23>") + (direction INPUT) + (property PIN_BUSNAME (string "ACIN<29:0>") (owner "Xilinx")) + (property PIN_BUSIDX (integer 6) (owner "Xilinx")) + ) + (port (rename ACIN_22_ "ACIN<22>") + (direction INPUT) + (property PIN_BUSNAME (string "ACIN<29:0>") (owner "Xilinx")) + (property PIN_BUSIDX (integer 7) (owner "Xilinx")) + ) + (port (rename ACIN_21_ "ACIN<21>") + (direction INPUT) + (property PIN_BUSNAME (string "ACIN<29:0>") (owner "Xilinx")) + (property PIN_BUSIDX (integer 8) (owner "Xilinx")) + ) + (port (rename ACIN_20_ "ACIN<20>") + (direction INPUT) + (property PIN_BUSNAME (string "ACIN<29:0>") (owner "Xilinx")) + (property PIN_BUSIDX (integer 9) (owner "Xilinx")) + ) + (port (rename ACIN_19_ "ACIN<19>") + (direction INPUT) + (property PIN_BUSNAME (string "ACIN<29:0>") (owner "Xilinx")) + (property PIN_BUSIDX (integer 10) (owner "Xilinx")) + ) + (port (rename ACIN_18_ "ACIN<18>") + (direction INPUT) + (property PIN_BUSNAME (string "ACIN<29:0>") (owner "Xilinx")) + (property PIN_BUSIDX (integer 11) (owner "Xilinx")) + ) + (port (rename ACIN_17_ "ACIN<17>") + (direction INPUT) + (property PIN_BUSNAME (string "ACIN<29:0>") (owner "Xilinx")) + (property PIN_BUSIDX (integer 12) (owner "Xilinx")) + ) + (port (rename ACIN_16_ "ACIN<16>") + (direction INPUT) + (property PIN_BUSNAME (string "ACIN<29:0>") (owner "Xilinx")) + (property PIN_BUSIDX (integer 13) (owner "Xilinx")) + ) + (port (rename ACIN_15_ "ACIN<15>") + (direction INPUT) + (property PIN_BUSNAME (string "ACIN<29:0>") (owner "Xilinx")) + (property PIN_BUSIDX (integer 14) (owner "Xilinx")) + ) + (port (rename ACIN_14_ "ACIN<14>") + (direction INPUT) + (property PIN_BUSNAME (string "ACIN<29:0>") (owner "Xilinx")) + (property PIN_BUSIDX (integer 15) (owner "Xilinx")) + ) + (port (rename ACIN_13_ "ACIN<13>") + (direction INPUT) + (property PIN_BUSNAME (string "ACIN<29:0>") (owner "Xilinx")) + (property PIN_BUSIDX (integer 16) (owner "Xilinx")) + ) + (port (rename ACIN_12_ "ACIN<12>") + (direction INPUT) + (property PIN_BUSNAME (string "ACIN<29:0>") (owner "Xilinx")) + (property PIN_BUSIDX (integer 17) (owner "Xilinx")) + ) + (port (rename ACIN_11_ "ACIN<11>") + (direction INPUT) + (property PIN_BUSNAME (string "ACIN<29:0>") (owner "Xilinx")) + (property PIN_BUSIDX (integer 18) (owner "Xilinx")) + ) + (port (rename ACIN_10_ "ACIN<10>") + (direction INPUT) + (property PIN_BUSNAME (string "ACIN<29:0>") (owner "Xilinx")) + (property PIN_BUSIDX (integer 19) (owner "Xilinx")) + ) + (port (rename ACIN_9_ "ACIN<9>") + (direction INPUT) + (property PIN_BUSNAME (string "ACIN<29:0>") (owner "Xilinx")) + (property PIN_BUSIDX (integer 20) (owner "Xilinx")) + ) + (port (rename ACIN_8_ "ACIN<8>") + (direction INPUT) + (property PIN_BUSNAME (string "ACIN<29:0>") (owner "Xilinx")) + (property PIN_BUSIDX (integer 21) (owner "Xilinx")) + ) + (port (rename ACIN_7_ "ACIN<7>") + (direction INPUT) + (property PIN_BUSNAME (string "ACIN<29:0>") (owner "Xilinx")) + (property PIN_BUSIDX (integer 22) (owner "Xilinx")) + ) + (port (rename ACIN_6_ "ACIN<6>") + (direction INPUT) + (property PIN_BUSNAME (string "ACIN<29:0>") (owner "Xilinx")) + (property PIN_BUSIDX (integer 23) (owner "Xilinx")) + ) + (port (rename ACIN_5_ "ACIN<5>") + (direction INPUT) + (property PIN_BUSNAME (string "ACIN<29:0>") (owner "Xilinx")) + (property PIN_BUSIDX (integer 24) (owner "Xilinx")) + ) + (port (rename ACIN_4_ "ACIN<4>") + (direction INPUT) + (property PIN_BUSNAME (string "ACIN<29:0>") (owner "Xilinx")) + (property PIN_BUSIDX (integer 25) (owner "Xilinx")) + ) + (port (rename ACIN_3_ "ACIN<3>") + (direction INPUT) + (property PIN_BUSNAME (string "ACIN<29:0>") (owner "Xilinx")) + (property PIN_BUSIDX (integer 26) (owner "Xilinx")) + ) + (port (rename ACIN_2_ "ACIN<2>") + (direction INPUT) + (property PIN_BUSNAME (string "ACIN<29:0>") (owner "Xilinx")) + (property PIN_BUSIDX (integer 27) (owner "Xilinx")) + ) + (port (rename ACIN_1_ "ACIN<1>") + (direction INPUT) + (property PIN_BUSNAME (string "ACIN<29:0>") (owner "Xilinx")) + (property PIN_BUSIDX (integer 28) (owner "Xilinx")) + ) + (port (rename ACIN_0_ "ACIN<0>") + (direction INPUT) + (property PIN_BUSNAME (string "ACIN<29:0>") (owner "Xilinx")) + (property PIN_BUSIDX (integer 29) (owner "Xilinx")) + ) + (port (rename CARRYINSEL_2_ "CARRYINSEL<2>") + (direction INPUT) + (property PIN_BUSNAME (string "CARRYINSEL<2:0>") (owner "Xilinx")) + (property PIN_BUSIDX (integer 0) (owner "Xilinx")) + ) + (port (rename CARRYINSEL_1_ "CARRYINSEL<1>") + (direction INPUT) + (property PIN_BUSNAME (string "CARRYINSEL<2:0>") (owner "Xilinx")) + (property PIN_BUSIDX (integer 1) (owner "Xilinx")) + ) + (port (rename CARRYINSEL_0_ "CARRYINSEL<0>") + (direction INPUT) + (property PIN_BUSNAME (string "CARRYINSEL<2:0>") (owner "Xilinx")) + (property PIN_BUSIDX (integer 2) (owner "Xilinx")) + ) + ) + ) + ) + (cell MUXCY + (cellType GENERIC) + (view view_1 + (viewType NETLIST) + (interface + (port CI + (direction INPUT) + ) + (port DI + (direction INPUT) + ) + (port S + (direction INPUT) + ) + (port O + (direction OUTPUT) + ) + ) + ) + ) + (cell FDSE + (cellType GENERIC) + (view view_1 + (viewType NETLIST) + (interface + (port C + (direction INPUT) + ) + (port CE + (direction INPUT) + ) + (port D + (direction INPUT) + ) + (port S + (direction INPUT) + ) + (port Q + (direction OUTPUT) + ) + ) + ) + ) + (cell FDRE + (cellType GENERIC) + (view view_1 + (viewType NETLIST) + (interface + (port C + (direction INPUT) + ) + (port CE + (direction INPUT) + ) + (port D + (direction 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) + (port DPRA4 + (direction INPUT) + ) + (port WCLK + (direction INPUT) + ) + (port WE + (direction INPUT) + ) + (port SPO + (direction OUTPUT) + ) + (port DPO + (direction OUTPUT) + ) + ) + ) + ) + (cell LUT2 + (cellType GENERIC) + (view view_1 + (viewType NETLIST) + (interface + (port I0 + (direction INPUT) + ) + (port I1 + (direction INPUT) + ) + (port O + (direction OUTPUT) + ) + ) + ) + ) + (cell MUXCY_L + (cellType GENERIC) + (view view_1 + (viewType NETLIST) + (interface + (port CI + (direction INPUT) + ) + (port DI + (direction INPUT) + ) + (port S + (direction INPUT) + ) + (port LO + (direction OUTPUT) + ) + ) + ) + ) + (cell SRLC16E + (cellType GENERIC) + (view view_1 + (viewType NETLIST) + (interface + (port A0 + (direction INPUT) + ) + (port A1 + (direction INPUT) + ) + (port A2 + (direction INPUT) + ) + (port A3 + (direction INPUT) + ) + (port CE + (direction INPUT) + ) + (port CLK + (direction INPUT) + ) + (port D + (direction INPUT) + ) + (port Q + (direction OUTPUT) + ) + (port Q15 + (direction OUTPUT) + ) + ) + ) + ) + (cell LUT4 + (cellType GENERIC) + (view view_1 + (viewType NETLIST) + (interface + (port I0 + (direction INPUT) + ) + (port I1 + (direction INPUT) + ) + (port I2 + (direction INPUT) + ) + (port I3 + (direction INPUT) + ) + (port O + (direction OUTPUT) + ) + ) + ) + ) + (cell LUT3 + (cellType GENERIC) + (view view_1 + (viewType NETLIST) + (interface + (port I0 + (direction INPUT) + ) + (port I1 + (direction INPUT) + ) + (port I2 + (direction INPUT) + ) + (port O + (direction OUTPUT) + ) + ) + ) + ) + (cell LUT5 + (cellType GENERIC) + (view view_1 + (viewType NETLIST) + (interface + (port I0 + (direction INPUT) + ) + (port I1 + (direction INPUT) + ) + (port I2 + (direction INPUT) + ) + (port I3 + (direction INPUT) + ) + (port I4 + (direction INPUT) + ) + (port O + (direction OUTPUT) + ) + ) + ) + ) + (cell LUT1 + (cellType GENERIC) + (view view_1 + (viewType NETLIST) + (interface + (port I0 + (direction INPUT) + ) + (port O + (direction OUTPUT) + ) + ) + ) + ) + (cell INV + (cellType GENERIC) + (view view_1 + (viewType NETLIST) + (interface + (port I + (direction INPUT) + ) + (port O + (direction OUTPUT) + ) + ) + ) + ) + ) + + (library hbdec3_lib + (edifLevel 0) + (technology (numberDefinition)) + (cell (rename dpr_ram_4_blk00000371 "dpr_ram_4") + (cellType GENERIC) + (view view_1 + (viewType NETLIST) + (interface + (port WEA + (direction INPUT) + ) + (port CE + (direction INPUT) + ) + (port SCLR + (direction INPUT) + ) + (port CLK + (direction INPUT) + ) + (port (array (rename ADDRA "ADDRA<0:0>") 1) + (direction INPUT)) + (port (array (rename DA_IN "DA_IN<17:0>") 18) + (direction INPUT)) + (port (array (rename ADDRB "ADDRB<0:0>") 1) + (direction INPUT)) + (port (array (rename DA_OUT "DA_OUT<17:0>") 18) + (direction OUTPUT)) + (port (array (rename DB_OUT "DB_OUT<17:0>") 18) + (direction OUTPUT)) + ) + (contents + (instance blk00000372 + (viewRef view_1 (cellRef GND (libraryRef UNISIMS))) + (property XSTLIB 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(port (array (rename dout_q_14 "dout_q_14<47:0>") 48) + (direction OUTPUT)) + (port (array (rename dout_q_15 "dout_q_15<47:0>") 48) + (direction OUTPUT)) + (port (array (rename dout_q_16 "dout_q_16<47:0>") 48) + (direction OUTPUT)) + (port (array (rename coef_din "coef_din<17:0>") 18) + (direction INPUT)) + (port (array (rename dout_i "dout_i<23:0>") 24) + (direction OUTPUT)) + (port (array (rename dout_q "dout_q<47:0>") 48) + (direction OUTPUT)) + (port (array (rename dout_i_1 "dout_i_1<23:0>") 24) + (direction OUTPUT)) + (port (array (rename dout_i_2 "dout_i_2<23:0>") 24) + (direction OUTPUT)) + (port (array (rename dout_i_3 "dout_i_3<23:0>") 24) + (direction OUTPUT)) + (port (array (rename dout_i_4 "dout_i_4<23:0>") 24) + (direction OUTPUT)) + (port (array (rename dout_i_5 "dout_i_5<23:0>") 24) + (direction OUTPUT)) + (port (array (rename dout_i_6 "dout_i_6<23:0>") 24) + (direction OUTPUT)) + (port (array (rename dout_q_1 "dout_q_1<47:0>") 48) + (direction OUTPUT)) + (port (array (rename dout_i_7 "dout_i_7<23:0>") 24) + (direction OUTPUT)) + (port (array (rename dout_q_2 "dout_q_2<47:0>") 48) + (direction OUTPUT)) + (port (array (rename dout_i_8 "dout_i_8<23:0>") 24) + (direction OUTPUT)) + (port (array (rename dout_q_3 "dout_q_3<47:0>") 48) + (direction OUTPUT)) + (port (array (rename dout_i_9 "dout_i_9<23:0>") 24) + (direction OUTPUT)) + (port (array (rename dout_q_4 "dout_q_4<47:0>") 48) + (direction OUTPUT)) + (port (array (rename dout_q_5 "dout_q_5<47:0>") 48) + (direction OUTPUT)) + (port (array (rename dout_q_6 "dout_q_6<47:0>") 48) + (direction OUTPUT)) + (port (array (rename dout_q_7 "dout_q_7<47:0>") 48) + (direction OUTPUT)) + (port (array (rename dout_q_8 "dout_q_8<47:0>") 48) + (direction OUTPUT)) + (port (array (rename dout_q_9 "dout_q_9<47:0>") 48) + (direction OUTPUT)) + (port (array (rename dout "dout<47:0>") 48) + (direction OUTPUT)) + (port (array (rename din "din<23:0>") 24) + (direction INPUT)) + (port (array (rename chan_in "chan_in<0:0>") 1) + (direction OUTPUT)) + (port (array (rename chan_out "chan_out<0:0>") 1) + (direction OUTPUT)) + (port (array (rename filter_sel "filter_sel<0:0>") 1) + (direction INPUT)) + ) + (contents + (instance blk00000004 + (viewRef view_1 (cellRef GND (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + ) + (instance blk00000005 + (viewRef view_1 (cellRef VCC (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + ) + (instance blk00000006 + (viewRef view_1 (cellRef FD (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property INIT (string "0") (owner "Xilinx")) + ) + (instance blk00000007 + (viewRef view_1 (cellRef FD (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property INIT (string "0") (owner "Xilinx")) + ) + (instance blk00000008 + (viewRef view_1 (cellRef FD (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property INIT (string "0") (owner "Xilinx")) + ) + (instance blk00000009 + (viewRef view_1 (cellRef MUXCY_D (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property OPTIMIZE_PRIMITIVES_NGC (string "no") (owner "Xilinx")) + ) + (instance blk0000000a + (viewRef view_1 (cellRef MUXCY_D (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property OPTIMIZE_PRIMITIVES_NGC (string "no") (owner "Xilinx")) + ) + (instance blk0000000b + (viewRef view_1 (cellRef XORCY (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property OPTIMIZE_PRIMITIVES_NGC (string "no") (owner "Xilinx")) + ) + (instance blk0000000c + (viewRef view_1 (cellRef MUXCY_D (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property OPTIMIZE_PRIMITIVES_NGC (string "no") (owner "Xilinx")) + ) + (instance blk0000000d + (viewRef view_1 (cellRef MUXCY_D (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property OPTIMIZE_PRIMITIVES_NGC (string "no") (owner "Xilinx")) + ) + (instance blk0000000e + (viewRef view_1 (cellRef DSP48E1 (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property BUS_INFO (string "3:INPUT:CARRYINSEL<2:0>") (owner "Xilinx")) + (property BUS_INFO (string "4:OUTPUT:CARRYOUT<3:0>") (owner "Xilinx")) + (property BUS_INFO (string "4:INPUT:ALUMODE<3:0>") (owner "Xilinx")) + (property BUS_INFO (string "7:INPUT:OPMODE<6:0>") (owner "Xilinx")) + (property BUS_INFO (string "5:INPUT:INMODE<4:0>") (owner "Xilinx")) + (property BUS_INFO (string "30:OUTPUT:ACOUT<29:0>") (owner "Xilinx")) + (property BUS_INFO (string "18:OUTPUT:BCOUT<17:0>") (owner "Xilinx")) + (property BUS_INFO (string "48:OUTPUT:PCOUT<47:0>") (owner "Xilinx")) + (property BUS_INFO (string "48:INPUT:PCIN<47:0>") (owner "Xilinx")) + (property BUS_INFO (string "18:INPUT:BCIN<17:0>") (owner "Xilinx")) + (property BUS_INFO (string "30:INPUT:ACIN<29:0>") (owner "Xilinx")) + (property BUS_INFO (string "48:INPUT:C<47:0>") (owner "Xilinx")) + (property BUS_INFO (string "18:INPUT:B<17:0>") (owner "Xilinx")) + (property BUS_INFO (string "25:INPUT:D<24:0>") (owner "Xilinx")) + (property BUS_INFO (string "48:OUTPUT:P<47:0>") (owner "Xilinx")) + (property BUS_INFO (string "30:INPUT:A<29:0>") (owner "Xilinx")) + (property OPTIMIZE_PRIMITIVES_NGC (string "no") (owner "Xilinx")) + (property ACASCREG (integer 2) (owner "Xilinx")) + (property ADREG (integer 0) (owner "Xilinx")) + (property ALUMODEREG (integer 1) (owner "Xilinx")) + (property AREG (integer 2) (owner "Xilinx")) + (property AUTORESET_PATDET (string "NO_RESET") (owner "Xilinx")) + (property A_INPUT (string "DIRECT") (owner "Xilinx")) + (property BCASCREG (integer 2) (owner "Xilinx")) + (property BREG (integer 2) (owner "Xilinx")) + (property B_INPUT (string "DIRECT") (owner "Xilinx")) + (property CARRYINREG (integer 1) (owner "Xilinx")) + (property CARRYINSELREG (integer 1) (owner "Xilinx")) + (property CREG (integer 1) (owner "Xilinx")) + (property DREG (integer 0) (owner "Xilinx")) + (property INMODEREG (integer 0) (owner "Xilinx")) + (property MASK (string "FFFFFFFFFFFE") (owner "Xilinx")) + (property MREG (integer 1) (owner "Xilinx")) + (property OPMODEREG (integer 1) (owner "Xilinx")) + (property PATTERN (string "000000000000") (owner "Xilinx")) + (property PREG (integer 1) (owner "Xilinx")) + (property SEL_MASK (string "MASK") (owner "Xilinx")) + (property SEL_PATTERN (string "PATTERN") (owner "Xilinx")) + (property USE_DPORT (string "FALSE") (owner "Xilinx")) + (property USE_MULT (string "MULTIPLY") (owner "Xilinx")) + (property USE_PATTERN_DETECT (string "NO_PATDET") (owner "Xilinx")) + (property USE_SIMD (string "ONE48") (owner "Xilinx")) + ) + (instance blk0000000f + (viewRef view_1 (cellRef DSP48E1 (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property BUS_INFO (string "3:INPUT:CARRYINSEL<2:0>") (owner "Xilinx")) + (property BUS_INFO (string "4:OUTPUT:CARRYOUT<3:0>") (owner "Xilinx")) + (property BUS_INFO (string "4:INPUT:ALUMODE<3:0>") (owner "Xilinx")) + (property BUS_INFO (string "7:INPUT:OPMODE<6:0>") (owner "Xilinx")) + (property BUS_INFO (string "5:INPUT:INMODE<4:0>") (owner "Xilinx")) + (property BUS_INFO (string "30:OUTPUT:ACOUT<29:0>") (owner "Xilinx")) + (property BUS_INFO (string "18:OUTPUT:BCOUT<17:0>") (owner "Xilinx")) + (property BUS_INFO (string "48:OUTPUT:PCOUT<47:0>") (owner "Xilinx")) + (property BUS_INFO (string "48:INPUT:PCIN<47:0>") (owner "Xilinx")) + (property BUS_INFO (string "18:INPUT:BCIN<17:0>") (owner "Xilinx")) + (property BUS_INFO (string "30:INPUT:ACIN<29:0>") (owner "Xilinx")) + (property BUS_INFO (string "48:INPUT:C<47:0>") (owner "Xilinx")) + (property BUS_INFO (string "18:INPUT:B<17:0>") (owner "Xilinx")) + (property BUS_INFO (string "25:INPUT:D<24:0>") (owner "Xilinx")) + (property BUS_INFO (string "48:OUTPUT:P<47:0>") (owner "Xilinx")) + (property BUS_INFO (string "30:INPUT:A<29:0>") (owner "Xilinx")) + (property OPTIMIZE_PRIMITIVES_NGC (string "no") (owner "Xilinx")) + (property ACASCREG (integer 2) (owner "Xilinx")) + (property ADREG (integer 0) (owner "Xilinx")) + (property ALUMODEREG (integer 1) (owner "Xilinx")) + (property AREG (integer 2) (owner "Xilinx")) + (property AUTORESET_PATDET (string "NO_RESET") (owner "Xilinx")) + (property A_INPUT (string "DIRECT") (owner "Xilinx")) + (property BCASCREG (integer 2) (owner "Xilinx")) + (property BREG (integer 2) (owner "Xilinx")) + (property B_INPUT (string "DIRECT") (owner "Xilinx")) + (property CARRYINREG (integer 1) (owner "Xilinx")) + (property CARRYINSELREG (integer 1) (owner "Xilinx")) + (property CREG (integer 1) (owner "Xilinx")) + (property DREG (integer 0) (owner "Xilinx")) + (property INMODEREG (integer 0) (owner "Xilinx")) + (property MASK (string "FFFFFFFFFFFE") (owner "Xilinx")) + (property MREG (integer 1) (owner "Xilinx")) + (property OPMODEREG (integer 1) (owner "Xilinx")) + (property PATTERN (string "000000000000") (owner "Xilinx")) + (property PREG (integer 1) (owner "Xilinx")) + (property SEL_MASK (string "MASK") (owner "Xilinx")) + (property SEL_PATTERN (string "PATTERN") (owner "Xilinx")) + (property USE_DPORT (string "FALSE") (owner "Xilinx")) + (property USE_MULT (string "MULTIPLY") (owner "Xilinx")) + (property USE_PATTERN_DETECT (string "NO_PATDET") (owner "Xilinx")) + (property USE_SIMD (string "ONE48") (owner "Xilinx")) + ) + (instance blk00000010 + (viewRef view_1 (cellRef MUXCY_D (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property OPTIMIZE_PRIMITIVES_NGC (string "no") (owner "Xilinx")) + ) + (instance blk00000011 + (viewRef view_1 (cellRef MUXCY_D (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property OPTIMIZE_PRIMITIVES_NGC (string "no") (owner "Xilinx")) + ) + (instance blk00000012 + (viewRef view_1 (cellRef MUXCY (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property OPTIMIZE_PRIMITIVES_NGC (string "no") (owner "Xilinx")) + ) + (instance blk00000013 + (viewRef view_1 (cellRef FDSE (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property OPTIMIZE_PRIMITIVES_NGC (string "no") (owner "Xilinx")) + (property INIT (string "1") (owner "Xilinx")) + ) + (instance blk00000014 + (viewRef view_1 (cellRef FDRE (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property OPTIMIZE_PRIMITIVES_NGC (string "no") (owner "Xilinx")) + (property INIT (string "0") (owner "Xilinx")) + ) + (instance blk00000015 + (viewRef view_1 (cellRef FDRE (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property OPTIMIZE_PRIMITIVES_NGC (string "no") (owner "Xilinx")) + (property INIT (string "0") (owner "Xilinx")) + ) + (instance blk00000016 + (viewRef view_1 (cellRef FDE (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property INIT (string "0") (owner "Xilinx")) + ) + (instance blk00000017 + (viewRef view_1 (cellRef FDE (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property INIT (string "0") (owner "Xilinx")) + ) + (instance blk00000018 + (viewRef view_1 (cellRef FDRE (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property OPTIMIZE_PRIMITIVES_NGC (string "no") (owner "Xilinx")) + (property INIT (string "0") (owner "Xilinx")) + ) + (instance blk00000019 + (viewRef view_1 (cellRef FDRE (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property OPTIMIZE_PRIMITIVES_NGC (string "no") (owner "Xilinx")) + (property INIT (string "0") (owner "Xilinx")) + ) + (instance blk0000001a + (viewRef view_1 (cellRef FDRE (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property OPTIMIZE_PRIMITIVES_NGC (string "no") (owner "Xilinx")) + (property INIT (string "0") (owner "Xilinx")) + ) + (instance blk0000001b + (viewRef view_1 (cellRef FDRE (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property OPTIMIZE_PRIMITIVES_NGC (string "no") (owner "Xilinx")) + (property INIT (string "0") (owner "Xilinx")) + ) + (instance blk0000001c + (viewRef view_1 (cellRef FDRE (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property OPTIMIZE_PRIMITIVES_NGC (string "no") (owner "Xilinx")) + (property INIT (string "0") (owner "Xilinx")) + ) + (instance blk0000001d + (viewRef view_1 (cellRef FDRE (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property OPTIMIZE_PRIMITIVES_NGC (string "no") (owner "Xilinx")) + (property INIT (string "0") (owner "Xilinx")) + ) + (instance blk0000001e + (viewRef view_1 (cellRef FDRE (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property OPTIMIZE_PRIMITIVES_NGC (string "no") (owner "Xilinx")) + (property INIT (string "0") (owner "Xilinx")) + ) + (instance blk0000001f + (viewRef view_1 (cellRef FDRE (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property OPTIMIZE_PRIMITIVES_NGC (string "no") (owner "Xilinx")) + (property INIT (string "0") (owner "Xilinx")) + ) + (instance blk00000020 + (viewRef view_1 (cellRef FDSE (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property OPTIMIZE_PRIMITIVES_NGC (string "no") (owner "Xilinx")) + (property INIT (string "1") (owner "Xilinx")) + ) + (instance blk00000021 + (viewRef view_1 (cellRef FDRE (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + ) + (instance blk00000022 + (viewRef view_1 (cellRef FDSE (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + ) + (instance blk00000023 + (viewRef view_1 (cellRef FDRE (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property INIT (string "0") (owner "Xilinx")) + ) + (instance blk00000024 + (viewRef view_1 (cellRef FDRE (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + ) + (instance blk00000025 + (viewRef view_1 (cellRef FDRE (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property INIT (string "0") (owner "Xilinx")) + ) + (instance blk00000026 + (viewRef view_1 (cellRef FDRE (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property INIT (string "0") (owner "Xilinx")) + ) + (instance blk00000027 + (viewRef view_1 (cellRef FDRE (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property INIT (string "0") (owner "Xilinx")) + ) + (instance blk00000028 + (viewRef view_1 (cellRef FDR (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property INIT (string "1") (owner "Xilinx")) + ) + (instance blk00000029 + (viewRef view_1 (cellRef FDRE (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property INIT (string "0") (owner "Xilinx")) + ) + (instance blk0000002a + (viewRef view_1 (cellRef dpr_ram_1_blk0000002a (libraryRef hbdec3_lib))) + (property BUS_INFO (string "2:INPUT:ADDRA<1:0>") (owner "Xilinx")) + (property BUS_INFO (string "48:INPUT:DA_IN<47:0>") (owner "Xilinx")) + (property BUS_INFO (string "2:INPUT:ADDRB<1:0>") (owner "Xilinx")) + (property BUS_INFO (string "48:OUTPUT:DA_OUT<47:0>") (owner "Xilinx")) + (property BUS_INFO (string "48:OUTPUT:DB_OUT<47:0>") (owner "Xilinx")) + (property NLW_UNIQUE_ID (integer 0) (owner "Xilinx")) + (property NLW_MACRO_TAG (integer 2) (owner "Xilinx")) + (property NLW_MACRO_ALIAS (string "dpr_ram_1_blk0000002a") (owner "Xilinx")) + ) + (instance blk0000008d + (viewRef view_1 (cellRef FDSE (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property OPTIMIZE_PRIMITIVES_NGC (string "no") (owner "Xilinx")) + (property INIT (string "1") (owner "Xilinx")) + ) + (instance blk0000008e + (viewRef view_1 (cellRef FDRE (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property OPTIMIZE_PRIMITIVES_NGC (string "no") (owner "Xilinx")) + (property INIT (string "0") (owner "Xilinx")) + ) + (instance blk0000008f + (viewRef view_1 (cellRef MUXCY_D (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property OPTIMIZE_PRIMITIVES_NGC (string "no") (owner "Xilinx")) + ) + (instance blk00000090 + (viewRef view_1 (cellRef MUXCY_D (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property OPTIMIZE_PRIMITIVES_NGC (string "no") (owner "Xilinx")) + ) + (instance blk00000091 + (viewRef view_1 (cellRef XORCY (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property OPTIMIZE_PRIMITIVES_NGC (string "no") (owner "Xilinx")) + ) + (instance blk00000092 + (viewRef view_1 (cellRef MUXCY_D (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property OPTIMIZE_PRIMITIVES_NGC (string "no") (owner "Xilinx")) + ) + (instance blk00000093 + (viewRef view_1 (cellRef MUXCY_D (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property OPTIMIZE_PRIMITIVES_NGC (string "no") (owner "Xilinx")) + ) + (instance blk00000094 + (viewRef view_1 (cellRef MUXCY_D (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property OPTIMIZE_PRIMITIVES_NGC (string "no") (owner "Xilinx")) + ) + (instance blk00000095 + (viewRef view_1 (cellRef MUXCY_D (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property OPTIMIZE_PRIMITIVES_NGC (string "no") (owner "Xilinx")) + ) + (instance blk00000096 + (viewRef view_1 (cellRef MUXCY_D (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property OPTIMIZE_PRIMITIVES_NGC (string "no") (owner "Xilinx")) + ) + (instance blk00000097 + (viewRef view_1 (cellRef MUXCY_D (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property OPTIMIZE_PRIMITIVES_NGC (string "no") (owner "Xilinx")) + ) + (instance blk00000098 + (viewRef view_1 (cellRef FDRE (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property INIT (string "0") (owner "Xilinx")) + ) + (instance blk00000099 + (viewRef view_1 (cellRef FDRE (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property INIT (string "0") (owner "Xilinx")) + ) + (instance blk0000009a + (viewRef view_1 (cellRef FDRE (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property OPTIMIZE_PRIMITIVES_NGC (string "no") (owner "Xilinx")) + (property INIT (string "0") (owner "Xilinx")) + ) + (instance blk0000009b + (viewRef view_1 (cellRef FDRE (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property OPTIMIZE_PRIMITIVES_NGC (string "no") (owner "Xilinx")) + (property INIT (string "0") (owner "Xilinx")) + ) + (instance blk0000009c + (viewRef view_1 (cellRef FDRE (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property INIT (string "0") (owner "Xilinx")) + ) + (instance blk0000009d + (viewRef view_1 (cellRef FDRE (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property OPTIMIZE_PRIMITIVES_NGC (string "no") (owner "Xilinx")) + (property INIT (string "0") (owner "Xilinx")) + ) + (instance blk0000009e + (viewRef view_1 (cellRef FDRE (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property OPTIMIZE_PRIMITIVES_NGC (string "no") (owner "Xilinx")) + (property INIT (string "0") (owner "Xilinx")) + ) + (instance blk0000009f + (viewRef view_1 (cellRef FDRE (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property OPTIMIZE_PRIMITIVES_NGC (string "no") (owner "Xilinx")) + (property INIT (string "0") (owner "Xilinx")) + ) + (instance blk000000a0 + (viewRef view_1 (cellRef FDRE (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property OPTIMIZE_PRIMITIVES_NGC (string "no") (owner "Xilinx")) + (property INIT (string "0") (owner "Xilinx")) + ) + (instance blk000000a1 + (viewRef view_1 (cellRef FDE (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property INIT (string "0") (owner "Xilinx")) + ) + (instance blk000000a2 + (viewRef view_1 (cellRef FDE (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property INIT (string "0") (owner "Xilinx")) + ) + (instance blk000000a3 + (viewRef view_1 (cellRef FDE (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property INIT (string "0") (owner "Xilinx")) + ) + (instance blk000000a4 + (viewRef view_1 (cellRef FDE (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property INIT (string "0") (owner "Xilinx")) + ) + (instance blk000000a5 + (viewRef view_1 (cellRef FDE (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property INIT (string "0") (owner "Xilinx")) + ) + (instance blk000000a6 + (viewRef view_1 (cellRef FDE (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property INIT (string "0") (owner "Xilinx")) + ) + (instance blk000000a7 + (viewRef view_1 (cellRef FDE (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property INIT (string "0") (owner "Xilinx")) + ) + (instance blk000000a8 + (viewRef view_1 (cellRef FDE (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property INIT (string "0") (owner "Xilinx")) + ) + (instance blk000000a9 + (viewRef view_1 (cellRef FDE (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property INIT (string "0") (owner "Xilinx")) + ) + (instance blk000000aa + (viewRef view_1 (cellRef FDE (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property INIT (string "0") (owner "Xilinx")) + ) + (instance blk000000ab + (viewRef view_1 (cellRef FDE (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property INIT (string "0") (owner "Xilinx")) + ) + (instance blk000000ac + (viewRef view_1 (cellRef FDE (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property INIT (string "0") (owner "Xilinx")) + ) + (instance blk000000ad + (viewRef view_1 (cellRef FDE (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property INIT (string "0") (owner "Xilinx")) + ) + (instance blk000000ae + (viewRef view_1 (cellRef FDE (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property INIT (string "0") (owner "Xilinx")) + ) + (instance blk000000af + (viewRef view_1 (cellRef FDE (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property INIT (string "0") (owner "Xilinx")) + ) + (instance blk000000b0 + (viewRef view_1 (cellRef XORCY (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property OPTIMIZE_PRIMITIVES_NGC (string "no") (owner "Xilinx")) + ) + (instance blk000000b1 + (viewRef view_1 (cellRef XORCY (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property OPTIMIZE_PRIMITIVES_NGC (string "no") (owner "Xilinx")) + ) + (instance blk000000b2 + (viewRef view_1 (cellRef MUXCY_D (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property OPTIMIZE_PRIMITIVES_NGC (string "no") (owner "Xilinx")) + ) + (instance blk000000b3 + (viewRef view_1 (cellRef MUXCY_L (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property OPTIMIZE_PRIMITIVES_NGC (string "no") (owner "Xilinx")) + ) + (instance blk000000b4 + (viewRef view_1 (cellRef XORCY (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property OPTIMIZE_PRIMITIVES_NGC (string "no") (owner "Xilinx")) + ) + (instance blk000000b5 + (viewRef view_1 (cellRef MUXCY_L (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property OPTIMIZE_PRIMITIVES_NGC (string "no") (owner "Xilinx")) + ) + (instance blk000000b6 + (viewRef view_1 (cellRef XORCY (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property OPTIMIZE_PRIMITIVES_NGC (string "no") (owner "Xilinx")) + ) + (instance blk000000b7 + (viewRef view_1 (cellRef XORCY (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property OPTIMIZE_PRIMITIVES_NGC (string "no") (owner "Xilinx")) + ) + (instance blk000000b8 + (viewRef view_1 (cellRef MUXCY_D (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property OPTIMIZE_PRIMITIVES_NGC (string "no") (owner "Xilinx")) + ) + (instance blk000000b9 + (viewRef view_1 (cellRef MUXCY_L (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property OPTIMIZE_PRIMITIVES_NGC (string "no") (owner "Xilinx")) + ) + (instance blk000000ba + (viewRef view_1 (cellRef XORCY (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property OPTIMIZE_PRIMITIVES_NGC (string "no") (owner "Xilinx")) + ) + (instance blk000000bb + (viewRef view_1 (cellRef MUXCY_L (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property OPTIMIZE_PRIMITIVES_NGC (string "no") (owner "Xilinx")) + ) + (instance blk000000bc + (viewRef view_1 (cellRef XORCY (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property OPTIMIZE_PRIMITIVES_NGC (string "no") (owner "Xilinx")) + ) + (instance blk000000bd + (viewRef view_1 (cellRef MUXCY_D (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property OPTIMIZE_PRIMITIVES_NGC (string "no") (owner "Xilinx")) + ) + (instance blk000000be + (viewRef view_1 (cellRef MUXCY (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property OPTIMIZE_PRIMITIVES_NGC (string "no") (owner "Xilinx")) + ) + (instance blk000000bf + (viewRef view_1 (cellRef MUXCY_L (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property OPTIMIZE_PRIMITIVES_NGC (string "no") (owner "Xilinx")) + ) + (instance blk000000c0 + (viewRef view_1 (cellRef XORCY (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property OPTIMIZE_PRIMITIVES_NGC (string "no") (owner "Xilinx")) + ) + (instance blk000000c1 + (viewRef view_1 (cellRef MUXCY_L (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property OPTIMIZE_PRIMITIVES_NGC (string "no") (owner "Xilinx")) + ) + (instance blk000000c2 + (viewRef view_1 (cellRef MUXCY_D (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property OPTIMIZE_PRIMITIVES_NGC (string "no") (owner "Xilinx")) + ) + (instance blk000000c3 + (viewRef view_1 (cellRef XORCY (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property OPTIMIZE_PRIMITIVES_NGC (string "no") (owner "Xilinx")) + ) + (instance blk000000c4 + (viewRef view_1 (cellRef XORCY (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property OPTIMIZE_PRIMITIVES_NGC (string "no") (owner "Xilinx")) + ) + (instance blk000000c5 + (viewRef view_1 (cellRef FDRE (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property INIT (string "0") (owner "Xilinx")) + ) + (instance blk000000c6 + (viewRef view_1 (cellRef FDRE (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property INIT (string "0") (owner "Xilinx")) + ) + (instance blk000000c7 + (viewRef view_1 (cellRef FDE (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + ) + (instance blk000000c8 + (viewRef view_1 (cellRef XORCY (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property OPTIMIZE_PRIMITIVES_NGC (string "no") (owner "Xilinx")) + ) + (instance blk000000c9 + (viewRef view_1 (cellRef MUXCY_D (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property OPTIMIZE_PRIMITIVES_NGC (string "no") (owner "Xilinx")) + ) + (instance blk000000ca + (viewRef view_1 (cellRef MUXCY_D (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property OPTIMIZE_PRIMITIVES_NGC (string "no") (owner "Xilinx")) + ) + (instance blk000000cb + (viewRef view_1 (cellRef MUXCY_D (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property OPTIMIZE_PRIMITIVES_NGC (string "no") (owner "Xilinx")) + ) + (instance blk000000cc + (viewRef view_1 (cellRef MUXCY_D (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property OPTIMIZE_PRIMITIVES_NGC (string "no") (owner "Xilinx")) + ) + (instance blk000000cd + (viewRef view_1 (cellRef MUXCY_D (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property OPTIMIZE_PRIMITIVES_NGC (string "no") (owner "Xilinx")) + ) + (instance blk000000ce + (viewRef view_1 (cellRef MUXCY_D (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property OPTIMIZE_PRIMITIVES_NGC (string "no") (owner "Xilinx")) + ) + (instance blk000000cf + (viewRef view_1 (cellRef MUXCY_D (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property OPTIMIZE_PRIMITIVES_NGC (string "no") (owner "Xilinx")) + ) + (instance blk000000d0 + (viewRef view_1 (cellRef FDRE (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property OPTIMIZE_PRIMITIVES_NGC (string "no") (owner "Xilinx")) + (property INIT (string "0") (owner "Xilinx")) + ) + (instance blk000000d1 + (viewRef view_1 (cellRef FDSE (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property OPTIMIZE_PRIMITIVES_NGC (string "no") (owner "Xilinx")) + (property INIT (string "1") (owner "Xilinx")) + ) + (instance blk000000d2 + (viewRef view_1 (cellRef XORCY (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property OPTIMIZE_PRIMITIVES_NGC (string "no") (owner "Xilinx")) + ) + (instance blk000000d3 + (viewRef view_1 (cellRef MUXCY_D (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property OPTIMIZE_PRIMITIVES_NGC (string "no") (owner "Xilinx")) + ) + (instance blk000000d4 + (viewRef view_1 (cellRef MUXCY_D (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property OPTIMIZE_PRIMITIVES_NGC (string "no") (owner "Xilinx")) + ) + (instance blk000000d5 + (viewRef view_1 (cellRef MUXCY_D (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property OPTIMIZE_PRIMITIVES_NGC (string "no") (owner "Xilinx")) + ) + (instance blk000000d6 + (viewRef view_1 (cellRef MUXCY_D (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property OPTIMIZE_PRIMITIVES_NGC (string "no") (owner "Xilinx")) + ) + (instance blk000000d7 + (viewRef view_1 (cellRef MUXCY_D (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property OPTIMIZE_PRIMITIVES_NGC (string "no") (owner "Xilinx")) + ) + (instance blk000000d8 + (viewRef view_1 (cellRef MUXCY_D (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property OPTIMIZE_PRIMITIVES_NGC (string "no") (owner "Xilinx")) + ) + (instance blk000000d9 + (viewRef view_1 (cellRef FDRE (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property OPTIMIZE_PRIMITIVES_NGC (string "no") (owner "Xilinx")) + (property INIT (string "0") (owner "Xilinx")) + ) + (instance blk000000da + (viewRef view_1 (cellRef FDSE (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property OPTIMIZE_PRIMITIVES_NGC (string "no") (owner "Xilinx")) + (property INIT (string "1") (owner "Xilinx")) + ) + (instance blk000000db + (viewRef view_1 (cellRef XORCY (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property OPTIMIZE_PRIMITIVES_NGC (string "no") (owner "Xilinx")) + ) + (instance blk000000dc + (viewRef view_1 (cellRef XORCY (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property OPTIMIZE_PRIMITIVES_NGC (string "no") (owner "Xilinx")) + ) + (instance blk000000dd + (viewRef view_1 (cellRef MUXCY_D (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property OPTIMIZE_PRIMITIVES_NGC (string "no") (owner "Xilinx")) + ) + (instance blk000000de + (viewRef view_1 (cellRef MUXCY_L (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property OPTIMIZE_PRIMITIVES_NGC (string "no") (owner "Xilinx")) + ) + (instance blk000000df + (viewRef view_1 (cellRef FDRE (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property OPTIMIZE_PRIMITIVES_NGC (string "no") (owner "Xilinx")) + (property INIT (string "0") (owner "Xilinx")) + ) + (instance blk000000e0 + (viewRef view_1 (cellRef MUXCY_D (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property OPTIMIZE_PRIMITIVES_NGC (string "no") (owner "Xilinx")) + ) + (instance blk000000e1 + (viewRef view_1 (cellRef MUXCY_D (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property OPTIMIZE_PRIMITIVES_NGC (string "no") (owner "Xilinx")) + ) + (instance blk000000e2 + (viewRef view_1 (cellRef MUXCY_D (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property OPTIMIZE_PRIMITIVES_NGC (string "no") (owner "Xilinx")) + ) + (instance blk000000e3 + (viewRef view_1 (cellRef FDRE (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property INIT (string "0") (owner "Xilinx")) + ) + (instance blk000000e4 + (viewRef view_1 (cellRef XORCY (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property OPTIMIZE_PRIMITIVES_NGC (string "no") (owner "Xilinx")) + ) + (instance blk000000e5 + (viewRef view_1 (cellRef XORCY (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property OPTIMIZE_PRIMITIVES_NGC (string "no") (owner "Xilinx")) + ) + (instance blk000000e6 + (viewRef view_1 (cellRef MUXCY (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property OPTIMIZE_PRIMITIVES_NGC (string "no") (owner "Xilinx")) + ) + (instance blk000000e7 + (viewRef view_1 (cellRef MUXCY_D (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property OPTIMIZE_PRIMITIVES_NGC (string "no") (owner "Xilinx")) + ) + (instance blk000000e8 + (viewRef view_1 (cellRef MUXCY_L (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property OPTIMIZE_PRIMITIVES_NGC (string "no") (owner "Xilinx")) + ) + (instance blk000000e9 + (viewRef view_1 (cellRef XORCY (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property OPTIMIZE_PRIMITIVES_NGC (string "no") (owner "Xilinx")) + ) + (instance blk000000ea + (viewRef view_1 (cellRef XORCY (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property OPTIMIZE_PRIMITIVES_NGC (string "no") (owner "Xilinx")) + ) + (instance blk000000eb + (viewRef view_1 (cellRef MUXCY_D (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property OPTIMIZE_PRIMITIVES_NGC (string "no") (owner "Xilinx")) + ) + (instance blk000000ec + (viewRef view_1 (cellRef MUXCY_L (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property OPTIMIZE_PRIMITIVES_NGC (string "no") (owner "Xilinx")) + ) + (instance blk000000ed + (viewRef view_1 (cellRef FDE (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + ) + (instance blk000000ee + (viewRef view_1 (cellRef XORCY (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property OPTIMIZE_PRIMITIVES_NGC (string "no") (owner "Xilinx")) + ) + (instance blk000000ef + (viewRef view_1 (cellRef XORCY (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property OPTIMIZE_PRIMITIVES_NGC (string "no") (owner "Xilinx")) + ) + (instance blk000000f0 + (viewRef view_1 (cellRef XORCY (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property OPTIMIZE_PRIMITIVES_NGC (string "no") (owner "Xilinx")) + ) + (instance blk000000f1 + (viewRef view_1 (cellRef MUXCY (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property OPTIMIZE_PRIMITIVES_NGC (string "no") (owner "Xilinx")) + ) + (instance blk000000f2 + (viewRef view_1 (cellRef MUXCY_D (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property OPTIMIZE_PRIMITIVES_NGC (string "no") (owner "Xilinx")) + ) + (instance blk000000f3 + (viewRef view_1 (cellRef MUXCY_L (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property OPTIMIZE_PRIMITIVES_NGC (string "no") (owner "Xilinx")) + ) + (instance blk000000f4 + (viewRef view_1 (cellRef MUXCY_L (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property OPTIMIZE_PRIMITIVES_NGC (string "no") (owner "Xilinx")) + ) + (instance blk000000f5 + (viewRef view_1 (cellRef XORCY (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property OPTIMIZE_PRIMITIVES_NGC (string "no") (owner "Xilinx")) + ) + (instance blk000000f6 + (viewRef view_1 (cellRef XORCY (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property OPTIMIZE_PRIMITIVES_NGC (string "no") (owner "Xilinx")) + ) + (instance blk000000f7 + (viewRef view_1 (cellRef XORCY (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property OPTIMIZE_PRIMITIVES_NGC (string "no") (owner "Xilinx")) + ) + (instance blk000000f8 + (viewRef view_1 (cellRef MUXCY_D (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property OPTIMIZE_PRIMITIVES_NGC (string "no") (owner "Xilinx")) + ) + (instance blk000000f9 + (viewRef view_1 (cellRef MUXCY_L (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property OPTIMIZE_PRIMITIVES_NGC (string "no") (owner "Xilinx")) + ) + (instance blk000000fa + (viewRef view_1 (cellRef MUXCY_L (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property OPTIMIZE_PRIMITIVES_NGC (string "no") (owner "Xilinx")) + ) + (instance blk000000fb + (viewRef view_1 (cellRef MUXCY_L (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property OPTIMIZE_PRIMITIVES_NGC (string "no") (owner "Xilinx")) + ) + (instance blk000000fc + (viewRef view_1 (cellRef XORCY (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property OPTIMIZE_PRIMITIVES_NGC (string "no") (owner "Xilinx")) + ) + (instance blk000000fd + (viewRef view_1 (cellRef MUXCY_L (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property OPTIMIZE_PRIMITIVES_NGC (string "no") (owner "Xilinx")) + ) + (instance blk000000fe + (viewRef view_1 (cellRef MUXCY_D (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property OPTIMIZE_PRIMITIVES_NGC (string "no") (owner "Xilinx")) + ) + (instance blk000000ff + (viewRef view_1 (cellRef XORCY (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property OPTIMIZE_PRIMITIVES_NGC (string "no") (owner "Xilinx")) + ) + (instance blk00000100 + (viewRef view_1 (cellRef XORCY (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property OPTIMIZE_PRIMITIVES_NGC (string "no") (owner "Xilinx")) + ) + (instance blk00000101 + (viewRef view_1 (cellRef FDE (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property INIT (string "0") (owner "Xilinx")) + ) + (instance blk00000102 + (viewRef view_1 (cellRef FDE (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property INIT (string "0") (owner "Xilinx")) + ) + (instance blk00000103 + (viewRef view_1 (cellRef FDRE (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property INIT (string "0") (owner "Xilinx")) + ) + (instance blk00000104 + (viewRef view_1 (cellRef DSP48E1 (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property BUS_INFO (string "3:INPUT:CARRYINSEL<2:0>") (owner "Xilinx")) + (property BUS_INFO (string "4:OUTPUT:CARRYOUT<3:0>") (owner "Xilinx")) + (property BUS_INFO (string "4:INPUT:ALUMODE<3:0>") (owner "Xilinx")) + (property BUS_INFO (string "7:INPUT:OPMODE<6:0>") (owner "Xilinx")) + (property BUS_INFO (string "5:INPUT:INMODE<4:0>") (owner "Xilinx")) + (property BUS_INFO (string "30:OUTPUT:ACOUT<29:0>") (owner "Xilinx")) + (property BUS_INFO (string "18:OUTPUT:BCOUT<17:0>") (owner "Xilinx")) + (property BUS_INFO (string "48:OUTPUT:PCOUT<47:0>") (owner "Xilinx")) + (property BUS_INFO (string "48:INPUT:PCIN<47:0>") (owner "Xilinx")) + (property BUS_INFO (string "18:INPUT:BCIN<17:0>") (owner "Xilinx")) + (property BUS_INFO (string "30:INPUT:ACIN<29:0>") (owner "Xilinx")) + (property BUS_INFO (string "48:INPUT:C<47:0>") (owner "Xilinx")) + (property BUS_INFO (string "18:INPUT:B<17:0>") (owner "Xilinx")) + (property BUS_INFO (string "25:INPUT:D<24:0>") (owner "Xilinx")) + (property BUS_INFO (string "48:OUTPUT:P<47:0>") (owner "Xilinx")) + (property BUS_INFO (string "30:INPUT:A<29:0>") (owner "Xilinx")) + (property OPTIMIZE_PRIMITIVES_NGC (string "no") (owner "Xilinx")) + (property ACASCREG (integer 1) (owner "Xilinx")) + (property ADREG (integer 1) (owner "Xilinx")) + (property ALUMODEREG (integer 0) (owner "Xilinx")) + (property AREG (integer 1) (owner "Xilinx")) + (property AUTORESET_PATDET (string "NO_RESET") (owner "Xilinx")) + (property A_INPUT (string "DIRECT") (owner "Xilinx")) + (property BCASCREG (integer 1) (owner "Xilinx")) + (property BREG (integer 1) (owner "Xilinx")) + (property B_INPUT (string "DIRECT") (owner "Xilinx")) + (property CARRYINREG (integer 1) (owner "Xilinx")) + (property CARRYINSELREG (integer 1) (owner "Xilinx")) + (property CREG (integer 1) (owner "Xilinx")) + (property DREG (integer 1) (owner "Xilinx")) + (property INMODEREG (integer 1) (owner "Xilinx")) + (property MASK (string "FFFFFFFFFFFE") (owner "Xilinx")) + (property MREG (integer 1) (owner "Xilinx")) + (property OPMODEREG (integer 0) (owner "Xilinx")) + (property PATTERN (string "000000000000") (owner "Xilinx")) + (property PREG (integer 1) (owner "Xilinx")) + (property SEL_MASK (string "MASK") (owner "Xilinx")) + (property SEL_PATTERN (string "PATTERN") (owner "Xilinx")) + (property USE_DPORT (string "TRUE") (owner "Xilinx")) + (property USE_MULT (string "MULTIPLY") (owner "Xilinx")) + (property USE_PATTERN_DETECT (string "NO_PATDET") (owner "Xilinx")) + (property USE_SIMD (string "ONE48") (owner "Xilinx")) + ) + (instance blk00000105 + (viewRef view_1 (cellRef DSP48E1 (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property BUS_INFO (string "3:INPUT:CARRYINSEL<2:0>") (owner "Xilinx")) + (property BUS_INFO (string "4:OUTPUT:CARRYOUT<3:0>") (owner "Xilinx")) + (property BUS_INFO (string "4:INPUT:ALUMODE<3:0>") (owner "Xilinx")) + (property BUS_INFO (string "7:INPUT:OPMODE<6:0>") (owner "Xilinx")) + (property BUS_INFO (string "5:INPUT:INMODE<4:0>") (owner "Xilinx")) + (property BUS_INFO (string "30:OUTPUT:ACOUT<29:0>") (owner "Xilinx")) + (property BUS_INFO (string "18:OUTPUT:BCOUT<17:0>") (owner "Xilinx")) + (property BUS_INFO (string "48:OUTPUT:PCOUT<47:0>") (owner "Xilinx")) + (property BUS_INFO (string "48:INPUT:PCIN<47:0>") (owner "Xilinx")) + (property BUS_INFO (string "18:INPUT:BCIN<17:0>") (owner "Xilinx")) + (property BUS_INFO (string "30:INPUT:ACIN<29:0>") (owner "Xilinx")) + (property BUS_INFO (string "48:INPUT:C<47:0>") (owner "Xilinx")) + (property BUS_INFO (string "18:INPUT:B<17:0>") (owner "Xilinx")) + (property BUS_INFO (string "25:INPUT:D<24:0>") (owner "Xilinx")) + (property BUS_INFO (string "48:OUTPUT:P<47:0>") (owner "Xilinx")) + (property BUS_INFO (string "30:INPUT:A<29:0>") (owner "Xilinx")) + (property OPTIMIZE_PRIMITIVES_NGC (string "no") (owner "Xilinx")) + (property ACASCREG (integer 1) (owner "Xilinx")) + (property ADREG (integer 1) (owner "Xilinx")) + (property ALUMODEREG (integer 0) (owner "Xilinx")) + (property AREG (integer 1) (owner "Xilinx")) + (property AUTORESET_PATDET (string "NO_RESET") (owner "Xilinx")) + (property A_INPUT (string "DIRECT") (owner "Xilinx")) + (property BCASCREG (integer 1) (owner "Xilinx")) + (property BREG (integer 1) (owner "Xilinx")) + (property B_INPUT (string "DIRECT") (owner "Xilinx")) + (property CARRYINREG (integer 1) (owner "Xilinx")) + (property CARRYINSELREG (integer 1) (owner "Xilinx")) + (property CREG (integer 1) (owner "Xilinx")) + (property DREG (integer 1) (owner "Xilinx")) + (property INMODEREG (integer 1) (owner "Xilinx")) + (property MASK (string "FFFFFFFFFFFE") (owner "Xilinx")) + (property MREG (integer 1) (owner "Xilinx")) + (property OPMODEREG (integer 0) (owner "Xilinx")) + (property PATTERN (string "000000000000") (owner "Xilinx")) + (property PREG (integer 1) (owner "Xilinx")) + (property SEL_MASK (string "MASK") (owner "Xilinx")) + (property SEL_PATTERN (string "PATTERN") (owner "Xilinx")) + (property USE_DPORT (string "TRUE") (owner "Xilinx")) + (property USE_MULT (string "MULTIPLY") (owner "Xilinx")) + (property USE_PATTERN_DETECT (string "NO_PATDET") (owner "Xilinx")) + (property USE_SIMD (string "ONE48") (owner "Xilinx")) + ) + (instance blk00000106 + (viewRef view_1 (cellRef DSP48E1 (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property BUS_INFO (string "3:INPUT:CARRYINSEL<2:0>") (owner "Xilinx")) + (property BUS_INFO (string "4:OUTPUT:CARRYOUT<3:0>") (owner "Xilinx")) + (property BUS_INFO (string "4:INPUT:ALUMODE<3:0>") (owner "Xilinx")) + (property BUS_INFO (string "7:INPUT:OPMODE<6:0>") (owner "Xilinx")) + (property BUS_INFO (string "5:INPUT:INMODE<4:0>") (owner "Xilinx")) + (property BUS_INFO (string "30:OUTPUT:ACOUT<29:0>") (owner "Xilinx")) + (property BUS_INFO (string "18:OUTPUT:BCOUT<17:0>") (owner "Xilinx")) + (property BUS_INFO (string "48:OUTPUT:PCOUT<47:0>") (owner "Xilinx")) + (property BUS_INFO (string "48:INPUT:PCIN<47:0>") (owner "Xilinx")) + (property BUS_INFO (string "18:INPUT:BCIN<17:0>") (owner "Xilinx")) + (property BUS_INFO (string "30:INPUT:ACIN<29:0>") (owner "Xilinx")) + (property BUS_INFO (string "48:INPUT:C<47:0>") (owner "Xilinx")) + (property BUS_INFO (string "18:INPUT:B<17:0>") (owner "Xilinx")) + (property BUS_INFO (string "25:INPUT:D<24:0>") (owner "Xilinx")) + (property BUS_INFO (string "48:OUTPUT:P<47:0>") (owner "Xilinx")) + (property BUS_INFO (string "30:INPUT:A<29:0>") (owner "Xilinx")) + (property OPTIMIZE_PRIMITIVES_NGC (string "no") (owner "Xilinx")) + (property ACASCREG (integer 1) (owner "Xilinx")) + (property ADREG (integer 1) (owner "Xilinx")) + (property ALUMODEREG (integer 0) (owner "Xilinx")) + (property AREG (integer 1) (owner "Xilinx")) + (property AUTORESET_PATDET (string "NO_RESET") (owner "Xilinx")) + (property A_INPUT (string "DIRECT") (owner "Xilinx")) + (property BCASCREG (integer 1) (owner "Xilinx")) + (property BREG (integer 1) (owner "Xilinx")) + (property B_INPUT (string "DIRECT") (owner "Xilinx")) + (property CARRYINREG (integer 1) (owner "Xilinx")) + (property CARRYINSELREG (integer 1) (owner "Xilinx")) + (property CREG (integer 1) (owner "Xilinx")) + (property DREG (integer 1) (owner "Xilinx")) + (property INMODEREG (integer 1) (owner "Xilinx")) + (property MASK (string "FFFFFFFFFFFE") (owner "Xilinx")) + (property MREG (integer 1) (owner "Xilinx")) + (property OPMODEREG (integer 0) (owner "Xilinx")) + (property PATTERN (string "000000000000") (owner "Xilinx")) + (property PREG (integer 1) (owner "Xilinx")) + (property SEL_MASK (string "MASK") (owner "Xilinx")) + (property SEL_PATTERN (string "PATTERN") (owner "Xilinx")) + (property USE_DPORT (string "TRUE") (owner "Xilinx")) + (property USE_MULT (string "MULTIPLY") (owner "Xilinx")) + (property USE_PATTERN_DETECT (string "NO_PATDET") (owner "Xilinx")) + (property USE_SIMD (string "ONE48") (owner "Xilinx")) + ) + (instance blk00000107 + (viewRef view_1 (cellRef DSP48E1 (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property BUS_INFO (string "3:INPUT:CARRYINSEL<2:0>") (owner "Xilinx")) + (property BUS_INFO (string "4:OUTPUT:CARRYOUT<3:0>") (owner "Xilinx")) + (property BUS_INFO (string "4:INPUT:ALUMODE<3:0>") (owner "Xilinx")) + (property BUS_INFO (string "7:INPUT:OPMODE<6:0>") (owner "Xilinx")) + (property BUS_INFO (string "5:INPUT:INMODE<4:0>") (owner "Xilinx")) + (property BUS_INFO (string "30:OUTPUT:ACOUT<29:0>") (owner "Xilinx")) + (property BUS_INFO (string "18:OUTPUT:BCOUT<17:0>") (owner "Xilinx")) + (property BUS_INFO (string "48:OUTPUT:PCOUT<47:0>") (owner "Xilinx")) + (property BUS_INFO (string "48:INPUT:PCIN<47:0>") (owner "Xilinx")) + (property BUS_INFO (string "18:INPUT:BCIN<17:0>") (owner "Xilinx")) + (property BUS_INFO (string "30:INPUT:ACIN<29:0>") (owner "Xilinx")) + (property BUS_INFO (string "48:INPUT:C<47:0>") (owner "Xilinx")) + (property BUS_INFO (string "18:INPUT:B<17:0>") (owner "Xilinx")) + (property BUS_INFO (string "25:INPUT:D<24:0>") (owner "Xilinx")) + (property BUS_INFO (string "48:OUTPUT:P<47:0>") (owner "Xilinx")) + (property BUS_INFO (string "30:INPUT:A<29:0>") (owner "Xilinx")) + (property OPTIMIZE_PRIMITIVES_NGC (string "no") (owner "Xilinx")) + (property ACASCREG (integer 1) (owner "Xilinx")) + (property ADREG (integer 1) (owner "Xilinx")) + (property ALUMODEREG (integer 0) (owner "Xilinx")) + (property AREG (integer 1) (owner "Xilinx")) + (property AUTORESET_PATDET (string "NO_RESET") (owner "Xilinx")) + (property A_INPUT (string "DIRECT") (owner "Xilinx")) + (property BCASCREG (integer 1) (owner "Xilinx")) + (property BREG (integer 1) (owner "Xilinx")) + (property B_INPUT (string "DIRECT") (owner "Xilinx")) + (property CARRYINREG (integer 1) (owner "Xilinx")) + (property CARRYINSELREG (integer 1) (owner "Xilinx")) + (property CREG (integer 1) (owner "Xilinx")) + (property DREG (integer 1) (owner "Xilinx")) + (property INMODEREG (integer 1) (owner "Xilinx")) + (property MASK (string "FFFFFFFFFFFE") (owner "Xilinx")) + (property MREG (integer 1) (owner "Xilinx")) + (property OPMODEREG (integer 0) (owner "Xilinx")) + (property PATTERN (string "000000000000") (owner "Xilinx")) + (property PREG (integer 1) (owner "Xilinx")) + (property SEL_MASK (string "MASK") (owner "Xilinx")) + (property SEL_PATTERN (string "PATTERN") (owner "Xilinx")) + (property USE_DPORT (string "TRUE") (owner "Xilinx")) + (property USE_MULT (string "MULTIPLY") (owner "Xilinx")) + (property USE_PATTERN_DETECT (string "NO_PATDET") (owner "Xilinx")) + (property USE_SIMD (string "ONE48") (owner "Xilinx")) + ) + (instance blk00000108 + (viewRef view_1 (cellRef FDRE (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property INIT (string "0") (owner "Xilinx")) + ) + (instance blk00000109 + (viewRef view_1 (cellRef FDRE (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property INIT (string "0") (owner "Xilinx")) + ) + (instance blk0000010a + (viewRef view_1 (cellRef FDRE (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property INIT (string "0") (owner "Xilinx")) + ) + (instance blk0000010b + (viewRef view_1 (cellRef FDRE (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property INIT (string "0") (owner "Xilinx")) + ) + (instance blk0000010c + (viewRef view_1 (cellRef FDRE (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property INIT (string "0") (owner "Xilinx")) + ) + (instance blk0000010d + (viewRef view_1 (cellRef FDRE (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property INIT (string "0") (owner "Xilinx")) + ) + (instance blk0000010e + (viewRef view_1 (cellRef FDRE (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property INIT (string "0") (owner "Xilinx")) + ) + (instance blk0000010f + (viewRef view_1 (cellRef FDRE (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property INIT (string "0") (owner "Xilinx")) + ) + (instance blk00000110 + (viewRef view_1 (cellRef FDRE (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property INIT (string "0") (owner "Xilinx")) + ) + (instance blk00000111 + (viewRef view_1 (cellRef FDRE (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property INIT (string "0") (owner "Xilinx")) + ) + (instance blk00000112 + (viewRef view_1 (cellRef FDRE (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property INIT (string "0") (owner "Xilinx")) + ) + (instance blk00000113 + (viewRef view_1 (cellRef FDRE (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property INIT (string "0") (owner "Xilinx")) + ) + (instance blk00000114 + (viewRef view_1 (cellRef FDRE (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property INIT (string "0") (owner "Xilinx")) + ) + (instance blk00000115 + (viewRef view_1 (cellRef FDRE (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property INIT (string "0") (owner "Xilinx")) + ) + (instance blk00000116 + (viewRef view_1 (cellRef FDRE (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property INIT (string "0") (owner "Xilinx")) + ) + (instance blk00000117 + (viewRef view_1 (cellRef FDRE (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property INIT (string "0") (owner "Xilinx")) + ) + (instance blk00000118 + (viewRef view_1 (cellRef FDRE (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property INIT (string "0") (owner "Xilinx")) + ) + (instance blk00000119 + (viewRef view_1 (cellRef sp_ram_blk00000119 (libraryRef hbdec3_lib))) + (property BUS_INFO (string "3:INPUT:ADDR<2:0>") (owner "Xilinx")) + (property BUS_INFO (string "24:INPUT:DATA_IN<23:0>") (owner "Xilinx")) + (property BUS_INFO (string "24:OUTPUT:DATA_OUT<23:0>") (owner "Xilinx")) + (property NLW_UNIQUE_ID (integer 0) (owner "Xilinx")) + (property NLW_MACRO_TAG (integer 3) (owner "Xilinx")) + (property NLW_MACRO_ALIAS (string "sp_ram_blk00000119") (owner "Xilinx")) + ) + (instance blk0000014c + (viewRef view_1 (cellRef sp_ram_NO1_blk0000014c (libraryRef hbdec3_lib))) + (property BUS_INFO (string "3:INPUT:ADDR<2:0>") (owner "Xilinx")) + (property BUS_INFO (string "24:INPUT:DATA_IN<23:0>") (owner "Xilinx")) + (property BUS_INFO (string "24:OUTPUT:DATA_OUT<23:0>") (owner "Xilinx")) + (property NLW_UNIQUE_ID (integer 1) (owner "Xilinx")) + (property NLW_MACRO_TAG (integer 4) (owner "Xilinx")) + (property NLW_MACRO_ALIAS (string "sp_ram_NO1_blk0000014c") (owner "Xilinx")) + ) + (instance blk0000017f + (viewRef view_1 (cellRef sp_ram_NO2_blk0000017f (libraryRef hbdec3_lib))) + (property BUS_INFO (string "3:INPUT:ADDR<2:0>") (owner "Xilinx")) + (property BUS_INFO (string "24:INPUT:DATA_IN<23:0>") (owner "Xilinx")) + (property BUS_INFO (string "24:OUTPUT:DATA_OUT<23:0>") (owner "Xilinx")) + (property NLW_UNIQUE_ID (integer 2) (owner "Xilinx")) + (property NLW_MACRO_TAG (integer 5) (owner "Xilinx")) + (property NLW_MACRO_ALIAS (string "sp_ram_NO2_blk0000017f") (owner "Xilinx")) + ) + (instance blk000001b2 + (viewRef view_1 (cellRef sp_ram_NO3_blk000001b2 (libraryRef hbdec3_lib))) + (property BUS_INFO (string "3:INPUT:ADDR<2:0>") (owner "Xilinx")) + (property BUS_INFO (string "24:INPUT:DATA_IN<23:0>") (owner "Xilinx")) + (property BUS_INFO (string "24:OUTPUT:DATA_OUT<23:0>") (owner "Xilinx")) + (property NLW_UNIQUE_ID (integer 3) (owner "Xilinx")) + (property NLW_MACRO_TAG (integer 6) (owner "Xilinx")) + (property NLW_MACRO_ALIAS (string "sp_ram_NO3_blk000001b2") (owner "Xilinx")) + ) + (instance blk000001e5 + (viewRef view_1 (cellRef sp_ram_NO4_blk000001e5 (libraryRef hbdec3_lib))) + (property BUS_INFO (string "3:INPUT:ADDR<2:0>") (owner "Xilinx")) + (property BUS_INFO (string "24:INPUT:DATA_IN<23:0>") (owner "Xilinx")) + (property BUS_INFO (string "24:OUTPUT:DATA_OUT<23:0>") (owner "Xilinx")) + (property NLW_UNIQUE_ID (integer 4) (owner "Xilinx")) + (property NLW_MACRO_TAG (integer 7) (owner "Xilinx")) + (property NLW_MACRO_ALIAS (string "sp_ram_NO4_blk000001e5") (owner "Xilinx")) + ) + (instance blk00000218 + (viewRef view_1 (cellRef sp_ram_NO5_blk00000218 (libraryRef hbdec3_lib))) + (property BUS_INFO (string "3:INPUT:ADDR<2:0>") (owner "Xilinx")) + (property BUS_INFO (string "24:INPUT:DATA_IN<23:0>") (owner "Xilinx")) + (property BUS_INFO (string "24:OUTPUT:DATA_OUT<23:0>") (owner "Xilinx")) + (property NLW_UNIQUE_ID (integer 5) (owner "Xilinx")) + (property NLW_MACRO_TAG (integer 8) (owner "Xilinx")) + (property NLW_MACRO_ALIAS (string "sp_ram_NO5_blk00000218") (owner "Xilinx")) + ) + (instance blk0000024b + (viewRef view_1 (cellRef sp_ram_NO6_blk0000024b (libraryRef hbdec3_lib))) + (property BUS_INFO (string "3:INPUT:ADDR<2:0>") (owner "Xilinx")) + (property BUS_INFO (string "24:INPUT:DATA_IN<23:0>") (owner "Xilinx")) + (property BUS_INFO (string "24:OUTPUT:DATA_OUT<23:0>") (owner "Xilinx")) + (property NLW_UNIQUE_ID (integer 6) (owner "Xilinx")) + (property NLW_MACRO_TAG (integer 9) (owner "Xilinx")) + (property NLW_MACRO_ALIAS (string "sp_ram_NO6_blk0000024b") (owner "Xilinx")) + ) + (instance blk0000027e + (viewRef view_1 (cellRef sp_ram_NO7_blk0000027e (libraryRef hbdec3_lib))) + (property BUS_INFO (string "3:INPUT:ADDR<2:0>") (owner "Xilinx")) + (property BUS_INFO (string "24:INPUT:DATA_IN<23:0>") (owner "Xilinx")) + (property BUS_INFO (string "24:OUTPUT:DATA_OUT<23:0>") (owner "Xilinx")) + (property NLW_UNIQUE_ID (integer 7) (owner "Xilinx")) + (property NLW_MACRO_TAG (integer 10) (owner "Xilinx")) + (property NLW_MACRO_ALIAS (string "sp_ram_NO7_blk0000027e") (owner "Xilinx")) + ) + (instance blk000002b1 + (viewRef view_1 (cellRef dpr_ram_2_blk000002b1 (libraryRef hbdec3_lib))) + (property BUS_INFO (string "4:INPUT:ADDRA<3:0>") (owner "Xilinx")) + (property BUS_INFO (string "18:INPUT:DA_IN<17:0>") (owner "Xilinx")) + (property BUS_INFO (string "4:INPUT:ADDRB<3:0>") (owner "Xilinx")) + (property BUS_INFO (string "18:OUTPUT:DA_OUT<17:0>") (owner "Xilinx")) + (property BUS_INFO (string "18:OUTPUT:DB_OUT<17:0>") (owner "Xilinx")) + (property NLW_UNIQUE_ID (integer 0) (owner "Xilinx")) + (property NLW_MACRO_TAG (integer 11) (owner "Xilinx")) + (property NLW_MACRO_ALIAS (string "dpr_ram_2_blk000002b1") (owner "Xilinx")) + ) + (instance blk000002ea + (viewRef view_1 (cellRef dpr_ram_3_blk000002ea (libraryRef hbdec3_lib))) + (property BUS_INFO (string "4:INPUT:ADDRA<3:0>") (owner "Xilinx")) + (property BUS_INFO (string "18:INPUT:DA_IN<17:0>") (owner "Xilinx")) + (property BUS_INFO (string "4:INPUT:ADDRB<3:0>") (owner "Xilinx")) + (property BUS_INFO (string "18:OUTPUT:DA_OUT<17:0>") (owner "Xilinx")) + (property BUS_INFO (string "18:OUTPUT:DB_OUT<17:0>") (owner "Xilinx")) + (property NLW_UNIQUE_ID (integer 0) (owner "Xilinx")) + (property NLW_MACRO_TAG (integer 12) (owner "Xilinx")) + (property NLW_MACRO_ALIAS (string "dpr_ram_3_blk000002ea") (owner "Xilinx")) + ) + (instance blk00000311 + (viewRef view_1 (cellRef FDRE (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property INIT (string "0") (owner "Xilinx")) + ) + (instance blk00000312 + (viewRef view_1 (cellRef FDRE (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property INIT (string "0") (owner "Xilinx")) + ) + (instance blk00000313 + (viewRef view_1 (cellRef FDRE (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property INIT (string "0") (owner "Xilinx")) + ) + (instance blk00000314 + (viewRef view_1 (cellRef FDRE (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property INIT (string "0") (owner "Xilinx")) + ) + (instance blk00000315 + (viewRef view_1 (cellRef FDRE (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property INIT (string "0") (owner "Xilinx")) + ) + (instance blk00000316 + (viewRef view_1 (cellRef FDRE (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property INIT (string "0") (owner "Xilinx")) + ) + (instance blk00000317 + (viewRef view_1 (cellRef FDRE (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property INIT (string "0") (owner "Xilinx")) + ) + (instance blk00000318 + (viewRef view_1 (cellRef FDRE (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property INIT (string "0") (owner "Xilinx")) + ) + (instance blk00000319 + (viewRef view_1 (cellRef FDRE (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property INIT (string "0") (owner "Xilinx")) + ) + (instance blk0000031a + (viewRef view_1 (cellRef FDRE (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property INIT (string "0") (owner "Xilinx")) + ) + (instance blk0000031b + (viewRef view_1 (cellRef FDRE (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property INIT (string "0") (owner "Xilinx")) + ) + (instance blk0000031c + (viewRef view_1 (cellRef FDRE (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property INIT (string "0") (owner "Xilinx")) + ) + (instance blk0000031d + (viewRef view_1 (cellRef FDRE (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property INIT (string "0") (owner "Xilinx")) + ) + (instance blk0000031e + (viewRef view_1 (cellRef FDRE (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property INIT (string "0") (owner "Xilinx")) + ) + (instance blk0000031f + (viewRef view_1 (cellRef FDRE (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property INIT (string "0") (owner "Xilinx")) + ) + (instance blk00000320 + (viewRef view_1 (cellRef FDRE (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property INIT (string "0") (owner "Xilinx")) + ) + (instance blk00000321 + (viewRef view_1 (cellRef FDRE (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property INIT (string "0") (owner "Xilinx")) + ) + (instance blk00000322 + (viewRef view_1 (cellRef FDRE (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property INIT (string "0") (owner "Xilinx")) + ) + (instance blk00000323 + (viewRef view_1 (cellRef FDRE (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property INIT (string "0") (owner "Xilinx")) + ) + (instance blk00000324 + (viewRef view_1 (cellRef FDRE (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property INIT (string "0") (owner "Xilinx")) + ) + (instance blk00000325 + (viewRef view_1 (cellRef FDRE (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property INIT (string "0") (owner "Xilinx")) + ) + (instance blk00000326 + (viewRef view_1 (cellRef FDRE (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property INIT (string "0") (owner "Xilinx")) + ) + (instance blk00000327 + (viewRef view_1 (cellRef FDRE (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property INIT (string "0") (owner "Xilinx")) + ) + (instance blk00000328 + (viewRef view_1 (cellRef FDRE (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property INIT (string "0") (owner "Xilinx")) + ) + (instance blk00000329 + (viewRef view_1 (cellRef FDRE (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property INIT (string "0") (owner "Xilinx")) + ) + (instance blk0000032a + (viewRef view_1 (cellRef FDRE (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property INIT (string "0") (owner "Xilinx")) + ) + (instance blk0000032b + (viewRef view_1 (cellRef FDRE (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property INIT (string "0") (owner "Xilinx")) + ) + (instance blk0000032c + (viewRef view_1 (cellRef FDRE (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property INIT (string "0") (owner "Xilinx")) + ) + (instance blk0000032d + (viewRef view_1 (cellRef FDRE (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property INIT (string "0") (owner "Xilinx")) + ) + (instance blk0000032e + (viewRef view_1 (cellRef FDRE (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property INIT (string "0") (owner "Xilinx")) + ) + (instance blk0000032f + (viewRef view_1 (cellRef FDRE (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property INIT (string "0") (owner "Xilinx")) + ) + (instance blk00000330 + (viewRef view_1 (cellRef FDRE (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property INIT (string "0") (owner "Xilinx")) + ) + (instance blk00000331 + (viewRef view_1 (cellRef FDRE (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property INIT (string "0") (owner "Xilinx")) + ) + (instance blk00000332 + (viewRef view_1 (cellRef FDRE (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property INIT (string "0") (owner "Xilinx")) + ) + (instance blk00000333 + (viewRef view_1 (cellRef FDRE (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property INIT (string "0") (owner "Xilinx")) + ) + (instance blk00000334 + (viewRef view_1 (cellRef FDRE (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property INIT (string "0") (owner "Xilinx")) + ) + (instance blk00000335 + (viewRef view_1 (cellRef FDRE (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property INIT (string "0") (owner "Xilinx")) + ) + (instance blk00000336 + (viewRef view_1 (cellRef FDRE (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property INIT (string "0") (owner "Xilinx")) + ) + (instance blk00000337 + (viewRef view_1 (cellRef FDRE (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property INIT (string "0") (owner "Xilinx")) + ) + (instance blk00000338 + (viewRef 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(true)) (owner "Xilinx")) + (property INIT (string "0") (owner "Xilinx")) + ) + (instance blk0000033e + (viewRef view_1 (cellRef FDRE (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property INIT (string "0") (owner "Xilinx")) + ) + (instance blk0000033f + (viewRef view_1 (cellRef FDRE (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property INIT (string "0") (owner "Xilinx")) + ) + (instance blk00000340 + (viewRef view_1 (cellRef FDRE (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property INIT (string "0") (owner "Xilinx")) + ) + (instance blk00000341 + (viewRef view_1 (cellRef FDRE (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property INIT (string "0") (owner "Xilinx")) + ) + (instance blk00000342 + (viewRef view_1 (cellRef FDRE (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property INIT (string "0") (owner "Xilinx")) + ) + (instance blk00000343 + (viewRef view_1 (cellRef FDRE (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property INIT (string "0") (owner "Xilinx")) + ) + (instance blk00000344 + (viewRef view_1 (cellRef FDRE (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property INIT (string "0") (owner "Xilinx")) + ) + (instance blk00000345 + (viewRef view_1 (cellRef FDRE (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property INIT (string "0") (owner "Xilinx")) + ) + (instance blk00000346 + (viewRef view_1 (cellRef FDRE (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property INIT (string "0") (owner "Xilinx")) + ) + (instance blk00000347 + (viewRef view_1 (cellRef FDRE (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property INIT (string "0") (owner "Xilinx")) + ) + (instance blk00000348 + (viewRef view_1 (cellRef FDRE (libraryRef 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(property INIT (string "0") (owner "Xilinx")) + ) + (instance blk0000034e + (viewRef view_1 (cellRef FDRE (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property INIT (string "0") (owner "Xilinx")) + ) + (instance blk0000034f + (viewRef view_1 (cellRef FDRE (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property INIT (string "0") (owner "Xilinx")) + ) + (instance blk00000350 + (viewRef view_1 (cellRef FDRE (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property INIT (string "0") (owner "Xilinx")) + ) + (instance blk00000351 + (viewRef view_1 (cellRef FDRE (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property INIT (string "0") (owner "Xilinx")) + ) + (instance blk00000352 + (viewRef view_1 (cellRef FDRE (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property INIT (string "0") (owner "Xilinx")) + ) + (instance blk00000353 + (viewRef view_1 (cellRef FDRE (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property INIT (string "0") (owner "Xilinx")) + ) + (instance blk00000354 + (viewRef view_1 (cellRef FDRE (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property INIT (string "0") (owner "Xilinx")) + ) + (instance blk00000355 + (viewRef view_1 (cellRef FDRE (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property INIT (string "0") (owner "Xilinx")) + ) + (instance blk00000356 + (viewRef view_1 (cellRef FDRE (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property INIT (string "0") (owner "Xilinx")) + ) + (instance blk00000357 + (viewRef view_1 (cellRef FDRE (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property INIT (string "0") (owner "Xilinx")) + ) + (instance blk00000358 + (viewRef view_1 (cellRef FDRE (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property INIT (string "0") (owner "Xilinx")) + ) + (instance blk00000359 + (viewRef view_1 (cellRef FDRE (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property INIT (string "0") (owner "Xilinx")) + ) + (instance blk0000035a + (viewRef view_1 (cellRef FDRE (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property INIT (string "0") (owner "Xilinx")) + ) + (instance blk0000035b + (viewRef view_1 (cellRef FDRE (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property INIT (string "0") (owner "Xilinx")) + ) + (instance blk0000035c + (viewRef view_1 (cellRef FDRE (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property INIT (string "0") (owner "Xilinx")) + ) + (instance blk0000035d + (viewRef view_1 (cellRef FDRE (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property INIT (string "0") (owner "Xilinx")) + ) + (instance blk0000035e + (viewRef view_1 (cellRef FDRE (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property INIT (string "0") (owner "Xilinx")) + ) + (instance blk0000035f + (viewRef view_1 (cellRef FDRE (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property INIT (string "0") (owner "Xilinx")) + ) + (instance blk00000360 + (viewRef view_1 (cellRef FDRE (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property INIT (string "0") (owner "Xilinx")) + ) + (instance blk00000361 + (viewRef view_1 (cellRef FDRE (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property INIT (string "0") (owner "Xilinx")) + ) + (instance blk00000362 + (viewRef view_1 (cellRef FDRE (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property INIT (string "0") (owner "Xilinx")) + ) + (instance blk00000363 + (viewRef view_1 (cellRef FDRE (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property INIT (string "0") (owner "Xilinx")) + ) + (instance blk00000364 + (viewRef view_1 (cellRef FDRE (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property INIT (string "0") (owner "Xilinx")) + ) + (instance blk00000365 + (viewRef view_1 (cellRef FDRE (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property INIT (string "0") (owner "Xilinx")) + ) + (instance blk00000366 + (viewRef view_1 (cellRef FDRE (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property INIT (string "0") (owner "Xilinx")) + ) + (instance blk00000367 + (viewRef view_1 (cellRef FDRE (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property INIT (string "0") (owner "Xilinx")) + ) + (instance blk00000368 + (viewRef view_1 (cellRef FDRE (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner 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blk0000036e + (viewRef view_1 (cellRef FDRE (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property INIT (string "0") (owner "Xilinx")) + ) + (instance blk0000036f + (viewRef view_1 (cellRef FDRE (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property INIT (string "0") (owner "Xilinx")) + ) + (instance blk00000370 + (viewRef view_1 (cellRef FDRE (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property INIT (string "0") (owner "Xilinx")) + ) + (instance blk00000371 + (viewRef view_1 (cellRef dpr_ram_4_blk00000371 (libraryRef hbdec3_lib))) + (property BUS_INFO (string "1:INPUT:ADDRA<0:0>") (owner "Xilinx")) + (property BUS_INFO (string "18:INPUT:DA_IN<17:0>") (owner "Xilinx")) + (property BUS_INFO (string "1:INPUT:ADDRB<0:0>") (owner "Xilinx")) + (property BUS_INFO (string "18:OUTPUT:DA_OUT<17:0>") (owner "Xilinx")) + (property BUS_INFO (string "18:OUTPUT:DB_OUT<17:0>") (owner "Xilinx")) + (property NLW_UNIQUE_ID (integer 0) (owner "Xilinx")) + (property NLW_MACRO_TAG (integer 13) (owner "Xilinx")) + (property NLW_MACRO_ALIAS (string "dpr_ram_4_blk00000371") (owner "Xilinx")) + ) + (instance blk00000398 + (viewRef view_1 (cellRef XORCY (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property OPTIMIZE_PRIMITIVES_NGC (string "no") (owner "Xilinx")) + ) + (instance blk00000399 + (viewRef view_1 (cellRef XORCY (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property OPTIMIZE_PRIMITIVES_NGC (string "no") (owner "Xilinx")) + ) + (instance blk0000039a + (viewRef view_1 (cellRef XORCY (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property OPTIMIZE_PRIMITIVES_NGC (string "no") (owner "Xilinx")) + ) + (instance blk0000039b + (viewRef view_1 (cellRef XORCY (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property OPTIMIZE_PRIMITIVES_NGC (string "no") (owner "Xilinx")) + ) + (instance blk0000039c + (viewRef view_1 (cellRef XORCY (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property OPTIMIZE_PRIMITIVES_NGC (string "no") (owner "Xilinx")) + ) + (instance blk0000039d + (viewRef view_1 (cellRef MUXCY_D (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property OPTIMIZE_PRIMITIVES_NGC (string "no") (owner "Xilinx")) + ) + (instance blk0000039e + (viewRef view_1 (cellRef MUXCY_L (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property OPTIMIZE_PRIMITIVES_NGC (string "no") (owner "Xilinx")) + ) + (instance blk0000039f + (viewRef view_1 (cellRef MUXCY_L (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property OPTIMIZE_PRIMITIVES_NGC (string "no") (owner "Xilinx")) + ) + (instance blk000003a0 + (viewRef view_1 (cellRef MUXCY_L (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property OPTIMIZE_PRIMITIVES_NGC (string "no") (owner "Xilinx")) + ) + (instance blk000003a1 + (viewRef view_1 (cellRef MUXCY_L (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property OPTIMIZE_PRIMITIVES_NGC (string "no") (owner "Xilinx")) + ) + (instance blk000003a2 + (viewRef view_1 (cellRef FDE (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property INIT (string "0") (owner "Xilinx")) + ) + (instance blk000003a3 + (viewRef view_1 (cellRef FDRE (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property OPTIMIZE_PRIMITIVES_NGC (string "no") (owner "Xilinx")) + (property INIT (string "0") (owner "Xilinx")) + ) + (instance blk000003a4 + (viewRef view_1 (cellRef FDRE (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property OPTIMIZE_PRIMITIVES_NGC (string "no") (owner "Xilinx")) + (property INIT (string "0") (owner "Xilinx")) + ) + (instance blk000003a5 + (viewRef view_1 (cellRef FDRE (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property OPTIMIZE_PRIMITIVES_NGC (string "no") (owner "Xilinx")) + (property INIT (string "0") (owner "Xilinx")) + ) + (instance blk000003a6 + (viewRef view_1 (cellRef FDRE (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property OPTIMIZE_PRIMITIVES_NGC (string "no") (owner "Xilinx")) + (property INIT (string "0") (owner "Xilinx")) + ) + (instance blk000003a7 + (viewRef view_1 (cellRef FDRE (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property OPTIMIZE_PRIMITIVES_NGC (string "no") (owner "Xilinx")) + (property INIT (string "0") (owner "Xilinx")) + ) + (instance blk000003a8 + (viewRef view_1 (cellRef FDRE (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property OPTIMIZE_PRIMITIVES_NGC (string "no") (owner "Xilinx")) + (property INIT (string "0") (owner "Xilinx")) + ) + (instance blk000003a9 + (viewRef view_1 (cellRef FDRE (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property OPTIMIZE_PRIMITIVES_NGC (string "no") (owner "Xilinx")) + (property INIT (string "0") (owner "Xilinx")) + ) + (instance blk000003aa + (viewRef view_1 (cellRef FDRE (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property OPTIMIZE_PRIMITIVES_NGC (string "no") (owner "Xilinx")) + (property INIT (string "0") (owner "Xilinx")) + ) + (instance blk000003ab + (viewRef view_1 (cellRef FDRE (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property OPTIMIZE_PRIMITIVES_NGC (string "no") (owner "Xilinx")) + (property INIT (string "0") (owner "Xilinx")) + ) + (instance blk000003ac + (viewRef view_1 (cellRef FDRE (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property OPTIMIZE_PRIMITIVES_NGC (string "no") (owner "Xilinx")) + (property INIT (string "0") (owner "Xilinx")) + ) + (instance blk000003ad + (viewRef view_1 (cellRef FDRE (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property OPTIMIZE_PRIMITIVES_NGC (string "no") (owner "Xilinx")) + (property INIT (string "0") (owner "Xilinx")) + ) + (instance blk000003ae + (viewRef view_1 (cellRef FDRE (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property OPTIMIZE_PRIMITIVES_NGC (string "no") (owner "Xilinx")) + (property INIT (string "0") (owner "Xilinx")) + ) + (instance blk000003af + (viewRef view_1 (cellRef FDRE (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property OPTIMIZE_PRIMITIVES_NGC (string "no") (owner "Xilinx")) + (property INIT (string "0") (owner "Xilinx")) + ) + (instance blk000003b0 + (viewRef view_1 (cellRef FDRE (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property OPTIMIZE_PRIMITIVES_NGC (string "no") (owner "Xilinx")) + (property INIT (string "0") (owner "Xilinx")) + ) + (instance blk000003b1 + (viewRef view_1 (cellRef FDRE (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property OPTIMIZE_PRIMITIVES_NGC (string "no") (owner "Xilinx")) + (property INIT (string "0") (owner "Xilinx")) + ) + (instance blk000003b2 + (viewRef view_1 (cellRef FDRE (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property OPTIMIZE_PRIMITIVES_NGC (string "no") (owner "Xilinx")) + (property INIT (string "0") (owner "Xilinx")) + ) + (instance blk000003b3 + (viewRef view_1 (cellRef FDRE (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property OPTIMIZE_PRIMITIVES_NGC (string "no") (owner "Xilinx")) + (property INIT (string "0") (owner "Xilinx")) + ) + (instance blk000003b4 + (viewRef view_1 (cellRef FDRE (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property OPTIMIZE_PRIMITIVES_NGC (string "no") (owner "Xilinx")) + (property INIT (string "0") (owner "Xilinx")) + ) + (instance blk000003b5 + (viewRef view_1 (cellRef FDRE (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property OPTIMIZE_PRIMITIVES_NGC (string "no") (owner "Xilinx")) + (property INIT (string "0") (owner "Xilinx")) + ) + (instance blk000003b6 + (viewRef view_1 (cellRef FDRE (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property OPTIMIZE_PRIMITIVES_NGC (string "no") (owner "Xilinx")) + (property INIT (string "0") (owner "Xilinx")) + ) + (instance blk000003b7 + (viewRef view_1 (cellRef FDRE (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property OPTIMIZE_PRIMITIVES_NGC (string "no") (owner "Xilinx")) + (property INIT (string "0") (owner "Xilinx")) + ) + (instance blk000003b8 + (viewRef view_1 (cellRef FDRE (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property OPTIMIZE_PRIMITIVES_NGC (string "no") (owner "Xilinx")) + (property INIT (string "0") (owner "Xilinx")) + ) + (instance blk000003b9 + (viewRef view_1 (cellRef FDRE (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property OPTIMIZE_PRIMITIVES_NGC (string "no") (owner "Xilinx")) + (property INIT (string "0") (owner "Xilinx")) + ) + (instance blk000003ba + (viewRef view_1 (cellRef FDRE (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property OPTIMIZE_PRIMITIVES_NGC (string "no") (owner "Xilinx")) + (property INIT (string "0") (owner "Xilinx")) + ) + (instance blk000003bb + (viewRef view_1 (cellRef FDRE (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property OPTIMIZE_PRIMITIVES_NGC (string "no") (owner "Xilinx")) + (property INIT (string "0") (owner "Xilinx")) + ) + (instance blk000003bc + (viewRef view_1 (cellRef FDRE (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property OPTIMIZE_PRIMITIVES_NGC (string "no") (owner "Xilinx")) + (property INIT (string "0") (owner "Xilinx")) + ) + (instance blk000003bd + (viewRef view_1 (cellRef FDRE (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property OPTIMIZE_PRIMITIVES_NGC (string "no") (owner "Xilinx")) + (property INIT (string "0") (owner "Xilinx")) + ) + (instance blk000003be + (viewRef view_1 (cellRef FDRE (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property OPTIMIZE_PRIMITIVES_NGC (string "no") (owner "Xilinx")) + (property INIT (string "0") (owner "Xilinx")) + ) + (instance blk000003bf + (viewRef view_1 (cellRef FDRE (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property OPTIMIZE_PRIMITIVES_NGC (string "no") (owner "Xilinx")) + (property INIT (string "0") (owner "Xilinx")) + ) + (instance blk000003c0 + (viewRef view_1 (cellRef FDRE (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property OPTIMIZE_PRIMITIVES_NGC (string "no") (owner "Xilinx")) + (property INIT (string "0") (owner "Xilinx")) + ) + (instance blk000003c1 + (viewRef view_1 (cellRef FDRE (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property OPTIMIZE_PRIMITIVES_NGC (string "no") (owner "Xilinx")) + (property INIT (string "0") (owner "Xilinx")) + ) + (instance blk000003c2 + (viewRef view_1 (cellRef FDRE (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property OPTIMIZE_PRIMITIVES_NGC (string "no") (owner "Xilinx")) + (property INIT (string "0") (owner "Xilinx")) + ) + (instance blk000003c3 + (viewRef view_1 (cellRef FDRE (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property OPTIMIZE_PRIMITIVES_NGC (string "no") (owner "Xilinx")) + (property INIT (string "0") (owner "Xilinx")) + ) + (instance blk000003c4 + (viewRef view_1 (cellRef FDRE (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property OPTIMIZE_PRIMITIVES_NGC (string "no") (owner "Xilinx")) + (property INIT (string "0") (owner "Xilinx")) + ) + (instance blk000003c5 + (viewRef view_1 (cellRef FDRE (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property OPTIMIZE_PRIMITIVES_NGC (string "no") (owner "Xilinx")) + (property INIT (string "0") (owner "Xilinx")) + ) + (instance blk000003c6 + (viewRef view_1 (cellRef FDRE (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property OPTIMIZE_PRIMITIVES_NGC (string "no") (owner "Xilinx")) + (property INIT (string "0") (owner "Xilinx")) + ) + (instance blk000003c7 + (viewRef view_1 (cellRef FDRE (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property OPTIMIZE_PRIMITIVES_NGC (string "no") (owner "Xilinx")) + (property INIT (string "0") (owner "Xilinx")) + ) + (instance blk000003c8 + (viewRef view_1 (cellRef FDRE (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property OPTIMIZE_PRIMITIVES_NGC (string "no") (owner "Xilinx")) + (property INIT (string "0") (owner "Xilinx")) + ) + (instance blk000003c9 + (viewRef view_1 (cellRef FDRE (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property OPTIMIZE_PRIMITIVES_NGC (string "no") (owner "Xilinx")) + (property INIT (string "0") (owner "Xilinx")) + ) + (instance blk000003ca + (viewRef view_1 (cellRef FDRE (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property OPTIMIZE_PRIMITIVES_NGC (string "no") (owner "Xilinx")) + (property INIT (string "0") (owner "Xilinx")) + ) + (instance blk000003cb + (viewRef view_1 (cellRef FDRE (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property OPTIMIZE_PRIMITIVES_NGC (string "no") (owner "Xilinx")) + (property INIT (string "0") (owner "Xilinx")) + ) + (instance blk000003cc + (viewRef view_1 (cellRef FDRE (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property OPTIMIZE_PRIMITIVES_NGC (string "no") (owner "Xilinx")) + (property INIT (string "0") (owner "Xilinx")) + ) + (instance blk000003cd + (viewRef view_1 (cellRef FDRE (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property OPTIMIZE_PRIMITIVES_NGC (string "no") (owner "Xilinx")) + (property INIT (string "0") (owner "Xilinx")) + ) + (instance blk000003ce + (viewRef view_1 (cellRef FDRE (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property OPTIMIZE_PRIMITIVES_NGC (string "no") (owner "Xilinx")) + (property INIT (string "0") (owner "Xilinx")) + ) + (instance blk000003cf + (viewRef view_1 (cellRef FDRE (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property OPTIMIZE_PRIMITIVES_NGC (string "no") (owner "Xilinx")) + (property INIT (string "0") (owner "Xilinx")) + ) + (instance blk000003d0 + (viewRef view_1 (cellRef FDRE (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property OPTIMIZE_PRIMITIVES_NGC (string "no") (owner "Xilinx")) + (property INIT (string "0") (owner "Xilinx")) + ) + (instance blk000003d1 + (viewRef view_1 (cellRef FDRE (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property OPTIMIZE_PRIMITIVES_NGC (string "no") (owner "Xilinx")) + (property INIT (string "0") (owner "Xilinx")) + ) + (instance blk000003d2 + (viewRef view_1 (cellRef FDRE (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property OPTIMIZE_PRIMITIVES_NGC (string "no") (owner "Xilinx")) + (property INIT (string "0") (owner "Xilinx")) + ) + (instance blk000003d3 + (viewRef view_1 (cellRef FDRE (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property OPTIMIZE_PRIMITIVES_NGC (string "no") (owner "Xilinx")) + (property INIT (string "0") (owner "Xilinx")) + ) + (instance blk000003d4 + (viewRef view_1 (cellRef FDRE (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property OPTIMIZE_PRIMITIVES_NGC (string "no") (owner "Xilinx")) + (property INIT (string "0") (owner "Xilinx")) + ) + (instance blk000003d5 + (viewRef view_1 (cellRef FDRE (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property OPTIMIZE_PRIMITIVES_NGC (string "no") (owner "Xilinx")) + (property INIT (string "0") (owner "Xilinx")) + ) + (instance blk000003d6 + (viewRef view_1 (cellRef FDRE (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property OPTIMIZE_PRIMITIVES_NGC (string "no") (owner "Xilinx")) + (property INIT (string "0") (owner "Xilinx")) + ) + (instance blk000003d7 + (viewRef view_1 (cellRef FDRE (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property OPTIMIZE_PRIMITIVES_NGC (string "no") (owner "Xilinx")) + (property INIT (string "0") (owner "Xilinx")) + ) + (instance blk000003d8 + (viewRef view_1 (cellRef FDRE (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property OPTIMIZE_PRIMITIVES_NGC (string "no") (owner "Xilinx")) + (property INIT (string "0") (owner "Xilinx")) + ) + (instance blk000003d9 + (viewRef view_1 (cellRef FDRE (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property OPTIMIZE_PRIMITIVES_NGC (string "no") (owner "Xilinx")) + (property INIT (string "0") (owner "Xilinx")) + ) + (instance blk000003da + (viewRef view_1 (cellRef FDRE (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property OPTIMIZE_PRIMITIVES_NGC (string "no") (owner "Xilinx")) + (property INIT (string "0") (owner "Xilinx")) + ) + (instance blk000003db + (viewRef view_1 (cellRef FDRE (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property OPTIMIZE_PRIMITIVES_NGC (string "no") (owner "Xilinx")) + (property INIT (string "0") (owner "Xilinx")) + ) + (instance blk000003dc + (viewRef view_1 (cellRef FDRE (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property OPTIMIZE_PRIMITIVES_NGC (string "no") (owner "Xilinx")) + (property INIT (string "0") (owner "Xilinx")) + ) + (instance blk000003dd + (viewRef view_1 (cellRef FDRE (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property OPTIMIZE_PRIMITIVES_NGC (string "no") (owner "Xilinx")) + (property INIT (string "0") (owner "Xilinx")) + ) + (instance blk000003de + (viewRef view_1 (cellRef FDRE (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property OPTIMIZE_PRIMITIVES_NGC (string "no") (owner "Xilinx")) + (property INIT (string "0") (owner "Xilinx")) + ) + (instance blk000003df + (viewRef view_1 (cellRef FDRE (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property OPTIMIZE_PRIMITIVES_NGC (string "no") (owner "Xilinx")) + (property INIT (string "0") (owner "Xilinx")) + ) + (instance blk000003e0 + (viewRef view_1 (cellRef FDRE (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property OPTIMIZE_PRIMITIVES_NGC (string "no") (owner "Xilinx")) + (property INIT (string "0") (owner "Xilinx")) + ) + (instance blk000003e1 + (viewRef view_1 (cellRef FDRE (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property OPTIMIZE_PRIMITIVES_NGC (string "no") (owner "Xilinx")) + (property INIT (string "0") (owner "Xilinx")) + ) + (instance blk000003e2 + (viewRef view_1 (cellRef FDRE (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property OPTIMIZE_PRIMITIVES_NGC (string "no") (owner "Xilinx")) + (property INIT (string "0") (owner "Xilinx")) + ) + (instance blk000003e3 + (viewRef view_1 (cellRef FDRE (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property OPTIMIZE_PRIMITIVES_NGC (string "no") (owner "Xilinx")) + (property INIT (string "0") (owner "Xilinx")) + ) + (instance blk000003e4 + (viewRef view_1 (cellRef FDRE (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property OPTIMIZE_PRIMITIVES_NGC (string "no") (owner "Xilinx")) + (property INIT (string "0") (owner "Xilinx")) + ) + (instance blk000003e5 + (viewRef view_1 (cellRef FDRE (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property OPTIMIZE_PRIMITIVES_NGC (string "no") (owner "Xilinx")) + (property INIT (string "0") (owner "Xilinx")) + ) + (instance blk000003e6 + (viewRef view_1 (cellRef FDRE (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property OPTIMIZE_PRIMITIVES_NGC (string "no") (owner "Xilinx")) + (property INIT (string "0") (owner "Xilinx")) + ) + (instance blk000003e7 + (viewRef view_1 (cellRef FDRE (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property OPTIMIZE_PRIMITIVES_NGC (string "no") (owner "Xilinx")) + (property INIT (string "0") (owner "Xilinx")) + ) + (instance blk000003e8 + (viewRef view_1 (cellRef FDRE (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property OPTIMIZE_PRIMITIVES_NGC (string "no") (owner "Xilinx")) + (property INIT (string "0") (owner "Xilinx")) + ) + (instance blk000003e9 + (viewRef view_1 (cellRef FDRE (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property OPTIMIZE_PRIMITIVES_NGC (string "no") (owner "Xilinx")) + (property INIT (string "0") (owner "Xilinx")) + ) + (instance blk000003ea + (viewRef view_1 (cellRef FDRE (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property OPTIMIZE_PRIMITIVES_NGC (string "no") (owner "Xilinx")) + (property INIT (string "0") (owner "Xilinx")) + ) + (instance blk000003eb + (viewRef view_1 (cellRef FDRE (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property OPTIMIZE_PRIMITIVES_NGC (string "no") (owner "Xilinx")) + (property INIT (string "0") (owner "Xilinx")) + ) + (instance blk000003ec + (viewRef view_1 (cellRef FDRE (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property OPTIMIZE_PRIMITIVES_NGC (string "no") (owner "Xilinx")) + (property INIT (string "0") (owner "Xilinx")) + ) + (instance blk000003ed + (viewRef view_1 (cellRef FDRE (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property OPTIMIZE_PRIMITIVES_NGC (string "no") (owner "Xilinx")) + (property INIT (string "0") (owner "Xilinx")) + ) + (instance blk000003ee + (viewRef view_1 (cellRef FDRE (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property OPTIMIZE_PRIMITIVES_NGC (string "no") (owner "Xilinx")) + (property INIT (string "0") (owner "Xilinx")) + ) + (instance blk000003ef + (viewRef view_1 (cellRef FDRE (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property OPTIMIZE_PRIMITIVES_NGC (string "no") (owner "Xilinx")) + (property INIT (string "0") (owner "Xilinx")) + ) + (instance blk000003f0 + (viewRef view_1 (cellRef FDRE (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property OPTIMIZE_PRIMITIVES_NGC (string "no") (owner "Xilinx")) + (property INIT (string "0") (owner "Xilinx")) + ) + (instance blk000003f1 + (viewRef view_1 (cellRef FDRE (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property OPTIMIZE_PRIMITIVES_NGC (string "no") (owner "Xilinx")) + (property INIT (string "0") (owner "Xilinx")) + ) + (instance blk000003f2 + (viewRef view_1 (cellRef FDRE (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property OPTIMIZE_PRIMITIVES_NGC (string "no") (owner "Xilinx")) + (property INIT (string "0") (owner "Xilinx")) + ) + (instance blk000003f3 + (viewRef view_1 (cellRef FDRE (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property OPTIMIZE_PRIMITIVES_NGC (string "no") (owner "Xilinx")) + (property INIT (string "0") (owner "Xilinx")) + ) + (instance blk000003f4 + (viewRef view_1 (cellRef FDRE (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property OPTIMIZE_PRIMITIVES_NGC (string "no") (owner "Xilinx")) + (property INIT (string "0") (owner "Xilinx")) + ) + (instance blk000003f5 + (viewRef view_1 (cellRef FDRE (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property OPTIMIZE_PRIMITIVES_NGC (string "no") (owner "Xilinx")) + (property INIT (string "0") (owner "Xilinx")) + ) + (instance blk000003f6 + (viewRef view_1 (cellRef FDRE (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property OPTIMIZE_PRIMITIVES_NGC (string "no") (owner "Xilinx")) + (property INIT (string "0") (owner "Xilinx")) + ) + (instance blk000003f7 + (viewRef view_1 (cellRef FDRE (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property OPTIMIZE_PRIMITIVES_NGC (string "no") (owner "Xilinx")) + (property INIT (string "0") (owner "Xilinx")) + ) + (instance blk000003f8 + (viewRef view_1 (cellRef FDRE (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property OPTIMIZE_PRIMITIVES_NGC (string "no") (owner "Xilinx")) + (property INIT (string "0") (owner "Xilinx")) + ) + (instance blk000003f9 + (viewRef view_1 (cellRef FDRE (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property OPTIMIZE_PRIMITIVES_NGC (string "no") (owner "Xilinx")) + (property INIT (string "0") (owner "Xilinx")) + ) + (instance blk000003fa + (viewRef view_1 (cellRef FDRE (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property OPTIMIZE_PRIMITIVES_NGC (string "no") (owner "Xilinx")) + (property INIT (string "0") (owner "Xilinx")) + ) + (instance blk000003fb + (viewRef view_1 (cellRef FDRE (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property OPTIMIZE_PRIMITIVES_NGC (string "no") (owner "Xilinx")) + (property INIT (string "0") (owner "Xilinx")) + ) + (instance blk000003fc + (viewRef view_1 (cellRef FDRE (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property OPTIMIZE_PRIMITIVES_NGC (string "no") (owner "Xilinx")) + (property INIT (string "0") (owner "Xilinx")) + ) + (instance blk000003fd + (viewRef view_1 (cellRef FDRE (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property OPTIMIZE_PRIMITIVES_NGC (string "no") (owner "Xilinx")) + (property INIT (string "0") (owner "Xilinx")) + ) + (instance blk000003fe + (viewRef view_1 (cellRef FDRE (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property OPTIMIZE_PRIMITIVES_NGC (string "no") (owner "Xilinx")) + (property INIT (string "0") (owner "Xilinx")) + ) + (instance blk000003ff + (viewRef view_1 (cellRef FDRE (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property OPTIMIZE_PRIMITIVES_NGC (string "no") (owner "Xilinx")) + (property INIT (string "0") (owner "Xilinx")) + ) + (instance blk00000400 + (viewRef view_1 (cellRef FDRE (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property OPTIMIZE_PRIMITIVES_NGC (string "no") (owner "Xilinx")) + (property INIT (string "0") (owner "Xilinx")) + ) + (instance blk00000401 + (viewRef view_1 (cellRef FDRE (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property OPTIMIZE_PRIMITIVES_NGC (string "no") (owner "Xilinx")) + (property INIT (string "0") (owner "Xilinx")) + ) + (instance blk00000402 + (viewRef view_1 (cellRef FDRE (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property OPTIMIZE_PRIMITIVES_NGC (string "no") (owner "Xilinx")) + (property INIT (string "0") (owner "Xilinx")) + ) + (instance blk00000403 + (viewRef view_1 (cellRef FDRE (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property OPTIMIZE_PRIMITIVES_NGC (string "no") (owner "Xilinx")) + (property INIT (string "0") (owner "Xilinx")) + ) + (instance blk00000404 + (viewRef view_1 (cellRef XORCY (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property OPTIMIZE_PRIMITIVES_NGC (string "no") (owner "Xilinx")) + ) + (instance blk00000405 + (viewRef view_1 (cellRef XORCY (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property OPTIMIZE_PRIMITIVES_NGC (string "no") (owner "Xilinx")) + ) + (instance blk00000406 + (viewRef view_1 (cellRef XORCY (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property OPTIMIZE_PRIMITIVES_NGC (string "no") (owner "Xilinx")) + ) + (instance blk00000407 + (viewRef view_1 (cellRef XORCY (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property OPTIMIZE_PRIMITIVES_NGC (string "no") (owner "Xilinx")) + ) + (instance blk00000408 + (viewRef view_1 (cellRef XORCY (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property OPTIMIZE_PRIMITIVES_NGC (string "no") (owner "Xilinx")) + ) + (instance blk00000409 + (viewRef view_1 (cellRef MUXCY_D (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property OPTIMIZE_PRIMITIVES_NGC (string "no") (owner "Xilinx")) + ) + (instance blk0000040a + (viewRef view_1 (cellRef MUXCY_L (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property OPTIMIZE_PRIMITIVES_NGC (string "no") (owner "Xilinx")) + ) + (instance blk0000040b + (viewRef view_1 (cellRef MUXCY_L (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property OPTIMIZE_PRIMITIVES_NGC (string "no") (owner "Xilinx")) + ) + (instance blk0000040c + (viewRef view_1 (cellRef MUXCY_L (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property OPTIMIZE_PRIMITIVES_NGC (string "no") (owner "Xilinx")) + ) + (instance blk0000040d + (viewRef view_1 (cellRef MUXCY_L (libraryRef UNISIMS))) + (property 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"5140") (owner "Xilinx")) + ) + (instance blk000004ab + (viewRef view_1 (cellRef LUT3 (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property INIT (string "04") (owner "Xilinx")) + ) + (instance blk000004ac + (viewRef view_1 (cellRef LUT3 (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property INIT (string "DE") (owner "Xilinx")) + ) + (instance blk000004ad + (viewRef view_1 (cellRef LUT2 (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property INIT (string "E") (owner "Xilinx")) + ) + (instance blk000004ae + (viewRef view_1 (cellRef LUT2 (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property INIT (string "E") (owner "Xilinx")) + ) + (instance blk000004af + (viewRef view_1 (cellRef LUT2 (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property INIT (string "E") (owner "Xilinx")) + ) + (instance blk000004b0 + (viewRef view_1 (cellRef LUT2 (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property INIT (string "E") (owner "Xilinx")) + ) + (instance blk000004b1 + (viewRef view_1 (cellRef FDRE (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property OPTIMIZE_PRIMITIVES_NGC (string "no") (owner "Xilinx")) + (property INIT (string "0") (owner "Xilinx")) + ) + (instance blk000004b2 + (viewRef view_1 (cellRef FDRE (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property OPTIMIZE_PRIMITIVES_NGC (string "no") (owner "Xilinx")) + (property INIT (string "0") (owner "Xilinx")) + ) + (instance blk000004b3 + (viewRef view_1 (cellRef FDRE (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property OPTIMIZE_PRIMITIVES_NGC (string "no") (owner "Xilinx")) + (property INIT (string "0") (owner "Xilinx")) + ) + (instance blk000004b4 + (viewRef view_1 (cellRef FDRE (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property OPTIMIZE_PRIMITIVES_NGC (string "no") (owner "Xilinx")) + (property INIT (string "0") (owner "Xilinx")) + ) + (instance blk000004b5 + (viewRef view_1 (cellRef FDRE (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property OPTIMIZE_PRIMITIVES_NGC (string "no") (owner "Xilinx")) + (property INIT (string "0") (owner "Xilinx")) + ) + (instance blk000004b6 + (viewRef view_1 (cellRef FDRE (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property OPTIMIZE_PRIMITIVES_NGC (string "no") (owner "Xilinx")) + (property INIT (string "0") (owner "Xilinx")) + ) + (instance blk000004b7 + (viewRef view_1 (cellRef FDRE (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property OPTIMIZE_PRIMITIVES_NGC (string "no") (owner "Xilinx")) + (property INIT (string "0") (owner "Xilinx")) + ) + (instance blk000004b8 + (viewRef view_1 (cellRef FDRE (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property OPTIMIZE_PRIMITIVES_NGC (string "no") (owner "Xilinx")) + (property INIT (string "0") (owner "Xilinx")) + ) + (instance blk000004b9 + (viewRef view_1 (cellRef FDRE (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property OPTIMIZE_PRIMITIVES_NGC (string "no") (owner "Xilinx")) + (property INIT (string "0") (owner "Xilinx")) + ) + (instance blk000004ba + (viewRef view_1 (cellRef FDRE (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property OPTIMIZE_PRIMITIVES_NGC (string "no") (owner "Xilinx")) + (property INIT (string "0") (owner "Xilinx")) + ) + (instance blk000004bb + (viewRef view_1 (cellRef FDR (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + ) + (instance blk000004bc + (viewRef view_1 (cellRef FDRE (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property OPTIMIZE_PRIMITIVES_NGC (string "no") (owner "Xilinx")) + (property INIT (string "0") (owner "Xilinx")) + ) + (instance blk000004bd + (viewRef view_1 (cellRef FDRE (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property OPTIMIZE_PRIMITIVES_NGC (string "no") (owner "Xilinx")) + (property INIT (string "0") (owner "Xilinx")) + ) + (instance blk000004be + (viewRef view_1 (cellRef FDRE (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property OPTIMIZE_PRIMITIVES_NGC (string "no") (owner "Xilinx")) + (property INIT (string "0") (owner "Xilinx")) + ) + (instance blk000004bf + (viewRef view_1 (cellRef FDRE (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property OPTIMIZE_PRIMITIVES_NGC (string "no") (owner "Xilinx")) + (property INIT (string "0") (owner "Xilinx")) + ) + (instance blk000004c0 + (viewRef view_1 (cellRef FDRE (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property OPTIMIZE_PRIMITIVES_NGC (string "no") (owner "Xilinx")) + (property INIT (string "0") (owner "Xilinx")) + ) + (instance blk000004c1 + (viewRef view_1 (cellRef FDSE (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property OPTIMIZE_PRIMITIVES_NGC (string "no") (owner "Xilinx")) + (property INIT (string "1") (owner "Xilinx")) + ) + (instance blk000004c2 + (viewRef view_1 (cellRef FDR (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + ) + (instance blk000004c3 + (viewRef view_1 (cellRef FDRE (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property OPTIMIZE_PRIMITIVES_NGC (string "no") (owner "Xilinx")) + (property INIT (string "0") (owner "Xilinx")) + ) + (instance blk000004c4 + (viewRef view_1 (cellRef FDRE (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property OPTIMIZE_PRIMITIVES_NGC (string "no") (owner "Xilinx")) + (property INIT (string "0") (owner "Xilinx")) + ) + (instance blk000004c5 + (viewRef view_1 (cellRef FDRE (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property OPTIMIZE_PRIMITIVES_NGC (string "no") (owner "Xilinx")) + (property INIT (string "0") (owner "Xilinx")) + ) + (instance blk000004c6 + (viewRef view_1 (cellRef FDSE (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property OPTIMIZE_PRIMITIVES_NGC (string "no") (owner "Xilinx")) + (property INIT (string "1") (owner "Xilinx")) + ) + (instance blk000004c7 + (viewRef view_1 (cellRef FDSE (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property OPTIMIZE_PRIMITIVES_NGC (string "no") (owner "Xilinx")) + (property INIT (string "1") (owner "Xilinx")) + ) + (instance blk000004c8 + (viewRef view_1 (cellRef FDSE (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property OPTIMIZE_PRIMITIVES_NGC (string "no") (owner "Xilinx")) + (property INIT (string "1") (owner "Xilinx")) + ) + (instance blk000004c9 + (viewRef view_1 (cellRef FDRE (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property OPTIMIZE_PRIMITIVES_NGC (string "no") (owner "Xilinx")) + (property INIT (string "0") (owner "Xilinx")) + ) + (instance blk000004ca + (viewRef view_1 (cellRef FDRE (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property OPTIMIZE_PRIMITIVES_NGC (string "no") (owner "Xilinx")) + (property INIT (string "0") (owner "Xilinx")) + ) + (instance blk000004cb + (viewRef view_1 (cellRef FDRE (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property OPTIMIZE_PRIMITIVES_NGC (string "no") (owner "Xilinx")) + (property INIT (string "0") (owner "Xilinx")) + ) + (instance blk000004cc + (viewRef view_1 (cellRef FDSE (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property OPTIMIZE_PRIMITIVES_NGC (string "no") (owner "Xilinx")) + (property INIT (string "1") (owner "Xilinx")) + ) + (instance blk000004cd + (viewRef view_1 (cellRef FDRE (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property OPTIMIZE_PRIMITIVES_NGC (string "no") (owner "Xilinx")) + (property INIT (string "0") (owner "Xilinx")) + ) + (instance blk000004ce + (viewRef view_1 (cellRef FDRE (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property OPTIMIZE_PRIMITIVES_NGC (string "no") (owner "Xilinx")) + (property INIT (string "0") (owner "Xilinx")) + ) + (instance blk000004cf + (viewRef view_1 (cellRef FDSE (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property OPTIMIZE_PRIMITIVES_NGC (string "no") (owner "Xilinx")) + (property INIT (string "1") (owner "Xilinx")) + ) + (instance blk000004d0 + (viewRef view_1 (cellRef FDSE (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property OPTIMIZE_PRIMITIVES_NGC (string "no") (owner "Xilinx")) + (property INIT (string "1") (owner "Xilinx")) + ) + (instance blk000004d1 + (viewRef view_1 (cellRef FDRE (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property OPTIMIZE_PRIMITIVES_NGC (string "no") (owner "Xilinx")) + (property INIT (string "0") (owner "Xilinx")) + ) + (instance blk000004d2 + (viewRef view_1 (cellRef FDRE (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property OPTIMIZE_PRIMITIVES_NGC (string "no") (owner "Xilinx")) + (property INIT (string "0") (owner "Xilinx")) + ) + (instance blk000004d3 + (viewRef view_1 (cellRef FDRE (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property OPTIMIZE_PRIMITIVES_NGC (string "no") (owner "Xilinx")) + (property INIT (string "0") (owner "Xilinx")) + ) + (instance blk000004d4 + (viewRef view_1 (cellRef FDRE (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property OPTIMIZE_PRIMITIVES_NGC (string "no") (owner "Xilinx")) + (property INIT (string "0") (owner "Xilinx")) + ) + (instance blk000004d5 + (viewRef view_1 (cellRef FDRE (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property OPTIMIZE_PRIMITIVES_NGC (string "no") (owner "Xilinx")) + (property INIT (string "0") (owner "Xilinx")) + ) + (instance blk000004d6 + (viewRef view_1 (cellRef LUT1 (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property INIT (string "2") (owner "Xilinx")) + ) + (instance blk000004d7 + (viewRef view_1 (cellRef LUT1 (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property INIT (string "2") (owner "Xilinx")) + ) + (instance blk000004d8 + (viewRef view_1 (cellRef LUT3 (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property INIT (string "08") (owner "Xilinx")) + ) + (instance blk000004d9 + (viewRef view_1 (cellRef LUT1 (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property INIT (string "2") (owner "Xilinx")) + ) + (instance blk000004da + (viewRef view_1 (cellRef LUT1 (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property INIT (string "2") (owner "Xilinx")) + ) + (instance blk000004db + (viewRef view_1 (cellRef LUT1 (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property INIT (string "2") (owner "Xilinx")) + ) + (instance blk000004dc + (viewRef view_1 (cellRef LUT1 (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property INIT (string "2") (owner "Xilinx")) + ) + (instance blk000004dd + (viewRef view_1 (cellRef LUT1 (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property INIT (string "2") (owner "Xilinx")) + ) + (instance blk000004de + (viewRef view_1 (cellRef LUT1 (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property INIT (string "2") (owner "Xilinx")) + ) + (instance blk000004df + (viewRef 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(true)) (owner "Xilinx")) + (property INIT (string "2") (owner "Xilinx")) + ) + (instance blk000004e5 + (viewRef view_1 (cellRef LUT1 (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property INIT (string "2") (owner "Xilinx")) + ) + (instance blk000004e6 + (viewRef view_1 (cellRef LUT1 (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property INIT (string "2") (owner "Xilinx")) + ) + (instance blk000004e7 + (viewRef view_1 (cellRef LUT1 (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property INIT (string "2") (owner "Xilinx")) + ) + (instance blk000004e8 + (viewRef view_1 (cellRef LUT1 (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property INIT (string "2") (owner "Xilinx")) + ) + (instance blk000004e9 + (viewRef view_1 (cellRef LUT1 (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property INIT (string "2") (owner "Xilinx")) + ) + (instance blk000004ea + (viewRef view_1 (cellRef FDR (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property INIT (string "0") (owner "Xilinx")) + ) + (instance blk000004eb + (viewRef view_1 (cellRef FDR (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property INIT (string "0") (owner "Xilinx")) + ) + (instance blk000004ec + (viewRef view_1 (cellRef FD (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property INIT (string "1") (owner "Xilinx")) + ) + (instance blk000004ed + (viewRef view_1 (cellRef FD (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property INIT (string "1") (owner "Xilinx")) + ) + (instance blk000004ee + (viewRef view_1 (cellRef LUT5 (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property INIT (string "6AAAAAAA") (owner "Xilinx")) + ) + (instance blk000004ef + (viewRef view_1 (cellRef LUT3 (libraryRef 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"___XLNM___9___U0/g_mac.mac/fir_select/gen_halfband_decimation.fir/gen_filter_block/gen_independant_col[1].gen_split_col[0].gen_taps[2].gen_data_sym_casc.gen_norm.data_sym_casc_dly/CE_WE_AND_167_o1") (owner "Xilinx")) + (property INIT (string "EA2A") (owner "Xilinx")) + ) + (instance blk000004f3 + (viewRef view_1 (cellRef LUT4 (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property PK_HLUTNM (string "___XLNM___8___U0/g_mac.mac/fir_select/gen_halfband_decimation.fir/gen_centre_tap_data_latched/CE_WE_AND_186_o1") (owner "Xilinx")) + (property INIT (string "EA2A") (owner "Xilinx")) + ) + (instance blk000004f4 + (viewRef view_1 (cellRef LUT5 (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property PK_HLUTNM (string "___XLNM___0___U0/g_mac.mac/fir_select/gen_halfband_decimation.fir/gen_reload.reload_cntrl/reload_enable_reload_hb_enable_OR_11_o1") (owner "Xilinx")) + (property INIT (string "20AA2020") (owner "Xilinx")) + ) + (instance blk000004f5 + (viewRef view_1 (cellRef LUT4 (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property PK_HLUTNM (string "___XLNM___0___U0/g_mac.mac/fir_select/gen_halfband_decimation.fir/gen_reload.reload_cntrl/reload_enable_reload_hb_enable_OR_11_o1") (owner "Xilinx")) + (property INIT (string "1000") (owner "Xilinx")) + ) + (instance blk000004f6 + (viewRef view_1 (cellRef LUT5 (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property PK_HLUTNM (string "___XLNM___2___U0/g_mac.mac/fir_select/gen_halfband_decimation.fir/gen_reload.reload_cntrl/reload_complete_COEF_LD_OR_12_o1") (owner "Xilinx")) + (property INIT (string "4F444444") (owner "Xilinx")) + ) + (instance blk000004f7 + (viewRef view_1 (cellRef LUT3 (libraryRef UNISIMS))) + (property XSTLIB (boolean (true)) (owner "Xilinx")) + (property PK_HLUTNM (string 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PART (string "7k325tffg900-2") (owner "Xilinx")) + ) +) + diff --git a/fpga/usrp3/top/x400/coregen_dsp/hbdec3.v b/fpga/usrp3/top/x400/coregen_dsp/hbdec3.v new file mode 100644 index 000000000..cd6e39d9f --- /dev/null +++ b/fpga/usrp3/top/x400/coregen_dsp/hbdec3.v @@ -0,0 +1,20014 @@ +//////////////////////////////////////////////////////////////////////////////// +// Copyright (c) 1995-2012 Xilinx, Inc. All rights reserved. +//////////////////////////////////////////////////////////////////////////////// +// ____ ____ +// / /\/ / +// /___/ \ / Vendor: Xilinx +// \ \ \/ Version: P.49d +// \ \ Application: netgen +// / / Filename: hbdec3.v +// /___/ /\ Timestamp: Wed Dec 4 13:32:32 2013 +// \ \ / \ +// \___\/\___\ +// +// Command : -intstyle ise -w -sim -ofmt verilog ./tmp/_cg/hbdec3.ngc ./tmp/_cg/hbdec3.v +// Device : 7k325tffg900-2 +// Input file : ./tmp/_cg/hbdec3.ngc +// Output file : ./tmp/_cg/hbdec3.v +// # of Modules : 1 +// Design Name : hbdec3 +// Xilinx : /opt/Xilinx/14.4/ISE_DS/ISE/ +// +// Purpose: +// This verilog netlist is a verification model and uses simulation +// primitives which may not represent the true implementation of the +// device, however the netlist is functionally correct and should not +// be modified. This file cannot be synthesized and should only be used +// with supported simulation tools. +// +// Reference: +// Command Line Tools User Guide, Chapter 23 and Synthesis and Simulation Design Guide, Chapter 6 +// +//////////////////////////////////////////////////////////////////////////////// + +`timescale 1 ns/1 ps + +module hbdec3 ( + sclr, ce, rfd, rdy, data_valid, coef_we, nd, clk, coef_ld, dout_1, dout_2, din_1, din_2, coef_din +)/* synthesis syn_black_box syn_noprune=1 */; + input sclr; + input ce; + output rfd; + output rdy; + output data_valid; + input coef_we; + input nd; + input clk; + input coef_ld; + output [47 : 0] dout_1; + output [47 : 0] dout_2; + input [23 : 0] din_1; + input [23 : 0] din_2; + input [17 : 0] coef_din; + + // synthesis translate_off + + wire NlwRenamedSig_OI_rfd; + wire \blk00000003/sig00000664 ; + wire \blk00000003/sig00000663 ; + wire \blk00000003/sig00000662 ; + wire \blk00000003/sig00000661 ; + wire \blk00000003/sig00000660 ; + wire \blk00000003/sig0000065f ; + wire \blk00000003/sig0000065e ; + wire \blk00000003/sig0000065d ; + wire \blk00000003/sig0000065c ; + wire \blk00000003/sig0000065b ; + wire \blk00000003/sig0000065a ; + wire \blk00000003/sig00000659 ; + wire \blk00000003/sig00000658 ; + wire \blk00000003/sig00000657 ; + wire \blk00000003/sig00000656 ; + wire \blk00000003/sig00000655 ; + wire \blk00000003/sig00000654 ; + wire \blk00000003/sig00000653 ; + wire \blk00000003/sig00000652 ; + wire \blk00000003/sig00000651 ; + wire \blk00000003/sig00000650 ; + wire \blk00000003/sig0000064f ; + wire \blk00000003/sig0000064e ; + wire \blk00000003/sig0000064d ; + wire \blk00000003/sig0000064c ; + wire \blk00000003/sig0000064b ; + wire \blk00000003/sig0000064a ; + wire \blk00000003/sig00000649 ; + wire \blk00000003/sig00000648 ; + wire \blk00000003/sig00000647 ; + wire \blk00000003/sig00000646 ; + wire \blk00000003/sig00000645 ; + wire \blk00000003/sig00000644 ; + wire \blk00000003/sig00000643 ; + wire \blk00000003/sig00000642 ; + wire \blk00000003/sig00000641 ; + wire \blk00000003/sig00000640 ; + wire \blk00000003/sig0000063f ; + wire \blk00000003/sig0000063e ; + wire \blk00000003/sig0000063d ; + wire \blk00000003/sig0000063c ; + wire \blk00000003/sig0000063b ; + wire \blk00000003/sig0000063a ; + wire \blk00000003/sig00000639 ; + wire \blk00000003/sig00000638 ; + wire \blk00000003/sig00000637 ; + wire \blk00000003/sig00000636 ; + wire \blk00000003/sig00000635 ; + wire \blk00000003/sig00000634 ; + wire \blk00000003/sig00000633 ; + wire \blk00000003/sig00000632 ; + wire \blk00000003/sig00000631 ; + wire \blk00000003/sig00000630 ; + wire \blk00000003/sig0000062f ; + wire \blk00000003/sig0000062e ; + wire \blk00000003/sig0000062d ; + wire \blk00000003/sig0000062c ; + wire \blk00000003/sig0000062b ; + wire \blk00000003/sig0000062a ; + wire \blk00000003/sig00000629 ; + wire \blk00000003/sig00000628 ; + wire \blk00000003/sig00000627 ; + wire \blk00000003/sig00000626 ; + wire \blk00000003/sig00000625 ; + wire \blk00000003/sig00000624 ; + wire \blk00000003/sig00000623 ; + wire \blk00000003/sig00000622 ; + wire \blk00000003/sig00000621 ; + wire \blk00000003/sig00000620 ; + wire \blk00000003/sig0000061f ; + wire \blk00000003/sig0000061e ; + wire \blk00000003/sig0000061d ; + wire \blk00000003/sig0000061c ; + wire \blk00000003/sig0000061b ; + wire \blk00000003/sig0000061a ; + wire \blk00000003/sig00000619 ; + wire \blk00000003/sig00000618 ; + wire \blk00000003/sig00000617 ; + wire \blk00000003/sig00000616 ; + wire \blk00000003/sig00000615 ; + wire \blk00000003/sig00000614 ; + wire \blk00000003/sig00000613 ; + wire \blk00000003/sig00000612 ; + wire \blk00000003/sig00000611 ; + wire \blk00000003/sig00000610 ; + wire \blk00000003/sig0000060f ; + wire \blk00000003/sig0000060e ; + wire \blk00000003/sig0000060d ; + wire \blk00000003/sig0000060c ; + wire \blk00000003/sig0000060b ; + wire \blk00000003/sig0000060a ; + wire \blk00000003/sig00000609 ; + wire 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\NLW_blk00000003/blk000005fc_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk000005fa_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk000005f8_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk000005f6_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk000005f4_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk000005f2_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk000005f0_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk000005ee_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk000005ec_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk000005ea_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk000005e8_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk000005e6_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk000005e4_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk000005e2_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk000005e0_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk000005de_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk000005dc_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk000005da_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk000005d8_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk000005d6_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk000005d4_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk000005d2_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk000005d0_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk000005ce_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk000005cc_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk000005ca_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk000005c8_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk000005c6_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk000005c4_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk000005c2_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk000005c0_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk000005be_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk000005bc_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk000005ba_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk000005b8_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk000005b6_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk000005b4_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk000005b2_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk000005b0_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk000005ae_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk000005ac_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk000005aa_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk000005a8_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk000005a6_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk000005a4_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk000005a2_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk000005a0_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk0000059e_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk0000059c_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk0000059a_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000598_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000596_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000594_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000592_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000590_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk0000058e_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk0000058c_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk0000058a_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000588_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000586_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000584_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000582_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000580_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk0000057e_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk0000057c_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk0000057a_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000578_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000576_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000574_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000572_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000570_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk0000056e_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk0000056c_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk0000056a_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000568_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000566_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000564_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000562_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000560_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk0000055e_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk0000055c_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk0000055a_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000558_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000556_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000554_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000552_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000550_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk0000054e_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk0000054c_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk0000054a_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000548_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000546_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000544_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000542_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000540_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk0000053e_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk0000053c_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk0000053a_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000538_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000536_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000534_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000532_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000530_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk0000052e_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk0000052c_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk0000052a_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000528_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000526_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000524_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000522_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000520_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk0000051e_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk0000051c_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk0000051a_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000518_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000516_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000514_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000512_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000510_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk0000050e_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk0000050c_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk0000050a_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000508_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000506_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000504_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000409_O_UNCONNECTED ; + wire \NLW_blk00000003/blk00000409_LO_UNCONNECTED ; + wire \NLW_blk00000003/blk0000039d_O_UNCONNECTED ; + wire \NLW_blk00000003/blk0000039d_LO_UNCONNECTED ; + wire \NLW_blk00000003/blk00000107_PATTERNBDETECT_UNCONNECTED ; + wire \NLW_blk00000003/blk00000107_MULTSIGNOUT_UNCONNECTED ; + wire \NLW_blk00000003/blk00000107_CARRYCASCOUT_UNCONNECTED ; + wire \NLW_blk00000003/blk00000107_UNDERFLOW_UNCONNECTED ; + wire \NLW_blk00000003/blk00000107_PATTERNDETECT_UNCONNECTED ; + wire \NLW_blk00000003/blk00000107_OVERFLOW_UNCONNECTED ; + wire \NLW_blk00000003/blk00000107_ACOUT<29>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000107_ACOUT<28>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000107_ACOUT<27>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000107_ACOUT<26>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000107_ACOUT<25>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000107_ACOUT<24>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000107_ACOUT<23>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000107_ACOUT<22>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000107_ACOUT<21>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000107_ACOUT<20>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000107_ACOUT<19>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000107_ACOUT<18>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000107_ACOUT<17>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000107_ACOUT<16>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000107_ACOUT<15>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000107_ACOUT<14>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000107_ACOUT<13>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000107_ACOUT<12>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000107_ACOUT<11>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000107_ACOUT<10>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000107_ACOUT<9>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000107_ACOUT<8>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000107_ACOUT<7>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000107_ACOUT<6>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000107_ACOUT<5>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000107_ACOUT<4>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000107_ACOUT<3>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000107_ACOUT<2>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000107_ACOUT<1>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000107_ACOUT<0>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000107_CARRYOUT<3>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000107_CARRYOUT<2>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000107_CARRYOUT<1>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000107_CARRYOUT<0>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000107_BCOUT<17>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000107_BCOUT<16>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000107_BCOUT<15>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000107_BCOUT<14>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000107_BCOUT<13>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000107_BCOUT<12>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000107_BCOUT<11>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000107_BCOUT<10>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000107_BCOUT<9>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000107_BCOUT<8>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000107_BCOUT<7>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000107_BCOUT<6>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000107_BCOUT<5>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000107_BCOUT<4>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000107_BCOUT<3>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000107_BCOUT<2>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000107_BCOUT<1>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000107_BCOUT<0>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000107_P<47>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000107_P<46>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000107_P<45>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000107_P<44>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000107_P<43>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000107_P<42>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000107_P<41>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000107_P<40>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000107_P<39>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000107_P<38>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000107_P<37>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000107_P<36>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000107_P<35>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000107_P<34>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000107_P<33>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000107_P<32>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000107_P<31>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000107_P<30>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000107_P<29>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000107_P<28>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000107_P<27>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000107_P<26>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000107_P<25>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000107_P<24>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000107_P<23>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000107_P<22>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000107_P<21>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000107_P<20>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000107_P<19>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000107_P<18>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000107_P<17>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000107_P<16>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000107_P<15>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000107_P<14>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000107_P<13>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000107_P<12>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000107_P<11>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000107_P<10>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000107_P<9>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000107_P<8>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000107_P<7>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000107_P<6>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000107_P<5>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000107_P<4>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000107_P<3>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000107_P<2>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000107_P<1>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000107_P<0>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000106_PATTERNBDETECT_UNCONNECTED ; + wire \NLW_blk00000003/blk00000106_MULTSIGNOUT_UNCONNECTED ; + wire \NLW_blk00000003/blk00000106_CARRYCASCOUT_UNCONNECTED ; + wire \NLW_blk00000003/blk00000106_UNDERFLOW_UNCONNECTED ; + wire \NLW_blk00000003/blk00000106_PATTERNDETECT_UNCONNECTED ; + wire \NLW_blk00000003/blk00000106_OVERFLOW_UNCONNECTED ; + wire \NLW_blk00000003/blk00000106_ACOUT<29>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000106_ACOUT<28>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000106_ACOUT<27>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000106_ACOUT<26>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000106_ACOUT<25>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000106_ACOUT<24>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000106_ACOUT<23>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000106_ACOUT<22>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000106_ACOUT<21>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000106_ACOUT<20>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000106_ACOUT<19>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000106_ACOUT<18>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000106_ACOUT<17>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000106_ACOUT<16>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000106_ACOUT<15>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000106_ACOUT<14>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000106_ACOUT<13>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000106_ACOUT<12>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000106_ACOUT<11>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000106_ACOUT<10>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000106_ACOUT<9>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000106_ACOUT<8>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000106_ACOUT<7>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000106_ACOUT<6>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000106_ACOUT<5>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000106_ACOUT<4>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000106_ACOUT<3>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000106_ACOUT<2>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000106_ACOUT<1>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000106_ACOUT<0>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000106_CARRYOUT<3>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000106_CARRYOUT<2>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000106_CARRYOUT<1>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000106_CARRYOUT<0>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000106_BCOUT<17>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000106_BCOUT<16>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000106_BCOUT<15>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000106_BCOUT<14>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000106_BCOUT<13>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000106_BCOUT<12>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000106_BCOUT<11>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000106_BCOUT<10>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000106_BCOUT<9>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000106_BCOUT<8>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000106_BCOUT<7>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000106_BCOUT<6>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000106_BCOUT<5>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000106_BCOUT<4>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000106_BCOUT<3>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000106_BCOUT<2>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000106_BCOUT<1>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000106_BCOUT<0>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000106_P<47>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000106_P<46>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000106_P<45>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000106_P<44>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000106_P<43>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000106_P<42>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000106_P<41>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000106_P<40>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000106_P<39>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000106_P<38>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000106_P<37>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000106_P<36>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000106_P<35>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000106_P<34>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000106_P<33>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000106_P<32>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000106_P<31>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000106_P<30>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000106_P<29>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000106_P<28>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000106_P<27>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000106_P<26>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000106_P<25>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000106_P<24>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000106_P<23>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000106_P<22>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000106_P<21>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000106_P<20>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000106_P<19>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000106_P<18>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000106_P<17>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000106_P<16>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000106_P<15>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000106_P<14>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000106_P<13>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000106_P<12>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000106_P<11>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000106_P<10>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000106_P<9>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000106_P<8>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000106_P<7>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000106_P<6>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000106_P<5>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000106_P<4>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000106_P<3>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000106_P<2>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000106_P<1>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000106_P<0>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000105_PATTERNBDETECT_UNCONNECTED ; + wire \NLW_blk00000003/blk00000105_MULTSIGNOUT_UNCONNECTED ; + wire \NLW_blk00000003/blk00000105_CARRYCASCOUT_UNCONNECTED ; + wire \NLW_blk00000003/blk00000105_UNDERFLOW_UNCONNECTED ; + wire \NLW_blk00000003/blk00000105_PATTERNDETECT_UNCONNECTED ; + wire \NLW_blk00000003/blk00000105_OVERFLOW_UNCONNECTED ; + wire \NLW_blk00000003/blk00000105_ACOUT<29>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000105_ACOUT<28>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000105_ACOUT<27>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000105_ACOUT<26>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000105_ACOUT<25>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000105_ACOUT<24>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000105_ACOUT<23>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000105_ACOUT<22>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000105_ACOUT<21>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000105_ACOUT<20>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000105_ACOUT<19>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000105_ACOUT<18>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000105_ACOUT<17>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000105_ACOUT<16>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000105_ACOUT<15>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000105_ACOUT<14>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000105_ACOUT<13>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000105_ACOUT<12>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000105_ACOUT<11>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000105_ACOUT<10>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000105_ACOUT<9>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000105_ACOUT<8>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000105_ACOUT<7>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000105_ACOUT<6>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000105_ACOUT<5>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000105_ACOUT<4>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000105_ACOUT<3>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000105_ACOUT<2>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000105_ACOUT<1>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000105_ACOUT<0>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000105_CARRYOUT<3>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000105_CARRYOUT<2>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000105_CARRYOUT<1>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000105_CARRYOUT<0>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000105_BCOUT<17>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000105_BCOUT<16>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000105_BCOUT<15>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000105_BCOUT<14>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000105_BCOUT<13>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000105_BCOUT<12>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000105_BCOUT<11>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000105_BCOUT<10>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000105_BCOUT<9>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000105_BCOUT<8>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000105_BCOUT<7>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000105_BCOUT<6>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000105_BCOUT<5>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000105_BCOUT<4>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000105_BCOUT<3>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000105_BCOUT<2>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000105_BCOUT<1>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000105_BCOUT<0>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000105_P<47>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000105_P<46>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000105_P<45>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000105_P<44>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000105_P<43>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000105_P<42>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000105_P<41>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000105_P<40>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000105_P<39>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000105_P<38>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000105_P<37>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000105_P<36>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000105_P<35>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000105_P<34>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000105_P<33>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000105_P<32>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000105_P<31>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000105_P<30>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000105_P<29>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000105_P<28>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000105_P<27>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000105_P<26>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000105_P<25>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000105_P<24>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000105_P<23>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000105_P<22>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000105_P<21>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000105_P<20>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000105_P<19>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000105_P<18>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000105_P<17>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000105_P<16>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000105_P<15>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000105_P<14>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000105_P<13>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000105_P<12>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000105_P<11>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000105_P<10>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000105_P<9>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000105_P<8>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000105_P<7>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000105_P<6>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000105_P<5>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000105_P<4>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000105_P<3>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000105_P<2>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000105_P<1>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000105_P<0>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000104_PATTERNBDETECT_UNCONNECTED ; + wire \NLW_blk00000003/blk00000104_MULTSIGNOUT_UNCONNECTED ; + wire \NLW_blk00000003/blk00000104_CARRYCASCOUT_UNCONNECTED ; + wire \NLW_blk00000003/blk00000104_UNDERFLOW_UNCONNECTED ; + wire \NLW_blk00000003/blk00000104_PATTERNDETECT_UNCONNECTED ; + wire \NLW_blk00000003/blk00000104_OVERFLOW_UNCONNECTED ; + wire \NLW_blk00000003/blk00000104_ACOUT<29>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000104_ACOUT<28>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000104_ACOUT<27>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000104_ACOUT<26>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000104_ACOUT<25>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000104_ACOUT<24>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000104_ACOUT<23>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000104_ACOUT<22>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000104_ACOUT<21>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000104_ACOUT<20>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000104_ACOUT<19>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000104_ACOUT<18>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000104_ACOUT<17>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000104_ACOUT<16>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000104_ACOUT<15>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000104_ACOUT<14>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000104_ACOUT<13>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000104_ACOUT<12>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000104_ACOUT<11>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000104_ACOUT<10>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000104_ACOUT<9>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000104_ACOUT<8>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000104_ACOUT<7>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000104_ACOUT<6>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000104_ACOUT<5>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000104_ACOUT<4>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000104_ACOUT<3>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000104_ACOUT<2>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000104_ACOUT<1>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000104_ACOUT<0>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000104_CARRYOUT<3>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000104_CARRYOUT<2>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000104_CARRYOUT<1>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000104_CARRYOUT<0>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000104_BCOUT<17>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000104_BCOUT<16>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000104_BCOUT<15>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000104_BCOUT<14>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000104_BCOUT<13>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000104_BCOUT<12>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000104_BCOUT<11>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000104_BCOUT<10>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000104_BCOUT<9>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000104_BCOUT<8>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000104_BCOUT<7>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000104_BCOUT<6>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000104_BCOUT<5>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000104_BCOUT<4>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000104_BCOUT<3>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000104_BCOUT<2>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000104_BCOUT<1>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000104_BCOUT<0>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000104_P<47>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000104_P<46>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000104_P<45>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000104_P<44>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000104_P<43>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000104_P<42>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000104_P<41>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000104_P<40>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000104_P<39>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000104_P<38>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000104_P<37>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000104_P<36>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000104_P<35>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000104_P<34>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000104_P<33>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000104_P<32>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000104_P<31>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000104_P<30>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000104_P<29>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000104_P<28>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000104_P<27>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000104_P<26>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000104_P<25>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000104_P<24>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000104_P<23>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000104_P<22>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000104_P<21>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000104_P<20>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000104_P<19>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000104_P<18>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000104_P<17>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000104_P<16>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000104_P<15>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000104_P<14>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000104_P<13>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000104_P<12>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000104_P<11>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000104_P<10>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000104_P<9>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000104_P<8>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000104_P<7>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000104_P<6>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000104_P<5>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000104_P<4>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000104_P<3>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000104_P<2>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000104_P<1>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000104_P<0>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000fe_O_UNCONNECTED ; + wire \NLW_blk00000003/blk000000fe_LO_UNCONNECTED ; + wire \NLW_blk00000003/blk000000f8_O_UNCONNECTED ; + wire \NLW_blk00000003/blk000000f8_LO_UNCONNECTED ; + wire \NLW_blk00000003/blk000000f2_O_UNCONNECTED ; + wire \NLW_blk00000003/blk000000f2_LO_UNCONNECTED ; + wire \NLW_blk00000003/blk000000eb_O_UNCONNECTED ; + wire \NLW_blk00000003/blk000000eb_LO_UNCONNECTED ; + wire \NLW_blk00000003/blk000000e7_O_UNCONNECTED ; + wire \NLW_blk00000003/blk000000e7_LO_UNCONNECTED ; + wire \NLW_blk00000003/blk000000e2_O_UNCONNECTED ; + wire \NLW_blk00000003/blk000000e1_LO_UNCONNECTED ; + wire \NLW_blk00000003/blk000000dd_O_UNCONNECTED ; + wire \NLW_blk00000003/blk000000dd_LO_UNCONNECTED ; + wire \NLW_blk00000003/blk000000d8_LO_UNCONNECTED ; + wire \NLW_blk00000003/blk000000d7_LO_UNCONNECTED ; + wire \NLW_blk00000003/blk000000d6_LO_UNCONNECTED ; + wire \NLW_blk00000003/blk000000d5_LO_UNCONNECTED ; + wire \NLW_blk00000003/blk000000d4_LO_UNCONNECTED ; + wire \NLW_blk00000003/blk000000d3_O_UNCONNECTED ; + wire \NLW_blk00000003/blk000000cf_LO_UNCONNECTED ; + wire \NLW_blk00000003/blk000000ce_LO_UNCONNECTED ; + wire \NLW_blk00000003/blk000000cd_LO_UNCONNECTED ; + wire \NLW_blk00000003/blk000000cc_LO_UNCONNECTED ; + wire \NLW_blk00000003/blk000000cb_LO_UNCONNECTED ; + wire \NLW_blk00000003/blk000000ca_O_UNCONNECTED ; + wire \NLW_blk00000003/blk000000c9_LO_UNCONNECTED ; + wire \NLW_blk00000003/blk000000c2_O_UNCONNECTED ; + wire \NLW_blk00000003/blk000000c2_LO_UNCONNECTED ; + wire \NLW_blk00000003/blk000000bd_O_UNCONNECTED ; + wire \NLW_blk00000003/blk000000bd_LO_UNCONNECTED ; + wire \NLW_blk00000003/blk000000b8_O_UNCONNECTED ; + wire \NLW_blk00000003/blk000000b8_LO_UNCONNECTED ; + wire \NLW_blk00000003/blk000000b2_O_UNCONNECTED ; + wire \NLW_blk00000003/blk000000b2_LO_UNCONNECTED ; + wire \NLW_blk00000003/blk000000a0_Q_UNCONNECTED ; + wire \NLW_blk00000003/blk0000009e_Q_UNCONNECTED ; + wire \NLW_blk00000003/blk00000096_LO_UNCONNECTED ; + wire \NLW_blk00000003/blk00000095_O_UNCONNECTED ; + wire \NLW_blk00000003/blk00000094_O_UNCONNECTED ; + wire \NLW_blk00000003/blk00000093_LO_UNCONNECTED ; + wire \NLW_blk00000003/blk00000092_O_UNCONNECTED ; + wire \NLW_blk00000003/blk00000090_O_UNCONNECTED ; + wire \NLW_blk00000003/blk0000008f_LO_UNCONNECTED ; + wire \NLW_blk00000003/blk00000019_Q_UNCONNECTED ; + wire \NLW_blk00000003/blk00000014_Q_UNCONNECTED ; + wire \NLW_blk00000003/blk00000010_O_UNCONNECTED ; + wire \NLW_blk00000003/blk0000000f_PATTERNBDETECT_UNCONNECTED ; + wire \NLW_blk00000003/blk0000000f_MULTSIGNOUT_UNCONNECTED ; + wire \NLW_blk00000003/blk0000000f_CARRYCASCOUT_UNCONNECTED ; + wire \NLW_blk00000003/blk0000000f_UNDERFLOW_UNCONNECTED ; + wire \NLW_blk00000003/blk0000000f_PATTERNDETECT_UNCONNECTED ; + wire \NLW_blk00000003/blk0000000f_OVERFLOW_UNCONNECTED ; + wire \NLW_blk00000003/blk0000000f_ACOUT<29>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000000f_ACOUT<28>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000000f_ACOUT<27>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000000f_ACOUT<26>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000000f_ACOUT<25>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000000f_ACOUT<24>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000000f_ACOUT<23>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000000f_ACOUT<22>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000000f_ACOUT<21>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000000f_ACOUT<20>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000000f_ACOUT<19>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000000f_ACOUT<18>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000000f_ACOUT<17>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000000f_ACOUT<16>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000000f_ACOUT<15>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000000f_ACOUT<14>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000000f_ACOUT<13>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000000f_ACOUT<12>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000000f_ACOUT<11>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000000f_ACOUT<10>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000000f_ACOUT<9>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000000f_ACOUT<8>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000000f_ACOUT<7>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000000f_ACOUT<6>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000000f_ACOUT<5>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000000f_ACOUT<4>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000000f_ACOUT<3>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000000f_ACOUT<2>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000000f_ACOUT<1>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000000f_ACOUT<0>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000000f_CARRYOUT<3>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000000f_CARRYOUT<2>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000000f_CARRYOUT<1>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000000f_CARRYOUT<0>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000000f_BCOUT<17>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000000f_BCOUT<16>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000000f_BCOUT<15>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000000f_BCOUT<14>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000000f_BCOUT<13>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000000f_BCOUT<12>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000000f_BCOUT<11>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000000f_BCOUT<10>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000000f_BCOUT<9>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000000f_BCOUT<8>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000000f_BCOUT<7>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000000f_BCOUT<6>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000000f_BCOUT<5>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000000f_BCOUT<4>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000000f_BCOUT<3>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000000f_BCOUT<2>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000000f_BCOUT<1>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000000f_BCOUT<0>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000000f_PCOUT<47>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000000f_PCOUT<46>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000000f_PCOUT<45>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000000f_PCOUT<44>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000000f_PCOUT<43>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000000f_PCOUT<42>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000000f_PCOUT<41>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000000f_PCOUT<40>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000000f_PCOUT<39>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000000f_PCOUT<38>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000000f_PCOUT<37>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000000f_PCOUT<36>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000000f_PCOUT<35>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000000f_PCOUT<34>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000000f_PCOUT<33>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000000f_PCOUT<32>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000000f_PCOUT<31>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000000f_PCOUT<30>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000000f_PCOUT<29>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000000f_PCOUT<28>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000000f_PCOUT<27>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000000f_PCOUT<26>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000000f_PCOUT<25>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000000f_PCOUT<24>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000000f_PCOUT<23>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000000f_PCOUT<22>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000000f_PCOUT<21>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000000f_PCOUT<20>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000000f_PCOUT<19>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000000f_PCOUT<18>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000000f_PCOUT<17>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000000f_PCOUT<16>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000000f_PCOUT<15>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000000f_PCOUT<14>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000000f_PCOUT<13>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000000f_PCOUT<12>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000000f_PCOUT<11>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000000f_PCOUT<10>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000000f_PCOUT<9>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000000f_PCOUT<8>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000000f_PCOUT<7>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000000f_PCOUT<6>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000000f_PCOUT<5>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000000f_PCOUT<4>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000000f_PCOUT<3>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000000f_PCOUT<2>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000000f_PCOUT<1>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000000f_PCOUT<0>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000000e_PATTERNBDETECT_UNCONNECTED ; + wire \NLW_blk00000003/blk0000000e_MULTSIGNOUT_UNCONNECTED ; + wire \NLW_blk00000003/blk0000000e_CARRYCASCOUT_UNCONNECTED ; + wire \NLW_blk00000003/blk0000000e_UNDERFLOW_UNCONNECTED ; + wire \NLW_blk00000003/blk0000000e_PATTERNDETECT_UNCONNECTED ; + wire \NLW_blk00000003/blk0000000e_OVERFLOW_UNCONNECTED ; + wire \NLW_blk00000003/blk0000000e_ACOUT<29>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000000e_ACOUT<28>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000000e_ACOUT<27>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000000e_ACOUT<26>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000000e_ACOUT<25>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000000e_ACOUT<24>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000000e_ACOUT<23>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000000e_ACOUT<22>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000000e_ACOUT<21>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000000e_ACOUT<20>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000000e_ACOUT<19>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000000e_ACOUT<18>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000000e_ACOUT<17>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000000e_ACOUT<16>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000000e_ACOUT<15>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000000e_ACOUT<14>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000000e_ACOUT<13>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000000e_ACOUT<12>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000000e_ACOUT<11>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000000e_ACOUT<10>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000000e_ACOUT<9>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000000e_ACOUT<8>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000000e_ACOUT<7>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000000e_ACOUT<6>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000000e_ACOUT<5>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000000e_ACOUT<4>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000000e_ACOUT<3>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000000e_ACOUT<2>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000000e_ACOUT<1>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000000e_ACOUT<0>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000000e_CARRYOUT<3>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000000e_CARRYOUT<2>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000000e_CARRYOUT<1>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000000e_CARRYOUT<0>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000000e_BCOUT<17>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000000e_BCOUT<16>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000000e_BCOUT<15>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000000e_BCOUT<14>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000000e_BCOUT<13>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000000e_BCOUT<12>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000000e_BCOUT<11>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000000e_BCOUT<10>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000000e_BCOUT<9>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000000e_BCOUT<8>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000000e_BCOUT<7>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000000e_BCOUT<6>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000000e_BCOUT<5>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000000e_BCOUT<4>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000000e_BCOUT<3>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000000e_BCOUT<2>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000000e_BCOUT<1>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000000e_BCOUT<0>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000000e_PCOUT<47>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000000e_PCOUT<46>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000000e_PCOUT<45>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000000e_PCOUT<44>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000000e_PCOUT<43>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000000e_PCOUT<42>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000000e_PCOUT<41>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000000e_PCOUT<40>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000000e_PCOUT<39>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000000e_PCOUT<38>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000000e_PCOUT<37>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000000e_PCOUT<36>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000000e_PCOUT<35>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000000e_PCOUT<34>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000000e_PCOUT<33>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000000e_PCOUT<32>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000000e_PCOUT<31>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000000e_PCOUT<30>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000000e_PCOUT<29>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000000e_PCOUT<28>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000000e_PCOUT<27>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000000e_PCOUT<26>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000000e_PCOUT<25>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000000e_PCOUT<24>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000000e_PCOUT<23>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000000e_PCOUT<22>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000000e_PCOUT<21>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000000e_PCOUT<20>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000000e_PCOUT<19>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000000e_PCOUT<18>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000000e_PCOUT<17>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000000e_PCOUT<16>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000000e_PCOUT<15>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000000e_PCOUT<14>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000000e_PCOUT<13>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000000e_PCOUT<12>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000000e_PCOUT<11>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000000e_PCOUT<10>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000000e_PCOUT<9>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000000e_PCOUT<8>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000000e_PCOUT<7>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000000e_PCOUT<6>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000000e_PCOUT<5>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000000e_PCOUT<4>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000000e_PCOUT<3>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000000e_PCOUT<2>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000000e_PCOUT<1>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000000e_PCOUT<0>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000000d_LO_UNCONNECTED ; + wire \NLW_blk00000003/blk0000000a_O_UNCONNECTED ; + wire \NLW_blk00000003/blk00000009_LO_UNCONNECTED ; + wire \NLW_blk00000003/blk0000002a/blk0000008b_SPO_UNCONNECTED ; + wire \NLW_blk00000003/blk0000002a/blk0000008a_SPO_UNCONNECTED ; + wire \NLW_blk00000003/blk0000002a/blk00000089_SPO_UNCONNECTED ; + wire \NLW_blk00000003/blk0000002a/blk00000088_SPO_UNCONNECTED ; + wire \NLW_blk00000003/blk0000002a/blk00000087_SPO_UNCONNECTED ; + wire \NLW_blk00000003/blk0000002a/blk00000086_SPO_UNCONNECTED ; + wire \NLW_blk00000003/blk0000002a/blk00000085_SPO_UNCONNECTED ; + wire \NLW_blk00000003/blk0000002a/blk00000084_SPO_UNCONNECTED ; + wire \NLW_blk00000003/blk0000002a/blk00000083_SPO_UNCONNECTED ; + wire \NLW_blk00000003/blk0000002a/blk00000082_SPO_UNCONNECTED ; + wire \NLW_blk00000003/blk0000002a/blk00000081_SPO_UNCONNECTED ; + wire \NLW_blk00000003/blk0000002a/blk00000080_SPO_UNCONNECTED ; + wire \NLW_blk00000003/blk0000002a/blk0000007f_SPO_UNCONNECTED ; + wire \NLW_blk00000003/blk0000002a/blk0000007e_SPO_UNCONNECTED ; + wire \NLW_blk00000003/blk0000002a/blk0000007d_SPO_UNCONNECTED ; + wire \NLW_blk00000003/blk0000002a/blk0000007c_SPO_UNCONNECTED ; + wire \NLW_blk00000003/blk0000002a/blk0000007b_SPO_UNCONNECTED ; + wire \NLW_blk00000003/blk0000002a/blk0000007a_SPO_UNCONNECTED ; + wire \NLW_blk00000003/blk0000002a/blk00000079_SPO_UNCONNECTED ; + wire \NLW_blk00000003/blk0000002a/blk00000078_SPO_UNCONNECTED ; + wire \NLW_blk00000003/blk0000002a/blk00000077_SPO_UNCONNECTED ; + wire \NLW_blk00000003/blk0000002a/blk00000076_SPO_UNCONNECTED ; + wire \NLW_blk00000003/blk0000002a/blk00000075_SPO_UNCONNECTED ; + wire \NLW_blk00000003/blk0000002a/blk00000074_SPO_UNCONNECTED ; + wire \NLW_blk00000003/blk0000002a/blk00000073_SPO_UNCONNECTED ; + wire \NLW_blk00000003/blk0000002a/blk00000072_SPO_UNCONNECTED ; + wire \NLW_blk00000003/blk0000002a/blk00000071_SPO_UNCONNECTED ; + wire \NLW_blk00000003/blk0000002a/blk00000070_SPO_UNCONNECTED ; + wire \NLW_blk00000003/blk0000002a/blk0000006f_SPO_UNCONNECTED ; + wire \NLW_blk00000003/blk0000002a/blk0000006e_SPO_UNCONNECTED ; + wire \NLW_blk00000003/blk0000002a/blk0000006d_SPO_UNCONNECTED ; + wire \NLW_blk00000003/blk0000002a/blk0000006c_SPO_UNCONNECTED ; + wire \NLW_blk00000003/blk0000002a/blk0000006b_SPO_UNCONNECTED ; + wire \NLW_blk00000003/blk0000002a/blk0000006a_SPO_UNCONNECTED ; + wire \NLW_blk00000003/blk0000002a/blk00000069_SPO_UNCONNECTED ; + wire \NLW_blk00000003/blk0000002a/blk00000068_SPO_UNCONNECTED ; + wire \NLW_blk00000003/blk0000002a/blk00000067_SPO_UNCONNECTED ; + wire \NLW_blk00000003/blk0000002a/blk00000066_SPO_UNCONNECTED ; + wire \NLW_blk00000003/blk0000002a/blk00000065_SPO_UNCONNECTED ; + wire \NLW_blk00000003/blk0000002a/blk00000064_SPO_UNCONNECTED ; + wire \NLW_blk00000003/blk0000002a/blk00000063_SPO_UNCONNECTED ; + wire \NLW_blk00000003/blk0000002a/blk00000062_SPO_UNCONNECTED ; + wire \NLW_blk00000003/blk0000002a/blk00000061_SPO_UNCONNECTED ; + wire \NLW_blk00000003/blk0000002a/blk00000060_SPO_UNCONNECTED ; + wire \NLW_blk00000003/blk0000002a/blk0000005f_SPO_UNCONNECTED ; + wire \NLW_blk00000003/blk0000002a/blk0000005e_SPO_UNCONNECTED ; + wire \NLW_blk00000003/blk0000002a/blk0000005d_SPO_UNCONNECTED ; + wire \NLW_blk00000003/blk0000002a/blk0000005c_SPO_UNCONNECTED ; + wire \NLW_blk00000003/blk00000119/blk0000014a_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000119/blk00000149_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000119/blk00000148_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000119/blk00000147_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000119/blk00000146_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000119/blk00000145_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000119/blk00000144_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000119/blk00000143_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000119/blk00000142_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000119/blk00000141_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000119/blk00000140_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000119/blk0000013f_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000119/blk0000013e_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000119/blk0000013d_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000119/blk0000013c_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000119/blk0000013b_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000119/blk0000013a_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000119/blk00000139_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000119/blk00000138_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000119/blk00000137_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000119/blk00000136_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000119/blk00000135_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000119/blk00000134_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000119/blk00000133_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk0000014c/blk0000017d_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk0000014c/blk0000017c_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk0000014c/blk0000017b_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk0000014c/blk0000017a_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk0000014c/blk00000179_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk0000014c/blk00000178_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk0000014c/blk00000177_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk0000014c/blk00000176_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk0000014c/blk00000175_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk0000014c/blk00000174_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk0000014c/blk00000173_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk0000014c/blk00000172_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk0000014c/blk00000171_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk0000014c/blk00000170_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk0000014c/blk0000016f_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk0000014c/blk0000016e_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk0000014c/blk0000016d_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk0000014c/blk0000016c_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk0000014c/blk0000016b_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk0000014c/blk0000016a_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk0000014c/blk00000169_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk0000014c/blk00000168_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk0000014c/blk00000167_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk0000014c/blk00000166_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk0000017f/blk000001b0_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk0000017f/blk000001af_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk0000017f/blk000001ae_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk0000017f/blk000001ad_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk0000017f/blk000001ac_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk0000017f/blk000001ab_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk0000017f/blk000001aa_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk0000017f/blk000001a9_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk0000017f/blk000001a8_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk0000017f/blk000001a7_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk0000017f/blk000001a6_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk0000017f/blk000001a5_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk0000017f/blk000001a4_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk0000017f/blk000001a3_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk0000017f/blk000001a2_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk0000017f/blk000001a1_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk0000017f/blk000001a0_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk0000017f/blk0000019f_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk0000017f/blk0000019e_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk0000017f/blk0000019d_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk0000017f/blk0000019c_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk0000017f/blk0000019b_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk0000017f/blk0000019a_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk0000017f/blk00000199_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk000001b2/blk000001e3_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk000001b2/blk000001e2_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk000001b2/blk000001e1_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk000001b2/blk000001e0_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk000001b2/blk000001df_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk000001b2/blk000001de_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk000001b2/blk000001dd_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk000001b2/blk000001dc_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk000001b2/blk000001db_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk000001b2/blk000001da_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk000001b2/blk000001d9_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk000001b2/blk000001d8_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk000001b2/blk000001d7_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk000001b2/blk000001d6_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk000001b2/blk000001d5_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk000001b2/blk000001d4_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk000001b2/blk000001d3_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk000001b2/blk000001d2_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk000001b2/blk000001d1_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk000001b2/blk000001d0_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk000001b2/blk000001cf_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk000001b2/blk000001ce_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk000001b2/blk000001cd_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk000001b2/blk000001cc_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk000001e5/blk00000216_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk000001e5/blk00000215_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk000001e5/blk00000214_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk000001e5/blk00000213_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk000001e5/blk00000212_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk000001e5/blk00000211_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk000001e5/blk00000210_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk000001e5/blk0000020f_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk000001e5/blk0000020e_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk000001e5/blk0000020d_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk000001e5/blk0000020c_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk000001e5/blk0000020b_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk000001e5/blk0000020a_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk000001e5/blk00000209_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk000001e5/blk00000208_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk000001e5/blk00000207_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk000001e5/blk00000206_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk000001e5/blk00000205_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk000001e5/blk00000204_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk000001e5/blk00000203_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk000001e5/blk00000202_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk000001e5/blk00000201_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk000001e5/blk00000200_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk000001e5/blk000001ff_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000218/blk00000249_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000218/blk00000248_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000218/blk00000247_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000218/blk00000246_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000218/blk00000245_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000218/blk00000244_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000218/blk00000243_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000218/blk00000242_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000218/blk00000241_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000218/blk00000240_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000218/blk0000023f_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000218/blk0000023e_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000218/blk0000023d_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000218/blk0000023c_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000218/blk0000023b_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000218/blk0000023a_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000218/blk00000239_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000218/blk00000238_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000218/blk00000237_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000218/blk00000236_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000218/blk00000235_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000218/blk00000234_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000218/blk00000233_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000218/blk00000232_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk0000024b/blk0000027c_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk0000024b/blk0000027b_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk0000024b/blk0000027a_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk0000024b/blk00000279_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk0000024b/blk00000278_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk0000024b/blk00000277_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk0000024b/blk00000276_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk0000024b/blk00000275_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk0000024b/blk00000274_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk0000024b/blk00000273_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk0000024b/blk00000272_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk0000024b/blk00000271_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk0000024b/blk00000270_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk0000024b/blk0000026f_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk0000024b/blk0000026e_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk0000024b/blk0000026d_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk0000024b/blk0000026c_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk0000024b/blk0000026b_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk0000024b/blk0000026a_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk0000024b/blk00000269_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk0000024b/blk00000268_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk0000024b/blk00000267_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk0000024b/blk00000266_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk0000024b/blk00000265_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk0000027e/blk000002af_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk0000027e/blk000002ae_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk0000027e/blk000002ad_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk0000027e/blk000002ac_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk0000027e/blk000002ab_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk0000027e/blk000002aa_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk0000027e/blk000002a9_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk0000027e/blk000002a8_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk0000027e/blk000002a7_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk0000027e/blk000002a6_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk0000027e/blk000002a5_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk0000027e/blk000002a4_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk0000027e/blk000002a3_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk0000027e/blk000002a2_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk0000027e/blk000002a1_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk0000027e/blk000002a0_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk0000027e/blk0000029f_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk0000027e/blk0000029e_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk0000027e/blk0000029d_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk0000027e/blk0000029c_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk0000027e/blk0000029b_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk0000027e/blk0000029a_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk0000027e/blk00000299_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk0000027e/blk00000298_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk000002ea/blk0000030f_SPO_UNCONNECTED ; + wire \NLW_blk00000003/blk000002ea/blk0000030e_SPO_UNCONNECTED ; + wire \NLW_blk00000003/blk000002ea/blk0000030d_SPO_UNCONNECTED ; + wire \NLW_blk00000003/blk000002ea/blk0000030c_SPO_UNCONNECTED ; + wire \NLW_blk00000003/blk000002ea/blk0000030b_SPO_UNCONNECTED ; + wire \NLW_blk00000003/blk000002ea/blk0000030a_SPO_UNCONNECTED ; + wire \NLW_blk00000003/blk000002ea/blk00000309_SPO_UNCONNECTED ; + wire \NLW_blk00000003/blk000002ea/blk00000308_SPO_UNCONNECTED ; + wire \NLW_blk00000003/blk000002ea/blk00000307_SPO_UNCONNECTED ; + wire \NLW_blk00000003/blk000002ea/blk00000306_SPO_UNCONNECTED ; + wire \NLW_blk00000003/blk000002ea/blk00000305_SPO_UNCONNECTED ; + wire \NLW_blk00000003/blk000002ea/blk00000304_SPO_UNCONNECTED ; + wire \NLW_blk00000003/blk000002ea/blk00000303_SPO_UNCONNECTED ; + wire \NLW_blk00000003/blk000002ea/blk00000302_SPO_UNCONNECTED ; + wire \NLW_blk00000003/blk000002ea/blk00000301_SPO_UNCONNECTED ; + wire \NLW_blk00000003/blk000002ea/blk00000300_SPO_UNCONNECTED ; + wire \NLW_blk00000003/blk000002ea/blk000002ff_SPO_UNCONNECTED ; + wire \NLW_blk00000003/blk000002ea/blk000002fe_SPO_UNCONNECTED ; + wire \NLW_blk00000003/blk00000371/blk00000396_SPO_UNCONNECTED ; + wire \NLW_blk00000003/blk00000371/blk00000395_SPO_UNCONNECTED ; + wire \NLW_blk00000003/blk00000371/blk00000394_SPO_UNCONNECTED ; + wire \NLW_blk00000003/blk00000371/blk00000393_SPO_UNCONNECTED ; + wire \NLW_blk00000003/blk00000371/blk00000392_SPO_UNCONNECTED ; + wire \NLW_blk00000003/blk00000371/blk00000391_SPO_UNCONNECTED ; + wire \NLW_blk00000003/blk00000371/blk00000390_SPO_UNCONNECTED ; + wire \NLW_blk00000003/blk00000371/blk0000038f_SPO_UNCONNECTED ; + wire \NLW_blk00000003/blk00000371/blk0000038e_SPO_UNCONNECTED ; + wire \NLW_blk00000003/blk00000371/blk0000038d_SPO_UNCONNECTED ; + wire \NLW_blk00000003/blk00000371/blk0000038c_SPO_UNCONNECTED ; + wire \NLW_blk00000003/blk00000371/blk0000038b_SPO_UNCONNECTED ; + wire \NLW_blk00000003/blk00000371/blk0000038a_SPO_UNCONNECTED ; + wire \NLW_blk00000003/blk00000371/blk00000389_SPO_UNCONNECTED ; + wire \NLW_blk00000003/blk00000371/blk00000388_SPO_UNCONNECTED ; + wire \NLW_blk00000003/blk00000371/blk00000387_SPO_UNCONNECTED ; + wire \NLW_blk00000003/blk00000371/blk00000386_SPO_UNCONNECTED ; + wire \NLW_blk00000003/blk00000371/blk00000385_SPO_UNCONNECTED ; + wire [17 : 0] coef_din_0; + wire [23 : 0] din_1_1; + wire [23 : 0] din_2_2; + wire [47 : 0] NlwRenamedSig_OI_dout_1; + wire [47 : 0] NlwRenamedSig_OI_dout_2; + assign + rfd = NlwRenamedSig_OI_rfd, + dout_1[47] = NlwRenamedSig_OI_dout_1[47], + dout_1[46] = NlwRenamedSig_OI_dout_1[46], + dout_1[45] = NlwRenamedSig_OI_dout_1[45], + dout_1[44] = NlwRenamedSig_OI_dout_1[44], + dout_1[43] = NlwRenamedSig_OI_dout_1[43], + dout_1[42] = NlwRenamedSig_OI_dout_1[42], + dout_1[41] = NlwRenamedSig_OI_dout_1[41], + dout_1[40] = NlwRenamedSig_OI_dout_1[40], + dout_1[39] = NlwRenamedSig_OI_dout_1[39], + dout_1[38] = NlwRenamedSig_OI_dout_1[38], + dout_1[37] = NlwRenamedSig_OI_dout_1[37], + dout_1[36] = NlwRenamedSig_OI_dout_1[36], + dout_1[35] = NlwRenamedSig_OI_dout_1[35], + dout_1[34] = NlwRenamedSig_OI_dout_1[34], + dout_1[33] = NlwRenamedSig_OI_dout_1[33], + dout_1[32] = NlwRenamedSig_OI_dout_1[32], + dout_1[31] = NlwRenamedSig_OI_dout_1[31], + dout_1[30] = NlwRenamedSig_OI_dout_1[30], + dout_1[29] = NlwRenamedSig_OI_dout_1[29], + dout_1[28] = NlwRenamedSig_OI_dout_1[28], + dout_1[27] = NlwRenamedSig_OI_dout_1[27], + dout_1[26] = NlwRenamedSig_OI_dout_1[26], + dout_1[25] = NlwRenamedSig_OI_dout_1[25], + dout_1[24] = NlwRenamedSig_OI_dout_1[24], + dout_1[23] = NlwRenamedSig_OI_dout_1[23], + dout_1[22] = NlwRenamedSig_OI_dout_1[22], + dout_1[21] = NlwRenamedSig_OI_dout_1[21], + dout_1[20] = NlwRenamedSig_OI_dout_1[20], + dout_1[19] = NlwRenamedSig_OI_dout_1[19], + dout_1[18] = NlwRenamedSig_OI_dout_1[18], + dout_1[17] = NlwRenamedSig_OI_dout_1[17], + dout_1[16] = NlwRenamedSig_OI_dout_1[16], + dout_1[15] = NlwRenamedSig_OI_dout_1[15], + dout_1[14] = NlwRenamedSig_OI_dout_1[14], + dout_1[13] = NlwRenamedSig_OI_dout_1[13], + dout_1[12] = NlwRenamedSig_OI_dout_1[12], + dout_1[11] = NlwRenamedSig_OI_dout_1[11], + dout_1[10] = NlwRenamedSig_OI_dout_1[10], + dout_1[9] = NlwRenamedSig_OI_dout_1[9], + dout_1[8] = NlwRenamedSig_OI_dout_1[8], + dout_1[7] = NlwRenamedSig_OI_dout_1[7], + dout_1[6] = NlwRenamedSig_OI_dout_1[6], + dout_1[5] = NlwRenamedSig_OI_dout_1[5], + dout_1[4] = NlwRenamedSig_OI_dout_1[4], + dout_1[3] = NlwRenamedSig_OI_dout_1[3], + dout_1[2] = NlwRenamedSig_OI_dout_1[2], + dout_1[1] = NlwRenamedSig_OI_dout_1[1], + dout_1[0] = NlwRenamedSig_OI_dout_1[0], + dout_2[47] = NlwRenamedSig_OI_dout_2[47], + dout_2[46] = NlwRenamedSig_OI_dout_2[46], + dout_2[45] = NlwRenamedSig_OI_dout_2[45], + dout_2[44] = NlwRenamedSig_OI_dout_2[44], + dout_2[43] = NlwRenamedSig_OI_dout_2[43], + dout_2[42] = NlwRenamedSig_OI_dout_2[42], + dout_2[41] = NlwRenamedSig_OI_dout_2[41], + dout_2[40] = NlwRenamedSig_OI_dout_2[40], + dout_2[39] = NlwRenamedSig_OI_dout_2[39], + dout_2[38] = NlwRenamedSig_OI_dout_2[38], + dout_2[37] = NlwRenamedSig_OI_dout_2[37], + dout_2[36] = NlwRenamedSig_OI_dout_2[36], + dout_2[35] = NlwRenamedSig_OI_dout_2[35], + dout_2[34] = NlwRenamedSig_OI_dout_2[34], + dout_2[33] = NlwRenamedSig_OI_dout_2[33], + dout_2[32] = NlwRenamedSig_OI_dout_2[32], + dout_2[31] = NlwRenamedSig_OI_dout_2[31], + dout_2[30] = NlwRenamedSig_OI_dout_2[30], + dout_2[29] = NlwRenamedSig_OI_dout_2[29], + dout_2[28] = NlwRenamedSig_OI_dout_2[28], + dout_2[27] = NlwRenamedSig_OI_dout_2[27], + dout_2[26] = NlwRenamedSig_OI_dout_2[26], + dout_2[25] = NlwRenamedSig_OI_dout_2[25], + dout_2[24] = NlwRenamedSig_OI_dout_2[24], + dout_2[23] = NlwRenamedSig_OI_dout_2[23], + dout_2[22] = NlwRenamedSig_OI_dout_2[22], + dout_2[21] = NlwRenamedSig_OI_dout_2[21], + dout_2[20] = NlwRenamedSig_OI_dout_2[20], + dout_2[19] = NlwRenamedSig_OI_dout_2[19], + dout_2[18] = NlwRenamedSig_OI_dout_2[18], + dout_2[17] = NlwRenamedSig_OI_dout_2[17], + dout_2[16] = NlwRenamedSig_OI_dout_2[16], + dout_2[15] = NlwRenamedSig_OI_dout_2[15], + dout_2[14] = NlwRenamedSig_OI_dout_2[14], + dout_2[13] = NlwRenamedSig_OI_dout_2[13], + dout_2[12] = NlwRenamedSig_OI_dout_2[12], + dout_2[11] = NlwRenamedSig_OI_dout_2[11], + dout_2[10] = NlwRenamedSig_OI_dout_2[10], + dout_2[9] = NlwRenamedSig_OI_dout_2[9], + dout_2[8] = NlwRenamedSig_OI_dout_2[8], + dout_2[7] = NlwRenamedSig_OI_dout_2[7], + dout_2[6] = NlwRenamedSig_OI_dout_2[6], + dout_2[5] = NlwRenamedSig_OI_dout_2[5], + dout_2[4] = NlwRenamedSig_OI_dout_2[4], + dout_2[3] = NlwRenamedSig_OI_dout_2[3], + dout_2[2] = NlwRenamedSig_OI_dout_2[2], + dout_2[1] = NlwRenamedSig_OI_dout_2[1], + dout_2[0] = NlwRenamedSig_OI_dout_2[0], + din_1_1[23] = din_1[23], + din_1_1[22] = din_1[22], + din_1_1[21] = din_1[21], + din_1_1[20] = din_1[20], + din_1_1[19] = din_1[19], + din_1_1[18] = din_1[18], + din_1_1[17] = din_1[17], + din_1_1[16] = din_1[16], + din_1_1[15] = din_1[15], + din_1_1[14] = din_1[14], + din_1_1[13] = din_1[13], + din_1_1[12] = din_1[12], + din_1_1[11] = din_1[11], + din_1_1[10] = din_1[10], + din_1_1[9] = din_1[9], + din_1_1[8] = din_1[8], + din_1_1[7] = din_1[7], + din_1_1[6] = din_1[6], + din_1_1[5] = din_1[5], + din_1_1[4] = din_1[4], + din_1_1[3] = din_1[3], + din_1_1[2] = din_1[2], + din_1_1[1] = din_1[1], + din_1_1[0] = din_1[0], + din_2_2[23] = din_2[23], + din_2_2[22] = din_2[22], + din_2_2[21] = din_2[21], + din_2_2[20] = din_2[20], + din_2_2[19] = din_2[19], + din_2_2[18] = din_2[18], + din_2_2[17] = din_2[17], + din_2_2[16] = din_2[16], + din_2_2[15] = din_2[15], + din_2_2[14] = din_2[14], + din_2_2[13] = din_2[13], + din_2_2[12] = din_2[12], + din_2_2[11] = din_2[11], + din_2_2[10] = din_2[10], + din_2_2[9] = din_2[9], + din_2_2[8] = din_2[8], + din_2_2[7] = din_2[7], + din_2_2[6] = din_2[6], + din_2_2[5] = din_2[5], + din_2_2[4] = din_2[4], + din_2_2[3] = din_2[3], + din_2_2[2] = din_2[2], + din_2_2[1] = din_2[1], + din_2_2[0] = din_2[0], + coef_din_0[17] = coef_din[17], + coef_din_0[16] = coef_din[16], + coef_din_0[15] = coef_din[15], + coef_din_0[14] = coef_din[14], + coef_din_0[13] = coef_din[13], + coef_din_0[12] = coef_din[12], + coef_din_0[11] = coef_din[11], + coef_din_0[10] = coef_din[10], + coef_din_0[9] = coef_din[9], + coef_din_0[8] = coef_din[8], + coef_din_0[7] = coef_din[7], + coef_din_0[6] = coef_din[6], + coef_din_0[5] = coef_din[5], + coef_din_0[4] = coef_din[4], + coef_din_0[3] = coef_din[3], + coef_din_0[2] = coef_din[2], + coef_din_0[1] = coef_din[1], + coef_din_0[0] = coef_din[0]; + VCC blk00000001 ( + .P(NLW_blk00000001_P_UNCONNECTED) + ); + GND blk00000002 ( + .G(NLW_blk00000002_G_UNCONNECTED) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk0000065b ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig00000664 ), + .Q(\blk00000003/sig00000579 ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk0000065a ( + .A0(\blk00000003/sig000000ae ), + .A1(\blk00000003/sig000000ae ), + .A2(\blk00000003/sig00000049 ), + .A3(\blk00000003/sig00000049 ), + .CE(ce), + .CLK(clk), + .D(\blk00000003/sig00000434 ), + .Q(\blk00000003/sig00000664 ), + .Q15(\NLW_blk00000003/blk0000065a_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000659 ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig00000663 ), + .Q(\blk00000003/sig00000502 ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000658 ( + .A0(\blk00000003/sig00000049 ), + .A1(\blk00000003/sig00000049 ), + .A2(\blk00000003/sig000000ae ), + .A3(\blk00000003/sig00000049 ), + .CE(ce), + .CLK(clk), + .D(\blk00000003/sig0000042e ), + .Q(\blk00000003/sig00000663 ), + .Q15(\NLW_blk00000003/blk00000658_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000657 ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig00000662 ), + .Q(\blk00000003/sig000001c3 ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000656 ( + .A0(\blk00000003/sig000000ae ), + .A1(\blk00000003/sig000000ae ), + .A2(\blk00000003/sig00000049 ), + .A3(\blk00000003/sig00000049 ), + .CE(ce), + .CLK(clk), + .D(\blk00000003/sig00000630 ), + .Q(\blk00000003/sig00000662 ), + .Q15(\NLW_blk00000003/blk00000656_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000655 ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig00000661 ), + .Q(\blk00000003/sig000001c2 ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000654 ( + .A0(\blk00000003/sig000000ae ), + .A1(\blk00000003/sig000000ae ), + .A2(\blk00000003/sig00000049 ), + .A3(\blk00000003/sig00000049 ), + .CE(ce), + .CLK(clk), + .D(\blk00000003/sig0000062e ), + .Q(\blk00000003/sig00000661 ), + .Q15(\NLW_blk00000003/blk00000654_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000653 ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig00000660 ), + .Q(\blk00000003/sig000001c1 ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000652 ( + .A0(\blk00000003/sig000000ae ), + .A1(\blk00000003/sig000000ae ), + .A2(\blk00000003/sig00000049 ), + .A3(\blk00000003/sig00000049 ), + .CE(ce), + .CLK(clk), + .D(\blk00000003/sig0000062c ), + .Q(\blk00000003/sig00000660 ), + .Q15(\NLW_blk00000003/blk00000652_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000651 ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig0000065f ), + .Q(\blk00000003/sig000001c0 ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000650 ( + .A0(\blk00000003/sig000000ae ), + .A1(\blk00000003/sig000000ae ), + .A2(\blk00000003/sig00000049 ), + .A3(\blk00000003/sig00000049 ), + .CE(ce), + .CLK(clk), + .D(\blk00000003/sig0000062a ), + .Q(\blk00000003/sig0000065f ), + .Q15(\NLW_blk00000003/blk00000650_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk0000064f ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig0000065e ), + .Q(\blk00000003/sig000001be ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk0000064e ( + .A0(\blk00000003/sig000000ae ), + .A1(\blk00000003/sig000000ae ), + .A2(\blk00000003/sig00000049 ), + .A3(\blk00000003/sig00000049 ), + .CE(ce), + .CLK(clk), + .D(\blk00000003/sig00000628 ), + .Q(\blk00000003/sig0000065e ), + .Q15(\NLW_blk00000003/blk0000064e_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk0000064d ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig0000065d ), + .Q(\blk00000003/sig000001bd ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk0000064c ( + .A0(\blk00000003/sig000000ae ), + .A1(\blk00000003/sig000000ae ), + .A2(\blk00000003/sig00000049 ), + .A3(\blk00000003/sig00000049 ), + .CE(ce), + .CLK(clk), + .D(\blk00000003/sig00000626 ), + .Q(\blk00000003/sig0000065d ), + .Q15(\NLW_blk00000003/blk0000064c_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk0000064b ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig0000065c ), + .Q(\blk00000003/sig000001bf ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk0000064a ( + .A0(\blk00000003/sig000000ae ), + .A1(\blk00000003/sig000000ae ), + .A2(\blk00000003/sig00000049 ), + .A3(\blk00000003/sig00000049 ), + .CE(ce), + .CLK(clk), + .D(\blk00000003/sig00000624 ), + .Q(\blk00000003/sig0000065c ), + .Q15(\NLW_blk00000003/blk0000064a_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000649 ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig0000065b ), + .Q(\blk00000003/sig000001bc ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000648 ( + .A0(\blk00000003/sig000000ae ), + .A1(\blk00000003/sig000000ae ), + .A2(\blk00000003/sig00000049 ), + .A3(\blk00000003/sig00000049 ), + .CE(ce), + .CLK(clk), + .D(\blk00000003/sig0000061e ), + .Q(\blk00000003/sig0000065b ), + .Q15(\NLW_blk00000003/blk00000648_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000647 ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig0000065a ), + .Q(\blk00000003/sig000001bb ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000646 ( + .A0(\blk00000003/sig000000ae ), + .A1(\blk00000003/sig000000ae ), + .A2(\blk00000003/sig00000049 ), + .A3(\blk00000003/sig00000049 ), + .CE(ce), + .CLK(clk), + .D(\blk00000003/sig00000622 ), + .Q(\blk00000003/sig0000065a ), + .Q15(\NLW_blk00000003/blk00000646_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000645 ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig00000659 ), + .Q(\blk00000003/sig000001b9 ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000644 ( + .A0(\blk00000003/sig000000ae ), + .A1(\blk00000003/sig000000ae ), + .A2(\blk00000003/sig00000049 ), + .A3(\blk00000003/sig00000049 ), + .CE(ce), + .CLK(clk), + .D(\blk00000003/sig00000618 ), + .Q(\blk00000003/sig00000659 ), + .Q15(\NLW_blk00000003/blk00000644_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000643 ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig00000658 ), + .Q(\blk00000003/sig000001b8 ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000642 ( + .A0(\blk00000003/sig000000ae ), + .A1(\blk00000003/sig000000ae ), + .A2(\blk00000003/sig00000049 ), + .A3(\blk00000003/sig00000049 ), + .CE(ce), + .CLK(clk), + .D(\blk00000003/sig0000061c ), + .Q(\blk00000003/sig00000658 ), + .Q15(\NLW_blk00000003/blk00000642_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000641 ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig00000657 ), + .Q(\blk00000003/sig000001ba ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000640 ( + .A0(\blk00000003/sig000000ae ), + .A1(\blk00000003/sig000000ae ), + .A2(\blk00000003/sig00000049 ), + .A3(\blk00000003/sig00000049 ), + .CE(ce), + .CLK(clk), + .D(\blk00000003/sig00000620 ), + .Q(\blk00000003/sig00000657 ), + .Q15(\NLW_blk00000003/blk00000640_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk0000063f ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig00000656 ), + .Q(\blk00000003/sig000001b6 ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk0000063e ( + .A0(\blk00000003/sig000000ae ), + .A1(\blk00000003/sig000000ae ), + .A2(\blk00000003/sig00000049 ), + .A3(\blk00000003/sig00000049 ), + .CE(ce), + .CLK(clk), + .D(\blk00000003/sig00000616 ), + .Q(\blk00000003/sig00000656 ), + .Q15(\NLW_blk00000003/blk0000063e_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk0000063d ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig00000655 ), + .Q(\blk00000003/sig000001b5 ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk0000063c ( + .A0(\blk00000003/sig000000ae ), + .A1(\blk00000003/sig000000ae ), + .A2(\blk00000003/sig00000049 ), + .A3(\blk00000003/sig00000049 ), + .CE(ce), + .CLK(clk), + .D(\blk00000003/sig00000614 ), + .Q(\blk00000003/sig00000655 ), + .Q15(\NLW_blk00000003/blk0000063c_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk0000063b ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig00000654 ), + .Q(\blk00000003/sig000001b7 ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk0000063a ( + .A0(\blk00000003/sig000000ae ), + .A1(\blk00000003/sig000000ae ), + .A2(\blk00000003/sig00000049 ), + .A3(\blk00000003/sig00000049 ), + .CE(ce), + .CLK(clk), + .D(\blk00000003/sig0000061a ), + .Q(\blk00000003/sig00000654 ), + .Q15(\NLW_blk00000003/blk0000063a_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000639 ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig00000653 ), + .Q(\blk00000003/sig000001b3 ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000638 ( + .A0(\blk00000003/sig000000ae ), + .A1(\blk00000003/sig000000ae ), + .A2(\blk00000003/sig00000049 ), + .A3(\blk00000003/sig00000049 ), + .CE(ce), + .CLK(clk), + .D(\blk00000003/sig00000612 ), + .Q(\blk00000003/sig00000653 ), + .Q15(\NLW_blk00000003/blk00000638_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000637 ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig00000652 ), + .Q(\blk00000003/sig000001b2 ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000636 ( + .A0(\blk00000003/sig000000ae ), + .A1(\blk00000003/sig000000ae ), + .A2(\blk00000003/sig00000049 ), + .A3(\blk00000003/sig00000049 ), + .CE(ce), + .CLK(clk), + .D(\blk00000003/sig00000610 ), + .Q(\blk00000003/sig00000652 ), + .Q15(\NLW_blk00000003/blk00000636_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000635 ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig00000651 ), + .Q(\blk00000003/sig000001b4 ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000634 ( + .A0(\blk00000003/sig000000ae ), + .A1(\blk00000003/sig000000ae ), + .A2(\blk00000003/sig00000049 ), + .A3(\blk00000003/sig00000049 ), + .CE(ce), + .CLK(clk), + .D(\blk00000003/sig0000060e ), + .Q(\blk00000003/sig00000651 ), + .Q15(\NLW_blk00000003/blk00000634_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000633 ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig00000650 ), + .Q(\blk00000003/sig000001b1 ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000632 ( + .A0(\blk00000003/sig000000ae ), + .A1(\blk00000003/sig000000ae ), + .A2(\blk00000003/sig00000049 ), + .A3(\blk00000003/sig00000049 ), + .CE(ce), + .CLK(clk), + .D(\blk00000003/sig00000608 ), + .Q(\blk00000003/sig00000650 ), + .Q15(\NLW_blk00000003/blk00000632_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000631 ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig0000064f ), + .Q(\blk00000003/sig000001b0 ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000630 ( + .A0(\blk00000003/sig000000ae ), + .A1(\blk00000003/sig000000ae ), + .A2(\blk00000003/sig00000049 ), + .A3(\blk00000003/sig00000049 ), + .CE(ce), + .CLK(clk), + .D(\blk00000003/sig0000060c ), + .Q(\blk00000003/sig0000064f ), + .Q15(\NLW_blk00000003/blk00000630_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk0000062f ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig0000064e ), + .Q(\blk00000003/sig000001ae ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk0000062e ( + .A0(\blk00000003/sig000000ae ), + .A1(\blk00000003/sig000000ae ), + .A2(\blk00000003/sig00000049 ), + .A3(\blk00000003/sig00000049 ), + .CE(ce), + .CLK(clk), + .D(\blk00000003/sig00000602 ), + .Q(\blk00000003/sig0000064e ), + .Q15(\NLW_blk00000003/blk0000062e_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk0000062d ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig0000064d ), + .Q(\blk00000003/sig000001ad ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk0000062c ( + .A0(\blk00000003/sig000000ae ), + .A1(\blk00000003/sig000000ae ), + .A2(\blk00000003/sig00000049 ), + .A3(\blk00000003/sig00000049 ), + .CE(ce), + .CLK(clk), + .D(\blk00000003/sig00000606 ), + .Q(\blk00000003/sig0000064d ), + .Q15(\NLW_blk00000003/blk0000062c_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk0000062b ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig0000064c ), + .Q(\blk00000003/sig000001af ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk0000062a ( + .A0(\blk00000003/sig000000ae ), + .A1(\blk00000003/sig000000ae ), + .A2(\blk00000003/sig00000049 ), + .A3(\blk00000003/sig00000049 ), + .CE(ce), + .CLK(clk), + .D(\blk00000003/sig0000060a ), + .Q(\blk00000003/sig0000064c ), + .Q15(\NLW_blk00000003/blk0000062a_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000629 ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig0000064b ), + .Q(\blk00000003/sig0000014b ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000628 ( + .A0(\blk00000003/sig000000ae ), + .A1(\blk00000003/sig000000ae ), + .A2(\blk00000003/sig00000049 ), + .A3(\blk00000003/sig00000049 ), + .CE(ce), + .CLK(clk), + .D(\blk00000003/sig00000600 ), + .Q(\blk00000003/sig0000064b ), + .Q15(\NLW_blk00000003/blk00000628_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000627 ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig0000064a ), + .Q(\blk00000003/sig0000014a ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000626 ( + .A0(\blk00000003/sig000000ae ), + .A1(\blk00000003/sig000000ae ), + .A2(\blk00000003/sig00000049 ), + .A3(\blk00000003/sig00000049 ), + .CE(ce), + .CLK(clk), + .D(\blk00000003/sig000005fe ), + .Q(\blk00000003/sig0000064a ), + .Q15(\NLW_blk00000003/blk00000626_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000625 ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig00000649 ), + .Q(\blk00000003/sig000001ac ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000624 ( + .A0(\blk00000003/sig000000ae ), + .A1(\blk00000003/sig000000ae ), + .A2(\blk00000003/sig00000049 ), + .A3(\blk00000003/sig00000049 ), + .CE(ce), + .CLK(clk), + .D(\blk00000003/sig00000604 ), + .Q(\blk00000003/sig00000649 ), + .Q15(\NLW_blk00000003/blk00000624_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000623 ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig00000648 ), + .Q(\blk00000003/sig00000148 ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000622 ( + .A0(\blk00000003/sig000000ae ), + .A1(\blk00000003/sig000000ae ), + .A2(\blk00000003/sig00000049 ), + .A3(\blk00000003/sig00000049 ), + .CE(ce), + .CLK(clk), + .D(\blk00000003/sig000005fc ), + .Q(\blk00000003/sig00000648 ), + .Q15(\NLW_blk00000003/blk00000622_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000621 ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig00000647 ), + .Q(\blk00000003/sig00000147 ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000620 ( + .A0(\blk00000003/sig000000ae ), + .A1(\blk00000003/sig000000ae ), + .A2(\blk00000003/sig00000049 ), + .A3(\blk00000003/sig00000049 ), + .CE(ce), + .CLK(clk), + .D(\blk00000003/sig000005fa ), + .Q(\blk00000003/sig00000647 ), + .Q15(\NLW_blk00000003/blk00000620_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk0000061f ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig00000646 ), + .Q(\blk00000003/sig00000149 ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk0000061e ( + .A0(\blk00000003/sig000000ae ), + .A1(\blk00000003/sig000000ae ), + .A2(\blk00000003/sig00000049 ), + .A3(\blk00000003/sig00000049 ), + .CE(ce), + .CLK(clk), + .D(\blk00000003/sig000005f8 ), + .Q(\blk00000003/sig00000646 ), + .Q15(\NLW_blk00000003/blk0000061e_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk0000061d ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig00000645 ), + .Q(\blk00000003/sig00000146 ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk0000061c ( + .A0(\blk00000003/sig000000ae ), + .A1(\blk00000003/sig000000ae ), + .A2(\blk00000003/sig00000049 ), + .A3(\blk00000003/sig00000049 ), + .CE(ce), + .CLK(clk), + .D(\blk00000003/sig000005f2 ), + .Q(\blk00000003/sig00000645 ), + .Q15(\NLW_blk00000003/blk0000061c_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk0000061b ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig00000644 ), + .Q(\blk00000003/sig00000145 ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk0000061a ( + .A0(\blk00000003/sig000000ae ), + .A1(\blk00000003/sig000000ae ), + .A2(\blk00000003/sig00000049 ), + .A3(\blk00000003/sig00000049 ), + .CE(ce), + .CLK(clk), + .D(\blk00000003/sig000005f6 ), + .Q(\blk00000003/sig00000644 ), + .Q15(\NLW_blk00000003/blk0000061a_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000619 ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig00000643 ), + .Q(\blk00000003/sig00000143 ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000618 ( + .A0(\blk00000003/sig000000ae ), + .A1(\blk00000003/sig000000ae ), + .A2(\blk00000003/sig00000049 ), + .A3(\blk00000003/sig00000049 ), + .CE(ce), + .CLK(clk), + .D(\blk00000003/sig000005ec ), + .Q(\blk00000003/sig00000643 ), + .Q15(\NLW_blk00000003/blk00000618_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000617 ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig00000642 ), + .Q(\blk00000003/sig00000142 ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000616 ( + .A0(\blk00000003/sig000000ae ), + .A1(\blk00000003/sig000000ae ), + .A2(\blk00000003/sig00000049 ), + .A3(\blk00000003/sig00000049 ), + .CE(ce), + .CLK(clk), + .D(\blk00000003/sig000005f0 ), + .Q(\blk00000003/sig00000642 ), + .Q15(\NLW_blk00000003/blk00000616_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000615 ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig00000641 ), + .Q(\blk00000003/sig00000144 ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000614 ( + .A0(\blk00000003/sig000000ae ), + .A1(\blk00000003/sig000000ae ), + .A2(\blk00000003/sig00000049 ), + .A3(\blk00000003/sig00000049 ), + .CE(ce), + .CLK(clk), + .D(\blk00000003/sig000005f4 ), + .Q(\blk00000003/sig00000641 ), + .Q15(\NLW_blk00000003/blk00000614_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000613 ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig00000640 ), + .Q(\blk00000003/sig00000140 ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000612 ( + .A0(\blk00000003/sig000000ae ), + .A1(\blk00000003/sig000000ae ), + .A2(\blk00000003/sig00000049 ), + .A3(\blk00000003/sig00000049 ), + .CE(ce), + .CLK(clk), + .D(\blk00000003/sig000005ea ), + .Q(\blk00000003/sig00000640 ), + .Q15(\NLW_blk00000003/blk00000612_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000611 ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig0000063f ), + .Q(\blk00000003/sig0000013f ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000610 ( + .A0(\blk00000003/sig000000ae ), + .A1(\blk00000003/sig000000ae ), + .A2(\blk00000003/sig00000049 ), + .A3(\blk00000003/sig00000049 ), + .CE(ce), + .CLK(clk), + .D(\blk00000003/sig000005e8 ), + .Q(\blk00000003/sig0000063f ), + .Q15(\NLW_blk00000003/blk00000610_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk0000060f ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig0000063e ), + .Q(\blk00000003/sig00000141 ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk0000060e ( + .A0(\blk00000003/sig000000ae ), + .A1(\blk00000003/sig000000ae ), + .A2(\blk00000003/sig00000049 ), + .A3(\blk00000003/sig00000049 ), + .CE(ce), + .CLK(clk), + .D(\blk00000003/sig000005ee ), + .Q(\blk00000003/sig0000063e ), + .Q15(\NLW_blk00000003/blk0000060e_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk0000060d ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig0000063d ), + .Q(\blk00000003/sig0000013d ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk0000060c ( + .A0(\blk00000003/sig000000ae ), + .A1(\blk00000003/sig000000ae ), + .A2(\blk00000003/sig00000049 ), + .A3(\blk00000003/sig00000049 ), + .CE(ce), + .CLK(clk), + .D(\blk00000003/sig000005e6 ), + .Q(\blk00000003/sig0000063d ), + .Q15(\NLW_blk00000003/blk0000060c_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk0000060b ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig0000063c ), + .Q(\blk00000003/sig0000013c ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk0000060a ( + .A0(\blk00000003/sig000000ae ), + .A1(\blk00000003/sig000000ae ), + .A2(\blk00000003/sig00000049 ), + .A3(\blk00000003/sig00000049 ), + .CE(ce), + .CLK(clk), + .D(\blk00000003/sig000005e4 ), + .Q(\blk00000003/sig0000063c ), + .Q15(\NLW_blk00000003/blk0000060a_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000609 ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig0000063b ), + .Q(\blk00000003/sig0000013e ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000608 ( + .A0(\blk00000003/sig000000ae ), + .A1(\blk00000003/sig000000ae ), + .A2(\blk00000003/sig00000049 ), + .A3(\blk00000003/sig00000049 ), + .CE(ce), + .CLK(clk), + .D(\blk00000003/sig000005e2 ), + .Q(\blk00000003/sig0000063b ), + .Q15(\NLW_blk00000003/blk00000608_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000607 ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig0000063a ), + .Q(\blk00000003/sig0000013b ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000606 ( + .A0(\blk00000003/sig000000ae ), + .A1(\blk00000003/sig000000ae ), + .A2(\blk00000003/sig00000049 ), + .A3(\blk00000003/sig00000049 ), + .CE(ce), + .CLK(clk), + .D(\blk00000003/sig000005e0 ), + .Q(\blk00000003/sig0000063a ), + .Q15(\NLW_blk00000003/blk00000606_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000605 ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig00000639 ), + .Q(\blk00000003/sig0000013a ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000604 ( + .A0(\blk00000003/sig000000ae ), + .A1(\blk00000003/sig000000ae ), + .A2(\blk00000003/sig00000049 ), + .A3(\blk00000003/sig00000049 ), + .CE(ce), + .CLK(clk), + .D(\blk00000003/sig000005de ), + .Q(\blk00000003/sig00000639 ), + .Q15(\NLW_blk00000003/blk00000604_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000603 ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig00000638 ), + .Q(\blk00000003/sig00000138 ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000602 ( + .A0(\blk00000003/sig000000ae ), + .A1(\blk00000003/sig000000ae ), + .A2(\blk00000003/sig00000049 ), + .A3(\blk00000003/sig00000049 ), + .CE(ce), + .CLK(clk), + .D(\blk00000003/sig000005dc ), + .Q(\blk00000003/sig00000638 ), + .Q15(\NLW_blk00000003/blk00000602_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000601 ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig00000637 ), + .Q(\blk00000003/sig00000137 ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000600 ( + .A0(\blk00000003/sig000000ae ), + .A1(\blk00000003/sig000000ae ), + .A2(\blk00000003/sig00000049 ), + .A3(\blk00000003/sig00000049 ), + .CE(ce), + .CLK(clk), + .D(\blk00000003/sig000005da ), + .Q(\blk00000003/sig00000637 ), + .Q15(\NLW_blk00000003/blk00000600_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000005ff ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig00000636 ), + .Q(\blk00000003/sig00000139 ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk000005fe ( + .A0(\blk00000003/sig000000ae ), + .A1(\blk00000003/sig000000ae ), + .A2(\blk00000003/sig00000049 ), + .A3(\blk00000003/sig00000049 ), + .CE(ce), + .CLK(clk), + .D(\blk00000003/sig000005d8 ), + .Q(\blk00000003/sig00000636 ), + .Q15(\NLW_blk00000003/blk000005fe_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000005fd ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig00000635 ), + .Q(\blk00000003/sig00000136 ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk000005fc ( + .A0(\blk00000003/sig000000ae ), + .A1(\blk00000003/sig000000ae ), + .A2(\blk00000003/sig00000049 ), + .A3(\blk00000003/sig00000049 ), + .CE(ce), + .CLK(clk), + .D(\blk00000003/sig000005d6 ), + .Q(\blk00000003/sig00000635 ), + .Q15(\NLW_blk00000003/blk000005fc_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000005fb ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig00000634 ), + .Q(\blk00000003/sig00000135 ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk000005fa ( + .A0(\blk00000003/sig000000ae ), + .A1(\blk00000003/sig000000ae ), + .A2(\blk00000003/sig00000049 ), + .A3(\blk00000003/sig00000049 ), + .CE(ce), + .CLK(clk), + .D(\blk00000003/sig000005d4 ), + .Q(\blk00000003/sig00000634 ), + .Q15(\NLW_blk00000003/blk000005fa_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000005f9 ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig00000633 ), + .Q(\blk00000003/sig00000134 ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk000005f8 ( + .A0(\blk00000003/sig000000ae ), + .A1(\blk00000003/sig000000ae ), + .A2(\blk00000003/sig00000049 ), + .A3(\blk00000003/sig00000049 ), + .CE(ce), + .CLK(clk), + .D(\blk00000003/sig000005d0 ), + .Q(\blk00000003/sig00000633 ), + .Q15(\NLW_blk00000003/blk000005f8_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000005f7 ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig00000632 ), + .Q(\blk00000003/sig00000434 ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk000005f6 ( + .A0(\blk00000003/sig00000049 ), + .A1(\blk00000003/sig00000049 ), + .A2(\blk00000003/sig00000049 ), + .A3(\blk00000003/sig00000049 ), + .CE(ce), + .CLK(clk), + .D(\blk00000003/sig000001e1 ), + .Q(\blk00000003/sig00000632 ), + .Q15(\NLW_blk00000003/blk000005f6_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000005f5 ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig00000631 ), + .Q(\blk00000003/sig0000057a ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk000005f4 ( + .A0(\blk00000003/sig00000049 ), + .A1(\blk00000003/sig00000049 ), + .A2(\blk00000003/sig00000049 ), + .A3(\blk00000003/sig000000ae ), + .CE(ce), + .CLK(clk), + .D(\blk00000003/sig000001c4 ), + .Q(\blk00000003/sig00000631 ), + .Q15(\NLW_blk00000003/blk000005f4_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000005f3 ( + .C(clk), + .CE(\blk00000003/sig00000582 ), + .D(\blk00000003/sig0000062f ), + .Q(\blk00000003/sig00000630 ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk000005f2 ( + .A0(\blk00000003/sig00000049 ), + .A1(\blk00000003/sig000000ae ), + .A2(\blk00000003/sig000000ae ), + .A3(\blk00000003/sig000000ae ), + .CE(\blk00000003/sig00000582 ), + .CLK(clk), + .D(\blk00000003/sig00000219 ), + .Q(\blk00000003/sig0000062f ), + .Q15(\NLW_blk00000003/blk000005f2_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000005f1 ( + .C(clk), + .CE(\blk00000003/sig00000582 ), + .D(\blk00000003/sig0000062d ), + .Q(\blk00000003/sig0000062e ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk000005f0 ( + .A0(\blk00000003/sig00000049 ), + .A1(\blk00000003/sig000000ae ), + .A2(\blk00000003/sig000000ae ), + .A3(\blk00000003/sig000000ae ), + .CE(\blk00000003/sig00000582 ), + .CLK(clk), + .D(\blk00000003/sig00000218 ), + .Q(\blk00000003/sig0000062d ), + .Q15(\NLW_blk00000003/blk000005f0_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000005ef ( + .C(clk), + .CE(\blk00000003/sig00000582 ), + .D(\blk00000003/sig0000062b ), + .Q(\blk00000003/sig0000062c ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk000005ee ( + .A0(\blk00000003/sig00000049 ), + .A1(\blk00000003/sig000000ae ), + .A2(\blk00000003/sig000000ae ), + .A3(\blk00000003/sig000000ae ), + .CE(\blk00000003/sig00000582 ), + .CLK(clk), + .D(\blk00000003/sig00000217 ), + .Q(\blk00000003/sig0000062b ), + .Q15(\NLW_blk00000003/blk000005ee_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000005ed ( + .C(clk), + .CE(\blk00000003/sig00000582 ), + .D(\blk00000003/sig00000629 ), + .Q(\blk00000003/sig0000062a ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk000005ec ( + .A0(\blk00000003/sig00000049 ), + .A1(\blk00000003/sig000000ae ), + .A2(\blk00000003/sig000000ae ), + .A3(\blk00000003/sig000000ae ), + .CE(\blk00000003/sig00000582 ), + .CLK(clk), + .D(\blk00000003/sig00000216 ), + .Q(\blk00000003/sig00000629 ), + .Q15(\NLW_blk00000003/blk000005ec_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000005eb ( + .C(clk), + .CE(\blk00000003/sig00000582 ), + .D(\blk00000003/sig00000627 ), + .Q(\blk00000003/sig00000628 ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk000005ea ( + .A0(\blk00000003/sig00000049 ), + .A1(\blk00000003/sig000000ae ), + .A2(\blk00000003/sig000000ae ), + .A3(\blk00000003/sig000000ae ), + .CE(\blk00000003/sig00000582 ), + .CLK(clk), + .D(\blk00000003/sig00000214 ), + .Q(\blk00000003/sig00000627 ), + .Q15(\NLW_blk00000003/blk000005ea_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000005e9 ( + .C(clk), + .CE(\blk00000003/sig00000582 ), + .D(\blk00000003/sig00000625 ), + .Q(\blk00000003/sig00000626 ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk000005e8 ( + .A0(\blk00000003/sig00000049 ), + .A1(\blk00000003/sig000000ae ), + .A2(\blk00000003/sig000000ae ), + .A3(\blk00000003/sig000000ae ), + .CE(\blk00000003/sig00000582 ), + .CLK(clk), + .D(\blk00000003/sig00000213 ), + .Q(\blk00000003/sig00000625 ), + .Q15(\NLW_blk00000003/blk000005e8_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000005e7 ( + .C(clk), + .CE(\blk00000003/sig00000582 ), + .D(\blk00000003/sig00000623 ), + .Q(\blk00000003/sig00000624 ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk000005e6 ( + .A0(\blk00000003/sig00000049 ), + .A1(\blk00000003/sig000000ae ), + .A2(\blk00000003/sig000000ae ), + .A3(\blk00000003/sig000000ae ), + .CE(\blk00000003/sig00000582 ), + .CLK(clk), + .D(\blk00000003/sig00000215 ), + .Q(\blk00000003/sig00000623 ), + .Q15(\NLW_blk00000003/blk000005e6_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000005e5 ( + .C(clk), + .CE(\blk00000003/sig00000582 ), + .D(\blk00000003/sig00000621 ), + .Q(\blk00000003/sig00000622 ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk000005e4 ( + .A0(\blk00000003/sig00000049 ), + .A1(\blk00000003/sig000000ae ), + .A2(\blk00000003/sig000000ae ), + .A3(\blk00000003/sig000000ae ), + .CE(\blk00000003/sig00000582 ), + .CLK(clk), + .D(\blk00000003/sig00000211 ), + .Q(\blk00000003/sig00000621 ), + .Q15(\NLW_blk00000003/blk000005e4_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000005e3 ( + .C(clk), + .CE(\blk00000003/sig00000582 ), + .D(\blk00000003/sig0000061f ), + .Q(\blk00000003/sig00000620 ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk000005e2 ( + .A0(\blk00000003/sig00000049 ), + .A1(\blk00000003/sig000000ae ), + .A2(\blk00000003/sig000000ae ), + .A3(\blk00000003/sig000000ae ), + .CE(\blk00000003/sig00000582 ), + .CLK(clk), + .D(\blk00000003/sig00000210 ), + .Q(\blk00000003/sig0000061f ), + .Q15(\NLW_blk00000003/blk000005e2_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000005e1 ( + .C(clk), + .CE(\blk00000003/sig00000582 ), + .D(\blk00000003/sig0000061d ), + .Q(\blk00000003/sig0000061e ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk000005e0 ( + .A0(\blk00000003/sig00000049 ), + .A1(\blk00000003/sig000000ae ), + .A2(\blk00000003/sig000000ae ), + .A3(\blk00000003/sig000000ae ), + .CE(\blk00000003/sig00000582 ), + .CLK(clk), + .D(\blk00000003/sig00000212 ), + .Q(\blk00000003/sig0000061d ), + .Q15(\NLW_blk00000003/blk000005e0_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000005df ( + .C(clk), + .CE(\blk00000003/sig00000582 ), + .D(\blk00000003/sig0000061b ), + .Q(\blk00000003/sig0000061c ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk000005de ( + .A0(\blk00000003/sig00000049 ), + .A1(\blk00000003/sig000000ae ), + .A2(\blk00000003/sig000000ae ), + .A3(\blk00000003/sig000000ae ), + .CE(\blk00000003/sig00000582 ), + .CLK(clk), + .D(\blk00000003/sig0000020e ), + .Q(\blk00000003/sig0000061b ), + .Q15(\NLW_blk00000003/blk000005de_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000005dd ( + .C(clk), + .CE(\blk00000003/sig00000582 ), + .D(\blk00000003/sig00000619 ), + .Q(\blk00000003/sig0000061a ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk000005dc ( + .A0(\blk00000003/sig00000049 ), + .A1(\blk00000003/sig000000ae ), + .A2(\blk00000003/sig000000ae ), + .A3(\blk00000003/sig000000ae ), + .CE(\blk00000003/sig00000582 ), + .CLK(clk), + .D(\blk00000003/sig0000020d ), + .Q(\blk00000003/sig00000619 ), + .Q15(\NLW_blk00000003/blk000005dc_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000005db ( + .C(clk), + .CE(\blk00000003/sig00000582 ), + .D(\blk00000003/sig00000617 ), + .Q(\blk00000003/sig00000618 ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk000005da ( + .A0(\blk00000003/sig00000049 ), + .A1(\blk00000003/sig000000ae ), + .A2(\blk00000003/sig000000ae ), + .A3(\blk00000003/sig000000ae ), + .CE(\blk00000003/sig00000582 ), + .CLK(clk), + .D(\blk00000003/sig0000020f ), + .Q(\blk00000003/sig00000617 ), + .Q15(\NLW_blk00000003/blk000005da_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000005d9 ( + .C(clk), + .CE(\blk00000003/sig00000582 ), + .D(\blk00000003/sig00000615 ), + .Q(\blk00000003/sig00000616 ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk000005d8 ( + .A0(\blk00000003/sig00000049 ), + .A1(\blk00000003/sig000000ae ), + .A2(\blk00000003/sig000000ae ), + .A3(\blk00000003/sig000000ae ), + .CE(\blk00000003/sig00000582 ), + .CLK(clk), + .D(\blk00000003/sig0000020c ), + .Q(\blk00000003/sig00000615 ), + .Q15(\NLW_blk00000003/blk000005d8_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000005d7 ( + .C(clk), + .CE(\blk00000003/sig00000582 ), + .D(\blk00000003/sig00000613 ), + .Q(\blk00000003/sig00000614 ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk000005d6 ( + .A0(\blk00000003/sig00000049 ), + .A1(\blk00000003/sig000000ae ), + .A2(\blk00000003/sig000000ae ), + .A3(\blk00000003/sig000000ae ), + .CE(\blk00000003/sig00000582 ), + .CLK(clk), + .D(\blk00000003/sig0000020b ), + .Q(\blk00000003/sig00000613 ), + .Q15(\NLW_blk00000003/blk000005d6_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000005d5 ( + .C(clk), + .CE(\blk00000003/sig00000582 ), + .D(\blk00000003/sig00000611 ), + .Q(\blk00000003/sig00000612 ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk000005d4 ( + .A0(\blk00000003/sig00000049 ), + .A1(\blk00000003/sig000000ae ), + .A2(\blk00000003/sig000000ae ), + .A3(\blk00000003/sig000000ae ), + .CE(\blk00000003/sig00000582 ), + .CLK(clk), + .D(\blk00000003/sig00000209 ), + .Q(\blk00000003/sig00000611 ), + .Q15(\NLW_blk00000003/blk000005d4_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000005d3 ( + .C(clk), + .CE(\blk00000003/sig00000582 ), + .D(\blk00000003/sig0000060f ), + .Q(\blk00000003/sig00000610 ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk000005d2 ( + .A0(\blk00000003/sig00000049 ), + .A1(\blk00000003/sig000000ae ), + .A2(\blk00000003/sig000000ae ), + .A3(\blk00000003/sig000000ae ), + .CE(\blk00000003/sig00000582 ), + .CLK(clk), + .D(\blk00000003/sig00000208 ), + .Q(\blk00000003/sig0000060f ), + .Q15(\NLW_blk00000003/blk000005d2_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000005d1 ( + .C(clk), + .CE(\blk00000003/sig00000582 ), + .D(\blk00000003/sig0000060d ), + .Q(\blk00000003/sig0000060e ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk000005d0 ( + .A0(\blk00000003/sig00000049 ), + .A1(\blk00000003/sig000000ae ), + .A2(\blk00000003/sig000000ae ), + .A3(\blk00000003/sig000000ae ), + .CE(\blk00000003/sig00000582 ), + .CLK(clk), + .D(\blk00000003/sig0000020a ), + .Q(\blk00000003/sig0000060d ), + .Q15(\NLW_blk00000003/blk000005d0_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000005cf ( + .C(clk), + .CE(\blk00000003/sig00000582 ), + .D(\blk00000003/sig0000060b ), + .Q(\blk00000003/sig0000060c ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk000005ce ( + .A0(\blk00000003/sig00000049 ), + .A1(\blk00000003/sig000000ae ), + .A2(\blk00000003/sig000000ae ), + .A3(\blk00000003/sig000000ae ), + .CE(\blk00000003/sig00000582 ), + .CLK(clk), + .D(\blk00000003/sig00000206 ), + .Q(\blk00000003/sig0000060b ), + .Q15(\NLW_blk00000003/blk000005ce_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000005cd ( + .C(clk), + .CE(\blk00000003/sig00000582 ), + .D(\blk00000003/sig00000609 ), + .Q(\blk00000003/sig0000060a ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk000005cc ( + .A0(\blk00000003/sig00000049 ), + .A1(\blk00000003/sig000000ae ), + .A2(\blk00000003/sig000000ae ), + .A3(\blk00000003/sig000000ae ), + .CE(\blk00000003/sig00000582 ), + .CLK(clk), + .D(\blk00000003/sig00000205 ), + .Q(\blk00000003/sig00000609 ), + .Q15(\NLW_blk00000003/blk000005cc_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000005cb ( + .C(clk), + .CE(\blk00000003/sig00000582 ), + .D(\blk00000003/sig00000607 ), + .Q(\blk00000003/sig00000608 ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk000005ca ( + .A0(\blk00000003/sig00000049 ), + .A1(\blk00000003/sig000000ae ), + .A2(\blk00000003/sig000000ae ), + .A3(\blk00000003/sig000000ae ), + .CE(\blk00000003/sig00000582 ), + .CLK(clk), + .D(\blk00000003/sig00000207 ), + .Q(\blk00000003/sig00000607 ), + .Q15(\NLW_blk00000003/blk000005ca_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000005c9 ( + .C(clk), + .CE(\blk00000003/sig00000582 ), + .D(\blk00000003/sig00000605 ), + .Q(\blk00000003/sig00000606 ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk000005c8 ( + .A0(\blk00000003/sig00000049 ), + .A1(\blk00000003/sig000000ae ), + .A2(\blk00000003/sig000000ae ), + .A3(\blk00000003/sig000000ae ), + .CE(\blk00000003/sig00000582 ), + .CLK(clk), + .D(\blk00000003/sig00000203 ), + .Q(\blk00000003/sig00000605 ), + .Q15(\NLW_blk00000003/blk000005c8_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000005c7 ( + .C(clk), + .CE(\blk00000003/sig00000582 ), + .D(\blk00000003/sig00000603 ), + .Q(\blk00000003/sig00000604 ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk000005c6 ( + .A0(\blk00000003/sig00000049 ), + .A1(\blk00000003/sig000000ae ), + .A2(\blk00000003/sig000000ae ), + .A3(\blk00000003/sig000000ae ), + .CE(\blk00000003/sig00000582 ), + .CLK(clk), + .D(\blk00000003/sig00000202 ), + .Q(\blk00000003/sig00000603 ), + .Q15(\NLW_blk00000003/blk000005c6_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000005c5 ( + .C(clk), + .CE(\blk00000003/sig00000582 ), + .D(\blk00000003/sig00000601 ), + .Q(\blk00000003/sig00000602 ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk000005c4 ( + .A0(\blk00000003/sig00000049 ), + .A1(\blk00000003/sig000000ae ), + .A2(\blk00000003/sig000000ae ), + .A3(\blk00000003/sig000000ae ), + .CE(\blk00000003/sig00000582 ), + .CLK(clk), + .D(\blk00000003/sig00000204 ), + .Q(\blk00000003/sig00000601 ), + .Q15(\NLW_blk00000003/blk000005c4_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000005c3 ( + .C(clk), + .CE(\blk00000003/sig00000582 ), + .D(\blk00000003/sig000005ff ), + .Q(\blk00000003/sig00000600 ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk000005c2 ( + .A0(\blk00000003/sig00000049 ), + .A1(\blk00000003/sig000000ae ), + .A2(\blk00000003/sig000000ae ), + .A3(\blk00000003/sig000000ae ), + .CE(\blk00000003/sig00000582 ), + .CLK(clk), + .D(\blk00000003/sig00000201 ), + .Q(\blk00000003/sig000005ff ), + .Q15(\NLW_blk00000003/blk000005c2_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000005c1 ( + .C(clk), + .CE(\blk00000003/sig00000582 ), + .D(\blk00000003/sig000005fd ), + .Q(\blk00000003/sig000005fe ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk000005c0 ( + .A0(\blk00000003/sig00000049 ), + .A1(\blk00000003/sig000000ae ), + .A2(\blk00000003/sig000000ae ), + .A3(\blk00000003/sig000000ae ), + .CE(\blk00000003/sig00000582 ), + .CLK(clk), + .D(\blk00000003/sig00000200 ), + .Q(\blk00000003/sig000005fd ), + .Q15(\NLW_blk00000003/blk000005c0_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000005bf ( + .C(clk), + .CE(\blk00000003/sig00000582 ), + .D(\blk00000003/sig000005fb ), + .Q(\blk00000003/sig000005fc ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk000005be ( + .A0(\blk00000003/sig00000049 ), + .A1(\blk00000003/sig000000ae ), + .A2(\blk00000003/sig000000ae ), + .A3(\blk00000003/sig000000ae ), + .CE(\blk00000003/sig00000582 ), + .CLK(clk), + .D(\blk00000003/sig000001fe ), + .Q(\blk00000003/sig000005fb ), + .Q15(\NLW_blk00000003/blk000005be_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000005bd ( + .C(clk), + .CE(\blk00000003/sig00000582 ), + .D(\blk00000003/sig000005f9 ), + .Q(\blk00000003/sig000005fa ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk000005bc ( + .A0(\blk00000003/sig00000049 ), + .A1(\blk00000003/sig000000ae ), + .A2(\blk00000003/sig000000ae ), + .A3(\blk00000003/sig000000ae ), + .CE(\blk00000003/sig00000582 ), + .CLK(clk), + .D(\blk00000003/sig000001fd ), + .Q(\blk00000003/sig000005f9 ), + .Q15(\NLW_blk00000003/blk000005bc_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000005bb ( + .C(clk), + .CE(\blk00000003/sig00000582 ), + .D(\blk00000003/sig000005f7 ), + .Q(\blk00000003/sig000005f8 ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk000005ba ( + .A0(\blk00000003/sig00000049 ), + .A1(\blk00000003/sig000000ae ), + .A2(\blk00000003/sig000000ae ), + .A3(\blk00000003/sig000000ae ), + .CE(\blk00000003/sig00000582 ), + .CLK(clk), + .D(\blk00000003/sig000001ff ), + .Q(\blk00000003/sig000005f7 ), + .Q15(\NLW_blk00000003/blk000005ba_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000005b9 ( + .C(clk), + .CE(\blk00000003/sig00000582 ), + .D(\blk00000003/sig000005f5 ), + .Q(\blk00000003/sig000005f6 ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk000005b8 ( + .A0(\blk00000003/sig00000049 ), + .A1(\blk00000003/sig000000ae ), + .A2(\blk00000003/sig000000ae ), + .A3(\blk00000003/sig000000ae ), + .CE(\blk00000003/sig00000582 ), + .CLK(clk), + .D(\blk00000003/sig000001fb ), + .Q(\blk00000003/sig000005f5 ), + .Q15(\NLW_blk00000003/blk000005b8_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000005b7 ( + .C(clk), + .CE(\blk00000003/sig00000582 ), + .D(\blk00000003/sig000005f3 ), + .Q(\blk00000003/sig000005f4 ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk000005b6 ( + .A0(\blk00000003/sig00000049 ), + .A1(\blk00000003/sig000000ae ), + .A2(\blk00000003/sig000000ae ), + .A3(\blk00000003/sig000000ae ), + .CE(\blk00000003/sig00000582 ), + .CLK(clk), + .D(\blk00000003/sig000001fa ), + .Q(\blk00000003/sig000005f3 ), + .Q15(\NLW_blk00000003/blk000005b6_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000005b5 ( + .C(clk), + .CE(\blk00000003/sig00000582 ), + .D(\blk00000003/sig000005f1 ), + .Q(\blk00000003/sig000005f2 ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk000005b4 ( + .A0(\blk00000003/sig00000049 ), + .A1(\blk00000003/sig000000ae ), + .A2(\blk00000003/sig000000ae ), + .A3(\blk00000003/sig000000ae ), + .CE(\blk00000003/sig00000582 ), + .CLK(clk), + .D(\blk00000003/sig000001fc ), + .Q(\blk00000003/sig000005f1 ), + .Q15(\NLW_blk00000003/blk000005b4_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000005b3 ( + .C(clk), + .CE(\blk00000003/sig00000582 ), + .D(\blk00000003/sig000005ef ), + .Q(\blk00000003/sig000005f0 ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk000005b2 ( + .A0(\blk00000003/sig00000049 ), + .A1(\blk00000003/sig000000ae ), + .A2(\blk00000003/sig000000ae ), + .A3(\blk00000003/sig000000ae ), + .CE(\blk00000003/sig00000582 ), + .CLK(clk), + .D(\blk00000003/sig000001f8 ), + .Q(\blk00000003/sig000005ef ), + .Q15(\NLW_blk00000003/blk000005b2_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000005b1 ( + .C(clk), + .CE(\blk00000003/sig00000582 ), + .D(\blk00000003/sig000005ed ), + .Q(\blk00000003/sig000005ee ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk000005b0 ( + .A0(\blk00000003/sig00000049 ), + .A1(\blk00000003/sig000000ae ), + .A2(\blk00000003/sig000000ae ), + .A3(\blk00000003/sig000000ae ), + .CE(\blk00000003/sig00000582 ), + .CLK(clk), + .D(\blk00000003/sig000001f7 ), + .Q(\blk00000003/sig000005ed ), + .Q15(\NLW_blk00000003/blk000005b0_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000005af ( + .C(clk), + .CE(\blk00000003/sig00000582 ), + .D(\blk00000003/sig000005eb ), + .Q(\blk00000003/sig000005ec ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk000005ae ( + .A0(\blk00000003/sig00000049 ), + .A1(\blk00000003/sig000000ae ), + .A2(\blk00000003/sig000000ae ), + .A3(\blk00000003/sig000000ae ), + .CE(\blk00000003/sig00000582 ), + .CLK(clk), + .D(\blk00000003/sig000001f9 ), + .Q(\blk00000003/sig000005eb ), + .Q15(\NLW_blk00000003/blk000005ae_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000005ad ( + .C(clk), + .CE(\blk00000003/sig00000582 ), + .D(\blk00000003/sig000005e9 ), + .Q(\blk00000003/sig000005ea ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk000005ac ( + .A0(\blk00000003/sig00000049 ), + .A1(\blk00000003/sig000000ae ), + .A2(\blk00000003/sig000000ae ), + .A3(\blk00000003/sig000000ae ), + .CE(\blk00000003/sig00000582 ), + .CLK(clk), + .D(\blk00000003/sig000001f6 ), + .Q(\blk00000003/sig000005e9 ), + .Q15(\NLW_blk00000003/blk000005ac_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000005ab ( + .C(clk), + .CE(\blk00000003/sig00000582 ), + .D(\blk00000003/sig000005e7 ), + .Q(\blk00000003/sig000005e8 ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk000005aa ( + .A0(\blk00000003/sig00000049 ), + .A1(\blk00000003/sig000000ae ), + .A2(\blk00000003/sig000000ae ), + .A3(\blk00000003/sig000000ae ), + .CE(\blk00000003/sig00000582 ), + .CLK(clk), + .D(\blk00000003/sig000001f5 ), + .Q(\blk00000003/sig000005e7 ), + .Q15(\NLW_blk00000003/blk000005aa_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000005a9 ( + .C(clk), + .CE(\blk00000003/sig00000582 ), + .D(\blk00000003/sig000005e5 ), + .Q(\blk00000003/sig000005e6 ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk000005a8 ( + .A0(\blk00000003/sig00000049 ), + .A1(\blk00000003/sig000000ae ), + .A2(\blk00000003/sig000000ae ), + .A3(\blk00000003/sig000000ae ), + .CE(\blk00000003/sig00000582 ), + .CLK(clk), + .D(\blk00000003/sig000001f3 ), + .Q(\blk00000003/sig000005e5 ), + .Q15(\NLW_blk00000003/blk000005a8_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000005a7 ( + .C(clk), + .CE(\blk00000003/sig00000582 ), + .D(\blk00000003/sig000005e3 ), + .Q(\blk00000003/sig000005e4 ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk000005a6 ( + .A0(\blk00000003/sig00000049 ), + .A1(\blk00000003/sig000000ae ), + .A2(\blk00000003/sig000000ae ), + .A3(\blk00000003/sig000000ae ), + .CE(\blk00000003/sig00000582 ), + .CLK(clk), + .D(\blk00000003/sig000001f2 ), + .Q(\blk00000003/sig000005e3 ), + .Q15(\NLW_blk00000003/blk000005a6_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000005a5 ( + .C(clk), + .CE(\blk00000003/sig00000582 ), + .D(\blk00000003/sig000005e1 ), + .Q(\blk00000003/sig000005e2 ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk000005a4 ( + .A0(\blk00000003/sig00000049 ), + .A1(\blk00000003/sig000000ae ), + .A2(\blk00000003/sig000000ae ), + .A3(\blk00000003/sig000000ae ), + .CE(\blk00000003/sig00000582 ), + .CLK(clk), + .D(\blk00000003/sig000001f4 ), + .Q(\blk00000003/sig000005e1 ), + .Q15(\NLW_blk00000003/blk000005a4_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000005a3 ( + .C(clk), + .CE(\blk00000003/sig00000582 ), + .D(\blk00000003/sig000005df ), + .Q(\blk00000003/sig000005e0 ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk000005a2 ( + .A0(\blk00000003/sig00000049 ), + .A1(\blk00000003/sig000000ae ), + .A2(\blk00000003/sig000000ae ), + .A3(\blk00000003/sig000000ae ), + .CE(\blk00000003/sig00000582 ), + .CLK(clk), + .D(\blk00000003/sig000001f1 ), + .Q(\blk00000003/sig000005df ), + .Q15(\NLW_blk00000003/blk000005a2_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000005a1 ( + .C(clk), + .CE(\blk00000003/sig00000582 ), + .D(\blk00000003/sig000005dd ), + .Q(\blk00000003/sig000005de ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk000005a0 ( + .A0(\blk00000003/sig00000049 ), + .A1(\blk00000003/sig000000ae ), + .A2(\blk00000003/sig000000ae ), + .A3(\blk00000003/sig000000ae ), + .CE(\blk00000003/sig00000582 ), + .CLK(clk), + .D(\blk00000003/sig000001f0 ), + .Q(\blk00000003/sig000005dd ), + .Q15(\NLW_blk00000003/blk000005a0_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk0000059f ( + .C(clk), + .CE(\blk00000003/sig00000582 ), + .D(\blk00000003/sig000005db ), + .Q(\blk00000003/sig000005dc ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk0000059e ( + .A0(\blk00000003/sig00000049 ), + .A1(\blk00000003/sig000000ae ), + .A2(\blk00000003/sig000000ae ), + .A3(\blk00000003/sig000000ae ), + .CE(\blk00000003/sig00000582 ), + .CLK(clk), + .D(\blk00000003/sig000001ee ), + .Q(\blk00000003/sig000005db ), + .Q15(\NLW_blk00000003/blk0000059e_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk0000059d ( + .C(clk), + .CE(\blk00000003/sig00000582 ), + .D(\blk00000003/sig000005d9 ), + .Q(\blk00000003/sig000005da ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk0000059c ( + .A0(\blk00000003/sig00000049 ), + .A1(\blk00000003/sig000000ae ), + .A2(\blk00000003/sig000000ae ), + .A3(\blk00000003/sig000000ae ), + .CE(\blk00000003/sig00000582 ), + .CLK(clk), + .D(\blk00000003/sig000001ed ), + .Q(\blk00000003/sig000005d9 ), + .Q15(\NLW_blk00000003/blk0000059c_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk0000059b ( + .C(clk), + .CE(\blk00000003/sig00000582 ), + .D(\blk00000003/sig000005d7 ), + .Q(\blk00000003/sig000005d8 ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk0000059a ( + .A0(\blk00000003/sig00000049 ), + .A1(\blk00000003/sig000000ae ), + .A2(\blk00000003/sig000000ae ), + .A3(\blk00000003/sig000000ae ), + .CE(\blk00000003/sig00000582 ), + .CLK(clk), + .D(\blk00000003/sig000001ef ), + .Q(\blk00000003/sig000005d7 ), + .Q15(\NLW_blk00000003/blk0000059a_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000599 ( + .C(clk), + .CE(\blk00000003/sig00000582 ), + .D(\blk00000003/sig000005d5 ), + .Q(\blk00000003/sig000005d6 ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000598 ( + .A0(\blk00000003/sig00000049 ), + .A1(\blk00000003/sig000000ae ), + .A2(\blk00000003/sig000000ae ), + .A3(\blk00000003/sig000000ae ), + .CE(\blk00000003/sig00000582 ), + .CLK(clk), + .D(\blk00000003/sig000001ec ), + .Q(\blk00000003/sig000005d5 ), + .Q15(\NLW_blk00000003/blk00000598_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000597 ( + .C(clk), + .CE(\blk00000003/sig00000582 ), + .D(\blk00000003/sig000005d3 ), + .Q(\blk00000003/sig000005d4 ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000596 ( + .A0(\blk00000003/sig00000049 ), + .A1(\blk00000003/sig000000ae ), + .A2(\blk00000003/sig000000ae ), + .A3(\blk00000003/sig000000ae ), + .CE(\blk00000003/sig00000582 ), + .CLK(clk), + .D(\blk00000003/sig000001eb ), + .Q(\blk00000003/sig000005d3 ), + .Q15(\NLW_blk00000003/blk00000596_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000595 ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig000005d2 ), + .Q(\blk00000003/sig00000581 ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000594 ( + .A0(\blk00000003/sig00000049 ), + .A1(\blk00000003/sig00000049 ), + .A2(\blk00000003/sig00000049 ), + .A3(\blk00000003/sig00000049 ), + .CE(ce), + .CLK(clk), + .D(\blk00000003/sig00000435 ), + .Q(\blk00000003/sig000005d2 ), + .Q15(\NLW_blk00000003/blk00000594_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000593 ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig000005d1 ), + .Q(\blk00000003/sig00000480 ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000592 ( + .A0(\blk00000003/sig000000ae ), + .A1(\blk00000003/sig00000049 ), + .A2(\blk00000003/sig00000049 ), + .A3(\blk00000003/sig00000049 ), + .CE(ce), + .CLK(clk), + .D(\blk00000003/sig00000219 ), + .Q(\blk00000003/sig000005d1 ), + .Q15(\NLW_blk00000003/blk00000592_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000591 ( + .C(clk), + .CE(\blk00000003/sig00000582 ), + .D(\blk00000003/sig000005cf ), + .Q(\blk00000003/sig000005d0 ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000590 ( + .A0(\blk00000003/sig00000049 ), + .A1(\blk00000003/sig000000ae ), + .A2(\blk00000003/sig000000ae ), + .A3(\blk00000003/sig000000ae ), + .CE(\blk00000003/sig00000582 ), + .CLK(clk), + .D(\blk00000003/sig000001ea ), + .Q(\blk00000003/sig000005cf ), + .Q15(\NLW_blk00000003/blk00000590_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk0000058f ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig000005ce ), + .Q(\blk00000003/sig0000047e ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk0000058e ( + .A0(\blk00000003/sig000000ae ), + .A1(\blk00000003/sig00000049 ), + .A2(\blk00000003/sig00000049 ), + .A3(\blk00000003/sig00000049 ), + .CE(ce), + .CLK(clk), + .D(\blk00000003/sig00000217 ), + .Q(\blk00000003/sig000005ce ), + .Q15(\NLW_blk00000003/blk0000058e_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk0000058d ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig000005cd ), + .Q(\blk00000003/sig0000047d ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk0000058c ( + .A0(\blk00000003/sig000000ae ), + .A1(\blk00000003/sig00000049 ), + .A2(\blk00000003/sig00000049 ), + .A3(\blk00000003/sig00000049 ), + .CE(ce), + .CLK(clk), + .D(\blk00000003/sig00000216 ), + .Q(\blk00000003/sig000005cd ), + .Q15(\NLW_blk00000003/blk0000058c_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk0000058b ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig000005cc ), + .Q(\blk00000003/sig0000047f ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk0000058a ( + .A0(\blk00000003/sig000000ae ), + .A1(\blk00000003/sig00000049 ), + .A2(\blk00000003/sig00000049 ), + .A3(\blk00000003/sig00000049 ), + .CE(ce), + .CLK(clk), + .D(\blk00000003/sig00000218 ), + .Q(\blk00000003/sig000005cc ), + .Q15(\NLW_blk00000003/blk0000058a_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000589 ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig000005cb ), + .Q(\blk00000003/sig0000047b ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000588 ( + .A0(\blk00000003/sig000000ae ), + .A1(\blk00000003/sig00000049 ), + .A2(\blk00000003/sig00000049 ), + .A3(\blk00000003/sig00000049 ), + .CE(ce), + .CLK(clk), + .D(\blk00000003/sig00000214 ), + .Q(\blk00000003/sig000005cb ), + .Q15(\NLW_blk00000003/blk00000588_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000587 ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig000005ca ), + .Q(\blk00000003/sig0000047a ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000586 ( + .A0(\blk00000003/sig000000ae ), + .A1(\blk00000003/sig00000049 ), + .A2(\blk00000003/sig00000049 ), + .A3(\blk00000003/sig00000049 ), + .CE(ce), + .CLK(clk), + .D(\blk00000003/sig00000213 ), + .Q(\blk00000003/sig000005ca ), + .Q15(\NLW_blk00000003/blk00000586_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000585 ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig000005c9 ), + .Q(\blk00000003/sig0000047c ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000584 ( + .A0(\blk00000003/sig000000ae ), + .A1(\blk00000003/sig00000049 ), + .A2(\blk00000003/sig00000049 ), + .A3(\blk00000003/sig00000049 ), + .CE(ce), + .CLK(clk), + .D(\blk00000003/sig00000215 ), + .Q(\blk00000003/sig000005c9 ), + .Q15(\NLW_blk00000003/blk00000584_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000583 ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig000005c8 ), + .Q(\blk00000003/sig00000479 ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000582 ( + .A0(\blk00000003/sig000000ae ), + .A1(\blk00000003/sig00000049 ), + .A2(\blk00000003/sig00000049 ), + .A3(\blk00000003/sig00000049 ), + .CE(ce), + .CLK(clk), + .D(\blk00000003/sig00000212 ), + .Q(\blk00000003/sig000005c8 ), + .Q15(\NLW_blk00000003/blk00000582_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000581 ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig000005c7 ), + .Q(\blk00000003/sig00000478 ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000580 ( + .A0(\blk00000003/sig000000ae ), + .A1(\blk00000003/sig00000049 ), + .A2(\blk00000003/sig00000049 ), + .A3(\blk00000003/sig00000049 ), + .CE(ce), + .CLK(clk), + .D(\blk00000003/sig00000211 ), + .Q(\blk00000003/sig000005c7 ), + .Q15(\NLW_blk00000003/blk00000580_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk0000057f ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig000005c6 ), + .Q(\blk00000003/sig00000476 ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk0000057e ( + .A0(\blk00000003/sig000000ae ), + .A1(\blk00000003/sig00000049 ), + .A2(\blk00000003/sig00000049 ), + .A3(\blk00000003/sig00000049 ), + .CE(ce), + .CLK(clk), + .D(\blk00000003/sig0000020f ), + .Q(\blk00000003/sig000005c6 ), + .Q15(\NLW_blk00000003/blk0000057e_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk0000057d ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig000005c5 ), + .Q(\blk00000003/sig00000475 ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk0000057c ( + .A0(\blk00000003/sig000000ae ), + .A1(\blk00000003/sig00000049 ), + .A2(\blk00000003/sig00000049 ), + .A3(\blk00000003/sig00000049 ), + .CE(ce), + .CLK(clk), + .D(\blk00000003/sig0000020e ), + .Q(\blk00000003/sig000005c5 ), + .Q15(\NLW_blk00000003/blk0000057c_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk0000057b ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig000005c4 ), + .Q(\blk00000003/sig00000477 ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk0000057a ( + .A0(\blk00000003/sig000000ae ), + .A1(\blk00000003/sig00000049 ), + .A2(\blk00000003/sig00000049 ), + .A3(\blk00000003/sig00000049 ), + .CE(ce), + .CLK(clk), + .D(\blk00000003/sig00000210 ), + .Q(\blk00000003/sig000005c4 ), + .Q15(\NLW_blk00000003/blk0000057a_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000579 ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig000005c3 ), + .Q(\blk00000003/sig00000473 ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000578 ( + .A0(\blk00000003/sig000000ae ), + .A1(\blk00000003/sig00000049 ), + .A2(\blk00000003/sig00000049 ), + .A3(\blk00000003/sig00000049 ), + .CE(ce), + .CLK(clk), + .D(\blk00000003/sig0000020c ), + .Q(\blk00000003/sig000005c3 ), + .Q15(\NLW_blk00000003/blk00000578_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000577 ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig000005c2 ), + .Q(\blk00000003/sig00000472 ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000576 ( + .A0(\blk00000003/sig000000ae ), + .A1(\blk00000003/sig00000049 ), + .A2(\blk00000003/sig00000049 ), + .A3(\blk00000003/sig00000049 ), + .CE(ce), + .CLK(clk), + .D(\blk00000003/sig0000020b ), + .Q(\blk00000003/sig000005c2 ), + .Q15(\NLW_blk00000003/blk00000576_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000575 ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig000005c1 ), + .Q(\blk00000003/sig00000474 ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000574 ( + .A0(\blk00000003/sig000000ae ), + .A1(\blk00000003/sig00000049 ), + .A2(\blk00000003/sig00000049 ), + .A3(\blk00000003/sig00000049 ), + .CE(ce), + .CLK(clk), + .D(\blk00000003/sig0000020d ), + .Q(\blk00000003/sig000005c1 ), + .Q15(\NLW_blk00000003/blk00000574_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000573 ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig000005c0 ), + .Q(\blk00000003/sig00000470 ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000572 ( + .A0(\blk00000003/sig000000ae ), + .A1(\blk00000003/sig00000049 ), + .A2(\blk00000003/sig00000049 ), + .A3(\blk00000003/sig00000049 ), + .CE(ce), + .CLK(clk), + .D(\blk00000003/sig00000209 ), + .Q(\blk00000003/sig000005c0 ), + .Q15(\NLW_blk00000003/blk00000572_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000571 ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig000005bf ), + .Q(\blk00000003/sig0000046f ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000570 ( + .A0(\blk00000003/sig000000ae ), + .A1(\blk00000003/sig00000049 ), + .A2(\blk00000003/sig00000049 ), + .A3(\blk00000003/sig00000049 ), + .CE(ce), + .CLK(clk), + .D(\blk00000003/sig00000208 ), + .Q(\blk00000003/sig000005bf ), + .Q15(\NLW_blk00000003/blk00000570_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk0000056f ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig000005be ), + .Q(\blk00000003/sig00000471 ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk0000056e ( + .A0(\blk00000003/sig000000ae ), + .A1(\blk00000003/sig00000049 ), + .A2(\blk00000003/sig00000049 ), + .A3(\blk00000003/sig00000049 ), + .CE(ce), + .CLK(clk), + .D(\blk00000003/sig0000020a ), + .Q(\blk00000003/sig000005be ), + .Q15(\NLW_blk00000003/blk0000056e_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk0000056d ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig000005bd ), + .Q(\blk00000003/sig0000046e ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk0000056c ( + .A0(\blk00000003/sig000000ae ), + .A1(\blk00000003/sig00000049 ), + .A2(\blk00000003/sig00000049 ), + .A3(\blk00000003/sig00000049 ), + .CE(ce), + .CLK(clk), + .D(\blk00000003/sig00000207 ), + .Q(\blk00000003/sig000005bd ), + .Q15(\NLW_blk00000003/blk0000056c_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk0000056b ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig000005bc ), + .Q(\blk00000003/sig0000046d ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk0000056a ( + .A0(\blk00000003/sig000000ae ), + .A1(\blk00000003/sig00000049 ), + .A2(\blk00000003/sig00000049 ), + .A3(\blk00000003/sig00000049 ), + .CE(ce), + .CLK(clk), + .D(\blk00000003/sig00000206 ), + .Q(\blk00000003/sig000005bc ), + .Q15(\NLW_blk00000003/blk0000056a_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000569 ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig000005bb ), + .Q(\blk00000003/sig0000046b ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000568 ( + .A0(\blk00000003/sig000000ae ), + .A1(\blk00000003/sig00000049 ), + .A2(\blk00000003/sig00000049 ), + .A3(\blk00000003/sig00000049 ), + .CE(ce), + .CLK(clk), + .D(\blk00000003/sig00000204 ), + .Q(\blk00000003/sig000005bb ), + .Q15(\NLW_blk00000003/blk00000568_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000567 ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig000005ba ), + .Q(\blk00000003/sig0000046a ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000566 ( + .A0(\blk00000003/sig000000ae ), + .A1(\blk00000003/sig00000049 ), + .A2(\blk00000003/sig00000049 ), + .A3(\blk00000003/sig00000049 ), + .CE(ce), + .CLK(clk), + .D(\blk00000003/sig00000203 ), + .Q(\blk00000003/sig000005ba ), + .Q15(\NLW_blk00000003/blk00000566_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000565 ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig000005b9 ), + .Q(\blk00000003/sig0000046c ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000564 ( + .A0(\blk00000003/sig000000ae ), + .A1(\blk00000003/sig00000049 ), + .A2(\blk00000003/sig00000049 ), + .A3(\blk00000003/sig00000049 ), + .CE(ce), + .CLK(clk), + .D(\blk00000003/sig00000205 ), + .Q(\blk00000003/sig000005b9 ), + .Q15(\NLW_blk00000003/blk00000564_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000563 ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig000005b8 ), + .Q(\blk00000003/sig000004b0 ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000562 ( + .A0(\blk00000003/sig000000ae ), + .A1(\blk00000003/sig00000049 ), + .A2(\blk00000003/sig00000049 ), + .A3(\blk00000003/sig00000049 ), + .CE(ce), + .CLK(clk), + .D(\blk00000003/sig00000201 ), + .Q(\blk00000003/sig000005b8 ), + .Q15(\NLW_blk00000003/blk00000562_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000561 ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig000005b7 ), + .Q(\blk00000003/sig000004af ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000560 ( + .A0(\blk00000003/sig000000ae ), + .A1(\blk00000003/sig00000049 ), + .A2(\blk00000003/sig00000049 ), + .A3(\blk00000003/sig00000049 ), + .CE(ce), + .CLK(clk), + .D(\blk00000003/sig00000200 ), + .Q(\blk00000003/sig000005b7 ), + .Q15(\NLW_blk00000003/blk00000560_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk0000055f ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig000005b6 ), + .Q(\blk00000003/sig00000469 ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk0000055e ( + .A0(\blk00000003/sig000000ae ), + .A1(\blk00000003/sig00000049 ), + .A2(\blk00000003/sig00000049 ), + .A3(\blk00000003/sig00000049 ), + .CE(ce), + .CLK(clk), + .D(\blk00000003/sig00000202 ), + .Q(\blk00000003/sig000005b6 ), + .Q15(\NLW_blk00000003/blk0000055e_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk0000055d ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig000005b5 ), + .Q(\blk00000003/sig000004ad ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk0000055c ( + .A0(\blk00000003/sig000000ae ), + .A1(\blk00000003/sig00000049 ), + .A2(\blk00000003/sig00000049 ), + .A3(\blk00000003/sig00000049 ), + .CE(ce), + .CLK(clk), + .D(\blk00000003/sig000001fe ), + .Q(\blk00000003/sig000005b5 ), + .Q15(\NLW_blk00000003/blk0000055c_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk0000055b ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig000005b4 ), + .Q(\blk00000003/sig000004ac ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk0000055a ( + .A0(\blk00000003/sig000000ae ), + .A1(\blk00000003/sig00000049 ), + .A2(\blk00000003/sig00000049 ), + .A3(\blk00000003/sig00000049 ), + .CE(ce), + .CLK(clk), + .D(\blk00000003/sig000001fd ), + .Q(\blk00000003/sig000005b4 ), + .Q15(\NLW_blk00000003/blk0000055a_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000559 ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig000005b3 ), + .Q(\blk00000003/sig000004ae ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000558 ( + .A0(\blk00000003/sig000000ae ), + .A1(\blk00000003/sig00000049 ), + .A2(\blk00000003/sig00000049 ), + .A3(\blk00000003/sig00000049 ), + .CE(ce), + .CLK(clk), + .D(\blk00000003/sig000001ff ), + .Q(\blk00000003/sig000005b3 ), + .Q15(\NLW_blk00000003/blk00000558_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000557 ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig000005b2 ), + .Q(\blk00000003/sig000004ab ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000556 ( + .A0(\blk00000003/sig000000ae ), + .A1(\blk00000003/sig00000049 ), + .A2(\blk00000003/sig00000049 ), + .A3(\blk00000003/sig00000049 ), + .CE(ce), + .CLK(clk), + .D(\blk00000003/sig000001fc ), + .Q(\blk00000003/sig000005b2 ), + .Q15(\NLW_blk00000003/blk00000556_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000555 ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig000005b1 ), + .Q(\blk00000003/sig000004aa ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000554 ( + .A0(\blk00000003/sig000000ae ), + .A1(\blk00000003/sig00000049 ), + .A2(\blk00000003/sig00000049 ), + .A3(\blk00000003/sig00000049 ), + .CE(ce), + .CLK(clk), + .D(\blk00000003/sig000001fb ), + .Q(\blk00000003/sig000005b1 ), + .Q15(\NLW_blk00000003/blk00000554_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000553 ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig000005b0 ), + .Q(\blk00000003/sig000004a8 ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000552 ( + .A0(\blk00000003/sig000000ae ), + .A1(\blk00000003/sig00000049 ), + .A2(\blk00000003/sig00000049 ), + .A3(\blk00000003/sig00000049 ), + .CE(ce), + .CLK(clk), + .D(\blk00000003/sig000001f9 ), + .Q(\blk00000003/sig000005b0 ), + .Q15(\NLW_blk00000003/blk00000552_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000551 ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig000005af ), + .Q(\blk00000003/sig000004a7 ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000550 ( + .A0(\blk00000003/sig000000ae ), + .A1(\blk00000003/sig00000049 ), + .A2(\blk00000003/sig00000049 ), + .A3(\blk00000003/sig00000049 ), + .CE(ce), + .CLK(clk), + .D(\blk00000003/sig000001f8 ), + .Q(\blk00000003/sig000005af ), + .Q15(\NLW_blk00000003/blk00000550_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk0000054f ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig000005ae ), + .Q(\blk00000003/sig000004a9 ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk0000054e ( + .A0(\blk00000003/sig000000ae ), + .A1(\blk00000003/sig00000049 ), + .A2(\blk00000003/sig00000049 ), + .A3(\blk00000003/sig00000049 ), + .CE(ce), + .CLK(clk), + .D(\blk00000003/sig000001fa ), + .Q(\blk00000003/sig000005ae ), + .Q15(\NLW_blk00000003/blk0000054e_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk0000054d ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig000005ad ), + .Q(\blk00000003/sig000004a6 ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk0000054c ( + .A0(\blk00000003/sig000000ae ), + .A1(\blk00000003/sig00000049 ), + .A2(\blk00000003/sig00000049 ), + .A3(\blk00000003/sig00000049 ), + .CE(ce), + .CLK(clk), + .D(\blk00000003/sig000001f7 ), + .Q(\blk00000003/sig000005ad ), + .Q15(\NLW_blk00000003/blk0000054c_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk0000054b ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig000005ac ), + .Q(\blk00000003/sig000004a5 ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk0000054a ( + .A0(\blk00000003/sig000000ae ), + .A1(\blk00000003/sig00000049 ), + .A2(\blk00000003/sig00000049 ), + .A3(\blk00000003/sig00000049 ), + .CE(ce), + .CLK(clk), + .D(\blk00000003/sig000001f6 ), + .Q(\blk00000003/sig000005ac ), + .Q15(\NLW_blk00000003/blk0000054a_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000549 ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig000005ab ), + .Q(\blk00000003/sig000004a3 ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000548 ( + .A0(\blk00000003/sig000000ae ), + .A1(\blk00000003/sig00000049 ), + .A2(\blk00000003/sig00000049 ), + .A3(\blk00000003/sig00000049 ), + .CE(ce), + .CLK(clk), + .D(\blk00000003/sig000001f4 ), + .Q(\blk00000003/sig000005ab ), + .Q15(\NLW_blk00000003/blk00000548_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000547 ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig000005aa ), + .Q(\blk00000003/sig000004a2 ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000546 ( + .A0(\blk00000003/sig000000ae ), + .A1(\blk00000003/sig00000049 ), + .A2(\blk00000003/sig00000049 ), + .A3(\blk00000003/sig00000049 ), + .CE(ce), + .CLK(clk), + .D(\blk00000003/sig000001f3 ), + .Q(\blk00000003/sig000005aa ), + .Q15(\NLW_blk00000003/blk00000546_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000545 ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig000005a9 ), + .Q(\blk00000003/sig000004a4 ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000544 ( + .A0(\blk00000003/sig000000ae ), + .A1(\blk00000003/sig00000049 ), + .A2(\blk00000003/sig00000049 ), + .A3(\blk00000003/sig00000049 ), + .CE(ce), + .CLK(clk), + .D(\blk00000003/sig000001f5 ), + .Q(\blk00000003/sig000005a9 ), + .Q15(\NLW_blk00000003/blk00000544_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000543 ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig000005a8 ), + .Q(\blk00000003/sig000004a1 ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000542 ( + .A0(\blk00000003/sig000000ae ), + .A1(\blk00000003/sig00000049 ), + .A2(\blk00000003/sig00000049 ), + .A3(\blk00000003/sig00000049 ), + .CE(ce), + .CLK(clk), + .D(\blk00000003/sig000001f2 ), + .Q(\blk00000003/sig000005a8 ), + .Q15(\NLW_blk00000003/blk00000542_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000541 ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig000005a7 ), + .Q(\blk00000003/sig000004a0 ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000540 ( + .A0(\blk00000003/sig000000ae ), + .A1(\blk00000003/sig00000049 ), + .A2(\blk00000003/sig00000049 ), + .A3(\blk00000003/sig00000049 ), + .CE(ce), + .CLK(clk), + .D(\blk00000003/sig000001f1 ), + .Q(\blk00000003/sig000005a7 ), + .Q15(\NLW_blk00000003/blk00000540_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk0000053f ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig000005a6 ), + .Q(\blk00000003/sig0000049e ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk0000053e ( + .A0(\blk00000003/sig000000ae ), + .A1(\blk00000003/sig00000049 ), + .A2(\blk00000003/sig00000049 ), + .A3(\blk00000003/sig00000049 ), + .CE(ce), + .CLK(clk), + .D(\blk00000003/sig000001ef ), + .Q(\blk00000003/sig000005a6 ), + .Q15(\NLW_blk00000003/blk0000053e_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk0000053d ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig000005a5 ), + .Q(\blk00000003/sig0000049d ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk0000053c ( + .A0(\blk00000003/sig000000ae ), + .A1(\blk00000003/sig00000049 ), + .A2(\blk00000003/sig00000049 ), + .A3(\blk00000003/sig00000049 ), + .CE(ce), + .CLK(clk), + .D(\blk00000003/sig000001ee ), + .Q(\blk00000003/sig000005a5 ), + .Q15(\NLW_blk00000003/blk0000053c_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk0000053b ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig000005a4 ), + .Q(\blk00000003/sig0000049f ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk0000053a ( + .A0(\blk00000003/sig000000ae ), + .A1(\blk00000003/sig00000049 ), + .A2(\blk00000003/sig00000049 ), + .A3(\blk00000003/sig00000049 ), + .CE(ce), + .CLK(clk), + .D(\blk00000003/sig000001f0 ), + .Q(\blk00000003/sig000005a4 ), + .Q15(\NLW_blk00000003/blk0000053a_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000539 ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig000005a3 ), + .Q(\blk00000003/sig0000049b ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000538 ( + .A0(\blk00000003/sig000000ae ), + .A1(\blk00000003/sig00000049 ), + .A2(\blk00000003/sig00000049 ), + .A3(\blk00000003/sig00000049 ), + .CE(ce), + .CLK(clk), + .D(\blk00000003/sig000001ec ), + .Q(\blk00000003/sig000005a3 ), + .Q15(\NLW_blk00000003/blk00000538_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000537 ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig000005a2 ), + .Q(\blk00000003/sig0000049a ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000536 ( + .A0(\blk00000003/sig000000ae ), + .A1(\blk00000003/sig00000049 ), + .A2(\blk00000003/sig00000049 ), + .A3(\blk00000003/sig00000049 ), + .CE(ce), + .CLK(clk), + .D(\blk00000003/sig000001eb ), + .Q(\blk00000003/sig000005a2 ), + .Q15(\NLW_blk00000003/blk00000536_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000535 ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig000005a1 ), + .Q(\blk00000003/sig0000049c ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000534 ( + .A0(\blk00000003/sig000000ae ), + .A1(\blk00000003/sig00000049 ), + .A2(\blk00000003/sig00000049 ), + .A3(\blk00000003/sig00000049 ), + .CE(ce), + .CLK(clk), + .D(\blk00000003/sig000001ed ), + .Q(\blk00000003/sig000005a1 ), + .Q15(\NLW_blk00000003/blk00000534_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000533 ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig000005a0 ), + .Q(\blk00000003/sig000002de ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000532 ( + .A0(\blk00000003/sig000000ae ), + .A1(\blk00000003/sig000000ae ), + .A2(\blk00000003/sig00000049 ), + .A3(\blk00000003/sig00000049 ), + .CE(ce), + .CLK(clk), + .D(\blk00000003/sig000001d6 ), + .Q(\blk00000003/sig000005a0 ), + .Q15(\NLW_blk00000003/blk00000532_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000531 ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig0000059f ), + .Q(\blk00000003/sig000002df ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000530 ( + .A0(\blk00000003/sig00000049 ), + .A1(\blk00000003/sig000000ae ), + .A2(\blk00000003/sig00000049 ), + .A3(\blk00000003/sig00000049 ), + .CE(ce), + .CLK(clk), + .D(\blk00000003/sig000002b9 ), + .Q(\blk00000003/sig0000059f ), + .Q15(\NLW_blk00000003/blk00000530_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk0000052f ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig0000059e ), + .Q(\blk00000003/sig00000499 ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk0000052e ( + .A0(\blk00000003/sig000000ae ), + .A1(\blk00000003/sig00000049 ), + .A2(\blk00000003/sig00000049 ), + .A3(\blk00000003/sig00000049 ), + .CE(ce), + .CLK(clk), + .D(\blk00000003/sig000001ea ), + .Q(\blk00000003/sig0000059e ), + .Q15(\NLW_blk00000003/blk0000052e_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk0000052d ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig0000059d ), + .Q(\blk00000003/sig00000580 ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk0000052c ( + .A0(\blk00000003/sig00000049 ), + .A1(\blk00000003/sig000000ae ), + .A2(\blk00000003/sig00000049 ), + .A3(\blk00000003/sig00000049 ), + .CE(ce), + .CLK(clk), + .D(\blk00000003/sig000001d2 ), + .Q(\blk00000003/sig0000059d ), + .Q15(\NLW_blk00000003/blk0000052c_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk0000052b ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig0000059c ), + .Q(\blk00000003/sig000004da ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk0000052a ( + .A0(\blk00000003/sig00000049 ), + .A1(\blk00000003/sig00000049 ), + .A2(\blk00000003/sig00000049 ), + .A3(\blk00000003/sig00000049 ), + .CE(ce), + .CLK(clk), + .D(coef_din_0[0]), + .Q(\blk00000003/sig0000059c ), + .Q15(\NLW_blk00000003/blk0000052a_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000529 ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig0000059b ), + .Q(\blk00000003/sig000004d8 ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000528 ( + .A0(\blk00000003/sig00000049 ), + .A1(\blk00000003/sig00000049 ), + .A2(\blk00000003/sig00000049 ), + .A3(\blk00000003/sig00000049 ), + .CE(ce), + .CLK(clk), + .D(coef_din_0[2]), + .Q(\blk00000003/sig0000059b ), + .Q15(\NLW_blk00000003/blk00000528_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000527 ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig0000059a ), + .Q(\blk00000003/sig000004d7 ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000526 ( + .A0(\blk00000003/sig00000049 ), + .A1(\blk00000003/sig00000049 ), + .A2(\blk00000003/sig00000049 ), + .A3(\blk00000003/sig00000049 ), + .CE(ce), + .CLK(clk), + .D(coef_din_0[3]), + .Q(\blk00000003/sig0000059a ), + .Q15(\NLW_blk00000003/blk00000526_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000525 ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig00000599 ), + .Q(\blk00000003/sig000004d9 ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000524 ( + .A0(\blk00000003/sig00000049 ), + .A1(\blk00000003/sig00000049 ), + .A2(\blk00000003/sig00000049 ), + .A3(\blk00000003/sig00000049 ), + .CE(ce), + .CLK(clk), + .D(coef_din_0[1]), + .Q(\blk00000003/sig00000599 ), + .Q15(\NLW_blk00000003/blk00000524_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000523 ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig00000598 ), + .Q(\blk00000003/sig000004d5 ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000522 ( + .A0(\blk00000003/sig00000049 ), + .A1(\blk00000003/sig00000049 ), + .A2(\blk00000003/sig00000049 ), + .A3(\blk00000003/sig00000049 ), + .CE(ce), + .CLK(clk), + .D(coef_din_0[5]), + .Q(\blk00000003/sig00000598 ), + .Q15(\NLW_blk00000003/blk00000522_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000521 ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig00000597 ), + .Q(\blk00000003/sig000004d4 ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000520 ( + .A0(\blk00000003/sig00000049 ), + .A1(\blk00000003/sig00000049 ), + .A2(\blk00000003/sig00000049 ), + .A3(\blk00000003/sig00000049 ), + .CE(ce), + .CLK(clk), + .D(coef_din_0[6]), + .Q(\blk00000003/sig00000597 ), + .Q15(\NLW_blk00000003/blk00000520_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk0000051f ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig00000596 ), + .Q(\blk00000003/sig000004d6 ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk0000051e ( + .A0(\blk00000003/sig00000049 ), + .A1(\blk00000003/sig00000049 ), + .A2(\blk00000003/sig00000049 ), + .A3(\blk00000003/sig00000049 ), + .CE(ce), + .CLK(clk), + .D(coef_din_0[4]), + .Q(\blk00000003/sig00000596 ), + .Q15(\NLW_blk00000003/blk0000051e_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk0000051d ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig00000595 ), + .Q(\blk00000003/sig000004d2 ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk0000051c ( + .A0(\blk00000003/sig00000049 ), + .A1(\blk00000003/sig00000049 ), + .A2(\blk00000003/sig00000049 ), + .A3(\blk00000003/sig00000049 ), + .CE(ce), + .CLK(clk), + .D(coef_din_0[8]), + .Q(\blk00000003/sig00000595 ), + .Q15(\NLW_blk00000003/blk0000051c_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk0000051b ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig00000594 ), + .Q(\blk00000003/sig000004d1 ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk0000051a ( + .A0(\blk00000003/sig00000049 ), + .A1(\blk00000003/sig00000049 ), + .A2(\blk00000003/sig00000049 ), + .A3(\blk00000003/sig00000049 ), + .CE(ce), + .CLK(clk), + .D(coef_din_0[9]), + .Q(\blk00000003/sig00000594 ), + .Q15(\NLW_blk00000003/blk0000051a_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000519 ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig00000593 ), + .Q(\blk00000003/sig000004d3 ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000518 ( + .A0(\blk00000003/sig00000049 ), + .A1(\blk00000003/sig00000049 ), + .A2(\blk00000003/sig00000049 ), + .A3(\blk00000003/sig00000049 ), + .CE(ce), + .CLK(clk), + .D(coef_din_0[7]), + .Q(\blk00000003/sig00000593 ), + .Q15(\NLW_blk00000003/blk00000518_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000517 ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig00000592 ), + .Q(\blk00000003/sig000004d0 ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000516 ( + .A0(\blk00000003/sig00000049 ), + .A1(\blk00000003/sig00000049 ), + .A2(\blk00000003/sig00000049 ), + .A3(\blk00000003/sig00000049 ), + .CE(ce), + .CLK(clk), + .D(coef_din_0[10]), + .Q(\blk00000003/sig00000592 ), + .Q15(\NLW_blk00000003/blk00000516_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000515 ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig00000591 ), + .Q(\blk00000003/sig000004cf ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000514 ( + .A0(\blk00000003/sig00000049 ), + .A1(\blk00000003/sig00000049 ), + .A2(\blk00000003/sig00000049 ), + .A3(\blk00000003/sig00000049 ), + .CE(ce), + .CLK(clk), + .D(coef_din_0[11]), + .Q(\blk00000003/sig00000591 ), + .Q15(\NLW_blk00000003/blk00000514_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000513 ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig00000590 ), + .Q(\blk00000003/sig000004cd ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000512 ( + .A0(\blk00000003/sig00000049 ), + .A1(\blk00000003/sig00000049 ), + .A2(\blk00000003/sig00000049 ), + .A3(\blk00000003/sig00000049 ), + .CE(ce), + .CLK(clk), + .D(coef_din_0[13]), + .Q(\blk00000003/sig00000590 ), + .Q15(\NLW_blk00000003/blk00000512_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000511 ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig0000058f ), + .Q(\blk00000003/sig000004cc ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000510 ( + .A0(\blk00000003/sig00000049 ), + .A1(\blk00000003/sig00000049 ), + .A2(\blk00000003/sig00000049 ), + .A3(\blk00000003/sig00000049 ), + .CE(ce), + .CLK(clk), + .D(coef_din_0[14]), + .Q(\blk00000003/sig0000058f ), + .Q15(\NLW_blk00000003/blk00000510_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk0000050f ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig0000058e ), + .Q(\blk00000003/sig000004ce ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk0000050e ( + .A0(\blk00000003/sig00000049 ), + .A1(\blk00000003/sig00000049 ), + .A2(\blk00000003/sig00000049 ), + .A3(\blk00000003/sig00000049 ), + .CE(ce), + .CLK(clk), + .D(coef_din_0[12]), + .Q(\blk00000003/sig0000058e ), + .Q15(\NLW_blk00000003/blk0000050e_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk0000050d ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig0000058d ), + .Q(\blk00000003/sig000004ca ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk0000050c ( + .A0(\blk00000003/sig00000049 ), + .A1(\blk00000003/sig00000049 ), + .A2(\blk00000003/sig00000049 ), + .A3(\blk00000003/sig00000049 ), + .CE(ce), + .CLK(clk), + .D(coef_din_0[16]), + .Q(\blk00000003/sig0000058d ), + .Q15(\NLW_blk00000003/blk0000050c_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk0000050b ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig0000058c ), + .Q(\blk00000003/sig000004c9 ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk0000050a ( + .A0(\blk00000003/sig00000049 ), + .A1(\blk00000003/sig00000049 ), + .A2(\blk00000003/sig00000049 ), + .A3(\blk00000003/sig00000049 ), + .CE(ce), + .CLK(clk), + .D(coef_din_0[17]), + .Q(\blk00000003/sig0000058c ), + .Q15(\NLW_blk00000003/blk0000050a_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000509 ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig0000058b ), + .Q(\blk00000003/sig000004cb ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000508 ( + .A0(\blk00000003/sig00000049 ), + .A1(\blk00000003/sig00000049 ), + .A2(\blk00000003/sig00000049 ), + .A3(\blk00000003/sig00000049 ), + .CE(ce), + .CLK(clk), + .D(coef_din_0[15]), + .Q(\blk00000003/sig0000058b ), + .Q15(\NLW_blk00000003/blk00000508_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000507 ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig0000058a ), + .Q(\blk00000003/sig000001e1 ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000506 ( + .A0(\blk00000003/sig000000ae ), + .A1(\blk00000003/sig00000049 ), + .A2(\blk00000003/sig00000049 ), + .A3(\blk00000003/sig00000049 ), + .CE(ce), + .CLK(clk), + .D(\blk00000003/sig000001e3 ), + .Q(\blk00000003/sig0000058a ), + .Q15(\NLW_blk00000003/blk00000506_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000505 ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig00000589 ), + .Q(\blk00000003/sig0000042e ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000504 ( + .A0(\blk00000003/sig00000049 ), + .A1(\blk00000003/sig00000049 ), + .A2(\blk00000003/sig000000ae ), + .A3(\blk00000003/sig00000049 ), + .CE(ce), + .CLK(clk), + .D(\blk00000003/sig000001d8 ), + .Q(\blk00000003/sig00000589 ), + .Q15(\NLW_blk00000003/blk00000504_Q15_UNCONNECTED ) + ); + INV \blk00000003/blk00000503 ( + .I(\blk00000003/sig00000240 ), + .O(\blk00000003/sig00000288 ) + ); + INV \blk00000003/blk00000502 ( + .I(\blk00000003/sig00000291 ), + .O(\blk00000003/sig00000281 ) + ); + INV \blk00000003/blk00000501 ( + .I(\blk00000003/sig000001cf ), + .O(\blk00000003/sig00000296 ) + ); + INV \blk00000003/blk00000500 ( + .I(\blk00000003/sig00000298 ), + .O(\blk00000003/sig00000287 ) + ); + INV \blk00000003/blk000004ff ( + .I(\blk00000003/sig000004fd ), + .O(\blk00000003/sig00000578 ) + ); + INV \blk00000003/blk000004fe ( + .I(\blk00000003/sig00000244 ), + .O(\blk00000003/sig00000299 ) + ); + INV \blk00000003/blk000004fd ( + .I(\blk00000003/sig00000240 ), + .O(\blk00000003/sig00000282 ) + ); + INV \blk00000003/blk000004fc ( + .I(\blk00000003/sig0000021d ), + .O(\blk00000003/sig00000245 ) + ); + INV \blk00000003/blk000004fb ( + .I(\blk00000003/sig00000267 ), + .O(\blk00000003/sig00000227 ) + ); + INV \blk00000003/blk000004fa ( + .I(\blk00000003/sig000001cd ), + .O(\blk00000003/sig000000b9 ) + ); + INV \blk00000003/blk000004f9 ( + .I(\blk00000003/sig000000b6 ), + .O(\blk00000003/sig000000b7 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000004f8 ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig00000502 ), + .Q(\blk00000003/sig0000057c ) + ); + LUT3 #( + .INIT ( 8'h08 )) + \blk00000003/blk000004f7 ( + .I0(coef_ld), + .I1(\blk00000003/sig00000236 ), + .I2(\blk00000003/sig0000024d ), + .O(\blk00000003/sig00000249 ) + ); + LUT5 #( + .INIT ( 32'h4F444444 )) + \blk00000003/blk000004f6 ( + .I0(\blk00000003/sig0000024a ), + .I1(\blk00000003/sig0000023e ), + .I2(\blk00000003/sig0000024d ), + .I3(coef_ld), + .I4(\blk00000003/sig00000236 ), + .O(\blk00000003/sig00000241 ) + ); + LUT4 #( + .INIT ( 16'h1000 )) + \blk00000003/blk000004f5 ( + .I0(coef_ld), + .I1(\blk00000003/sig00000238 ), + .I2(coef_we), + .I3(\blk00000003/sig00000236 ), + .O(\blk00000003/sig00000248 ) + ); + LUT5 #( + .INIT ( 32'h20AA2020 )) + \blk00000003/blk000004f4 ( + .I0(\blk00000003/sig00000236 ), + .I1(\blk00000003/sig00000238 ), + .I2(coef_we), + .I3(\blk00000003/sig0000024d ), + .I4(coef_ld), + .O(\blk00000003/sig00000247 ) + ); + LUT4 #( + .INIT ( 16'hEA2A )) + \blk00000003/blk000004f3 ( + .I0(\blk00000003/sig00000291 ), + .I1(ce), + .I2(\blk00000003/sig0000023e ), + .I3(\blk00000003/sig0000021b ), + .O(\blk00000003/sig00000588 ) + ); + LUT4 #( + .INIT ( 16'hEA2A )) + \blk00000003/blk000004f2 ( + .I0(\blk00000003/sig00000298 ), + .I1(ce), + .I2(\blk00000003/sig0000023c ), + .I3(\blk00000003/sig00000289 ), + .O(\blk00000003/sig00000587 ) + ); + LUT4 #( + .INIT ( 16'hEA2A )) + \blk00000003/blk000004f1 ( + .I0(\blk00000003/sig0000057b ), + .I1(ce), + .I2(\blk00000003/sig000001d6 ), + .I3(\blk00000003/sig000001d8 ), + .O(\blk00000003/sig00000585 ) + ); + LUT3 #( + .INIT ( 8'hF4 )) + \blk00000003/blk000004f0 ( + .I0(ce), + .I1(sclr), + .I2(\blk00000003/sig0000057f ), + .O(\blk00000003/sig00000584 ) + ); + LUT3 #( + .INIT ( 8'hF4 )) + \blk00000003/blk000004ef ( + .I0(ce), + .I1(\blk00000003/sig0000024d ), + .I2(\blk00000003/sig0000057d ), + .O(\blk00000003/sig00000583 ) + ); + LUT5 #( + .INIT ( 32'h6AAAAAAA )) + \blk00000003/blk000004ee ( + .I0(\blk00000003/sig0000057e ), + .I1(\blk00000003/sig000002a2 ), + .I2(ce), + .I3(nd), + .I4(NlwRenamedSig_OI_rfd), + .O(\blk00000003/sig00000586 ) + ); + FD #( + .INIT ( 1'b1 )) + \blk00000003/blk000004ed ( + .C(clk), + .D(\blk00000003/sig00000588 ), + .Q(\blk00000003/sig00000291 ) + ); + FD #( + .INIT ( 1'b1 )) + \blk00000003/blk000004ec ( + .C(clk), + .D(\blk00000003/sig00000587 ), + .Q(\blk00000003/sig00000298 ) + ); + FDR #( + .INIT ( 1'b0 )) + \blk00000003/blk000004eb ( + .C(clk), + .D(\blk00000003/sig00000586 ), + .R(sclr), + .Q(\blk00000003/sig0000057e ) + ); + FDR #( + .INIT ( 1'b0 )) + \blk00000003/blk000004ea ( + .C(clk), + .D(\blk00000003/sig00000585 ), + .R(sclr), + .Q(\blk00000003/sig0000057b ) + ); + LUT1 #( + .INIT ( 2'h2 )) + \blk00000003/blk000004e9 ( + .I0(\blk00000003/sig00000500 ), + .O(\blk00000003/sig000004fb ) + ); + LUT1 #( + .INIT ( 2'h2 )) + \blk00000003/blk000004e8 ( + .I0(\blk00000003/sig000004ff ), + .O(\blk00000003/sig000004f8 ) + ); + LUT1 #( + .INIT ( 2'h2 )) + \blk00000003/blk000004e7 ( + .I0(\blk00000003/sig000004fe ), + .O(\blk00000003/sig000004f5 ) + ); + LUT1 #( + .INIT ( 2'h2 )) + \blk00000003/blk000004e6 ( + .I0(\blk00000003/sig000004fd ), + .O(\blk00000003/sig000004f2 ) + ); + LUT1 #( + .INIT ( 2'h2 )) + \blk00000003/blk000004e5 ( + .I0(\blk00000003/sig000002da ), + .O(\blk00000003/sig000002db ) + ); + LUT1 #( + .INIT ( 2'h2 )) + \blk00000003/blk000004e4 ( + .I0(\blk00000003/sig000002d7 ), + .O(\blk00000003/sig000002d8 ) + ); + LUT1 #( + .INIT ( 2'h2 )) + \blk00000003/blk000004e3 ( + .I0(\blk00000003/sig000002d3 ), + .O(\blk00000003/sig000002d4 ) + ); + LUT1 #( + .INIT ( 2'h2 )) + \blk00000003/blk000004e2 ( + .I0(\blk00000003/sig000002b7 ), + .O(\blk00000003/sig000002b1 ) + ); + LUT1 #( + .INIT ( 2'h2 )) + \blk00000003/blk000004e1 ( + .I0(\blk00000003/sig0000057e ), + .O(\blk00000003/sig000002a7 ) + ); + LUT1 #( + .INIT ( 2'h2 )) + \blk00000003/blk000004e0 ( + .I0(\blk00000003/sig0000029f ), + .O(\blk00000003/sig0000029d ) + ); + LUT1 #( + .INIT ( 2'h2 )) + \blk00000003/blk000004df ( + .I0(\blk00000003/sig00000271 ), + .O(\blk00000003/sig00000272 ) + ); + LUT1 #( + .INIT ( 2'h2 )) + \blk00000003/blk000004de ( + .I0(\blk00000003/sig0000026e ), + .O(\blk00000003/sig0000026f ) + ); + LUT1 #( + .INIT ( 2'h2 )) + \blk00000003/blk000004dd ( + .I0(\blk00000003/sig0000026a ), + .O(\blk00000003/sig0000026b ) + ); + LUT1 #( + .INIT ( 2'h2 )) + \blk00000003/blk000004dc ( + .I0(\blk00000003/sig00000260 ), + .O(\blk00000003/sig0000025d ) + ); + LUT1 #( + .INIT ( 2'h2 )) + \blk00000003/blk000004db ( + .I0(\blk00000003/sig0000025f ), + .O(\blk00000003/sig0000025a ) + ); + LUT1 #( + .INIT ( 2'h2 )) + \blk00000003/blk000004da ( + .I0(\blk00000003/sig00000255 ), + .O(\blk00000003/sig00000252 ) + ); + LUT1 #( + .INIT ( 2'h2 )) + \blk00000003/blk000004d9 ( + .I0(\blk00000003/sig00000254 ), + .O(\blk00000003/sig0000024f ) + ); + LUT3 #( + .INIT ( 8'h08 )) + \blk00000003/blk000004d8 ( + .I0(\blk00000003/sig00000254 ), + .I1(\blk00000003/sig00000255 ), + .I2(\blk00000003/sig00000258 ), + .O(\blk00000003/sig0000022f ) + ); + LUT1 #( + .INIT ( 2'h2 )) + \blk00000003/blk000004d7 ( + .I0(\blk00000003/sig00000267 ), + .O(\blk00000003/sig00000229 ) + ); + LUT1 #( + .INIT ( 2'h2 )) + \blk00000003/blk000004d6 ( + .I0(\blk00000003/sig000001cd ), + .O(\blk00000003/sig000000ba ) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk000004d5 ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig00000572 ), + .R(sclr), + .Q(\blk00000003/sig00000577 ) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk000004d4 ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig0000056f ), + .R(sclr), + .Q(\blk00000003/sig00000576 ) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk000004d3 ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig0000056c ), + .R(sclr), + .Q(\blk00000003/sig00000575 ) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk000004d2 ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig00000569 ), + .R(sclr), + .Q(\blk00000003/sig00000574 ) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk000004d1 ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig00000566 ), + .R(sclr), + .Q(\blk00000003/sig00000573 ) + ); + FDSE #( + .INIT ( 1'b1 )) + \blk00000003/blk000004d0 ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig000004f0 ), + .S(sclr), + .Q(\blk00000003/sig00000501 ) + ); + FDSE #( + .INIT ( 1'b1 )) + \blk00000003/blk000004cf ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig000004fc ), + .S(sclr), + .Q(\blk00000003/sig00000500 ) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk000004ce ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig000004f9 ), + .R(sclr), + .Q(\blk00000003/sig000004ff ) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk000004cd ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig000004f6 ), + .R(sclr), + .Q(\blk00000003/sig000004fe ) + ); + FDSE #( + .INIT ( 1'b1 )) + \blk00000003/blk000004cc ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig000004f3 ), + .S(sclr), + .Q(\blk00000003/sig000004fd ) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk000004cb ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig000002dd ), + .R(\blk00000003/sig000002e0 ), + .Q(\blk00000003/sig000002da ) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk000004ca ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig000002dc ), + .R(\blk00000003/sig000002e0 ), + .Q(\blk00000003/sig000002d7 ) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk000004c9 ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig000002d6 ), + .R(\blk00000003/sig000002e0 ), + .Q(\blk00000003/sig000002d3 ) + ); + FDSE #( + .INIT ( 1'b1 )) + \blk00000003/blk000004c8 ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig000002c8 ), + .S(\blk00000003/sig000002df ), + .Q(\blk00000003/sig000002d1 ) + ); + FDSE #( + .INIT ( 1'b1 )) + \blk00000003/blk000004c7 ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig000002ce ), + .S(\blk00000003/sig000002df ), + .Q(\blk00000003/sig000002d0 ) + ); + FDSE #( + .INIT ( 1'b1 )) + \blk00000003/blk000004c6 ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig000002cb ), + .S(\blk00000003/sig000002df ), + .Q(\blk00000003/sig000002cf ) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk000004c5 ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig000002bc ), + .R(\blk00000003/sig000002df ), + .Q(\blk00000003/sig000002c6 ) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk000004c4 ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig000002c2 ), + .R(\blk00000003/sig000002df ), + .Q(\blk00000003/sig000002c5 ) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk000004c3 ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig000002bf ), + .R(\blk00000003/sig000002df ), + .Q(\blk00000003/sig000002c4 ) + ); + FDR \blk00000003/blk000004c2 ( + .C(clk), + .D(\blk00000003/sig00000584 ), + .R(ce), + .Q(\blk00000003/sig0000057f ) + ); + FDSE #( + .INIT ( 1'b1 )) + \blk00000003/blk000004c1 ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig000002b2 ), + .S(sclr), + .Q(\blk00000003/sig000002b7 ) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk000004c0 ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig000002b5 ), + .R(sclr), + .Q(\blk00000003/sig000002b6 ) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk000004bf ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig000002ac ), + .R(sclr), + .Q(\blk00000003/sig000001e9 ) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk000004be ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig000002af ), + .R(sclr), + .Q(\blk00000003/sig000001e8 ) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk000004bd ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig0000029b ), + .R(sclr), + .Q(\blk00000003/sig000002a0 ) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk000004bc ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig0000029e ), + .R(sclr), + .Q(\blk00000003/sig0000029f ) + ); + FDR \blk00000003/blk000004bb ( + .C(clk), + .D(\blk00000003/sig00000583 ), + .R(ce), + .Q(\blk00000003/sig0000057d ) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk000004ba ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig00000274 ), + .R(\blk00000003/sig00000277 ), + .Q(\blk00000003/sig00000271 ) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk000004b9 ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig00000273 ), + .R(\blk00000003/sig00000277 ), + .Q(\blk00000003/sig0000026e ) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk000004b8 ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig0000026d ), + .R(\blk00000003/sig00000277 ), + .Q(\blk00000003/sig0000026a ) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk000004b7 ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig00000266 ), + .R(coef_ld), + .Q(\blk00000003/sig00000267 ) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk000004b6 ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig00000262 ), + .R(sclr), + .Q(\blk00000003/sig00000263 ) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk000004b5 ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig0000025e ), + .R(sclr), + .Q(\blk00000003/sig00000260 ) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk000004b4 ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig0000025b ), + .R(sclr), + .Q(\blk00000003/sig0000025f ) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk000004b3 ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig00000257 ), + .R(coef_ld), + .Q(\blk00000003/sig00000258 ) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk000004b2 ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig00000253 ), + .R(coef_ld), + .Q(\blk00000003/sig00000255 ) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk000004b1 ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig00000250 ), + .R(coef_ld), + .Q(\blk00000003/sig00000254 ) + ); + LUT2 #( + .INIT ( 4'hE )) + \blk00000003/blk000004b0 ( + .I0(\blk00000003/sig00000573 ), + .I1(\blk00000003/sig000004fd ), + .O(\blk00000003/sig00000565 ) + ); + LUT2 #( + .INIT ( 4'hE )) + \blk00000003/blk000004af ( + .I0(\blk00000003/sig00000574 ), + .I1(\blk00000003/sig000004fd ), + .O(\blk00000003/sig00000568 ) + ); + LUT2 #( + .INIT ( 4'hE )) + \blk00000003/blk000004ae ( + .I0(\blk00000003/sig00000575 ), + .I1(\blk00000003/sig000004fd ), + .O(\blk00000003/sig0000056b ) + ); + LUT2 #( + .INIT ( 4'hE )) + \blk00000003/blk000004ad ( + .I0(\blk00000003/sig00000576 ), + .I1(\blk00000003/sig000004fd ), + .O(\blk00000003/sig0000056e ) + ); + LUT3 #( + .INIT ( 8'hDE )) + \blk00000003/blk000004ac ( + .I0(\blk00000003/sig00000577 ), + .I1(\blk00000003/sig000004fd ), + .I2(\blk00000003/sig000001df ), + .O(\blk00000003/sig00000571 ) + ); + LUT3 #( + .INIT ( 8'h04 )) + \blk00000003/blk000004ab ( + .I0(\blk00000003/sig000001df ), + .I1(\blk00000003/sig0000004a ), + .I2(\blk00000003/sig000004fd ), + .O(\blk00000003/sig00000563 ) + ); + LUT4 #( + .INIT ( 16'h5140 )) + \blk00000003/blk000004aa ( + .I0(\blk00000003/sig000001cd ), + .I1(\blk00000003/sig000001df ), + .I2(\blk00000003/sig00000104 ), + .I3(NlwRenamedSig_OI_dout_2[47]), + .O(\blk00000003/sig00000562 ) + ); + LUT4 #( + .INIT ( 16'h5140 )) + \blk00000003/blk000004a9 ( + .I0(\blk00000003/sig000001cd ), + .I1(\blk00000003/sig000001df ), + .I2(\blk00000003/sig00000105 ), + .I3(NlwRenamedSig_OI_dout_2[46]), + .O(\blk00000003/sig00000561 ) + ); + LUT4 #( + .INIT ( 16'h5140 )) + \blk00000003/blk000004a8 ( + .I0(\blk00000003/sig000001cd ), + .I1(\blk00000003/sig000001df ), + .I2(\blk00000003/sig00000107 ), + .I3(NlwRenamedSig_OI_dout_2[44]), + .O(\blk00000003/sig0000055f ) + ); + LUT4 #( + .INIT ( 16'h5140 )) + \blk00000003/blk000004a7 ( + .I0(\blk00000003/sig000001cd ), + .I1(\blk00000003/sig000001df ), + .I2(\blk00000003/sig00000106 ), + .I3(NlwRenamedSig_OI_dout_2[45]), + .O(\blk00000003/sig00000560 ) + ); + LUT4 #( + .INIT ( 16'h5140 )) + \blk00000003/blk000004a6 ( + .I0(\blk00000003/sig000001cd ), + .I1(\blk00000003/sig000001df ), + .I2(\blk00000003/sig00000108 ), + .I3(NlwRenamedSig_OI_dout_2[43]), + .O(\blk00000003/sig0000055e ) + ); + LUT4 #( + .INIT ( 16'h5140 )) + \blk00000003/blk000004a5 ( + .I0(\blk00000003/sig000001cd ), + .I1(\blk00000003/sig000001df ), + .I2(\blk00000003/sig0000010a ), + .I3(NlwRenamedSig_OI_dout_2[41]), + .O(\blk00000003/sig0000055c ) + ); + LUT4 #( + .INIT ( 16'h5140 )) + \blk00000003/blk000004a4 ( + .I0(\blk00000003/sig000001cd ), + .I1(\blk00000003/sig000001df ), + .I2(\blk00000003/sig00000109 ), + .I3(NlwRenamedSig_OI_dout_2[42]), + .O(\blk00000003/sig0000055d ) + ); + LUT4 #( + .INIT ( 16'h5140 )) + \blk00000003/blk000004a3 ( + .I0(\blk00000003/sig000001cd ), + .I1(\blk00000003/sig000001df ), + .I2(\blk00000003/sig0000010b ), + .I3(NlwRenamedSig_OI_dout_2[40]), + .O(\blk00000003/sig0000055b ) + ); + LUT4 #( + .INIT ( 16'h5140 )) + \blk00000003/blk000004a2 ( + .I0(\blk00000003/sig000001cd ), + .I1(\blk00000003/sig000001df ), + .I2(\blk00000003/sig0000010d ), + .I3(NlwRenamedSig_OI_dout_2[38]), + .O(\blk00000003/sig00000559 ) + ); + LUT4 #( + .INIT ( 16'h5140 )) + \blk00000003/blk000004a1 ( + .I0(\blk00000003/sig000001cd ), + .I1(\blk00000003/sig000001df ), + .I2(\blk00000003/sig0000010c ), + .I3(NlwRenamedSig_OI_dout_2[39]), + .O(\blk00000003/sig0000055a ) + ); + LUT4 #( + .INIT ( 16'h5140 )) + \blk00000003/blk000004a0 ( + .I0(\blk00000003/sig000001cd ), + .I1(\blk00000003/sig000001df ), + .I2(\blk00000003/sig0000010e ), + .I3(NlwRenamedSig_OI_dout_2[37]), + .O(\blk00000003/sig00000558 ) + ); + LUT4 #( + .INIT ( 16'h5140 )) + \blk00000003/blk0000049f ( + .I0(\blk00000003/sig000001cd ), + .I1(\blk00000003/sig000001df ), + .I2(\blk00000003/sig00000110 ), + .I3(NlwRenamedSig_OI_dout_2[35]), + .O(\blk00000003/sig00000556 ) + ); + LUT4 #( + .INIT ( 16'h5140 )) + \blk00000003/blk0000049e ( + .I0(\blk00000003/sig000001cd ), + .I1(\blk00000003/sig000001df ), + .I2(\blk00000003/sig0000010f ), + .I3(NlwRenamedSig_OI_dout_2[36]), + .O(\blk00000003/sig00000557 ) + ); + LUT4 #( + .INIT ( 16'h5140 )) + \blk00000003/blk0000049d ( + .I0(\blk00000003/sig000001cd ), + .I1(\blk00000003/sig000001df ), + .I2(\blk00000003/sig00000111 ), + .I3(NlwRenamedSig_OI_dout_2[34]), + .O(\blk00000003/sig00000555 ) + ); + LUT4 #( + .INIT ( 16'h5140 )) + \blk00000003/blk0000049c ( + .I0(\blk00000003/sig000001cd ), + .I1(\blk00000003/sig000001df ), + .I2(\blk00000003/sig00000113 ), + .I3(NlwRenamedSig_OI_dout_2[32]), + .O(\blk00000003/sig00000553 ) + ); + LUT4 #( + .INIT ( 16'h5140 )) + \blk00000003/blk0000049b ( + .I0(\blk00000003/sig000001cd ), + .I1(\blk00000003/sig000001df ), + .I2(\blk00000003/sig00000112 ), + .I3(NlwRenamedSig_OI_dout_2[33]), + .O(\blk00000003/sig00000554 ) + ); + LUT4 #( + .INIT ( 16'h5140 )) + \blk00000003/blk0000049a ( + .I0(\blk00000003/sig000001cd ), + .I1(\blk00000003/sig000001df ), + .I2(\blk00000003/sig00000114 ), + .I3(NlwRenamedSig_OI_dout_2[31]), + .O(\blk00000003/sig00000552 ) + ); + LUT4 #( + .INIT ( 16'h5140 )) + \blk00000003/blk00000499 ( + .I0(\blk00000003/sig000001cd ), + .I1(\blk00000003/sig000001df ), + .I2(\blk00000003/sig00000116 ), + .I3(NlwRenamedSig_OI_dout_2[29]), + .O(\blk00000003/sig00000550 ) + ); + LUT4 #( + .INIT ( 16'h5140 )) + \blk00000003/blk00000498 ( + .I0(\blk00000003/sig000001cd ), + .I1(\blk00000003/sig000001df ), + .I2(\blk00000003/sig00000115 ), + .I3(NlwRenamedSig_OI_dout_2[30]), + .O(\blk00000003/sig00000551 ) + ); + LUT4 #( + .INIT ( 16'h5140 )) + \blk00000003/blk00000497 ( + .I0(\blk00000003/sig000001cd ), + .I1(\blk00000003/sig000001df ), + .I2(\blk00000003/sig00000117 ), + .I3(NlwRenamedSig_OI_dout_2[28]), + .O(\blk00000003/sig0000054f ) + ); + LUT4 #( + .INIT ( 16'h5140 )) + \blk00000003/blk00000496 ( + .I0(\blk00000003/sig000001cd ), + .I1(\blk00000003/sig000001df ), + .I2(\blk00000003/sig00000119 ), + .I3(NlwRenamedSig_OI_dout_2[26]), + .O(\blk00000003/sig0000054d ) + ); + LUT4 #( + .INIT ( 16'h5140 )) + \blk00000003/blk00000495 ( + .I0(\blk00000003/sig000001cd ), + .I1(\blk00000003/sig000001df ), + .I2(\blk00000003/sig00000118 ), + .I3(NlwRenamedSig_OI_dout_2[27]), + .O(\blk00000003/sig0000054e ) + ); + LUT4 #( + .INIT ( 16'h5140 )) + \blk00000003/blk00000494 ( + .I0(\blk00000003/sig000001cd ), + .I1(\blk00000003/sig000001df ), + .I2(\blk00000003/sig0000011a ), + .I3(NlwRenamedSig_OI_dout_2[25]), + .O(\blk00000003/sig0000054c ) + ); + LUT4 #( + .INIT ( 16'h5140 )) + \blk00000003/blk00000493 ( + .I0(\blk00000003/sig000001cd ), + .I1(\blk00000003/sig000001df ), + .I2(\blk00000003/sig0000011c ), + .I3(NlwRenamedSig_OI_dout_2[23]), + .O(\blk00000003/sig0000054a ) + ); + LUT4 #( + .INIT ( 16'h5140 )) + \blk00000003/blk00000492 ( + .I0(\blk00000003/sig000001cd ), + .I1(\blk00000003/sig000001df ), + .I2(\blk00000003/sig0000011b ), + .I3(NlwRenamedSig_OI_dout_2[24]), + .O(\blk00000003/sig0000054b ) + ); + LUT4 #( + .INIT ( 16'h5140 )) + \blk00000003/blk00000491 ( + .I0(\blk00000003/sig000001cd ), + .I1(\blk00000003/sig000001df ), + .I2(\blk00000003/sig0000011d ), + .I3(NlwRenamedSig_OI_dout_2[22]), + .O(\blk00000003/sig00000549 ) + ); + LUT4 #( + .INIT ( 16'h5140 )) + \blk00000003/blk00000490 ( + .I0(\blk00000003/sig000001cd ), + .I1(\blk00000003/sig000001df ), + .I2(\blk00000003/sig0000011f ), + .I3(NlwRenamedSig_OI_dout_2[20]), + .O(\blk00000003/sig00000547 ) + ); + LUT4 #( + .INIT ( 16'h5140 )) + \blk00000003/blk0000048f ( + .I0(\blk00000003/sig000001cd ), + .I1(\blk00000003/sig000001df ), + .I2(\blk00000003/sig0000011e ), + .I3(NlwRenamedSig_OI_dout_2[21]), + .O(\blk00000003/sig00000548 ) + ); + LUT4 #( + .INIT ( 16'h5140 )) + \blk00000003/blk0000048e ( + .I0(\blk00000003/sig000001cd ), + .I1(\blk00000003/sig000001df ), + .I2(\blk00000003/sig00000120 ), + .I3(NlwRenamedSig_OI_dout_2[19]), + .O(\blk00000003/sig00000546 ) + ); + LUT4 #( + .INIT ( 16'h5140 )) + \blk00000003/blk0000048d ( + .I0(\blk00000003/sig000001cd ), + .I1(\blk00000003/sig000001df ), + .I2(\blk00000003/sig00000122 ), + .I3(NlwRenamedSig_OI_dout_2[17]), + .O(\blk00000003/sig00000544 ) + ); + LUT4 #( + .INIT ( 16'h5140 )) + \blk00000003/blk0000048c ( + .I0(\blk00000003/sig000001cd ), + .I1(\blk00000003/sig000001df ), + .I2(\blk00000003/sig00000121 ), + .I3(NlwRenamedSig_OI_dout_2[18]), + .O(\blk00000003/sig00000545 ) + ); + LUT4 #( + .INIT ( 16'h5140 )) + \blk00000003/blk0000048b ( + .I0(\blk00000003/sig000001cd ), + .I1(\blk00000003/sig000001df ), + .I2(\blk00000003/sig00000123 ), + .I3(NlwRenamedSig_OI_dout_2[16]), + .O(\blk00000003/sig00000543 ) + ); + LUT4 #( + .INIT ( 16'h5140 )) + \blk00000003/blk0000048a ( + .I0(\blk00000003/sig000001cd ), + .I1(\blk00000003/sig000001df ), + .I2(\blk00000003/sig00000125 ), + .I3(NlwRenamedSig_OI_dout_2[14]), + .O(\blk00000003/sig00000541 ) + ); + LUT4 #( + .INIT ( 16'h5140 )) + \blk00000003/blk00000489 ( + .I0(\blk00000003/sig000001cd ), + .I1(\blk00000003/sig000001df ), + .I2(\blk00000003/sig00000124 ), + .I3(NlwRenamedSig_OI_dout_2[15]), + .O(\blk00000003/sig00000542 ) + ); + LUT4 #( + .INIT ( 16'h5140 )) + \blk00000003/blk00000488 ( + .I0(\blk00000003/sig000001cd ), + .I1(\blk00000003/sig000001df ), + .I2(\blk00000003/sig00000126 ), + .I3(NlwRenamedSig_OI_dout_2[13]), + .O(\blk00000003/sig00000540 ) + ); + LUT4 #( + .INIT ( 16'h5140 )) + \blk00000003/blk00000487 ( + .I0(\blk00000003/sig000001cd ), + .I1(\blk00000003/sig000001df ), + .I2(\blk00000003/sig00000128 ), + .I3(NlwRenamedSig_OI_dout_2[11]), + .O(\blk00000003/sig0000053e ) + ); + LUT4 #( + .INIT ( 16'h5140 )) + \blk00000003/blk00000486 ( + .I0(\blk00000003/sig000001cd ), + .I1(\blk00000003/sig000001df ), + .I2(\blk00000003/sig00000127 ), + .I3(NlwRenamedSig_OI_dout_2[12]), + .O(\blk00000003/sig0000053f ) + ); + LUT4 #( + .INIT ( 16'h5140 )) + \blk00000003/blk00000485 ( + .I0(\blk00000003/sig000001cd ), + .I1(\blk00000003/sig000001df ), + .I2(\blk00000003/sig00000129 ), + .I3(NlwRenamedSig_OI_dout_2[10]), + .O(\blk00000003/sig0000053d ) + ); + LUT4 #( + .INIT ( 16'h5140 )) + \blk00000003/blk00000484 ( + .I0(\blk00000003/sig000001cd ), + .I1(\blk00000003/sig000001df ), + .I2(\blk00000003/sig0000012b ), + .I3(NlwRenamedSig_OI_dout_2[8]), + .O(\blk00000003/sig0000053b ) + ); + LUT4 #( + .INIT ( 16'h5140 )) + \blk00000003/blk00000483 ( + .I0(\blk00000003/sig000001cd ), + .I1(\blk00000003/sig000001df ), + .I2(\blk00000003/sig0000012a ), + .I3(NlwRenamedSig_OI_dout_2[9]), + .O(\blk00000003/sig0000053c ) + ); + LUT4 #( + .INIT ( 16'h5140 )) + \blk00000003/blk00000482 ( + .I0(\blk00000003/sig000001cd ), + .I1(\blk00000003/sig000001df ), + .I2(\blk00000003/sig0000012c ), + .I3(NlwRenamedSig_OI_dout_2[7]), + .O(\blk00000003/sig0000053a ) + ); + LUT4 #( + .INIT ( 16'h5140 )) + \blk00000003/blk00000481 ( + .I0(\blk00000003/sig000001cd ), + .I1(\blk00000003/sig000001df ), + .I2(\blk00000003/sig0000012e ), + .I3(NlwRenamedSig_OI_dout_2[5]), + .O(\blk00000003/sig00000538 ) + ); + LUT4 #( + .INIT ( 16'h5140 )) + \blk00000003/blk00000480 ( + .I0(\blk00000003/sig000001cd ), + .I1(\blk00000003/sig000001df ), + .I2(\blk00000003/sig0000012d ), + .I3(NlwRenamedSig_OI_dout_2[6]), + .O(\blk00000003/sig00000539 ) + ); + LUT4 #( + .INIT ( 16'h5140 )) + \blk00000003/blk0000047f ( + .I0(\blk00000003/sig000001cd ), + .I1(\blk00000003/sig000001df ), + .I2(\blk00000003/sig0000012f ), + .I3(NlwRenamedSig_OI_dout_2[4]), + .O(\blk00000003/sig00000537 ) + ); + LUT4 #( + .INIT ( 16'h5140 )) + \blk00000003/blk0000047e ( + .I0(\blk00000003/sig000001cd ), + .I1(\blk00000003/sig000001df ), + .I2(\blk00000003/sig00000131 ), + .I3(NlwRenamedSig_OI_dout_2[2]), + .O(\blk00000003/sig00000535 ) + ); + LUT4 #( + .INIT ( 16'h5140 )) + \blk00000003/blk0000047d ( + .I0(\blk00000003/sig000001cd ), + .I1(\blk00000003/sig000001df ), + .I2(\blk00000003/sig00000130 ), + .I3(NlwRenamedSig_OI_dout_2[3]), + .O(\blk00000003/sig00000536 ) + ); + LUT4 #( + .INIT ( 16'h5140 )) + \blk00000003/blk0000047c ( + .I0(\blk00000003/sig000001cd ), + .I1(\blk00000003/sig000001df ), + .I2(\blk00000003/sig00000132 ), + .I3(NlwRenamedSig_OI_dout_2[1]), + .O(\blk00000003/sig00000534 ) + ); + LUT4 #( + .INIT ( 16'h5140 )) + \blk00000003/blk0000047b ( + .I0(\blk00000003/sig000001cd ), + .I1(\blk00000003/sig000001df ), + .I2(\blk00000003/sig00000133 ), + .I3(NlwRenamedSig_OI_dout_2[0]), + .O(\blk00000003/sig00000533 ) + ); + LUT4 #( + .INIT ( 16'h5140 )) + \blk00000003/blk0000047a ( + .I0(\blk00000003/sig000001cd ), + .I1(\blk00000003/sig000001df ), + .I2(\blk00000003/sig0000017c ), + .I3(NlwRenamedSig_OI_dout_1[47]), + .O(\blk00000003/sig00000532 ) + ); + LUT4 #( + .INIT ( 16'h5140 )) + \blk00000003/blk00000479 ( + .I0(\blk00000003/sig000001cd ), + .I1(\blk00000003/sig000001df ), + .I2(\blk00000003/sig0000017e ), + .I3(NlwRenamedSig_OI_dout_1[45]), + .O(\blk00000003/sig00000530 ) + ); + LUT4 #( + .INIT ( 16'h5140 )) + \blk00000003/blk00000478 ( + .I0(\blk00000003/sig000001cd ), + .I1(\blk00000003/sig000001df ), + .I2(\blk00000003/sig0000017d ), + .I3(NlwRenamedSig_OI_dout_1[46]), + .O(\blk00000003/sig00000531 ) + ); + LUT4 #( + .INIT ( 16'h5140 )) + \blk00000003/blk00000477 ( + .I0(\blk00000003/sig000001cd ), + .I1(\blk00000003/sig000001df ), + .I2(\blk00000003/sig0000017f ), + .I3(NlwRenamedSig_OI_dout_1[44]), + .O(\blk00000003/sig0000052f ) + ); + LUT4 #( + .INIT ( 16'h5140 )) + \blk00000003/blk00000476 ( + .I0(\blk00000003/sig000001cd ), + .I1(\blk00000003/sig000001df ), + .I2(\blk00000003/sig00000181 ), + .I3(NlwRenamedSig_OI_dout_1[42]), + .O(\blk00000003/sig0000052d ) + ); + LUT4 #( + .INIT ( 16'h5140 )) + \blk00000003/blk00000475 ( + .I0(\blk00000003/sig000001cd ), + .I1(\blk00000003/sig000001df ), + .I2(\blk00000003/sig00000180 ), + .I3(NlwRenamedSig_OI_dout_1[43]), + .O(\blk00000003/sig0000052e ) + ); + LUT4 #( + .INIT ( 16'h5140 )) + \blk00000003/blk00000474 ( + .I0(\blk00000003/sig000001cd ), + .I1(\blk00000003/sig000001df ), + .I2(\blk00000003/sig00000182 ), + .I3(NlwRenamedSig_OI_dout_1[41]), + .O(\blk00000003/sig0000052c ) + ); + LUT4 #( + .INIT ( 16'h5140 )) + \blk00000003/blk00000473 ( + .I0(\blk00000003/sig000001cd ), + .I1(\blk00000003/sig000001df ), + .I2(\blk00000003/sig00000184 ), + .I3(NlwRenamedSig_OI_dout_1[39]), + .O(\blk00000003/sig0000052a ) + ); + LUT4 #( + .INIT ( 16'h5140 )) + \blk00000003/blk00000472 ( + .I0(\blk00000003/sig000001cd ), + .I1(\blk00000003/sig000001df ), + .I2(\blk00000003/sig00000183 ), + .I3(NlwRenamedSig_OI_dout_1[40]), + .O(\blk00000003/sig0000052b ) + ); + LUT4 #( + .INIT ( 16'h5140 )) + \blk00000003/blk00000471 ( + .I0(\blk00000003/sig000001cd ), + .I1(\blk00000003/sig000001df ), + .I2(\blk00000003/sig00000185 ), + .I3(NlwRenamedSig_OI_dout_1[38]), + .O(\blk00000003/sig00000529 ) + ); + LUT4 #( + .INIT ( 16'h5140 )) + \blk00000003/blk00000470 ( + .I0(\blk00000003/sig000001cd ), + .I1(\blk00000003/sig000001df ), + .I2(\blk00000003/sig00000187 ), + .I3(NlwRenamedSig_OI_dout_1[36]), + .O(\blk00000003/sig00000527 ) + ); + LUT4 #( + .INIT ( 16'h5140 )) + \blk00000003/blk0000046f ( + .I0(\blk00000003/sig000001cd ), + .I1(\blk00000003/sig000001df ), + .I2(\blk00000003/sig00000186 ), + .I3(NlwRenamedSig_OI_dout_1[37]), + .O(\blk00000003/sig00000528 ) + ); + LUT4 #( + .INIT ( 16'h5140 )) + \blk00000003/blk0000046e ( + .I0(\blk00000003/sig000001cd ), + .I1(\blk00000003/sig000001df ), + .I2(\blk00000003/sig00000188 ), + .I3(NlwRenamedSig_OI_dout_1[35]), + .O(\blk00000003/sig00000526 ) + ); + LUT4 #( + .INIT ( 16'h5140 )) + \blk00000003/blk0000046d ( + .I0(\blk00000003/sig000001cd ), + .I1(\blk00000003/sig000001df ), + .I2(\blk00000003/sig0000018a ), + .I3(NlwRenamedSig_OI_dout_1[33]), + .O(\blk00000003/sig00000524 ) + ); + LUT4 #( + .INIT ( 16'h5140 )) + \blk00000003/blk0000046c ( + .I0(\blk00000003/sig000001cd ), + .I1(\blk00000003/sig000001df ), + .I2(\blk00000003/sig00000189 ), + .I3(NlwRenamedSig_OI_dout_1[34]), + .O(\blk00000003/sig00000525 ) + ); + LUT4 #( + .INIT ( 16'h5140 )) + \blk00000003/blk0000046b ( + .I0(\blk00000003/sig000001cd ), + .I1(\blk00000003/sig000001df ), + .I2(\blk00000003/sig0000018b ), + .I3(NlwRenamedSig_OI_dout_1[32]), + .O(\blk00000003/sig00000523 ) + ); + LUT4 #( + .INIT ( 16'h5140 )) + \blk00000003/blk0000046a ( + .I0(\blk00000003/sig000001cd ), + .I1(\blk00000003/sig000001df ), + .I2(\blk00000003/sig0000018d ), + .I3(NlwRenamedSig_OI_dout_1[30]), + .O(\blk00000003/sig00000521 ) + ); + LUT4 #( + .INIT ( 16'h5140 )) + \blk00000003/blk00000469 ( + .I0(\blk00000003/sig000001cd ), + .I1(\blk00000003/sig000001df ), + .I2(\blk00000003/sig0000018c ), + .I3(NlwRenamedSig_OI_dout_1[31]), + .O(\blk00000003/sig00000522 ) + ); + LUT4 #( + .INIT ( 16'h5140 )) + \blk00000003/blk00000468 ( + .I0(\blk00000003/sig000001cd ), + .I1(\blk00000003/sig000001df ), + .I2(\blk00000003/sig0000018e ), + .I3(NlwRenamedSig_OI_dout_1[29]), + .O(\blk00000003/sig00000520 ) + ); + LUT4 #( + .INIT ( 16'h5140 )) + \blk00000003/blk00000467 ( + .I0(\blk00000003/sig000001cd ), + .I1(\blk00000003/sig000001df ), + .I2(\blk00000003/sig00000190 ), + .I3(NlwRenamedSig_OI_dout_1[27]), + .O(\blk00000003/sig0000051e ) + ); + LUT4 #( + .INIT ( 16'h5140 )) + \blk00000003/blk00000466 ( + .I0(\blk00000003/sig000001cd ), + .I1(\blk00000003/sig000001df ), + .I2(\blk00000003/sig0000018f ), + .I3(NlwRenamedSig_OI_dout_1[28]), + .O(\blk00000003/sig0000051f ) + ); + LUT4 #( + .INIT ( 16'h5140 )) + \blk00000003/blk00000465 ( + .I0(\blk00000003/sig000001cd ), + .I1(\blk00000003/sig000001df ), + .I2(\blk00000003/sig00000191 ), + .I3(NlwRenamedSig_OI_dout_1[26]), + .O(\blk00000003/sig0000051d ) + ); + LUT4 #( + .INIT ( 16'h5140 )) + \blk00000003/blk00000464 ( + .I0(\blk00000003/sig000001cd ), + .I1(\blk00000003/sig000001df ), + .I2(\blk00000003/sig00000193 ), + .I3(NlwRenamedSig_OI_dout_1[24]), + .O(\blk00000003/sig0000051b ) + ); + LUT4 #( + .INIT ( 16'h5140 )) + \blk00000003/blk00000463 ( + .I0(\blk00000003/sig000001cd ), + .I1(\blk00000003/sig000001df ), + .I2(\blk00000003/sig00000192 ), + .I3(NlwRenamedSig_OI_dout_1[25]), + .O(\blk00000003/sig0000051c ) + ); + LUT4 #( + .INIT ( 16'h5140 )) + \blk00000003/blk00000462 ( + .I0(\blk00000003/sig000001cd ), + .I1(\blk00000003/sig000001df ), + .I2(\blk00000003/sig00000194 ), + .I3(NlwRenamedSig_OI_dout_1[23]), + .O(\blk00000003/sig0000051a ) + ); + LUT4 #( + .INIT ( 16'h5140 )) + \blk00000003/blk00000461 ( + .I0(\blk00000003/sig000001cd ), + .I1(\blk00000003/sig000001df ), + .I2(\blk00000003/sig00000196 ), + .I3(NlwRenamedSig_OI_dout_1[21]), + .O(\blk00000003/sig00000518 ) + ); + LUT4 #( + .INIT ( 16'h5140 )) + \blk00000003/blk00000460 ( + .I0(\blk00000003/sig000001cd ), + .I1(\blk00000003/sig000001df ), + .I2(\blk00000003/sig00000195 ), + .I3(NlwRenamedSig_OI_dout_1[22]), + .O(\blk00000003/sig00000519 ) + ); + LUT4 #( + .INIT ( 16'h5140 )) + \blk00000003/blk0000045f ( + .I0(\blk00000003/sig000001cd ), + .I1(\blk00000003/sig000001df ), + .I2(\blk00000003/sig00000197 ), + .I3(NlwRenamedSig_OI_dout_1[20]), + .O(\blk00000003/sig00000517 ) + ); + LUT4 #( + .INIT ( 16'h5140 )) + \blk00000003/blk0000045e ( + .I0(\blk00000003/sig000001cd ), + .I1(\blk00000003/sig000001df ), + .I2(\blk00000003/sig00000199 ), + .I3(NlwRenamedSig_OI_dout_1[18]), + .O(\blk00000003/sig00000515 ) + ); + LUT4 #( + .INIT ( 16'h5140 )) + \blk00000003/blk0000045d ( + .I0(\blk00000003/sig000001cd ), + .I1(\blk00000003/sig000001df ), + .I2(\blk00000003/sig00000198 ), + .I3(NlwRenamedSig_OI_dout_1[19]), + .O(\blk00000003/sig00000516 ) + ); + LUT4 #( + .INIT ( 16'h5140 )) + \blk00000003/blk0000045c ( + .I0(\blk00000003/sig000001cd ), + .I1(\blk00000003/sig000001df ), + .I2(\blk00000003/sig0000019a ), + .I3(NlwRenamedSig_OI_dout_1[17]), + .O(\blk00000003/sig00000514 ) + ); + LUT4 #( + .INIT ( 16'h5140 )) + \blk00000003/blk0000045b ( + .I0(\blk00000003/sig000001cd ), + .I1(\blk00000003/sig000001df ), + .I2(\blk00000003/sig0000019c ), + .I3(NlwRenamedSig_OI_dout_1[15]), + .O(\blk00000003/sig00000512 ) + ); + LUT4 #( + .INIT ( 16'h5140 )) + \blk00000003/blk0000045a ( + .I0(\blk00000003/sig000001cd ), + .I1(\blk00000003/sig000001df ), + .I2(\blk00000003/sig0000019b ), + .I3(NlwRenamedSig_OI_dout_1[16]), + .O(\blk00000003/sig00000513 ) + ); + LUT4 #( + .INIT ( 16'h5140 )) + \blk00000003/blk00000459 ( + .I0(\blk00000003/sig000001cd ), + .I1(\blk00000003/sig000001df ), + .I2(\blk00000003/sig0000019d ), + .I3(NlwRenamedSig_OI_dout_1[14]), + .O(\blk00000003/sig00000511 ) + ); + LUT4 #( + .INIT ( 16'h5140 )) + \blk00000003/blk00000458 ( + .I0(\blk00000003/sig000001cd ), + .I1(\blk00000003/sig000001df ), + .I2(\blk00000003/sig0000019f ), + .I3(NlwRenamedSig_OI_dout_1[12]), + .O(\blk00000003/sig0000050f ) + ); + LUT4 #( + .INIT ( 16'h5140 )) + \blk00000003/blk00000457 ( + .I0(\blk00000003/sig000001cd ), + .I1(\blk00000003/sig000001df ), + .I2(\blk00000003/sig0000019e ), + .I3(NlwRenamedSig_OI_dout_1[13]), + .O(\blk00000003/sig00000510 ) + ); + LUT4 #( + .INIT ( 16'h5140 )) + \blk00000003/blk00000456 ( + .I0(\blk00000003/sig000001cd ), + .I1(\blk00000003/sig000001df ), + .I2(\blk00000003/sig000001a0 ), + .I3(NlwRenamedSig_OI_dout_1[11]), + .O(\blk00000003/sig0000050e ) + ); + LUT4 #( + .INIT ( 16'h5140 )) + \blk00000003/blk00000455 ( + .I0(\blk00000003/sig000001cd ), + .I1(\blk00000003/sig000001df ), + .I2(\blk00000003/sig000001a2 ), + .I3(NlwRenamedSig_OI_dout_1[9]), + .O(\blk00000003/sig0000050c ) + ); + LUT4 #( + .INIT ( 16'h5140 )) + \blk00000003/blk00000454 ( + .I0(\blk00000003/sig000001cd ), + .I1(\blk00000003/sig000001df ), + .I2(\blk00000003/sig000001a1 ), + .I3(NlwRenamedSig_OI_dout_1[10]), + .O(\blk00000003/sig0000050d ) + ); + LUT4 #( + .INIT ( 16'h5140 )) + \blk00000003/blk00000453 ( + .I0(\blk00000003/sig000001cd ), + .I1(\blk00000003/sig000001df ), + .I2(\blk00000003/sig000001a3 ), + .I3(NlwRenamedSig_OI_dout_1[8]), + .O(\blk00000003/sig0000050b ) + ); + LUT4 #( + .INIT ( 16'h5140 )) + \blk00000003/blk00000452 ( + .I0(\blk00000003/sig000001cd ), + .I1(\blk00000003/sig000001df ), + .I2(\blk00000003/sig000001a5 ), + .I3(NlwRenamedSig_OI_dout_1[6]), + .O(\blk00000003/sig00000509 ) + ); + LUT4 #( + .INIT ( 16'h5140 )) + \blk00000003/blk00000451 ( + .I0(\blk00000003/sig000001cd ), + .I1(\blk00000003/sig000001df ), + .I2(\blk00000003/sig000001a4 ), + .I3(NlwRenamedSig_OI_dout_1[7]), + .O(\blk00000003/sig0000050a ) + ); + LUT4 #( + .INIT ( 16'h5140 )) + \blk00000003/blk00000450 ( + .I0(\blk00000003/sig000001cd ), + .I1(\blk00000003/sig000001df ), + .I2(\blk00000003/sig000001a6 ), + .I3(NlwRenamedSig_OI_dout_1[5]), + .O(\blk00000003/sig00000508 ) + ); + LUT4 #( + .INIT ( 16'h5140 )) + \blk00000003/blk0000044f ( + .I0(\blk00000003/sig000001cd ), + .I1(\blk00000003/sig000001df ), + .I2(\blk00000003/sig000001a8 ), + .I3(NlwRenamedSig_OI_dout_1[3]), + .O(\blk00000003/sig00000506 ) + ); + LUT4 #( + .INIT ( 16'h5140 )) + \blk00000003/blk0000044e ( + .I0(\blk00000003/sig000001cd ), + .I1(\blk00000003/sig000001df ), + .I2(\blk00000003/sig000001a7 ), + .I3(NlwRenamedSig_OI_dout_1[4]), + .O(\blk00000003/sig00000507 ) + ); + LUT4 #( + .INIT ( 16'h5140 )) + \blk00000003/blk0000044d ( + .I0(\blk00000003/sig000001cd ), + .I1(\blk00000003/sig000001df ), + .I2(\blk00000003/sig000001a9 ), + .I3(NlwRenamedSig_OI_dout_1[2]), + .O(\blk00000003/sig00000505 ) + ); + LUT4 #( + .INIT ( 16'h5140 )) + \blk00000003/blk0000044c ( + .I0(\blk00000003/sig000001cd ), + .I1(\blk00000003/sig000001df ), + .I2(\blk00000003/sig000001ab ), + .I3(NlwRenamedSig_OI_dout_1[0]), + .O(\blk00000003/sig00000503 ) + ); + LUT4 #( + .INIT ( 16'h5140 )) + \blk00000003/blk0000044b ( + .I0(\blk00000003/sig000001cd ), + .I1(\blk00000003/sig000001df ), + .I2(\blk00000003/sig000001aa ), + .I3(NlwRenamedSig_OI_dout_1[1]), + .O(\blk00000003/sig00000504 ) + ); + LUT2 #( + .INIT ( 4'h6 )) + \blk00000003/blk0000044a ( + .I0(\blk00000003/sig00000501 ), + .I1(\blk00000003/sig000004fd ), + .O(\blk00000003/sig000004ef ) + ); + LUT2 #( + .INIT ( 4'h8 )) + \blk00000003/blk00000449 ( + .I0(ce), + .I1(\blk00000003/sig000001e1 ), + .O(\blk00000003/sig00000582 ) + ); + LUT2 #( + .INIT ( 4'h8 )) + \blk00000003/blk00000448 ( + .I0(ce), + .I1(\blk00000003/sig0000042f ), + .O(\blk00000003/sig000004ee ) + ); + LUT2 #( + .INIT ( 4'h8 )) + \blk00000003/blk00000447 ( + .I0(ce), + .I1(\blk00000003/sig00000581 ), + .O(\blk00000003/sig000004ed ) + ); + LUT2 #( + .INIT ( 4'h6 )) + \blk00000003/blk00000446 ( + .I0(\blk00000003/sig000002cf ), + .I1(\blk00000003/sig000002de ), + .O(\blk00000003/sig000002ca ) + ); + LUT2 #( + .INIT ( 4'h6 )) + \blk00000003/blk00000445 ( + .I0(\blk00000003/sig000002de ), + .I1(\blk00000003/sig000002d1 ), + .O(\blk00000003/sig000002c7 ) + ); + LUT2 #( + .INIT ( 4'h6 )) + \blk00000003/blk00000444 ( + .I0(\blk00000003/sig000002de ), + .I1(\blk00000003/sig000002d0 ), + .O(\blk00000003/sig000002cd ) + ); + LUT2 #( + .INIT ( 4'h7 )) + \blk00000003/blk00000443 ( + .I0(\blk00000003/sig000002de ), + .I1(\blk00000003/sig00000580 ), + .O(\blk00000003/sig000002c3 ) + ); + LUT3 #( + .INIT ( 8'hEA )) + \blk00000003/blk00000442 ( + .I0(\blk00000003/sig000002c4 ), + .I1(\blk00000003/sig000002de ), + .I2(\blk00000003/sig00000580 ), + .O(\blk00000003/sig000002be ) + ); + LUT3 #( + .INIT ( 8'hF8 )) + \blk00000003/blk00000441 ( + .I0(\blk00000003/sig00000580 ), + .I1(\blk00000003/sig000002de ), + .I2(\blk00000003/sig000002c5 ), + .O(\blk00000003/sig000002c1 ) + ); + LUT3 #( + .INIT ( 8'hBC )) + \blk00000003/blk00000440 ( + .I0(\blk00000003/sig00000580 ), + .I1(\blk00000003/sig000002de ), + .I2(\blk00000003/sig000002c6 ), + .O(\blk00000003/sig000002bb ) + ); + LUT2 #( + .INIT ( 4'hE )) + \blk00000003/blk0000043f ( + .I0(sclr), + .I1(\blk00000003/sig0000057f ), + .O(\blk00000003/sig000002b8 ) + ); + LUT2 #( + .INIT ( 4'h6 )) + \blk00000003/blk0000043e ( + .I0(\blk00000003/sig000002b6 ), + .I1(\blk00000003/sig000001d8 ), + .O(\blk00000003/sig000002b4 ) + ); + LUT3 #( + .INIT ( 8'h7F )) + \blk00000003/blk0000043d ( + .I0(nd), + .I1(\blk00000003/sig000002a9 ), + .I2(NlwRenamedSig_OI_rfd), + .O(\blk00000003/sig000002b0 ) + ); + LUT4 #( + .INIT ( 16'hEAAA )) + \blk00000003/blk0000043c ( + .I0(\blk00000003/sig000001e8 ), + .I1(nd), + .I2(NlwRenamedSig_OI_rfd), + .I3(\blk00000003/sig000002a9 ), + .O(\blk00000003/sig000002ae ) + ); + LUT4 #( + .INIT ( 16'hDFA0 )) + \blk00000003/blk0000043b ( + .I0(nd), + .I1(\blk00000003/sig000002a9 ), + .I2(NlwRenamedSig_OI_rfd), + .I3(\blk00000003/sig000001e9 ), + .O(\blk00000003/sig000002ab ) + ); + LUT2 #( + .INIT ( 4'h8 )) + \blk00000003/blk0000043a ( + .I0(nd), + .I1(NlwRenamedSig_OI_rfd), + .O(\blk00000003/sig000002a4 ) + ); + LUT3 #( + .INIT ( 8'h09 )) + \blk00000003/blk00000439 ( + .I0(\blk00000003/sig0000057e ), + .I1(\blk00000003/sig000001e8 ), + .I2(\blk00000003/sig000001e9 ), + .O(\blk00000003/sig000002a6 ) + ); + LUT2 #( + .INIT ( 4'h6 )) + \blk00000003/blk00000438 ( + .I0(\blk00000003/sig000002a0 ), + .I1(\blk00000003/sig000001c7 ), + .O(\blk00000003/sig0000029a ) + ); + LUT2 #( + .INIT ( 4'h7 )) + \blk00000003/blk00000437 ( + .I0(\blk00000003/sig0000023d ), + .I1(\blk00000003/sig00000244 ), + .O(\blk00000003/sig00000297 ) + ); + LUT2 #( + .INIT ( 4'h7 )) + \blk00000003/blk00000436 ( + .I0(\blk00000003/sig00000244 ), + .I1(\blk00000003/sig0000023c ), + .O(\blk00000003/sig00000294 ) + ); + LUT2 #( + .INIT ( 4'h7 )) + \blk00000003/blk00000435 ( + .I0(\blk00000003/sig00000244 ), + .I1(\blk00000003/sig00000240 ), + .O(\blk00000003/sig00000292 ) + ); + LUT3 #( + .INIT ( 8'h7F )) + \blk00000003/blk00000434 ( + .I0(\blk00000003/sig00000242 ), + .I1(\blk00000003/sig0000024a ), + .I2(\blk00000003/sig00000244 ), + .O(\blk00000003/sig0000028d ) + ); + LUT3 #( + .INIT ( 8'h7F )) + \blk00000003/blk00000433 ( + .I0(\blk00000003/sig00000242 ), + .I1(\blk00000003/sig00000240 ), + .I2(\blk00000003/sig00000244 ), + .O(\blk00000003/sig0000028f ) + ); + LUT2 #( + .INIT ( 4'h7 )) + \blk00000003/blk00000432 ( + .I0(\blk00000003/sig0000023d ), + .I1(\blk00000003/sig00000240 ), + .O(\blk00000003/sig00000286 ) + ); + LUT2 #( + .INIT ( 4'h7 )) + \blk00000003/blk00000431 ( + .I0(\blk00000003/sig0000023c ), + .I1(\blk00000003/sig00000240 ), + .O(\blk00000003/sig00000284 ) + ); + LUT3 #( + .INIT ( 8'hDF )) + \blk00000003/blk00000430 ( + .I0(\blk00000003/sig0000023a ), + .I1(\blk00000003/sig00000244 ), + .I2(\blk00000003/sig00000240 ), + .O(\blk00000003/sig0000027f ) + ); + LUT2 #( + .INIT ( 4'h7 )) + \blk00000003/blk0000042f ( + .I0(\blk00000003/sig0000023f ), + .I1(\blk00000003/sig00000240 ), + .O(\blk00000003/sig0000027b ) + ); + LUT3 #( + .INIT ( 8'h7F )) + \blk00000003/blk0000042e ( + .I0(\blk00000003/sig0000023e ), + .I1(\blk00000003/sig00000240 ), + .I2(\blk00000003/sig0000024a ), + .O(\blk00000003/sig0000027d ) + ); + LUT2 #( + .INIT ( 4'hE )) + \blk00000003/blk0000042d ( + .I0(\blk00000003/sig0000024d ), + .I1(\blk00000003/sig0000057d ), + .O(\blk00000003/sig00000276 ) + ); + LUT3 #( + .INIT ( 8'h7F )) + \blk00000003/blk0000042c ( + .I0(coef_we), + .I1(\blk00000003/sig00000224 ), + .I2(\blk00000003/sig0000022c ), + .O(\blk00000003/sig00000268 ) + ); + LUT4 #( + .INIT ( 16'hDAAA )) + \blk00000003/blk0000042b ( + .I0(\blk00000003/sig00000267 ), + .I1(\blk00000003/sig00000224 ), + .I2(\blk00000003/sig0000022c ), + .I3(coef_we), + .O(\blk00000003/sig00000265 ) + ); + LUT2 #( + .INIT ( 4'h6 )) + \blk00000003/blk0000042a ( + .I0(\blk00000003/sig00000263 ), + .I1(\blk00000003/sig000001c4 ), + .O(\blk00000003/sig00000261 ) + ); + LUT2 #( + .INIT ( 4'h6 )) + \blk00000003/blk00000429 ( + .I0(\blk00000003/sig00000258 ), + .I1(coef_we), + .O(\blk00000003/sig00000256 ) + ); + LUT2 #( + .INIT ( 4'h2 )) + \blk00000003/blk00000428 ( + .I0(coef_ld), + .I1(\blk00000003/sig0000024d ), + .O(\blk00000003/sig00000243 ) + ); + LUT2 #( + .INIT ( 4'h8 )) + \blk00000003/blk00000427 ( + .I0(coef_we), + .I1(\blk00000003/sig0000022c ), + .O(\blk00000003/sig00000225 ) + ); + LUT3 #( + .INIT ( 8'h08 )) + \blk00000003/blk00000426 ( + .I0(\blk00000003/sig00000238 ), + .I1(coef_we), + .I2(coef_ld), + .O(\blk00000003/sig0000024b ) + ); + LUT3 #( + .INIT ( 8'h08 )) + \blk00000003/blk00000425 ( + .I0(\blk00000003/sig00000254 ), + .I1(\blk00000003/sig00000255 ), + .I2(\blk00000003/sig00000258 ), + .O(\blk00000003/sig0000022e ) + ); + LUT3 #( + .INIT ( 8'hDF )) + \blk00000003/blk00000424 ( + .I0(coef_ld), + .I1(\blk00000003/sig0000024d ), + .I2(\blk00000003/sig00000236 ), + .O(\blk00000003/sig00000222 ) + ); + LUT3 #( + .INIT ( 8'hDF )) + \blk00000003/blk00000423 ( + .I0(coef_we), + .I1(\blk00000003/sig00000238 ), + .I2(\blk00000003/sig00000236 ), + .O(\blk00000003/sig0000021f ) + ); + LUT5 #( + .INIT ( 32'hFFFF2AAA )) + \blk00000003/blk00000422 ( + .I0(\blk00000003/sig00000238 ), + .I1(coef_we), + .I2(\blk00000003/sig0000022c ), + .I3(\blk00000003/sig00000224 ), + .I4(coef_ld), + .O(\blk00000003/sig00000237 ) + ); + LUT4 #( + .INIT ( 16'hFF8A )) + \blk00000003/blk00000421 ( + .I0(\blk00000003/sig00000236 ), + .I1(\blk00000003/sig00000238 ), + .I2(coef_we), + .I3(coef_ld), + .O(\blk00000003/sig00000235 ) + ); + LUT3 #( + .INIT ( 8'h80 )) + \blk00000003/blk00000420 ( + .I0(nd), + .I1(\blk00000003/sig000002a2 ), + .I2(NlwRenamedSig_OI_rfd), + .O(\blk00000003/sig000001e7 ) + ); + LUT2 #( + .INIT ( 4'h8 )) + \blk00000003/blk0000041f ( + .I0(\blk00000003/sig000000be ), + .I1(\blk00000003/sig000001df ), + .O(\blk00000003/sig000001e5 ) + ); + LUT3 #( + .INIT ( 8'h10 )) + \blk00000003/blk0000041e ( + .I0(\blk00000003/sig000000be ), + .I1(\blk00000003/sig000004fd ), + .I2(\blk00000003/sig0000057c ), + .O(\blk00000003/sig000000bf ) + ); + LUT3 #( + .INIT ( 8'hEA )) + \blk00000003/blk0000041d ( + .I0(sclr), + .I1(ce), + .I2(\blk00000003/sig000004fd ), + .O(\blk00000003/sig000001e0 ) + ); + LUT2 #( + .INIT ( 4'hD )) + \blk00000003/blk0000041c ( + .I0(NlwRenamedSig_OI_rfd), + .I1(nd), + .O(\blk00000003/sig000001cb ) + ); + LUT2 #( + .INIT ( 4'h2 )) + \blk00000003/blk0000041b ( + .I0(\blk00000003/sig0000029f ), + .I1(\blk00000003/sig000002a0 ), + .O(\blk00000003/sig000001c8 ) + ); + LUT3 #( + .INIT ( 8'h08 )) + \blk00000003/blk0000041a ( + .I0(\blk00000003/sig0000025f ), + .I1(\blk00000003/sig00000260 ), + .I2(\blk00000003/sig00000263 ), + .O(\blk00000003/sig000001c5 ) + ); + LUT5 #( + .INIT ( 32'h00008000 )) + \blk00000003/blk00000419 ( + .I0(\blk00000003/sig00000573 ), + .I1(\blk00000003/sig00000574 ), + .I2(\blk00000003/sig00000575 ), + .I3(\blk00000003/sig00000576 ), + .I4(\blk00000003/sig00000577 ), + .O(\blk00000003/sig000000c1 ) + ); + LUT3 #( + .INIT ( 8'hF4 )) + \blk00000003/blk00000418 ( + .I0(\blk00000003/sig000001d8 ), + .I1(\blk00000003/sig000001c4 ), + .I2(\blk00000003/sig000001e6 ), + .O(\blk00000003/sig000001d7 ) + ); + LUT2 #( + .INIT ( 4'h6 )) + \blk00000003/blk00000417 ( + .I0(\blk00000003/sig000002b7 ), + .I1(\blk00000003/sig000001e4 ), + .O(\blk00000003/sig000001dd ) + ); + LUT3 #( + .INIT ( 8'hD8 )) + \blk00000003/blk00000416 ( + .I0(ce), + .I1(\blk00000003/sig00000579 ), + .I2(\blk00000003/sig000000b4 ), + .O(\blk00000003/sig000000b3 ) + ); + LUT3 #( + .INIT ( 8'h72 )) + \blk00000003/blk00000415 ( + .I0(ce), + .I1(\blk00000003/sig00000579 ), + .I2(\blk00000003/sig000000b2 ), + .O(\blk00000003/sig000000b1 ) + ); + LUT4 #( + .INIT ( 16'h8F88 )) + \blk00000003/blk00000414 ( + .I0(NlwRenamedSig_OI_rfd), + .I1(nd), + .I2(\blk00000003/sig000001da ), + .I3(\blk00000003/sig000001c7 ), + .O(\blk00000003/sig000001d9 ) + ); + LUT5 #( + .INIT ( 32'hCEEE8AAA )) + \blk00000003/blk00000413 ( + .I0(\blk00000003/sig000001c4 ), + .I1(\blk00000003/sig000001e6 ), + .I2(\blk00000003/sig000001d6 ), + .I3(\blk00000003/sig000001d8 ), + .I4(\blk00000003/sig000001d4 ), + .O(\blk00000003/sig000001d5 ) + ); + LUT4 #( + .INIT ( 16'h8808 )) + \blk00000003/blk00000412 ( + .I0(\blk00000003/sig000001d6 ), + .I1(\blk00000003/sig0000057b ), + .I2(\blk00000003/sig000001d8 ), + .I3(\blk00000003/sig000001e6 ), + .O(\blk00000003/sig000001d1 ) + ); + LUT4 #( + .INIT ( 16'h5540 )) + \blk00000003/blk00000411 ( + .I0(\blk00000003/sig000001e6 ), + .I1(\blk00000003/sig000001d6 ), + .I2(\blk00000003/sig000001d8 ), + .I3(\blk00000003/sig000001d4 ), + .O(\blk00000003/sig000001d3 ) + ); + LUT3 #( + .INIT ( 8'h9A )) + \blk00000003/blk00000410 ( + .I0(\blk00000003/sig000002b6 ), + .I1(\blk00000003/sig000002b7 ), + .I2(\blk00000003/sig000001e4 ), + .O(\blk00000003/sig000001db ) + ); + LUT4 #( + .INIT ( 16'hFDA8 )) + \blk00000003/blk0000040f ( + .I0(ce), + .I1(\blk00000003/sig00000579 ), + .I2(\blk00000003/sig0000057a ), + .I3(\blk00000003/sig000000b0 ), + .O(\blk00000003/sig000000af ) + ); + MUXCY \blk00000003/blk0000040e ( + .CI(\blk00000003/sig00000049 ), + .DI(\blk00000003/sig000000ae ), + .S(\blk00000003/sig00000578 ), + .O(\blk00000003/sig00000570 ) + ); + MUXCY_L \blk00000003/blk0000040d ( + .CI(\blk00000003/sig00000570 ), + .DI(\blk00000003/sig00000577 ), + .S(\blk00000003/sig00000571 ), + .LO(\blk00000003/sig0000056d ) + ); + MUXCY_L \blk00000003/blk0000040c ( + .CI(\blk00000003/sig0000056d ), + .DI(\blk00000003/sig00000576 ), + .S(\blk00000003/sig0000056e ), + .LO(\blk00000003/sig0000056a ) + ); + MUXCY_L \blk00000003/blk0000040b ( + .CI(\blk00000003/sig0000056a ), + .DI(\blk00000003/sig00000575 ), + .S(\blk00000003/sig0000056b ), + .LO(\blk00000003/sig00000567 ) + ); + MUXCY_L \blk00000003/blk0000040a ( + .CI(\blk00000003/sig00000567 ), + .DI(\blk00000003/sig00000574 ), + .S(\blk00000003/sig00000568 ), + .LO(\blk00000003/sig00000564 ) + ); + MUXCY_D \blk00000003/blk00000409 ( + .CI(\blk00000003/sig00000564 ), + .DI(\blk00000003/sig00000573 ), + .S(\blk00000003/sig00000565 ), + .O(\NLW_blk00000003/blk00000409_O_UNCONNECTED ), + .LO(\NLW_blk00000003/blk00000409_LO_UNCONNECTED ) + ); + XORCY \blk00000003/blk00000408 ( + .CI(\blk00000003/sig00000570 ), + .LI(\blk00000003/sig00000571 ), + .O(\blk00000003/sig00000572 ) + ); + XORCY \blk00000003/blk00000407 ( + .CI(\blk00000003/sig0000056d ), + .LI(\blk00000003/sig0000056e ), + .O(\blk00000003/sig0000056f ) + ); + XORCY \blk00000003/blk00000406 ( + .CI(\blk00000003/sig0000056a ), + .LI(\blk00000003/sig0000056b ), + .O(\blk00000003/sig0000056c ) + ); + XORCY \blk00000003/blk00000405 ( + .CI(\blk00000003/sig00000567 ), + .LI(\blk00000003/sig00000568 ), + .O(\blk00000003/sig00000569 ) + ); + XORCY \blk00000003/blk00000404 ( + .CI(\blk00000003/sig00000564 ), + .LI(\blk00000003/sig00000565 ), + .O(\blk00000003/sig00000566 ) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000403 ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig00000563 ), + .R(sclr), + .Q(\blk00000003/sig0000004a ) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000402 ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig00000562 ), + .R(sclr), + .Q(NlwRenamedSig_OI_dout_2[47]) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000401 ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig00000561 ), + .R(sclr), + .Q(NlwRenamedSig_OI_dout_2[46]) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000400 ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig00000560 ), + .R(sclr), + .Q(NlwRenamedSig_OI_dout_2[45]) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk000003ff ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig0000055f ), + .R(sclr), + .Q(NlwRenamedSig_OI_dout_2[44]) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk000003fe ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig0000055e ), + .R(sclr), + .Q(NlwRenamedSig_OI_dout_2[43]) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk000003fd ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig0000055d ), + .R(sclr), + .Q(NlwRenamedSig_OI_dout_2[42]) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk000003fc ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig0000055c ), + .R(sclr), + .Q(NlwRenamedSig_OI_dout_2[41]) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk000003fb ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig0000055b ), + .R(sclr), + .Q(NlwRenamedSig_OI_dout_2[40]) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk000003fa ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig0000055a ), + .R(sclr), + .Q(NlwRenamedSig_OI_dout_2[39]) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk000003f9 ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig00000559 ), + .R(sclr), + .Q(NlwRenamedSig_OI_dout_2[38]) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk000003f8 ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig00000558 ), + .R(sclr), + .Q(NlwRenamedSig_OI_dout_2[37]) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk000003f7 ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig00000557 ), + .R(sclr), + .Q(NlwRenamedSig_OI_dout_2[36]) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk000003f6 ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig00000556 ), + .R(sclr), + .Q(NlwRenamedSig_OI_dout_2[35]) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk000003f5 ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig00000555 ), + .R(sclr), + .Q(NlwRenamedSig_OI_dout_2[34]) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk000003f4 ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig00000554 ), + .R(sclr), + .Q(NlwRenamedSig_OI_dout_2[33]) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk000003f3 ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig00000553 ), + .R(sclr), + .Q(NlwRenamedSig_OI_dout_2[32]) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk000003f2 ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig00000552 ), + .R(sclr), + .Q(NlwRenamedSig_OI_dout_2[31]) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk000003f1 ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig00000551 ), + .R(sclr), + .Q(NlwRenamedSig_OI_dout_2[30]) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk000003f0 ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig00000550 ), + .R(sclr), + .Q(NlwRenamedSig_OI_dout_2[29]) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk000003ef ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig0000054f ), + .R(sclr), + .Q(NlwRenamedSig_OI_dout_2[28]) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk000003ee ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig0000054e ), + .R(sclr), + .Q(NlwRenamedSig_OI_dout_2[27]) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk000003ed ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig0000054d ), + .R(sclr), + .Q(NlwRenamedSig_OI_dout_2[26]) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk000003ec ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig0000054c ), + .R(sclr), + .Q(NlwRenamedSig_OI_dout_2[25]) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk000003eb ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig0000054b ), + .R(sclr), + .Q(NlwRenamedSig_OI_dout_2[24]) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk000003ea ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig0000054a ), + .R(sclr), + .Q(NlwRenamedSig_OI_dout_2[23]) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk000003e9 ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig00000549 ), + .R(sclr), + .Q(NlwRenamedSig_OI_dout_2[22]) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk000003e8 ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig00000548 ), + .R(sclr), + .Q(NlwRenamedSig_OI_dout_2[21]) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk000003e7 ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig00000547 ), + .R(sclr), + .Q(NlwRenamedSig_OI_dout_2[20]) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk000003e6 ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig00000546 ), + .R(sclr), + .Q(NlwRenamedSig_OI_dout_2[19]) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk000003e5 ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig00000545 ), + .R(sclr), + .Q(NlwRenamedSig_OI_dout_2[18]) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk000003e4 ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig00000544 ), + .R(sclr), + .Q(NlwRenamedSig_OI_dout_2[17]) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk000003e3 ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig00000543 ), + .R(sclr), + .Q(NlwRenamedSig_OI_dout_2[16]) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk000003e2 ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig00000542 ), + .R(sclr), + .Q(NlwRenamedSig_OI_dout_2[15]) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk000003e1 ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig00000541 ), + .R(sclr), + .Q(NlwRenamedSig_OI_dout_2[14]) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk000003e0 ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig00000540 ), + .R(sclr), + .Q(NlwRenamedSig_OI_dout_2[13]) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk000003df ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig0000053f ), + .R(sclr), + .Q(NlwRenamedSig_OI_dout_2[12]) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk000003de ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig0000053e ), + .R(sclr), + .Q(NlwRenamedSig_OI_dout_2[11]) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk000003dd ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig0000053d ), + .R(sclr), + .Q(NlwRenamedSig_OI_dout_2[10]) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk000003dc ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig0000053c ), + .R(sclr), + .Q(NlwRenamedSig_OI_dout_2[9]) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk000003db ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig0000053b ), + .R(sclr), + .Q(NlwRenamedSig_OI_dout_2[8]) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk000003da ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig0000053a ), + .R(sclr), + .Q(NlwRenamedSig_OI_dout_2[7]) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk000003d9 ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig00000539 ), + .R(sclr), + .Q(NlwRenamedSig_OI_dout_2[6]) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk000003d8 ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig00000538 ), + .R(sclr), + .Q(NlwRenamedSig_OI_dout_2[5]) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk000003d7 ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig00000537 ), + .R(sclr), + .Q(NlwRenamedSig_OI_dout_2[4]) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk000003d6 ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig00000536 ), + .R(sclr), + .Q(NlwRenamedSig_OI_dout_2[3]) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk000003d5 ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig00000535 ), + .R(sclr), + .Q(NlwRenamedSig_OI_dout_2[2]) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk000003d4 ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig00000534 ), + .R(sclr), + .Q(NlwRenamedSig_OI_dout_2[1]) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk000003d3 ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig00000533 ), + .R(sclr), + .Q(NlwRenamedSig_OI_dout_2[0]) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk000003d2 ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig00000532 ), + .R(sclr), + .Q(NlwRenamedSig_OI_dout_1[47]) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk000003d1 ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig00000531 ), + .R(sclr), + .Q(NlwRenamedSig_OI_dout_1[46]) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk000003d0 ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig00000530 ), + .R(sclr), + .Q(NlwRenamedSig_OI_dout_1[45]) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk000003cf ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig0000052f ), + .R(sclr), + .Q(NlwRenamedSig_OI_dout_1[44]) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk000003ce ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig0000052e ), + .R(sclr), + .Q(NlwRenamedSig_OI_dout_1[43]) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk000003cd ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig0000052d ), + .R(sclr), + .Q(NlwRenamedSig_OI_dout_1[42]) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk000003cc ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig0000052c ), + .R(sclr), + .Q(NlwRenamedSig_OI_dout_1[41]) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk000003cb ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig0000052b ), + .R(sclr), + .Q(NlwRenamedSig_OI_dout_1[40]) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk000003ca ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig0000052a ), + .R(sclr), + .Q(NlwRenamedSig_OI_dout_1[39]) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk000003c9 ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig00000529 ), + .R(sclr), + .Q(NlwRenamedSig_OI_dout_1[38]) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk000003c8 ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig00000528 ), + .R(sclr), + .Q(NlwRenamedSig_OI_dout_1[37]) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk000003c7 ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig00000527 ), + .R(sclr), + .Q(NlwRenamedSig_OI_dout_1[36]) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk000003c6 ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig00000526 ), + .R(sclr), + .Q(NlwRenamedSig_OI_dout_1[35]) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk000003c5 ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig00000525 ), + .R(sclr), + .Q(NlwRenamedSig_OI_dout_1[34]) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk000003c4 ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig00000524 ), + .R(sclr), + .Q(NlwRenamedSig_OI_dout_1[33]) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk000003c3 ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig00000523 ), + .R(sclr), + .Q(NlwRenamedSig_OI_dout_1[32]) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk000003c2 ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig00000522 ), + .R(sclr), + .Q(NlwRenamedSig_OI_dout_1[31]) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk000003c1 ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig00000521 ), + .R(sclr), + .Q(NlwRenamedSig_OI_dout_1[30]) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk000003c0 ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig00000520 ), + .R(sclr), + .Q(NlwRenamedSig_OI_dout_1[29]) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk000003bf ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig0000051f ), + .R(sclr), + .Q(NlwRenamedSig_OI_dout_1[28]) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk000003be ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig0000051e ), + .R(sclr), + .Q(NlwRenamedSig_OI_dout_1[27]) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk000003bd ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig0000051d ), + .R(sclr), + .Q(NlwRenamedSig_OI_dout_1[26]) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk000003bc ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig0000051c ), + .R(sclr), + .Q(NlwRenamedSig_OI_dout_1[25]) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk000003bb ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig0000051b ), + .R(sclr), + .Q(NlwRenamedSig_OI_dout_1[24]) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk000003ba ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig0000051a ), + .R(sclr), + .Q(NlwRenamedSig_OI_dout_1[23]) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk000003b9 ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig00000519 ), + .R(sclr), + .Q(NlwRenamedSig_OI_dout_1[22]) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk000003b8 ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig00000518 ), + .R(sclr), + .Q(NlwRenamedSig_OI_dout_1[21]) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk000003b7 ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig00000517 ), + .R(sclr), + .Q(NlwRenamedSig_OI_dout_1[20]) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk000003b6 ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig00000516 ), + .R(sclr), + .Q(NlwRenamedSig_OI_dout_1[19]) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk000003b5 ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig00000515 ), + .R(sclr), + .Q(NlwRenamedSig_OI_dout_1[18]) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk000003b4 ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig00000514 ), + .R(sclr), + .Q(NlwRenamedSig_OI_dout_1[17]) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk000003b3 ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig00000513 ), + .R(sclr), + .Q(NlwRenamedSig_OI_dout_1[16]) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk000003b2 ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig00000512 ), + .R(sclr), + .Q(NlwRenamedSig_OI_dout_1[15]) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk000003b1 ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig00000511 ), + .R(sclr), + .Q(NlwRenamedSig_OI_dout_1[14]) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk000003b0 ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig00000510 ), + .R(sclr), + .Q(NlwRenamedSig_OI_dout_1[13]) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk000003af ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig0000050f ), + .R(sclr), + .Q(NlwRenamedSig_OI_dout_1[12]) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk000003ae ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig0000050e ), + .R(sclr), + .Q(NlwRenamedSig_OI_dout_1[11]) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk000003ad ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig0000050d ), + .R(sclr), + .Q(NlwRenamedSig_OI_dout_1[10]) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk000003ac ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig0000050c ), + .R(sclr), + .Q(NlwRenamedSig_OI_dout_1[9]) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk000003ab ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig0000050b ), + .R(sclr), + .Q(NlwRenamedSig_OI_dout_1[8]) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk000003aa ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig0000050a ), + .R(sclr), + .Q(NlwRenamedSig_OI_dout_1[7]) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk000003a9 ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig00000509 ), + .R(sclr), + .Q(NlwRenamedSig_OI_dout_1[6]) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk000003a8 ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig00000508 ), + .R(sclr), + .Q(NlwRenamedSig_OI_dout_1[5]) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk000003a7 ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig00000507 ), + .R(sclr), + .Q(NlwRenamedSig_OI_dout_1[4]) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk000003a6 ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig00000506 ), + .R(sclr), + .Q(NlwRenamedSig_OI_dout_1[3]) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk000003a5 ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig00000505 ), + .R(sclr), + .Q(NlwRenamedSig_OI_dout_1[2]) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk000003a4 ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig00000504 ), + .R(sclr), + .Q(NlwRenamedSig_OI_dout_1[1]) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk000003a3 ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig00000503 ), + .R(sclr), + .Q(NlwRenamedSig_OI_dout_1[0]) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000003a2 ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig00000502 ), + .Q(\blk00000003/sig000001df ) + ); + MUXCY_L \blk00000003/blk000003a1 ( + .CI(\blk00000003/sig00000049 ), + .DI(\blk00000003/sig00000501 ), + .S(\blk00000003/sig000004ef ), + .LO(\blk00000003/sig000004fa ) + ); + MUXCY_L \blk00000003/blk000003a0 ( + .CI(\blk00000003/sig000004fa ), + .DI(\blk00000003/sig00000500 ), + .S(\blk00000003/sig000004fb ), + .LO(\blk00000003/sig000004f7 ) + ); + MUXCY_L \blk00000003/blk0000039f ( + .CI(\blk00000003/sig000004f7 ), + .DI(\blk00000003/sig000004ff ), + .S(\blk00000003/sig000004f8 ), + .LO(\blk00000003/sig000004f4 ) + ); + MUXCY_L \blk00000003/blk0000039e ( + .CI(\blk00000003/sig000004f4 ), + .DI(\blk00000003/sig000004fe ), + .S(\blk00000003/sig000004f5 ), + .LO(\blk00000003/sig000004f1 ) + ); + MUXCY_D \blk00000003/blk0000039d ( + .CI(\blk00000003/sig000004f1 ), + .DI(\blk00000003/sig000004fd ), + .S(\blk00000003/sig000004f2 ), + .O(\NLW_blk00000003/blk0000039d_O_UNCONNECTED ), + .LO(\NLW_blk00000003/blk0000039d_LO_UNCONNECTED ) + ); + XORCY \blk00000003/blk0000039c ( + .CI(\blk00000003/sig000004fa ), + .LI(\blk00000003/sig000004fb ), + .O(\blk00000003/sig000004fc ) + ); + XORCY \blk00000003/blk0000039b ( + .CI(\blk00000003/sig000004f7 ), + .LI(\blk00000003/sig000004f8 ), + .O(\blk00000003/sig000004f9 ) + ); + XORCY \blk00000003/blk0000039a ( + .CI(\blk00000003/sig000004f4 ), + .LI(\blk00000003/sig000004f5 ), + .O(\blk00000003/sig000004f6 ) + ); + XORCY \blk00000003/blk00000399 ( + .CI(\blk00000003/sig000004f1 ), + .LI(\blk00000003/sig000004f2 ), + .O(\blk00000003/sig000004f3 ) + ); + XORCY \blk00000003/blk00000398 ( + .CI(\blk00000003/sig00000049 ), + .LI(\blk00000003/sig000004ef ), + .O(\blk00000003/sig000004f0 ) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000370 ( + .C(clk), + .CE(\blk00000003/sig000004ee ), + .D(\blk00000003/sig000003dd ), + .R(sclr), + .Q(\blk00000003/sig00000450 ) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk0000036f ( + .C(clk), + .CE(\blk00000003/sig000004ee ), + .D(\blk00000003/sig000003dc ), + .R(sclr), + .Q(\blk00000003/sig0000044f ) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk0000036e ( + .C(clk), + .CE(\blk00000003/sig000004ee ), + .D(\blk00000003/sig000003db ), + .R(sclr), + .Q(\blk00000003/sig0000044e ) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk0000036d ( + .C(clk), + .CE(\blk00000003/sig000004ee ), + .D(\blk00000003/sig000003da ), + .R(sclr), + .Q(\blk00000003/sig0000044d ) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk0000036c ( + .C(clk), + .CE(\blk00000003/sig000004ee ), + .D(\blk00000003/sig000003d9 ), + .R(sclr), + .Q(\blk00000003/sig0000044c ) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk0000036b ( + .C(clk), + .CE(\blk00000003/sig000004ee ), + .D(\blk00000003/sig000003d8 ), + .R(sclr), + .Q(\blk00000003/sig0000044b ) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk0000036a ( + .C(clk), + .CE(\blk00000003/sig000004ee ), + .D(\blk00000003/sig000003d7 ), + .R(sclr), + .Q(\blk00000003/sig0000044a ) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000369 ( + .C(clk), + .CE(\blk00000003/sig000004ee ), + .D(\blk00000003/sig000003d6 ), + .R(sclr), + .Q(\blk00000003/sig00000449 ) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000368 ( + .C(clk), + .CE(\blk00000003/sig000004ee ), + .D(\blk00000003/sig000003d5 ), + .R(sclr), + .Q(\blk00000003/sig00000448 ) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000367 ( + .C(clk), + .CE(\blk00000003/sig000004ee ), + .D(\blk00000003/sig000003d4 ), + .R(sclr), + .Q(\blk00000003/sig00000447 ) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000366 ( + .C(clk), + .CE(\blk00000003/sig000004ee ), + .D(\blk00000003/sig000003d3 ), + .R(sclr), + .Q(\blk00000003/sig00000446 ) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000365 ( + .C(clk), + .CE(\blk00000003/sig000004ee ), + .D(\blk00000003/sig000003d2 ), + .R(sclr), + .Q(\blk00000003/sig00000445 ) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000364 ( + .C(clk), + .CE(\blk00000003/sig000004ee ), + .D(\blk00000003/sig000003d1 ), + .R(sclr), + .Q(\blk00000003/sig00000444 ) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000363 ( + .C(clk), + .CE(\blk00000003/sig000004ee ), + .D(\blk00000003/sig000003d0 ), + .R(sclr), + .Q(\blk00000003/sig00000443 ) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000362 ( + .C(clk), + .CE(\blk00000003/sig000004ee ), + .D(\blk00000003/sig000003cf ), + .R(sclr), + .Q(\blk00000003/sig00000442 ) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000361 ( + .C(clk), + .CE(\blk00000003/sig000004ee ), + .D(\blk00000003/sig000003ce ), + .R(sclr), + .Q(\blk00000003/sig00000441 ) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000360 ( + .C(clk), + .CE(\blk00000003/sig000004ee ), + .D(\blk00000003/sig000003cd ), + .R(sclr), + .Q(\blk00000003/sig00000440 ) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk0000035f ( + .C(clk), + .CE(\blk00000003/sig000004ee ), + .D(\blk00000003/sig000003cc ), + .R(sclr), + .Q(\blk00000003/sig0000043f ) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk0000035e ( + .C(clk), + .CE(\blk00000003/sig000004ee ), + .D(\blk00000003/sig000003cb ), + .R(sclr), + .Q(\blk00000003/sig0000043e ) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk0000035d ( + .C(clk), + .CE(\blk00000003/sig000004ee ), + .D(\blk00000003/sig000003ca ), + .R(sclr), + .Q(\blk00000003/sig0000043d ) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk0000035c ( + .C(clk), + .CE(\blk00000003/sig000004ee ), + .D(\blk00000003/sig000003c9 ), + .R(sclr), + .Q(\blk00000003/sig0000043c ) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk0000035b ( + .C(clk), + .CE(\blk00000003/sig000004ee ), + .D(\blk00000003/sig000003c8 ), + .R(sclr), + .Q(\blk00000003/sig0000043b ) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk0000035a ( + .C(clk), + .CE(\blk00000003/sig000004ee ), + .D(\blk00000003/sig000003c7 ), + .R(sclr), + .Q(\blk00000003/sig0000043a ) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000359 ( + .C(clk), + .CE(\blk00000003/sig000004ee ), + .D(\blk00000003/sig000003c6 ), + .R(sclr), + .Q(\blk00000003/sig00000439 ) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000358 ( + .C(clk), + .CE(\blk00000003/sig000004ee ), + .D(\blk00000003/sig0000040d ), + .R(sclr), + .Q(\blk00000003/sig00000468 ) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000357 ( + .C(clk), + .CE(\blk00000003/sig000004ee ), + .D(\blk00000003/sig0000040c ), + .R(sclr), + .Q(\blk00000003/sig00000467 ) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000356 ( + .C(clk), + .CE(\blk00000003/sig000004ee ), + .D(\blk00000003/sig0000040b ), + .R(sclr), + .Q(\blk00000003/sig00000466 ) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000355 ( + .C(clk), + .CE(\blk00000003/sig000004ee ), + .D(\blk00000003/sig0000040a ), + .R(sclr), + .Q(\blk00000003/sig00000465 ) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000354 ( + .C(clk), + .CE(\blk00000003/sig000004ee ), + .D(\blk00000003/sig00000409 ), + .R(sclr), + .Q(\blk00000003/sig00000464 ) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000353 ( + .C(clk), + .CE(\blk00000003/sig000004ee ), + .D(\blk00000003/sig00000408 ), + .R(sclr), + .Q(\blk00000003/sig00000463 ) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000352 ( + .C(clk), + .CE(\blk00000003/sig000004ee ), + .D(\blk00000003/sig00000407 ), + .R(sclr), + .Q(\blk00000003/sig00000462 ) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000351 ( + .C(clk), + .CE(\blk00000003/sig000004ee ), + .D(\blk00000003/sig00000406 ), + .R(sclr), + .Q(\blk00000003/sig00000461 ) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000350 ( + .C(clk), + .CE(\blk00000003/sig000004ee ), + .D(\blk00000003/sig00000405 ), + .R(sclr), + .Q(\blk00000003/sig00000460 ) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk0000034f ( + .C(clk), + .CE(\blk00000003/sig000004ee ), + .D(\blk00000003/sig00000404 ), + .R(sclr), + .Q(\blk00000003/sig0000045f ) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk0000034e ( + .C(clk), + .CE(\blk00000003/sig000004ee ), + .D(\blk00000003/sig00000403 ), + .R(sclr), + .Q(\blk00000003/sig0000045e ) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk0000034d ( + .C(clk), + .CE(\blk00000003/sig000004ee ), + .D(\blk00000003/sig00000402 ), + .R(sclr), + .Q(\blk00000003/sig0000045d ) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk0000034c ( + .C(clk), + .CE(\blk00000003/sig000004ee ), + .D(\blk00000003/sig00000401 ), + .R(sclr), + .Q(\blk00000003/sig0000045c ) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk0000034b ( + .C(clk), + .CE(\blk00000003/sig000004ee ), + .D(\blk00000003/sig00000400 ), + .R(sclr), + .Q(\blk00000003/sig0000045b ) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk0000034a ( + .C(clk), + .CE(\blk00000003/sig000004ee ), + .D(\blk00000003/sig000003ff ), + .R(sclr), + .Q(\blk00000003/sig0000045a ) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000349 ( + .C(clk), + .CE(\blk00000003/sig000004ee ), + .D(\blk00000003/sig000003fe ), + .R(sclr), + .Q(\blk00000003/sig00000459 ) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000348 ( + .C(clk), + .CE(\blk00000003/sig000004ee ), + .D(\blk00000003/sig000003fd ), + .R(sclr), + .Q(\blk00000003/sig00000458 ) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000347 ( + .C(clk), + .CE(\blk00000003/sig000004ee ), + .D(\blk00000003/sig000003fc ), + .R(sclr), + .Q(\blk00000003/sig00000457 ) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000346 ( + .C(clk), + .CE(\blk00000003/sig000004ee ), + .D(\blk00000003/sig000003fb ), + .R(sclr), + .Q(\blk00000003/sig00000456 ) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000345 ( + .C(clk), + .CE(\blk00000003/sig000004ee ), + .D(\blk00000003/sig000003fa ), + .R(sclr), + .Q(\blk00000003/sig00000455 ) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000344 ( + .C(clk), + .CE(\blk00000003/sig000004ee ), + .D(\blk00000003/sig000003f9 ), + .R(sclr), + .Q(\blk00000003/sig00000454 ) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000343 ( + .C(clk), + .CE(\blk00000003/sig000004ee ), + .D(\blk00000003/sig000003f8 ), + .R(sclr), + .Q(\blk00000003/sig00000453 ) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000342 ( + .C(clk), + .CE(\blk00000003/sig000004ee ), + .D(\blk00000003/sig000003f7 ), + .R(sclr), + .Q(\blk00000003/sig00000452 ) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000341 ( + .C(clk), + .CE(\blk00000003/sig000004ee ), + .D(\blk00000003/sig000003f6 ), + .R(sclr), + .Q(\blk00000003/sig00000451 ) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000340 ( + .C(clk), + .CE(\blk00000003/sig000004ed ), + .D(\blk00000003/sig000003f5 ), + .R(sclr), + .Q(\blk00000003/sig00000498 ) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk0000033f ( + .C(clk), + .CE(\blk00000003/sig000004ed ), + .D(\blk00000003/sig000003f4 ), + .R(sclr), + .Q(\blk00000003/sig00000497 ) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk0000033e ( + .C(clk), + .CE(\blk00000003/sig000004ed ), + .D(\blk00000003/sig000003f3 ), + .R(sclr), + .Q(\blk00000003/sig00000496 ) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk0000033d ( + .C(clk), + .CE(\blk00000003/sig000004ed ), + .D(\blk00000003/sig000003f2 ), + .R(sclr), + .Q(\blk00000003/sig00000495 ) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk0000033c ( + .C(clk), + .CE(\blk00000003/sig000004ed ), + .D(\blk00000003/sig000003f1 ), + .R(sclr), + .Q(\blk00000003/sig00000494 ) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk0000033b ( + .C(clk), + .CE(\blk00000003/sig000004ed ), + .D(\blk00000003/sig000003f0 ), + .R(sclr), + .Q(\blk00000003/sig00000493 ) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk0000033a ( + .C(clk), + .CE(\blk00000003/sig000004ed ), + .D(\blk00000003/sig000003ef ), + .R(sclr), + .Q(\blk00000003/sig00000492 ) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000339 ( + .C(clk), + .CE(\blk00000003/sig000004ed ), + .D(\blk00000003/sig000003ee ), + .R(sclr), + .Q(\blk00000003/sig00000491 ) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000338 ( + .C(clk), + .CE(\blk00000003/sig000004ed ), + .D(\blk00000003/sig000003ed ), + .R(sclr), + .Q(\blk00000003/sig00000490 ) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000337 ( + .C(clk), + .CE(\blk00000003/sig000004ed ), + .D(\blk00000003/sig000003ec ), + .R(sclr), + .Q(\blk00000003/sig0000048f ) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000336 ( + .C(clk), + .CE(\blk00000003/sig000004ed ), + .D(\blk00000003/sig000003eb ), + .R(sclr), + .Q(\blk00000003/sig0000048e ) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000335 ( + .C(clk), + .CE(\blk00000003/sig000004ed ), + .D(\blk00000003/sig000003ea ), + .R(sclr), + .Q(\blk00000003/sig0000048d ) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000334 ( + .C(clk), + .CE(\blk00000003/sig000004ed ), + .D(\blk00000003/sig000003e9 ), + .R(sclr), + .Q(\blk00000003/sig0000048c ) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000333 ( + .C(clk), + .CE(\blk00000003/sig000004ed ), + .D(\blk00000003/sig000003e8 ), + .R(sclr), + .Q(\blk00000003/sig0000048b ) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000332 ( + .C(clk), + .CE(\blk00000003/sig000004ed ), + .D(\blk00000003/sig000003e7 ), + .R(sclr), + .Q(\blk00000003/sig0000048a ) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000331 ( + .C(clk), + .CE(\blk00000003/sig000004ed ), + .D(\blk00000003/sig000003e6 ), + .R(sclr), + .Q(\blk00000003/sig00000489 ) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000330 ( + .C(clk), + .CE(\blk00000003/sig000004ed ), + .D(\blk00000003/sig000003e5 ), + .R(sclr), + .Q(\blk00000003/sig00000488 ) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk0000032f ( + .C(clk), + .CE(\blk00000003/sig000004ed ), + .D(\blk00000003/sig000003e4 ), + .R(sclr), + .Q(\blk00000003/sig00000487 ) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk0000032e ( + .C(clk), + .CE(\blk00000003/sig000004ed ), + .D(\blk00000003/sig000003e3 ), + .R(sclr), + .Q(\blk00000003/sig00000486 ) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk0000032d ( + .C(clk), + .CE(\blk00000003/sig000004ed ), + .D(\blk00000003/sig000003e2 ), + .R(sclr), + .Q(\blk00000003/sig00000485 ) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk0000032c ( + .C(clk), + .CE(\blk00000003/sig000004ed ), + .D(\blk00000003/sig000003e1 ), + .R(sclr), + .Q(\blk00000003/sig00000484 ) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk0000032b ( + .C(clk), + .CE(\blk00000003/sig000004ed ), + .D(\blk00000003/sig000003e0 ), + .R(sclr), + .Q(\blk00000003/sig00000483 ) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk0000032a ( + .C(clk), + .CE(\blk00000003/sig000004ed ), + .D(\blk00000003/sig000003df ), + .R(sclr), + .Q(\blk00000003/sig00000482 ) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000329 ( + .C(clk), + .CE(\blk00000003/sig000004ed ), + .D(\blk00000003/sig000003de ), + .R(sclr), + .Q(\blk00000003/sig00000481 ) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000328 ( + .C(clk), + .CE(\blk00000003/sig000004ed ), + .D(\blk00000003/sig00000425 ), + .R(sclr), + .Q(\blk00000003/sig000004c8 ) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000327 ( + .C(clk), + .CE(\blk00000003/sig000004ed ), + .D(\blk00000003/sig00000424 ), + .R(sclr), + .Q(\blk00000003/sig000004c7 ) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000326 ( + .C(clk), + .CE(\blk00000003/sig000004ed ), + .D(\blk00000003/sig00000423 ), + .R(sclr), + .Q(\blk00000003/sig000004c6 ) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000325 ( + .C(clk), + .CE(\blk00000003/sig000004ed ), + .D(\blk00000003/sig00000422 ), + .R(sclr), + .Q(\blk00000003/sig000004c5 ) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000324 ( + .C(clk), + .CE(\blk00000003/sig000004ed ), + .D(\blk00000003/sig00000421 ), + .R(sclr), + .Q(\blk00000003/sig000004c4 ) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000323 ( + .C(clk), + .CE(\blk00000003/sig000004ed ), + .D(\blk00000003/sig00000420 ), + .R(sclr), + .Q(\blk00000003/sig000004c3 ) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000322 ( + .C(clk), + .CE(\blk00000003/sig000004ed ), + .D(\blk00000003/sig0000041f ), + .R(sclr), + .Q(\blk00000003/sig000004c2 ) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000321 ( + .C(clk), + .CE(\blk00000003/sig000004ed ), + .D(\blk00000003/sig0000041e ), + .R(sclr), + .Q(\blk00000003/sig000004c1 ) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000320 ( + .C(clk), + .CE(\blk00000003/sig000004ed ), + .D(\blk00000003/sig0000041d ), + .R(sclr), + .Q(\blk00000003/sig000004c0 ) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk0000031f ( + .C(clk), + .CE(\blk00000003/sig000004ed ), + .D(\blk00000003/sig0000041c ), + .R(sclr), + .Q(\blk00000003/sig000004bf ) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk0000031e ( + .C(clk), + .CE(\blk00000003/sig000004ed ), + .D(\blk00000003/sig0000041b ), + .R(sclr), + .Q(\blk00000003/sig000004be ) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk0000031d ( + .C(clk), + .CE(\blk00000003/sig000004ed ), + .D(\blk00000003/sig0000041a ), + .R(sclr), + .Q(\blk00000003/sig000004bd ) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk0000031c ( + .C(clk), + .CE(\blk00000003/sig000004ed ), + .D(\blk00000003/sig00000419 ), + .R(sclr), + .Q(\blk00000003/sig000004bc ) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk0000031b ( + .C(clk), + .CE(\blk00000003/sig000004ed ), + .D(\blk00000003/sig00000418 ), + .R(sclr), + .Q(\blk00000003/sig000004bb ) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk0000031a ( + .C(clk), + .CE(\blk00000003/sig000004ed ), + .D(\blk00000003/sig00000417 ), + .R(sclr), + .Q(\blk00000003/sig000004ba ) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000319 ( + .C(clk), + .CE(\blk00000003/sig000004ed ), + .D(\blk00000003/sig00000416 ), + .R(sclr), + .Q(\blk00000003/sig000004b9 ) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000318 ( + .C(clk), + .CE(\blk00000003/sig000004ed ), + .D(\blk00000003/sig00000415 ), + .R(sclr), + .Q(\blk00000003/sig000004b8 ) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000317 ( + .C(clk), + .CE(\blk00000003/sig000004ed ), + .D(\blk00000003/sig00000414 ), + .R(sclr), + .Q(\blk00000003/sig000004b7 ) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000316 ( + .C(clk), + .CE(\blk00000003/sig000004ed ), + .D(\blk00000003/sig00000413 ), + .R(sclr), + .Q(\blk00000003/sig000004b6 ) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000315 ( + .C(clk), + .CE(\blk00000003/sig000004ed ), + .D(\blk00000003/sig00000412 ), + .R(sclr), + .Q(\blk00000003/sig000004b5 ) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000314 ( + .C(clk), + .CE(\blk00000003/sig000004ed ), + .D(\blk00000003/sig00000411 ), + .R(sclr), + .Q(\blk00000003/sig000004b4 ) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000313 ( + .C(clk), + .CE(\blk00000003/sig000004ed ), + .D(\blk00000003/sig00000410 ), + .R(sclr), + .Q(\blk00000003/sig000004b3 ) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000312 ( + .C(clk), + .CE(\blk00000003/sig000004ed ), + .D(\blk00000003/sig0000040f ), + .R(sclr), + .Q(\blk00000003/sig000004b2 ) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000311 ( + .C(clk), + .CE(\blk00000003/sig000004ed ), + .D(\blk00000003/sig0000040e ), + .R(sclr), + .Q(\blk00000003/sig000004b1 ) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000118 ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig000002d1 ), + .R(sclr), + .Q(\blk00000003/sig00000438 ) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000117 ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig000002d0 ), + .R(sclr), + .Q(\blk00000003/sig00000437 ) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000116 ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig000002cf ), + .R(sclr), + .Q(\blk00000003/sig00000436 ) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000115 ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig00000434 ), + .R(sclr), + .Q(\blk00000003/sig00000435 ) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000114 ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig000002d3 ), + .R(sclr), + .Q(\blk00000003/sig00000433 ) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000113 ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig000002d7 ), + .R(sclr), + .Q(\blk00000003/sig00000432 ) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000112 ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig000002da ), + .R(sclr), + .Q(\blk00000003/sig00000431 ) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000111 ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig000002e1 ), + .R(sclr), + .Q(\blk00000003/sig00000430 ) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000110 ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig0000042e ), + .R(sclr), + .Q(\blk00000003/sig0000042f ) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk0000010f ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig000002c6 ), + .R(sclr), + .Q(\blk00000003/sig0000042d ) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk0000010e ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig000002c5 ), + .R(sclr), + .Q(\blk00000003/sig0000042c ) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk0000010d ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig000002c4 ), + .R(sclr), + .Q(\blk00000003/sig0000042b ) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk0000010c ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig00000234 ), + .R(\blk00000003/sig00000049 ), + .Q(\blk00000003/sig0000042a ) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk0000010b ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig00000275 ), + .R(\blk00000003/sig00000049 ), + .Q(\blk00000003/sig00000429 ) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk0000010a ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig00000271 ), + .R(\blk00000003/sig00000049 ), + .Q(\blk00000003/sig00000428 ) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000109 ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig0000026e ), + .R(\blk00000003/sig00000049 ), + .Q(\blk00000003/sig00000427 ) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000108 ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig0000026a ), + .R(\blk00000003/sig00000049 ), + .Q(\blk00000003/sig00000426 ) + ); + DSP48E1 #( + .ACASCREG ( 1 ), + .ADREG ( 1 ), + .ALUMODEREG ( 0 ), + .AREG ( 1 ), + .AUTORESET_PATDET ( "NO_RESET" ), + .A_INPUT ( "DIRECT" ), + .BCASCREG ( 1 ), + .BREG ( 1 ), + .B_INPUT ( "DIRECT" ), + .CARRYINREG ( 1 ), + .CARRYINSELREG ( 1 ), + .CREG ( 1 ), + .DREG ( 1 ), + .INMODEREG ( 1 ), + .MASK ( 48'hFFFFFFFFFFFE ), + .MREG ( 1 ), + .OPMODEREG ( 0 ), + .PATTERN ( 48'h000000000000 ), + .PREG ( 1 ), + .SEL_MASK ( "MASK" ), + .SEL_PATTERN ( "PATTERN" ), + .USE_DPORT ( "TRUE" ), + .USE_MULT ( "MULTIPLY" ), + .USE_PATTERN_DETECT ( "NO_PATDET" ), + .USE_SIMD ( "ONE48" )) + \blk00000003/blk00000107 ( + .PATTERNBDETECT(\NLW_blk00000003/blk00000107_PATTERNBDETECT_UNCONNECTED ), + .RSTC(\blk00000003/sig00000049 ), + .CEB1(\blk00000003/sig00000049 ), + .CEAD(ce), + .MULTSIGNOUT(\NLW_blk00000003/blk00000107_MULTSIGNOUT_UNCONNECTED ), + .CEC(ce), + .RSTM(\blk00000003/sig00000049 ), + .MULTSIGNIN(\blk00000003/sig00000049 ), + .CEB2(ce), + .RSTCTRL(\blk00000003/sig00000049 ), + .CEP(ce), + .CARRYCASCOUT(\NLW_blk00000003/blk00000107_CARRYCASCOUT_UNCONNECTED ), + .RSTA(\blk00000003/sig00000049 ), + .CECARRYIN(ce), + .UNDERFLOW(\NLW_blk00000003/blk00000107_UNDERFLOW_UNCONNECTED ), + .PATTERNDETECT(\NLW_blk00000003/blk00000107_PATTERNDETECT_UNCONNECTED ), + .RSTALUMODE(\blk00000003/sig00000049 ), + .RSTALLCARRYIN(\blk00000003/sig00000049 ), + .CED(ce), + .RSTD(\blk00000003/sig00000049 ), + .CEALUMODE(ce), + .CEA2(ce), + .CLK(clk), + .CEA1(\blk00000003/sig00000049 ), + .RSTB(\blk00000003/sig00000049 ), + .OVERFLOW(\NLW_blk00000003/blk00000107_OVERFLOW_UNCONNECTED ), + .CECTRL(ce), + .CEM(ce), + .CARRYIN(\blk00000003/sig00000049 ), + .CARRYCASCIN(\blk00000003/sig00000049 ), + .RSTINMODE(\blk00000003/sig00000049 ), + .CEINMODE(ce), + .RSTP(\blk00000003/sig00000049 ), + .ACOUT({\NLW_blk00000003/blk00000107_ACOUT<29>_UNCONNECTED , \NLW_blk00000003/blk00000107_ACOUT<28>_UNCONNECTED , +\NLW_blk00000003/blk00000107_ACOUT<27>_UNCONNECTED , \NLW_blk00000003/blk00000107_ACOUT<26>_UNCONNECTED , +\NLW_blk00000003/blk00000107_ACOUT<25>_UNCONNECTED , \NLW_blk00000003/blk00000107_ACOUT<24>_UNCONNECTED , +\NLW_blk00000003/blk00000107_ACOUT<23>_UNCONNECTED , \NLW_blk00000003/blk00000107_ACOUT<22>_UNCONNECTED , +\NLW_blk00000003/blk00000107_ACOUT<21>_UNCONNECTED , \NLW_blk00000003/blk00000107_ACOUT<20>_UNCONNECTED , +\NLW_blk00000003/blk00000107_ACOUT<19>_UNCONNECTED , \NLW_blk00000003/blk00000107_ACOUT<18>_UNCONNECTED , +\NLW_blk00000003/blk00000107_ACOUT<17>_UNCONNECTED , \NLW_blk00000003/blk00000107_ACOUT<16>_UNCONNECTED , +\NLW_blk00000003/blk00000107_ACOUT<15>_UNCONNECTED , \NLW_blk00000003/blk00000107_ACOUT<14>_UNCONNECTED , +\NLW_blk00000003/blk00000107_ACOUT<13>_UNCONNECTED , \NLW_blk00000003/blk00000107_ACOUT<12>_UNCONNECTED , +\NLW_blk00000003/blk00000107_ACOUT<11>_UNCONNECTED , \NLW_blk00000003/blk00000107_ACOUT<10>_UNCONNECTED , +\NLW_blk00000003/blk00000107_ACOUT<9>_UNCONNECTED , \NLW_blk00000003/blk00000107_ACOUT<8>_UNCONNECTED , +\NLW_blk00000003/blk00000107_ACOUT<7>_UNCONNECTED , \NLW_blk00000003/blk00000107_ACOUT<6>_UNCONNECTED , +\NLW_blk00000003/blk00000107_ACOUT<5>_UNCONNECTED , \NLW_blk00000003/blk00000107_ACOUT<4>_UNCONNECTED , +\NLW_blk00000003/blk00000107_ACOUT<3>_UNCONNECTED , \NLW_blk00000003/blk00000107_ACOUT<2>_UNCONNECTED , +\NLW_blk00000003/blk00000107_ACOUT<1>_UNCONNECTED , \NLW_blk00000003/blk00000107_ACOUT<0>_UNCONNECTED }), + .OPMODE({\blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig000000ae , \blk00000003/sig00000049 , \blk00000003/sig000000ae , +\blk00000003/sig00000049 , \blk00000003/sig000000ae }), + .PCIN({\blk00000003/sig00000384 , \blk00000003/sig00000385 , \blk00000003/sig00000386 , \blk00000003/sig00000387 , \blk00000003/sig00000388 , +\blk00000003/sig00000389 , \blk00000003/sig0000038a , \blk00000003/sig0000038b , \blk00000003/sig0000038c , \blk00000003/sig0000038d , +\blk00000003/sig0000038e , \blk00000003/sig0000038f , \blk00000003/sig00000390 , \blk00000003/sig00000391 , \blk00000003/sig00000392 , +\blk00000003/sig00000393 , \blk00000003/sig00000394 , \blk00000003/sig00000395 , \blk00000003/sig00000396 , \blk00000003/sig00000397 , +\blk00000003/sig00000398 , \blk00000003/sig00000399 , \blk00000003/sig0000039a , \blk00000003/sig0000039b , \blk00000003/sig0000039c , +\blk00000003/sig0000039d , \blk00000003/sig0000039e , \blk00000003/sig0000039f , \blk00000003/sig000003a0 , \blk00000003/sig000003a1 , +\blk00000003/sig000003a2 , \blk00000003/sig000003a3 , \blk00000003/sig000003a4 , \blk00000003/sig000003a5 , \blk00000003/sig000003a6 , +\blk00000003/sig000003a7 , \blk00000003/sig000003a8 , \blk00000003/sig000003a9 , \blk00000003/sig000003aa , \blk00000003/sig000003ab , +\blk00000003/sig000003ac , \blk00000003/sig000003ad , \blk00000003/sig000003ae , \blk00000003/sig000003af , \blk00000003/sig000003b0 , +\blk00000003/sig000003b1 , \blk00000003/sig000003b2 , \blk00000003/sig000003b3 }), + .ALUMODE({\blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 }), + .C({\blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , +\blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , +\blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , +\blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , +\blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , +\blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , +\blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , +\blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , +\blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , +\blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 }), + .CARRYOUT({\NLW_blk00000003/blk00000107_CARRYOUT<3>_UNCONNECTED , \NLW_blk00000003/blk00000107_CARRYOUT<2>_UNCONNECTED , +\NLW_blk00000003/blk00000107_CARRYOUT<1>_UNCONNECTED , \NLW_blk00000003/blk00000107_CARRYOUT<0>_UNCONNECTED }), + .INMODE({\blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig000000ae , \blk00000003/sig00000049 , \blk00000003/sig00000049 }), + .BCIN({\blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , +\blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , +\blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , +\blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 }), + .B({\blk00000003/sig000003b4 , \blk00000003/sig000003b5 , \blk00000003/sig000003b6 , \blk00000003/sig000003b7 , \blk00000003/sig000003b8 , +\blk00000003/sig000003b9 , \blk00000003/sig000003ba , \blk00000003/sig000003bb , \blk00000003/sig000003bc , \blk00000003/sig000003bd , +\blk00000003/sig000003be , \blk00000003/sig000003bf , \blk00000003/sig000003c0 , \blk00000003/sig000003c1 , \blk00000003/sig000003c2 , +\blk00000003/sig000003c3 , \blk00000003/sig000003c4 , \blk00000003/sig000003c5 }), + .BCOUT({\NLW_blk00000003/blk00000107_BCOUT<17>_UNCONNECTED , \NLW_blk00000003/blk00000107_BCOUT<16>_UNCONNECTED , +\NLW_blk00000003/blk00000107_BCOUT<15>_UNCONNECTED , \NLW_blk00000003/blk00000107_BCOUT<14>_UNCONNECTED , +\NLW_blk00000003/blk00000107_BCOUT<13>_UNCONNECTED , \NLW_blk00000003/blk00000107_BCOUT<12>_UNCONNECTED , +\NLW_blk00000003/blk00000107_BCOUT<11>_UNCONNECTED , \NLW_blk00000003/blk00000107_BCOUT<10>_UNCONNECTED , +\NLW_blk00000003/blk00000107_BCOUT<9>_UNCONNECTED , \NLW_blk00000003/blk00000107_BCOUT<8>_UNCONNECTED , +\NLW_blk00000003/blk00000107_BCOUT<7>_UNCONNECTED , \NLW_blk00000003/blk00000107_BCOUT<6>_UNCONNECTED , +\NLW_blk00000003/blk00000107_BCOUT<5>_UNCONNECTED , \NLW_blk00000003/blk00000107_BCOUT<4>_UNCONNECTED , +\NLW_blk00000003/blk00000107_BCOUT<3>_UNCONNECTED , \NLW_blk00000003/blk00000107_BCOUT<2>_UNCONNECTED , +\NLW_blk00000003/blk00000107_BCOUT<1>_UNCONNECTED , \NLW_blk00000003/blk00000107_BCOUT<0>_UNCONNECTED }), + .D({\blk00000003/sig000003f6 , \blk00000003/sig000003f6 , \blk00000003/sig000003f7 , \blk00000003/sig000003f8 , \blk00000003/sig000003f9 , +\blk00000003/sig000003fa , \blk00000003/sig000003fb , \blk00000003/sig000003fc , \blk00000003/sig000003fd , \blk00000003/sig000003fe , +\blk00000003/sig000003ff , \blk00000003/sig00000400 , \blk00000003/sig00000401 , \blk00000003/sig00000402 , \blk00000003/sig00000403 , +\blk00000003/sig00000404 , \blk00000003/sig00000405 , \blk00000003/sig00000406 , \blk00000003/sig00000407 , \blk00000003/sig00000408 , +\blk00000003/sig00000409 , \blk00000003/sig0000040a , \blk00000003/sig0000040b , \blk00000003/sig0000040c , \blk00000003/sig0000040d }), + .P({\NLW_blk00000003/blk00000107_P<47>_UNCONNECTED , \NLW_blk00000003/blk00000107_P<46>_UNCONNECTED , +\NLW_blk00000003/blk00000107_P<45>_UNCONNECTED , \NLW_blk00000003/blk00000107_P<44>_UNCONNECTED , \NLW_blk00000003/blk00000107_P<43>_UNCONNECTED , +\NLW_blk00000003/blk00000107_P<42>_UNCONNECTED , \NLW_blk00000003/blk00000107_P<41>_UNCONNECTED , \NLW_blk00000003/blk00000107_P<40>_UNCONNECTED , +\NLW_blk00000003/blk00000107_P<39>_UNCONNECTED , \NLW_blk00000003/blk00000107_P<38>_UNCONNECTED , \NLW_blk00000003/blk00000107_P<37>_UNCONNECTED , +\NLW_blk00000003/blk00000107_P<36>_UNCONNECTED , \NLW_blk00000003/blk00000107_P<35>_UNCONNECTED , \NLW_blk00000003/blk00000107_P<34>_UNCONNECTED , +\NLW_blk00000003/blk00000107_P<33>_UNCONNECTED , \NLW_blk00000003/blk00000107_P<32>_UNCONNECTED , \NLW_blk00000003/blk00000107_P<31>_UNCONNECTED , +\NLW_blk00000003/blk00000107_P<30>_UNCONNECTED , \NLW_blk00000003/blk00000107_P<29>_UNCONNECTED , \NLW_blk00000003/blk00000107_P<28>_UNCONNECTED , +\NLW_blk00000003/blk00000107_P<27>_UNCONNECTED , \NLW_blk00000003/blk00000107_P<26>_UNCONNECTED , \NLW_blk00000003/blk00000107_P<25>_UNCONNECTED , +\NLW_blk00000003/blk00000107_P<24>_UNCONNECTED , \NLW_blk00000003/blk00000107_P<23>_UNCONNECTED , \NLW_blk00000003/blk00000107_P<22>_UNCONNECTED , +\NLW_blk00000003/blk00000107_P<21>_UNCONNECTED , \NLW_blk00000003/blk00000107_P<20>_UNCONNECTED , \NLW_blk00000003/blk00000107_P<19>_UNCONNECTED , +\NLW_blk00000003/blk00000107_P<18>_UNCONNECTED , \NLW_blk00000003/blk00000107_P<17>_UNCONNECTED , \NLW_blk00000003/blk00000107_P<16>_UNCONNECTED , +\NLW_blk00000003/blk00000107_P<15>_UNCONNECTED , \NLW_blk00000003/blk00000107_P<14>_UNCONNECTED , \NLW_blk00000003/blk00000107_P<13>_UNCONNECTED , +\NLW_blk00000003/blk00000107_P<12>_UNCONNECTED , \NLW_blk00000003/blk00000107_P<11>_UNCONNECTED , \NLW_blk00000003/blk00000107_P<10>_UNCONNECTED , +\NLW_blk00000003/blk00000107_P<9>_UNCONNECTED , \NLW_blk00000003/blk00000107_P<8>_UNCONNECTED , \NLW_blk00000003/blk00000107_P<7>_UNCONNECTED , +\NLW_blk00000003/blk00000107_P<6>_UNCONNECTED , \NLW_blk00000003/blk00000107_P<5>_UNCONNECTED , \NLW_blk00000003/blk00000107_P<4>_UNCONNECTED , +\NLW_blk00000003/blk00000107_P<3>_UNCONNECTED , \NLW_blk00000003/blk00000107_P<2>_UNCONNECTED , \NLW_blk00000003/blk00000107_P<1>_UNCONNECTED , +\NLW_blk00000003/blk00000107_P<0>_UNCONNECTED }), + .A({\blk00000003/sig0000040e , \blk00000003/sig0000040e , \blk00000003/sig0000040e , \blk00000003/sig0000040e , \blk00000003/sig0000040e , +\blk00000003/sig0000040e , \blk00000003/sig0000040e , \blk00000003/sig0000040f , \blk00000003/sig00000410 , \blk00000003/sig00000411 , +\blk00000003/sig00000412 , \blk00000003/sig00000413 , \blk00000003/sig00000414 , \blk00000003/sig00000415 , \blk00000003/sig00000416 , +\blk00000003/sig00000417 , \blk00000003/sig00000418 , \blk00000003/sig00000419 , \blk00000003/sig0000041a , \blk00000003/sig0000041b , +\blk00000003/sig0000041c , \blk00000003/sig0000041d , \blk00000003/sig0000041e , \blk00000003/sig0000041f , \blk00000003/sig00000420 , +\blk00000003/sig00000421 , \blk00000003/sig00000422 , \blk00000003/sig00000423 , \blk00000003/sig00000424 , \blk00000003/sig00000425 }), + .PCOUT({\blk00000003/sig000000c2 , \blk00000003/sig000000c3 , \blk00000003/sig000000c4 , \blk00000003/sig000000c5 , \blk00000003/sig000000c6 , +\blk00000003/sig000000c7 , \blk00000003/sig000000c8 , \blk00000003/sig000000c9 , \blk00000003/sig000000ca , \blk00000003/sig000000cb , +\blk00000003/sig000000cc , \blk00000003/sig000000cd , \blk00000003/sig000000ce , \blk00000003/sig000000cf , \blk00000003/sig000000d0 , +\blk00000003/sig000000d1 , \blk00000003/sig000000d2 , \blk00000003/sig000000d3 , \blk00000003/sig000000d4 , \blk00000003/sig000000d5 , +\blk00000003/sig000000d6 , \blk00000003/sig000000d7 , \blk00000003/sig000000d8 , \blk00000003/sig000000d9 , \blk00000003/sig000000da , +\blk00000003/sig000000db , \blk00000003/sig000000dc , \blk00000003/sig000000dd , \blk00000003/sig000000de , \blk00000003/sig000000df , +\blk00000003/sig000000e0 , \blk00000003/sig000000e1 , \blk00000003/sig000000e2 , \blk00000003/sig000000e3 , \blk00000003/sig000000e4 , +\blk00000003/sig000000e5 , \blk00000003/sig000000e6 , \blk00000003/sig000000e7 , \blk00000003/sig000000e8 , \blk00000003/sig000000e9 , +\blk00000003/sig000000ea , \blk00000003/sig000000eb , \blk00000003/sig000000ec , \blk00000003/sig000000ed , \blk00000003/sig000000ee , +\blk00000003/sig000000ef , \blk00000003/sig000000f0 , \blk00000003/sig000000f1 }), + .ACIN({\blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , +\blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , +\blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , +\blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , +\blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , +\blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 }), + .CARRYINSEL({\blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 }) + ); + DSP48E1 #( + .ACASCREG ( 1 ), + .ADREG ( 1 ), + .ALUMODEREG ( 0 ), + .AREG ( 1 ), + .AUTORESET_PATDET ( "NO_RESET" ), + .A_INPUT ( "DIRECT" ), + .BCASCREG ( 1 ), + .BREG ( 1 ), + .B_INPUT ( "DIRECT" ), + .CARRYINREG ( 1 ), + .CARRYINSELREG ( 1 ), + .CREG ( 1 ), + .DREG ( 1 ), + .INMODEREG ( 1 ), + .MASK ( 48'hFFFFFFFFFFFE ), + .MREG ( 1 ), + .OPMODEREG ( 0 ), + .PATTERN ( 48'h000000000000 ), + .PREG ( 1 ), + .SEL_MASK ( "MASK" ), + .SEL_PATTERN ( "PATTERN" ), + .USE_DPORT ( "TRUE" ), + .USE_MULT ( "MULTIPLY" ), + .USE_PATTERN_DETECT ( "NO_PATDET" ), + .USE_SIMD ( "ONE48" )) + \blk00000003/blk00000106 ( + .PATTERNBDETECT(\NLW_blk00000003/blk00000106_PATTERNBDETECT_UNCONNECTED ), + .RSTC(\blk00000003/sig00000049 ), + .CEB1(\blk00000003/sig00000049 ), + .CEAD(ce), + .MULTSIGNOUT(\NLW_blk00000003/blk00000106_MULTSIGNOUT_UNCONNECTED ), + .CEC(ce), + .RSTM(\blk00000003/sig00000049 ), + .MULTSIGNIN(\blk00000003/sig00000049 ), + .CEB2(ce), + .RSTCTRL(\blk00000003/sig00000049 ), + .CEP(ce), + .CARRYCASCOUT(\NLW_blk00000003/blk00000106_CARRYCASCOUT_UNCONNECTED ), + .RSTA(\blk00000003/sig00000049 ), + .CECARRYIN(ce), + .UNDERFLOW(\NLW_blk00000003/blk00000106_UNDERFLOW_UNCONNECTED ), + .PATTERNDETECT(\NLW_blk00000003/blk00000106_PATTERNDETECT_UNCONNECTED ), + .RSTALUMODE(\blk00000003/sig00000049 ), + .RSTALLCARRYIN(\blk00000003/sig00000049 ), + .CED(ce), + .RSTD(\blk00000003/sig00000049 ), + .CEALUMODE(ce), + .CEA2(ce), + .CLK(clk), + .CEA1(\blk00000003/sig00000049 ), + .RSTB(\blk00000003/sig00000049 ), + .OVERFLOW(\NLW_blk00000003/blk00000106_OVERFLOW_UNCONNECTED ), + .CECTRL(ce), + .CEM(ce), + .CARRYIN(\blk00000003/sig00000049 ), + .CARRYCASCIN(\blk00000003/sig00000049 ), + .RSTINMODE(\blk00000003/sig00000049 ), + .CEINMODE(ce), + .RSTP(\blk00000003/sig00000049 ), + .ACOUT({\NLW_blk00000003/blk00000106_ACOUT<29>_UNCONNECTED , \NLW_blk00000003/blk00000106_ACOUT<28>_UNCONNECTED , +\NLW_blk00000003/blk00000106_ACOUT<27>_UNCONNECTED , \NLW_blk00000003/blk00000106_ACOUT<26>_UNCONNECTED , +\NLW_blk00000003/blk00000106_ACOUT<25>_UNCONNECTED , \NLW_blk00000003/blk00000106_ACOUT<24>_UNCONNECTED , +\NLW_blk00000003/blk00000106_ACOUT<23>_UNCONNECTED , \NLW_blk00000003/blk00000106_ACOUT<22>_UNCONNECTED , +\NLW_blk00000003/blk00000106_ACOUT<21>_UNCONNECTED , \NLW_blk00000003/blk00000106_ACOUT<20>_UNCONNECTED , +\NLW_blk00000003/blk00000106_ACOUT<19>_UNCONNECTED , \NLW_blk00000003/blk00000106_ACOUT<18>_UNCONNECTED , +\NLW_blk00000003/blk00000106_ACOUT<17>_UNCONNECTED , \NLW_blk00000003/blk00000106_ACOUT<16>_UNCONNECTED , +\NLW_blk00000003/blk00000106_ACOUT<15>_UNCONNECTED , \NLW_blk00000003/blk00000106_ACOUT<14>_UNCONNECTED , +\NLW_blk00000003/blk00000106_ACOUT<13>_UNCONNECTED , \NLW_blk00000003/blk00000106_ACOUT<12>_UNCONNECTED , +\NLW_blk00000003/blk00000106_ACOUT<11>_UNCONNECTED , \NLW_blk00000003/blk00000106_ACOUT<10>_UNCONNECTED , +\NLW_blk00000003/blk00000106_ACOUT<9>_UNCONNECTED , \NLW_blk00000003/blk00000106_ACOUT<8>_UNCONNECTED , +\NLW_blk00000003/blk00000106_ACOUT<7>_UNCONNECTED , \NLW_blk00000003/blk00000106_ACOUT<6>_UNCONNECTED , +\NLW_blk00000003/blk00000106_ACOUT<5>_UNCONNECTED , \NLW_blk00000003/blk00000106_ACOUT<4>_UNCONNECTED , +\NLW_blk00000003/blk00000106_ACOUT<3>_UNCONNECTED , \NLW_blk00000003/blk00000106_ACOUT<2>_UNCONNECTED , +\NLW_blk00000003/blk00000106_ACOUT<1>_UNCONNECTED , \NLW_blk00000003/blk00000106_ACOUT<0>_UNCONNECTED }), + .OPMODE({\blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig000000ae , \blk00000003/sig00000049 , \blk00000003/sig000000ae , +\blk00000003/sig00000049 , \blk00000003/sig000000ae }), + .PCIN({\blk00000003/sig00000324 , \blk00000003/sig00000325 , \blk00000003/sig00000326 , \blk00000003/sig00000327 , \blk00000003/sig00000328 , +\blk00000003/sig00000329 , \blk00000003/sig0000032a , \blk00000003/sig0000032b , \blk00000003/sig0000032c , \blk00000003/sig0000032d , +\blk00000003/sig0000032e , \blk00000003/sig0000032f , \blk00000003/sig00000330 , \blk00000003/sig00000331 , \blk00000003/sig00000332 , +\blk00000003/sig00000333 , \blk00000003/sig00000334 , \blk00000003/sig00000335 , \blk00000003/sig00000336 , \blk00000003/sig00000337 , +\blk00000003/sig00000338 , \blk00000003/sig00000339 , \blk00000003/sig0000033a , \blk00000003/sig0000033b , \blk00000003/sig0000033c , +\blk00000003/sig0000033d , \blk00000003/sig0000033e , \blk00000003/sig0000033f , \blk00000003/sig00000340 , \blk00000003/sig00000341 , +\blk00000003/sig00000342 , \blk00000003/sig00000343 , \blk00000003/sig00000344 , \blk00000003/sig00000345 , \blk00000003/sig00000346 , +\blk00000003/sig00000347 , \blk00000003/sig00000348 , \blk00000003/sig00000349 , \blk00000003/sig0000034a , \blk00000003/sig0000034b , +\blk00000003/sig0000034c , \blk00000003/sig0000034d , \blk00000003/sig0000034e , \blk00000003/sig0000034f , \blk00000003/sig00000350 , +\blk00000003/sig00000351 , \blk00000003/sig00000352 , \blk00000003/sig00000353 }), + .ALUMODE({\blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 }), + .C({\blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , +\blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , +\blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , +\blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , +\blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , +\blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , +\blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , +\blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , +\blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , +\blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 }), + .CARRYOUT({\NLW_blk00000003/blk00000106_CARRYOUT<3>_UNCONNECTED , \NLW_blk00000003/blk00000106_CARRYOUT<2>_UNCONNECTED , +\NLW_blk00000003/blk00000106_CARRYOUT<1>_UNCONNECTED , \NLW_blk00000003/blk00000106_CARRYOUT<0>_UNCONNECTED }), + .INMODE({\blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig000000ae , \blk00000003/sig00000049 , \blk00000003/sig00000049 }), + .BCIN({\blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , +\blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , +\blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , +\blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 }), + .B({\blk00000003/sig000003b4 , \blk00000003/sig000003b5 , \blk00000003/sig000003b6 , \blk00000003/sig000003b7 , \blk00000003/sig000003b8 , +\blk00000003/sig000003b9 , \blk00000003/sig000003ba , \blk00000003/sig000003bb , \blk00000003/sig000003bc , \blk00000003/sig000003bd , +\blk00000003/sig000003be , \blk00000003/sig000003bf , \blk00000003/sig000003c0 , \blk00000003/sig000003c1 , \blk00000003/sig000003c2 , +\blk00000003/sig000003c3 , \blk00000003/sig000003c4 , \blk00000003/sig000003c5 }), + .BCOUT({\NLW_blk00000003/blk00000106_BCOUT<17>_UNCONNECTED , \NLW_blk00000003/blk00000106_BCOUT<16>_UNCONNECTED , +\NLW_blk00000003/blk00000106_BCOUT<15>_UNCONNECTED , \NLW_blk00000003/blk00000106_BCOUT<14>_UNCONNECTED , +\NLW_blk00000003/blk00000106_BCOUT<13>_UNCONNECTED , \NLW_blk00000003/blk00000106_BCOUT<12>_UNCONNECTED , +\NLW_blk00000003/blk00000106_BCOUT<11>_UNCONNECTED , \NLW_blk00000003/blk00000106_BCOUT<10>_UNCONNECTED , +\NLW_blk00000003/blk00000106_BCOUT<9>_UNCONNECTED , \NLW_blk00000003/blk00000106_BCOUT<8>_UNCONNECTED , +\NLW_blk00000003/blk00000106_BCOUT<7>_UNCONNECTED , \NLW_blk00000003/blk00000106_BCOUT<6>_UNCONNECTED , +\NLW_blk00000003/blk00000106_BCOUT<5>_UNCONNECTED , \NLW_blk00000003/blk00000106_BCOUT<4>_UNCONNECTED , +\NLW_blk00000003/blk00000106_BCOUT<3>_UNCONNECTED , \NLW_blk00000003/blk00000106_BCOUT<2>_UNCONNECTED , +\NLW_blk00000003/blk00000106_BCOUT<1>_UNCONNECTED , \NLW_blk00000003/blk00000106_BCOUT<0>_UNCONNECTED }), + .D({\blk00000003/sig000003c6 , \blk00000003/sig000003c6 , \blk00000003/sig000003c7 , \blk00000003/sig000003c8 , \blk00000003/sig000003c9 , +\blk00000003/sig000003ca , \blk00000003/sig000003cb , \blk00000003/sig000003cc , \blk00000003/sig000003cd , \blk00000003/sig000003ce , +\blk00000003/sig000003cf , \blk00000003/sig000003d0 , \blk00000003/sig000003d1 , \blk00000003/sig000003d2 , \blk00000003/sig000003d3 , +\blk00000003/sig000003d4 , \blk00000003/sig000003d5 , \blk00000003/sig000003d6 , \blk00000003/sig000003d7 , \blk00000003/sig000003d8 , +\blk00000003/sig000003d9 , \blk00000003/sig000003da , \blk00000003/sig000003db , \blk00000003/sig000003dc , \blk00000003/sig000003dd }), + .P({\NLW_blk00000003/blk00000106_P<47>_UNCONNECTED , \NLW_blk00000003/blk00000106_P<46>_UNCONNECTED , +\NLW_blk00000003/blk00000106_P<45>_UNCONNECTED , \NLW_blk00000003/blk00000106_P<44>_UNCONNECTED , \NLW_blk00000003/blk00000106_P<43>_UNCONNECTED , +\NLW_blk00000003/blk00000106_P<42>_UNCONNECTED , \NLW_blk00000003/blk00000106_P<41>_UNCONNECTED , \NLW_blk00000003/blk00000106_P<40>_UNCONNECTED , +\NLW_blk00000003/blk00000106_P<39>_UNCONNECTED , \NLW_blk00000003/blk00000106_P<38>_UNCONNECTED , \NLW_blk00000003/blk00000106_P<37>_UNCONNECTED , +\NLW_blk00000003/blk00000106_P<36>_UNCONNECTED , \NLW_blk00000003/blk00000106_P<35>_UNCONNECTED , \NLW_blk00000003/blk00000106_P<34>_UNCONNECTED , +\NLW_blk00000003/blk00000106_P<33>_UNCONNECTED , \NLW_blk00000003/blk00000106_P<32>_UNCONNECTED , \NLW_blk00000003/blk00000106_P<31>_UNCONNECTED , +\NLW_blk00000003/blk00000106_P<30>_UNCONNECTED , \NLW_blk00000003/blk00000106_P<29>_UNCONNECTED , \NLW_blk00000003/blk00000106_P<28>_UNCONNECTED , +\NLW_blk00000003/blk00000106_P<27>_UNCONNECTED , \NLW_blk00000003/blk00000106_P<26>_UNCONNECTED , \NLW_blk00000003/blk00000106_P<25>_UNCONNECTED , +\NLW_blk00000003/blk00000106_P<24>_UNCONNECTED , \NLW_blk00000003/blk00000106_P<23>_UNCONNECTED , \NLW_blk00000003/blk00000106_P<22>_UNCONNECTED , +\NLW_blk00000003/blk00000106_P<21>_UNCONNECTED , \NLW_blk00000003/blk00000106_P<20>_UNCONNECTED , \NLW_blk00000003/blk00000106_P<19>_UNCONNECTED , +\NLW_blk00000003/blk00000106_P<18>_UNCONNECTED , \NLW_blk00000003/blk00000106_P<17>_UNCONNECTED , \NLW_blk00000003/blk00000106_P<16>_UNCONNECTED , +\NLW_blk00000003/blk00000106_P<15>_UNCONNECTED , \NLW_blk00000003/blk00000106_P<14>_UNCONNECTED , \NLW_blk00000003/blk00000106_P<13>_UNCONNECTED , +\NLW_blk00000003/blk00000106_P<12>_UNCONNECTED , \NLW_blk00000003/blk00000106_P<11>_UNCONNECTED , \NLW_blk00000003/blk00000106_P<10>_UNCONNECTED , +\NLW_blk00000003/blk00000106_P<9>_UNCONNECTED , \NLW_blk00000003/blk00000106_P<8>_UNCONNECTED , \NLW_blk00000003/blk00000106_P<7>_UNCONNECTED , +\NLW_blk00000003/blk00000106_P<6>_UNCONNECTED , \NLW_blk00000003/blk00000106_P<5>_UNCONNECTED , \NLW_blk00000003/blk00000106_P<4>_UNCONNECTED , +\NLW_blk00000003/blk00000106_P<3>_UNCONNECTED , \NLW_blk00000003/blk00000106_P<2>_UNCONNECTED , \NLW_blk00000003/blk00000106_P<1>_UNCONNECTED , +\NLW_blk00000003/blk00000106_P<0>_UNCONNECTED }), + .A({\blk00000003/sig000003de , \blk00000003/sig000003de , \blk00000003/sig000003de , \blk00000003/sig000003de , \blk00000003/sig000003de , +\blk00000003/sig000003de , \blk00000003/sig000003de , \blk00000003/sig000003df , \blk00000003/sig000003e0 , \blk00000003/sig000003e1 , +\blk00000003/sig000003e2 , \blk00000003/sig000003e3 , \blk00000003/sig000003e4 , \blk00000003/sig000003e5 , \blk00000003/sig000003e6 , +\blk00000003/sig000003e7 , \blk00000003/sig000003e8 , \blk00000003/sig000003e9 , \blk00000003/sig000003ea , \blk00000003/sig000003eb , +\blk00000003/sig000003ec , \blk00000003/sig000003ed , \blk00000003/sig000003ee , \blk00000003/sig000003ef , \blk00000003/sig000003f0 , +\blk00000003/sig000003f1 , \blk00000003/sig000003f2 , \blk00000003/sig000003f3 , \blk00000003/sig000003f4 , \blk00000003/sig000003f5 }), + .PCOUT({\blk00000003/sig0000014c , \blk00000003/sig0000014d , \blk00000003/sig0000014e , \blk00000003/sig0000014f , \blk00000003/sig00000150 , +\blk00000003/sig00000151 , \blk00000003/sig00000152 , \blk00000003/sig00000153 , \blk00000003/sig00000154 , \blk00000003/sig00000155 , +\blk00000003/sig00000156 , \blk00000003/sig00000157 , \blk00000003/sig00000158 , \blk00000003/sig00000159 , \blk00000003/sig0000015a , +\blk00000003/sig0000015b , \blk00000003/sig0000015c , \blk00000003/sig0000015d , \blk00000003/sig0000015e , \blk00000003/sig0000015f , +\blk00000003/sig00000160 , \blk00000003/sig00000161 , \blk00000003/sig00000162 , \blk00000003/sig00000163 , \blk00000003/sig00000164 , +\blk00000003/sig00000165 , \blk00000003/sig00000166 , \blk00000003/sig00000167 , \blk00000003/sig00000168 , \blk00000003/sig00000169 , +\blk00000003/sig0000016a , \blk00000003/sig0000016b , \blk00000003/sig0000016c , \blk00000003/sig0000016d , \blk00000003/sig0000016e , +\blk00000003/sig0000016f , \blk00000003/sig00000170 , \blk00000003/sig00000171 , \blk00000003/sig00000172 , \blk00000003/sig00000173 , +\blk00000003/sig00000174 , \blk00000003/sig00000175 , \blk00000003/sig00000176 , \blk00000003/sig00000177 , \blk00000003/sig00000178 , +\blk00000003/sig00000179 , \blk00000003/sig0000017a , \blk00000003/sig0000017b }), + .ACIN({\blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , +\blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , +\blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , +\blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , +\blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , +\blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 }), + .CARRYINSEL({\blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 }) + ); + DSP48E1 #( + .ACASCREG ( 1 ), + .ADREG ( 1 ), + .ALUMODEREG ( 0 ), + .AREG ( 1 ), + .AUTORESET_PATDET ( "NO_RESET" ), + .A_INPUT ( "DIRECT" ), + .BCASCREG ( 1 ), + .BREG ( 1 ), + .B_INPUT ( "DIRECT" ), + .CARRYINREG ( 1 ), + .CARRYINSELREG ( 1 ), + .CREG ( 1 ), + .DREG ( 1 ), + .INMODEREG ( 1 ), + .MASK ( 48'hFFFFFFFFFFFE ), + .MREG ( 1 ), + .OPMODEREG ( 0 ), + .PATTERN ( 48'h000000000000 ), + .PREG ( 1 ), + .SEL_MASK ( "MASK" ), + .SEL_PATTERN ( "PATTERN" ), + .USE_DPORT ( "TRUE" ), + .USE_MULT ( "MULTIPLY" ), + .USE_PATTERN_DETECT ( "NO_PATDET" ), + .USE_SIMD ( "ONE48" )) + \blk00000003/blk00000105 ( + .PATTERNBDETECT(\NLW_blk00000003/blk00000105_PATTERNBDETECT_UNCONNECTED ), + .RSTC(\blk00000003/sig00000049 ), + .CEB1(\blk00000003/sig00000049 ), + .CEAD(ce), + .MULTSIGNOUT(\NLW_blk00000003/blk00000105_MULTSIGNOUT_UNCONNECTED ), + .CEC(ce), + .RSTM(\blk00000003/sig00000049 ), + .MULTSIGNIN(\blk00000003/sig00000049 ), + .CEB2(ce), + .RSTCTRL(\blk00000003/sig00000049 ), + .CEP(ce), + .CARRYCASCOUT(\NLW_blk00000003/blk00000105_CARRYCASCOUT_UNCONNECTED ), + .RSTA(\blk00000003/sig00000049 ), + .CECARRYIN(ce), + .UNDERFLOW(\NLW_blk00000003/blk00000105_UNDERFLOW_UNCONNECTED ), + .PATTERNDETECT(\NLW_blk00000003/blk00000105_PATTERNDETECT_UNCONNECTED ), + .RSTALUMODE(\blk00000003/sig00000049 ), + .RSTALLCARRYIN(\blk00000003/sig00000049 ), + .CED(ce), + .RSTD(\blk00000003/sig00000049 ), + .CEALUMODE(ce), + .CEA2(ce), + .CLK(clk), + .CEA1(\blk00000003/sig00000049 ), + .RSTB(\blk00000003/sig00000049 ), + .OVERFLOW(\NLW_blk00000003/blk00000105_OVERFLOW_UNCONNECTED ), + .CECTRL(ce), + .CEM(ce), + .CARRYIN(\blk00000003/sig00000049 ), + .CARRYCASCIN(\blk00000003/sig00000049 ), + .RSTINMODE(\blk00000003/sig00000049 ), + .CEINMODE(ce), + .RSTP(\blk00000003/sig00000049 ), + .ACOUT({\NLW_blk00000003/blk00000105_ACOUT<29>_UNCONNECTED , \NLW_blk00000003/blk00000105_ACOUT<28>_UNCONNECTED , +\NLW_blk00000003/blk00000105_ACOUT<27>_UNCONNECTED , \NLW_blk00000003/blk00000105_ACOUT<26>_UNCONNECTED , +\NLW_blk00000003/blk00000105_ACOUT<25>_UNCONNECTED , \NLW_blk00000003/blk00000105_ACOUT<24>_UNCONNECTED , +\NLW_blk00000003/blk00000105_ACOUT<23>_UNCONNECTED , \NLW_blk00000003/blk00000105_ACOUT<22>_UNCONNECTED , +\NLW_blk00000003/blk00000105_ACOUT<21>_UNCONNECTED , \NLW_blk00000003/blk00000105_ACOUT<20>_UNCONNECTED , +\NLW_blk00000003/blk00000105_ACOUT<19>_UNCONNECTED , \NLW_blk00000003/blk00000105_ACOUT<18>_UNCONNECTED , +\NLW_blk00000003/blk00000105_ACOUT<17>_UNCONNECTED , \NLW_blk00000003/blk00000105_ACOUT<16>_UNCONNECTED , +\NLW_blk00000003/blk00000105_ACOUT<15>_UNCONNECTED , \NLW_blk00000003/blk00000105_ACOUT<14>_UNCONNECTED , +\NLW_blk00000003/blk00000105_ACOUT<13>_UNCONNECTED , \NLW_blk00000003/blk00000105_ACOUT<12>_UNCONNECTED , +\NLW_blk00000003/blk00000105_ACOUT<11>_UNCONNECTED , \NLW_blk00000003/blk00000105_ACOUT<10>_UNCONNECTED , +\NLW_blk00000003/blk00000105_ACOUT<9>_UNCONNECTED , \NLW_blk00000003/blk00000105_ACOUT<8>_UNCONNECTED , +\NLW_blk00000003/blk00000105_ACOUT<7>_UNCONNECTED , \NLW_blk00000003/blk00000105_ACOUT<6>_UNCONNECTED , +\NLW_blk00000003/blk00000105_ACOUT<5>_UNCONNECTED , \NLW_blk00000003/blk00000105_ACOUT<4>_UNCONNECTED , +\NLW_blk00000003/blk00000105_ACOUT<3>_UNCONNECTED , \NLW_blk00000003/blk00000105_ACOUT<2>_UNCONNECTED , +\NLW_blk00000003/blk00000105_ACOUT<1>_UNCONNECTED , \NLW_blk00000003/blk00000105_ACOUT<0>_UNCONNECTED }), + .OPMODE({\blk00000003/sig00000049 , \blk00000003/sig000000ae , \blk00000003/sig000000ae , \blk00000003/sig00000049 , \blk00000003/sig000000ae , +\blk00000003/sig00000049 , \blk00000003/sig000000ae }), + .PCIN({\blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , +\blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , +\blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , +\blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , +\blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , +\blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , +\blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , +\blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , +\blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , +\blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 }), + .ALUMODE({\blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 }), + .C({\blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , +\blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , +\blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , +\blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , +\blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , +\blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , +\blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , +\blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , +\blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , +\blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 }), + .CARRYOUT({\NLW_blk00000003/blk00000105_CARRYOUT<3>_UNCONNECTED , \NLW_blk00000003/blk00000105_CARRYOUT<2>_UNCONNECTED , +\NLW_blk00000003/blk00000105_CARRYOUT<1>_UNCONNECTED , \NLW_blk00000003/blk00000105_CARRYOUT<0>_UNCONNECTED }), + .INMODE({\blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig000000ae , \blk00000003/sig00000049 , \blk00000003/sig00000049 }), + .BCIN({\blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , +\blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , +\blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , +\blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 }), + .B({\blk00000003/sig000002e2 , \blk00000003/sig000002e3 , \blk00000003/sig000002e4 , \blk00000003/sig000002e5 , \blk00000003/sig000002e6 , +\blk00000003/sig000002e7 , \blk00000003/sig000002e8 , \blk00000003/sig000002e9 , \blk00000003/sig000002ea , \blk00000003/sig000002eb , +\blk00000003/sig000002ec , \blk00000003/sig000002ed , \blk00000003/sig000002ee , \blk00000003/sig000002ef , \blk00000003/sig000002f0 , +\blk00000003/sig000002f1 , \blk00000003/sig000002f2 , \blk00000003/sig000002f3 }), + .BCOUT({\NLW_blk00000003/blk00000105_BCOUT<17>_UNCONNECTED , \NLW_blk00000003/blk00000105_BCOUT<16>_UNCONNECTED , +\NLW_blk00000003/blk00000105_BCOUT<15>_UNCONNECTED , \NLW_blk00000003/blk00000105_BCOUT<14>_UNCONNECTED , +\NLW_blk00000003/blk00000105_BCOUT<13>_UNCONNECTED , \NLW_blk00000003/blk00000105_BCOUT<12>_UNCONNECTED , +\NLW_blk00000003/blk00000105_BCOUT<11>_UNCONNECTED , \NLW_blk00000003/blk00000105_BCOUT<10>_UNCONNECTED , +\NLW_blk00000003/blk00000105_BCOUT<9>_UNCONNECTED , \NLW_blk00000003/blk00000105_BCOUT<8>_UNCONNECTED , +\NLW_blk00000003/blk00000105_BCOUT<7>_UNCONNECTED , \NLW_blk00000003/blk00000105_BCOUT<6>_UNCONNECTED , +\NLW_blk00000003/blk00000105_BCOUT<5>_UNCONNECTED , \NLW_blk00000003/blk00000105_BCOUT<4>_UNCONNECTED , +\NLW_blk00000003/blk00000105_BCOUT<3>_UNCONNECTED , \NLW_blk00000003/blk00000105_BCOUT<2>_UNCONNECTED , +\NLW_blk00000003/blk00000105_BCOUT<1>_UNCONNECTED , \NLW_blk00000003/blk00000105_BCOUT<0>_UNCONNECTED }), + .D({\blk00000003/sig00000354 , \blk00000003/sig00000354 , \blk00000003/sig00000355 , \blk00000003/sig00000356 , \blk00000003/sig00000357 , +\blk00000003/sig00000358 , \blk00000003/sig00000359 , \blk00000003/sig0000035a , \blk00000003/sig0000035b , \blk00000003/sig0000035c , +\blk00000003/sig0000035d , \blk00000003/sig0000035e , \blk00000003/sig0000035f , \blk00000003/sig00000360 , \blk00000003/sig00000361 , +\blk00000003/sig00000362 , \blk00000003/sig00000363 , \blk00000003/sig00000364 , \blk00000003/sig00000365 , \blk00000003/sig00000366 , +\blk00000003/sig00000367 , \blk00000003/sig00000368 , \blk00000003/sig00000369 , \blk00000003/sig0000036a , \blk00000003/sig0000036b }), + .P({\NLW_blk00000003/blk00000105_P<47>_UNCONNECTED , \NLW_blk00000003/blk00000105_P<46>_UNCONNECTED , +\NLW_blk00000003/blk00000105_P<45>_UNCONNECTED , \NLW_blk00000003/blk00000105_P<44>_UNCONNECTED , \NLW_blk00000003/blk00000105_P<43>_UNCONNECTED , +\NLW_blk00000003/blk00000105_P<42>_UNCONNECTED , \NLW_blk00000003/blk00000105_P<41>_UNCONNECTED , \NLW_blk00000003/blk00000105_P<40>_UNCONNECTED , +\NLW_blk00000003/blk00000105_P<39>_UNCONNECTED , \NLW_blk00000003/blk00000105_P<38>_UNCONNECTED , \NLW_blk00000003/blk00000105_P<37>_UNCONNECTED , +\NLW_blk00000003/blk00000105_P<36>_UNCONNECTED , \NLW_blk00000003/blk00000105_P<35>_UNCONNECTED , \NLW_blk00000003/blk00000105_P<34>_UNCONNECTED , +\NLW_blk00000003/blk00000105_P<33>_UNCONNECTED , \NLW_blk00000003/blk00000105_P<32>_UNCONNECTED , \NLW_blk00000003/blk00000105_P<31>_UNCONNECTED , +\NLW_blk00000003/blk00000105_P<30>_UNCONNECTED , \NLW_blk00000003/blk00000105_P<29>_UNCONNECTED , \NLW_blk00000003/blk00000105_P<28>_UNCONNECTED , +\NLW_blk00000003/blk00000105_P<27>_UNCONNECTED , \NLW_blk00000003/blk00000105_P<26>_UNCONNECTED , \NLW_blk00000003/blk00000105_P<25>_UNCONNECTED , +\NLW_blk00000003/blk00000105_P<24>_UNCONNECTED , \NLW_blk00000003/blk00000105_P<23>_UNCONNECTED , \NLW_blk00000003/blk00000105_P<22>_UNCONNECTED , +\NLW_blk00000003/blk00000105_P<21>_UNCONNECTED , \NLW_blk00000003/blk00000105_P<20>_UNCONNECTED , \NLW_blk00000003/blk00000105_P<19>_UNCONNECTED , +\NLW_blk00000003/blk00000105_P<18>_UNCONNECTED , \NLW_blk00000003/blk00000105_P<17>_UNCONNECTED , \NLW_blk00000003/blk00000105_P<16>_UNCONNECTED , +\NLW_blk00000003/blk00000105_P<15>_UNCONNECTED , \NLW_blk00000003/blk00000105_P<14>_UNCONNECTED , \NLW_blk00000003/blk00000105_P<13>_UNCONNECTED , +\NLW_blk00000003/blk00000105_P<12>_UNCONNECTED , \NLW_blk00000003/blk00000105_P<11>_UNCONNECTED , \NLW_blk00000003/blk00000105_P<10>_UNCONNECTED , +\NLW_blk00000003/blk00000105_P<9>_UNCONNECTED , \NLW_blk00000003/blk00000105_P<8>_UNCONNECTED , \NLW_blk00000003/blk00000105_P<7>_UNCONNECTED , +\NLW_blk00000003/blk00000105_P<6>_UNCONNECTED , \NLW_blk00000003/blk00000105_P<5>_UNCONNECTED , \NLW_blk00000003/blk00000105_P<4>_UNCONNECTED , +\NLW_blk00000003/blk00000105_P<3>_UNCONNECTED , \NLW_blk00000003/blk00000105_P<2>_UNCONNECTED , \NLW_blk00000003/blk00000105_P<1>_UNCONNECTED , +\NLW_blk00000003/blk00000105_P<0>_UNCONNECTED }), + .A({\blk00000003/sig0000036c , \blk00000003/sig0000036c , \blk00000003/sig0000036c , \blk00000003/sig0000036c , \blk00000003/sig0000036c , +\blk00000003/sig0000036c , \blk00000003/sig0000036c , \blk00000003/sig0000036d , \blk00000003/sig0000036e , \blk00000003/sig0000036f , +\blk00000003/sig00000370 , \blk00000003/sig00000371 , \blk00000003/sig00000372 , \blk00000003/sig00000373 , \blk00000003/sig00000374 , +\blk00000003/sig00000375 , \blk00000003/sig00000376 , \blk00000003/sig00000377 , \blk00000003/sig00000378 , \blk00000003/sig00000379 , +\blk00000003/sig0000037a , \blk00000003/sig0000037b , \blk00000003/sig0000037c , \blk00000003/sig0000037d , \blk00000003/sig0000037e , +\blk00000003/sig0000037f , \blk00000003/sig00000380 , \blk00000003/sig00000381 , \blk00000003/sig00000382 , \blk00000003/sig00000383 }), + .PCOUT({\blk00000003/sig00000384 , \blk00000003/sig00000385 , \blk00000003/sig00000386 , \blk00000003/sig00000387 , \blk00000003/sig00000388 , +\blk00000003/sig00000389 , \blk00000003/sig0000038a , \blk00000003/sig0000038b , \blk00000003/sig0000038c , \blk00000003/sig0000038d , +\blk00000003/sig0000038e , \blk00000003/sig0000038f , \blk00000003/sig00000390 , \blk00000003/sig00000391 , \blk00000003/sig00000392 , +\blk00000003/sig00000393 , \blk00000003/sig00000394 , \blk00000003/sig00000395 , \blk00000003/sig00000396 , \blk00000003/sig00000397 , +\blk00000003/sig00000398 , \blk00000003/sig00000399 , \blk00000003/sig0000039a , \blk00000003/sig0000039b , \blk00000003/sig0000039c , +\blk00000003/sig0000039d , \blk00000003/sig0000039e , \blk00000003/sig0000039f , \blk00000003/sig000003a0 , \blk00000003/sig000003a1 , +\blk00000003/sig000003a2 , \blk00000003/sig000003a3 , \blk00000003/sig000003a4 , \blk00000003/sig000003a5 , \blk00000003/sig000003a6 , +\blk00000003/sig000003a7 , \blk00000003/sig000003a8 , \blk00000003/sig000003a9 , \blk00000003/sig000003aa , \blk00000003/sig000003ab , +\blk00000003/sig000003ac , \blk00000003/sig000003ad , \blk00000003/sig000003ae , \blk00000003/sig000003af , \blk00000003/sig000003b0 , +\blk00000003/sig000003b1 , \blk00000003/sig000003b2 , \blk00000003/sig000003b3 }), + .ACIN({\blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , +\blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , +\blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , +\blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , +\blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , +\blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 }), + .CARRYINSEL({\blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 }) + ); + DSP48E1 #( + .ACASCREG ( 1 ), + .ADREG ( 1 ), + .ALUMODEREG ( 0 ), + .AREG ( 1 ), + .AUTORESET_PATDET ( "NO_RESET" ), + .A_INPUT ( "DIRECT" ), + .BCASCREG ( 1 ), + .BREG ( 1 ), + .B_INPUT ( "DIRECT" ), + .CARRYINREG ( 1 ), + .CARRYINSELREG ( 1 ), + .CREG ( 1 ), + .DREG ( 1 ), + .INMODEREG ( 1 ), + .MASK ( 48'hFFFFFFFFFFFE ), + .MREG ( 1 ), + .OPMODEREG ( 0 ), + .PATTERN ( 48'h000000000000 ), + .PREG ( 1 ), + .SEL_MASK ( "MASK" ), + .SEL_PATTERN ( "PATTERN" ), + .USE_DPORT ( "TRUE" ), + .USE_MULT ( "MULTIPLY" ), + .USE_PATTERN_DETECT ( "NO_PATDET" ), + .USE_SIMD ( "ONE48" )) + \blk00000003/blk00000104 ( + .PATTERNBDETECT(\NLW_blk00000003/blk00000104_PATTERNBDETECT_UNCONNECTED ), + .RSTC(\blk00000003/sig00000049 ), + .CEB1(\blk00000003/sig00000049 ), + .CEAD(ce), + .MULTSIGNOUT(\NLW_blk00000003/blk00000104_MULTSIGNOUT_UNCONNECTED ), + .CEC(ce), + .RSTM(\blk00000003/sig00000049 ), + .MULTSIGNIN(\blk00000003/sig00000049 ), + .CEB2(ce), + .RSTCTRL(\blk00000003/sig00000049 ), + .CEP(ce), + .CARRYCASCOUT(\NLW_blk00000003/blk00000104_CARRYCASCOUT_UNCONNECTED ), + .RSTA(\blk00000003/sig00000049 ), + .CECARRYIN(ce), + .UNDERFLOW(\NLW_blk00000003/blk00000104_UNDERFLOW_UNCONNECTED ), + .PATTERNDETECT(\NLW_blk00000003/blk00000104_PATTERNDETECT_UNCONNECTED ), + .RSTALUMODE(\blk00000003/sig00000049 ), + .RSTALLCARRYIN(\blk00000003/sig00000049 ), + .CED(ce), + .RSTD(\blk00000003/sig00000049 ), + .CEALUMODE(ce), + .CEA2(ce), + .CLK(clk), + .CEA1(\blk00000003/sig00000049 ), + .RSTB(\blk00000003/sig00000049 ), + .OVERFLOW(\NLW_blk00000003/blk00000104_OVERFLOW_UNCONNECTED ), + .CECTRL(ce), + .CEM(ce), + .CARRYIN(\blk00000003/sig00000049 ), + .CARRYCASCIN(\blk00000003/sig00000049 ), + .RSTINMODE(\blk00000003/sig00000049 ), + .CEINMODE(ce), + .RSTP(\blk00000003/sig00000049 ), + .ACOUT({\NLW_blk00000003/blk00000104_ACOUT<29>_UNCONNECTED , \NLW_blk00000003/blk00000104_ACOUT<28>_UNCONNECTED , +\NLW_blk00000003/blk00000104_ACOUT<27>_UNCONNECTED , \NLW_blk00000003/blk00000104_ACOUT<26>_UNCONNECTED , +\NLW_blk00000003/blk00000104_ACOUT<25>_UNCONNECTED , \NLW_blk00000003/blk00000104_ACOUT<24>_UNCONNECTED , +\NLW_blk00000003/blk00000104_ACOUT<23>_UNCONNECTED , \NLW_blk00000003/blk00000104_ACOUT<22>_UNCONNECTED , +\NLW_blk00000003/blk00000104_ACOUT<21>_UNCONNECTED , \NLW_blk00000003/blk00000104_ACOUT<20>_UNCONNECTED , +\NLW_blk00000003/blk00000104_ACOUT<19>_UNCONNECTED , \NLW_blk00000003/blk00000104_ACOUT<18>_UNCONNECTED , +\NLW_blk00000003/blk00000104_ACOUT<17>_UNCONNECTED , \NLW_blk00000003/blk00000104_ACOUT<16>_UNCONNECTED , +\NLW_blk00000003/blk00000104_ACOUT<15>_UNCONNECTED , \NLW_blk00000003/blk00000104_ACOUT<14>_UNCONNECTED , +\NLW_blk00000003/blk00000104_ACOUT<13>_UNCONNECTED , \NLW_blk00000003/blk00000104_ACOUT<12>_UNCONNECTED , +\NLW_blk00000003/blk00000104_ACOUT<11>_UNCONNECTED , \NLW_blk00000003/blk00000104_ACOUT<10>_UNCONNECTED , +\NLW_blk00000003/blk00000104_ACOUT<9>_UNCONNECTED , \NLW_blk00000003/blk00000104_ACOUT<8>_UNCONNECTED , +\NLW_blk00000003/blk00000104_ACOUT<7>_UNCONNECTED , \NLW_blk00000003/blk00000104_ACOUT<6>_UNCONNECTED , +\NLW_blk00000003/blk00000104_ACOUT<5>_UNCONNECTED , \NLW_blk00000003/blk00000104_ACOUT<4>_UNCONNECTED , +\NLW_blk00000003/blk00000104_ACOUT<3>_UNCONNECTED , \NLW_blk00000003/blk00000104_ACOUT<2>_UNCONNECTED , +\NLW_blk00000003/blk00000104_ACOUT<1>_UNCONNECTED , \NLW_blk00000003/blk00000104_ACOUT<0>_UNCONNECTED }), + .OPMODE({\blk00000003/sig00000049 , \blk00000003/sig000000ae , \blk00000003/sig000000ae , \blk00000003/sig00000049 , \blk00000003/sig000000ae , +\blk00000003/sig00000049 , \blk00000003/sig000000ae }), + .PCIN({\blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , +\blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , +\blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , +\blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , +\blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , +\blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , +\blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , +\blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , +\blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , +\blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 }), + .ALUMODE({\blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 }), + .C({\blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , +\blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , +\blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , +\blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , +\blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , +\blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , +\blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , +\blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , +\blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , +\blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 }), + .CARRYOUT({\NLW_blk00000003/blk00000104_CARRYOUT<3>_UNCONNECTED , \NLW_blk00000003/blk00000104_CARRYOUT<2>_UNCONNECTED , +\NLW_blk00000003/blk00000104_CARRYOUT<1>_UNCONNECTED , \NLW_blk00000003/blk00000104_CARRYOUT<0>_UNCONNECTED }), + .INMODE({\blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig000000ae , \blk00000003/sig00000049 , \blk00000003/sig00000049 }), + .BCIN({\blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , +\blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , +\blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , +\blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 }), + .B({\blk00000003/sig000002e2 , \blk00000003/sig000002e3 , \blk00000003/sig000002e4 , \blk00000003/sig000002e5 , \blk00000003/sig000002e6 , +\blk00000003/sig000002e7 , \blk00000003/sig000002e8 , \blk00000003/sig000002e9 , \blk00000003/sig000002ea , \blk00000003/sig000002eb , +\blk00000003/sig000002ec , \blk00000003/sig000002ed , \blk00000003/sig000002ee , \blk00000003/sig000002ef , \blk00000003/sig000002f0 , +\blk00000003/sig000002f1 , \blk00000003/sig000002f2 , \blk00000003/sig000002f3 }), + .BCOUT({\NLW_blk00000003/blk00000104_BCOUT<17>_UNCONNECTED , \NLW_blk00000003/blk00000104_BCOUT<16>_UNCONNECTED , +\NLW_blk00000003/blk00000104_BCOUT<15>_UNCONNECTED , \NLW_blk00000003/blk00000104_BCOUT<14>_UNCONNECTED , +\NLW_blk00000003/blk00000104_BCOUT<13>_UNCONNECTED , \NLW_blk00000003/blk00000104_BCOUT<12>_UNCONNECTED , +\NLW_blk00000003/blk00000104_BCOUT<11>_UNCONNECTED , \NLW_blk00000003/blk00000104_BCOUT<10>_UNCONNECTED , +\NLW_blk00000003/blk00000104_BCOUT<9>_UNCONNECTED , \NLW_blk00000003/blk00000104_BCOUT<8>_UNCONNECTED , +\NLW_blk00000003/blk00000104_BCOUT<7>_UNCONNECTED , \NLW_blk00000003/blk00000104_BCOUT<6>_UNCONNECTED , +\NLW_blk00000003/blk00000104_BCOUT<5>_UNCONNECTED , \NLW_blk00000003/blk00000104_BCOUT<4>_UNCONNECTED , +\NLW_blk00000003/blk00000104_BCOUT<3>_UNCONNECTED , \NLW_blk00000003/blk00000104_BCOUT<2>_UNCONNECTED , +\NLW_blk00000003/blk00000104_BCOUT<1>_UNCONNECTED , \NLW_blk00000003/blk00000104_BCOUT<0>_UNCONNECTED }), + .D({\blk00000003/sig000002f4 , \blk00000003/sig000002f4 , \blk00000003/sig000002f5 , \blk00000003/sig000002f6 , \blk00000003/sig000002f7 , +\blk00000003/sig000002f8 , \blk00000003/sig000002f9 , \blk00000003/sig000002fa , \blk00000003/sig000002fb , \blk00000003/sig000002fc , +\blk00000003/sig000002fd , \blk00000003/sig000002fe , \blk00000003/sig000002ff , \blk00000003/sig00000300 , \blk00000003/sig00000301 , +\blk00000003/sig00000302 , \blk00000003/sig00000303 , \blk00000003/sig00000304 , \blk00000003/sig00000305 , \blk00000003/sig00000306 , +\blk00000003/sig00000307 , \blk00000003/sig00000308 , \blk00000003/sig00000309 , \blk00000003/sig0000030a , \blk00000003/sig0000030b }), + .P({\NLW_blk00000003/blk00000104_P<47>_UNCONNECTED , \NLW_blk00000003/blk00000104_P<46>_UNCONNECTED , +\NLW_blk00000003/blk00000104_P<45>_UNCONNECTED , \NLW_blk00000003/blk00000104_P<44>_UNCONNECTED , \NLW_blk00000003/blk00000104_P<43>_UNCONNECTED , +\NLW_blk00000003/blk00000104_P<42>_UNCONNECTED , \NLW_blk00000003/blk00000104_P<41>_UNCONNECTED , \NLW_blk00000003/blk00000104_P<40>_UNCONNECTED , +\NLW_blk00000003/blk00000104_P<39>_UNCONNECTED , \NLW_blk00000003/blk00000104_P<38>_UNCONNECTED , \NLW_blk00000003/blk00000104_P<37>_UNCONNECTED , +\NLW_blk00000003/blk00000104_P<36>_UNCONNECTED , \NLW_blk00000003/blk00000104_P<35>_UNCONNECTED , \NLW_blk00000003/blk00000104_P<34>_UNCONNECTED , +\NLW_blk00000003/blk00000104_P<33>_UNCONNECTED , \NLW_blk00000003/blk00000104_P<32>_UNCONNECTED , \NLW_blk00000003/blk00000104_P<31>_UNCONNECTED , +\NLW_blk00000003/blk00000104_P<30>_UNCONNECTED , \NLW_blk00000003/blk00000104_P<29>_UNCONNECTED , \NLW_blk00000003/blk00000104_P<28>_UNCONNECTED , +\NLW_blk00000003/blk00000104_P<27>_UNCONNECTED , \NLW_blk00000003/blk00000104_P<26>_UNCONNECTED , \NLW_blk00000003/blk00000104_P<25>_UNCONNECTED , +\NLW_blk00000003/blk00000104_P<24>_UNCONNECTED , \NLW_blk00000003/blk00000104_P<23>_UNCONNECTED , \NLW_blk00000003/blk00000104_P<22>_UNCONNECTED , +\NLW_blk00000003/blk00000104_P<21>_UNCONNECTED , \NLW_blk00000003/blk00000104_P<20>_UNCONNECTED , \NLW_blk00000003/blk00000104_P<19>_UNCONNECTED , +\NLW_blk00000003/blk00000104_P<18>_UNCONNECTED , \NLW_blk00000003/blk00000104_P<17>_UNCONNECTED , \NLW_blk00000003/blk00000104_P<16>_UNCONNECTED , +\NLW_blk00000003/blk00000104_P<15>_UNCONNECTED , \NLW_blk00000003/blk00000104_P<14>_UNCONNECTED , \NLW_blk00000003/blk00000104_P<13>_UNCONNECTED , +\NLW_blk00000003/blk00000104_P<12>_UNCONNECTED , \NLW_blk00000003/blk00000104_P<11>_UNCONNECTED , \NLW_blk00000003/blk00000104_P<10>_UNCONNECTED , +\NLW_blk00000003/blk00000104_P<9>_UNCONNECTED , \NLW_blk00000003/blk00000104_P<8>_UNCONNECTED , \NLW_blk00000003/blk00000104_P<7>_UNCONNECTED , +\NLW_blk00000003/blk00000104_P<6>_UNCONNECTED , \NLW_blk00000003/blk00000104_P<5>_UNCONNECTED , \NLW_blk00000003/blk00000104_P<4>_UNCONNECTED , +\NLW_blk00000003/blk00000104_P<3>_UNCONNECTED , \NLW_blk00000003/blk00000104_P<2>_UNCONNECTED , \NLW_blk00000003/blk00000104_P<1>_UNCONNECTED , +\NLW_blk00000003/blk00000104_P<0>_UNCONNECTED }), + .A({\blk00000003/sig0000030c , \blk00000003/sig0000030c , \blk00000003/sig0000030c , \blk00000003/sig0000030c , \blk00000003/sig0000030c , +\blk00000003/sig0000030c , \blk00000003/sig0000030c , \blk00000003/sig0000030d , \blk00000003/sig0000030e , \blk00000003/sig0000030f , +\blk00000003/sig00000310 , \blk00000003/sig00000311 , \blk00000003/sig00000312 , \blk00000003/sig00000313 , \blk00000003/sig00000314 , +\blk00000003/sig00000315 , \blk00000003/sig00000316 , \blk00000003/sig00000317 , \blk00000003/sig00000318 , \blk00000003/sig00000319 , +\blk00000003/sig0000031a , \blk00000003/sig0000031b , \blk00000003/sig0000031c , \blk00000003/sig0000031d , \blk00000003/sig0000031e , +\blk00000003/sig0000031f , \blk00000003/sig00000320 , \blk00000003/sig00000321 , \blk00000003/sig00000322 , \blk00000003/sig00000323 }), + .PCOUT({\blk00000003/sig00000324 , \blk00000003/sig00000325 , \blk00000003/sig00000326 , \blk00000003/sig00000327 , \blk00000003/sig00000328 , +\blk00000003/sig00000329 , \blk00000003/sig0000032a , \blk00000003/sig0000032b , \blk00000003/sig0000032c , \blk00000003/sig0000032d , +\blk00000003/sig0000032e , \blk00000003/sig0000032f , \blk00000003/sig00000330 , \blk00000003/sig00000331 , \blk00000003/sig00000332 , +\blk00000003/sig00000333 , \blk00000003/sig00000334 , \blk00000003/sig00000335 , \blk00000003/sig00000336 , \blk00000003/sig00000337 , +\blk00000003/sig00000338 , \blk00000003/sig00000339 , \blk00000003/sig0000033a , \blk00000003/sig0000033b , \blk00000003/sig0000033c , +\blk00000003/sig0000033d , \blk00000003/sig0000033e , \blk00000003/sig0000033f , \blk00000003/sig00000340 , \blk00000003/sig00000341 , +\blk00000003/sig00000342 , \blk00000003/sig00000343 , \blk00000003/sig00000344 , \blk00000003/sig00000345 , \blk00000003/sig00000346 , +\blk00000003/sig00000347 , \blk00000003/sig00000348 , \blk00000003/sig00000349 , \blk00000003/sig0000034a , \blk00000003/sig0000034b , +\blk00000003/sig0000034c , \blk00000003/sig0000034d , \blk00000003/sig0000034e , \blk00000003/sig0000034f , \blk00000003/sig00000350 , +\blk00000003/sig00000351 , \blk00000003/sig00000352 , \blk00000003/sig00000353 }), + .ACIN({\blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , +\blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , +\blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , +\blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , +\blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , +\blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 }), + .CARRYINSEL({\blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 }) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000103 ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig000001ce ), + .R(\blk00000003/sig00000049 ), + .Q(\blk00000003/sig000002e1 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000102 ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig000002df ), + .Q(\blk00000003/sig000002e0 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000101 ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig000002de ), + .Q(\blk00000003/sig000002d2 ) + ); + XORCY \blk00000003/blk00000100 ( + .CI(\blk00000003/sig000002d9 ), + .LI(\blk00000003/sig000002db ), + .O(\blk00000003/sig000002dd ) + ); + XORCY \blk00000003/blk000000ff ( + .CI(\blk00000003/sig000002d5 ), + .LI(\blk00000003/sig000002d8 ), + .O(\blk00000003/sig000002dc ) + ); + MUXCY_D \blk00000003/blk000000fe ( + .CI(\blk00000003/sig000002d9 ), + .DI(\blk00000003/sig000002da ), + .S(\blk00000003/sig000002db ), + .O(\NLW_blk00000003/blk000000fe_O_UNCONNECTED ), + .LO(\NLW_blk00000003/blk000000fe_LO_UNCONNECTED ) + ); + MUXCY_L \blk00000003/blk000000fd ( + .CI(\blk00000003/sig000002d5 ), + .DI(\blk00000003/sig000002d7 ), + .S(\blk00000003/sig000002d8 ), + .LO(\blk00000003/sig000002d9 ) + ); + XORCY \blk00000003/blk000000fc ( + .CI(\blk00000003/sig000002d2 ), + .LI(\blk00000003/sig000002d4 ), + .O(\blk00000003/sig000002d6 ) + ); + MUXCY_L \blk00000003/blk000000fb ( + .CI(\blk00000003/sig000002d2 ), + .DI(\blk00000003/sig000002d3 ), + .S(\blk00000003/sig000002d4 ), + .LO(\blk00000003/sig000002d5 ) + ); + MUXCY_L \blk00000003/blk000000fa ( + .CI(\blk00000003/sig00000049 ), + .DI(\blk00000003/sig000002d1 ), + .S(\blk00000003/sig000002c7 ), + .LO(\blk00000003/sig000002cc ) + ); + MUXCY_L \blk00000003/blk000000f9 ( + .CI(\blk00000003/sig000002cc ), + .DI(\blk00000003/sig000002d0 ), + .S(\blk00000003/sig000002cd ), + .LO(\blk00000003/sig000002c9 ) + ); + MUXCY_D \blk00000003/blk000000f8 ( + .CI(\blk00000003/sig000002c9 ), + .DI(\blk00000003/sig000002cf ), + .S(\blk00000003/sig000002ca ), + .O(\NLW_blk00000003/blk000000f8_O_UNCONNECTED ), + .LO(\NLW_blk00000003/blk000000f8_LO_UNCONNECTED ) + ); + XORCY \blk00000003/blk000000f7 ( + .CI(\blk00000003/sig000002cc ), + .LI(\blk00000003/sig000002cd ), + .O(\blk00000003/sig000002ce ) + ); + XORCY \blk00000003/blk000000f6 ( + .CI(\blk00000003/sig000002c9 ), + .LI(\blk00000003/sig000002ca ), + .O(\blk00000003/sig000002cb ) + ); + XORCY \blk00000003/blk000000f5 ( + .CI(\blk00000003/sig00000049 ), + .LI(\blk00000003/sig000002c7 ), + .O(\blk00000003/sig000002c8 ) + ); + MUXCY_L \blk00000003/blk000000f4 ( + .CI(\blk00000003/sig000002ba ), + .DI(\blk00000003/sig000002c6 ), + .S(\blk00000003/sig000002bb ), + .LO(\blk00000003/sig000002c0 ) + ); + MUXCY_L \blk00000003/blk000000f3 ( + .CI(\blk00000003/sig000002c0 ), + .DI(\blk00000003/sig000002c5 ), + .S(\blk00000003/sig000002c1 ), + .LO(\blk00000003/sig000002bd ) + ); + MUXCY_D \blk00000003/blk000000f2 ( + .CI(\blk00000003/sig000002bd ), + .DI(\blk00000003/sig000002c4 ), + .S(\blk00000003/sig000002be ), + .O(\NLW_blk00000003/blk000000f2_O_UNCONNECTED ), + .LO(\NLW_blk00000003/blk000000f2_LO_UNCONNECTED ) + ); + MUXCY \blk00000003/blk000000f1 ( + .CI(\blk00000003/sig00000049 ), + .DI(\blk00000003/sig000000ae ), + .S(\blk00000003/sig000002c3 ), + .O(\blk00000003/sig000002ba ) + ); + XORCY \blk00000003/blk000000f0 ( + .CI(\blk00000003/sig000002c0 ), + .LI(\blk00000003/sig000002c1 ), + .O(\blk00000003/sig000002c2 ) + ); + XORCY \blk00000003/blk000000ef ( + .CI(\blk00000003/sig000002bd ), + .LI(\blk00000003/sig000002be ), + .O(\blk00000003/sig000002bf ) + ); + XORCY \blk00000003/blk000000ee ( + .CI(\blk00000003/sig000002ba ), + .LI(\blk00000003/sig000002bb ), + .O(\blk00000003/sig000002bc ) + ); + FDE \blk00000003/blk000000ed ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig000002b8 ), + .Q(\blk00000003/sig000002b9 ) + ); + MUXCY_L \blk00000003/blk000000ec ( + .CI(\blk00000003/sig00000049 ), + .DI(\blk00000003/sig000002b7 ), + .S(\blk00000003/sig000002b1 ), + .LO(\blk00000003/sig000002b3 ) + ); + MUXCY_D \blk00000003/blk000000eb ( + .CI(\blk00000003/sig000002b3 ), + .DI(\blk00000003/sig000002b6 ), + .S(\blk00000003/sig000002b4 ), + .O(\NLW_blk00000003/blk000000eb_O_UNCONNECTED ), + .LO(\NLW_blk00000003/blk000000eb_LO_UNCONNECTED ) + ); + XORCY \blk00000003/blk000000ea ( + .CI(\blk00000003/sig000002b3 ), + .LI(\blk00000003/sig000002b4 ), + .O(\blk00000003/sig000002b5 ) + ); + XORCY \blk00000003/blk000000e9 ( + .CI(\blk00000003/sig00000049 ), + .LI(\blk00000003/sig000002b1 ), + .O(\blk00000003/sig000002b2 ) + ); + MUXCY_L \blk00000003/blk000000e8 ( + .CI(\blk00000003/sig000002aa ), + .DI(\blk00000003/sig000001e9 ), + .S(\blk00000003/sig000002ab ), + .LO(\blk00000003/sig000002ad ) + ); + MUXCY_D \blk00000003/blk000000e7 ( + .CI(\blk00000003/sig000002ad ), + .DI(\blk00000003/sig000001e8 ), + .S(\blk00000003/sig000002ae ), + .O(\NLW_blk00000003/blk000000e7_O_UNCONNECTED ), + .LO(\NLW_blk00000003/blk000000e7_LO_UNCONNECTED ) + ); + MUXCY \blk00000003/blk000000e6 ( + .CI(\blk00000003/sig00000049 ), + .DI(\blk00000003/sig000000ae ), + .S(\blk00000003/sig000002b0 ), + .O(\blk00000003/sig000002aa ) + ); + XORCY \blk00000003/blk000000e5 ( + .CI(\blk00000003/sig000002ad ), + .LI(\blk00000003/sig000002ae ), + .O(\blk00000003/sig000002af ) + ); + XORCY \blk00000003/blk000000e4 ( + .CI(\blk00000003/sig000002aa ), + .LI(\blk00000003/sig000002ab ), + .O(\blk00000003/sig000002ac ) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk000000e3 ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig000002a8 ), + .R(sclr), + .Q(\blk00000003/sig000002a9 ) + ); + MUXCY_D \blk00000003/blk000000e2 ( + .CI(\blk00000003/sig000002a5 ), + .DI(\blk00000003/sig00000049 ), + .S(\blk00000003/sig000002a7 ), + .O(\NLW_blk00000003/blk000000e2_O_UNCONNECTED ), + .LO(\blk00000003/sig000002a8 ) + ); + MUXCY_D \blk00000003/blk000000e1 ( + .CI(\blk00000003/sig000000ae ), + .DI(\blk00000003/sig00000049 ), + .S(\blk00000003/sig000002a6 ), + .O(\blk00000003/sig000002a3 ), + .LO(\NLW_blk00000003/blk000000e1_LO_UNCONNECTED ) + ); + MUXCY_D \blk00000003/blk000000e0 ( + .CI(\blk00000003/sig000002a3 ), + .DI(\blk00000003/sig000002a2 ), + .S(\blk00000003/sig000002a4 ), + .O(\blk00000003/sig000002a5 ), + .LO(\blk00000003/sig000002a1 ) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk000000df ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig000002a1 ), + .R(sclr), + .Q(\blk00000003/sig000002a2 ) + ); + MUXCY_L \blk00000003/blk000000de ( + .CI(\blk00000003/sig00000049 ), + .DI(\blk00000003/sig000002a0 ), + .S(\blk00000003/sig0000029a ), + .LO(\blk00000003/sig0000029c ) + ); + MUXCY_D \blk00000003/blk000000dd ( + .CI(\blk00000003/sig0000029c ), + .DI(\blk00000003/sig0000029f ), + .S(\blk00000003/sig0000029d ), + .O(\NLW_blk00000003/blk000000dd_O_UNCONNECTED ), + .LO(\NLW_blk00000003/blk000000dd_LO_UNCONNECTED ) + ); + XORCY \blk00000003/blk000000dc ( + .CI(\blk00000003/sig0000029c ), + .LI(\blk00000003/sig0000029d ), + .O(\blk00000003/sig0000029e ) + ); + XORCY \blk00000003/blk000000db ( + .CI(\blk00000003/sig00000049 ), + .LI(\blk00000003/sig0000029a ), + .O(\blk00000003/sig0000029b ) + ); + FDSE #( + .INIT ( 1'b1 )) + \blk00000003/blk000000da ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig0000028b ), + .S(\blk00000003/sig00000049 ), + .Q(\blk00000003/sig00000221 ) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk000000d9 ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig0000028a ), + .R(\blk00000003/sig00000049 ), + .Q(\blk00000003/sig0000021e ) + ); + MUXCY_D \blk00000003/blk000000d8 ( + .CI(\blk00000003/sig0000021e ), + .DI(\blk00000003/sig00000298 ), + .S(\blk00000003/sig00000299 ), + .O(\blk00000003/sig00000295 ), + .LO(\NLW_blk00000003/blk000000d8_LO_UNCONNECTED ) + ); + MUXCY_D \blk00000003/blk000000d7 ( + .CI(\blk00000003/sig00000295 ), + .DI(\blk00000003/sig00000296 ), + .S(\blk00000003/sig00000297 ), + .O(\blk00000003/sig00000293 ), + .LO(\NLW_blk00000003/blk000000d7_LO_UNCONNECTED ) + ); + MUXCY_D \blk00000003/blk000000d6 ( + .CI(\blk00000003/sig00000293 ), + .DI(\blk00000003/sig00000289 ), + .S(\blk00000003/sig00000294 ), + .O(\blk00000003/sig00000290 ), + .LO(\NLW_blk00000003/blk000000d6_LO_UNCONNECTED ) + ); + MUXCY_D \blk00000003/blk000000d5 ( + .CI(\blk00000003/sig00000290 ), + .DI(\blk00000003/sig00000291 ), + .S(\blk00000003/sig00000292 ), + .O(\blk00000003/sig0000028e ), + .LO(\NLW_blk00000003/blk000000d5_LO_UNCONNECTED ) + ); + MUXCY_D \blk00000003/blk000000d4 ( + .CI(\blk00000003/sig0000028e ), + .DI(\blk00000003/sig00000246 ), + .S(\blk00000003/sig0000028f ), + .O(\blk00000003/sig0000028c ), + .LO(\NLW_blk00000003/blk000000d4_LO_UNCONNECTED ) + ); + MUXCY_D \blk00000003/blk000000d3 ( + .CI(\blk00000003/sig0000028c ), + .DI(\blk00000003/sig0000021b ), + .S(\blk00000003/sig0000028d ), + .O(\NLW_blk00000003/blk000000d3_O_UNCONNECTED ), + .LO(\blk00000003/sig0000028a ) + ); + XORCY \blk00000003/blk000000d2 ( + .CI(\blk00000003/sig0000028a ), + .LI(\blk00000003/sig000000ae ), + .O(\blk00000003/sig0000028b ) + ); + FDSE #( + .INIT ( 1'b1 )) + \blk00000003/blk000000d1 ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig00000279 ), + .S(\blk00000003/sig00000049 ), + .Q(\blk00000003/sig00000289 ) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk000000d0 ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig00000278 ), + .R(\blk00000003/sig00000049 ), + .Q(\blk00000003/sig000001ce ) + ); + MUXCY_D \blk00000003/blk000000cf ( + .CI(\blk00000003/sig000001ce ), + .DI(\blk00000003/sig00000287 ), + .S(\blk00000003/sig00000288 ), + .O(\blk00000003/sig00000285 ), + .LO(\NLW_blk00000003/blk000000cf_LO_UNCONNECTED ) + ); + MUXCY_D \blk00000003/blk000000ce ( + .CI(\blk00000003/sig00000285 ), + .DI(\blk00000003/sig000001cf ), + .S(\blk00000003/sig00000286 ), + .O(\blk00000003/sig00000283 ), + .LO(\NLW_blk00000003/blk000000ce_LO_UNCONNECTED ) + ); + MUXCY_D \blk00000003/blk000000cd ( + .CI(\blk00000003/sig00000283 ), + .DI(\blk00000003/sig000001ce ), + .S(\blk00000003/sig00000284 ), + .O(\blk00000003/sig00000280 ), + .LO(\NLW_blk00000003/blk000000cd_LO_UNCONNECTED ) + ); + MUXCY_D \blk00000003/blk000000cc ( + .CI(\blk00000003/sig00000280 ), + .DI(\blk00000003/sig00000281 ), + .S(\blk00000003/sig00000282 ), + .O(\blk00000003/sig0000027e ), + .LO(\NLW_blk00000003/blk000000cc_LO_UNCONNECTED ) + ); + MUXCY_D \blk00000003/blk000000cb ( + .CI(\blk00000003/sig0000027e ), + .DI(\blk00000003/sig00000221 ), + .S(\blk00000003/sig0000027f ), + .O(\blk00000003/sig0000027a ), + .LO(\NLW_blk00000003/blk000000cb_LO_UNCONNECTED ) + ); + MUXCY_D \blk00000003/blk000000ca ( + .CI(\blk00000003/sig0000027c ), + .DI(\blk00000003/sig00000221 ), + .S(\blk00000003/sig0000027d ), + .O(\NLW_blk00000003/blk000000ca_O_UNCONNECTED ), + .LO(\blk00000003/sig00000278 ) + ); + MUXCY_D \blk00000003/blk000000c9 ( + .CI(\blk00000003/sig0000027a ), + .DI(\blk00000003/sig0000023b ), + .S(\blk00000003/sig0000027b ), + .O(\blk00000003/sig0000027c ), + .LO(\NLW_blk00000003/blk000000c9_LO_UNCONNECTED ) + ); + XORCY \blk00000003/blk000000c8 ( + .CI(\blk00000003/sig00000278 ), + .LI(\blk00000003/sig000000ae ), + .O(\blk00000003/sig00000279 ) + ); + FDE \blk00000003/blk000000c7 ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig00000276 ), + .Q(\blk00000003/sig00000277 ) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk000000c6 ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig0000021e ), + .R(\blk00000003/sig00000049 ), + .Q(\blk00000003/sig00000275 ) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk000000c5 ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig0000024c ), + .R(\blk00000003/sig00000049 ), + .Q(\blk00000003/sig00000269 ) + ); + XORCY \blk00000003/blk000000c4 ( + .CI(\blk00000003/sig00000270 ), + .LI(\blk00000003/sig00000272 ), + .O(\blk00000003/sig00000274 ) + ); + XORCY \blk00000003/blk000000c3 ( + .CI(\blk00000003/sig0000026c ), + .LI(\blk00000003/sig0000026f ), + .O(\blk00000003/sig00000273 ) + ); + MUXCY_D \blk00000003/blk000000c2 ( + .CI(\blk00000003/sig00000270 ), + .DI(\blk00000003/sig00000271 ), + .S(\blk00000003/sig00000272 ), + .O(\NLW_blk00000003/blk000000c2_O_UNCONNECTED ), + .LO(\NLW_blk00000003/blk000000c2_LO_UNCONNECTED ) + ); + MUXCY_L \blk00000003/blk000000c1 ( + .CI(\blk00000003/sig0000026c ), + .DI(\blk00000003/sig0000026e ), + .S(\blk00000003/sig0000026f ), + .LO(\blk00000003/sig00000270 ) + ); + XORCY \blk00000003/blk000000c0 ( + .CI(\blk00000003/sig00000269 ), + .LI(\blk00000003/sig0000026b ), + .O(\blk00000003/sig0000026d ) + ); + MUXCY_L \blk00000003/blk000000bf ( + .CI(\blk00000003/sig00000269 ), + .DI(\blk00000003/sig0000026a ), + .S(\blk00000003/sig0000026b ), + .LO(\blk00000003/sig0000026c ) + ); + MUXCY \blk00000003/blk000000be ( + .CI(\blk00000003/sig00000049 ), + .DI(\blk00000003/sig000000ae ), + .S(\blk00000003/sig00000268 ), + .O(\blk00000003/sig00000264 ) + ); + MUXCY_D \blk00000003/blk000000bd ( + .CI(\blk00000003/sig00000264 ), + .DI(\blk00000003/sig00000267 ), + .S(\blk00000003/sig00000265 ), + .O(\NLW_blk00000003/blk000000bd_O_UNCONNECTED ), + .LO(\NLW_blk00000003/blk000000bd_LO_UNCONNECTED ) + ); + XORCY \blk00000003/blk000000bc ( + .CI(\blk00000003/sig00000264 ), + .LI(\blk00000003/sig00000265 ), + .O(\blk00000003/sig00000266 ) + ); + MUXCY_L \blk00000003/blk000000bb ( + .CI(\blk00000003/sig00000049 ), + .DI(\blk00000003/sig00000263 ), + .S(\blk00000003/sig00000261 ), + .LO(\blk00000003/sig0000025c ) + ); + XORCY \blk00000003/blk000000ba ( + .CI(\blk00000003/sig00000049 ), + .LI(\blk00000003/sig00000261 ), + .O(\blk00000003/sig00000262 ) + ); + MUXCY_L \blk00000003/blk000000b9 ( + .CI(\blk00000003/sig0000025c ), + .DI(\blk00000003/sig00000260 ), + .S(\blk00000003/sig0000025d ), + .LO(\blk00000003/sig00000259 ) + ); + MUXCY_D \blk00000003/blk000000b8 ( + .CI(\blk00000003/sig00000259 ), + .DI(\blk00000003/sig0000025f ), + .S(\blk00000003/sig0000025a ), + .O(\NLW_blk00000003/blk000000b8_O_UNCONNECTED ), + .LO(\NLW_blk00000003/blk000000b8_LO_UNCONNECTED ) + ); + XORCY \blk00000003/blk000000b7 ( + .CI(\blk00000003/sig0000025c ), + .LI(\blk00000003/sig0000025d ), + .O(\blk00000003/sig0000025e ) + ); + XORCY \blk00000003/blk000000b6 ( + .CI(\blk00000003/sig00000259 ), + .LI(\blk00000003/sig0000025a ), + .O(\blk00000003/sig0000025b ) + ); + MUXCY_L \blk00000003/blk000000b5 ( + .CI(\blk00000003/sig00000049 ), + .DI(\blk00000003/sig00000258 ), + .S(\blk00000003/sig00000256 ), + .LO(\blk00000003/sig00000251 ) + ); + XORCY \blk00000003/blk000000b4 ( + .CI(\blk00000003/sig00000049 ), + .LI(\blk00000003/sig00000256 ), + .O(\blk00000003/sig00000257 ) + ); + MUXCY_L \blk00000003/blk000000b3 ( + .CI(\blk00000003/sig00000251 ), + .DI(\blk00000003/sig00000255 ), + .S(\blk00000003/sig00000252 ), + .LO(\blk00000003/sig0000024e ) + ); + MUXCY_D \blk00000003/blk000000b2 ( + .CI(\blk00000003/sig0000024e ), + .DI(\blk00000003/sig00000254 ), + .S(\blk00000003/sig0000024f ), + .O(\NLW_blk00000003/blk000000b2_O_UNCONNECTED ), + .LO(\NLW_blk00000003/blk000000b2_LO_UNCONNECTED ) + ); + XORCY \blk00000003/blk000000b1 ( + .CI(\blk00000003/sig00000251 ), + .LI(\blk00000003/sig00000252 ), + .O(\blk00000003/sig00000253 ) + ); + XORCY \blk00000003/blk000000b0 ( + .CI(\blk00000003/sig0000024e ), + .LI(\blk00000003/sig0000024f ), + .O(\blk00000003/sig00000250 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000000af ( + .C(clk), + .CE(ce), + .D(coef_ld), + .Q(\blk00000003/sig0000024d ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000000ae ( + .C(clk), + .CE(ce), + .D(coef_we), + .Q(\blk00000003/sig0000024c ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000000ad ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig000001e2 ), + .Q(\blk00000003/sig00000240 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000000ac ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig0000024b ), + .Q(\blk00000003/sig00000233 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000000ab ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig00000249 ), + .Q(\blk00000003/sig0000024a ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000000aa ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig00000248 ), + .Q(\blk00000003/sig00000231 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000000a9 ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig00000247 ), + .Q(\blk00000003/sig0000023e ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000000a8 ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig00000245 ), + .Q(\blk00000003/sig00000246 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000000a7 ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig00000243 ), + .Q(\blk00000003/sig00000244 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000000a6 ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig00000241 ), + .Q(\blk00000003/sig00000242 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000000a5 ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig00000240 ), + .Q(\blk00000003/sig0000023c ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000000a4 ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig0000023e ), + .Q(\blk00000003/sig0000023f ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000000a3 ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig0000023c ), + .Q(\blk00000003/sig0000023d ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000000a2 ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig0000021d ), + .Q(\blk00000003/sig0000023b ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000000a1 ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig00000236 ), + .Q(\blk00000003/sig0000023a ) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk000000a0 ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig00000230 ), + .R(coef_ld), + .Q(\NLW_blk00000003/blk000000a0_Q_UNCONNECTED ) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk0000009f ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig0000022d ), + .R(coef_ld), + .Q(\blk00000003/sig0000022c ) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk0000009e ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig0000022a ), + .R(coef_ld), + .Q(\NLW_blk00000003/blk0000009e_Q_UNCONNECTED ) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk0000009d ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig00000226 ), + .R(coef_ld), + .Q(\blk00000003/sig00000224 ) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk0000009c ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig0000021e ), + .R(\blk00000003/sig00000049 ), + .Q(\blk00000003/sig00000239 ) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk0000009b ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig00000237 ), + .R(\blk00000003/sig00000049 ), + .Q(\blk00000003/sig00000238 ) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk0000009a ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig00000235 ), + .R(\blk00000003/sig00000049 ), + .Q(\blk00000003/sig00000236 ) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000099 ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig00000233 ), + .R(\blk00000003/sig00000049 ), + .Q(\blk00000003/sig00000234 ) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000098 ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig00000231 ), + .R(\blk00000003/sig00000049 ), + .Q(\blk00000003/sig00000232 ) + ); + MUXCY_D \blk00000003/blk00000097 ( + .CI(coef_we), + .DI(\blk00000003/sig00000049 ), + .S(\blk00000003/sig0000022f ), + .O(\blk00000003/sig00000228 ), + .LO(\blk00000003/sig00000230 ) + ); + MUXCY_D \blk00000003/blk00000096 ( + .CI(\blk00000003/sig000000ae ), + .DI(\blk00000003/sig00000049 ), + .S(\blk00000003/sig0000022e ), + .O(\blk00000003/sig0000022b ), + .LO(\NLW_blk00000003/blk00000096_LO_UNCONNECTED ) + ); + MUXCY_D \blk00000003/blk00000095 ( + .CI(\blk00000003/sig0000022b ), + .DI(\blk00000003/sig0000022c ), + .S(coef_we), + .O(\NLW_blk00000003/blk00000095_O_UNCONNECTED ), + .LO(\blk00000003/sig0000022d ) + ); + MUXCY_D \blk00000003/blk00000094 ( + .CI(\blk00000003/sig00000228 ), + .DI(\blk00000003/sig00000049 ), + .S(\blk00000003/sig00000229 ), + .O(\NLW_blk00000003/blk00000094_O_UNCONNECTED ), + .LO(\blk00000003/sig0000022a ) + ); + MUXCY_D \blk00000003/blk00000093 ( + .CI(\blk00000003/sig000000ae ), + .DI(\blk00000003/sig00000049 ), + .S(\blk00000003/sig00000227 ), + .O(\blk00000003/sig00000223 ), + .LO(\NLW_blk00000003/blk00000093_LO_UNCONNECTED ) + ); + MUXCY_D \blk00000003/blk00000092 ( + .CI(\blk00000003/sig00000223 ), + .DI(\blk00000003/sig00000224 ), + .S(\blk00000003/sig00000225 ), + .O(\NLW_blk00000003/blk00000092_O_UNCONNECTED ), + .LO(\blk00000003/sig00000226 ) + ); + XORCY \blk00000003/blk00000091 ( + .CI(\blk00000003/sig0000021c ), + .LI(\blk00000003/sig000000ae ), + .O(\blk00000003/sig0000021a ) + ); + MUXCY_D \blk00000003/blk00000090 ( + .CI(\blk00000003/sig00000220 ), + .DI(\blk00000003/sig00000221 ), + .S(\blk00000003/sig00000222 ), + .O(\NLW_blk00000003/blk00000090_O_UNCONNECTED ), + .LO(\blk00000003/sig0000021c ) + ); + MUXCY_D \blk00000003/blk0000008f ( + .CI(\blk00000003/sig0000021d ), + .DI(\blk00000003/sig0000021e ), + .S(\blk00000003/sig0000021f ), + .O(\blk00000003/sig00000220 ), + .LO(\NLW_blk00000003/blk0000008f_LO_UNCONNECTED ) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk0000008e ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig0000021c ), + .R(\blk00000003/sig00000049 ), + .Q(\blk00000003/sig0000021d ) + ); + FDSE #( + .INIT ( 1'b1 )) + \blk00000003/blk0000008d ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig0000021a ), + .S(\blk00000003/sig00000049 ), + .Q(\blk00000003/sig0000021b ) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000029 ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig000001e7 ), + .R(sclr), + .Q(\blk00000003/sig000001e6 ) + ); + FDR #( + .INIT ( 1'b1 )) + \blk00000003/blk00000028 ( + .C(clk), + .D(\blk00000003/sig000000b6 ), + .R(sclr), + .Q(\blk00000003/sig000000b6 ) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000027 ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig000001e6 ), + .R(sclr), + .Q(\blk00000003/sig000001e3 ) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000026 ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig000001e5 ), + .R(\blk00000003/sig000001e0 ), + .Q(data_valid) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000025 ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig000001e3 ), + .R(sclr), + .Q(\blk00000003/sig000001e4 ) + ); + FDRE \blk00000003/blk00000024 ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig000001e1 ), + .R(sclr), + .Q(\blk00000003/sig000001e2 ) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000023 ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig000001df ), + .R(\blk00000003/sig000001e0 ), + .Q(rdy) + ); + FDSE \blk00000003/blk00000022 ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig000001dd ), + .S(sclr), + .Q(\blk00000003/sig000001de ) + ); + FDRE \blk00000003/blk00000021 ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig000001db ), + .R(sclr), + .Q(\blk00000003/sig000001dc ) + ); + FDSE #( + .INIT ( 1'b1 )) + \blk00000003/blk00000020 ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig000001cc ), + .S(sclr), + .Q(NlwRenamedSig_OI_rfd) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk0000001f ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig000001ca ), + .R(sclr), + .Q(\blk00000003/sig000001da ) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk0000001e ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig000001d9 ), + .R(sclr), + .Q(\blk00000003/sig000001c7 ) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk0000001d ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig000001c6 ), + .R(sclr), + .Q(\blk00000003/sig000001d8 ) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk0000001c ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig000001d7 ), + .R(sclr), + .Q(\blk00000003/sig000001c4 ) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk0000001b ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig000001d5 ), + .R(sclr), + .Q(\blk00000003/sig000001d6 ) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk0000001a ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig000001d3 ), + .R(sclr), + .Q(\blk00000003/sig000001d4 ) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000019 ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig000001d1 ), + .R(sclr), + .Q(\NLW_blk00000003/blk00000019_Q_UNCONNECTED ) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000018 ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig000001d1 ), + .R(sclr), + .Q(\blk00000003/sig000001d2 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000017 ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig000001cf ), + .Q(\blk00000003/sig000001d0 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000016 ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig000001ce ), + .Q(\blk00000003/sig000001cf ) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000015 ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig000000c0 ), + .R(sclr), + .Q(\blk00000003/sig000000be ) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000014 ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig000000bb ), + .R(sclr), + .Q(\NLW_blk00000003/blk00000014_Q_UNCONNECTED ) + ); + FDSE #( + .INIT ( 1'b1 )) + \blk00000003/blk00000013 ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig000000bc ), + .S(sclr), + .Q(\blk00000003/sig000001cd ) + ); + MUXCY \blk00000003/blk00000012 ( + .CI(\blk00000003/sig000001c9 ), + .DI(\blk00000003/sig000000ae ), + .S(\blk00000003/sig000001cb ), + .O(\blk00000003/sig000001cc ) + ); + MUXCY_D \blk00000003/blk00000011 ( + .CI(\blk00000003/sig000001c7 ), + .DI(\blk00000003/sig00000049 ), + .S(\blk00000003/sig000001c8 ), + .O(\blk00000003/sig000001c9 ), + .LO(\blk00000003/sig000001ca ) + ); + MUXCY_D \blk00000003/blk00000010 ( + .CI(\blk00000003/sig000001c4 ), + .DI(\blk00000003/sig00000049 ), + .S(\blk00000003/sig000001c5 ), + .O(\NLW_blk00000003/blk00000010_O_UNCONNECTED ), + .LO(\blk00000003/sig000001c6 ) + ); + DSP48E1 #( + .ACASCREG ( 2 ), + .ADREG ( 0 ), + .ALUMODEREG ( 1 ), + .AREG ( 2 ), + .AUTORESET_PATDET ( "NO_RESET" ), + .A_INPUT ( "DIRECT" ), + .BCASCREG ( 2 ), + .BREG ( 2 ), + .B_INPUT ( "DIRECT" ), + .CARRYINREG ( 1 ), + .CARRYINSELREG ( 1 ), + .CREG ( 1 ), + .DREG ( 0 ), + .INMODEREG ( 0 ), + .MASK ( 48'hFFFFFFFFFFFE ), + .MREG ( 1 ), + .OPMODEREG ( 1 ), + .PATTERN ( 48'h000000000000 ), + .PREG ( 1 ), + .SEL_MASK ( "MASK" ), + .SEL_PATTERN ( "PATTERN" ), + .USE_DPORT ( "FALSE" ), + .USE_MULT ( "MULTIPLY" ), + .USE_PATTERN_DETECT ( "NO_PATDET" ), + .USE_SIMD ( "ONE48" )) + \blk00000003/blk0000000f ( + .PATTERNBDETECT(\NLW_blk00000003/blk0000000f_PATTERNBDETECT_UNCONNECTED ), + .RSTC(\blk00000003/sig00000049 ), + .CEB1(ce), + .CEAD(\blk00000003/sig00000049 ), + .MULTSIGNOUT(\NLW_blk00000003/blk0000000f_MULTSIGNOUT_UNCONNECTED ), + .CEC(ce), + .RSTM(\blk00000003/sig00000049 ), + .MULTSIGNIN(\blk00000003/sig00000049 ), + .CEB2(ce), + .RSTCTRL(\blk00000003/sig00000049 ), + .CEP(ce), + .CARRYCASCOUT(\NLW_blk00000003/blk0000000f_CARRYCASCOUT_UNCONNECTED ), + .RSTA(\blk00000003/sig00000049 ), + .CECARRYIN(ce), + .UNDERFLOW(\NLW_blk00000003/blk0000000f_UNDERFLOW_UNCONNECTED ), + .PATTERNDETECT(\NLW_blk00000003/blk0000000f_PATTERNDETECT_UNCONNECTED ), + .RSTALUMODE(\blk00000003/sig00000049 ), + .RSTALLCARRYIN(\blk00000003/sig00000049 ), + .CED(\blk00000003/sig00000049 ), + .RSTD(\blk00000003/sig00000049 ), + .CEALUMODE(ce), + .CEA2(ce), + .CLK(clk), + .CEA1(ce), + .RSTB(\blk00000003/sig00000049 ), + .OVERFLOW(\NLW_blk00000003/blk0000000f_OVERFLOW_UNCONNECTED ), + .CECTRL(ce), + .CEM(ce), + .CARRYIN(\blk00000003/sig00000049 ), + .CARRYCASCIN(\blk00000003/sig00000049 ), + .RSTINMODE(\blk00000003/sig00000049 ), + .CEINMODE(ce), + .RSTP(\blk00000003/sig00000049 ), + .ACOUT({\NLW_blk00000003/blk0000000f_ACOUT<29>_UNCONNECTED , \NLW_blk00000003/blk0000000f_ACOUT<28>_UNCONNECTED , +\NLW_blk00000003/blk0000000f_ACOUT<27>_UNCONNECTED , \NLW_blk00000003/blk0000000f_ACOUT<26>_UNCONNECTED , +\NLW_blk00000003/blk0000000f_ACOUT<25>_UNCONNECTED , \NLW_blk00000003/blk0000000f_ACOUT<24>_UNCONNECTED , +\NLW_blk00000003/blk0000000f_ACOUT<23>_UNCONNECTED , \NLW_blk00000003/blk0000000f_ACOUT<22>_UNCONNECTED , +\NLW_blk00000003/blk0000000f_ACOUT<21>_UNCONNECTED , \NLW_blk00000003/blk0000000f_ACOUT<20>_UNCONNECTED , +\NLW_blk00000003/blk0000000f_ACOUT<19>_UNCONNECTED , \NLW_blk00000003/blk0000000f_ACOUT<18>_UNCONNECTED , +\NLW_blk00000003/blk0000000f_ACOUT<17>_UNCONNECTED , \NLW_blk00000003/blk0000000f_ACOUT<16>_UNCONNECTED , +\NLW_blk00000003/blk0000000f_ACOUT<15>_UNCONNECTED , \NLW_blk00000003/blk0000000f_ACOUT<14>_UNCONNECTED , +\NLW_blk00000003/blk0000000f_ACOUT<13>_UNCONNECTED , \NLW_blk00000003/blk0000000f_ACOUT<12>_UNCONNECTED , +\NLW_blk00000003/blk0000000f_ACOUT<11>_UNCONNECTED , \NLW_blk00000003/blk0000000f_ACOUT<10>_UNCONNECTED , +\NLW_blk00000003/blk0000000f_ACOUT<9>_UNCONNECTED , \NLW_blk00000003/blk0000000f_ACOUT<8>_UNCONNECTED , +\NLW_blk00000003/blk0000000f_ACOUT<7>_UNCONNECTED , \NLW_blk00000003/blk0000000f_ACOUT<6>_UNCONNECTED , +\NLW_blk00000003/blk0000000f_ACOUT<5>_UNCONNECTED , \NLW_blk00000003/blk0000000f_ACOUT<4>_UNCONNECTED , +\NLW_blk00000003/blk0000000f_ACOUT<3>_UNCONNECTED , \NLW_blk00000003/blk0000000f_ACOUT<2>_UNCONNECTED , +\NLW_blk00000003/blk0000000f_ACOUT<1>_UNCONNECTED , \NLW_blk00000003/blk0000000f_ACOUT<0>_UNCONNECTED }), + .OPMODE({\blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig000000b0 , \blk00000003/sig00000049 , \blk00000003/sig000000b4 , +\blk00000003/sig000000b2 , \blk00000003/sig000000b4 }), + .PCIN({\blk00000003/sig0000014c , \blk00000003/sig0000014d , \blk00000003/sig0000014e , \blk00000003/sig0000014f , \blk00000003/sig00000150 , +\blk00000003/sig00000151 , \blk00000003/sig00000152 , \blk00000003/sig00000153 , \blk00000003/sig00000154 , \blk00000003/sig00000155 , +\blk00000003/sig00000156 , \blk00000003/sig00000157 , \blk00000003/sig00000158 , \blk00000003/sig00000159 , \blk00000003/sig0000015a , +\blk00000003/sig0000015b , \blk00000003/sig0000015c , \blk00000003/sig0000015d , \blk00000003/sig0000015e , \blk00000003/sig0000015f , +\blk00000003/sig00000160 , \blk00000003/sig00000161 , \blk00000003/sig00000162 , \blk00000003/sig00000163 , \blk00000003/sig00000164 , +\blk00000003/sig00000165 , \blk00000003/sig00000166 , \blk00000003/sig00000167 , \blk00000003/sig00000168 , \blk00000003/sig00000169 , +\blk00000003/sig0000016a , \blk00000003/sig0000016b , \blk00000003/sig0000016c , \blk00000003/sig0000016d , \blk00000003/sig0000016e , +\blk00000003/sig0000016f , \blk00000003/sig00000170 , \blk00000003/sig00000171 , \blk00000003/sig00000172 , \blk00000003/sig00000173 , +\blk00000003/sig00000174 , \blk00000003/sig00000175 , \blk00000003/sig00000176 , \blk00000003/sig00000177 , \blk00000003/sig00000178 , +\blk00000003/sig00000179 , \blk00000003/sig0000017a , \blk00000003/sig0000017b }), + .ALUMODE({\blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 }), + .C({\blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , +\blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , +\blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , +\blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , +\blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , +\blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , +\blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , +\blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , +\blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , +\blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 }), + .CARRYOUT({\NLW_blk00000003/blk0000000f_CARRYOUT<3>_UNCONNECTED , \NLW_blk00000003/blk0000000f_CARRYOUT<2>_UNCONNECTED , +\NLW_blk00000003/blk0000000f_CARRYOUT<1>_UNCONNECTED , \NLW_blk00000003/blk0000000f_CARRYOUT<0>_UNCONNECTED }), + .INMODE({\blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig000000ae , \blk00000003/sig00000049 , \blk00000003/sig00000049 }), + .BCIN({\blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , +\blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , +\blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , +\blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 }), + .B({\blk00000003/sig000000f2 , \blk00000003/sig000000f3 , \blk00000003/sig000000f4 , \blk00000003/sig000000f5 , \blk00000003/sig000000f6 , +\blk00000003/sig000000f7 , \blk00000003/sig000000f8 , \blk00000003/sig000000f9 , \blk00000003/sig000000fa , \blk00000003/sig000000fb , +\blk00000003/sig000000fc , \blk00000003/sig000000fd , \blk00000003/sig000000fe , \blk00000003/sig000000ff , \blk00000003/sig00000100 , +\blk00000003/sig00000101 , \blk00000003/sig00000102 , \blk00000003/sig00000103 }), + .BCOUT({\NLW_blk00000003/blk0000000f_BCOUT<17>_UNCONNECTED , \NLW_blk00000003/blk0000000f_BCOUT<16>_UNCONNECTED , +\NLW_blk00000003/blk0000000f_BCOUT<15>_UNCONNECTED , \NLW_blk00000003/blk0000000f_BCOUT<14>_UNCONNECTED , +\NLW_blk00000003/blk0000000f_BCOUT<13>_UNCONNECTED , \NLW_blk00000003/blk0000000f_BCOUT<12>_UNCONNECTED , +\NLW_blk00000003/blk0000000f_BCOUT<11>_UNCONNECTED , \NLW_blk00000003/blk0000000f_BCOUT<10>_UNCONNECTED , +\NLW_blk00000003/blk0000000f_BCOUT<9>_UNCONNECTED , \NLW_blk00000003/blk0000000f_BCOUT<8>_UNCONNECTED , +\NLW_blk00000003/blk0000000f_BCOUT<7>_UNCONNECTED , \NLW_blk00000003/blk0000000f_BCOUT<6>_UNCONNECTED , +\NLW_blk00000003/blk0000000f_BCOUT<5>_UNCONNECTED , \NLW_blk00000003/blk0000000f_BCOUT<4>_UNCONNECTED , +\NLW_blk00000003/blk0000000f_BCOUT<3>_UNCONNECTED , \NLW_blk00000003/blk0000000f_BCOUT<2>_UNCONNECTED , +\NLW_blk00000003/blk0000000f_BCOUT<1>_UNCONNECTED , \NLW_blk00000003/blk0000000f_BCOUT<0>_UNCONNECTED }), + .D({\blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , +\blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , +\blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , +\blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , +\blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 }), + .P({\blk00000003/sig0000017c , \blk00000003/sig0000017d , \blk00000003/sig0000017e , \blk00000003/sig0000017f , \blk00000003/sig00000180 , +\blk00000003/sig00000181 , \blk00000003/sig00000182 , \blk00000003/sig00000183 , \blk00000003/sig00000184 , \blk00000003/sig00000185 , +\blk00000003/sig00000186 , \blk00000003/sig00000187 , \blk00000003/sig00000188 , \blk00000003/sig00000189 , \blk00000003/sig0000018a , +\blk00000003/sig0000018b , \blk00000003/sig0000018c , \blk00000003/sig0000018d , \blk00000003/sig0000018e , \blk00000003/sig0000018f , +\blk00000003/sig00000190 , \blk00000003/sig00000191 , \blk00000003/sig00000192 , \blk00000003/sig00000193 , \blk00000003/sig00000194 , +\blk00000003/sig00000195 , \blk00000003/sig00000196 , \blk00000003/sig00000197 , \blk00000003/sig00000198 , \blk00000003/sig00000199 , +\blk00000003/sig0000019a , \blk00000003/sig0000019b , \blk00000003/sig0000019c , \blk00000003/sig0000019d , \blk00000003/sig0000019e , +\blk00000003/sig0000019f , \blk00000003/sig000001a0 , \blk00000003/sig000001a1 , \blk00000003/sig000001a2 , \blk00000003/sig000001a3 , +\blk00000003/sig000001a4 , \blk00000003/sig000001a5 , \blk00000003/sig000001a6 , \blk00000003/sig000001a7 , \blk00000003/sig000001a8 , +\blk00000003/sig000001a9 , \blk00000003/sig000001aa , \blk00000003/sig000001ab }), + .A({\blk00000003/sig000001ac , \blk00000003/sig000001ac , \blk00000003/sig000001ac , \blk00000003/sig000001ac , \blk00000003/sig000001ac , +\blk00000003/sig000001ac , \blk00000003/sig000001ac , \blk00000003/sig000001ad , \blk00000003/sig000001ae , \blk00000003/sig000001af , +\blk00000003/sig000001b0 , \blk00000003/sig000001b1 , \blk00000003/sig000001b2 , \blk00000003/sig000001b3 , \blk00000003/sig000001b4 , +\blk00000003/sig000001b5 , \blk00000003/sig000001b6 , \blk00000003/sig000001b7 , \blk00000003/sig000001b8 , \blk00000003/sig000001b9 , +\blk00000003/sig000001ba , \blk00000003/sig000001bb , \blk00000003/sig000001bc , \blk00000003/sig000001bd , \blk00000003/sig000001be , +\blk00000003/sig000001bf , \blk00000003/sig000001c0 , \blk00000003/sig000001c1 , \blk00000003/sig000001c2 , \blk00000003/sig000001c3 }), + .PCOUT({\NLW_blk00000003/blk0000000f_PCOUT<47>_UNCONNECTED , \NLW_blk00000003/blk0000000f_PCOUT<46>_UNCONNECTED , +\NLW_blk00000003/blk0000000f_PCOUT<45>_UNCONNECTED , \NLW_blk00000003/blk0000000f_PCOUT<44>_UNCONNECTED , +\NLW_blk00000003/blk0000000f_PCOUT<43>_UNCONNECTED , \NLW_blk00000003/blk0000000f_PCOUT<42>_UNCONNECTED , +\NLW_blk00000003/blk0000000f_PCOUT<41>_UNCONNECTED , \NLW_blk00000003/blk0000000f_PCOUT<40>_UNCONNECTED , +\NLW_blk00000003/blk0000000f_PCOUT<39>_UNCONNECTED , \NLW_blk00000003/blk0000000f_PCOUT<38>_UNCONNECTED , +\NLW_blk00000003/blk0000000f_PCOUT<37>_UNCONNECTED , \NLW_blk00000003/blk0000000f_PCOUT<36>_UNCONNECTED , +\NLW_blk00000003/blk0000000f_PCOUT<35>_UNCONNECTED , \NLW_blk00000003/blk0000000f_PCOUT<34>_UNCONNECTED , +\NLW_blk00000003/blk0000000f_PCOUT<33>_UNCONNECTED , \NLW_blk00000003/blk0000000f_PCOUT<32>_UNCONNECTED , +\NLW_blk00000003/blk0000000f_PCOUT<31>_UNCONNECTED , \NLW_blk00000003/blk0000000f_PCOUT<30>_UNCONNECTED , +\NLW_blk00000003/blk0000000f_PCOUT<29>_UNCONNECTED , \NLW_blk00000003/blk0000000f_PCOUT<28>_UNCONNECTED , +\NLW_blk00000003/blk0000000f_PCOUT<27>_UNCONNECTED , \NLW_blk00000003/blk0000000f_PCOUT<26>_UNCONNECTED , +\NLW_blk00000003/blk0000000f_PCOUT<25>_UNCONNECTED , \NLW_blk00000003/blk0000000f_PCOUT<24>_UNCONNECTED , +\NLW_blk00000003/blk0000000f_PCOUT<23>_UNCONNECTED , \NLW_blk00000003/blk0000000f_PCOUT<22>_UNCONNECTED , +\NLW_blk00000003/blk0000000f_PCOUT<21>_UNCONNECTED , \NLW_blk00000003/blk0000000f_PCOUT<20>_UNCONNECTED , +\NLW_blk00000003/blk0000000f_PCOUT<19>_UNCONNECTED , \NLW_blk00000003/blk0000000f_PCOUT<18>_UNCONNECTED , +\NLW_blk00000003/blk0000000f_PCOUT<17>_UNCONNECTED , \NLW_blk00000003/blk0000000f_PCOUT<16>_UNCONNECTED , +\NLW_blk00000003/blk0000000f_PCOUT<15>_UNCONNECTED , \NLW_blk00000003/blk0000000f_PCOUT<14>_UNCONNECTED , +\NLW_blk00000003/blk0000000f_PCOUT<13>_UNCONNECTED , \NLW_blk00000003/blk0000000f_PCOUT<12>_UNCONNECTED , +\NLW_blk00000003/blk0000000f_PCOUT<11>_UNCONNECTED , \NLW_blk00000003/blk0000000f_PCOUT<10>_UNCONNECTED , +\NLW_blk00000003/blk0000000f_PCOUT<9>_UNCONNECTED , \NLW_blk00000003/blk0000000f_PCOUT<8>_UNCONNECTED , +\NLW_blk00000003/blk0000000f_PCOUT<7>_UNCONNECTED , \NLW_blk00000003/blk0000000f_PCOUT<6>_UNCONNECTED , +\NLW_blk00000003/blk0000000f_PCOUT<5>_UNCONNECTED , \NLW_blk00000003/blk0000000f_PCOUT<4>_UNCONNECTED , +\NLW_blk00000003/blk0000000f_PCOUT<3>_UNCONNECTED , \NLW_blk00000003/blk0000000f_PCOUT<2>_UNCONNECTED , +\NLW_blk00000003/blk0000000f_PCOUT<1>_UNCONNECTED , \NLW_blk00000003/blk0000000f_PCOUT<0>_UNCONNECTED }), + .ACIN({\blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , +\blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , +\blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , +\blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , +\blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , +\blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 }), + .CARRYINSEL({\blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 }) + ); + DSP48E1 #( + .ACASCREG ( 2 ), + .ADREG ( 0 ), + .ALUMODEREG ( 1 ), + .AREG ( 2 ), + .AUTORESET_PATDET ( "NO_RESET" ), + .A_INPUT ( "DIRECT" ), + .BCASCREG ( 2 ), + .BREG ( 2 ), + .B_INPUT ( "DIRECT" ), + .CARRYINREG ( 1 ), + .CARRYINSELREG ( 1 ), + .CREG ( 1 ), + .DREG ( 0 ), + .INMODEREG ( 0 ), + .MASK ( 48'hFFFFFFFFFFFE ), + .MREG ( 1 ), + .OPMODEREG ( 1 ), + .PATTERN ( 48'h000000000000 ), + .PREG ( 1 ), + .SEL_MASK ( "MASK" ), + .SEL_PATTERN ( "PATTERN" ), + .USE_DPORT ( "FALSE" ), + .USE_MULT ( "MULTIPLY" ), + .USE_PATTERN_DETECT ( "NO_PATDET" ), + .USE_SIMD ( "ONE48" )) + \blk00000003/blk0000000e ( + .PATTERNBDETECT(\NLW_blk00000003/blk0000000e_PATTERNBDETECT_UNCONNECTED ), + .RSTC(\blk00000003/sig00000049 ), + .CEB1(ce), + .CEAD(\blk00000003/sig00000049 ), + .MULTSIGNOUT(\NLW_blk00000003/blk0000000e_MULTSIGNOUT_UNCONNECTED ), + .CEC(ce), + .RSTM(\blk00000003/sig00000049 ), + .MULTSIGNIN(\blk00000003/sig00000049 ), + .CEB2(ce), + .RSTCTRL(\blk00000003/sig00000049 ), + .CEP(ce), + .CARRYCASCOUT(\NLW_blk00000003/blk0000000e_CARRYCASCOUT_UNCONNECTED ), + .RSTA(\blk00000003/sig00000049 ), + .CECARRYIN(ce), + .UNDERFLOW(\NLW_blk00000003/blk0000000e_UNDERFLOW_UNCONNECTED ), + .PATTERNDETECT(\NLW_blk00000003/blk0000000e_PATTERNDETECT_UNCONNECTED ), + .RSTALUMODE(\blk00000003/sig00000049 ), + .RSTALLCARRYIN(\blk00000003/sig00000049 ), + .CED(\blk00000003/sig00000049 ), + .RSTD(\blk00000003/sig00000049 ), + .CEALUMODE(ce), + .CEA2(ce), + .CLK(clk), + .CEA1(ce), + .RSTB(\blk00000003/sig00000049 ), + .OVERFLOW(\NLW_blk00000003/blk0000000e_OVERFLOW_UNCONNECTED ), + .CECTRL(ce), + .CEM(ce), + .CARRYIN(\blk00000003/sig00000049 ), + .CARRYCASCIN(\blk00000003/sig00000049 ), + .RSTINMODE(\blk00000003/sig00000049 ), + .CEINMODE(ce), + .RSTP(\blk00000003/sig00000049 ), + .ACOUT({\NLW_blk00000003/blk0000000e_ACOUT<29>_UNCONNECTED , \NLW_blk00000003/blk0000000e_ACOUT<28>_UNCONNECTED , +\NLW_blk00000003/blk0000000e_ACOUT<27>_UNCONNECTED , \NLW_blk00000003/blk0000000e_ACOUT<26>_UNCONNECTED , +\NLW_blk00000003/blk0000000e_ACOUT<25>_UNCONNECTED , \NLW_blk00000003/blk0000000e_ACOUT<24>_UNCONNECTED , +\NLW_blk00000003/blk0000000e_ACOUT<23>_UNCONNECTED , \NLW_blk00000003/blk0000000e_ACOUT<22>_UNCONNECTED , +\NLW_blk00000003/blk0000000e_ACOUT<21>_UNCONNECTED , \NLW_blk00000003/blk0000000e_ACOUT<20>_UNCONNECTED , +\NLW_blk00000003/blk0000000e_ACOUT<19>_UNCONNECTED , \NLW_blk00000003/blk0000000e_ACOUT<18>_UNCONNECTED , +\NLW_blk00000003/blk0000000e_ACOUT<17>_UNCONNECTED , \NLW_blk00000003/blk0000000e_ACOUT<16>_UNCONNECTED , +\NLW_blk00000003/blk0000000e_ACOUT<15>_UNCONNECTED , \NLW_blk00000003/blk0000000e_ACOUT<14>_UNCONNECTED , +\NLW_blk00000003/blk0000000e_ACOUT<13>_UNCONNECTED , \NLW_blk00000003/blk0000000e_ACOUT<12>_UNCONNECTED , +\NLW_blk00000003/blk0000000e_ACOUT<11>_UNCONNECTED , \NLW_blk00000003/blk0000000e_ACOUT<10>_UNCONNECTED , +\NLW_blk00000003/blk0000000e_ACOUT<9>_UNCONNECTED , \NLW_blk00000003/blk0000000e_ACOUT<8>_UNCONNECTED , +\NLW_blk00000003/blk0000000e_ACOUT<7>_UNCONNECTED , \NLW_blk00000003/blk0000000e_ACOUT<6>_UNCONNECTED , +\NLW_blk00000003/blk0000000e_ACOUT<5>_UNCONNECTED , \NLW_blk00000003/blk0000000e_ACOUT<4>_UNCONNECTED , +\NLW_blk00000003/blk0000000e_ACOUT<3>_UNCONNECTED , \NLW_blk00000003/blk0000000e_ACOUT<2>_UNCONNECTED , +\NLW_blk00000003/blk0000000e_ACOUT<1>_UNCONNECTED , \NLW_blk00000003/blk0000000e_ACOUT<0>_UNCONNECTED }), + .OPMODE({\blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig000000b0 , \blk00000003/sig00000049 , \blk00000003/sig000000b4 , +\blk00000003/sig000000b2 , \blk00000003/sig000000b4 }), + .PCIN({\blk00000003/sig000000c2 , \blk00000003/sig000000c3 , \blk00000003/sig000000c4 , \blk00000003/sig000000c5 , \blk00000003/sig000000c6 , +\blk00000003/sig000000c7 , \blk00000003/sig000000c8 , \blk00000003/sig000000c9 , \blk00000003/sig000000ca , \blk00000003/sig000000cb , +\blk00000003/sig000000cc , \blk00000003/sig000000cd , \blk00000003/sig000000ce , \blk00000003/sig000000cf , \blk00000003/sig000000d0 , +\blk00000003/sig000000d1 , \blk00000003/sig000000d2 , \blk00000003/sig000000d3 , \blk00000003/sig000000d4 , \blk00000003/sig000000d5 , +\blk00000003/sig000000d6 , \blk00000003/sig000000d7 , \blk00000003/sig000000d8 , \blk00000003/sig000000d9 , \blk00000003/sig000000da , +\blk00000003/sig000000db , \blk00000003/sig000000dc , \blk00000003/sig000000dd , \blk00000003/sig000000de , \blk00000003/sig000000df , +\blk00000003/sig000000e0 , \blk00000003/sig000000e1 , \blk00000003/sig000000e2 , \blk00000003/sig000000e3 , \blk00000003/sig000000e4 , +\blk00000003/sig000000e5 , \blk00000003/sig000000e6 , \blk00000003/sig000000e7 , \blk00000003/sig000000e8 , \blk00000003/sig000000e9 , +\blk00000003/sig000000ea , \blk00000003/sig000000eb , \blk00000003/sig000000ec , \blk00000003/sig000000ed , \blk00000003/sig000000ee , +\blk00000003/sig000000ef , \blk00000003/sig000000f0 , \blk00000003/sig000000f1 }), + .ALUMODE({\blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 }), + .C({\blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , +\blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , +\blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , +\blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , +\blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , +\blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , +\blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , +\blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , +\blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , +\blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 }), + .CARRYOUT({\NLW_blk00000003/blk0000000e_CARRYOUT<3>_UNCONNECTED , \NLW_blk00000003/blk0000000e_CARRYOUT<2>_UNCONNECTED , +\NLW_blk00000003/blk0000000e_CARRYOUT<1>_UNCONNECTED , \NLW_blk00000003/blk0000000e_CARRYOUT<0>_UNCONNECTED }), + .INMODE({\blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig000000ae , \blk00000003/sig00000049 , \blk00000003/sig00000049 }), + .BCIN({\blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , +\blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , +\blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , +\blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 }), + .B({\blk00000003/sig000000f2 , \blk00000003/sig000000f3 , \blk00000003/sig000000f4 , \blk00000003/sig000000f5 , \blk00000003/sig000000f6 , +\blk00000003/sig000000f7 , \blk00000003/sig000000f8 , \blk00000003/sig000000f9 , \blk00000003/sig000000fa , \blk00000003/sig000000fb , +\blk00000003/sig000000fc , \blk00000003/sig000000fd , \blk00000003/sig000000fe , \blk00000003/sig000000ff , \blk00000003/sig00000100 , +\blk00000003/sig00000101 , \blk00000003/sig00000102 , \blk00000003/sig00000103 }), + .BCOUT({\NLW_blk00000003/blk0000000e_BCOUT<17>_UNCONNECTED , \NLW_blk00000003/blk0000000e_BCOUT<16>_UNCONNECTED , +\NLW_blk00000003/blk0000000e_BCOUT<15>_UNCONNECTED , \NLW_blk00000003/blk0000000e_BCOUT<14>_UNCONNECTED , +\NLW_blk00000003/blk0000000e_BCOUT<13>_UNCONNECTED , \NLW_blk00000003/blk0000000e_BCOUT<12>_UNCONNECTED , +\NLW_blk00000003/blk0000000e_BCOUT<11>_UNCONNECTED , \NLW_blk00000003/blk0000000e_BCOUT<10>_UNCONNECTED , +\NLW_blk00000003/blk0000000e_BCOUT<9>_UNCONNECTED , \NLW_blk00000003/blk0000000e_BCOUT<8>_UNCONNECTED , +\NLW_blk00000003/blk0000000e_BCOUT<7>_UNCONNECTED , \NLW_blk00000003/blk0000000e_BCOUT<6>_UNCONNECTED , +\NLW_blk00000003/blk0000000e_BCOUT<5>_UNCONNECTED , \NLW_blk00000003/blk0000000e_BCOUT<4>_UNCONNECTED , +\NLW_blk00000003/blk0000000e_BCOUT<3>_UNCONNECTED , \NLW_blk00000003/blk0000000e_BCOUT<2>_UNCONNECTED , +\NLW_blk00000003/blk0000000e_BCOUT<1>_UNCONNECTED , \NLW_blk00000003/blk0000000e_BCOUT<0>_UNCONNECTED }), + .D({\blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , +\blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , +\blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , +\blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , +\blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 }), + .P({\blk00000003/sig00000104 , \blk00000003/sig00000105 , \blk00000003/sig00000106 , \blk00000003/sig00000107 , \blk00000003/sig00000108 , +\blk00000003/sig00000109 , \blk00000003/sig0000010a , \blk00000003/sig0000010b , \blk00000003/sig0000010c , \blk00000003/sig0000010d , +\blk00000003/sig0000010e , \blk00000003/sig0000010f , \blk00000003/sig00000110 , \blk00000003/sig00000111 , \blk00000003/sig00000112 , +\blk00000003/sig00000113 , \blk00000003/sig00000114 , \blk00000003/sig00000115 , \blk00000003/sig00000116 , \blk00000003/sig00000117 , +\blk00000003/sig00000118 , \blk00000003/sig00000119 , \blk00000003/sig0000011a , \blk00000003/sig0000011b , \blk00000003/sig0000011c , +\blk00000003/sig0000011d , \blk00000003/sig0000011e , \blk00000003/sig0000011f , \blk00000003/sig00000120 , \blk00000003/sig00000121 , +\blk00000003/sig00000122 , \blk00000003/sig00000123 , \blk00000003/sig00000124 , \blk00000003/sig00000125 , \blk00000003/sig00000126 , +\blk00000003/sig00000127 , \blk00000003/sig00000128 , \blk00000003/sig00000129 , \blk00000003/sig0000012a , \blk00000003/sig0000012b , +\blk00000003/sig0000012c , \blk00000003/sig0000012d , \blk00000003/sig0000012e , \blk00000003/sig0000012f , \blk00000003/sig00000130 , +\blk00000003/sig00000131 , \blk00000003/sig00000132 , \blk00000003/sig00000133 }), + .A({\blk00000003/sig00000134 , \blk00000003/sig00000134 , \blk00000003/sig00000134 , \blk00000003/sig00000134 , \blk00000003/sig00000134 , +\blk00000003/sig00000134 , \blk00000003/sig00000134 , \blk00000003/sig00000135 , \blk00000003/sig00000136 , \blk00000003/sig00000137 , +\blk00000003/sig00000138 , \blk00000003/sig00000139 , \blk00000003/sig0000013a , \blk00000003/sig0000013b , \blk00000003/sig0000013c , +\blk00000003/sig0000013d , \blk00000003/sig0000013e , \blk00000003/sig0000013f , \blk00000003/sig00000140 , \blk00000003/sig00000141 , +\blk00000003/sig00000142 , \blk00000003/sig00000143 , \blk00000003/sig00000144 , \blk00000003/sig00000145 , \blk00000003/sig00000146 , +\blk00000003/sig00000147 , \blk00000003/sig00000148 , \blk00000003/sig00000149 , \blk00000003/sig0000014a , \blk00000003/sig0000014b }), + .PCOUT({\NLW_blk00000003/blk0000000e_PCOUT<47>_UNCONNECTED , \NLW_blk00000003/blk0000000e_PCOUT<46>_UNCONNECTED , +\NLW_blk00000003/blk0000000e_PCOUT<45>_UNCONNECTED , \NLW_blk00000003/blk0000000e_PCOUT<44>_UNCONNECTED , +\NLW_blk00000003/blk0000000e_PCOUT<43>_UNCONNECTED , \NLW_blk00000003/blk0000000e_PCOUT<42>_UNCONNECTED , +\NLW_blk00000003/blk0000000e_PCOUT<41>_UNCONNECTED , \NLW_blk00000003/blk0000000e_PCOUT<40>_UNCONNECTED , +\NLW_blk00000003/blk0000000e_PCOUT<39>_UNCONNECTED , \NLW_blk00000003/blk0000000e_PCOUT<38>_UNCONNECTED , +\NLW_blk00000003/blk0000000e_PCOUT<37>_UNCONNECTED , \NLW_blk00000003/blk0000000e_PCOUT<36>_UNCONNECTED , +\NLW_blk00000003/blk0000000e_PCOUT<35>_UNCONNECTED , \NLW_blk00000003/blk0000000e_PCOUT<34>_UNCONNECTED , +\NLW_blk00000003/blk0000000e_PCOUT<33>_UNCONNECTED , \NLW_blk00000003/blk0000000e_PCOUT<32>_UNCONNECTED , +\NLW_blk00000003/blk0000000e_PCOUT<31>_UNCONNECTED , \NLW_blk00000003/blk0000000e_PCOUT<30>_UNCONNECTED , +\NLW_blk00000003/blk0000000e_PCOUT<29>_UNCONNECTED , \NLW_blk00000003/blk0000000e_PCOUT<28>_UNCONNECTED , +\NLW_blk00000003/blk0000000e_PCOUT<27>_UNCONNECTED , \NLW_blk00000003/blk0000000e_PCOUT<26>_UNCONNECTED , +\NLW_blk00000003/blk0000000e_PCOUT<25>_UNCONNECTED , \NLW_blk00000003/blk0000000e_PCOUT<24>_UNCONNECTED , +\NLW_blk00000003/blk0000000e_PCOUT<23>_UNCONNECTED , \NLW_blk00000003/blk0000000e_PCOUT<22>_UNCONNECTED , +\NLW_blk00000003/blk0000000e_PCOUT<21>_UNCONNECTED , \NLW_blk00000003/blk0000000e_PCOUT<20>_UNCONNECTED , +\NLW_blk00000003/blk0000000e_PCOUT<19>_UNCONNECTED , \NLW_blk00000003/blk0000000e_PCOUT<18>_UNCONNECTED , +\NLW_blk00000003/blk0000000e_PCOUT<17>_UNCONNECTED , \NLW_blk00000003/blk0000000e_PCOUT<16>_UNCONNECTED , +\NLW_blk00000003/blk0000000e_PCOUT<15>_UNCONNECTED , \NLW_blk00000003/blk0000000e_PCOUT<14>_UNCONNECTED , +\NLW_blk00000003/blk0000000e_PCOUT<13>_UNCONNECTED , \NLW_blk00000003/blk0000000e_PCOUT<12>_UNCONNECTED , +\NLW_blk00000003/blk0000000e_PCOUT<11>_UNCONNECTED , \NLW_blk00000003/blk0000000e_PCOUT<10>_UNCONNECTED , +\NLW_blk00000003/blk0000000e_PCOUT<9>_UNCONNECTED , \NLW_blk00000003/blk0000000e_PCOUT<8>_UNCONNECTED , +\NLW_blk00000003/blk0000000e_PCOUT<7>_UNCONNECTED , \NLW_blk00000003/blk0000000e_PCOUT<6>_UNCONNECTED , +\NLW_blk00000003/blk0000000e_PCOUT<5>_UNCONNECTED , \NLW_blk00000003/blk0000000e_PCOUT<4>_UNCONNECTED , +\NLW_blk00000003/blk0000000e_PCOUT<3>_UNCONNECTED , \NLW_blk00000003/blk0000000e_PCOUT<2>_UNCONNECTED , +\NLW_blk00000003/blk0000000e_PCOUT<1>_UNCONNECTED , \NLW_blk00000003/blk0000000e_PCOUT<0>_UNCONNECTED }), + .ACIN({\blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , +\blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , +\blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , +\blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , +\blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , +\blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 }), + .CARRYINSEL({\blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 }) + ); + MUXCY_D \blk00000003/blk0000000d ( + .CI(\blk00000003/sig000000ae ), + .DI(\blk00000003/sig00000049 ), + .S(\blk00000003/sig000000c1 ), + .O(\blk00000003/sig000000bd ), + .LO(\NLW_blk00000003/blk0000000d_LO_UNCONNECTED ) + ); + MUXCY_D \blk00000003/blk0000000c ( + .CI(\blk00000003/sig000000bd ), + .DI(\blk00000003/sig000000be ), + .S(\blk00000003/sig000000bf ), + .O(\blk00000003/sig000000b5 ), + .LO(\blk00000003/sig000000c0 ) + ); + XORCY \blk00000003/blk0000000b ( + .CI(\blk00000003/sig000000bb ), + .LI(\blk00000003/sig000000ae ), + .O(\blk00000003/sig000000bc ) + ); + MUXCY_D \blk00000003/blk0000000a ( + .CI(\blk00000003/sig000000b8 ), + .DI(\blk00000003/sig000000b9 ), + .S(\blk00000003/sig000000ba ), + .O(\NLW_blk00000003/blk0000000a_O_UNCONNECTED ), + .LO(\blk00000003/sig000000bb ) + ); + MUXCY_D \blk00000003/blk00000009 ( + .CI(\blk00000003/sig000000b5 ), + .DI(\blk00000003/sig000000b6 ), + .S(\blk00000003/sig000000b7 ), + .O(\blk00000003/sig000000b8 ), + .LO(\NLW_blk00000003/blk00000009_LO_UNCONNECTED ) + ); + FD #( + .INIT ( 1'b0 )) + \blk00000003/blk00000008 ( + .C(clk), + .D(\blk00000003/sig000000b3 ), + .Q(\blk00000003/sig000000b4 ) + ); + FD #( + .INIT ( 1'b0 )) + \blk00000003/blk00000007 ( + .C(clk), + .D(\blk00000003/sig000000b1 ), + .Q(\blk00000003/sig000000b2 ) + ); + FD #( + .INIT ( 1'b0 )) + \blk00000003/blk00000006 ( + .C(clk), + .D(\blk00000003/sig000000af ), + .Q(\blk00000003/sig000000b0 ) + ); + VCC \blk00000003/blk00000005 ( + .P(\blk00000003/sig000000ae ) + ); + GND \blk00000003/blk00000004 ( + .G(\blk00000003/sig00000049 ) + ); + LUT2 #( + .INIT ( 4'h8 )) + \blk00000003/blk0000002a/blk0000008c ( + .I0(nd), + .I1(ce), + .O(\blk00000003/blk0000002a/sig000006fd ) + ); + RAM32X1D #( + .INIT ( 32'h00000000 )) + \blk00000003/blk0000002a/blk0000008b ( + .A0(\blk00000003/sig000001e9 ), + .A1(\blk00000003/sig000001e8 ), + .A2(\blk00000003/blk0000002a/sig000006cc ), + .A3(\blk00000003/blk0000002a/sig000006cc ), + .A4(\blk00000003/blk0000002a/sig000006cc ), + .D(din_2_2[22]), + .DPRA0(\blk00000003/sig000001de ), + .DPRA1(\blk00000003/sig000001dc ), + .DPRA2(\blk00000003/blk0000002a/sig000006cc ), + .DPRA3(\blk00000003/blk0000002a/sig000006cc ), + .DPRA4(\blk00000003/blk0000002a/sig000006cc ), + .WCLK(clk), + .WE(\blk00000003/blk0000002a/sig000006fd ), + .SPO(\NLW_blk00000003/blk0000002a/blk0000008b_SPO_UNCONNECTED ), + .DPO(\blk00000003/blk0000002a/sig000006fb ) + ); + RAM32X1D #( + .INIT ( 32'h00000000 )) + \blk00000003/blk0000002a/blk0000008a ( + .A0(\blk00000003/sig000001e9 ), + .A1(\blk00000003/sig000001e8 ), + .A2(\blk00000003/blk0000002a/sig000006cc ), + .A3(\blk00000003/blk0000002a/sig000006cc ), + .A4(\blk00000003/blk0000002a/sig000006cc ), + .D(din_2_2[21]), + .DPRA0(\blk00000003/sig000001de ), + .DPRA1(\blk00000003/sig000001dc ), + .DPRA2(\blk00000003/blk0000002a/sig000006cc ), + .DPRA3(\blk00000003/blk0000002a/sig000006cc ), + .DPRA4(\blk00000003/blk0000002a/sig000006cc ), + .WCLK(clk), + .WE(\blk00000003/blk0000002a/sig000006fd ), + .SPO(\NLW_blk00000003/blk0000002a/blk0000008a_SPO_UNCONNECTED ), + .DPO(\blk00000003/blk0000002a/sig000006fa ) + ); + RAM32X1D #( + .INIT ( 32'h00000000 )) + \blk00000003/blk0000002a/blk00000089 ( + .A0(\blk00000003/sig000001e9 ), + .A1(\blk00000003/sig000001e8 ), + .A2(\blk00000003/blk0000002a/sig000006cc ), + .A3(\blk00000003/blk0000002a/sig000006cc ), + .A4(\blk00000003/blk0000002a/sig000006cc ), + .D(din_2_2[23]), + .DPRA0(\blk00000003/sig000001de ), + .DPRA1(\blk00000003/sig000001dc ), + .DPRA2(\blk00000003/blk0000002a/sig000006cc ), + .DPRA3(\blk00000003/blk0000002a/sig000006cc ), + .DPRA4(\blk00000003/blk0000002a/sig000006cc ), + .WCLK(clk), + .WE(\blk00000003/blk0000002a/sig000006fd ), + .SPO(\NLW_blk00000003/blk0000002a/blk00000089_SPO_UNCONNECTED ), + .DPO(\blk00000003/blk0000002a/sig000006fc ) + ); + RAM32X1D #( + .INIT ( 32'h00000000 )) + \blk00000003/blk0000002a/blk00000088 ( + .A0(\blk00000003/sig000001e9 ), + .A1(\blk00000003/sig000001e8 ), + .A2(\blk00000003/blk0000002a/sig000006cc ), + .A3(\blk00000003/blk0000002a/sig000006cc ), + .A4(\blk00000003/blk0000002a/sig000006cc ), + .D(din_2_2[19]), + .DPRA0(\blk00000003/sig000001de ), + .DPRA1(\blk00000003/sig000001dc ), + .DPRA2(\blk00000003/blk0000002a/sig000006cc ), + .DPRA3(\blk00000003/blk0000002a/sig000006cc ), + .DPRA4(\blk00000003/blk0000002a/sig000006cc ), + .WCLK(clk), + .WE(\blk00000003/blk0000002a/sig000006fd ), + .SPO(\NLW_blk00000003/blk0000002a/blk00000088_SPO_UNCONNECTED ), + .DPO(\blk00000003/blk0000002a/sig000006f8 ) + ); + RAM32X1D #( + .INIT ( 32'h00000000 )) + \blk00000003/blk0000002a/blk00000087 ( + .A0(\blk00000003/sig000001e9 ), + .A1(\blk00000003/sig000001e8 ), + .A2(\blk00000003/blk0000002a/sig000006cc ), + .A3(\blk00000003/blk0000002a/sig000006cc ), + .A4(\blk00000003/blk0000002a/sig000006cc ), + .D(din_2_2[18]), + .DPRA0(\blk00000003/sig000001de ), + .DPRA1(\blk00000003/sig000001dc ), + .DPRA2(\blk00000003/blk0000002a/sig000006cc ), + .DPRA3(\blk00000003/blk0000002a/sig000006cc ), + .DPRA4(\blk00000003/blk0000002a/sig000006cc ), + .WCLK(clk), + .WE(\blk00000003/blk0000002a/sig000006fd ), + .SPO(\NLW_blk00000003/blk0000002a/blk00000087_SPO_UNCONNECTED ), + .DPO(\blk00000003/blk0000002a/sig000006f7 ) + ); + RAM32X1D #( + .INIT ( 32'h00000000 )) + \blk00000003/blk0000002a/blk00000086 ( + .A0(\blk00000003/sig000001e9 ), + .A1(\blk00000003/sig000001e8 ), + .A2(\blk00000003/blk0000002a/sig000006cc ), + .A3(\blk00000003/blk0000002a/sig000006cc ), + .A4(\blk00000003/blk0000002a/sig000006cc ), + .D(din_2_2[20]), + .DPRA0(\blk00000003/sig000001de ), + .DPRA1(\blk00000003/sig000001dc ), + .DPRA2(\blk00000003/blk0000002a/sig000006cc ), + .DPRA3(\blk00000003/blk0000002a/sig000006cc ), + .DPRA4(\blk00000003/blk0000002a/sig000006cc ), + .WCLK(clk), + .WE(\blk00000003/blk0000002a/sig000006fd ), + .SPO(\NLW_blk00000003/blk0000002a/blk00000086_SPO_UNCONNECTED ), + .DPO(\blk00000003/blk0000002a/sig000006f9 ) + ); + RAM32X1D #( + .INIT ( 32'h00000000 )) + \blk00000003/blk0000002a/blk00000085 ( + .A0(\blk00000003/sig000001e9 ), + .A1(\blk00000003/sig000001e8 ), + .A2(\blk00000003/blk0000002a/sig000006cc ), + .A3(\blk00000003/blk0000002a/sig000006cc ), + .A4(\blk00000003/blk0000002a/sig000006cc ), + .D(din_2_2[16]), + .DPRA0(\blk00000003/sig000001de ), + .DPRA1(\blk00000003/sig000001dc ), + .DPRA2(\blk00000003/blk0000002a/sig000006cc ), + .DPRA3(\blk00000003/blk0000002a/sig000006cc ), + .DPRA4(\blk00000003/blk0000002a/sig000006cc ), + .WCLK(clk), + .WE(\blk00000003/blk0000002a/sig000006fd ), + .SPO(\NLW_blk00000003/blk0000002a/blk00000085_SPO_UNCONNECTED ), + .DPO(\blk00000003/blk0000002a/sig000006f5 ) + ); + RAM32X1D #( + .INIT ( 32'h00000000 )) + \blk00000003/blk0000002a/blk00000084 ( + .A0(\blk00000003/sig000001e9 ), + .A1(\blk00000003/sig000001e8 ), + .A2(\blk00000003/blk0000002a/sig000006cc ), + .A3(\blk00000003/blk0000002a/sig000006cc ), + .A4(\blk00000003/blk0000002a/sig000006cc ), + .D(din_2_2[15]), + .DPRA0(\blk00000003/sig000001de ), + .DPRA1(\blk00000003/sig000001dc ), + .DPRA2(\blk00000003/blk0000002a/sig000006cc ), + .DPRA3(\blk00000003/blk0000002a/sig000006cc ), + .DPRA4(\blk00000003/blk0000002a/sig000006cc ), + .WCLK(clk), + .WE(\blk00000003/blk0000002a/sig000006fd ), + .SPO(\NLW_blk00000003/blk0000002a/blk00000084_SPO_UNCONNECTED ), + .DPO(\blk00000003/blk0000002a/sig000006f4 ) + ); + RAM32X1D #( + .INIT ( 32'h00000000 )) + \blk00000003/blk0000002a/blk00000083 ( + .A0(\blk00000003/sig000001e9 ), + .A1(\blk00000003/sig000001e8 ), + .A2(\blk00000003/blk0000002a/sig000006cc ), + .A3(\blk00000003/blk0000002a/sig000006cc ), + .A4(\blk00000003/blk0000002a/sig000006cc ), + .D(din_2_2[17]), + .DPRA0(\blk00000003/sig000001de ), + .DPRA1(\blk00000003/sig000001dc ), + .DPRA2(\blk00000003/blk0000002a/sig000006cc ), + .DPRA3(\blk00000003/blk0000002a/sig000006cc ), + .DPRA4(\blk00000003/blk0000002a/sig000006cc ), + .WCLK(clk), + .WE(\blk00000003/blk0000002a/sig000006fd ), + .SPO(\NLW_blk00000003/blk0000002a/blk00000083_SPO_UNCONNECTED ), + .DPO(\blk00000003/blk0000002a/sig000006f6 ) + ); + RAM32X1D #( + .INIT ( 32'h00000000 )) + \blk00000003/blk0000002a/blk00000082 ( + .A0(\blk00000003/sig000001e9 ), + .A1(\blk00000003/sig000001e8 ), + .A2(\blk00000003/blk0000002a/sig000006cc ), + .A3(\blk00000003/blk0000002a/sig000006cc ), + .A4(\blk00000003/blk0000002a/sig000006cc ), + .D(din_2_2[13]), + .DPRA0(\blk00000003/sig000001de ), + .DPRA1(\blk00000003/sig000001dc ), + .DPRA2(\blk00000003/blk0000002a/sig000006cc ), + .DPRA3(\blk00000003/blk0000002a/sig000006cc ), + .DPRA4(\blk00000003/blk0000002a/sig000006cc ), + .WCLK(clk), + .WE(\blk00000003/blk0000002a/sig000006fd ), + .SPO(\NLW_blk00000003/blk0000002a/blk00000082_SPO_UNCONNECTED ), + .DPO(\blk00000003/blk0000002a/sig000006f2 ) + ); + RAM32X1D #( + .INIT ( 32'h00000000 )) + \blk00000003/blk0000002a/blk00000081 ( + .A0(\blk00000003/sig000001e9 ), + .A1(\blk00000003/sig000001e8 ), + .A2(\blk00000003/blk0000002a/sig000006cc ), + .A3(\blk00000003/blk0000002a/sig000006cc ), + .A4(\blk00000003/blk0000002a/sig000006cc ), + .D(din_2_2[12]), + .DPRA0(\blk00000003/sig000001de ), + .DPRA1(\blk00000003/sig000001dc ), + .DPRA2(\blk00000003/blk0000002a/sig000006cc ), + .DPRA3(\blk00000003/blk0000002a/sig000006cc ), + .DPRA4(\blk00000003/blk0000002a/sig000006cc ), + .WCLK(clk), + .WE(\blk00000003/blk0000002a/sig000006fd ), + .SPO(\NLW_blk00000003/blk0000002a/blk00000081_SPO_UNCONNECTED ), + .DPO(\blk00000003/blk0000002a/sig000006f1 ) + ); + RAM32X1D #( + .INIT ( 32'h00000000 )) + \blk00000003/blk0000002a/blk00000080 ( + .A0(\blk00000003/sig000001e9 ), + .A1(\blk00000003/sig000001e8 ), + .A2(\blk00000003/blk0000002a/sig000006cc ), + .A3(\blk00000003/blk0000002a/sig000006cc ), + .A4(\blk00000003/blk0000002a/sig000006cc ), + .D(din_2_2[14]), + .DPRA0(\blk00000003/sig000001de ), + .DPRA1(\blk00000003/sig000001dc ), + .DPRA2(\blk00000003/blk0000002a/sig000006cc ), + .DPRA3(\blk00000003/blk0000002a/sig000006cc ), + .DPRA4(\blk00000003/blk0000002a/sig000006cc ), + .WCLK(clk), + .WE(\blk00000003/blk0000002a/sig000006fd ), + .SPO(\NLW_blk00000003/blk0000002a/blk00000080_SPO_UNCONNECTED ), + .DPO(\blk00000003/blk0000002a/sig000006f3 ) + ); + RAM32X1D #( + .INIT ( 32'h00000000 )) + \blk00000003/blk0000002a/blk0000007f ( + .A0(\blk00000003/sig000001e9 ), + .A1(\blk00000003/sig000001e8 ), + .A2(\blk00000003/blk0000002a/sig000006cc ), + .A3(\blk00000003/blk0000002a/sig000006cc ), + .A4(\blk00000003/blk0000002a/sig000006cc ), + .D(din_2_2[10]), + .DPRA0(\blk00000003/sig000001de ), + .DPRA1(\blk00000003/sig000001dc ), + .DPRA2(\blk00000003/blk0000002a/sig000006cc ), + .DPRA3(\blk00000003/blk0000002a/sig000006cc ), + .DPRA4(\blk00000003/blk0000002a/sig000006cc ), + .WCLK(clk), + .WE(\blk00000003/blk0000002a/sig000006fd ), + .SPO(\NLW_blk00000003/blk0000002a/blk0000007f_SPO_UNCONNECTED ), + .DPO(\blk00000003/blk0000002a/sig000006ef ) + ); + RAM32X1D #( + .INIT ( 32'h00000000 )) + \blk00000003/blk0000002a/blk0000007e ( + .A0(\blk00000003/sig000001e9 ), + .A1(\blk00000003/sig000001e8 ), + .A2(\blk00000003/blk0000002a/sig000006cc ), + .A3(\blk00000003/blk0000002a/sig000006cc ), + .A4(\blk00000003/blk0000002a/sig000006cc ), + .D(din_2_2[9]), + .DPRA0(\blk00000003/sig000001de ), + .DPRA1(\blk00000003/sig000001dc ), + .DPRA2(\blk00000003/blk0000002a/sig000006cc ), + .DPRA3(\blk00000003/blk0000002a/sig000006cc ), + .DPRA4(\blk00000003/blk0000002a/sig000006cc ), + .WCLK(clk), + .WE(\blk00000003/blk0000002a/sig000006fd ), + .SPO(\NLW_blk00000003/blk0000002a/blk0000007e_SPO_UNCONNECTED ), + .DPO(\blk00000003/blk0000002a/sig000006ee ) + ); + RAM32X1D #( + .INIT ( 32'h00000000 )) + \blk00000003/blk0000002a/blk0000007d ( + .A0(\blk00000003/sig000001e9 ), + .A1(\blk00000003/sig000001e8 ), + .A2(\blk00000003/blk0000002a/sig000006cc ), + .A3(\blk00000003/blk0000002a/sig000006cc ), + .A4(\blk00000003/blk0000002a/sig000006cc ), + .D(din_2_2[11]), + .DPRA0(\blk00000003/sig000001de ), + .DPRA1(\blk00000003/sig000001dc ), + .DPRA2(\blk00000003/blk0000002a/sig000006cc ), + .DPRA3(\blk00000003/blk0000002a/sig000006cc ), + .DPRA4(\blk00000003/blk0000002a/sig000006cc ), + .WCLK(clk), + .WE(\blk00000003/blk0000002a/sig000006fd ), + .SPO(\NLW_blk00000003/blk0000002a/blk0000007d_SPO_UNCONNECTED ), + .DPO(\blk00000003/blk0000002a/sig000006f0 ) + ); + RAM32X1D #( + .INIT ( 32'h00000000 )) + \blk00000003/blk0000002a/blk0000007c ( + .A0(\blk00000003/sig000001e9 ), + .A1(\blk00000003/sig000001e8 ), + .A2(\blk00000003/blk0000002a/sig000006cc ), + .A3(\blk00000003/blk0000002a/sig000006cc ), + .A4(\blk00000003/blk0000002a/sig000006cc ), + .D(din_2_2[7]), + .DPRA0(\blk00000003/sig000001de ), + .DPRA1(\blk00000003/sig000001dc ), + .DPRA2(\blk00000003/blk0000002a/sig000006cc ), + .DPRA3(\blk00000003/blk0000002a/sig000006cc ), + .DPRA4(\blk00000003/blk0000002a/sig000006cc ), + .WCLK(clk), + .WE(\blk00000003/blk0000002a/sig000006fd ), + .SPO(\NLW_blk00000003/blk0000002a/blk0000007c_SPO_UNCONNECTED ), + .DPO(\blk00000003/blk0000002a/sig000006ec ) + ); + RAM32X1D #( + .INIT ( 32'h00000000 )) + \blk00000003/blk0000002a/blk0000007b ( + .A0(\blk00000003/sig000001e9 ), + .A1(\blk00000003/sig000001e8 ), + .A2(\blk00000003/blk0000002a/sig000006cc ), + .A3(\blk00000003/blk0000002a/sig000006cc ), + .A4(\blk00000003/blk0000002a/sig000006cc ), + .D(din_2_2[6]), + .DPRA0(\blk00000003/sig000001de ), + .DPRA1(\blk00000003/sig000001dc ), + .DPRA2(\blk00000003/blk0000002a/sig000006cc ), + .DPRA3(\blk00000003/blk0000002a/sig000006cc ), + .DPRA4(\blk00000003/blk0000002a/sig000006cc ), + .WCLK(clk), + .WE(\blk00000003/blk0000002a/sig000006fd ), + .SPO(\NLW_blk00000003/blk0000002a/blk0000007b_SPO_UNCONNECTED ), + .DPO(\blk00000003/blk0000002a/sig000006eb ) + ); + RAM32X1D #( + .INIT ( 32'h00000000 )) + \blk00000003/blk0000002a/blk0000007a ( + .A0(\blk00000003/sig000001e9 ), + .A1(\blk00000003/sig000001e8 ), + .A2(\blk00000003/blk0000002a/sig000006cc ), + .A3(\blk00000003/blk0000002a/sig000006cc ), + .A4(\blk00000003/blk0000002a/sig000006cc ), + .D(din_2_2[8]), + .DPRA0(\blk00000003/sig000001de ), + .DPRA1(\blk00000003/sig000001dc ), + .DPRA2(\blk00000003/blk0000002a/sig000006cc ), + .DPRA3(\blk00000003/blk0000002a/sig000006cc ), + .DPRA4(\blk00000003/blk0000002a/sig000006cc ), + .WCLK(clk), + .WE(\blk00000003/blk0000002a/sig000006fd ), + .SPO(\NLW_blk00000003/blk0000002a/blk0000007a_SPO_UNCONNECTED ), + .DPO(\blk00000003/blk0000002a/sig000006ed ) + ); + RAM32X1D #( + .INIT ( 32'h00000000 )) + \blk00000003/blk0000002a/blk00000079 ( + .A0(\blk00000003/sig000001e9 ), + .A1(\blk00000003/sig000001e8 ), + .A2(\blk00000003/blk0000002a/sig000006cc ), + .A3(\blk00000003/blk0000002a/sig000006cc ), + .A4(\blk00000003/blk0000002a/sig000006cc ), + .D(din_2_2[4]), + .DPRA0(\blk00000003/sig000001de ), + .DPRA1(\blk00000003/sig000001dc ), + .DPRA2(\blk00000003/blk0000002a/sig000006cc ), + .DPRA3(\blk00000003/blk0000002a/sig000006cc ), + .DPRA4(\blk00000003/blk0000002a/sig000006cc ), + .WCLK(clk), + .WE(\blk00000003/blk0000002a/sig000006fd ), + .SPO(\NLW_blk00000003/blk0000002a/blk00000079_SPO_UNCONNECTED ), + .DPO(\blk00000003/blk0000002a/sig000006e9 ) + ); + RAM32X1D #( + .INIT ( 32'h00000000 )) + \blk00000003/blk0000002a/blk00000078 ( + .A0(\blk00000003/sig000001e9 ), + .A1(\blk00000003/sig000001e8 ), + .A2(\blk00000003/blk0000002a/sig000006cc ), + .A3(\blk00000003/blk0000002a/sig000006cc ), + .A4(\blk00000003/blk0000002a/sig000006cc ), + .D(din_2_2[3]), + .DPRA0(\blk00000003/sig000001de ), + .DPRA1(\blk00000003/sig000001dc ), + .DPRA2(\blk00000003/blk0000002a/sig000006cc ), + .DPRA3(\blk00000003/blk0000002a/sig000006cc ), + .DPRA4(\blk00000003/blk0000002a/sig000006cc ), + .WCLK(clk), + .WE(\blk00000003/blk0000002a/sig000006fd ), + .SPO(\NLW_blk00000003/blk0000002a/blk00000078_SPO_UNCONNECTED ), + .DPO(\blk00000003/blk0000002a/sig000006e8 ) + ); + RAM32X1D #( + .INIT ( 32'h00000000 )) + \blk00000003/blk0000002a/blk00000077 ( + .A0(\blk00000003/sig000001e9 ), + .A1(\blk00000003/sig000001e8 ), + .A2(\blk00000003/blk0000002a/sig000006cc ), + .A3(\blk00000003/blk0000002a/sig000006cc ), + .A4(\blk00000003/blk0000002a/sig000006cc ), + .D(din_2_2[5]), + .DPRA0(\blk00000003/sig000001de ), + .DPRA1(\blk00000003/sig000001dc ), + .DPRA2(\blk00000003/blk0000002a/sig000006cc ), + .DPRA3(\blk00000003/blk0000002a/sig000006cc ), + .DPRA4(\blk00000003/blk0000002a/sig000006cc ), + .WCLK(clk), + .WE(\blk00000003/blk0000002a/sig000006fd ), + .SPO(\NLW_blk00000003/blk0000002a/blk00000077_SPO_UNCONNECTED ), + .DPO(\blk00000003/blk0000002a/sig000006ea ) + ); + RAM32X1D #( + .INIT ( 32'h00000000 )) + \blk00000003/blk0000002a/blk00000076 ( + .A0(\blk00000003/sig000001e9 ), + .A1(\blk00000003/sig000001e8 ), + .A2(\blk00000003/blk0000002a/sig000006cc ), + .A3(\blk00000003/blk0000002a/sig000006cc ), + .A4(\blk00000003/blk0000002a/sig000006cc ), + .D(din_2_2[1]), + .DPRA0(\blk00000003/sig000001de ), + .DPRA1(\blk00000003/sig000001dc ), + .DPRA2(\blk00000003/blk0000002a/sig000006cc ), + .DPRA3(\blk00000003/blk0000002a/sig000006cc ), + .DPRA4(\blk00000003/blk0000002a/sig000006cc ), + .WCLK(clk), + .WE(\blk00000003/blk0000002a/sig000006fd ), + .SPO(\NLW_blk00000003/blk0000002a/blk00000076_SPO_UNCONNECTED ), + .DPO(\blk00000003/blk0000002a/sig000006e6 ) + ); + RAM32X1D #( + .INIT ( 32'h00000000 )) + \blk00000003/blk0000002a/blk00000075 ( + .A0(\blk00000003/sig000001e9 ), + .A1(\blk00000003/sig000001e8 ), + .A2(\blk00000003/blk0000002a/sig000006cc ), + .A3(\blk00000003/blk0000002a/sig000006cc ), + .A4(\blk00000003/blk0000002a/sig000006cc ), + .D(din_2_2[0]), + .DPRA0(\blk00000003/sig000001de ), + .DPRA1(\blk00000003/sig000001dc ), + .DPRA2(\blk00000003/blk0000002a/sig000006cc ), + .DPRA3(\blk00000003/blk0000002a/sig000006cc ), + .DPRA4(\blk00000003/blk0000002a/sig000006cc ), + .WCLK(clk), + .WE(\blk00000003/blk0000002a/sig000006fd ), + .SPO(\NLW_blk00000003/blk0000002a/blk00000075_SPO_UNCONNECTED ), + .DPO(\blk00000003/blk0000002a/sig000006e5 ) + ); + RAM32X1D #( + .INIT ( 32'h00000000 )) + \blk00000003/blk0000002a/blk00000074 ( + .A0(\blk00000003/sig000001e9 ), + .A1(\blk00000003/sig000001e8 ), + .A2(\blk00000003/blk0000002a/sig000006cc ), + .A3(\blk00000003/blk0000002a/sig000006cc ), + .A4(\blk00000003/blk0000002a/sig000006cc ), + .D(din_2_2[2]), + .DPRA0(\blk00000003/sig000001de ), + .DPRA1(\blk00000003/sig000001dc ), + .DPRA2(\blk00000003/blk0000002a/sig000006cc ), + .DPRA3(\blk00000003/blk0000002a/sig000006cc ), + .DPRA4(\blk00000003/blk0000002a/sig000006cc ), + .WCLK(clk), + .WE(\blk00000003/blk0000002a/sig000006fd ), + .SPO(\NLW_blk00000003/blk0000002a/blk00000074_SPO_UNCONNECTED ), + .DPO(\blk00000003/blk0000002a/sig000006e7 ) + ); + RAM32X1D #( + .INIT ( 32'h00000000 )) + \blk00000003/blk0000002a/blk00000073 ( + .A0(\blk00000003/sig000001e9 ), + .A1(\blk00000003/sig000001e8 ), + .A2(\blk00000003/blk0000002a/sig000006cc ), + .A3(\blk00000003/blk0000002a/sig000006cc ), + .A4(\blk00000003/blk0000002a/sig000006cc ), + .D(din_1_1[22]), + .DPRA0(\blk00000003/sig000001de ), + .DPRA1(\blk00000003/sig000001dc ), + .DPRA2(\blk00000003/blk0000002a/sig000006cc ), + .DPRA3(\blk00000003/blk0000002a/sig000006cc ), + .DPRA4(\blk00000003/blk0000002a/sig000006cc ), + .WCLK(clk), + .WE(\blk00000003/blk0000002a/sig000006fd ), + .SPO(\NLW_blk00000003/blk0000002a/blk00000073_SPO_UNCONNECTED ), + .DPO(\blk00000003/blk0000002a/sig000006e3 ) + ); + RAM32X1D #( + .INIT ( 32'h00000000 )) + \blk00000003/blk0000002a/blk00000072 ( + .A0(\blk00000003/sig000001e9 ), + .A1(\blk00000003/sig000001e8 ), + .A2(\blk00000003/blk0000002a/sig000006cc ), + .A3(\blk00000003/blk0000002a/sig000006cc ), + .A4(\blk00000003/blk0000002a/sig000006cc ), + .D(din_1_1[21]), + .DPRA0(\blk00000003/sig000001de ), + .DPRA1(\blk00000003/sig000001dc ), + .DPRA2(\blk00000003/blk0000002a/sig000006cc ), + .DPRA3(\blk00000003/blk0000002a/sig000006cc ), + .DPRA4(\blk00000003/blk0000002a/sig000006cc ), + .WCLK(clk), + .WE(\blk00000003/blk0000002a/sig000006fd ), + .SPO(\NLW_blk00000003/blk0000002a/blk00000072_SPO_UNCONNECTED ), + .DPO(\blk00000003/blk0000002a/sig000006e2 ) + ); + RAM32X1D #( + .INIT ( 32'h00000000 )) + \blk00000003/blk0000002a/blk00000071 ( + .A0(\blk00000003/sig000001e9 ), + .A1(\blk00000003/sig000001e8 ), + .A2(\blk00000003/blk0000002a/sig000006cc ), + .A3(\blk00000003/blk0000002a/sig000006cc ), + .A4(\blk00000003/blk0000002a/sig000006cc ), + .D(din_1_1[23]), + .DPRA0(\blk00000003/sig000001de ), + .DPRA1(\blk00000003/sig000001dc ), + .DPRA2(\blk00000003/blk0000002a/sig000006cc ), + .DPRA3(\blk00000003/blk0000002a/sig000006cc ), + .DPRA4(\blk00000003/blk0000002a/sig000006cc ), + .WCLK(clk), + .WE(\blk00000003/blk0000002a/sig000006fd ), + .SPO(\NLW_blk00000003/blk0000002a/blk00000071_SPO_UNCONNECTED ), + .DPO(\blk00000003/blk0000002a/sig000006e4 ) + ); + RAM32X1D #( + .INIT ( 32'h00000000 )) + \blk00000003/blk0000002a/blk00000070 ( + .A0(\blk00000003/sig000001e9 ), + .A1(\blk00000003/sig000001e8 ), + .A2(\blk00000003/blk0000002a/sig000006cc ), + .A3(\blk00000003/blk0000002a/sig000006cc ), + .A4(\blk00000003/blk0000002a/sig000006cc ), + .D(din_1_1[19]), + .DPRA0(\blk00000003/sig000001de ), + .DPRA1(\blk00000003/sig000001dc ), + .DPRA2(\blk00000003/blk0000002a/sig000006cc ), + .DPRA3(\blk00000003/blk0000002a/sig000006cc ), + .DPRA4(\blk00000003/blk0000002a/sig000006cc ), + .WCLK(clk), + .WE(\blk00000003/blk0000002a/sig000006fd ), + .SPO(\NLW_blk00000003/blk0000002a/blk00000070_SPO_UNCONNECTED ), + .DPO(\blk00000003/blk0000002a/sig000006e0 ) + ); + RAM32X1D #( + .INIT ( 32'h00000000 )) + \blk00000003/blk0000002a/blk0000006f ( + .A0(\blk00000003/sig000001e9 ), + .A1(\blk00000003/sig000001e8 ), + .A2(\blk00000003/blk0000002a/sig000006cc ), + .A3(\blk00000003/blk0000002a/sig000006cc ), + .A4(\blk00000003/blk0000002a/sig000006cc ), + .D(din_1_1[18]), + .DPRA0(\blk00000003/sig000001de ), + .DPRA1(\blk00000003/sig000001dc ), + .DPRA2(\blk00000003/blk0000002a/sig000006cc ), + .DPRA3(\blk00000003/blk0000002a/sig000006cc ), + .DPRA4(\blk00000003/blk0000002a/sig000006cc ), + .WCLK(clk), + .WE(\blk00000003/blk0000002a/sig000006fd ), + .SPO(\NLW_blk00000003/blk0000002a/blk0000006f_SPO_UNCONNECTED ), + .DPO(\blk00000003/blk0000002a/sig000006df ) + ); + RAM32X1D #( + .INIT ( 32'h00000000 )) + \blk00000003/blk0000002a/blk0000006e ( + .A0(\blk00000003/sig000001e9 ), + .A1(\blk00000003/sig000001e8 ), + .A2(\blk00000003/blk0000002a/sig000006cc ), + .A3(\blk00000003/blk0000002a/sig000006cc ), + .A4(\blk00000003/blk0000002a/sig000006cc ), + .D(din_1_1[20]), + .DPRA0(\blk00000003/sig000001de ), + .DPRA1(\blk00000003/sig000001dc ), + .DPRA2(\blk00000003/blk0000002a/sig000006cc ), + .DPRA3(\blk00000003/blk0000002a/sig000006cc ), + .DPRA4(\blk00000003/blk0000002a/sig000006cc ), + .WCLK(clk), + .WE(\blk00000003/blk0000002a/sig000006fd ), + .SPO(\NLW_blk00000003/blk0000002a/blk0000006e_SPO_UNCONNECTED ), + .DPO(\blk00000003/blk0000002a/sig000006e1 ) + ); + RAM32X1D #( + .INIT ( 32'h00000000 )) + \blk00000003/blk0000002a/blk0000006d ( + .A0(\blk00000003/sig000001e9 ), + .A1(\blk00000003/sig000001e8 ), + .A2(\blk00000003/blk0000002a/sig000006cc ), + .A3(\blk00000003/blk0000002a/sig000006cc ), + .A4(\blk00000003/blk0000002a/sig000006cc ), + .D(din_1_1[16]), + .DPRA0(\blk00000003/sig000001de ), + .DPRA1(\blk00000003/sig000001dc ), + .DPRA2(\blk00000003/blk0000002a/sig000006cc ), + .DPRA3(\blk00000003/blk0000002a/sig000006cc ), + .DPRA4(\blk00000003/blk0000002a/sig000006cc ), + .WCLK(clk), + .WE(\blk00000003/blk0000002a/sig000006fd ), + .SPO(\NLW_blk00000003/blk0000002a/blk0000006d_SPO_UNCONNECTED ), + .DPO(\blk00000003/blk0000002a/sig000006dd ) + ); + RAM32X1D #( + .INIT ( 32'h00000000 )) + \blk00000003/blk0000002a/blk0000006c ( + .A0(\blk00000003/sig000001e9 ), + .A1(\blk00000003/sig000001e8 ), + .A2(\blk00000003/blk0000002a/sig000006cc ), + .A3(\blk00000003/blk0000002a/sig000006cc ), + .A4(\blk00000003/blk0000002a/sig000006cc ), + .D(din_1_1[15]), + .DPRA0(\blk00000003/sig000001de ), + .DPRA1(\blk00000003/sig000001dc ), + .DPRA2(\blk00000003/blk0000002a/sig000006cc ), + .DPRA3(\blk00000003/blk0000002a/sig000006cc ), + .DPRA4(\blk00000003/blk0000002a/sig000006cc ), + .WCLK(clk), + .WE(\blk00000003/blk0000002a/sig000006fd ), + .SPO(\NLW_blk00000003/blk0000002a/blk0000006c_SPO_UNCONNECTED ), + .DPO(\blk00000003/blk0000002a/sig000006dc ) + ); + RAM32X1D #( + .INIT ( 32'h00000000 )) + \blk00000003/blk0000002a/blk0000006b ( + .A0(\blk00000003/sig000001e9 ), + .A1(\blk00000003/sig000001e8 ), + .A2(\blk00000003/blk0000002a/sig000006cc ), + .A3(\blk00000003/blk0000002a/sig000006cc ), + .A4(\blk00000003/blk0000002a/sig000006cc ), + .D(din_1_1[17]), + .DPRA0(\blk00000003/sig000001de ), + .DPRA1(\blk00000003/sig000001dc ), + .DPRA2(\blk00000003/blk0000002a/sig000006cc ), + .DPRA3(\blk00000003/blk0000002a/sig000006cc ), + .DPRA4(\blk00000003/blk0000002a/sig000006cc ), + .WCLK(clk), + .WE(\blk00000003/blk0000002a/sig000006fd ), + .SPO(\NLW_blk00000003/blk0000002a/blk0000006b_SPO_UNCONNECTED ), + .DPO(\blk00000003/blk0000002a/sig000006de ) + ); + RAM32X1D #( + .INIT ( 32'h00000000 )) + \blk00000003/blk0000002a/blk0000006a ( + .A0(\blk00000003/sig000001e9 ), + .A1(\blk00000003/sig000001e8 ), + .A2(\blk00000003/blk0000002a/sig000006cc ), + .A3(\blk00000003/blk0000002a/sig000006cc ), + .A4(\blk00000003/blk0000002a/sig000006cc ), + .D(din_1_1[13]), + .DPRA0(\blk00000003/sig000001de ), + .DPRA1(\blk00000003/sig000001dc ), + .DPRA2(\blk00000003/blk0000002a/sig000006cc ), + .DPRA3(\blk00000003/blk0000002a/sig000006cc ), + .DPRA4(\blk00000003/blk0000002a/sig000006cc ), + .WCLK(clk), + .WE(\blk00000003/blk0000002a/sig000006fd ), + .SPO(\NLW_blk00000003/blk0000002a/blk0000006a_SPO_UNCONNECTED ), + .DPO(\blk00000003/blk0000002a/sig000006da ) + ); + RAM32X1D #( + .INIT ( 32'h00000000 )) + \blk00000003/blk0000002a/blk00000069 ( + .A0(\blk00000003/sig000001e9 ), + .A1(\blk00000003/sig000001e8 ), + .A2(\blk00000003/blk0000002a/sig000006cc ), + .A3(\blk00000003/blk0000002a/sig000006cc ), + .A4(\blk00000003/blk0000002a/sig000006cc ), + .D(din_1_1[12]), + .DPRA0(\blk00000003/sig000001de ), + .DPRA1(\blk00000003/sig000001dc ), + .DPRA2(\blk00000003/blk0000002a/sig000006cc ), + .DPRA3(\blk00000003/blk0000002a/sig000006cc ), + .DPRA4(\blk00000003/blk0000002a/sig000006cc ), + .WCLK(clk), + .WE(\blk00000003/blk0000002a/sig000006fd ), + .SPO(\NLW_blk00000003/blk0000002a/blk00000069_SPO_UNCONNECTED ), + .DPO(\blk00000003/blk0000002a/sig000006d9 ) + ); + RAM32X1D #( + .INIT ( 32'h00000000 )) + \blk00000003/blk0000002a/blk00000068 ( + .A0(\blk00000003/sig000001e9 ), + .A1(\blk00000003/sig000001e8 ), + .A2(\blk00000003/blk0000002a/sig000006cc ), + .A3(\blk00000003/blk0000002a/sig000006cc ), + .A4(\blk00000003/blk0000002a/sig000006cc ), + .D(din_1_1[14]), + .DPRA0(\blk00000003/sig000001de ), + .DPRA1(\blk00000003/sig000001dc ), + .DPRA2(\blk00000003/blk0000002a/sig000006cc ), + .DPRA3(\blk00000003/blk0000002a/sig000006cc ), + .DPRA4(\blk00000003/blk0000002a/sig000006cc ), + .WCLK(clk), + .WE(\blk00000003/blk0000002a/sig000006fd ), + .SPO(\NLW_blk00000003/blk0000002a/blk00000068_SPO_UNCONNECTED ), + .DPO(\blk00000003/blk0000002a/sig000006db ) + ); + RAM32X1D #( + .INIT ( 32'h00000000 )) + \blk00000003/blk0000002a/blk00000067 ( + .A0(\blk00000003/sig000001e9 ), + .A1(\blk00000003/sig000001e8 ), + .A2(\blk00000003/blk0000002a/sig000006cc ), + .A3(\blk00000003/blk0000002a/sig000006cc ), + .A4(\blk00000003/blk0000002a/sig000006cc ), + .D(din_1_1[10]), + .DPRA0(\blk00000003/sig000001de ), + .DPRA1(\blk00000003/sig000001dc ), + .DPRA2(\blk00000003/blk0000002a/sig000006cc ), + .DPRA3(\blk00000003/blk0000002a/sig000006cc ), + .DPRA4(\blk00000003/blk0000002a/sig000006cc ), + .WCLK(clk), + .WE(\blk00000003/blk0000002a/sig000006fd ), + .SPO(\NLW_blk00000003/blk0000002a/blk00000067_SPO_UNCONNECTED ), + .DPO(\blk00000003/blk0000002a/sig000006d7 ) + ); + RAM32X1D #( + .INIT ( 32'h00000000 )) + \blk00000003/blk0000002a/blk00000066 ( + .A0(\blk00000003/sig000001e9 ), + .A1(\blk00000003/sig000001e8 ), + .A2(\blk00000003/blk0000002a/sig000006cc ), + .A3(\blk00000003/blk0000002a/sig000006cc ), + .A4(\blk00000003/blk0000002a/sig000006cc ), + .D(din_1_1[9]), + .DPRA0(\blk00000003/sig000001de ), + .DPRA1(\blk00000003/sig000001dc ), + .DPRA2(\blk00000003/blk0000002a/sig000006cc ), + .DPRA3(\blk00000003/blk0000002a/sig000006cc ), + .DPRA4(\blk00000003/blk0000002a/sig000006cc ), + .WCLK(clk), + .WE(\blk00000003/blk0000002a/sig000006fd ), + .SPO(\NLW_blk00000003/blk0000002a/blk00000066_SPO_UNCONNECTED ), + .DPO(\blk00000003/blk0000002a/sig000006d6 ) + ); + RAM32X1D #( + .INIT ( 32'h00000000 )) + \blk00000003/blk0000002a/blk00000065 ( + .A0(\blk00000003/sig000001e9 ), + .A1(\blk00000003/sig000001e8 ), + .A2(\blk00000003/blk0000002a/sig000006cc ), + .A3(\blk00000003/blk0000002a/sig000006cc ), + .A4(\blk00000003/blk0000002a/sig000006cc ), + .D(din_1_1[11]), + .DPRA0(\blk00000003/sig000001de ), + .DPRA1(\blk00000003/sig000001dc ), + .DPRA2(\blk00000003/blk0000002a/sig000006cc ), + .DPRA3(\blk00000003/blk0000002a/sig000006cc ), + .DPRA4(\blk00000003/blk0000002a/sig000006cc ), + .WCLK(clk), + .WE(\blk00000003/blk0000002a/sig000006fd ), + .SPO(\NLW_blk00000003/blk0000002a/blk00000065_SPO_UNCONNECTED ), + .DPO(\blk00000003/blk0000002a/sig000006d8 ) + ); + RAM32X1D #( + .INIT ( 32'h00000000 )) + \blk00000003/blk0000002a/blk00000064 ( + .A0(\blk00000003/sig000001e9 ), + .A1(\blk00000003/sig000001e8 ), + .A2(\blk00000003/blk0000002a/sig000006cc ), + .A3(\blk00000003/blk0000002a/sig000006cc ), + .A4(\blk00000003/blk0000002a/sig000006cc ), + .D(din_1_1[7]), + .DPRA0(\blk00000003/sig000001de ), + .DPRA1(\blk00000003/sig000001dc ), + .DPRA2(\blk00000003/blk0000002a/sig000006cc ), + .DPRA3(\blk00000003/blk0000002a/sig000006cc ), + .DPRA4(\blk00000003/blk0000002a/sig000006cc ), + .WCLK(clk), + .WE(\blk00000003/blk0000002a/sig000006fd ), + .SPO(\NLW_blk00000003/blk0000002a/blk00000064_SPO_UNCONNECTED ), + .DPO(\blk00000003/blk0000002a/sig000006d4 ) + ); + RAM32X1D #( + .INIT ( 32'h00000000 )) + \blk00000003/blk0000002a/blk00000063 ( + .A0(\blk00000003/sig000001e9 ), + .A1(\blk00000003/sig000001e8 ), + .A2(\blk00000003/blk0000002a/sig000006cc ), + .A3(\blk00000003/blk0000002a/sig000006cc ), + .A4(\blk00000003/blk0000002a/sig000006cc ), + .D(din_1_1[6]), + .DPRA0(\blk00000003/sig000001de ), + .DPRA1(\blk00000003/sig000001dc ), + .DPRA2(\blk00000003/blk0000002a/sig000006cc ), + .DPRA3(\blk00000003/blk0000002a/sig000006cc ), + .DPRA4(\blk00000003/blk0000002a/sig000006cc ), + .WCLK(clk), + .WE(\blk00000003/blk0000002a/sig000006fd ), + .SPO(\NLW_blk00000003/blk0000002a/blk00000063_SPO_UNCONNECTED ), + .DPO(\blk00000003/blk0000002a/sig000006d3 ) + ); + RAM32X1D #( + .INIT ( 32'h00000000 )) + \blk00000003/blk0000002a/blk00000062 ( + .A0(\blk00000003/sig000001e9 ), + .A1(\blk00000003/sig000001e8 ), + .A2(\blk00000003/blk0000002a/sig000006cc ), + .A3(\blk00000003/blk0000002a/sig000006cc ), + .A4(\blk00000003/blk0000002a/sig000006cc ), + .D(din_1_1[8]), + .DPRA0(\blk00000003/sig000001de ), + .DPRA1(\blk00000003/sig000001dc ), + .DPRA2(\blk00000003/blk0000002a/sig000006cc ), + .DPRA3(\blk00000003/blk0000002a/sig000006cc ), + .DPRA4(\blk00000003/blk0000002a/sig000006cc ), + .WCLK(clk), + .WE(\blk00000003/blk0000002a/sig000006fd ), + .SPO(\NLW_blk00000003/blk0000002a/blk00000062_SPO_UNCONNECTED ), + .DPO(\blk00000003/blk0000002a/sig000006d5 ) + ); + RAM32X1D #( + .INIT ( 32'h00000000 )) + \blk00000003/blk0000002a/blk00000061 ( + .A0(\blk00000003/sig000001e9 ), + .A1(\blk00000003/sig000001e8 ), + .A2(\blk00000003/blk0000002a/sig000006cc ), + .A3(\blk00000003/blk0000002a/sig000006cc ), + .A4(\blk00000003/blk0000002a/sig000006cc ), + .D(din_1_1[4]), + .DPRA0(\blk00000003/sig000001de ), + .DPRA1(\blk00000003/sig000001dc ), + .DPRA2(\blk00000003/blk0000002a/sig000006cc ), + .DPRA3(\blk00000003/blk0000002a/sig000006cc ), + .DPRA4(\blk00000003/blk0000002a/sig000006cc ), + .WCLK(clk), + .WE(\blk00000003/blk0000002a/sig000006fd ), + .SPO(\NLW_blk00000003/blk0000002a/blk00000061_SPO_UNCONNECTED ), + .DPO(\blk00000003/blk0000002a/sig000006d1 ) + ); + RAM32X1D #( + .INIT ( 32'h00000000 )) + \blk00000003/blk0000002a/blk00000060 ( + .A0(\blk00000003/sig000001e9 ), + .A1(\blk00000003/sig000001e8 ), + .A2(\blk00000003/blk0000002a/sig000006cc ), + .A3(\blk00000003/blk0000002a/sig000006cc ), + .A4(\blk00000003/blk0000002a/sig000006cc ), + .D(din_1_1[3]), + .DPRA0(\blk00000003/sig000001de ), + .DPRA1(\blk00000003/sig000001dc ), + .DPRA2(\blk00000003/blk0000002a/sig000006cc ), + .DPRA3(\blk00000003/blk0000002a/sig000006cc ), + .DPRA4(\blk00000003/blk0000002a/sig000006cc ), + .WCLK(clk), + .WE(\blk00000003/blk0000002a/sig000006fd ), + .SPO(\NLW_blk00000003/blk0000002a/blk00000060_SPO_UNCONNECTED ), + .DPO(\blk00000003/blk0000002a/sig000006d0 ) + ); + RAM32X1D #( + .INIT ( 32'h00000000 )) + \blk00000003/blk0000002a/blk0000005f ( + .A0(\blk00000003/sig000001e9 ), + .A1(\blk00000003/sig000001e8 ), + .A2(\blk00000003/blk0000002a/sig000006cc ), + .A3(\blk00000003/blk0000002a/sig000006cc ), + .A4(\blk00000003/blk0000002a/sig000006cc ), + .D(din_1_1[5]), + .DPRA0(\blk00000003/sig000001de ), + .DPRA1(\blk00000003/sig000001dc ), + .DPRA2(\blk00000003/blk0000002a/sig000006cc ), + .DPRA3(\blk00000003/blk0000002a/sig000006cc ), + .DPRA4(\blk00000003/blk0000002a/sig000006cc ), + .WCLK(clk), + .WE(\blk00000003/blk0000002a/sig000006fd ), + .SPO(\NLW_blk00000003/blk0000002a/blk0000005f_SPO_UNCONNECTED ), + .DPO(\blk00000003/blk0000002a/sig000006d2 ) + ); + RAM32X1D #( + .INIT ( 32'h00000000 )) + \blk00000003/blk0000002a/blk0000005e ( + .A0(\blk00000003/sig000001e9 ), + .A1(\blk00000003/sig000001e8 ), + .A2(\blk00000003/blk0000002a/sig000006cc ), + .A3(\blk00000003/blk0000002a/sig000006cc ), + .A4(\blk00000003/blk0000002a/sig000006cc ), + .D(din_1_1[1]), + .DPRA0(\blk00000003/sig000001de ), + .DPRA1(\blk00000003/sig000001dc ), + .DPRA2(\blk00000003/blk0000002a/sig000006cc ), + .DPRA3(\blk00000003/blk0000002a/sig000006cc ), + .DPRA4(\blk00000003/blk0000002a/sig000006cc ), + .WCLK(clk), + .WE(\blk00000003/blk0000002a/sig000006fd ), + .SPO(\NLW_blk00000003/blk0000002a/blk0000005e_SPO_UNCONNECTED ), + .DPO(\blk00000003/blk0000002a/sig000006ce ) + ); + RAM32X1D #( + .INIT ( 32'h00000000 )) + \blk00000003/blk0000002a/blk0000005d ( + .A0(\blk00000003/sig000001e9 ), + .A1(\blk00000003/sig000001e8 ), + .A2(\blk00000003/blk0000002a/sig000006cc ), + .A3(\blk00000003/blk0000002a/sig000006cc ), + .A4(\blk00000003/blk0000002a/sig000006cc ), + .D(din_1_1[0]), + .DPRA0(\blk00000003/sig000001de ), + .DPRA1(\blk00000003/sig000001dc ), + .DPRA2(\blk00000003/blk0000002a/sig000006cc ), + .DPRA3(\blk00000003/blk0000002a/sig000006cc ), + .DPRA4(\blk00000003/blk0000002a/sig000006cc ), + .WCLK(clk), + .WE(\blk00000003/blk0000002a/sig000006fd ), + .SPO(\NLW_blk00000003/blk0000002a/blk0000005d_SPO_UNCONNECTED ), + .DPO(\blk00000003/blk0000002a/sig000006cd ) + ); + RAM32X1D #( + .INIT ( 32'h00000000 )) + \blk00000003/blk0000002a/blk0000005c ( + .A0(\blk00000003/sig000001e9 ), + .A1(\blk00000003/sig000001e8 ), + .A2(\blk00000003/blk0000002a/sig000006cc ), + .A3(\blk00000003/blk0000002a/sig000006cc ), + .A4(\blk00000003/blk0000002a/sig000006cc ), + .D(din_1_1[2]), + .DPRA0(\blk00000003/sig000001de ), + .DPRA1(\blk00000003/sig000001dc ), + .DPRA2(\blk00000003/blk0000002a/sig000006cc ), + .DPRA3(\blk00000003/blk0000002a/sig000006cc ), + .DPRA4(\blk00000003/blk0000002a/sig000006cc ), + .WCLK(clk), + .WE(\blk00000003/blk0000002a/sig000006fd ), + .SPO(\NLW_blk00000003/blk0000002a/blk0000005c_SPO_UNCONNECTED ), + .DPO(\blk00000003/blk0000002a/sig000006cf ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk0000002a/blk0000005b ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk0000002a/sig000006fc ), + .Q(\blk00000003/sig000001ea ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk0000002a/blk0000005a ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk0000002a/sig000006fb ), + .Q(\blk00000003/sig000001eb ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk0000002a/blk00000059 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk0000002a/sig000006fa ), + .Q(\blk00000003/sig000001ec ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk0000002a/blk00000058 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk0000002a/sig000006f9 ), + .Q(\blk00000003/sig000001ed ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk0000002a/blk00000057 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk0000002a/sig000006f8 ), + .Q(\blk00000003/sig000001ee ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk0000002a/blk00000056 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk0000002a/sig000006f7 ), + .Q(\blk00000003/sig000001ef ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk0000002a/blk00000055 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk0000002a/sig000006f6 ), + .Q(\blk00000003/sig000001f0 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk0000002a/blk00000054 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk0000002a/sig000006f5 ), + .Q(\blk00000003/sig000001f1 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk0000002a/blk00000053 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk0000002a/sig000006f4 ), + .Q(\blk00000003/sig000001f2 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk0000002a/blk00000052 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk0000002a/sig000006f3 ), + .Q(\blk00000003/sig000001f3 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk0000002a/blk00000051 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk0000002a/sig000006f2 ), + .Q(\blk00000003/sig000001f4 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk0000002a/blk00000050 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk0000002a/sig000006f1 ), + .Q(\blk00000003/sig000001f5 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk0000002a/blk0000004f ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk0000002a/sig000006f0 ), + .Q(\blk00000003/sig000001f6 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk0000002a/blk0000004e ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk0000002a/sig000006ef ), + .Q(\blk00000003/sig000001f7 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk0000002a/blk0000004d ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk0000002a/sig000006ee ), + .Q(\blk00000003/sig000001f8 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk0000002a/blk0000004c ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk0000002a/sig000006ed ), + .Q(\blk00000003/sig000001f9 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk0000002a/blk0000004b ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk0000002a/sig000006ec ), + .Q(\blk00000003/sig000001fa ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk0000002a/blk0000004a ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk0000002a/sig000006eb ), + .Q(\blk00000003/sig000001fb ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk0000002a/blk00000049 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk0000002a/sig000006ea ), + .Q(\blk00000003/sig000001fc ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk0000002a/blk00000048 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk0000002a/sig000006e9 ), + .Q(\blk00000003/sig000001fd ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk0000002a/blk00000047 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk0000002a/sig000006e8 ), + .Q(\blk00000003/sig000001fe ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk0000002a/blk00000046 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk0000002a/sig000006e7 ), + .Q(\blk00000003/sig000001ff ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk0000002a/blk00000045 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk0000002a/sig000006e6 ), + .Q(\blk00000003/sig00000200 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk0000002a/blk00000044 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk0000002a/sig000006e5 ), + .Q(\blk00000003/sig00000201 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk0000002a/blk00000043 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk0000002a/sig000006e4 ), + .Q(\blk00000003/sig00000202 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk0000002a/blk00000042 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk0000002a/sig000006e3 ), + .Q(\blk00000003/sig00000203 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk0000002a/blk00000041 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk0000002a/sig000006e2 ), + .Q(\blk00000003/sig00000204 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk0000002a/blk00000040 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk0000002a/sig000006e1 ), + .Q(\blk00000003/sig00000205 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk0000002a/blk0000003f ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk0000002a/sig000006e0 ), + .Q(\blk00000003/sig00000206 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk0000002a/blk0000003e ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk0000002a/sig000006df ), + .Q(\blk00000003/sig00000207 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk0000002a/blk0000003d ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk0000002a/sig000006de ), + .Q(\blk00000003/sig00000208 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk0000002a/blk0000003c ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk0000002a/sig000006dd ), + .Q(\blk00000003/sig00000209 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk0000002a/blk0000003b ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk0000002a/sig000006dc ), + .Q(\blk00000003/sig0000020a ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk0000002a/blk0000003a ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk0000002a/sig000006db ), + .Q(\blk00000003/sig0000020b ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk0000002a/blk00000039 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk0000002a/sig000006da ), + .Q(\blk00000003/sig0000020c ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk0000002a/blk00000038 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk0000002a/sig000006d9 ), + .Q(\blk00000003/sig0000020d ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk0000002a/blk00000037 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk0000002a/sig000006d8 ), + .Q(\blk00000003/sig0000020e ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk0000002a/blk00000036 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk0000002a/sig000006d7 ), + .Q(\blk00000003/sig0000020f ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk0000002a/blk00000035 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk0000002a/sig000006d6 ), + .Q(\blk00000003/sig00000210 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk0000002a/blk00000034 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk0000002a/sig000006d5 ), + .Q(\blk00000003/sig00000211 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk0000002a/blk00000033 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk0000002a/sig000006d4 ), + .Q(\blk00000003/sig00000212 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk0000002a/blk00000032 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk0000002a/sig000006d3 ), + .Q(\blk00000003/sig00000213 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk0000002a/blk00000031 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk0000002a/sig000006d2 ), + .Q(\blk00000003/sig00000214 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk0000002a/blk00000030 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk0000002a/sig000006d1 ), + .Q(\blk00000003/sig00000215 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk0000002a/blk0000002f ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk0000002a/sig000006d0 ), + .Q(\blk00000003/sig00000216 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk0000002a/blk0000002e ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk0000002a/sig000006cf ), + .Q(\blk00000003/sig00000217 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk0000002a/blk0000002d ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk0000002a/sig000006ce ), + .Q(\blk00000003/sig00000218 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk0000002a/blk0000002c ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk0000002a/sig000006cd ), + .Q(\blk00000003/sig00000219 ) + ); + GND \blk00000003/blk0000002a/blk0000002b ( + .G(\blk00000003/blk0000002a/sig000006cc ) + ); + LUT2 #( + .INIT ( 4'h8 )) + \blk00000003/blk00000119/blk0000014b ( + .I0(ce), + .I1(\blk00000003/sig00000435 ), + .O(\blk00000003/blk00000119/sig0000074d ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000119/blk0000014a ( + .A0(\blk00000003/sig0000042d ), + .A1(\blk00000003/sig0000042c ), + .A2(\blk00000003/sig0000042b ), + .A3(\blk00000003/blk00000119/sig00000734 ), + .CE(\blk00000003/blk00000119/sig0000074d ), + .CLK(clk), + .D(\blk00000003/sig000002f5 ), + .Q(\blk00000003/blk00000119/sig0000074b ), + .Q15(\NLW_blk00000003/blk00000119/blk0000014a_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000119/blk00000149 ( + .A0(\blk00000003/sig0000042d ), + .A1(\blk00000003/sig0000042c ), + .A2(\blk00000003/sig0000042b ), + .A3(\blk00000003/blk00000119/sig00000734 ), + .CE(\blk00000003/blk00000119/sig0000074d ), + .CLK(clk), + .D(\blk00000003/sig000002f6 ), + .Q(\blk00000003/blk00000119/sig0000074a ), + .Q15(\NLW_blk00000003/blk00000119/blk00000149_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000119/blk00000148 ( + .A0(\blk00000003/sig0000042d ), + .A1(\blk00000003/sig0000042c ), + .A2(\blk00000003/sig0000042b ), + .A3(\blk00000003/blk00000119/sig00000734 ), + .CE(\blk00000003/blk00000119/sig0000074d ), + .CLK(clk), + .D(\blk00000003/sig000002f4 ), + .Q(\blk00000003/blk00000119/sig0000074c ), + .Q15(\NLW_blk00000003/blk00000119/blk00000148_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000119/blk00000147 ( + .A0(\blk00000003/sig0000042d ), + .A1(\blk00000003/sig0000042c ), + .A2(\blk00000003/sig0000042b ), + .A3(\blk00000003/blk00000119/sig00000734 ), + .CE(\blk00000003/blk00000119/sig0000074d ), + .CLK(clk), + .D(\blk00000003/sig000002f8 ), + .Q(\blk00000003/blk00000119/sig00000748 ), + .Q15(\NLW_blk00000003/blk00000119/blk00000147_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000119/blk00000146 ( + .A0(\blk00000003/sig0000042d ), + .A1(\blk00000003/sig0000042c ), + .A2(\blk00000003/sig0000042b ), + .A3(\blk00000003/blk00000119/sig00000734 ), + .CE(\blk00000003/blk00000119/sig0000074d ), + .CLK(clk), + .D(\blk00000003/sig000002f9 ), + .Q(\blk00000003/blk00000119/sig00000747 ), + .Q15(\NLW_blk00000003/blk00000119/blk00000146_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000119/blk00000145 ( + .A0(\blk00000003/sig0000042d ), + .A1(\blk00000003/sig0000042c ), + .A2(\blk00000003/sig0000042b ), + .A3(\blk00000003/blk00000119/sig00000734 ), + .CE(\blk00000003/blk00000119/sig0000074d ), + .CLK(clk), + .D(\blk00000003/sig000002f7 ), + .Q(\blk00000003/blk00000119/sig00000749 ), + .Q15(\NLW_blk00000003/blk00000119/blk00000145_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000119/blk00000144 ( + .A0(\blk00000003/sig0000042d ), + .A1(\blk00000003/sig0000042c ), + .A2(\blk00000003/sig0000042b ), + .A3(\blk00000003/blk00000119/sig00000734 ), + .CE(\blk00000003/blk00000119/sig0000074d ), + .CLK(clk), + .D(\blk00000003/sig000002fb ), + .Q(\blk00000003/blk00000119/sig00000745 ), + .Q15(\NLW_blk00000003/blk00000119/blk00000144_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000119/blk00000143 ( + .A0(\blk00000003/sig0000042d ), + .A1(\blk00000003/sig0000042c ), + .A2(\blk00000003/sig0000042b ), + .A3(\blk00000003/blk00000119/sig00000734 ), + .CE(\blk00000003/blk00000119/sig0000074d ), + .CLK(clk), + .D(\blk00000003/sig000002fc ), + .Q(\blk00000003/blk00000119/sig00000744 ), + .Q15(\NLW_blk00000003/blk00000119/blk00000143_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000119/blk00000142 ( + .A0(\blk00000003/sig0000042d ), + .A1(\blk00000003/sig0000042c ), + .A2(\blk00000003/sig0000042b ), + .A3(\blk00000003/blk00000119/sig00000734 ), + .CE(\blk00000003/blk00000119/sig0000074d ), + .CLK(clk), + .D(\blk00000003/sig000002fa ), + .Q(\blk00000003/blk00000119/sig00000746 ), + .Q15(\NLW_blk00000003/blk00000119/blk00000142_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000119/blk00000141 ( + .A0(\blk00000003/sig0000042d ), + .A1(\blk00000003/sig0000042c ), + .A2(\blk00000003/sig0000042b ), + .A3(\blk00000003/blk00000119/sig00000734 ), + .CE(\blk00000003/blk00000119/sig0000074d ), + .CLK(clk), + .D(\blk00000003/sig000002fe ), + .Q(\blk00000003/blk00000119/sig00000742 ), + .Q15(\NLW_blk00000003/blk00000119/blk00000141_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000119/blk00000140 ( + .A0(\blk00000003/sig0000042d ), + .A1(\blk00000003/sig0000042c ), + .A2(\blk00000003/sig0000042b ), + .A3(\blk00000003/blk00000119/sig00000734 ), + .CE(\blk00000003/blk00000119/sig0000074d ), + .CLK(clk), + .D(\blk00000003/sig000002ff ), + .Q(\blk00000003/blk00000119/sig00000741 ), + .Q15(\NLW_blk00000003/blk00000119/blk00000140_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000119/blk0000013f ( + .A0(\blk00000003/sig0000042d ), + .A1(\blk00000003/sig0000042c ), + .A2(\blk00000003/sig0000042b ), + .A3(\blk00000003/blk00000119/sig00000734 ), + .CE(\blk00000003/blk00000119/sig0000074d ), + .CLK(clk), + .D(\blk00000003/sig000002fd ), + .Q(\blk00000003/blk00000119/sig00000743 ), + .Q15(\NLW_blk00000003/blk00000119/blk0000013f_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000119/blk0000013e ( + .A0(\blk00000003/sig0000042d ), + .A1(\blk00000003/sig0000042c ), + .A2(\blk00000003/sig0000042b ), + .A3(\blk00000003/blk00000119/sig00000734 ), + .CE(\blk00000003/blk00000119/sig0000074d ), + .CLK(clk), + .D(\blk00000003/sig00000301 ), + .Q(\blk00000003/blk00000119/sig0000073f ), + .Q15(\NLW_blk00000003/blk00000119/blk0000013e_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000119/blk0000013d ( + .A0(\blk00000003/sig0000042d ), + .A1(\blk00000003/sig0000042c ), + .A2(\blk00000003/sig0000042b ), + .A3(\blk00000003/blk00000119/sig00000734 ), + .CE(\blk00000003/blk00000119/sig0000074d ), + .CLK(clk), + .D(\blk00000003/sig00000302 ), + .Q(\blk00000003/blk00000119/sig0000073e ), + .Q15(\NLW_blk00000003/blk00000119/blk0000013d_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000119/blk0000013c ( + .A0(\blk00000003/sig0000042d ), + .A1(\blk00000003/sig0000042c ), + .A2(\blk00000003/sig0000042b ), + .A3(\blk00000003/blk00000119/sig00000734 ), + .CE(\blk00000003/blk00000119/sig0000074d ), + .CLK(clk), + .D(\blk00000003/sig00000300 ), + .Q(\blk00000003/blk00000119/sig00000740 ), + .Q15(\NLW_blk00000003/blk00000119/blk0000013c_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000119/blk0000013b ( + .A0(\blk00000003/sig0000042d ), + .A1(\blk00000003/sig0000042c ), + .A2(\blk00000003/sig0000042b ), + .A3(\blk00000003/blk00000119/sig00000734 ), + .CE(\blk00000003/blk00000119/sig0000074d ), + .CLK(clk), + .D(\blk00000003/sig00000304 ), + .Q(\blk00000003/blk00000119/sig0000073c ), + .Q15(\NLW_blk00000003/blk00000119/blk0000013b_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000119/blk0000013a ( + .A0(\blk00000003/sig0000042d ), + .A1(\blk00000003/sig0000042c ), + .A2(\blk00000003/sig0000042b ), + .A3(\blk00000003/blk00000119/sig00000734 ), + .CE(\blk00000003/blk00000119/sig0000074d ), + .CLK(clk), + .D(\blk00000003/sig00000305 ), + .Q(\blk00000003/blk00000119/sig0000073b ), + .Q15(\NLW_blk00000003/blk00000119/blk0000013a_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000119/blk00000139 ( + .A0(\blk00000003/sig0000042d ), + .A1(\blk00000003/sig0000042c ), + .A2(\blk00000003/sig0000042b ), + .A3(\blk00000003/blk00000119/sig00000734 ), + .CE(\blk00000003/blk00000119/sig0000074d ), + .CLK(clk), + .D(\blk00000003/sig00000303 ), + .Q(\blk00000003/blk00000119/sig0000073d ), + .Q15(\NLW_blk00000003/blk00000119/blk00000139_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000119/blk00000138 ( + .A0(\blk00000003/sig0000042d ), + .A1(\blk00000003/sig0000042c ), + .A2(\blk00000003/sig0000042b ), + .A3(\blk00000003/blk00000119/sig00000734 ), + .CE(\blk00000003/blk00000119/sig0000074d ), + .CLK(clk), + .D(\blk00000003/sig00000307 ), + .Q(\blk00000003/blk00000119/sig00000739 ), + .Q15(\NLW_blk00000003/blk00000119/blk00000138_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000119/blk00000137 ( + .A0(\blk00000003/sig0000042d ), + .A1(\blk00000003/sig0000042c ), + .A2(\blk00000003/sig0000042b ), + .A3(\blk00000003/blk00000119/sig00000734 ), + .CE(\blk00000003/blk00000119/sig0000074d ), + .CLK(clk), + .D(\blk00000003/sig00000308 ), + .Q(\blk00000003/blk00000119/sig00000738 ), + .Q15(\NLW_blk00000003/blk00000119/blk00000137_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000119/blk00000136 ( + .A0(\blk00000003/sig0000042d ), + .A1(\blk00000003/sig0000042c ), + .A2(\blk00000003/sig0000042b ), + .A3(\blk00000003/blk00000119/sig00000734 ), + .CE(\blk00000003/blk00000119/sig0000074d ), + .CLK(clk), + .D(\blk00000003/sig00000306 ), + .Q(\blk00000003/blk00000119/sig0000073a ), + .Q15(\NLW_blk00000003/blk00000119/blk00000136_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000119/blk00000135 ( + .A0(\blk00000003/sig0000042d ), + .A1(\blk00000003/sig0000042c ), + .A2(\blk00000003/sig0000042b ), + .A3(\blk00000003/blk00000119/sig00000734 ), + .CE(\blk00000003/blk00000119/sig0000074d ), + .CLK(clk), + .D(\blk00000003/sig0000030a ), + .Q(\blk00000003/blk00000119/sig00000736 ), + .Q15(\NLW_blk00000003/blk00000119/blk00000135_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000119/blk00000134 ( + .A0(\blk00000003/sig0000042d ), + .A1(\blk00000003/sig0000042c ), + .A2(\blk00000003/sig0000042b ), + .A3(\blk00000003/blk00000119/sig00000734 ), + .CE(\blk00000003/blk00000119/sig0000074d ), + .CLK(clk), + .D(\blk00000003/sig0000030b ), + .Q(\blk00000003/blk00000119/sig00000735 ), + .Q15(\NLW_blk00000003/blk00000119/blk00000134_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000119/blk00000133 ( + .A0(\blk00000003/sig0000042d ), + .A1(\blk00000003/sig0000042c ), + .A2(\blk00000003/sig0000042b ), + .A3(\blk00000003/blk00000119/sig00000734 ), + .CE(\blk00000003/blk00000119/sig0000074d ), + .CLK(clk), + .D(\blk00000003/sig00000309 ), + .Q(\blk00000003/blk00000119/sig00000737 ), + .Q15(\NLW_blk00000003/blk00000119/blk00000133_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000119/blk00000132 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk00000119/sig0000074c ), + .Q(\blk00000003/sig000003c6 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000119/blk00000131 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk00000119/sig0000074b ), + .Q(\blk00000003/sig000003c7 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000119/blk00000130 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk00000119/sig0000074a ), + .Q(\blk00000003/sig000003c8 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000119/blk0000012f ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk00000119/sig00000749 ), + .Q(\blk00000003/sig000003c9 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000119/blk0000012e ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk00000119/sig00000748 ), + .Q(\blk00000003/sig000003ca ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000119/blk0000012d ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk00000119/sig00000747 ), + .Q(\blk00000003/sig000003cb ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000119/blk0000012c ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk00000119/sig00000746 ), + .Q(\blk00000003/sig000003cc ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000119/blk0000012b ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk00000119/sig00000745 ), + .Q(\blk00000003/sig000003cd ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000119/blk0000012a ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk00000119/sig00000744 ), + .Q(\blk00000003/sig000003ce ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000119/blk00000129 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk00000119/sig00000743 ), + .Q(\blk00000003/sig000003cf ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000119/blk00000128 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk00000119/sig00000742 ), + .Q(\blk00000003/sig000003d0 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000119/blk00000127 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk00000119/sig00000741 ), + .Q(\blk00000003/sig000003d1 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000119/blk00000126 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk00000119/sig00000740 ), + .Q(\blk00000003/sig000003d2 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000119/blk00000125 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk00000119/sig0000073f ), + .Q(\blk00000003/sig000003d3 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000119/blk00000124 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk00000119/sig0000073e ), + .Q(\blk00000003/sig000003d4 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000119/blk00000123 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk00000119/sig0000073d ), + .Q(\blk00000003/sig000003d5 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000119/blk00000122 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk00000119/sig0000073c ), + .Q(\blk00000003/sig000003d6 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000119/blk00000121 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk00000119/sig0000073b ), + .Q(\blk00000003/sig000003d7 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000119/blk00000120 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk00000119/sig0000073a ), + .Q(\blk00000003/sig000003d8 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000119/blk0000011f ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk00000119/sig00000739 ), + .Q(\blk00000003/sig000003d9 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000119/blk0000011e ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk00000119/sig00000738 ), + .Q(\blk00000003/sig000003da ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000119/blk0000011d ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk00000119/sig00000737 ), + .Q(\blk00000003/sig000003db ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000119/blk0000011c ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk00000119/sig00000736 ), + .Q(\blk00000003/sig000003dc ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000119/blk0000011b ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk00000119/sig00000735 ), + .Q(\blk00000003/sig000003dd ) + ); + GND \blk00000003/blk00000119/blk0000011a ( + .G(\blk00000003/blk00000119/sig00000734 ) + ); + LUT2 #( + .INIT ( 4'h8 )) + \blk00000003/blk0000014c/blk0000017e ( + .I0(ce), + .I1(\blk00000003/sig0000042f ), + .O(\blk00000003/blk0000014c/sig0000079d ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk0000014c/blk0000017d ( + .A0(\blk00000003/sig00000438 ), + .A1(\blk00000003/sig00000437 ), + .A2(\blk00000003/sig00000436 ), + .A3(\blk00000003/blk0000014c/sig00000784 ), + .CE(\blk00000003/blk0000014c/sig0000079d ), + .CLK(clk), + .D(\blk00000003/sig0000043a ), + .Q(\blk00000003/blk0000014c/sig0000079b ), + .Q15(\NLW_blk00000003/blk0000014c/blk0000017d_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk0000014c/blk0000017c ( + .A0(\blk00000003/sig00000438 ), + .A1(\blk00000003/sig00000437 ), + .A2(\blk00000003/sig00000436 ), + .A3(\blk00000003/blk0000014c/sig00000784 ), + .CE(\blk00000003/blk0000014c/sig0000079d ), + .CLK(clk), + .D(\blk00000003/sig0000043b ), + .Q(\blk00000003/blk0000014c/sig0000079a ), + .Q15(\NLW_blk00000003/blk0000014c/blk0000017c_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk0000014c/blk0000017b ( + .A0(\blk00000003/sig00000438 ), + .A1(\blk00000003/sig00000437 ), + .A2(\blk00000003/sig00000436 ), + .A3(\blk00000003/blk0000014c/sig00000784 ), + .CE(\blk00000003/blk0000014c/sig0000079d ), + .CLK(clk), + .D(\blk00000003/sig00000439 ), + .Q(\blk00000003/blk0000014c/sig0000079c ), + .Q15(\NLW_blk00000003/blk0000014c/blk0000017b_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk0000014c/blk0000017a ( + .A0(\blk00000003/sig00000438 ), + .A1(\blk00000003/sig00000437 ), + .A2(\blk00000003/sig00000436 ), + .A3(\blk00000003/blk0000014c/sig00000784 ), + .CE(\blk00000003/blk0000014c/sig0000079d ), + .CLK(clk), + .D(\blk00000003/sig0000043d ), + .Q(\blk00000003/blk0000014c/sig00000798 ), + .Q15(\NLW_blk00000003/blk0000014c/blk0000017a_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk0000014c/blk00000179 ( + .A0(\blk00000003/sig00000438 ), + .A1(\blk00000003/sig00000437 ), + .A2(\blk00000003/sig00000436 ), + .A3(\blk00000003/blk0000014c/sig00000784 ), + .CE(\blk00000003/blk0000014c/sig0000079d ), + .CLK(clk), + .D(\blk00000003/sig0000043e ), + .Q(\blk00000003/blk0000014c/sig00000797 ), + .Q15(\NLW_blk00000003/blk0000014c/blk00000179_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk0000014c/blk00000178 ( + .A0(\blk00000003/sig00000438 ), + .A1(\blk00000003/sig00000437 ), + .A2(\blk00000003/sig00000436 ), + .A3(\blk00000003/blk0000014c/sig00000784 ), + .CE(\blk00000003/blk0000014c/sig0000079d ), + .CLK(clk), + .D(\blk00000003/sig0000043c ), + .Q(\blk00000003/blk0000014c/sig00000799 ), + .Q15(\NLW_blk00000003/blk0000014c/blk00000178_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk0000014c/blk00000177 ( + .A0(\blk00000003/sig00000438 ), + .A1(\blk00000003/sig00000437 ), + .A2(\blk00000003/sig00000436 ), + .A3(\blk00000003/blk0000014c/sig00000784 ), + .CE(\blk00000003/blk0000014c/sig0000079d ), + .CLK(clk), + .D(\blk00000003/sig00000440 ), + .Q(\blk00000003/blk0000014c/sig00000795 ), + .Q15(\NLW_blk00000003/blk0000014c/blk00000177_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk0000014c/blk00000176 ( + .A0(\blk00000003/sig00000438 ), + .A1(\blk00000003/sig00000437 ), + .A2(\blk00000003/sig00000436 ), + .A3(\blk00000003/blk0000014c/sig00000784 ), + .CE(\blk00000003/blk0000014c/sig0000079d ), + .CLK(clk), + .D(\blk00000003/sig00000441 ), + .Q(\blk00000003/blk0000014c/sig00000794 ), + .Q15(\NLW_blk00000003/blk0000014c/blk00000176_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk0000014c/blk00000175 ( + .A0(\blk00000003/sig00000438 ), + .A1(\blk00000003/sig00000437 ), + .A2(\blk00000003/sig00000436 ), + .A3(\blk00000003/blk0000014c/sig00000784 ), + .CE(\blk00000003/blk0000014c/sig0000079d ), + .CLK(clk), + .D(\blk00000003/sig0000043f ), + .Q(\blk00000003/blk0000014c/sig00000796 ), + .Q15(\NLW_blk00000003/blk0000014c/blk00000175_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk0000014c/blk00000174 ( + .A0(\blk00000003/sig00000438 ), + .A1(\blk00000003/sig00000437 ), + .A2(\blk00000003/sig00000436 ), + .A3(\blk00000003/blk0000014c/sig00000784 ), + .CE(\blk00000003/blk0000014c/sig0000079d ), + .CLK(clk), + .D(\blk00000003/sig00000443 ), + .Q(\blk00000003/blk0000014c/sig00000792 ), + .Q15(\NLW_blk00000003/blk0000014c/blk00000174_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk0000014c/blk00000173 ( + .A0(\blk00000003/sig00000438 ), + .A1(\blk00000003/sig00000437 ), + .A2(\blk00000003/sig00000436 ), + .A3(\blk00000003/blk0000014c/sig00000784 ), + .CE(\blk00000003/blk0000014c/sig0000079d ), + .CLK(clk), + .D(\blk00000003/sig00000444 ), + .Q(\blk00000003/blk0000014c/sig00000791 ), + .Q15(\NLW_blk00000003/blk0000014c/blk00000173_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk0000014c/blk00000172 ( + .A0(\blk00000003/sig00000438 ), + .A1(\blk00000003/sig00000437 ), + .A2(\blk00000003/sig00000436 ), + .A3(\blk00000003/blk0000014c/sig00000784 ), + .CE(\blk00000003/blk0000014c/sig0000079d ), + .CLK(clk), + .D(\blk00000003/sig00000442 ), + .Q(\blk00000003/blk0000014c/sig00000793 ), + .Q15(\NLW_blk00000003/blk0000014c/blk00000172_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk0000014c/blk00000171 ( + .A0(\blk00000003/sig00000438 ), + .A1(\blk00000003/sig00000437 ), + .A2(\blk00000003/sig00000436 ), + .A3(\blk00000003/blk0000014c/sig00000784 ), + .CE(\blk00000003/blk0000014c/sig0000079d ), + .CLK(clk), + .D(\blk00000003/sig00000446 ), + .Q(\blk00000003/blk0000014c/sig0000078f ), + .Q15(\NLW_blk00000003/blk0000014c/blk00000171_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk0000014c/blk00000170 ( + .A0(\blk00000003/sig00000438 ), + .A1(\blk00000003/sig00000437 ), + .A2(\blk00000003/sig00000436 ), + .A3(\blk00000003/blk0000014c/sig00000784 ), + .CE(\blk00000003/blk0000014c/sig0000079d ), + .CLK(clk), + .D(\blk00000003/sig00000447 ), + .Q(\blk00000003/blk0000014c/sig0000078e ), + .Q15(\NLW_blk00000003/blk0000014c/blk00000170_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk0000014c/blk0000016f ( + .A0(\blk00000003/sig00000438 ), + .A1(\blk00000003/sig00000437 ), + .A2(\blk00000003/sig00000436 ), + .A3(\blk00000003/blk0000014c/sig00000784 ), + .CE(\blk00000003/blk0000014c/sig0000079d ), + .CLK(clk), + .D(\blk00000003/sig00000445 ), + .Q(\blk00000003/blk0000014c/sig00000790 ), + .Q15(\NLW_blk00000003/blk0000014c/blk0000016f_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk0000014c/blk0000016e ( + .A0(\blk00000003/sig00000438 ), + .A1(\blk00000003/sig00000437 ), + .A2(\blk00000003/sig00000436 ), + .A3(\blk00000003/blk0000014c/sig00000784 ), + .CE(\blk00000003/blk0000014c/sig0000079d ), + .CLK(clk), + .D(\blk00000003/sig00000449 ), + .Q(\blk00000003/blk0000014c/sig0000078c ), + .Q15(\NLW_blk00000003/blk0000014c/blk0000016e_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk0000014c/blk0000016d ( + .A0(\blk00000003/sig00000438 ), + .A1(\blk00000003/sig00000437 ), + .A2(\blk00000003/sig00000436 ), + .A3(\blk00000003/blk0000014c/sig00000784 ), + .CE(\blk00000003/blk0000014c/sig0000079d ), + .CLK(clk), + .D(\blk00000003/sig0000044a ), + .Q(\blk00000003/blk0000014c/sig0000078b ), + .Q15(\NLW_blk00000003/blk0000014c/blk0000016d_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk0000014c/blk0000016c ( + .A0(\blk00000003/sig00000438 ), + .A1(\blk00000003/sig00000437 ), + .A2(\blk00000003/sig00000436 ), + .A3(\blk00000003/blk0000014c/sig00000784 ), + .CE(\blk00000003/blk0000014c/sig0000079d ), + .CLK(clk), + .D(\blk00000003/sig00000448 ), + .Q(\blk00000003/blk0000014c/sig0000078d ), + .Q15(\NLW_blk00000003/blk0000014c/blk0000016c_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk0000014c/blk0000016b ( + .A0(\blk00000003/sig00000438 ), + .A1(\blk00000003/sig00000437 ), + .A2(\blk00000003/sig00000436 ), + .A3(\blk00000003/blk0000014c/sig00000784 ), + .CE(\blk00000003/blk0000014c/sig0000079d ), + .CLK(clk), + .D(\blk00000003/sig0000044c ), + .Q(\blk00000003/blk0000014c/sig00000789 ), + .Q15(\NLW_blk00000003/blk0000014c/blk0000016b_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk0000014c/blk0000016a ( + .A0(\blk00000003/sig00000438 ), + .A1(\blk00000003/sig00000437 ), + .A2(\blk00000003/sig00000436 ), + .A3(\blk00000003/blk0000014c/sig00000784 ), + .CE(\blk00000003/blk0000014c/sig0000079d ), + .CLK(clk), + .D(\blk00000003/sig0000044d ), + .Q(\blk00000003/blk0000014c/sig00000788 ), + .Q15(\NLW_blk00000003/blk0000014c/blk0000016a_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk0000014c/blk00000169 ( + .A0(\blk00000003/sig00000438 ), + .A1(\blk00000003/sig00000437 ), + .A2(\blk00000003/sig00000436 ), + .A3(\blk00000003/blk0000014c/sig00000784 ), + .CE(\blk00000003/blk0000014c/sig0000079d ), + .CLK(clk), + .D(\blk00000003/sig0000044b ), + .Q(\blk00000003/blk0000014c/sig0000078a ), + .Q15(\NLW_blk00000003/blk0000014c/blk00000169_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk0000014c/blk00000168 ( + .A0(\blk00000003/sig00000438 ), + .A1(\blk00000003/sig00000437 ), + .A2(\blk00000003/sig00000436 ), + .A3(\blk00000003/blk0000014c/sig00000784 ), + .CE(\blk00000003/blk0000014c/sig0000079d ), + .CLK(clk), + .D(\blk00000003/sig0000044f ), + .Q(\blk00000003/blk0000014c/sig00000786 ), + .Q15(\NLW_blk00000003/blk0000014c/blk00000168_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk0000014c/blk00000167 ( + .A0(\blk00000003/sig00000438 ), + .A1(\blk00000003/sig00000437 ), + .A2(\blk00000003/sig00000436 ), + .A3(\blk00000003/blk0000014c/sig00000784 ), + .CE(\blk00000003/blk0000014c/sig0000079d ), + .CLK(clk), + .D(\blk00000003/sig00000450 ), + .Q(\blk00000003/blk0000014c/sig00000785 ), + .Q15(\NLW_blk00000003/blk0000014c/blk00000167_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk0000014c/blk00000166 ( + .A0(\blk00000003/sig00000438 ), + .A1(\blk00000003/sig00000437 ), + .A2(\blk00000003/sig00000436 ), + .A3(\blk00000003/blk0000014c/sig00000784 ), + .CE(\blk00000003/blk0000014c/sig0000079d ), + .CLK(clk), + .D(\blk00000003/sig0000044e ), + .Q(\blk00000003/blk0000014c/sig00000787 ), + .Q15(\NLW_blk00000003/blk0000014c/blk00000166_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk0000014c/blk00000165 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk0000014c/sig0000079c ), + .Q(\blk00000003/sig000003de ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk0000014c/blk00000164 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk0000014c/sig0000079b ), + .Q(\blk00000003/sig000003df ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk0000014c/blk00000163 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk0000014c/sig0000079a ), + .Q(\blk00000003/sig000003e0 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk0000014c/blk00000162 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk0000014c/sig00000799 ), + .Q(\blk00000003/sig000003e1 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk0000014c/blk00000161 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk0000014c/sig00000798 ), + .Q(\blk00000003/sig000003e2 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk0000014c/blk00000160 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk0000014c/sig00000797 ), + .Q(\blk00000003/sig000003e3 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk0000014c/blk0000015f ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk0000014c/sig00000796 ), + .Q(\blk00000003/sig000003e4 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk0000014c/blk0000015e ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk0000014c/sig00000795 ), + .Q(\blk00000003/sig000003e5 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk0000014c/blk0000015d ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk0000014c/sig00000794 ), + .Q(\blk00000003/sig000003e6 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk0000014c/blk0000015c ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk0000014c/sig00000793 ), + .Q(\blk00000003/sig000003e7 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk0000014c/blk0000015b ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk0000014c/sig00000792 ), + .Q(\blk00000003/sig000003e8 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk0000014c/blk0000015a ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk0000014c/sig00000791 ), + .Q(\blk00000003/sig000003e9 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk0000014c/blk00000159 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk0000014c/sig00000790 ), + .Q(\blk00000003/sig000003ea ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk0000014c/blk00000158 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk0000014c/sig0000078f ), + .Q(\blk00000003/sig000003eb ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk0000014c/blk00000157 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk0000014c/sig0000078e ), + .Q(\blk00000003/sig000003ec ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk0000014c/blk00000156 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk0000014c/sig0000078d ), + .Q(\blk00000003/sig000003ed ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk0000014c/blk00000155 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk0000014c/sig0000078c ), + .Q(\blk00000003/sig000003ee ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk0000014c/blk00000154 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk0000014c/sig0000078b ), + .Q(\blk00000003/sig000003ef ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk0000014c/blk00000153 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk0000014c/sig0000078a ), + .Q(\blk00000003/sig000003f0 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk0000014c/blk00000152 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk0000014c/sig00000789 ), + .Q(\blk00000003/sig000003f1 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk0000014c/blk00000151 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk0000014c/sig00000788 ), + .Q(\blk00000003/sig000003f2 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk0000014c/blk00000150 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk0000014c/sig00000787 ), + .Q(\blk00000003/sig000003f3 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk0000014c/blk0000014f ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk0000014c/sig00000786 ), + .Q(\blk00000003/sig000003f4 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk0000014c/blk0000014e ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk0000014c/sig00000785 ), + .Q(\blk00000003/sig000003f5 ) + ); + GND \blk00000003/blk0000014c/blk0000014d ( + .G(\blk00000003/blk0000014c/sig00000784 ) + ); + LUT2 #( + .INIT ( 4'h8 )) + \blk00000003/blk0000017f/blk000001b1 ( + .I0(ce), + .I1(\blk00000003/sig00000435 ), + .O(\blk00000003/blk0000017f/sig000007ed ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk0000017f/blk000001b0 ( + .A0(\blk00000003/sig0000042d ), + .A1(\blk00000003/sig0000042c ), + .A2(\blk00000003/sig0000042b ), + .A3(\blk00000003/blk0000017f/sig000007d4 ), + .CE(\blk00000003/blk0000017f/sig000007ed ), + .CLK(clk), + .D(\blk00000003/sig00000355 ), + .Q(\blk00000003/blk0000017f/sig000007eb ), + .Q15(\NLW_blk00000003/blk0000017f/blk000001b0_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk0000017f/blk000001af ( + .A0(\blk00000003/sig0000042d ), + .A1(\blk00000003/sig0000042c ), + .A2(\blk00000003/sig0000042b ), + .A3(\blk00000003/blk0000017f/sig000007d4 ), + .CE(\blk00000003/blk0000017f/sig000007ed ), + .CLK(clk), + .D(\blk00000003/sig00000356 ), + .Q(\blk00000003/blk0000017f/sig000007ea ), + .Q15(\NLW_blk00000003/blk0000017f/blk000001af_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk0000017f/blk000001ae ( + .A0(\blk00000003/sig0000042d ), + .A1(\blk00000003/sig0000042c ), + .A2(\blk00000003/sig0000042b ), + .A3(\blk00000003/blk0000017f/sig000007d4 ), + .CE(\blk00000003/blk0000017f/sig000007ed ), + .CLK(clk), + .D(\blk00000003/sig00000354 ), + .Q(\blk00000003/blk0000017f/sig000007ec ), + .Q15(\NLW_blk00000003/blk0000017f/blk000001ae_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk0000017f/blk000001ad ( + .A0(\blk00000003/sig0000042d ), + .A1(\blk00000003/sig0000042c ), + .A2(\blk00000003/sig0000042b ), + .A3(\blk00000003/blk0000017f/sig000007d4 ), + .CE(\blk00000003/blk0000017f/sig000007ed ), + .CLK(clk), + .D(\blk00000003/sig00000358 ), + .Q(\blk00000003/blk0000017f/sig000007e8 ), + .Q15(\NLW_blk00000003/blk0000017f/blk000001ad_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk0000017f/blk000001ac ( + .A0(\blk00000003/sig0000042d ), + .A1(\blk00000003/sig0000042c ), + .A2(\blk00000003/sig0000042b ), + .A3(\blk00000003/blk0000017f/sig000007d4 ), + .CE(\blk00000003/blk0000017f/sig000007ed ), + .CLK(clk), + .D(\blk00000003/sig00000359 ), + .Q(\blk00000003/blk0000017f/sig000007e7 ), + .Q15(\NLW_blk00000003/blk0000017f/blk000001ac_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk0000017f/blk000001ab ( + .A0(\blk00000003/sig0000042d ), + .A1(\blk00000003/sig0000042c ), + .A2(\blk00000003/sig0000042b ), + .A3(\blk00000003/blk0000017f/sig000007d4 ), + .CE(\blk00000003/blk0000017f/sig000007ed ), + .CLK(clk), + .D(\blk00000003/sig00000357 ), + .Q(\blk00000003/blk0000017f/sig000007e9 ), + .Q15(\NLW_blk00000003/blk0000017f/blk000001ab_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk0000017f/blk000001aa ( + .A0(\blk00000003/sig0000042d ), + .A1(\blk00000003/sig0000042c ), + .A2(\blk00000003/sig0000042b ), + .A3(\blk00000003/blk0000017f/sig000007d4 ), + .CE(\blk00000003/blk0000017f/sig000007ed ), + .CLK(clk), + .D(\blk00000003/sig0000035b ), + .Q(\blk00000003/blk0000017f/sig000007e5 ), + .Q15(\NLW_blk00000003/blk0000017f/blk000001aa_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk0000017f/blk000001a9 ( + .A0(\blk00000003/sig0000042d ), + .A1(\blk00000003/sig0000042c ), + .A2(\blk00000003/sig0000042b ), + .A3(\blk00000003/blk0000017f/sig000007d4 ), + .CE(\blk00000003/blk0000017f/sig000007ed ), + .CLK(clk), + .D(\blk00000003/sig0000035c ), + .Q(\blk00000003/blk0000017f/sig000007e4 ), + .Q15(\NLW_blk00000003/blk0000017f/blk000001a9_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk0000017f/blk000001a8 ( + .A0(\blk00000003/sig0000042d ), + .A1(\blk00000003/sig0000042c ), + .A2(\blk00000003/sig0000042b ), + .A3(\blk00000003/blk0000017f/sig000007d4 ), + .CE(\blk00000003/blk0000017f/sig000007ed ), + .CLK(clk), + .D(\blk00000003/sig0000035a ), + .Q(\blk00000003/blk0000017f/sig000007e6 ), + .Q15(\NLW_blk00000003/blk0000017f/blk000001a8_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk0000017f/blk000001a7 ( + .A0(\blk00000003/sig0000042d ), + .A1(\blk00000003/sig0000042c ), + .A2(\blk00000003/sig0000042b ), + .A3(\blk00000003/blk0000017f/sig000007d4 ), + .CE(\blk00000003/blk0000017f/sig000007ed ), + .CLK(clk), + .D(\blk00000003/sig0000035e ), + .Q(\blk00000003/blk0000017f/sig000007e2 ), + .Q15(\NLW_blk00000003/blk0000017f/blk000001a7_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk0000017f/blk000001a6 ( + .A0(\blk00000003/sig0000042d ), + .A1(\blk00000003/sig0000042c ), + .A2(\blk00000003/sig0000042b ), + .A3(\blk00000003/blk0000017f/sig000007d4 ), + .CE(\blk00000003/blk0000017f/sig000007ed ), + .CLK(clk), + .D(\blk00000003/sig0000035f ), + .Q(\blk00000003/blk0000017f/sig000007e1 ), + .Q15(\NLW_blk00000003/blk0000017f/blk000001a6_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk0000017f/blk000001a5 ( + .A0(\blk00000003/sig0000042d ), + .A1(\blk00000003/sig0000042c ), + .A2(\blk00000003/sig0000042b ), + .A3(\blk00000003/blk0000017f/sig000007d4 ), + .CE(\blk00000003/blk0000017f/sig000007ed ), + .CLK(clk), + .D(\blk00000003/sig0000035d ), + .Q(\blk00000003/blk0000017f/sig000007e3 ), + .Q15(\NLW_blk00000003/blk0000017f/blk000001a5_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk0000017f/blk000001a4 ( + .A0(\blk00000003/sig0000042d ), + .A1(\blk00000003/sig0000042c ), + .A2(\blk00000003/sig0000042b ), + .A3(\blk00000003/blk0000017f/sig000007d4 ), + .CE(\blk00000003/blk0000017f/sig000007ed ), + .CLK(clk), + .D(\blk00000003/sig00000361 ), + .Q(\blk00000003/blk0000017f/sig000007df ), + .Q15(\NLW_blk00000003/blk0000017f/blk000001a4_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk0000017f/blk000001a3 ( + .A0(\blk00000003/sig0000042d ), + .A1(\blk00000003/sig0000042c ), + .A2(\blk00000003/sig0000042b ), + .A3(\blk00000003/blk0000017f/sig000007d4 ), + .CE(\blk00000003/blk0000017f/sig000007ed ), + .CLK(clk), + .D(\blk00000003/sig00000362 ), + .Q(\blk00000003/blk0000017f/sig000007de ), + .Q15(\NLW_blk00000003/blk0000017f/blk000001a3_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk0000017f/blk000001a2 ( + .A0(\blk00000003/sig0000042d ), + .A1(\blk00000003/sig0000042c ), + .A2(\blk00000003/sig0000042b ), + .A3(\blk00000003/blk0000017f/sig000007d4 ), + .CE(\blk00000003/blk0000017f/sig000007ed ), + .CLK(clk), + .D(\blk00000003/sig00000360 ), + .Q(\blk00000003/blk0000017f/sig000007e0 ), + .Q15(\NLW_blk00000003/blk0000017f/blk000001a2_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk0000017f/blk000001a1 ( + .A0(\blk00000003/sig0000042d ), + .A1(\blk00000003/sig0000042c ), + .A2(\blk00000003/sig0000042b ), + .A3(\blk00000003/blk0000017f/sig000007d4 ), + .CE(\blk00000003/blk0000017f/sig000007ed ), + .CLK(clk), + .D(\blk00000003/sig00000364 ), + .Q(\blk00000003/blk0000017f/sig000007dc ), + .Q15(\NLW_blk00000003/blk0000017f/blk000001a1_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk0000017f/blk000001a0 ( + .A0(\blk00000003/sig0000042d ), + .A1(\blk00000003/sig0000042c ), + .A2(\blk00000003/sig0000042b ), + .A3(\blk00000003/blk0000017f/sig000007d4 ), + .CE(\blk00000003/blk0000017f/sig000007ed ), + .CLK(clk), + .D(\blk00000003/sig00000365 ), + .Q(\blk00000003/blk0000017f/sig000007db ), + .Q15(\NLW_blk00000003/blk0000017f/blk000001a0_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk0000017f/blk0000019f ( + .A0(\blk00000003/sig0000042d ), + .A1(\blk00000003/sig0000042c ), + .A2(\blk00000003/sig0000042b ), + .A3(\blk00000003/blk0000017f/sig000007d4 ), + .CE(\blk00000003/blk0000017f/sig000007ed ), + .CLK(clk), + .D(\blk00000003/sig00000363 ), + .Q(\blk00000003/blk0000017f/sig000007dd ), + .Q15(\NLW_blk00000003/blk0000017f/blk0000019f_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk0000017f/blk0000019e ( + .A0(\blk00000003/sig0000042d ), + .A1(\blk00000003/sig0000042c ), + .A2(\blk00000003/sig0000042b ), + .A3(\blk00000003/blk0000017f/sig000007d4 ), + .CE(\blk00000003/blk0000017f/sig000007ed ), + .CLK(clk), + .D(\blk00000003/sig00000367 ), + .Q(\blk00000003/blk0000017f/sig000007d9 ), + .Q15(\NLW_blk00000003/blk0000017f/blk0000019e_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk0000017f/blk0000019d ( + .A0(\blk00000003/sig0000042d ), + .A1(\blk00000003/sig0000042c ), + .A2(\blk00000003/sig0000042b ), + .A3(\blk00000003/blk0000017f/sig000007d4 ), + .CE(\blk00000003/blk0000017f/sig000007ed ), + .CLK(clk), + .D(\blk00000003/sig00000368 ), + .Q(\blk00000003/blk0000017f/sig000007d8 ), + .Q15(\NLW_blk00000003/blk0000017f/blk0000019d_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk0000017f/blk0000019c ( + .A0(\blk00000003/sig0000042d ), + .A1(\blk00000003/sig0000042c ), + .A2(\blk00000003/sig0000042b ), + .A3(\blk00000003/blk0000017f/sig000007d4 ), + .CE(\blk00000003/blk0000017f/sig000007ed ), + .CLK(clk), + .D(\blk00000003/sig00000366 ), + .Q(\blk00000003/blk0000017f/sig000007da ), + .Q15(\NLW_blk00000003/blk0000017f/blk0000019c_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk0000017f/blk0000019b ( + .A0(\blk00000003/sig0000042d ), + .A1(\blk00000003/sig0000042c ), + .A2(\blk00000003/sig0000042b ), + .A3(\blk00000003/blk0000017f/sig000007d4 ), + .CE(\blk00000003/blk0000017f/sig000007ed ), + .CLK(clk), + .D(\blk00000003/sig0000036a ), + .Q(\blk00000003/blk0000017f/sig000007d6 ), + .Q15(\NLW_blk00000003/blk0000017f/blk0000019b_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk0000017f/blk0000019a ( + .A0(\blk00000003/sig0000042d ), + .A1(\blk00000003/sig0000042c ), + .A2(\blk00000003/sig0000042b ), + .A3(\blk00000003/blk0000017f/sig000007d4 ), + .CE(\blk00000003/blk0000017f/sig000007ed ), + .CLK(clk), + .D(\blk00000003/sig0000036b ), + .Q(\blk00000003/blk0000017f/sig000007d5 ), + .Q15(\NLW_blk00000003/blk0000017f/blk0000019a_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk0000017f/blk00000199 ( + .A0(\blk00000003/sig0000042d ), + .A1(\blk00000003/sig0000042c ), + .A2(\blk00000003/sig0000042b ), + .A3(\blk00000003/blk0000017f/sig000007d4 ), + .CE(\blk00000003/blk0000017f/sig000007ed ), + .CLK(clk), + .D(\blk00000003/sig00000369 ), + .Q(\blk00000003/blk0000017f/sig000007d7 ), + .Q15(\NLW_blk00000003/blk0000017f/blk00000199_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk0000017f/blk00000198 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk0000017f/sig000007ec ), + .Q(\blk00000003/sig000003f6 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk0000017f/blk00000197 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk0000017f/sig000007eb ), + .Q(\blk00000003/sig000003f7 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk0000017f/blk00000196 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk0000017f/sig000007ea ), + .Q(\blk00000003/sig000003f8 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk0000017f/blk00000195 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk0000017f/sig000007e9 ), + .Q(\blk00000003/sig000003f9 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk0000017f/blk00000194 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk0000017f/sig000007e8 ), + .Q(\blk00000003/sig000003fa ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk0000017f/blk00000193 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk0000017f/sig000007e7 ), + .Q(\blk00000003/sig000003fb ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk0000017f/blk00000192 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk0000017f/sig000007e6 ), + .Q(\blk00000003/sig000003fc ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk0000017f/blk00000191 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk0000017f/sig000007e5 ), + .Q(\blk00000003/sig000003fd ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk0000017f/blk00000190 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk0000017f/sig000007e4 ), + .Q(\blk00000003/sig000003fe ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk0000017f/blk0000018f ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk0000017f/sig000007e3 ), + .Q(\blk00000003/sig000003ff ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk0000017f/blk0000018e ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk0000017f/sig000007e2 ), + .Q(\blk00000003/sig00000400 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk0000017f/blk0000018d ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk0000017f/sig000007e1 ), + .Q(\blk00000003/sig00000401 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk0000017f/blk0000018c ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk0000017f/sig000007e0 ), + .Q(\blk00000003/sig00000402 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk0000017f/blk0000018b ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk0000017f/sig000007df ), + .Q(\blk00000003/sig00000403 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk0000017f/blk0000018a ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk0000017f/sig000007de ), + .Q(\blk00000003/sig00000404 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk0000017f/blk00000189 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk0000017f/sig000007dd ), + .Q(\blk00000003/sig00000405 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk0000017f/blk00000188 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk0000017f/sig000007dc ), + .Q(\blk00000003/sig00000406 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk0000017f/blk00000187 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk0000017f/sig000007db ), + .Q(\blk00000003/sig00000407 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk0000017f/blk00000186 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk0000017f/sig000007da ), + .Q(\blk00000003/sig00000408 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk0000017f/blk00000185 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk0000017f/sig000007d9 ), + .Q(\blk00000003/sig00000409 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk0000017f/blk00000184 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk0000017f/sig000007d8 ), + .Q(\blk00000003/sig0000040a ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk0000017f/blk00000183 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk0000017f/sig000007d7 ), + .Q(\blk00000003/sig0000040b ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk0000017f/blk00000182 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk0000017f/sig000007d6 ), + .Q(\blk00000003/sig0000040c ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk0000017f/blk00000181 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk0000017f/sig000007d5 ), + .Q(\blk00000003/sig0000040d ) + ); + GND \blk00000003/blk0000017f/blk00000180 ( + .G(\blk00000003/blk0000017f/sig000007d4 ) + ); + LUT2 #( + .INIT ( 4'h8 )) + \blk00000003/blk000001b2/blk000001e4 ( + .I0(ce), + .I1(\blk00000003/sig0000042f ), + .O(\blk00000003/blk000001b2/sig0000083d ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk000001b2/blk000001e3 ( + .A0(\blk00000003/sig00000438 ), + .A1(\blk00000003/sig00000437 ), + .A2(\blk00000003/sig00000436 ), + .A3(\blk00000003/blk000001b2/sig00000824 ), + .CE(\blk00000003/blk000001b2/sig0000083d ), + .CLK(clk), + .D(\blk00000003/sig00000452 ), + .Q(\blk00000003/blk000001b2/sig0000083b ), + .Q15(\NLW_blk00000003/blk000001b2/blk000001e3_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk000001b2/blk000001e2 ( + .A0(\blk00000003/sig00000438 ), + .A1(\blk00000003/sig00000437 ), + .A2(\blk00000003/sig00000436 ), + .A3(\blk00000003/blk000001b2/sig00000824 ), + .CE(\blk00000003/blk000001b2/sig0000083d ), + .CLK(clk), + .D(\blk00000003/sig00000453 ), + .Q(\blk00000003/blk000001b2/sig0000083a ), + .Q15(\NLW_blk00000003/blk000001b2/blk000001e2_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk000001b2/blk000001e1 ( + .A0(\blk00000003/sig00000438 ), + .A1(\blk00000003/sig00000437 ), + .A2(\blk00000003/sig00000436 ), + .A3(\blk00000003/blk000001b2/sig00000824 ), + .CE(\blk00000003/blk000001b2/sig0000083d ), + .CLK(clk), + .D(\blk00000003/sig00000451 ), + .Q(\blk00000003/blk000001b2/sig0000083c ), + .Q15(\NLW_blk00000003/blk000001b2/blk000001e1_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk000001b2/blk000001e0 ( + .A0(\blk00000003/sig00000438 ), + .A1(\blk00000003/sig00000437 ), + .A2(\blk00000003/sig00000436 ), + .A3(\blk00000003/blk000001b2/sig00000824 ), + .CE(\blk00000003/blk000001b2/sig0000083d ), + .CLK(clk), + .D(\blk00000003/sig00000455 ), + .Q(\blk00000003/blk000001b2/sig00000838 ), + .Q15(\NLW_blk00000003/blk000001b2/blk000001e0_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk000001b2/blk000001df ( + .A0(\blk00000003/sig00000438 ), + .A1(\blk00000003/sig00000437 ), + .A2(\blk00000003/sig00000436 ), + .A3(\blk00000003/blk000001b2/sig00000824 ), + .CE(\blk00000003/blk000001b2/sig0000083d ), + .CLK(clk), + .D(\blk00000003/sig00000456 ), + .Q(\blk00000003/blk000001b2/sig00000837 ), + .Q15(\NLW_blk00000003/blk000001b2/blk000001df_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk000001b2/blk000001de ( + .A0(\blk00000003/sig00000438 ), + .A1(\blk00000003/sig00000437 ), + .A2(\blk00000003/sig00000436 ), + .A3(\blk00000003/blk000001b2/sig00000824 ), + .CE(\blk00000003/blk000001b2/sig0000083d ), + .CLK(clk), + .D(\blk00000003/sig00000454 ), + .Q(\blk00000003/blk000001b2/sig00000839 ), + .Q15(\NLW_blk00000003/blk000001b2/blk000001de_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk000001b2/blk000001dd ( + .A0(\blk00000003/sig00000438 ), + .A1(\blk00000003/sig00000437 ), + .A2(\blk00000003/sig00000436 ), + .A3(\blk00000003/blk000001b2/sig00000824 ), + .CE(\blk00000003/blk000001b2/sig0000083d ), + .CLK(clk), + .D(\blk00000003/sig00000458 ), + .Q(\blk00000003/blk000001b2/sig00000835 ), + .Q15(\NLW_blk00000003/blk000001b2/blk000001dd_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk000001b2/blk000001dc ( + .A0(\blk00000003/sig00000438 ), + .A1(\blk00000003/sig00000437 ), + .A2(\blk00000003/sig00000436 ), + .A3(\blk00000003/blk000001b2/sig00000824 ), + .CE(\blk00000003/blk000001b2/sig0000083d ), + .CLK(clk), + .D(\blk00000003/sig00000459 ), + .Q(\blk00000003/blk000001b2/sig00000834 ), + .Q15(\NLW_blk00000003/blk000001b2/blk000001dc_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk000001b2/blk000001db ( + .A0(\blk00000003/sig00000438 ), + .A1(\blk00000003/sig00000437 ), + .A2(\blk00000003/sig00000436 ), + .A3(\blk00000003/blk000001b2/sig00000824 ), + .CE(\blk00000003/blk000001b2/sig0000083d ), + .CLK(clk), + .D(\blk00000003/sig00000457 ), + .Q(\blk00000003/blk000001b2/sig00000836 ), + .Q15(\NLW_blk00000003/blk000001b2/blk000001db_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk000001b2/blk000001da ( + .A0(\blk00000003/sig00000438 ), + .A1(\blk00000003/sig00000437 ), + .A2(\blk00000003/sig00000436 ), + .A3(\blk00000003/blk000001b2/sig00000824 ), + .CE(\blk00000003/blk000001b2/sig0000083d ), + .CLK(clk), + .D(\blk00000003/sig0000045b ), + .Q(\blk00000003/blk000001b2/sig00000832 ), + .Q15(\NLW_blk00000003/blk000001b2/blk000001da_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk000001b2/blk000001d9 ( + .A0(\blk00000003/sig00000438 ), + .A1(\blk00000003/sig00000437 ), + .A2(\blk00000003/sig00000436 ), + .A3(\blk00000003/blk000001b2/sig00000824 ), + .CE(\blk00000003/blk000001b2/sig0000083d ), + .CLK(clk), + .D(\blk00000003/sig0000045c ), + .Q(\blk00000003/blk000001b2/sig00000831 ), + .Q15(\NLW_blk00000003/blk000001b2/blk000001d9_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk000001b2/blk000001d8 ( + .A0(\blk00000003/sig00000438 ), + .A1(\blk00000003/sig00000437 ), + .A2(\blk00000003/sig00000436 ), + .A3(\blk00000003/blk000001b2/sig00000824 ), + .CE(\blk00000003/blk000001b2/sig0000083d ), + .CLK(clk), + .D(\blk00000003/sig0000045a ), + .Q(\blk00000003/blk000001b2/sig00000833 ), + .Q15(\NLW_blk00000003/blk000001b2/blk000001d8_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk000001b2/blk000001d7 ( + .A0(\blk00000003/sig00000438 ), + .A1(\blk00000003/sig00000437 ), + .A2(\blk00000003/sig00000436 ), + .A3(\blk00000003/blk000001b2/sig00000824 ), + .CE(\blk00000003/blk000001b2/sig0000083d ), + .CLK(clk), + .D(\blk00000003/sig0000045e ), + .Q(\blk00000003/blk000001b2/sig0000082f ), + .Q15(\NLW_blk00000003/blk000001b2/blk000001d7_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk000001b2/blk000001d6 ( + .A0(\blk00000003/sig00000438 ), + .A1(\blk00000003/sig00000437 ), + .A2(\blk00000003/sig00000436 ), + .A3(\blk00000003/blk000001b2/sig00000824 ), + .CE(\blk00000003/blk000001b2/sig0000083d ), + .CLK(clk), + .D(\blk00000003/sig0000045f ), + .Q(\blk00000003/blk000001b2/sig0000082e ), + .Q15(\NLW_blk00000003/blk000001b2/blk000001d6_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk000001b2/blk000001d5 ( + .A0(\blk00000003/sig00000438 ), + .A1(\blk00000003/sig00000437 ), + .A2(\blk00000003/sig00000436 ), + .A3(\blk00000003/blk000001b2/sig00000824 ), + .CE(\blk00000003/blk000001b2/sig0000083d ), + .CLK(clk), + .D(\blk00000003/sig0000045d ), + .Q(\blk00000003/blk000001b2/sig00000830 ), + .Q15(\NLW_blk00000003/blk000001b2/blk000001d5_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk000001b2/blk000001d4 ( + .A0(\blk00000003/sig00000438 ), + .A1(\blk00000003/sig00000437 ), + .A2(\blk00000003/sig00000436 ), + .A3(\blk00000003/blk000001b2/sig00000824 ), + .CE(\blk00000003/blk000001b2/sig0000083d ), + .CLK(clk), + .D(\blk00000003/sig00000461 ), + .Q(\blk00000003/blk000001b2/sig0000082c ), + .Q15(\NLW_blk00000003/blk000001b2/blk000001d4_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk000001b2/blk000001d3 ( + .A0(\blk00000003/sig00000438 ), + .A1(\blk00000003/sig00000437 ), + .A2(\blk00000003/sig00000436 ), + .A3(\blk00000003/blk000001b2/sig00000824 ), + .CE(\blk00000003/blk000001b2/sig0000083d ), + .CLK(clk), + .D(\blk00000003/sig00000462 ), + .Q(\blk00000003/blk000001b2/sig0000082b ), + .Q15(\NLW_blk00000003/blk000001b2/blk000001d3_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk000001b2/blk000001d2 ( + .A0(\blk00000003/sig00000438 ), + .A1(\blk00000003/sig00000437 ), + .A2(\blk00000003/sig00000436 ), + .A3(\blk00000003/blk000001b2/sig00000824 ), + .CE(\blk00000003/blk000001b2/sig0000083d ), + .CLK(clk), + .D(\blk00000003/sig00000460 ), + .Q(\blk00000003/blk000001b2/sig0000082d ), + .Q15(\NLW_blk00000003/blk000001b2/blk000001d2_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk000001b2/blk000001d1 ( + .A0(\blk00000003/sig00000438 ), + .A1(\blk00000003/sig00000437 ), + .A2(\blk00000003/sig00000436 ), + .A3(\blk00000003/blk000001b2/sig00000824 ), + .CE(\blk00000003/blk000001b2/sig0000083d ), + .CLK(clk), + .D(\blk00000003/sig00000464 ), + .Q(\blk00000003/blk000001b2/sig00000829 ), + .Q15(\NLW_blk00000003/blk000001b2/blk000001d1_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk000001b2/blk000001d0 ( + .A0(\blk00000003/sig00000438 ), + .A1(\blk00000003/sig00000437 ), + .A2(\blk00000003/sig00000436 ), + .A3(\blk00000003/blk000001b2/sig00000824 ), + .CE(\blk00000003/blk000001b2/sig0000083d ), + .CLK(clk), + .D(\blk00000003/sig00000465 ), + .Q(\blk00000003/blk000001b2/sig00000828 ), + .Q15(\NLW_blk00000003/blk000001b2/blk000001d0_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk000001b2/blk000001cf ( + .A0(\blk00000003/sig00000438 ), + .A1(\blk00000003/sig00000437 ), + .A2(\blk00000003/sig00000436 ), + .A3(\blk00000003/blk000001b2/sig00000824 ), + .CE(\blk00000003/blk000001b2/sig0000083d ), + .CLK(clk), + .D(\blk00000003/sig00000463 ), + .Q(\blk00000003/blk000001b2/sig0000082a ), + .Q15(\NLW_blk00000003/blk000001b2/blk000001cf_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk000001b2/blk000001ce ( + .A0(\blk00000003/sig00000438 ), + .A1(\blk00000003/sig00000437 ), + .A2(\blk00000003/sig00000436 ), + .A3(\blk00000003/blk000001b2/sig00000824 ), + .CE(\blk00000003/blk000001b2/sig0000083d ), + .CLK(clk), + .D(\blk00000003/sig00000467 ), + .Q(\blk00000003/blk000001b2/sig00000826 ), + .Q15(\NLW_blk00000003/blk000001b2/blk000001ce_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk000001b2/blk000001cd ( + .A0(\blk00000003/sig00000438 ), + .A1(\blk00000003/sig00000437 ), + .A2(\blk00000003/sig00000436 ), + .A3(\blk00000003/blk000001b2/sig00000824 ), + .CE(\blk00000003/blk000001b2/sig0000083d ), + .CLK(clk), + .D(\blk00000003/sig00000468 ), + .Q(\blk00000003/blk000001b2/sig00000825 ), + .Q15(\NLW_blk00000003/blk000001b2/blk000001cd_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk000001b2/blk000001cc ( + .A0(\blk00000003/sig00000438 ), + .A1(\blk00000003/sig00000437 ), + .A2(\blk00000003/sig00000436 ), + .A3(\blk00000003/blk000001b2/sig00000824 ), + .CE(\blk00000003/blk000001b2/sig0000083d ), + .CLK(clk), + .D(\blk00000003/sig00000466 ), + .Q(\blk00000003/blk000001b2/sig00000827 ), + .Q15(\NLW_blk00000003/blk000001b2/blk000001cc_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000001b2/blk000001cb ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk000001b2/sig0000083c ), + .Q(\blk00000003/sig0000040e ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000001b2/blk000001ca ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk000001b2/sig0000083b ), + .Q(\blk00000003/sig0000040f ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000001b2/blk000001c9 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk000001b2/sig0000083a ), + .Q(\blk00000003/sig00000410 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000001b2/blk000001c8 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk000001b2/sig00000839 ), + .Q(\blk00000003/sig00000411 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000001b2/blk000001c7 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk000001b2/sig00000838 ), + .Q(\blk00000003/sig00000412 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000001b2/blk000001c6 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk000001b2/sig00000837 ), + .Q(\blk00000003/sig00000413 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000001b2/blk000001c5 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk000001b2/sig00000836 ), + .Q(\blk00000003/sig00000414 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000001b2/blk000001c4 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk000001b2/sig00000835 ), + .Q(\blk00000003/sig00000415 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000001b2/blk000001c3 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk000001b2/sig00000834 ), + .Q(\blk00000003/sig00000416 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000001b2/blk000001c2 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk000001b2/sig00000833 ), + .Q(\blk00000003/sig00000417 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000001b2/blk000001c1 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk000001b2/sig00000832 ), + .Q(\blk00000003/sig00000418 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000001b2/blk000001c0 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk000001b2/sig00000831 ), + .Q(\blk00000003/sig00000419 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000001b2/blk000001bf ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk000001b2/sig00000830 ), + .Q(\blk00000003/sig0000041a ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000001b2/blk000001be ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk000001b2/sig0000082f ), + .Q(\blk00000003/sig0000041b ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000001b2/blk000001bd ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk000001b2/sig0000082e ), + .Q(\blk00000003/sig0000041c ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000001b2/blk000001bc ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk000001b2/sig0000082d ), + .Q(\blk00000003/sig0000041d ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000001b2/blk000001bb ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk000001b2/sig0000082c ), + .Q(\blk00000003/sig0000041e ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000001b2/blk000001ba ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk000001b2/sig0000082b ), + .Q(\blk00000003/sig0000041f ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000001b2/blk000001b9 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk000001b2/sig0000082a ), + .Q(\blk00000003/sig00000420 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000001b2/blk000001b8 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk000001b2/sig00000829 ), + .Q(\blk00000003/sig00000421 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000001b2/blk000001b7 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk000001b2/sig00000828 ), + .Q(\blk00000003/sig00000422 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000001b2/blk000001b6 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk000001b2/sig00000827 ), + .Q(\blk00000003/sig00000423 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000001b2/blk000001b5 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk000001b2/sig00000826 ), + .Q(\blk00000003/sig00000424 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000001b2/blk000001b4 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk000001b2/sig00000825 ), + .Q(\blk00000003/sig00000425 ) + ); + GND \blk00000003/blk000001b2/blk000001b3 ( + .G(\blk00000003/blk000001b2/sig00000824 ) + ); + LUT2 #( + .INIT ( 4'h8 )) + \blk00000003/blk000001e5/blk00000217 ( + .I0(ce), + .I1(\blk00000003/sig00000434 ), + .O(\blk00000003/blk000001e5/sig0000088d ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk000001e5/blk00000216 ( + .A0(\blk00000003/sig000002c6 ), + .A1(\blk00000003/sig000002c5 ), + .A2(\blk00000003/sig000002c4 ), + .A3(\blk00000003/blk000001e5/sig00000874 ), + .CE(\blk00000003/blk000001e5/sig0000088d ), + .CLK(clk), + .D(\blk00000003/sig0000046a ), + .Q(\blk00000003/blk000001e5/sig0000088b ), + .Q15(\NLW_blk00000003/blk000001e5/blk00000216_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk000001e5/blk00000215 ( + .A0(\blk00000003/sig000002c6 ), + .A1(\blk00000003/sig000002c5 ), + .A2(\blk00000003/sig000002c4 ), + .A3(\blk00000003/blk000001e5/sig00000874 ), + .CE(\blk00000003/blk000001e5/sig0000088d ), + .CLK(clk), + .D(\blk00000003/sig0000046b ), + .Q(\blk00000003/blk000001e5/sig0000088a ), + .Q15(\NLW_blk00000003/blk000001e5/blk00000215_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk000001e5/blk00000214 ( + .A0(\blk00000003/sig000002c6 ), + .A1(\blk00000003/sig000002c5 ), + .A2(\blk00000003/sig000002c4 ), + .A3(\blk00000003/blk000001e5/sig00000874 ), + .CE(\blk00000003/blk000001e5/sig0000088d ), + .CLK(clk), + .D(\blk00000003/sig00000469 ), + .Q(\blk00000003/blk000001e5/sig0000088c ), + .Q15(\NLW_blk00000003/blk000001e5/blk00000214_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk000001e5/blk00000213 ( + .A0(\blk00000003/sig000002c6 ), + .A1(\blk00000003/sig000002c5 ), + .A2(\blk00000003/sig000002c4 ), + .A3(\blk00000003/blk000001e5/sig00000874 ), + .CE(\blk00000003/blk000001e5/sig0000088d ), + .CLK(clk), + .D(\blk00000003/sig0000046d ), + .Q(\blk00000003/blk000001e5/sig00000888 ), + .Q15(\NLW_blk00000003/blk000001e5/blk00000213_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk000001e5/blk00000212 ( + .A0(\blk00000003/sig000002c6 ), + .A1(\blk00000003/sig000002c5 ), + .A2(\blk00000003/sig000002c4 ), + .A3(\blk00000003/blk000001e5/sig00000874 ), + .CE(\blk00000003/blk000001e5/sig0000088d ), + .CLK(clk), + .D(\blk00000003/sig0000046e ), + .Q(\blk00000003/blk000001e5/sig00000887 ), + .Q15(\NLW_blk00000003/blk000001e5/blk00000212_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk000001e5/blk00000211 ( + .A0(\blk00000003/sig000002c6 ), + .A1(\blk00000003/sig000002c5 ), + .A2(\blk00000003/sig000002c4 ), + .A3(\blk00000003/blk000001e5/sig00000874 ), + .CE(\blk00000003/blk000001e5/sig0000088d ), + .CLK(clk), + .D(\blk00000003/sig0000046c ), + .Q(\blk00000003/blk000001e5/sig00000889 ), + .Q15(\NLW_blk00000003/blk000001e5/blk00000211_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk000001e5/blk00000210 ( + .A0(\blk00000003/sig000002c6 ), + .A1(\blk00000003/sig000002c5 ), + .A2(\blk00000003/sig000002c4 ), + .A3(\blk00000003/blk000001e5/sig00000874 ), + .CE(\blk00000003/blk000001e5/sig0000088d ), + .CLK(clk), + .D(\blk00000003/sig00000470 ), + .Q(\blk00000003/blk000001e5/sig00000885 ), + .Q15(\NLW_blk00000003/blk000001e5/blk00000210_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk000001e5/blk0000020f ( + .A0(\blk00000003/sig000002c6 ), + .A1(\blk00000003/sig000002c5 ), + .A2(\blk00000003/sig000002c4 ), + .A3(\blk00000003/blk000001e5/sig00000874 ), + .CE(\blk00000003/blk000001e5/sig0000088d ), + .CLK(clk), + .D(\blk00000003/sig00000471 ), + .Q(\blk00000003/blk000001e5/sig00000884 ), + .Q15(\NLW_blk00000003/blk000001e5/blk0000020f_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk000001e5/blk0000020e ( + .A0(\blk00000003/sig000002c6 ), + .A1(\blk00000003/sig000002c5 ), + .A2(\blk00000003/sig000002c4 ), + .A3(\blk00000003/blk000001e5/sig00000874 ), + .CE(\blk00000003/blk000001e5/sig0000088d ), + .CLK(clk), + .D(\blk00000003/sig0000046f ), + .Q(\blk00000003/blk000001e5/sig00000886 ), + .Q15(\NLW_blk00000003/blk000001e5/blk0000020e_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk000001e5/blk0000020d ( + .A0(\blk00000003/sig000002c6 ), + .A1(\blk00000003/sig000002c5 ), + .A2(\blk00000003/sig000002c4 ), + .A3(\blk00000003/blk000001e5/sig00000874 ), + .CE(\blk00000003/blk000001e5/sig0000088d ), + .CLK(clk), + .D(\blk00000003/sig00000473 ), + .Q(\blk00000003/blk000001e5/sig00000882 ), + .Q15(\NLW_blk00000003/blk000001e5/blk0000020d_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk000001e5/blk0000020c ( + .A0(\blk00000003/sig000002c6 ), + .A1(\blk00000003/sig000002c5 ), + .A2(\blk00000003/sig000002c4 ), + .A3(\blk00000003/blk000001e5/sig00000874 ), + .CE(\blk00000003/blk000001e5/sig0000088d ), + .CLK(clk), + .D(\blk00000003/sig00000474 ), + .Q(\blk00000003/blk000001e5/sig00000881 ), + .Q15(\NLW_blk00000003/blk000001e5/blk0000020c_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk000001e5/blk0000020b ( + .A0(\blk00000003/sig000002c6 ), + .A1(\blk00000003/sig000002c5 ), + .A2(\blk00000003/sig000002c4 ), + .A3(\blk00000003/blk000001e5/sig00000874 ), + .CE(\blk00000003/blk000001e5/sig0000088d ), + .CLK(clk), + .D(\blk00000003/sig00000472 ), + .Q(\blk00000003/blk000001e5/sig00000883 ), + .Q15(\NLW_blk00000003/blk000001e5/blk0000020b_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk000001e5/blk0000020a ( + .A0(\blk00000003/sig000002c6 ), + .A1(\blk00000003/sig000002c5 ), + .A2(\blk00000003/sig000002c4 ), + .A3(\blk00000003/blk000001e5/sig00000874 ), + .CE(\blk00000003/blk000001e5/sig0000088d ), + .CLK(clk), + .D(\blk00000003/sig00000476 ), + .Q(\blk00000003/blk000001e5/sig0000087f ), + .Q15(\NLW_blk00000003/blk000001e5/blk0000020a_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk000001e5/blk00000209 ( + .A0(\blk00000003/sig000002c6 ), + .A1(\blk00000003/sig000002c5 ), + .A2(\blk00000003/sig000002c4 ), + .A3(\blk00000003/blk000001e5/sig00000874 ), + .CE(\blk00000003/blk000001e5/sig0000088d ), + .CLK(clk), + .D(\blk00000003/sig00000477 ), + .Q(\blk00000003/blk000001e5/sig0000087e ), + .Q15(\NLW_blk00000003/blk000001e5/blk00000209_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk000001e5/blk00000208 ( + .A0(\blk00000003/sig000002c6 ), + .A1(\blk00000003/sig000002c5 ), + .A2(\blk00000003/sig000002c4 ), + .A3(\blk00000003/blk000001e5/sig00000874 ), + .CE(\blk00000003/blk000001e5/sig0000088d ), + .CLK(clk), + .D(\blk00000003/sig00000475 ), + .Q(\blk00000003/blk000001e5/sig00000880 ), + .Q15(\NLW_blk00000003/blk000001e5/blk00000208_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk000001e5/blk00000207 ( + .A0(\blk00000003/sig000002c6 ), + .A1(\blk00000003/sig000002c5 ), + .A2(\blk00000003/sig000002c4 ), + .A3(\blk00000003/blk000001e5/sig00000874 ), + .CE(\blk00000003/blk000001e5/sig0000088d ), + .CLK(clk), + .D(\blk00000003/sig00000479 ), + .Q(\blk00000003/blk000001e5/sig0000087c ), + .Q15(\NLW_blk00000003/blk000001e5/blk00000207_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk000001e5/blk00000206 ( + .A0(\blk00000003/sig000002c6 ), + .A1(\blk00000003/sig000002c5 ), + .A2(\blk00000003/sig000002c4 ), + .A3(\blk00000003/blk000001e5/sig00000874 ), + .CE(\blk00000003/blk000001e5/sig0000088d ), + .CLK(clk), + .D(\blk00000003/sig0000047a ), + .Q(\blk00000003/blk000001e5/sig0000087b ), + .Q15(\NLW_blk00000003/blk000001e5/blk00000206_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk000001e5/blk00000205 ( + .A0(\blk00000003/sig000002c6 ), + .A1(\blk00000003/sig000002c5 ), + .A2(\blk00000003/sig000002c4 ), + .A3(\blk00000003/blk000001e5/sig00000874 ), + .CE(\blk00000003/blk000001e5/sig0000088d ), + .CLK(clk), + .D(\blk00000003/sig00000478 ), + .Q(\blk00000003/blk000001e5/sig0000087d ), + .Q15(\NLW_blk00000003/blk000001e5/blk00000205_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk000001e5/blk00000204 ( + .A0(\blk00000003/sig000002c6 ), + .A1(\blk00000003/sig000002c5 ), + .A2(\blk00000003/sig000002c4 ), + .A3(\blk00000003/blk000001e5/sig00000874 ), + .CE(\blk00000003/blk000001e5/sig0000088d ), + .CLK(clk), + .D(\blk00000003/sig0000047c ), + .Q(\blk00000003/blk000001e5/sig00000879 ), + .Q15(\NLW_blk00000003/blk000001e5/blk00000204_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk000001e5/blk00000203 ( + .A0(\blk00000003/sig000002c6 ), + .A1(\blk00000003/sig000002c5 ), + .A2(\blk00000003/sig000002c4 ), + .A3(\blk00000003/blk000001e5/sig00000874 ), + .CE(\blk00000003/blk000001e5/sig0000088d ), + .CLK(clk), + .D(\blk00000003/sig0000047d ), + .Q(\blk00000003/blk000001e5/sig00000878 ), + .Q15(\NLW_blk00000003/blk000001e5/blk00000203_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk000001e5/blk00000202 ( + .A0(\blk00000003/sig000002c6 ), + .A1(\blk00000003/sig000002c5 ), + .A2(\blk00000003/sig000002c4 ), + .A3(\blk00000003/blk000001e5/sig00000874 ), + .CE(\blk00000003/blk000001e5/sig0000088d ), + .CLK(clk), + .D(\blk00000003/sig0000047b ), + .Q(\blk00000003/blk000001e5/sig0000087a ), + .Q15(\NLW_blk00000003/blk000001e5/blk00000202_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk000001e5/blk00000201 ( + .A0(\blk00000003/sig000002c6 ), + .A1(\blk00000003/sig000002c5 ), + .A2(\blk00000003/sig000002c4 ), + .A3(\blk00000003/blk000001e5/sig00000874 ), + .CE(\blk00000003/blk000001e5/sig0000088d ), + .CLK(clk), + .D(\blk00000003/sig0000047f ), + .Q(\blk00000003/blk000001e5/sig00000876 ), + .Q15(\NLW_blk00000003/blk000001e5/blk00000201_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk000001e5/blk00000200 ( + .A0(\blk00000003/sig000002c6 ), + .A1(\blk00000003/sig000002c5 ), + .A2(\blk00000003/sig000002c4 ), + .A3(\blk00000003/blk000001e5/sig00000874 ), + .CE(\blk00000003/blk000001e5/sig0000088d ), + .CLK(clk), + .D(\blk00000003/sig00000480 ), + .Q(\blk00000003/blk000001e5/sig00000875 ), + .Q15(\NLW_blk00000003/blk000001e5/blk00000200_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk000001e5/blk000001ff ( + .A0(\blk00000003/sig000002c6 ), + .A1(\blk00000003/sig000002c5 ), + .A2(\blk00000003/sig000002c4 ), + .A3(\blk00000003/blk000001e5/sig00000874 ), + .CE(\blk00000003/blk000001e5/sig0000088d ), + .CLK(clk), + .D(\blk00000003/sig0000047e ), + .Q(\blk00000003/blk000001e5/sig00000877 ), + .Q15(\NLW_blk00000003/blk000001e5/blk000001ff_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000001e5/blk000001fe ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk000001e5/sig0000088c ), + .Q(\blk00000003/sig000002f4 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000001e5/blk000001fd ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk000001e5/sig0000088b ), + .Q(\blk00000003/sig000002f5 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000001e5/blk000001fc ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk000001e5/sig0000088a ), + .Q(\blk00000003/sig000002f6 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000001e5/blk000001fb ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk000001e5/sig00000889 ), + .Q(\blk00000003/sig000002f7 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000001e5/blk000001fa ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk000001e5/sig00000888 ), + .Q(\blk00000003/sig000002f8 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000001e5/blk000001f9 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk000001e5/sig00000887 ), + .Q(\blk00000003/sig000002f9 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000001e5/blk000001f8 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk000001e5/sig00000886 ), + .Q(\blk00000003/sig000002fa ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000001e5/blk000001f7 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk000001e5/sig00000885 ), + .Q(\blk00000003/sig000002fb ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000001e5/blk000001f6 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk000001e5/sig00000884 ), + .Q(\blk00000003/sig000002fc ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000001e5/blk000001f5 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk000001e5/sig00000883 ), + .Q(\blk00000003/sig000002fd ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000001e5/blk000001f4 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk000001e5/sig00000882 ), + .Q(\blk00000003/sig000002fe ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000001e5/blk000001f3 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk000001e5/sig00000881 ), + .Q(\blk00000003/sig000002ff ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000001e5/blk000001f2 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk000001e5/sig00000880 ), + .Q(\blk00000003/sig00000300 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000001e5/blk000001f1 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk000001e5/sig0000087f ), + .Q(\blk00000003/sig00000301 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000001e5/blk000001f0 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk000001e5/sig0000087e ), + .Q(\blk00000003/sig00000302 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000001e5/blk000001ef ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk000001e5/sig0000087d ), + .Q(\blk00000003/sig00000303 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000001e5/blk000001ee ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk000001e5/sig0000087c ), + .Q(\blk00000003/sig00000304 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000001e5/blk000001ed ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk000001e5/sig0000087b ), + .Q(\blk00000003/sig00000305 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000001e5/blk000001ec ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk000001e5/sig0000087a ), + .Q(\blk00000003/sig00000306 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000001e5/blk000001eb ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk000001e5/sig00000879 ), + .Q(\blk00000003/sig00000307 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000001e5/blk000001ea ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk000001e5/sig00000878 ), + .Q(\blk00000003/sig00000308 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000001e5/blk000001e9 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk000001e5/sig00000877 ), + .Q(\blk00000003/sig00000309 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000001e5/blk000001e8 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk000001e5/sig00000876 ), + .Q(\blk00000003/sig0000030a ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000001e5/blk000001e7 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk000001e5/sig00000875 ), + .Q(\blk00000003/sig0000030b ) + ); + GND \blk00000003/blk000001e5/blk000001e6 ( + .G(\blk00000003/blk000001e5/sig00000874 ) + ); + LUT2 #( + .INIT ( 4'h8 )) + \blk00000003/blk00000218/blk0000024a ( + .I0(ce), + .I1(\blk00000003/sig0000042e ), + .O(\blk00000003/blk00000218/sig000008dd ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000218/blk00000249 ( + .A0(\blk00000003/sig000002d1 ), + .A1(\blk00000003/sig000002d0 ), + .A2(\blk00000003/sig000002cf ), + .A3(\blk00000003/blk00000218/sig000008c4 ), + .CE(\blk00000003/blk00000218/sig000008dd ), + .CLK(clk), + .D(\blk00000003/sig00000482 ), + .Q(\blk00000003/blk00000218/sig000008db ), + .Q15(\NLW_blk00000003/blk00000218/blk00000249_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000218/blk00000248 ( + .A0(\blk00000003/sig000002d1 ), + .A1(\blk00000003/sig000002d0 ), + .A2(\blk00000003/sig000002cf ), + .A3(\blk00000003/blk00000218/sig000008c4 ), + .CE(\blk00000003/blk00000218/sig000008dd ), + .CLK(clk), + .D(\blk00000003/sig00000483 ), + .Q(\blk00000003/blk00000218/sig000008da ), + .Q15(\NLW_blk00000003/blk00000218/blk00000248_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000218/blk00000247 ( + .A0(\blk00000003/sig000002d1 ), + .A1(\blk00000003/sig000002d0 ), + .A2(\blk00000003/sig000002cf ), + .A3(\blk00000003/blk00000218/sig000008c4 ), + .CE(\blk00000003/blk00000218/sig000008dd ), + .CLK(clk), + .D(\blk00000003/sig00000481 ), + .Q(\blk00000003/blk00000218/sig000008dc ), + .Q15(\NLW_blk00000003/blk00000218/blk00000247_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000218/blk00000246 ( + .A0(\blk00000003/sig000002d1 ), + .A1(\blk00000003/sig000002d0 ), + .A2(\blk00000003/sig000002cf ), + .A3(\blk00000003/blk00000218/sig000008c4 ), + .CE(\blk00000003/blk00000218/sig000008dd ), + .CLK(clk), + .D(\blk00000003/sig00000485 ), + .Q(\blk00000003/blk00000218/sig000008d8 ), + .Q15(\NLW_blk00000003/blk00000218/blk00000246_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000218/blk00000245 ( + .A0(\blk00000003/sig000002d1 ), + .A1(\blk00000003/sig000002d0 ), + .A2(\blk00000003/sig000002cf ), + .A3(\blk00000003/blk00000218/sig000008c4 ), + .CE(\blk00000003/blk00000218/sig000008dd ), + .CLK(clk), + .D(\blk00000003/sig00000486 ), + .Q(\blk00000003/blk00000218/sig000008d7 ), + .Q15(\NLW_blk00000003/blk00000218/blk00000245_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000218/blk00000244 ( + .A0(\blk00000003/sig000002d1 ), + .A1(\blk00000003/sig000002d0 ), + .A2(\blk00000003/sig000002cf ), + .A3(\blk00000003/blk00000218/sig000008c4 ), + .CE(\blk00000003/blk00000218/sig000008dd ), + .CLK(clk), + .D(\blk00000003/sig00000484 ), + .Q(\blk00000003/blk00000218/sig000008d9 ), + .Q15(\NLW_blk00000003/blk00000218/blk00000244_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000218/blk00000243 ( + .A0(\blk00000003/sig000002d1 ), + .A1(\blk00000003/sig000002d0 ), + .A2(\blk00000003/sig000002cf ), + .A3(\blk00000003/blk00000218/sig000008c4 ), + .CE(\blk00000003/blk00000218/sig000008dd ), + .CLK(clk), + .D(\blk00000003/sig00000488 ), + .Q(\blk00000003/blk00000218/sig000008d5 ), + .Q15(\NLW_blk00000003/blk00000218/blk00000243_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000218/blk00000242 ( + .A0(\blk00000003/sig000002d1 ), + .A1(\blk00000003/sig000002d0 ), + .A2(\blk00000003/sig000002cf ), + .A3(\blk00000003/blk00000218/sig000008c4 ), + .CE(\blk00000003/blk00000218/sig000008dd ), + .CLK(clk), + .D(\blk00000003/sig00000489 ), + .Q(\blk00000003/blk00000218/sig000008d4 ), + .Q15(\NLW_blk00000003/blk00000218/blk00000242_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000218/blk00000241 ( + .A0(\blk00000003/sig000002d1 ), + .A1(\blk00000003/sig000002d0 ), + .A2(\blk00000003/sig000002cf ), + .A3(\blk00000003/blk00000218/sig000008c4 ), + .CE(\blk00000003/blk00000218/sig000008dd ), + .CLK(clk), + .D(\blk00000003/sig00000487 ), + .Q(\blk00000003/blk00000218/sig000008d6 ), + .Q15(\NLW_blk00000003/blk00000218/blk00000241_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000218/blk00000240 ( + .A0(\blk00000003/sig000002d1 ), + .A1(\blk00000003/sig000002d0 ), + .A2(\blk00000003/sig000002cf ), + .A3(\blk00000003/blk00000218/sig000008c4 ), + .CE(\blk00000003/blk00000218/sig000008dd ), + .CLK(clk), + .D(\blk00000003/sig0000048b ), + .Q(\blk00000003/blk00000218/sig000008d2 ), + .Q15(\NLW_blk00000003/blk00000218/blk00000240_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000218/blk0000023f ( + .A0(\blk00000003/sig000002d1 ), + .A1(\blk00000003/sig000002d0 ), + .A2(\blk00000003/sig000002cf ), + .A3(\blk00000003/blk00000218/sig000008c4 ), + .CE(\blk00000003/blk00000218/sig000008dd ), + .CLK(clk), + .D(\blk00000003/sig0000048c ), + .Q(\blk00000003/blk00000218/sig000008d1 ), + .Q15(\NLW_blk00000003/blk00000218/blk0000023f_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000218/blk0000023e ( + .A0(\blk00000003/sig000002d1 ), + .A1(\blk00000003/sig000002d0 ), + .A2(\blk00000003/sig000002cf ), + .A3(\blk00000003/blk00000218/sig000008c4 ), + .CE(\blk00000003/blk00000218/sig000008dd ), + .CLK(clk), + .D(\blk00000003/sig0000048a ), + .Q(\blk00000003/blk00000218/sig000008d3 ), + .Q15(\NLW_blk00000003/blk00000218/blk0000023e_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000218/blk0000023d ( + .A0(\blk00000003/sig000002d1 ), + .A1(\blk00000003/sig000002d0 ), + .A2(\blk00000003/sig000002cf ), + .A3(\blk00000003/blk00000218/sig000008c4 ), + .CE(\blk00000003/blk00000218/sig000008dd ), + .CLK(clk), + .D(\blk00000003/sig0000048e ), + .Q(\blk00000003/blk00000218/sig000008cf ), + .Q15(\NLW_blk00000003/blk00000218/blk0000023d_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000218/blk0000023c ( + .A0(\blk00000003/sig000002d1 ), + .A1(\blk00000003/sig000002d0 ), + .A2(\blk00000003/sig000002cf ), + .A3(\blk00000003/blk00000218/sig000008c4 ), + .CE(\blk00000003/blk00000218/sig000008dd ), + .CLK(clk), + .D(\blk00000003/sig0000048f ), + .Q(\blk00000003/blk00000218/sig000008ce ), + .Q15(\NLW_blk00000003/blk00000218/blk0000023c_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000218/blk0000023b ( + .A0(\blk00000003/sig000002d1 ), + .A1(\blk00000003/sig000002d0 ), + .A2(\blk00000003/sig000002cf ), + .A3(\blk00000003/blk00000218/sig000008c4 ), + .CE(\blk00000003/blk00000218/sig000008dd ), + .CLK(clk), + .D(\blk00000003/sig0000048d ), + .Q(\blk00000003/blk00000218/sig000008d0 ), + .Q15(\NLW_blk00000003/blk00000218/blk0000023b_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000218/blk0000023a ( + .A0(\blk00000003/sig000002d1 ), + .A1(\blk00000003/sig000002d0 ), + .A2(\blk00000003/sig000002cf ), + .A3(\blk00000003/blk00000218/sig000008c4 ), + .CE(\blk00000003/blk00000218/sig000008dd ), + .CLK(clk), + .D(\blk00000003/sig00000491 ), + .Q(\blk00000003/blk00000218/sig000008cc ), + .Q15(\NLW_blk00000003/blk00000218/blk0000023a_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000218/blk00000239 ( + .A0(\blk00000003/sig000002d1 ), + .A1(\blk00000003/sig000002d0 ), + .A2(\blk00000003/sig000002cf ), + .A3(\blk00000003/blk00000218/sig000008c4 ), + .CE(\blk00000003/blk00000218/sig000008dd ), + .CLK(clk), + .D(\blk00000003/sig00000492 ), + .Q(\blk00000003/blk00000218/sig000008cb ), + .Q15(\NLW_blk00000003/blk00000218/blk00000239_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000218/blk00000238 ( + .A0(\blk00000003/sig000002d1 ), + .A1(\blk00000003/sig000002d0 ), + .A2(\blk00000003/sig000002cf ), + .A3(\blk00000003/blk00000218/sig000008c4 ), + .CE(\blk00000003/blk00000218/sig000008dd ), + .CLK(clk), + .D(\blk00000003/sig00000490 ), + .Q(\blk00000003/blk00000218/sig000008cd ), + .Q15(\NLW_blk00000003/blk00000218/blk00000238_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000218/blk00000237 ( + .A0(\blk00000003/sig000002d1 ), + .A1(\blk00000003/sig000002d0 ), + .A2(\blk00000003/sig000002cf ), + .A3(\blk00000003/blk00000218/sig000008c4 ), + .CE(\blk00000003/blk00000218/sig000008dd ), + .CLK(clk), + .D(\blk00000003/sig00000494 ), + .Q(\blk00000003/blk00000218/sig000008c9 ), + .Q15(\NLW_blk00000003/blk00000218/blk00000237_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000218/blk00000236 ( + .A0(\blk00000003/sig000002d1 ), + .A1(\blk00000003/sig000002d0 ), + .A2(\blk00000003/sig000002cf ), + .A3(\blk00000003/blk00000218/sig000008c4 ), + .CE(\blk00000003/blk00000218/sig000008dd ), + .CLK(clk), + .D(\blk00000003/sig00000495 ), + .Q(\blk00000003/blk00000218/sig000008c8 ), + .Q15(\NLW_blk00000003/blk00000218/blk00000236_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000218/blk00000235 ( + .A0(\blk00000003/sig000002d1 ), + .A1(\blk00000003/sig000002d0 ), + .A2(\blk00000003/sig000002cf ), + .A3(\blk00000003/blk00000218/sig000008c4 ), + .CE(\blk00000003/blk00000218/sig000008dd ), + .CLK(clk), + .D(\blk00000003/sig00000493 ), + .Q(\blk00000003/blk00000218/sig000008ca ), + .Q15(\NLW_blk00000003/blk00000218/blk00000235_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000218/blk00000234 ( + .A0(\blk00000003/sig000002d1 ), + .A1(\blk00000003/sig000002d0 ), + .A2(\blk00000003/sig000002cf ), + .A3(\blk00000003/blk00000218/sig000008c4 ), + .CE(\blk00000003/blk00000218/sig000008dd ), + .CLK(clk), + .D(\blk00000003/sig00000497 ), + .Q(\blk00000003/blk00000218/sig000008c6 ), + .Q15(\NLW_blk00000003/blk00000218/blk00000234_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000218/blk00000233 ( + .A0(\blk00000003/sig000002d1 ), + .A1(\blk00000003/sig000002d0 ), + .A2(\blk00000003/sig000002cf ), + .A3(\blk00000003/blk00000218/sig000008c4 ), + .CE(\blk00000003/blk00000218/sig000008dd ), + .CLK(clk), + .D(\blk00000003/sig00000498 ), + .Q(\blk00000003/blk00000218/sig000008c5 ), + .Q15(\NLW_blk00000003/blk00000218/blk00000233_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000218/blk00000232 ( + .A0(\blk00000003/sig000002d1 ), + .A1(\blk00000003/sig000002d0 ), + .A2(\blk00000003/sig000002cf ), + .A3(\blk00000003/blk00000218/sig000008c4 ), + .CE(\blk00000003/blk00000218/sig000008dd ), + .CLK(clk), + .D(\blk00000003/sig00000496 ), + .Q(\blk00000003/blk00000218/sig000008c7 ), + .Q15(\NLW_blk00000003/blk00000218/blk00000232_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000218/blk00000231 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk00000218/sig000008dc ), + .Q(\blk00000003/sig0000030c ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000218/blk00000230 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk00000218/sig000008db ), + .Q(\blk00000003/sig0000030d ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000218/blk0000022f ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk00000218/sig000008da ), + .Q(\blk00000003/sig0000030e ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000218/blk0000022e ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk00000218/sig000008d9 ), + .Q(\blk00000003/sig0000030f ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000218/blk0000022d ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk00000218/sig000008d8 ), + .Q(\blk00000003/sig00000310 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000218/blk0000022c ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk00000218/sig000008d7 ), + .Q(\blk00000003/sig00000311 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000218/blk0000022b ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk00000218/sig000008d6 ), + .Q(\blk00000003/sig00000312 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000218/blk0000022a ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk00000218/sig000008d5 ), + .Q(\blk00000003/sig00000313 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000218/blk00000229 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk00000218/sig000008d4 ), + .Q(\blk00000003/sig00000314 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000218/blk00000228 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk00000218/sig000008d3 ), + .Q(\blk00000003/sig00000315 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000218/blk00000227 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk00000218/sig000008d2 ), + .Q(\blk00000003/sig00000316 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000218/blk00000226 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk00000218/sig000008d1 ), + .Q(\blk00000003/sig00000317 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000218/blk00000225 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk00000218/sig000008d0 ), + .Q(\blk00000003/sig00000318 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000218/blk00000224 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk00000218/sig000008cf ), + .Q(\blk00000003/sig00000319 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000218/blk00000223 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk00000218/sig000008ce ), + .Q(\blk00000003/sig0000031a ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000218/blk00000222 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk00000218/sig000008cd ), + .Q(\blk00000003/sig0000031b ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000218/blk00000221 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk00000218/sig000008cc ), + .Q(\blk00000003/sig0000031c ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000218/blk00000220 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk00000218/sig000008cb ), + .Q(\blk00000003/sig0000031d ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000218/blk0000021f ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk00000218/sig000008ca ), + .Q(\blk00000003/sig0000031e ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000218/blk0000021e ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk00000218/sig000008c9 ), + .Q(\blk00000003/sig0000031f ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000218/blk0000021d ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk00000218/sig000008c8 ), + .Q(\blk00000003/sig00000320 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000218/blk0000021c ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk00000218/sig000008c7 ), + .Q(\blk00000003/sig00000321 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000218/blk0000021b ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk00000218/sig000008c6 ), + .Q(\blk00000003/sig00000322 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000218/blk0000021a ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk00000218/sig000008c5 ), + .Q(\blk00000003/sig00000323 ) + ); + GND \blk00000003/blk00000218/blk00000219 ( + .G(\blk00000003/blk00000218/sig000008c4 ) + ); + LUT2 #( + .INIT ( 4'h8 )) + \blk00000003/blk0000024b/blk0000027d ( + .I0(ce), + .I1(\blk00000003/sig00000434 ), + .O(\blk00000003/blk0000024b/sig0000092d ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk0000024b/blk0000027c ( + .A0(\blk00000003/sig000002c6 ), + .A1(\blk00000003/sig000002c5 ), + .A2(\blk00000003/sig000002c4 ), + .A3(\blk00000003/blk0000024b/sig00000914 ), + .CE(\blk00000003/blk0000024b/sig0000092d ), + .CLK(clk), + .D(\blk00000003/sig0000049a ), + .Q(\blk00000003/blk0000024b/sig0000092b ), + .Q15(\NLW_blk00000003/blk0000024b/blk0000027c_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk0000024b/blk0000027b ( + .A0(\blk00000003/sig000002c6 ), + .A1(\blk00000003/sig000002c5 ), + .A2(\blk00000003/sig000002c4 ), + .A3(\blk00000003/blk0000024b/sig00000914 ), + .CE(\blk00000003/blk0000024b/sig0000092d ), + .CLK(clk), + .D(\blk00000003/sig0000049b ), + .Q(\blk00000003/blk0000024b/sig0000092a ), + .Q15(\NLW_blk00000003/blk0000024b/blk0000027b_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk0000024b/blk0000027a ( + .A0(\blk00000003/sig000002c6 ), + .A1(\blk00000003/sig000002c5 ), + .A2(\blk00000003/sig000002c4 ), + .A3(\blk00000003/blk0000024b/sig00000914 ), + .CE(\blk00000003/blk0000024b/sig0000092d ), + .CLK(clk), + .D(\blk00000003/sig00000499 ), + .Q(\blk00000003/blk0000024b/sig0000092c ), + .Q15(\NLW_blk00000003/blk0000024b/blk0000027a_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk0000024b/blk00000279 ( + .A0(\blk00000003/sig000002c6 ), + .A1(\blk00000003/sig000002c5 ), + .A2(\blk00000003/sig000002c4 ), + .A3(\blk00000003/blk0000024b/sig00000914 ), + .CE(\blk00000003/blk0000024b/sig0000092d ), + .CLK(clk), + .D(\blk00000003/sig0000049d ), + .Q(\blk00000003/blk0000024b/sig00000928 ), + .Q15(\NLW_blk00000003/blk0000024b/blk00000279_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk0000024b/blk00000278 ( + .A0(\blk00000003/sig000002c6 ), + .A1(\blk00000003/sig000002c5 ), + .A2(\blk00000003/sig000002c4 ), + .A3(\blk00000003/blk0000024b/sig00000914 ), + .CE(\blk00000003/blk0000024b/sig0000092d ), + .CLK(clk), + .D(\blk00000003/sig0000049e ), + .Q(\blk00000003/blk0000024b/sig00000927 ), + .Q15(\NLW_blk00000003/blk0000024b/blk00000278_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk0000024b/blk00000277 ( + .A0(\blk00000003/sig000002c6 ), + .A1(\blk00000003/sig000002c5 ), + .A2(\blk00000003/sig000002c4 ), + .A3(\blk00000003/blk0000024b/sig00000914 ), + .CE(\blk00000003/blk0000024b/sig0000092d ), + .CLK(clk), + .D(\blk00000003/sig0000049c ), + .Q(\blk00000003/blk0000024b/sig00000929 ), + .Q15(\NLW_blk00000003/blk0000024b/blk00000277_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk0000024b/blk00000276 ( + .A0(\blk00000003/sig000002c6 ), + .A1(\blk00000003/sig000002c5 ), + .A2(\blk00000003/sig000002c4 ), + .A3(\blk00000003/blk0000024b/sig00000914 ), + .CE(\blk00000003/blk0000024b/sig0000092d ), + .CLK(clk), + .D(\blk00000003/sig000004a0 ), + .Q(\blk00000003/blk0000024b/sig00000925 ), + .Q15(\NLW_blk00000003/blk0000024b/blk00000276_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk0000024b/blk00000275 ( + .A0(\blk00000003/sig000002c6 ), + .A1(\blk00000003/sig000002c5 ), + .A2(\blk00000003/sig000002c4 ), + .A3(\blk00000003/blk0000024b/sig00000914 ), + .CE(\blk00000003/blk0000024b/sig0000092d ), + .CLK(clk), + .D(\blk00000003/sig000004a1 ), + .Q(\blk00000003/blk0000024b/sig00000924 ), + .Q15(\NLW_blk00000003/blk0000024b/blk00000275_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk0000024b/blk00000274 ( + .A0(\blk00000003/sig000002c6 ), + .A1(\blk00000003/sig000002c5 ), + .A2(\blk00000003/sig000002c4 ), + .A3(\blk00000003/blk0000024b/sig00000914 ), + .CE(\blk00000003/blk0000024b/sig0000092d ), + .CLK(clk), + .D(\blk00000003/sig0000049f ), + .Q(\blk00000003/blk0000024b/sig00000926 ), + .Q15(\NLW_blk00000003/blk0000024b/blk00000274_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk0000024b/blk00000273 ( + .A0(\blk00000003/sig000002c6 ), + .A1(\blk00000003/sig000002c5 ), + .A2(\blk00000003/sig000002c4 ), + .A3(\blk00000003/blk0000024b/sig00000914 ), + .CE(\blk00000003/blk0000024b/sig0000092d ), + .CLK(clk), + .D(\blk00000003/sig000004a3 ), + .Q(\blk00000003/blk0000024b/sig00000922 ), + .Q15(\NLW_blk00000003/blk0000024b/blk00000273_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk0000024b/blk00000272 ( + .A0(\blk00000003/sig000002c6 ), + .A1(\blk00000003/sig000002c5 ), + .A2(\blk00000003/sig000002c4 ), + .A3(\blk00000003/blk0000024b/sig00000914 ), + .CE(\blk00000003/blk0000024b/sig0000092d ), + .CLK(clk), + .D(\blk00000003/sig000004a4 ), + .Q(\blk00000003/blk0000024b/sig00000921 ), + .Q15(\NLW_blk00000003/blk0000024b/blk00000272_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk0000024b/blk00000271 ( + .A0(\blk00000003/sig000002c6 ), + .A1(\blk00000003/sig000002c5 ), + .A2(\blk00000003/sig000002c4 ), + .A3(\blk00000003/blk0000024b/sig00000914 ), + .CE(\blk00000003/blk0000024b/sig0000092d ), + .CLK(clk), + .D(\blk00000003/sig000004a2 ), + .Q(\blk00000003/blk0000024b/sig00000923 ), + .Q15(\NLW_blk00000003/blk0000024b/blk00000271_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk0000024b/blk00000270 ( + .A0(\blk00000003/sig000002c6 ), + .A1(\blk00000003/sig000002c5 ), + .A2(\blk00000003/sig000002c4 ), + .A3(\blk00000003/blk0000024b/sig00000914 ), + .CE(\blk00000003/blk0000024b/sig0000092d ), + .CLK(clk), + .D(\blk00000003/sig000004a6 ), + .Q(\blk00000003/blk0000024b/sig0000091f ), + .Q15(\NLW_blk00000003/blk0000024b/blk00000270_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk0000024b/blk0000026f ( + .A0(\blk00000003/sig000002c6 ), + .A1(\blk00000003/sig000002c5 ), + .A2(\blk00000003/sig000002c4 ), + .A3(\blk00000003/blk0000024b/sig00000914 ), + .CE(\blk00000003/blk0000024b/sig0000092d ), + .CLK(clk), + .D(\blk00000003/sig000004a7 ), + .Q(\blk00000003/blk0000024b/sig0000091e ), + .Q15(\NLW_blk00000003/blk0000024b/blk0000026f_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk0000024b/blk0000026e ( + .A0(\blk00000003/sig000002c6 ), + .A1(\blk00000003/sig000002c5 ), + .A2(\blk00000003/sig000002c4 ), + .A3(\blk00000003/blk0000024b/sig00000914 ), + .CE(\blk00000003/blk0000024b/sig0000092d ), + .CLK(clk), + .D(\blk00000003/sig000004a5 ), + .Q(\blk00000003/blk0000024b/sig00000920 ), + .Q15(\NLW_blk00000003/blk0000024b/blk0000026e_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk0000024b/blk0000026d ( + .A0(\blk00000003/sig000002c6 ), + .A1(\blk00000003/sig000002c5 ), + .A2(\blk00000003/sig000002c4 ), + .A3(\blk00000003/blk0000024b/sig00000914 ), + .CE(\blk00000003/blk0000024b/sig0000092d ), + .CLK(clk), + .D(\blk00000003/sig000004a9 ), + .Q(\blk00000003/blk0000024b/sig0000091c ), + .Q15(\NLW_blk00000003/blk0000024b/blk0000026d_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk0000024b/blk0000026c ( + .A0(\blk00000003/sig000002c6 ), + .A1(\blk00000003/sig000002c5 ), + .A2(\blk00000003/sig000002c4 ), + .A3(\blk00000003/blk0000024b/sig00000914 ), + .CE(\blk00000003/blk0000024b/sig0000092d ), + .CLK(clk), + .D(\blk00000003/sig000004aa ), + .Q(\blk00000003/blk0000024b/sig0000091b ), + .Q15(\NLW_blk00000003/blk0000024b/blk0000026c_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk0000024b/blk0000026b ( + .A0(\blk00000003/sig000002c6 ), + .A1(\blk00000003/sig000002c5 ), + .A2(\blk00000003/sig000002c4 ), + .A3(\blk00000003/blk0000024b/sig00000914 ), + .CE(\blk00000003/blk0000024b/sig0000092d ), + .CLK(clk), + .D(\blk00000003/sig000004a8 ), + .Q(\blk00000003/blk0000024b/sig0000091d ), + .Q15(\NLW_blk00000003/blk0000024b/blk0000026b_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk0000024b/blk0000026a ( + .A0(\blk00000003/sig000002c6 ), + .A1(\blk00000003/sig000002c5 ), + .A2(\blk00000003/sig000002c4 ), + .A3(\blk00000003/blk0000024b/sig00000914 ), + .CE(\blk00000003/blk0000024b/sig0000092d ), + .CLK(clk), + .D(\blk00000003/sig000004ac ), + .Q(\blk00000003/blk0000024b/sig00000919 ), + .Q15(\NLW_blk00000003/blk0000024b/blk0000026a_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk0000024b/blk00000269 ( + .A0(\blk00000003/sig000002c6 ), + .A1(\blk00000003/sig000002c5 ), + .A2(\blk00000003/sig000002c4 ), + .A3(\blk00000003/blk0000024b/sig00000914 ), + .CE(\blk00000003/blk0000024b/sig0000092d ), + .CLK(clk), + .D(\blk00000003/sig000004ad ), + .Q(\blk00000003/blk0000024b/sig00000918 ), + .Q15(\NLW_blk00000003/blk0000024b/blk00000269_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk0000024b/blk00000268 ( + .A0(\blk00000003/sig000002c6 ), + .A1(\blk00000003/sig000002c5 ), + .A2(\blk00000003/sig000002c4 ), + .A3(\blk00000003/blk0000024b/sig00000914 ), + .CE(\blk00000003/blk0000024b/sig0000092d ), + .CLK(clk), + .D(\blk00000003/sig000004ab ), + .Q(\blk00000003/blk0000024b/sig0000091a ), + .Q15(\NLW_blk00000003/blk0000024b/blk00000268_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk0000024b/blk00000267 ( + .A0(\blk00000003/sig000002c6 ), + .A1(\blk00000003/sig000002c5 ), + .A2(\blk00000003/sig000002c4 ), + .A3(\blk00000003/blk0000024b/sig00000914 ), + .CE(\blk00000003/blk0000024b/sig0000092d ), + .CLK(clk), + .D(\blk00000003/sig000004af ), + .Q(\blk00000003/blk0000024b/sig00000916 ), + .Q15(\NLW_blk00000003/blk0000024b/blk00000267_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk0000024b/blk00000266 ( + .A0(\blk00000003/sig000002c6 ), + .A1(\blk00000003/sig000002c5 ), + .A2(\blk00000003/sig000002c4 ), + .A3(\blk00000003/blk0000024b/sig00000914 ), + .CE(\blk00000003/blk0000024b/sig0000092d ), + .CLK(clk), + .D(\blk00000003/sig000004b0 ), + .Q(\blk00000003/blk0000024b/sig00000915 ), + .Q15(\NLW_blk00000003/blk0000024b/blk00000266_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk0000024b/blk00000265 ( + .A0(\blk00000003/sig000002c6 ), + .A1(\blk00000003/sig000002c5 ), + .A2(\blk00000003/sig000002c4 ), + .A3(\blk00000003/blk0000024b/sig00000914 ), + .CE(\blk00000003/blk0000024b/sig0000092d ), + .CLK(clk), + .D(\blk00000003/sig000004ae ), + .Q(\blk00000003/blk0000024b/sig00000917 ), + .Q15(\NLW_blk00000003/blk0000024b/blk00000265_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk0000024b/blk00000264 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk0000024b/sig0000092c ), + .Q(\blk00000003/sig00000354 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk0000024b/blk00000263 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk0000024b/sig0000092b ), + .Q(\blk00000003/sig00000355 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk0000024b/blk00000262 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk0000024b/sig0000092a ), + .Q(\blk00000003/sig00000356 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk0000024b/blk00000261 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk0000024b/sig00000929 ), + .Q(\blk00000003/sig00000357 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk0000024b/blk00000260 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk0000024b/sig00000928 ), + .Q(\blk00000003/sig00000358 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk0000024b/blk0000025f ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk0000024b/sig00000927 ), + .Q(\blk00000003/sig00000359 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk0000024b/blk0000025e ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk0000024b/sig00000926 ), + .Q(\blk00000003/sig0000035a ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk0000024b/blk0000025d ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk0000024b/sig00000925 ), + .Q(\blk00000003/sig0000035b ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk0000024b/blk0000025c ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk0000024b/sig00000924 ), + .Q(\blk00000003/sig0000035c ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk0000024b/blk0000025b ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk0000024b/sig00000923 ), + .Q(\blk00000003/sig0000035d ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk0000024b/blk0000025a ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk0000024b/sig00000922 ), + .Q(\blk00000003/sig0000035e ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk0000024b/blk00000259 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk0000024b/sig00000921 ), + .Q(\blk00000003/sig0000035f ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk0000024b/blk00000258 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk0000024b/sig00000920 ), + .Q(\blk00000003/sig00000360 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk0000024b/blk00000257 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk0000024b/sig0000091f ), + .Q(\blk00000003/sig00000361 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk0000024b/blk00000256 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk0000024b/sig0000091e ), + .Q(\blk00000003/sig00000362 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk0000024b/blk00000255 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk0000024b/sig0000091d ), + .Q(\blk00000003/sig00000363 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk0000024b/blk00000254 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk0000024b/sig0000091c ), + .Q(\blk00000003/sig00000364 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk0000024b/blk00000253 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk0000024b/sig0000091b ), + .Q(\blk00000003/sig00000365 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk0000024b/blk00000252 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk0000024b/sig0000091a ), + .Q(\blk00000003/sig00000366 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk0000024b/blk00000251 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk0000024b/sig00000919 ), + .Q(\blk00000003/sig00000367 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk0000024b/blk00000250 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk0000024b/sig00000918 ), + .Q(\blk00000003/sig00000368 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk0000024b/blk0000024f ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk0000024b/sig00000917 ), + .Q(\blk00000003/sig00000369 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk0000024b/blk0000024e ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk0000024b/sig00000916 ), + .Q(\blk00000003/sig0000036a ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk0000024b/blk0000024d ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk0000024b/sig00000915 ), + .Q(\blk00000003/sig0000036b ) + ); + GND \blk00000003/blk0000024b/blk0000024c ( + .G(\blk00000003/blk0000024b/sig00000914 ) + ); + LUT2 #( + .INIT ( 4'h8 )) + \blk00000003/blk0000027e/blk000002b0 ( + .I0(ce), + .I1(\blk00000003/sig0000042e ), + .O(\blk00000003/blk0000027e/sig0000097d ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk0000027e/blk000002af ( + .A0(\blk00000003/sig000002d1 ), + .A1(\blk00000003/sig000002d0 ), + .A2(\blk00000003/sig000002cf ), + .A3(\blk00000003/blk0000027e/sig00000964 ), + .CE(\blk00000003/blk0000027e/sig0000097d ), + .CLK(clk), + .D(\blk00000003/sig000004b2 ), + .Q(\blk00000003/blk0000027e/sig0000097b ), + .Q15(\NLW_blk00000003/blk0000027e/blk000002af_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk0000027e/blk000002ae ( + .A0(\blk00000003/sig000002d1 ), + .A1(\blk00000003/sig000002d0 ), + .A2(\blk00000003/sig000002cf ), + .A3(\blk00000003/blk0000027e/sig00000964 ), + .CE(\blk00000003/blk0000027e/sig0000097d ), + .CLK(clk), + .D(\blk00000003/sig000004b3 ), + .Q(\blk00000003/blk0000027e/sig0000097a ), + .Q15(\NLW_blk00000003/blk0000027e/blk000002ae_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk0000027e/blk000002ad ( + .A0(\blk00000003/sig000002d1 ), + .A1(\blk00000003/sig000002d0 ), + .A2(\blk00000003/sig000002cf ), + .A3(\blk00000003/blk0000027e/sig00000964 ), + .CE(\blk00000003/blk0000027e/sig0000097d ), + .CLK(clk), + .D(\blk00000003/sig000004b1 ), + .Q(\blk00000003/blk0000027e/sig0000097c ), + .Q15(\NLW_blk00000003/blk0000027e/blk000002ad_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk0000027e/blk000002ac ( + .A0(\blk00000003/sig000002d1 ), + .A1(\blk00000003/sig000002d0 ), + .A2(\blk00000003/sig000002cf ), + .A3(\blk00000003/blk0000027e/sig00000964 ), + .CE(\blk00000003/blk0000027e/sig0000097d ), + .CLK(clk), + .D(\blk00000003/sig000004b5 ), + .Q(\blk00000003/blk0000027e/sig00000978 ), + .Q15(\NLW_blk00000003/blk0000027e/blk000002ac_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk0000027e/blk000002ab ( + .A0(\blk00000003/sig000002d1 ), + .A1(\blk00000003/sig000002d0 ), + .A2(\blk00000003/sig000002cf ), + .A3(\blk00000003/blk0000027e/sig00000964 ), + .CE(\blk00000003/blk0000027e/sig0000097d ), + .CLK(clk), + .D(\blk00000003/sig000004b6 ), + .Q(\blk00000003/blk0000027e/sig00000977 ), + .Q15(\NLW_blk00000003/blk0000027e/blk000002ab_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk0000027e/blk000002aa ( + .A0(\blk00000003/sig000002d1 ), + .A1(\blk00000003/sig000002d0 ), + .A2(\blk00000003/sig000002cf ), + .A3(\blk00000003/blk0000027e/sig00000964 ), + .CE(\blk00000003/blk0000027e/sig0000097d ), + .CLK(clk), + .D(\blk00000003/sig000004b4 ), + .Q(\blk00000003/blk0000027e/sig00000979 ), + .Q15(\NLW_blk00000003/blk0000027e/blk000002aa_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk0000027e/blk000002a9 ( + .A0(\blk00000003/sig000002d1 ), + .A1(\blk00000003/sig000002d0 ), + .A2(\blk00000003/sig000002cf ), + .A3(\blk00000003/blk0000027e/sig00000964 ), + .CE(\blk00000003/blk0000027e/sig0000097d ), + .CLK(clk), + .D(\blk00000003/sig000004b8 ), + .Q(\blk00000003/blk0000027e/sig00000975 ), + .Q15(\NLW_blk00000003/blk0000027e/blk000002a9_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk0000027e/blk000002a8 ( + .A0(\blk00000003/sig000002d1 ), + .A1(\blk00000003/sig000002d0 ), + .A2(\blk00000003/sig000002cf ), + .A3(\blk00000003/blk0000027e/sig00000964 ), + .CE(\blk00000003/blk0000027e/sig0000097d ), + .CLK(clk), + .D(\blk00000003/sig000004b9 ), + .Q(\blk00000003/blk0000027e/sig00000974 ), + .Q15(\NLW_blk00000003/blk0000027e/blk000002a8_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk0000027e/blk000002a7 ( + .A0(\blk00000003/sig000002d1 ), + .A1(\blk00000003/sig000002d0 ), + .A2(\blk00000003/sig000002cf ), + .A3(\blk00000003/blk0000027e/sig00000964 ), + .CE(\blk00000003/blk0000027e/sig0000097d ), + .CLK(clk), + .D(\blk00000003/sig000004b7 ), + .Q(\blk00000003/blk0000027e/sig00000976 ), + .Q15(\NLW_blk00000003/blk0000027e/blk000002a7_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk0000027e/blk000002a6 ( + .A0(\blk00000003/sig000002d1 ), + .A1(\blk00000003/sig000002d0 ), + .A2(\blk00000003/sig000002cf ), + .A3(\blk00000003/blk0000027e/sig00000964 ), + .CE(\blk00000003/blk0000027e/sig0000097d ), + .CLK(clk), + .D(\blk00000003/sig000004bb ), + .Q(\blk00000003/blk0000027e/sig00000972 ), + .Q15(\NLW_blk00000003/blk0000027e/blk000002a6_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk0000027e/blk000002a5 ( + .A0(\blk00000003/sig000002d1 ), + .A1(\blk00000003/sig000002d0 ), + .A2(\blk00000003/sig000002cf ), + .A3(\blk00000003/blk0000027e/sig00000964 ), + .CE(\blk00000003/blk0000027e/sig0000097d ), + .CLK(clk), + .D(\blk00000003/sig000004bc ), + .Q(\blk00000003/blk0000027e/sig00000971 ), + .Q15(\NLW_blk00000003/blk0000027e/blk000002a5_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk0000027e/blk000002a4 ( + .A0(\blk00000003/sig000002d1 ), + .A1(\blk00000003/sig000002d0 ), + .A2(\blk00000003/sig000002cf ), + .A3(\blk00000003/blk0000027e/sig00000964 ), + .CE(\blk00000003/blk0000027e/sig0000097d ), + .CLK(clk), + .D(\blk00000003/sig000004ba ), + .Q(\blk00000003/blk0000027e/sig00000973 ), + .Q15(\NLW_blk00000003/blk0000027e/blk000002a4_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk0000027e/blk000002a3 ( + .A0(\blk00000003/sig000002d1 ), + .A1(\blk00000003/sig000002d0 ), + .A2(\blk00000003/sig000002cf ), + .A3(\blk00000003/blk0000027e/sig00000964 ), + .CE(\blk00000003/blk0000027e/sig0000097d ), + .CLK(clk), + .D(\blk00000003/sig000004be ), + .Q(\blk00000003/blk0000027e/sig0000096f ), + .Q15(\NLW_blk00000003/blk0000027e/blk000002a3_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk0000027e/blk000002a2 ( + .A0(\blk00000003/sig000002d1 ), + .A1(\blk00000003/sig000002d0 ), + .A2(\blk00000003/sig000002cf ), + .A3(\blk00000003/blk0000027e/sig00000964 ), + .CE(\blk00000003/blk0000027e/sig0000097d ), + .CLK(clk), + .D(\blk00000003/sig000004bf ), + .Q(\blk00000003/blk0000027e/sig0000096e ), + .Q15(\NLW_blk00000003/blk0000027e/blk000002a2_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk0000027e/blk000002a1 ( + .A0(\blk00000003/sig000002d1 ), + .A1(\blk00000003/sig000002d0 ), + .A2(\blk00000003/sig000002cf ), + .A3(\blk00000003/blk0000027e/sig00000964 ), + .CE(\blk00000003/blk0000027e/sig0000097d ), + .CLK(clk), + .D(\blk00000003/sig000004bd ), + .Q(\blk00000003/blk0000027e/sig00000970 ), + .Q15(\NLW_blk00000003/blk0000027e/blk000002a1_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk0000027e/blk000002a0 ( + .A0(\blk00000003/sig000002d1 ), + .A1(\blk00000003/sig000002d0 ), + .A2(\blk00000003/sig000002cf ), + .A3(\blk00000003/blk0000027e/sig00000964 ), + .CE(\blk00000003/blk0000027e/sig0000097d ), + .CLK(clk), + .D(\blk00000003/sig000004c1 ), + .Q(\blk00000003/blk0000027e/sig0000096c ), + .Q15(\NLW_blk00000003/blk0000027e/blk000002a0_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk0000027e/blk0000029f ( + .A0(\blk00000003/sig000002d1 ), + .A1(\blk00000003/sig000002d0 ), + .A2(\blk00000003/sig000002cf ), + .A3(\blk00000003/blk0000027e/sig00000964 ), + .CE(\blk00000003/blk0000027e/sig0000097d ), + .CLK(clk), + .D(\blk00000003/sig000004c2 ), + .Q(\blk00000003/blk0000027e/sig0000096b ), + .Q15(\NLW_blk00000003/blk0000027e/blk0000029f_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk0000027e/blk0000029e ( + .A0(\blk00000003/sig000002d1 ), + .A1(\blk00000003/sig000002d0 ), + .A2(\blk00000003/sig000002cf ), + .A3(\blk00000003/blk0000027e/sig00000964 ), + .CE(\blk00000003/blk0000027e/sig0000097d ), + .CLK(clk), + .D(\blk00000003/sig000004c0 ), + .Q(\blk00000003/blk0000027e/sig0000096d ), + .Q15(\NLW_blk00000003/blk0000027e/blk0000029e_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk0000027e/blk0000029d ( + .A0(\blk00000003/sig000002d1 ), + .A1(\blk00000003/sig000002d0 ), + .A2(\blk00000003/sig000002cf ), + .A3(\blk00000003/blk0000027e/sig00000964 ), + .CE(\blk00000003/blk0000027e/sig0000097d ), + .CLK(clk), + .D(\blk00000003/sig000004c4 ), + .Q(\blk00000003/blk0000027e/sig00000969 ), + .Q15(\NLW_blk00000003/blk0000027e/blk0000029d_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk0000027e/blk0000029c ( + .A0(\blk00000003/sig000002d1 ), + .A1(\blk00000003/sig000002d0 ), + .A2(\blk00000003/sig000002cf ), + .A3(\blk00000003/blk0000027e/sig00000964 ), + .CE(\blk00000003/blk0000027e/sig0000097d ), + .CLK(clk), + .D(\blk00000003/sig000004c5 ), + .Q(\blk00000003/blk0000027e/sig00000968 ), + .Q15(\NLW_blk00000003/blk0000027e/blk0000029c_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk0000027e/blk0000029b ( + .A0(\blk00000003/sig000002d1 ), + .A1(\blk00000003/sig000002d0 ), + .A2(\blk00000003/sig000002cf ), + .A3(\blk00000003/blk0000027e/sig00000964 ), + .CE(\blk00000003/blk0000027e/sig0000097d ), + .CLK(clk), + .D(\blk00000003/sig000004c3 ), + .Q(\blk00000003/blk0000027e/sig0000096a ), + .Q15(\NLW_blk00000003/blk0000027e/blk0000029b_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk0000027e/blk0000029a ( + .A0(\blk00000003/sig000002d1 ), + .A1(\blk00000003/sig000002d0 ), + .A2(\blk00000003/sig000002cf ), + .A3(\blk00000003/blk0000027e/sig00000964 ), + .CE(\blk00000003/blk0000027e/sig0000097d ), + .CLK(clk), + .D(\blk00000003/sig000004c7 ), + .Q(\blk00000003/blk0000027e/sig00000966 ), + .Q15(\NLW_blk00000003/blk0000027e/blk0000029a_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk0000027e/blk00000299 ( + .A0(\blk00000003/sig000002d1 ), + .A1(\blk00000003/sig000002d0 ), + .A2(\blk00000003/sig000002cf ), + .A3(\blk00000003/blk0000027e/sig00000964 ), + .CE(\blk00000003/blk0000027e/sig0000097d ), + .CLK(clk), + .D(\blk00000003/sig000004c8 ), + .Q(\blk00000003/blk0000027e/sig00000965 ), + .Q15(\NLW_blk00000003/blk0000027e/blk00000299_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk0000027e/blk00000298 ( + .A0(\blk00000003/sig000002d1 ), + .A1(\blk00000003/sig000002d0 ), + .A2(\blk00000003/sig000002cf ), + .A3(\blk00000003/blk0000027e/sig00000964 ), + .CE(\blk00000003/blk0000027e/sig0000097d ), + .CLK(clk), + .D(\blk00000003/sig000004c6 ), + .Q(\blk00000003/blk0000027e/sig00000967 ), + .Q15(\NLW_blk00000003/blk0000027e/blk00000298_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk0000027e/blk00000297 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk0000027e/sig0000097c ), + .Q(\blk00000003/sig0000036c ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk0000027e/blk00000296 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk0000027e/sig0000097b ), + .Q(\blk00000003/sig0000036d ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk0000027e/blk00000295 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk0000027e/sig0000097a ), + .Q(\blk00000003/sig0000036e ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk0000027e/blk00000294 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk0000027e/sig00000979 ), + .Q(\blk00000003/sig0000036f ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk0000027e/blk00000293 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk0000027e/sig00000978 ), + .Q(\blk00000003/sig00000370 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk0000027e/blk00000292 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk0000027e/sig00000977 ), + .Q(\blk00000003/sig00000371 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk0000027e/blk00000291 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk0000027e/sig00000976 ), + .Q(\blk00000003/sig00000372 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk0000027e/blk00000290 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk0000027e/sig00000975 ), + .Q(\blk00000003/sig00000373 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk0000027e/blk0000028f ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk0000027e/sig00000974 ), + .Q(\blk00000003/sig00000374 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk0000027e/blk0000028e ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk0000027e/sig00000973 ), + .Q(\blk00000003/sig00000375 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk0000027e/blk0000028d ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk0000027e/sig00000972 ), + .Q(\blk00000003/sig00000376 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk0000027e/blk0000028c ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk0000027e/sig00000971 ), + .Q(\blk00000003/sig00000377 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk0000027e/blk0000028b ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk0000027e/sig00000970 ), + .Q(\blk00000003/sig00000378 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk0000027e/blk0000028a ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk0000027e/sig0000096f ), + .Q(\blk00000003/sig00000379 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk0000027e/blk00000289 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk0000027e/sig0000096e ), + .Q(\blk00000003/sig0000037a ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk0000027e/blk00000288 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk0000027e/sig0000096d ), + .Q(\blk00000003/sig0000037b ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk0000027e/blk00000287 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk0000027e/sig0000096c ), + .Q(\blk00000003/sig0000037c ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk0000027e/blk00000286 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk0000027e/sig0000096b ), + .Q(\blk00000003/sig0000037d ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk0000027e/blk00000285 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk0000027e/sig0000096a ), + .Q(\blk00000003/sig0000037e ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk0000027e/blk00000284 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk0000027e/sig00000969 ), + .Q(\blk00000003/sig0000037f ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk0000027e/blk00000283 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk0000027e/sig00000968 ), + .Q(\blk00000003/sig00000380 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk0000027e/blk00000282 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk0000027e/sig00000967 ), + .Q(\blk00000003/sig00000381 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk0000027e/blk00000281 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk0000027e/sig00000966 ), + .Q(\blk00000003/sig00000382 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk0000027e/blk00000280 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk0000027e/sig00000965 ), + .Q(\blk00000003/sig00000383 ) + ); + GND \blk00000003/blk0000027e/blk0000027f ( + .G(\blk00000003/blk0000027e/sig00000964 ) + ); + LUT2 #( + .INIT ( 4'h8 )) + \blk00000003/blk000002b1/blk000002e9 ( + .I0(ce), + .I1(\blk00000003/sig00000234 ), + .O(\blk00000003/blk000002b1/sig000009e4 ) + ); + RAM32X1D #( + .INIT ( 32'h00000055 )) + \blk00000003/blk000002b1/blk000002e8 ( + .A0(\blk00000003/sig0000026a ), + .A1(\blk00000003/sig0000026e ), + .A2(\blk00000003/sig00000271 ), + .A3(\blk00000003/sig00000275 ), + .A4(\blk00000003/blk000002b1/sig000009bf ), + .D(\blk00000003/sig000004c9 ), + .DPRA0(\blk00000003/sig000002d3 ), + .DPRA1(\blk00000003/sig000002d7 ), + .DPRA2(\blk00000003/sig000002da ), + .DPRA3(\blk00000003/sig000002e1 ), + .DPRA4(\blk00000003/blk000002b1/sig000009bf ), + .WCLK(clk), + .WE(\blk00000003/blk000002b1/sig000009e4 ), + .SPO(\blk00000003/blk000002b1/sig000009d1 ), + .DPO(\blk00000003/blk000002b1/sig000009e3 ) + ); + RAM32X1D #( + .INIT ( 32'h00000055 )) + \blk00000003/blk000002b1/blk000002e7 ( + .A0(\blk00000003/sig0000026a ), + .A1(\blk00000003/sig0000026e ), + .A2(\blk00000003/sig00000271 ), + .A3(\blk00000003/sig00000275 ), + .A4(\blk00000003/blk000002b1/sig000009bf ), + .D(\blk00000003/sig000004ca ), + .DPRA0(\blk00000003/sig000002d3 ), + .DPRA1(\blk00000003/sig000002d7 ), + .DPRA2(\blk00000003/sig000002da ), + .DPRA3(\blk00000003/sig000002e1 ), + .DPRA4(\blk00000003/blk000002b1/sig000009bf ), + .WCLK(clk), + .WE(\blk00000003/blk000002b1/sig000009e4 ), + .SPO(\blk00000003/blk000002b1/sig000009d0 ), + .DPO(\blk00000003/blk000002b1/sig000009e2 ) + ); + RAM32X1D #( + .INIT ( 32'h00000055 )) + \blk00000003/blk000002b1/blk000002e6 ( + .A0(\blk00000003/sig0000026a ), + .A1(\blk00000003/sig0000026e ), + .A2(\blk00000003/sig00000271 ), + .A3(\blk00000003/sig00000275 ), + .A4(\blk00000003/blk000002b1/sig000009bf ), + .D(\blk00000003/sig000004cb ), + .DPRA0(\blk00000003/sig000002d3 ), + .DPRA1(\blk00000003/sig000002d7 ), + .DPRA2(\blk00000003/sig000002da ), + .DPRA3(\blk00000003/sig000002e1 ), + .DPRA4(\blk00000003/blk000002b1/sig000009bf ), + .WCLK(clk), + .WE(\blk00000003/blk000002b1/sig000009e4 ), + .SPO(\blk00000003/blk000002b1/sig000009cf ), + .DPO(\blk00000003/blk000002b1/sig000009e1 ) + ); + RAM32X1D #( + .INIT ( 32'h00000055 )) + \blk00000003/blk000002b1/blk000002e5 ( + .A0(\blk00000003/sig0000026a ), + .A1(\blk00000003/sig0000026e ), + .A2(\blk00000003/sig00000271 ), + .A3(\blk00000003/sig00000275 ), + .A4(\blk00000003/blk000002b1/sig000009bf ), + .D(\blk00000003/sig000004cc ), + .DPRA0(\blk00000003/sig000002d3 ), + .DPRA1(\blk00000003/sig000002d7 ), + .DPRA2(\blk00000003/sig000002da ), + .DPRA3(\blk00000003/sig000002e1 ), + .DPRA4(\blk00000003/blk000002b1/sig000009bf ), + .WCLK(clk), + .WE(\blk00000003/blk000002b1/sig000009e4 ), + .SPO(\blk00000003/blk000002b1/sig000009ce ), + .DPO(\blk00000003/blk000002b1/sig000009e0 ) + ); + RAM32X1D #( + .INIT ( 32'h00000055 )) + \blk00000003/blk000002b1/blk000002e4 ( + .A0(\blk00000003/sig0000026a ), + .A1(\blk00000003/sig0000026e ), + .A2(\blk00000003/sig00000271 ), + .A3(\blk00000003/sig00000275 ), + .A4(\blk00000003/blk000002b1/sig000009bf ), + .D(\blk00000003/sig000004cd ), + .DPRA0(\blk00000003/sig000002d3 ), + .DPRA1(\blk00000003/sig000002d7 ), + .DPRA2(\blk00000003/sig000002da ), + .DPRA3(\blk00000003/sig000002e1 ), + .DPRA4(\blk00000003/blk000002b1/sig000009bf ), + .WCLK(clk), + .WE(\blk00000003/blk000002b1/sig000009e4 ), + .SPO(\blk00000003/blk000002b1/sig000009cd ), + .DPO(\blk00000003/blk000002b1/sig000009df ) + ); + RAM32X1D #( + .INIT ( 32'h00000055 )) + \blk00000003/blk000002b1/blk000002e3 ( + .A0(\blk00000003/sig0000026a ), + .A1(\blk00000003/sig0000026e ), + .A2(\blk00000003/sig00000271 ), + .A3(\blk00000003/sig00000275 ), + .A4(\blk00000003/blk000002b1/sig000009bf ), + .D(\blk00000003/sig000004ce ), + .DPRA0(\blk00000003/sig000002d3 ), + .DPRA1(\blk00000003/sig000002d7 ), + .DPRA2(\blk00000003/sig000002da ), + .DPRA3(\blk00000003/sig000002e1 ), + .DPRA4(\blk00000003/blk000002b1/sig000009bf ), + .WCLK(clk), + .WE(\blk00000003/blk000002b1/sig000009e4 ), + .SPO(\blk00000003/blk000002b1/sig000009cc ), + .DPO(\blk00000003/blk000002b1/sig000009de ) + ); + RAM32X1D #( + .INIT ( 32'h00000095 )) + \blk00000003/blk000002b1/blk000002e2 ( + .A0(\blk00000003/sig0000026a ), + .A1(\blk00000003/sig0000026e ), + .A2(\blk00000003/sig00000271 ), + .A3(\blk00000003/sig00000275 ), + .A4(\blk00000003/blk000002b1/sig000009bf ), + .D(\blk00000003/sig000004d0 ), + .DPRA0(\blk00000003/sig000002d3 ), + .DPRA1(\blk00000003/sig000002d7 ), + .DPRA2(\blk00000003/sig000002da ), + .DPRA3(\blk00000003/sig000002e1 ), + .DPRA4(\blk00000003/blk000002b1/sig000009bf ), + .WCLK(clk), + .WE(\blk00000003/blk000002b1/sig000009e4 ), + .SPO(\blk00000003/blk000002b1/sig000009ca ), + .DPO(\blk00000003/blk000002b1/sig000009dc ) + ); + RAM32X1D #( + .INIT ( 32'h000000E5 )) + \blk00000003/blk000002b1/blk000002e1 ( + .A0(\blk00000003/sig0000026a ), + .A1(\blk00000003/sig0000026e ), + .A2(\blk00000003/sig00000271 ), + .A3(\blk00000003/sig00000275 ), + .A4(\blk00000003/blk000002b1/sig000009bf ), + .D(\blk00000003/sig000004d1 ), + .DPRA0(\blk00000003/sig000002d3 ), + .DPRA1(\blk00000003/sig000002d7 ), + .DPRA2(\blk00000003/sig000002da ), + .DPRA3(\blk00000003/sig000002e1 ), + .DPRA4(\blk00000003/blk000002b1/sig000009bf ), + .WCLK(clk), + .WE(\blk00000003/blk000002b1/sig000009e4 ), + .SPO(\blk00000003/blk000002b1/sig000009c9 ), + .DPO(\blk00000003/blk000002b1/sig000009db ) + ); + RAM32X1D #( + .INIT ( 32'h00000055 )) + \blk00000003/blk000002b1/blk000002e0 ( + .A0(\blk00000003/sig0000026a ), + .A1(\blk00000003/sig0000026e ), + .A2(\blk00000003/sig00000271 ), + .A3(\blk00000003/sig00000275 ), + .A4(\blk00000003/blk000002b1/sig000009bf ), + .D(\blk00000003/sig000004cf ), + .DPRA0(\blk00000003/sig000002d3 ), + .DPRA1(\blk00000003/sig000002d7 ), + .DPRA2(\blk00000003/sig000002da ), + .DPRA3(\blk00000003/sig000002e1 ), + .DPRA4(\blk00000003/blk000002b1/sig000009bf ), + .WCLK(clk), + .WE(\blk00000003/blk000002b1/sig000009e4 ), + .SPO(\blk00000003/blk000002b1/sig000009cb ), + .DPO(\blk00000003/blk000002b1/sig000009dd ) + ); + RAM32X1D #( + .INIT ( 32'h000000BD )) + \blk00000003/blk000002b1/blk000002df ( + .A0(\blk00000003/sig0000026a ), + .A1(\blk00000003/sig0000026e ), + .A2(\blk00000003/sig00000271 ), + .A3(\blk00000003/sig00000275 ), + .A4(\blk00000003/blk000002b1/sig000009bf ), + .D(\blk00000003/sig000004d2 ), + .DPRA0(\blk00000003/sig000002d3 ), + .DPRA1(\blk00000003/sig000002d7 ), + .DPRA2(\blk00000003/sig000002da ), + .DPRA3(\blk00000003/sig000002e1 ), + .DPRA4(\blk00000003/blk000002b1/sig000009bf ), + .WCLK(clk), + .WE(\blk00000003/blk000002b1/sig000009e4 ), + .SPO(\blk00000003/blk000002b1/sig000009c8 ), + .DPO(\blk00000003/blk000002b1/sig000009da ) + ); + RAM32X1D #( + .INIT ( 32'h000000F1 )) + \blk00000003/blk000002b1/blk000002de ( + .A0(\blk00000003/sig0000026a ), + .A1(\blk00000003/sig0000026e ), + .A2(\blk00000003/sig00000271 ), + .A3(\blk00000003/sig00000275 ), + .A4(\blk00000003/blk000002b1/sig000009bf ), + .D(\blk00000003/sig000004d3 ), + .DPRA0(\blk00000003/sig000002d3 ), + .DPRA1(\blk00000003/sig000002d7 ), + .DPRA2(\blk00000003/sig000002da ), + .DPRA3(\blk00000003/sig000002e1 ), + .DPRA4(\blk00000003/blk000002b1/sig000009bf ), + .WCLK(clk), + .WE(\blk00000003/blk000002b1/sig000009e4 ), + .SPO(\blk00000003/blk000002b1/sig000009c7 ), + .DPO(\blk00000003/blk000002b1/sig000009d9 ) + ); + RAM32X1D #( + .INIT ( 32'h0000000B )) + \blk00000003/blk000002b1/blk000002dd ( + .A0(\blk00000003/sig0000026a ), + .A1(\blk00000003/sig0000026e ), + .A2(\blk00000003/sig00000271 ), + .A3(\blk00000003/sig00000275 ), + .A4(\blk00000003/blk000002b1/sig000009bf ), + .D(\blk00000003/sig000004d4 ), + .DPRA0(\blk00000003/sig000002d3 ), + .DPRA1(\blk00000003/sig000002d7 ), + .DPRA2(\blk00000003/sig000002da ), + .DPRA3(\blk00000003/sig000002e1 ), + .DPRA4(\blk00000003/blk000002b1/sig000009bf ), + .WCLK(clk), + .WE(\blk00000003/blk000002b1/sig000009e4 ), + .SPO(\blk00000003/blk000002b1/sig000009c6 ), + .DPO(\blk00000003/blk000002b1/sig000009d8 ) + ); + RAM32X1D #( + .INIT ( 32'h000000DC )) + \blk00000003/blk000002b1/blk000002dc ( + .A0(\blk00000003/sig0000026a ), + .A1(\blk00000003/sig0000026e ), + .A2(\blk00000003/sig00000271 ), + .A3(\blk00000003/sig00000275 ), + .A4(\blk00000003/blk000002b1/sig000009bf ), + .D(\blk00000003/sig000004d5 ), + .DPRA0(\blk00000003/sig000002d3 ), + .DPRA1(\blk00000003/sig000002d7 ), + .DPRA2(\blk00000003/sig000002da ), + .DPRA3(\blk00000003/sig000002e1 ), + .DPRA4(\blk00000003/blk000002b1/sig000009bf ), + .WCLK(clk), + .WE(\blk00000003/blk000002b1/sig000009e4 ), + .SPO(\blk00000003/blk000002b1/sig000009c5 ), + .DPO(\blk00000003/blk000002b1/sig000009d7 ) + ); + RAM32X1D #( + .INIT ( 32'h00000057 )) + \blk00000003/blk000002b1/blk000002db ( + .A0(\blk00000003/sig0000026a ), + .A1(\blk00000003/sig0000026e ), + .A2(\blk00000003/sig00000271 ), + .A3(\blk00000003/sig00000275 ), + .A4(\blk00000003/blk000002b1/sig000009bf ), + .D(\blk00000003/sig000004d6 ), + .DPRA0(\blk00000003/sig000002d3 ), + .DPRA1(\blk00000003/sig000002d7 ), + .DPRA2(\blk00000003/sig000002da ), + .DPRA3(\blk00000003/sig000002e1 ), + .DPRA4(\blk00000003/blk000002b1/sig000009bf ), + .WCLK(clk), + .WE(\blk00000003/blk000002b1/sig000009e4 ), + .SPO(\blk00000003/blk000002b1/sig000009c4 ), + .DPO(\blk00000003/blk000002b1/sig000009d6 ) + ); + RAM32X1D #( + .INIT ( 32'h00000037 )) + \blk00000003/blk000002b1/blk000002da ( + .A0(\blk00000003/sig0000026a ), + .A1(\blk00000003/sig0000026e ), + .A2(\blk00000003/sig00000271 ), + .A3(\blk00000003/sig00000275 ), + .A4(\blk00000003/blk000002b1/sig000009bf ), + .D(\blk00000003/sig000004d7 ), + .DPRA0(\blk00000003/sig000002d3 ), + .DPRA1(\blk00000003/sig000002d7 ), + .DPRA2(\blk00000003/sig000002da ), + .DPRA3(\blk00000003/sig000002e1 ), + .DPRA4(\blk00000003/blk000002b1/sig000009bf ), + .WCLK(clk), + .WE(\blk00000003/blk000002b1/sig000009e4 ), + .SPO(\blk00000003/blk000002b1/sig000009c3 ), + .DPO(\blk00000003/blk000002b1/sig000009d5 ) + ); + RAM32X1D #( + .INIT ( 32'h00000072 )) + \blk00000003/blk000002b1/blk000002d9 ( + .A0(\blk00000003/sig0000026a ), + .A1(\blk00000003/sig0000026e ), + .A2(\blk00000003/sig00000271 ), + .A3(\blk00000003/sig00000275 ), + .A4(\blk00000003/blk000002b1/sig000009bf ), + .D(\blk00000003/sig000004d9 ), + .DPRA0(\blk00000003/sig000002d3 ), + .DPRA1(\blk00000003/sig000002d7 ), + .DPRA2(\blk00000003/sig000002da ), + .DPRA3(\blk00000003/sig000002e1 ), + .DPRA4(\blk00000003/blk000002b1/sig000009bf ), + .WCLK(clk), + .WE(\blk00000003/blk000002b1/sig000009e4 ), + .SPO(\blk00000003/blk000002b1/sig000009c1 ), + .DPO(\blk00000003/blk000002b1/sig000009d3 ) + ); + RAM32X1D #( + .INIT ( 32'h000000A7 )) + \blk00000003/blk000002b1/blk000002d8 ( + .A0(\blk00000003/sig0000026a ), + .A1(\blk00000003/sig0000026e ), + .A2(\blk00000003/sig00000271 ), + .A3(\blk00000003/sig00000275 ), + .A4(\blk00000003/blk000002b1/sig000009bf ), + .D(\blk00000003/sig000004da ), + .DPRA0(\blk00000003/sig000002d3 ), + .DPRA1(\blk00000003/sig000002d7 ), + .DPRA2(\blk00000003/sig000002da ), + .DPRA3(\blk00000003/sig000002e1 ), + .DPRA4(\blk00000003/blk000002b1/sig000009bf ), + .WCLK(clk), + .WE(\blk00000003/blk000002b1/sig000009e4 ), + .SPO(\blk00000003/blk000002b1/sig000009c0 ), + .DPO(\blk00000003/blk000002b1/sig000009d2 ) + ); + RAM32X1D #( + .INIT ( 32'h00000047 )) + \blk00000003/blk000002b1/blk000002d7 ( + .A0(\blk00000003/sig0000026a ), + .A1(\blk00000003/sig0000026e ), + .A2(\blk00000003/sig00000271 ), + .A3(\blk00000003/sig00000275 ), + .A4(\blk00000003/blk000002b1/sig000009bf ), + .D(\blk00000003/sig000004d8 ), + .DPRA0(\blk00000003/sig000002d3 ), + .DPRA1(\blk00000003/sig000002d7 ), + .DPRA2(\blk00000003/sig000002da ), + .DPRA3(\blk00000003/sig000002e1 ), + .DPRA4(\blk00000003/blk000002b1/sig000009bf ), + .WCLK(clk), + .WE(\blk00000003/blk000002b1/sig000009e4 ), + .SPO(\blk00000003/blk000002b1/sig000009c2 ), + .DPO(\blk00000003/blk000002b1/sig000009d4 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000002b1/blk000002d6 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk000002b1/sig000009e3 ), + .Q(\blk00000003/sig000002e2 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000002b1/blk000002d5 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk000002b1/sig000009e2 ), + .Q(\blk00000003/sig000002e3 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000002b1/blk000002d4 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk000002b1/sig000009e1 ), + .Q(\blk00000003/sig000002e4 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000002b1/blk000002d3 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk000002b1/sig000009e0 ), + .Q(\blk00000003/sig000002e5 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000002b1/blk000002d2 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk000002b1/sig000009df ), + .Q(\blk00000003/sig000002e6 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000002b1/blk000002d1 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk000002b1/sig000009de ), + .Q(\blk00000003/sig000002e7 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000002b1/blk000002d0 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk000002b1/sig000009dd ), + .Q(\blk00000003/sig000002e8 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000002b1/blk000002cf ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk000002b1/sig000009dc ), + .Q(\blk00000003/sig000002e9 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000002b1/blk000002ce ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk000002b1/sig000009db ), + .Q(\blk00000003/sig000002ea ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000002b1/blk000002cd ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk000002b1/sig000009da ), + .Q(\blk00000003/sig000002eb ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000002b1/blk000002cc ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk000002b1/sig000009d9 ), + .Q(\blk00000003/sig000002ec ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000002b1/blk000002cb ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk000002b1/sig000009d8 ), + .Q(\blk00000003/sig000002ed ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000002b1/blk000002ca ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk000002b1/sig000009d7 ), + .Q(\blk00000003/sig000002ee ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000002b1/blk000002c9 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk000002b1/sig000009d6 ), + .Q(\blk00000003/sig000002ef ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000002b1/blk000002c8 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk000002b1/sig000009d5 ), + .Q(\blk00000003/sig000002f0 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000002b1/blk000002c7 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk000002b1/sig000009d4 ), + .Q(\blk00000003/sig000002f1 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000002b1/blk000002c6 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk000002b1/sig000009d3 ), + .Q(\blk00000003/sig000002f2 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000002b1/blk000002c5 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk000002b1/sig000009d2 ), + .Q(\blk00000003/sig000002f3 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000002b1/blk000002c4 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk000002b1/sig000009d1 ), + .Q(\blk00000003/sig000004db ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000002b1/blk000002c3 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk000002b1/sig000009d0 ), + .Q(\blk00000003/sig000004dc ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000002b1/blk000002c2 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk000002b1/sig000009cf ), + .Q(\blk00000003/sig000004dd ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000002b1/blk000002c1 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk000002b1/sig000009ce ), + .Q(\blk00000003/sig000004de ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000002b1/blk000002c0 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk000002b1/sig000009cd ), + .Q(\blk00000003/sig000004df ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000002b1/blk000002bf ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk000002b1/sig000009cc ), + .Q(\blk00000003/sig000004e0 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000002b1/blk000002be ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk000002b1/sig000009cb ), + .Q(\blk00000003/sig000004e1 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000002b1/blk000002bd ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk000002b1/sig000009ca ), + .Q(\blk00000003/sig000004e2 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000002b1/blk000002bc ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk000002b1/sig000009c9 ), + .Q(\blk00000003/sig000004e3 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000002b1/blk000002bb ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk000002b1/sig000009c8 ), + .Q(\blk00000003/sig000004e4 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000002b1/blk000002ba ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk000002b1/sig000009c7 ), + .Q(\blk00000003/sig000004e5 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000002b1/blk000002b9 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk000002b1/sig000009c6 ), + .Q(\blk00000003/sig000004e6 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000002b1/blk000002b8 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk000002b1/sig000009c5 ), + .Q(\blk00000003/sig000004e7 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000002b1/blk000002b7 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk000002b1/sig000009c4 ), + .Q(\blk00000003/sig000004e8 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000002b1/blk000002b6 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk000002b1/sig000009c3 ), + .Q(\blk00000003/sig000004e9 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000002b1/blk000002b5 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk000002b1/sig000009c2 ), + .Q(\blk00000003/sig000004ea ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000002b1/blk000002b4 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk000002b1/sig000009c1 ), + .Q(\blk00000003/sig000004eb ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000002b1/blk000002b3 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk000002b1/sig000009c0 ), + .Q(\blk00000003/sig000004ec ) + ); + GND \blk00000003/blk000002b1/blk000002b2 ( + .G(\blk00000003/blk000002b1/sig000009bf ) + ); + LUT2 #( + .INIT ( 4'h8 )) + \blk00000003/blk000002ea/blk00000310 ( + .I0(ce), + .I1(\blk00000003/sig0000042a ), + .O(\blk00000003/blk000002ea/sig00000a27 ) + ); + RAM32X1D #( + .INIT ( 32'h00000055 )) + \blk00000003/blk000002ea/blk0000030f ( + .A0(\blk00000003/sig00000426 ), + .A1(\blk00000003/sig00000427 ), + .A2(\blk00000003/sig00000428 ), + .A3(\blk00000003/sig00000429 ), + .A4(\blk00000003/blk000002ea/sig00000a14 ), + .D(\blk00000003/sig000004db ), + .DPRA0(\blk00000003/sig00000433 ), + .DPRA1(\blk00000003/sig00000432 ), + .DPRA2(\blk00000003/sig00000431 ), + .DPRA3(\blk00000003/sig00000430 ), + .DPRA4(\blk00000003/blk000002ea/sig00000a14 ), + .WCLK(clk), + .WE(\blk00000003/blk000002ea/sig00000a27 ), + .SPO(\NLW_blk00000003/blk000002ea/blk0000030f_SPO_UNCONNECTED ), + .DPO(\blk00000003/blk000002ea/sig00000a26 ) + ); + RAM32X1D #( + .INIT ( 32'h000000D5 )) + \blk00000003/blk000002ea/blk0000030e ( + .A0(\blk00000003/sig00000426 ), + .A1(\blk00000003/sig00000427 ), + .A2(\blk00000003/sig00000428 ), + .A3(\blk00000003/sig00000429 ), + .A4(\blk00000003/blk000002ea/sig00000a14 ), + .D(\blk00000003/sig000004dc ), + .DPRA0(\blk00000003/sig00000433 ), + .DPRA1(\blk00000003/sig00000432 ), + .DPRA2(\blk00000003/sig00000431 ), + .DPRA3(\blk00000003/sig00000430 ), + .DPRA4(\blk00000003/blk000002ea/sig00000a14 ), + .WCLK(clk), + .WE(\blk00000003/blk000002ea/sig00000a27 ), + .SPO(\NLW_blk00000003/blk000002ea/blk0000030e_SPO_UNCONNECTED ), + .DPO(\blk00000003/blk000002ea/sig00000a25 ) + ); + RAM32X1D #( + .INIT ( 32'h00000055 )) + \blk00000003/blk000002ea/blk0000030d ( + .A0(\blk00000003/sig00000426 ), + .A1(\blk00000003/sig00000427 ), + .A2(\blk00000003/sig00000428 ), + .A3(\blk00000003/sig00000429 ), + .A4(\blk00000003/blk000002ea/sig00000a14 ), + .D(\blk00000003/sig000004dd ), + .DPRA0(\blk00000003/sig00000433 ), + .DPRA1(\blk00000003/sig00000432 ), + .DPRA2(\blk00000003/sig00000431 ), + .DPRA3(\blk00000003/sig00000430 ), + .DPRA4(\blk00000003/blk000002ea/sig00000a14 ), + .WCLK(clk), + .WE(\blk00000003/blk000002ea/sig00000a27 ), + .SPO(\NLW_blk00000003/blk000002ea/blk0000030d_SPO_UNCONNECTED ), + .DPO(\blk00000003/blk000002ea/sig00000a24 ) + ); + RAM32X1D #( + .INIT ( 32'h00000095 )) + \blk00000003/blk000002ea/blk0000030c ( + .A0(\blk00000003/sig00000426 ), + .A1(\blk00000003/sig00000427 ), + .A2(\blk00000003/sig00000428 ), + .A3(\blk00000003/sig00000429 ), + .A4(\blk00000003/blk000002ea/sig00000a14 ), + .D(\blk00000003/sig000004de ), + .DPRA0(\blk00000003/sig00000433 ), + .DPRA1(\blk00000003/sig00000432 ), + .DPRA2(\blk00000003/sig00000431 ), + .DPRA3(\blk00000003/sig00000430 ), + .DPRA4(\blk00000003/blk000002ea/sig00000a14 ), + .WCLK(clk), + .WE(\blk00000003/blk000002ea/sig00000a27 ), + .SPO(\NLW_blk00000003/blk000002ea/blk0000030c_SPO_UNCONNECTED ), + .DPO(\blk00000003/blk000002ea/sig00000a23 ) + ); + RAM32X1D #( + .INIT ( 32'h00000025 )) + \blk00000003/blk000002ea/blk0000030b ( + .A0(\blk00000003/sig00000426 ), + .A1(\blk00000003/sig00000427 ), + .A2(\blk00000003/sig00000428 ), + .A3(\blk00000003/sig00000429 ), + .A4(\blk00000003/blk000002ea/sig00000a14 ), + .D(\blk00000003/sig000004df ), + .DPRA0(\blk00000003/sig00000433 ), + .DPRA1(\blk00000003/sig00000432 ), + .DPRA2(\blk00000003/sig00000431 ), + .DPRA3(\blk00000003/sig00000430 ), + .DPRA4(\blk00000003/blk000002ea/sig00000a14 ), + .WCLK(clk), + .WE(\blk00000003/blk000002ea/sig00000a27 ), + .SPO(\NLW_blk00000003/blk000002ea/blk0000030b_SPO_UNCONNECTED ), + .DPO(\blk00000003/blk000002ea/sig00000a22 ) + ); + RAM32X1D #( + .INIT ( 32'h00000079 )) + \blk00000003/blk000002ea/blk0000030a ( + .A0(\blk00000003/sig00000426 ), + .A1(\blk00000003/sig00000427 ), + .A2(\blk00000003/sig00000428 ), + .A3(\blk00000003/sig00000429 ), + .A4(\blk00000003/blk000002ea/sig00000a14 ), + .D(\blk00000003/sig000004e0 ), + .DPRA0(\blk00000003/sig00000433 ), + .DPRA1(\blk00000003/sig00000432 ), + .DPRA2(\blk00000003/sig00000431 ), + .DPRA3(\blk00000003/sig00000430 ), + .DPRA4(\blk00000003/blk000002ea/sig00000a14 ), + .WCLK(clk), + .WE(\blk00000003/blk000002ea/sig00000a27 ), + .SPO(\NLW_blk00000003/blk000002ea/blk0000030a_SPO_UNCONNECTED ), + .DPO(\blk00000003/blk000002ea/sig00000a21 ) + ); + RAM32X1D #( + .INIT ( 32'h000000FB )) + \blk00000003/blk000002ea/blk00000309 ( + .A0(\blk00000003/sig00000426 ), + .A1(\blk00000003/sig00000427 ), + .A2(\blk00000003/sig00000428 ), + .A3(\blk00000003/sig00000429 ), + .A4(\blk00000003/blk000002ea/sig00000a14 ), + .D(\blk00000003/sig000004e2 ), + .DPRA0(\blk00000003/sig00000433 ), + .DPRA1(\blk00000003/sig00000432 ), + .DPRA2(\blk00000003/sig00000431 ), + .DPRA3(\blk00000003/sig00000430 ), + .DPRA4(\blk00000003/blk000002ea/sig00000a14 ), + .WCLK(clk), + .WE(\blk00000003/blk000002ea/sig00000a27 ), + .SPO(\NLW_blk00000003/blk000002ea/blk00000309_SPO_UNCONNECTED ), + .DPO(\blk00000003/blk000002ea/sig00000a1f ) + ); + RAM32X1D #( + .INIT ( 32'h00000056 )) + \blk00000003/blk000002ea/blk00000308 ( + .A0(\blk00000003/sig00000426 ), + .A1(\blk00000003/sig00000427 ), + .A2(\blk00000003/sig00000428 ), + .A3(\blk00000003/sig00000429 ), + .A4(\blk00000003/blk000002ea/sig00000a14 ), + .D(\blk00000003/sig000004e3 ), + .DPRA0(\blk00000003/sig00000433 ), + .DPRA1(\blk00000003/sig00000432 ), + .DPRA2(\blk00000003/sig00000431 ), + .DPRA3(\blk00000003/sig00000430 ), + .DPRA4(\blk00000003/blk000002ea/sig00000a14 ), + .WCLK(clk), + .WE(\blk00000003/blk000002ea/sig00000a27 ), + .SPO(\NLW_blk00000003/blk000002ea/blk00000308_SPO_UNCONNECTED ), + .DPO(\blk00000003/blk000002ea/sig00000a1e ) + ); + RAM32X1D #( + .INIT ( 32'h0000002E )) + \blk00000003/blk000002ea/blk00000307 ( + .A0(\blk00000003/sig00000426 ), + .A1(\blk00000003/sig00000427 ), + .A2(\blk00000003/sig00000428 ), + .A3(\blk00000003/sig00000429 ), + .A4(\blk00000003/blk000002ea/sig00000a14 ), + .D(\blk00000003/sig000004e1 ), + .DPRA0(\blk00000003/sig00000433 ), + .DPRA1(\blk00000003/sig00000432 ), + .DPRA2(\blk00000003/sig00000431 ), + .DPRA3(\blk00000003/sig00000430 ), + .DPRA4(\blk00000003/blk000002ea/sig00000a14 ), + .WCLK(clk), + .WE(\blk00000003/blk000002ea/sig00000a27 ), + .SPO(\NLW_blk00000003/blk000002ea/blk00000307_SPO_UNCONNECTED ), + .DPO(\blk00000003/blk000002ea/sig00000a20 ) + ); + RAM32X1D #( + .INIT ( 32'h00000015 )) + \blk00000003/blk000002ea/blk00000306 ( + .A0(\blk00000003/sig00000426 ), + .A1(\blk00000003/sig00000427 ), + .A2(\blk00000003/sig00000428 ), + .A3(\blk00000003/sig00000429 ), + .A4(\blk00000003/blk000002ea/sig00000a14 ), + .D(\blk00000003/sig000004e4 ), + .DPRA0(\blk00000003/sig00000433 ), + .DPRA1(\blk00000003/sig00000432 ), + .DPRA2(\blk00000003/sig00000431 ), + .DPRA3(\blk00000003/sig00000430 ), + .DPRA4(\blk00000003/blk000002ea/sig00000a14 ), + .WCLK(clk), + .WE(\blk00000003/blk000002ea/sig00000a27 ), + .SPO(\NLW_blk00000003/blk000002ea/blk00000306_SPO_UNCONNECTED ), + .DPO(\blk00000003/blk000002ea/sig00000a1d ) + ); + RAM32X1D #( + .INIT ( 32'h000000B2 )) + \blk00000003/blk000002ea/blk00000305 ( + .A0(\blk00000003/sig00000426 ), + .A1(\blk00000003/sig00000427 ), + .A2(\blk00000003/sig00000428 ), + .A3(\blk00000003/sig00000429 ), + .A4(\blk00000003/blk000002ea/sig00000a14 ), + .D(\blk00000003/sig000004e5 ), + .DPRA0(\blk00000003/sig00000433 ), + .DPRA1(\blk00000003/sig00000432 ), + .DPRA2(\blk00000003/sig00000431 ), + .DPRA3(\blk00000003/sig00000430 ), + .DPRA4(\blk00000003/blk000002ea/sig00000a14 ), + .WCLK(clk), + .WE(\blk00000003/blk000002ea/sig00000a27 ), + .SPO(\NLW_blk00000003/blk000002ea/blk00000305_SPO_UNCONNECTED ), + .DPO(\blk00000003/blk000002ea/sig00000a1c ) + ); + RAM32X1D #( + .INIT ( 32'h0000009F )) + \blk00000003/blk000002ea/blk00000304 ( + .A0(\blk00000003/sig00000426 ), + .A1(\blk00000003/sig00000427 ), + .A2(\blk00000003/sig00000428 ), + .A3(\blk00000003/sig00000429 ), + .A4(\blk00000003/blk000002ea/sig00000a14 ), + .D(\blk00000003/sig000004e6 ), + .DPRA0(\blk00000003/sig00000433 ), + .DPRA1(\blk00000003/sig00000432 ), + .DPRA2(\blk00000003/sig00000431 ), + .DPRA3(\blk00000003/sig00000430 ), + .DPRA4(\blk00000003/blk000002ea/sig00000a14 ), + .WCLK(clk), + .WE(\blk00000003/blk000002ea/sig00000a27 ), + .SPO(\NLW_blk00000003/blk000002ea/blk00000304_SPO_UNCONNECTED ), + .DPO(\blk00000003/blk000002ea/sig00000a1b ) + ); + RAM32X1D #( + .INIT ( 32'h000000CE )) + \blk00000003/blk000002ea/blk00000303 ( + .A0(\blk00000003/sig00000426 ), + .A1(\blk00000003/sig00000427 ), + .A2(\blk00000003/sig00000428 ), + .A3(\blk00000003/sig00000429 ), + .A4(\blk00000003/blk000002ea/sig00000a14 ), + .D(\blk00000003/sig000004e7 ), + .DPRA0(\blk00000003/sig00000433 ), + .DPRA1(\blk00000003/sig00000432 ), + .DPRA2(\blk00000003/sig00000431 ), + .DPRA3(\blk00000003/sig00000430 ), + .DPRA4(\blk00000003/blk000002ea/sig00000a14 ), + .WCLK(clk), + .WE(\blk00000003/blk000002ea/sig00000a27 ), + .SPO(\NLW_blk00000003/blk000002ea/blk00000303_SPO_UNCONNECTED ), + .DPO(\blk00000003/blk000002ea/sig00000a1a ) + ); + RAM32X1D #( + .INIT ( 32'h000000C4 )) + \blk00000003/blk000002ea/blk00000302 ( + .A0(\blk00000003/sig00000426 ), + .A1(\blk00000003/sig00000427 ), + .A2(\blk00000003/sig00000428 ), + .A3(\blk00000003/sig00000429 ), + .A4(\blk00000003/blk000002ea/sig00000a14 ), + .D(\blk00000003/sig000004e8 ), + .DPRA0(\blk00000003/sig00000433 ), + .DPRA1(\blk00000003/sig00000432 ), + .DPRA2(\blk00000003/sig00000431 ), + .DPRA3(\blk00000003/sig00000430 ), + .DPRA4(\blk00000003/blk000002ea/sig00000a14 ), + .WCLK(clk), + .WE(\blk00000003/blk000002ea/sig00000a27 ), + .SPO(\NLW_blk00000003/blk000002ea/blk00000302_SPO_UNCONNECTED ), + .DPO(\blk00000003/blk000002ea/sig00000a19 ) + ); + RAM32X1D #( + .INIT ( 32'h00000094 )) + \blk00000003/blk000002ea/blk00000301 ( + .A0(\blk00000003/sig00000426 ), + .A1(\blk00000003/sig00000427 ), + .A2(\blk00000003/sig00000428 ), + .A3(\blk00000003/sig00000429 ), + .A4(\blk00000003/blk000002ea/sig00000a14 ), + .D(\blk00000003/sig000004e9 ), + .DPRA0(\blk00000003/sig00000433 ), + .DPRA1(\blk00000003/sig00000432 ), + .DPRA2(\blk00000003/sig00000431 ), + .DPRA3(\blk00000003/sig00000430 ), + .DPRA4(\blk00000003/blk000002ea/sig00000a14 ), + .WCLK(clk), + .WE(\blk00000003/blk000002ea/sig00000a27 ), + .SPO(\NLW_blk00000003/blk000002ea/blk00000301_SPO_UNCONNECTED ), + .DPO(\blk00000003/blk000002ea/sig00000a18 ) + ); + RAM32X1D #( + .INIT ( 32'h00000024 )) + \blk00000003/blk000002ea/blk00000300 ( + .A0(\blk00000003/sig00000426 ), + .A1(\blk00000003/sig00000427 ), + .A2(\blk00000003/sig00000428 ), + .A3(\blk00000003/sig00000429 ), + .A4(\blk00000003/blk000002ea/sig00000a14 ), + .D(\blk00000003/sig000004eb ), + .DPRA0(\blk00000003/sig00000433 ), + .DPRA1(\blk00000003/sig00000432 ), + .DPRA2(\blk00000003/sig00000431 ), + .DPRA3(\blk00000003/sig00000430 ), + .DPRA4(\blk00000003/blk000002ea/sig00000a14 ), + .WCLK(clk), + .WE(\blk00000003/blk000002ea/sig00000a27 ), + .SPO(\NLW_blk00000003/blk000002ea/blk00000300_SPO_UNCONNECTED ), + .DPO(\blk00000003/blk000002ea/sig00000a16 ) + ); + RAM32X1D #( + .INIT ( 32'h00000047 )) + \blk00000003/blk000002ea/blk000002ff ( + .A0(\blk00000003/sig00000426 ), + .A1(\blk00000003/sig00000427 ), + .A2(\blk00000003/sig00000428 ), + .A3(\blk00000003/sig00000429 ), + .A4(\blk00000003/blk000002ea/sig00000a14 ), + .D(\blk00000003/sig000004ec ), + .DPRA0(\blk00000003/sig00000433 ), + .DPRA1(\blk00000003/sig00000432 ), + .DPRA2(\blk00000003/sig00000431 ), + .DPRA3(\blk00000003/sig00000430 ), + .DPRA4(\blk00000003/blk000002ea/sig00000a14 ), + .WCLK(clk), + .WE(\blk00000003/blk000002ea/sig00000a27 ), + .SPO(\NLW_blk00000003/blk000002ea/blk000002ff_SPO_UNCONNECTED ), + .DPO(\blk00000003/blk000002ea/sig00000a15 ) + ); + RAM32X1D #( + .INIT ( 32'h000000E6 )) + \blk00000003/blk000002ea/blk000002fe ( + .A0(\blk00000003/sig00000426 ), + .A1(\blk00000003/sig00000427 ), + .A2(\blk00000003/sig00000428 ), + .A3(\blk00000003/sig00000429 ), + .A4(\blk00000003/blk000002ea/sig00000a14 ), + .D(\blk00000003/sig000004ea ), + .DPRA0(\blk00000003/sig00000433 ), + .DPRA1(\blk00000003/sig00000432 ), + .DPRA2(\blk00000003/sig00000431 ), + .DPRA3(\blk00000003/sig00000430 ), + .DPRA4(\blk00000003/blk000002ea/sig00000a14 ), + .WCLK(clk), + .WE(\blk00000003/blk000002ea/sig00000a27 ), + .SPO(\NLW_blk00000003/blk000002ea/blk000002fe_SPO_UNCONNECTED ), + .DPO(\blk00000003/blk000002ea/sig00000a17 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000002ea/blk000002fd ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk000002ea/sig00000a26 ), + .Q(\blk00000003/sig000003b4 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000002ea/blk000002fc ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk000002ea/sig00000a25 ), + .Q(\blk00000003/sig000003b5 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000002ea/blk000002fb ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk000002ea/sig00000a24 ), + .Q(\blk00000003/sig000003b6 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000002ea/blk000002fa ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk000002ea/sig00000a23 ), + .Q(\blk00000003/sig000003b7 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000002ea/blk000002f9 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk000002ea/sig00000a22 ), + .Q(\blk00000003/sig000003b8 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000002ea/blk000002f8 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk000002ea/sig00000a21 ), + .Q(\blk00000003/sig000003b9 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000002ea/blk000002f7 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk000002ea/sig00000a20 ), + .Q(\blk00000003/sig000003ba ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000002ea/blk000002f6 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk000002ea/sig00000a1f ), + .Q(\blk00000003/sig000003bb ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000002ea/blk000002f5 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk000002ea/sig00000a1e ), + .Q(\blk00000003/sig000003bc ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000002ea/blk000002f4 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk000002ea/sig00000a1d ), + .Q(\blk00000003/sig000003bd ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000002ea/blk000002f3 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk000002ea/sig00000a1c ), + .Q(\blk00000003/sig000003be ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000002ea/blk000002f2 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk000002ea/sig00000a1b ), + .Q(\blk00000003/sig000003bf ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000002ea/blk000002f1 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk000002ea/sig00000a1a ), + .Q(\blk00000003/sig000003c0 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000002ea/blk000002f0 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk000002ea/sig00000a19 ), + .Q(\blk00000003/sig000003c1 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000002ea/blk000002ef ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk000002ea/sig00000a18 ), + .Q(\blk00000003/sig000003c2 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000002ea/blk000002ee ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk000002ea/sig00000a17 ), + .Q(\blk00000003/sig000003c3 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000002ea/blk000002ed ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk000002ea/sig00000a16 ), + .Q(\blk00000003/sig000003c4 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000002ea/blk000002ec ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk000002ea/sig00000a15 ), + .Q(\blk00000003/sig000003c5 ) + ); + GND \blk00000003/blk000002ea/blk000002eb ( + .G(\blk00000003/blk000002ea/sig00000a14 ) + ); + LUT2 #( + .INIT ( 4'h8 )) + \blk00000003/blk00000371/blk00000397 ( + .I0(ce), + .I1(\blk00000003/sig00000232 ), + .O(\blk00000003/blk00000371/sig00000a64 ) + ); + RAM32X1D #( + .INIT ( 32'h00000000 )) + \blk00000003/blk00000371/blk00000396 ( + .A0(\blk00000003/sig00000239 ), + .A1(\blk00000003/blk00000371/sig00000a51 ), + .A2(\blk00000003/blk00000371/sig00000a51 ), + .A3(\blk00000003/blk00000371/sig00000a51 ), + .A4(\blk00000003/blk00000371/sig00000a51 ), + .D(\blk00000003/sig000004c9 ), + .DPRA0(\blk00000003/sig000001d0 ), + .DPRA1(\blk00000003/blk00000371/sig00000a51 ), + .DPRA2(\blk00000003/blk00000371/sig00000a51 ), + .DPRA3(\blk00000003/blk00000371/sig00000a51 ), + .DPRA4(\blk00000003/blk00000371/sig00000a51 ), + .WCLK(clk), + .WE(\blk00000003/blk00000371/sig00000a64 ), + .SPO(\NLW_blk00000003/blk00000371/blk00000396_SPO_UNCONNECTED ), + .DPO(\blk00000003/blk00000371/sig00000a63 ) + ); + RAM32X1D #( + .INIT ( 32'h00000001 )) + \blk00000003/blk00000371/blk00000395 ( + .A0(\blk00000003/sig00000239 ), + .A1(\blk00000003/blk00000371/sig00000a51 ), + .A2(\blk00000003/blk00000371/sig00000a51 ), + .A3(\blk00000003/blk00000371/sig00000a51 ), + .A4(\blk00000003/blk00000371/sig00000a51 ), + .D(\blk00000003/sig000004ca ), + .DPRA0(\blk00000003/sig000001d0 ), + .DPRA1(\blk00000003/blk00000371/sig00000a51 ), + .DPRA2(\blk00000003/blk00000371/sig00000a51 ), + .DPRA3(\blk00000003/blk00000371/sig00000a51 ), + .DPRA4(\blk00000003/blk00000371/sig00000a51 ), + .WCLK(clk), + .WE(\blk00000003/blk00000371/sig00000a64 ), + .SPO(\NLW_blk00000003/blk00000371/blk00000395_SPO_UNCONNECTED ), + .DPO(\blk00000003/blk00000371/sig00000a62 ) + ); + RAM32X1D #( + .INIT ( 32'h00000001 )) + \blk00000003/blk00000371/blk00000394 ( + .A0(\blk00000003/sig00000239 ), + .A1(\blk00000003/blk00000371/sig00000a51 ), + .A2(\blk00000003/blk00000371/sig00000a51 ), + .A3(\blk00000003/blk00000371/sig00000a51 ), + .A4(\blk00000003/blk00000371/sig00000a51 ), + .D(\blk00000003/sig000004cb ), + .DPRA0(\blk00000003/sig000001d0 ), + .DPRA1(\blk00000003/blk00000371/sig00000a51 ), + .DPRA2(\blk00000003/blk00000371/sig00000a51 ), + .DPRA3(\blk00000003/blk00000371/sig00000a51 ), + .DPRA4(\blk00000003/blk00000371/sig00000a51 ), + .WCLK(clk), + .WE(\blk00000003/blk00000371/sig00000a64 ), + .SPO(\NLW_blk00000003/blk00000371/blk00000394_SPO_UNCONNECTED ), + .DPO(\blk00000003/blk00000371/sig00000a61 ) + ); + RAM32X1D #( + .INIT ( 32'h00000001 )) + \blk00000003/blk00000371/blk00000393 ( + .A0(\blk00000003/sig00000239 ), + .A1(\blk00000003/blk00000371/sig00000a51 ), + .A2(\blk00000003/blk00000371/sig00000a51 ), + .A3(\blk00000003/blk00000371/sig00000a51 ), + .A4(\blk00000003/blk00000371/sig00000a51 ), + .D(\blk00000003/sig000004cc ), + .DPRA0(\blk00000003/sig000001d0 ), + .DPRA1(\blk00000003/blk00000371/sig00000a51 ), + .DPRA2(\blk00000003/blk00000371/sig00000a51 ), + .DPRA3(\blk00000003/blk00000371/sig00000a51 ), + .DPRA4(\blk00000003/blk00000371/sig00000a51 ), + .WCLK(clk), + .WE(\blk00000003/blk00000371/sig00000a64 ), + .SPO(\NLW_blk00000003/blk00000371/blk00000393_SPO_UNCONNECTED ), + .DPO(\blk00000003/blk00000371/sig00000a60 ) + ); + RAM32X1D #( + .INIT ( 32'h00000001 )) + \blk00000003/blk00000371/blk00000392 ( + .A0(\blk00000003/sig00000239 ), + .A1(\blk00000003/blk00000371/sig00000a51 ), + .A2(\blk00000003/blk00000371/sig00000a51 ), + .A3(\blk00000003/blk00000371/sig00000a51 ), + .A4(\blk00000003/blk00000371/sig00000a51 ), + .D(\blk00000003/sig000004cd ), + .DPRA0(\blk00000003/sig000001d0 ), + .DPRA1(\blk00000003/blk00000371/sig00000a51 ), + .DPRA2(\blk00000003/blk00000371/sig00000a51 ), + .DPRA3(\blk00000003/blk00000371/sig00000a51 ), + .DPRA4(\blk00000003/blk00000371/sig00000a51 ), + .WCLK(clk), + .WE(\blk00000003/blk00000371/sig00000a64 ), + .SPO(\NLW_blk00000003/blk00000371/blk00000392_SPO_UNCONNECTED ), + .DPO(\blk00000003/blk00000371/sig00000a5f ) + ); + RAM32X1D #( + .INIT ( 32'h00000001 )) + \blk00000003/blk00000371/blk00000391 ( + .A0(\blk00000003/sig00000239 ), + .A1(\blk00000003/blk00000371/sig00000a51 ), + .A2(\blk00000003/blk00000371/sig00000a51 ), + .A3(\blk00000003/blk00000371/sig00000a51 ), + .A4(\blk00000003/blk00000371/sig00000a51 ), + .D(\blk00000003/sig000004ce ), + .DPRA0(\blk00000003/sig000001d0 ), + .DPRA1(\blk00000003/blk00000371/sig00000a51 ), + .DPRA2(\blk00000003/blk00000371/sig00000a51 ), + .DPRA3(\blk00000003/blk00000371/sig00000a51 ), + .DPRA4(\blk00000003/blk00000371/sig00000a51 ), + .WCLK(clk), + .WE(\blk00000003/blk00000371/sig00000a64 ), + .SPO(\NLW_blk00000003/blk00000371/blk00000391_SPO_UNCONNECTED ), + .DPO(\blk00000003/blk00000371/sig00000a5e ) + ); + RAM32X1D #( + .INIT ( 32'h00000001 )) + \blk00000003/blk00000371/blk00000390 ( + .A0(\blk00000003/sig00000239 ), + .A1(\blk00000003/blk00000371/sig00000a51 ), + .A2(\blk00000003/blk00000371/sig00000a51 ), + .A3(\blk00000003/blk00000371/sig00000a51 ), + .A4(\blk00000003/blk00000371/sig00000a51 ), + .D(\blk00000003/sig000004d0 ), + .DPRA0(\blk00000003/sig000001d0 ), + .DPRA1(\blk00000003/blk00000371/sig00000a51 ), + .DPRA2(\blk00000003/blk00000371/sig00000a51 ), + .DPRA3(\blk00000003/blk00000371/sig00000a51 ), + .DPRA4(\blk00000003/blk00000371/sig00000a51 ), + .WCLK(clk), + .WE(\blk00000003/blk00000371/sig00000a64 ), + .SPO(\NLW_blk00000003/blk00000371/blk00000390_SPO_UNCONNECTED ), + .DPO(\blk00000003/blk00000371/sig00000a5c ) + ); + RAM32X1D #( + .INIT ( 32'h00000001 )) + \blk00000003/blk00000371/blk0000038f ( + .A0(\blk00000003/sig00000239 ), + .A1(\blk00000003/blk00000371/sig00000a51 ), + .A2(\blk00000003/blk00000371/sig00000a51 ), + .A3(\blk00000003/blk00000371/sig00000a51 ), + .A4(\blk00000003/blk00000371/sig00000a51 ), + .D(\blk00000003/sig000004d1 ), + .DPRA0(\blk00000003/sig000001d0 ), + .DPRA1(\blk00000003/blk00000371/sig00000a51 ), + .DPRA2(\blk00000003/blk00000371/sig00000a51 ), + .DPRA3(\blk00000003/blk00000371/sig00000a51 ), + .DPRA4(\blk00000003/blk00000371/sig00000a51 ), + .WCLK(clk), + .WE(\blk00000003/blk00000371/sig00000a64 ), + .SPO(\NLW_blk00000003/blk00000371/blk0000038f_SPO_UNCONNECTED ), + .DPO(\blk00000003/blk00000371/sig00000a5b ) + ); + RAM32X1D #( + .INIT ( 32'h00000001 )) + \blk00000003/blk00000371/blk0000038e ( + .A0(\blk00000003/sig00000239 ), + .A1(\blk00000003/blk00000371/sig00000a51 ), + .A2(\blk00000003/blk00000371/sig00000a51 ), + .A3(\blk00000003/blk00000371/sig00000a51 ), + .A4(\blk00000003/blk00000371/sig00000a51 ), + .D(\blk00000003/sig000004cf ), + .DPRA0(\blk00000003/sig000001d0 ), + .DPRA1(\blk00000003/blk00000371/sig00000a51 ), + .DPRA2(\blk00000003/blk00000371/sig00000a51 ), + .DPRA3(\blk00000003/blk00000371/sig00000a51 ), + .DPRA4(\blk00000003/blk00000371/sig00000a51 ), + .WCLK(clk), + .WE(\blk00000003/blk00000371/sig00000a64 ), + .SPO(\NLW_blk00000003/blk00000371/blk0000038e_SPO_UNCONNECTED ), + .DPO(\blk00000003/blk00000371/sig00000a5d ) + ); + RAM32X1D #( + .INIT ( 32'h00000001 )) + \blk00000003/blk00000371/blk0000038d ( + .A0(\blk00000003/sig00000239 ), + .A1(\blk00000003/blk00000371/sig00000a51 ), + .A2(\blk00000003/blk00000371/sig00000a51 ), + .A3(\blk00000003/blk00000371/sig00000a51 ), + .A4(\blk00000003/blk00000371/sig00000a51 ), + .D(\blk00000003/sig000004d2 ), + .DPRA0(\blk00000003/sig000001d0 ), + .DPRA1(\blk00000003/blk00000371/sig00000a51 ), + .DPRA2(\blk00000003/blk00000371/sig00000a51 ), + .DPRA3(\blk00000003/blk00000371/sig00000a51 ), + .DPRA4(\blk00000003/blk00000371/sig00000a51 ), + .WCLK(clk), + .WE(\blk00000003/blk00000371/sig00000a64 ), + .SPO(\NLW_blk00000003/blk00000371/blk0000038d_SPO_UNCONNECTED ), + .DPO(\blk00000003/blk00000371/sig00000a5a ) + ); + RAM32X1D #( + .INIT ( 32'h00000001 )) + \blk00000003/blk00000371/blk0000038c ( + .A0(\blk00000003/sig00000239 ), + .A1(\blk00000003/blk00000371/sig00000a51 ), + .A2(\blk00000003/blk00000371/sig00000a51 ), + .A3(\blk00000003/blk00000371/sig00000a51 ), + .A4(\blk00000003/blk00000371/sig00000a51 ), + .D(\blk00000003/sig000004d3 ), + .DPRA0(\blk00000003/sig000001d0 ), + .DPRA1(\blk00000003/blk00000371/sig00000a51 ), + .DPRA2(\blk00000003/blk00000371/sig00000a51 ), + .DPRA3(\blk00000003/blk00000371/sig00000a51 ), + .DPRA4(\blk00000003/blk00000371/sig00000a51 ), + .WCLK(clk), + .WE(\blk00000003/blk00000371/sig00000a64 ), + .SPO(\NLW_blk00000003/blk00000371/blk0000038c_SPO_UNCONNECTED ), + .DPO(\blk00000003/blk00000371/sig00000a59 ) + ); + RAM32X1D #( + .INIT ( 32'h00000001 )) + \blk00000003/blk00000371/blk0000038b ( + .A0(\blk00000003/sig00000239 ), + .A1(\blk00000003/blk00000371/sig00000a51 ), + .A2(\blk00000003/blk00000371/sig00000a51 ), + .A3(\blk00000003/blk00000371/sig00000a51 ), + .A4(\blk00000003/blk00000371/sig00000a51 ), + .D(\blk00000003/sig000004d4 ), + .DPRA0(\blk00000003/sig000001d0 ), + .DPRA1(\blk00000003/blk00000371/sig00000a51 ), + .DPRA2(\blk00000003/blk00000371/sig00000a51 ), + .DPRA3(\blk00000003/blk00000371/sig00000a51 ), + .DPRA4(\blk00000003/blk00000371/sig00000a51 ), + .WCLK(clk), + .WE(\blk00000003/blk00000371/sig00000a64 ), + .SPO(\NLW_blk00000003/blk00000371/blk0000038b_SPO_UNCONNECTED ), + .DPO(\blk00000003/blk00000371/sig00000a58 ) + ); + RAM32X1D #( + .INIT ( 32'h00000001 )) + \blk00000003/blk00000371/blk0000038a ( + .A0(\blk00000003/sig00000239 ), + .A1(\blk00000003/blk00000371/sig00000a51 ), + .A2(\blk00000003/blk00000371/sig00000a51 ), + .A3(\blk00000003/blk00000371/sig00000a51 ), + .A4(\blk00000003/blk00000371/sig00000a51 ), + .D(\blk00000003/sig000004d5 ), + .DPRA0(\blk00000003/sig000001d0 ), + .DPRA1(\blk00000003/blk00000371/sig00000a51 ), + .DPRA2(\blk00000003/blk00000371/sig00000a51 ), + .DPRA3(\blk00000003/blk00000371/sig00000a51 ), + .DPRA4(\blk00000003/blk00000371/sig00000a51 ), + .WCLK(clk), + .WE(\blk00000003/blk00000371/sig00000a64 ), + .SPO(\NLW_blk00000003/blk00000371/blk0000038a_SPO_UNCONNECTED ), + .DPO(\blk00000003/blk00000371/sig00000a57 ) + ); + RAM32X1D #( + .INIT ( 32'h00000001 )) + \blk00000003/blk00000371/blk00000389 ( + .A0(\blk00000003/sig00000239 ), + .A1(\blk00000003/blk00000371/sig00000a51 ), + .A2(\blk00000003/blk00000371/sig00000a51 ), + .A3(\blk00000003/blk00000371/sig00000a51 ), + .A4(\blk00000003/blk00000371/sig00000a51 ), + .D(\blk00000003/sig000004d6 ), + .DPRA0(\blk00000003/sig000001d0 ), + .DPRA1(\blk00000003/blk00000371/sig00000a51 ), + .DPRA2(\blk00000003/blk00000371/sig00000a51 ), + .DPRA3(\blk00000003/blk00000371/sig00000a51 ), + .DPRA4(\blk00000003/blk00000371/sig00000a51 ), + .WCLK(clk), + .WE(\blk00000003/blk00000371/sig00000a64 ), + .SPO(\NLW_blk00000003/blk00000371/blk00000389_SPO_UNCONNECTED ), + .DPO(\blk00000003/blk00000371/sig00000a56 ) + ); + RAM32X1D #( + .INIT ( 32'h00000001 )) + \blk00000003/blk00000371/blk00000388 ( + .A0(\blk00000003/sig00000239 ), + .A1(\blk00000003/blk00000371/sig00000a51 ), + .A2(\blk00000003/blk00000371/sig00000a51 ), + .A3(\blk00000003/blk00000371/sig00000a51 ), + .A4(\blk00000003/blk00000371/sig00000a51 ), + .D(\blk00000003/sig000004d7 ), + .DPRA0(\blk00000003/sig000001d0 ), + .DPRA1(\blk00000003/blk00000371/sig00000a51 ), + .DPRA2(\blk00000003/blk00000371/sig00000a51 ), + .DPRA3(\blk00000003/blk00000371/sig00000a51 ), + .DPRA4(\blk00000003/blk00000371/sig00000a51 ), + .WCLK(clk), + .WE(\blk00000003/blk00000371/sig00000a64 ), + .SPO(\NLW_blk00000003/blk00000371/blk00000388_SPO_UNCONNECTED ), + .DPO(\blk00000003/blk00000371/sig00000a55 ) + ); + RAM32X1D #( + .INIT ( 32'h00000001 )) + \blk00000003/blk00000371/blk00000387 ( + .A0(\blk00000003/sig00000239 ), + .A1(\blk00000003/blk00000371/sig00000a51 ), + .A2(\blk00000003/blk00000371/sig00000a51 ), + .A3(\blk00000003/blk00000371/sig00000a51 ), + .A4(\blk00000003/blk00000371/sig00000a51 ), + .D(\blk00000003/sig000004d9 ), + .DPRA0(\blk00000003/sig000001d0 ), + .DPRA1(\blk00000003/blk00000371/sig00000a51 ), + .DPRA2(\blk00000003/blk00000371/sig00000a51 ), + .DPRA3(\blk00000003/blk00000371/sig00000a51 ), + .DPRA4(\blk00000003/blk00000371/sig00000a51 ), + .WCLK(clk), + .WE(\blk00000003/blk00000371/sig00000a64 ), + .SPO(\NLW_blk00000003/blk00000371/blk00000387_SPO_UNCONNECTED ), + .DPO(\blk00000003/blk00000371/sig00000a53 ) + ); + RAM32X1D #( + .INIT ( 32'h00000001 )) + \blk00000003/blk00000371/blk00000386 ( + .A0(\blk00000003/sig00000239 ), + .A1(\blk00000003/blk00000371/sig00000a51 ), + .A2(\blk00000003/blk00000371/sig00000a51 ), + .A3(\blk00000003/blk00000371/sig00000a51 ), + .A4(\blk00000003/blk00000371/sig00000a51 ), + .D(\blk00000003/sig000004da ), + .DPRA0(\blk00000003/sig000001d0 ), + .DPRA1(\blk00000003/blk00000371/sig00000a51 ), + .DPRA2(\blk00000003/blk00000371/sig00000a51 ), + .DPRA3(\blk00000003/blk00000371/sig00000a51 ), + .DPRA4(\blk00000003/blk00000371/sig00000a51 ), + .WCLK(clk), + .WE(\blk00000003/blk00000371/sig00000a64 ), + .SPO(\NLW_blk00000003/blk00000371/blk00000386_SPO_UNCONNECTED ), + .DPO(\blk00000003/blk00000371/sig00000a52 ) + ); + RAM32X1D #( + .INIT ( 32'h00000001 )) + \blk00000003/blk00000371/blk00000385 ( + .A0(\blk00000003/sig00000239 ), + .A1(\blk00000003/blk00000371/sig00000a51 ), + .A2(\blk00000003/blk00000371/sig00000a51 ), + .A3(\blk00000003/blk00000371/sig00000a51 ), + .A4(\blk00000003/blk00000371/sig00000a51 ), + .D(\blk00000003/sig000004d8 ), + .DPRA0(\blk00000003/sig000001d0 ), + .DPRA1(\blk00000003/blk00000371/sig00000a51 ), + .DPRA2(\blk00000003/blk00000371/sig00000a51 ), + .DPRA3(\blk00000003/blk00000371/sig00000a51 ), + .DPRA4(\blk00000003/blk00000371/sig00000a51 ), + .WCLK(clk), + .WE(\blk00000003/blk00000371/sig00000a64 ), + .SPO(\NLW_blk00000003/blk00000371/blk00000385_SPO_UNCONNECTED ), + .DPO(\blk00000003/blk00000371/sig00000a54 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000371/blk00000384 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk00000371/sig00000a63 ), + .Q(\blk00000003/sig000000f2 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000371/blk00000383 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk00000371/sig00000a62 ), + .Q(\blk00000003/sig000000f3 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000371/blk00000382 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk00000371/sig00000a61 ), + .Q(\blk00000003/sig000000f4 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000371/blk00000381 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk00000371/sig00000a60 ), + .Q(\blk00000003/sig000000f5 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000371/blk00000380 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk00000371/sig00000a5f ), + .Q(\blk00000003/sig000000f6 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000371/blk0000037f ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk00000371/sig00000a5e ), + .Q(\blk00000003/sig000000f7 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000371/blk0000037e ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk00000371/sig00000a5d ), + .Q(\blk00000003/sig000000f8 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000371/blk0000037d ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk00000371/sig00000a5c ), + .Q(\blk00000003/sig000000f9 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000371/blk0000037c ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk00000371/sig00000a5b ), + .Q(\blk00000003/sig000000fa ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000371/blk0000037b ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk00000371/sig00000a5a ), + .Q(\blk00000003/sig000000fb ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000371/blk0000037a ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk00000371/sig00000a59 ), + .Q(\blk00000003/sig000000fc ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000371/blk00000379 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk00000371/sig00000a58 ), + .Q(\blk00000003/sig000000fd ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000371/blk00000378 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk00000371/sig00000a57 ), + .Q(\blk00000003/sig000000fe ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000371/blk00000377 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk00000371/sig00000a56 ), + .Q(\blk00000003/sig000000ff ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000371/blk00000376 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk00000371/sig00000a55 ), + .Q(\blk00000003/sig00000100 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000371/blk00000375 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk00000371/sig00000a54 ), + .Q(\blk00000003/sig00000101 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000371/blk00000374 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk00000371/sig00000a53 ), + .Q(\blk00000003/sig00000102 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000371/blk00000373 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk00000371/sig00000a52 ), + .Q(\blk00000003/sig00000103 ) + ); + GND \blk00000003/blk00000371/blk00000372 ( + .G(\blk00000003/blk00000371/sig00000a51 ) + ); + +// synthesis translate_on + +endmodule + +// synthesis translate_off + +`ifndef GLBL +`define GLBL + +`timescale 1 ps / 1 ps + +module glbl (); + + parameter ROC_WIDTH = 100000; + parameter TOC_WIDTH = 0; + +//-------- STARTUP Globals -------------- + wire GSR; + wire GTS; + wire GWE; + wire PRLD; + tri1 p_up_tmp; + tri (weak1, strong0) PLL_LOCKG = p_up_tmp; + + wire PROGB_GLBL; + wire CCLKO_GLBL; + + reg GSR_int; + reg GTS_int; + reg PRLD_int; + +//-------- JTAG Globals -------------- + wire JTAG_TDO_GLBL; + wire JTAG_TCK_GLBL; + wire JTAG_TDI_GLBL; + wire JTAG_TMS_GLBL; + wire JTAG_TRST_GLBL; + + reg JTAG_CAPTURE_GLBL; + reg JTAG_RESET_GLBL; + reg JTAG_SHIFT_GLBL; + reg JTAG_UPDATE_GLBL; + reg JTAG_RUNTEST_GLBL; + + reg JTAG_SEL1_GLBL = 0; + reg JTAG_SEL2_GLBL = 0 ; + reg JTAG_SEL3_GLBL = 0; + reg JTAG_SEL4_GLBL = 0; + + reg JTAG_USER_TDO1_GLBL = 1'bz; + reg JTAG_USER_TDO2_GLBL = 1'bz; + reg JTAG_USER_TDO3_GLBL = 1'bz; + reg JTAG_USER_TDO4_GLBL = 1'bz; + + assign (weak1, weak0) GSR = GSR_int; + assign (weak1, weak0) GTS = GTS_int; + assign (weak1, weak0) PRLD = PRLD_int; + + initial begin + GSR_int = 1'b1; + PRLD_int = 1'b1; + #(ROC_WIDTH) + GSR_int = 1'b0; + PRLD_int = 1'b0; + end + + initial begin + GTS_int = 1'b1; + #(TOC_WIDTH) + GTS_int = 1'b0; + end + +endmodule + +`endif + +// synthesis translate_on diff --git a/fpga/usrp3/top/x400/coregen_dsp/hbdec3_stub.v b/fpga/usrp3/top/x400/coregen_dsp/hbdec3_stub.v new file mode 100644 index 000000000..61389d4ba --- /dev/null +++ b/fpga/usrp3/top/x400/coregen_dsp/hbdec3_stub.v @@ -0,0 +1,20 @@ +module hbdec3( + sclr, ce, rfd, rdy, data_valid, coef_we, nd, clk, + coef_ld, dout_1, dout_2, din_1, din_2, coef_din +) +/* synthesis syn_black_box black_box_pad_pin="sclr,ce,rfd,rdy,data_valid,coef_we,nd,clk,coef_ld,dout_1[47:0],dout_2[47:0],din_1[23:0],din_2[23:0],coef_din[17:0]" */; + input sclr; + input ce; + output rfd; + output rdy; + output data_valid; + input coef_we; + input nd; + input clk; + input coef_ld; + output [47:0]dout_1; + output [47:0]dout_2; + input [23:0]din_1; + input [23:0]din_2; + input [17:0]coef_din; +endmodule diff --git a/fpga/usrp3/top/x400/cpld_interface.v b/fpga/usrp3/top/x400/cpld_interface.v new file mode 100644 index 000000000..a98fe7962 --- /dev/null +++ b/fpga/usrp3/top/x400/cpld_interface.v @@ -0,0 +1,638 @@ +// +// Copyright 2021 Ettus Research, A National Instruments Brand +// +// SPDX-License-Identifier: LGPL-3.0-or-later +// +// Module: cpld_interface.v +// +// Description: +// +// This module comprises the logic on the FPGA to connect with the +// motherboard CPLD. +// +// As a first step each request source is transferred to PRC domain. +// Timestamps are removed in the timer modules. All requests are bundled in +// one combiner and then split / decoded across all targets. By inserting of +// ctrlport termination modules a ctrlport answer will be available for all +// addresses to avoid blocking the main ctrlport combiner. +// + +`default_nettype none + + +module cpld_interface ( + // Clocks + input wire s_axi_aclk, + input wire s_axi_aresetn, + input wire pll_ref_clk, + input wire radio_clk, + + // Reset (domain: pll_ref_clk) + input wire ctrlport_rst, + + // Timestamp (domain: radio_clk) + input wire [63:0] radio_time, + input wire radio_time_stb, + input wire [ 3:0] time_ignore_bits, + + // AXI4-Lite: Write address port (domain: s_axi_aclk) + input wire [16:0] s_axi_awaddr, + input wire s_axi_awvalid, + output wire s_axi_awready, + // AXI4-Lite: Write data port (domain: s_axi_aclk) + input wire [31:0] s_axi_wdata, + input wire [ 3:0] s_axi_wstrb, + input wire s_axi_wvalid, + output wire s_axi_wready, + // AXI4-Lite: Write response port (domain: s_axi_aclk) + output wire[ 1:0] s_axi_bresp, + output wire s_axi_bvalid, + input wire s_axi_bready, + // AXI4-Lite: Read address port (domain: s_axi_aclk) + input wire [16:0] s_axi_araddr, + input wire s_axi_arvalid, + output wire s_axi_arready, + // AXI4-Lite: Read data port (domain: s_axi_aclk) + output wire [31:0] s_axi_rdata, + output wire [ 1:0] s_axi_rresp, + output wire s_axi_rvalid, + input wire s_axi_rready, + + // Control port from / to application (domain: radio_clk) + input wire s_ctrlport_req_wr, + input wire s_ctrlport_req_rd, + input wire [19:0] s_ctrlport_req_addr, + input wire [31:0] s_ctrlport_req_data, + input wire [ 3:0] s_ctrlport_req_byte_en, + input wire s_ctrlport_req_has_time, + input wire [63:0] s_ctrlport_req_time, + output wire s_ctrlport_resp_ack, + output wire [ 1:0] s_ctrlport_resp_status, + output wire [31:0] s_ctrlport_resp_data, + + // SPI Bus to connect to MB CPLD + output wire [ 1:0] ss, + output wire sclk, + output wire mosi, + input wire miso, + + // QSFP port LED (domain: any) + input wire [ 3:0] qsfp0_led_active, + input wire [ 3:0] qsfp0_led_link, + input wire [ 3:0] qsfp1_led_active, + input wire [ 3:0] qsfp1_led_link, + + // iPass present signals + input wire [ 1:0] ipass_present_n, + + // Version (Constant) + output wire [95:0] version_info +); + + `include "../../lib/rfnoc/core/ctrlport.vh" + `include "regmap/pl_cpld_regmap_utils.vh" + `include "cpld/regmap/mb_cpld_pl_regmap_utils.vh" + `include "cpld/regmap/pl_cpld_base_regmap_utils.vh" + + //--------------------------------------------------------------------------- + // Internal clocks and resets + //--------------------------------------------------------------------------- + + wire s_axi_areset; + wire ctrlport_clk; + assign s_axi_areset = ~s_axi_aresetn; + assign ctrlport_clk = pll_ref_clk; + + //--------------------------------------------------------------------------- + // Timestamp synchronization + //--------------------------------------------------------------------------- + + reg [ 3:0] radio_time_stb_shift_reg; + wire radio_time_stb_prc; + reg [63:0] radio_time_prc; + + // radio_clk and pll_ref_clk are synchronous clocks with an integer + // multiplier <= 4. + // + // A simple register can be used to capture the latest timestamp the strobe + // pulse is preserved for up to 4 clock cycles and used in pll_ref_clk domain + // to driver timers. + always @(posedge radio_clk) begin + radio_time_stb_shift_reg <= {radio_time_stb_shift_reg[2:0], radio_time_stb}; + if (radio_time_stb) begin + radio_time_prc <= radio_time; + end + end + assign radio_time_stb_prc = | radio_time_stb_shift_reg; + + //--------------------------------------------------------------------------- + // MPM Endpoint connection + //--------------------------------------------------------------------------- + // Translate AXI lite to control port. + // Timeout based on the 40 MHz AXI clock is about 0.839 seconds. + + wire [19:0] mpm_endpoint_ctrlport_axi_clk_req_addr; + wire [ 3:0] mpm_endpoint_ctrlport_axi_clk_req_byte_en; + wire [31:0] mpm_endpoint_ctrlport_axi_clk_req_data; + wire mpm_endpoint_ctrlport_axi_clk_req_has_time; + wire [ 9:0] mpm_endpoint_ctrlport_axi_clk_req_portid; + wire mpm_endpoint_ctrlport_axi_clk_req_rd; + wire [15:0] mpm_endpoint_ctrlport_axi_clk_req_rem_epid; + wire [ 9:0] mpm_endpoint_ctrlport_axi_clk_req_rem_portid; + wire [63:0] mpm_endpoint_ctrlport_axi_clk_req_time; + wire mpm_endpoint_ctrlport_axi_clk_req_wr; + wire mpm_endpoint_ctrlport_axi_clk_resp_ack; + wire [31:0] mpm_endpoint_ctrlport_axi_clk_resp_data; + wire [ 1:0] mpm_endpoint_ctrlport_axi_clk_resp_status; + + axil_ctrlport_master #( + .TIMEOUT (25), + .AXI_AWIDTH (17), + .CTRLPORT_AWIDTH (17) + ) mpm_endpoint ( + .s_axi_aclk (s_axi_aclk), + .s_axi_aresetn (s_axi_aresetn), + .s_axi_awaddr (s_axi_awaddr), + .s_axi_awvalid (s_axi_awvalid), + .s_axi_awready (s_axi_awready), + .s_axi_wdata (s_axi_wdata), + .s_axi_wstrb (s_axi_wstrb), + .s_axi_wvalid (s_axi_wvalid), + .s_axi_wready (s_axi_wready), + .s_axi_bresp (s_axi_bresp), + .s_axi_bvalid (s_axi_bvalid), + .s_axi_bready (s_axi_bready), + .s_axi_araddr (s_axi_araddr), + .s_axi_arvalid (s_axi_arvalid), + .s_axi_arready (s_axi_arready), + .s_axi_rdata (s_axi_rdata), + .s_axi_rresp (s_axi_rresp), + .s_axi_rvalid (s_axi_rvalid), + .s_axi_rready (s_axi_rready), + .m_ctrlport_req_wr (mpm_endpoint_ctrlport_axi_clk_req_wr), + .m_ctrlport_req_rd (mpm_endpoint_ctrlport_axi_clk_req_rd), + .m_ctrlport_req_addr (mpm_endpoint_ctrlport_axi_clk_req_addr), + .m_ctrlport_req_portid (mpm_endpoint_ctrlport_axi_clk_req_portid), + .m_ctrlport_req_rem_epid (mpm_endpoint_ctrlport_axi_clk_req_rem_epid), + .m_ctrlport_req_rem_portid (mpm_endpoint_ctrlport_axi_clk_req_rem_portid), + .m_ctrlport_req_data (mpm_endpoint_ctrlport_axi_clk_req_data), + .m_ctrlport_req_byte_en (mpm_endpoint_ctrlport_axi_clk_req_byte_en), + .m_ctrlport_req_has_time (mpm_endpoint_ctrlport_axi_clk_req_has_time), + .m_ctrlport_req_time (mpm_endpoint_ctrlport_axi_clk_req_time), + .m_ctrlport_resp_ack (mpm_endpoint_ctrlport_axi_clk_resp_ack), + .m_ctrlport_resp_status (mpm_endpoint_ctrlport_axi_clk_resp_status), + .m_ctrlport_resp_data (mpm_endpoint_ctrlport_axi_clk_resp_data) + ); + + // Transfer AXI clock based MPM endpoint control port request to pll_ref_clk + // domain. + wire [19:0] mpm_endpoint_ctrlport_pll_clk_req_addr; + wire [ 3:0] mpm_endpoint_ctrlport_pll_clk_req_byte_en; + wire [31:0] mpm_endpoint_ctrlport_pll_clk_req_data; + wire mpm_endpoint_ctrlport_pll_clk_req_has_time; + wire mpm_endpoint_ctrlport_pll_clk_req_rd; + wire [63:0] mpm_endpoint_ctrlport_pll_clk_req_time; + wire mpm_endpoint_ctrlport_pll_clk_req_wr; + wire mpm_endpoint_ctrlport_pll_clk_resp_ack; + wire [31:0] mpm_endpoint_ctrlport_pll_clk_resp_data; + wire [ 1:0] mpm_endpoint_ctrlport_pll_clk_resp_status; + + ctrlport_clk_cross ctrlport_clk_cross_mpm ( + .rst (s_axi_areset), + .s_ctrlport_clk (s_axi_aclk), + .s_ctrlport_req_wr (mpm_endpoint_ctrlport_axi_clk_req_wr), + .s_ctrlport_req_rd (mpm_endpoint_ctrlport_axi_clk_req_rd), + .s_ctrlport_req_addr (mpm_endpoint_ctrlport_axi_clk_req_addr), + .s_ctrlport_req_portid (mpm_endpoint_ctrlport_axi_clk_req_portid), + .s_ctrlport_req_rem_epid (mpm_endpoint_ctrlport_axi_clk_req_rem_epid), + .s_ctrlport_req_rem_portid (mpm_endpoint_ctrlport_axi_clk_req_rem_portid), + .s_ctrlport_req_data (mpm_endpoint_ctrlport_axi_clk_req_data), + .s_ctrlport_req_byte_en (mpm_endpoint_ctrlport_axi_clk_req_byte_en), + .s_ctrlport_req_has_time (mpm_endpoint_ctrlport_axi_clk_req_has_time), + .s_ctrlport_req_time (mpm_endpoint_ctrlport_axi_clk_req_time), + .s_ctrlport_resp_ack (mpm_endpoint_ctrlport_axi_clk_resp_ack), + .s_ctrlport_resp_status (mpm_endpoint_ctrlport_axi_clk_resp_status), + .s_ctrlport_resp_data (mpm_endpoint_ctrlport_axi_clk_resp_data), + .m_ctrlport_clk (ctrlport_clk), + .m_ctrlport_req_wr (mpm_endpoint_ctrlport_pll_clk_req_wr), + .m_ctrlport_req_rd (mpm_endpoint_ctrlport_pll_clk_req_rd), + .m_ctrlport_req_addr (mpm_endpoint_ctrlport_pll_clk_req_addr), + .m_ctrlport_req_portid (), + .m_ctrlport_req_rem_epid (), + .m_ctrlport_req_rem_portid (), + .m_ctrlport_req_data (mpm_endpoint_ctrlport_pll_clk_req_data), + .m_ctrlport_req_byte_en (mpm_endpoint_ctrlport_pll_clk_req_byte_en), + .m_ctrlport_req_has_time (mpm_endpoint_ctrlport_pll_clk_req_has_time), + .m_ctrlport_req_time (mpm_endpoint_ctrlport_pll_clk_req_time), + .m_ctrlport_resp_ack (mpm_endpoint_ctrlport_pll_clk_resp_ack), + .m_ctrlport_resp_status (mpm_endpoint_ctrlport_pll_clk_resp_status), + .m_ctrlport_resp_data (mpm_endpoint_ctrlport_pll_clk_resp_data) + ); + + // Apply time of ControlPort request to MPM endpoint request. + wire [19:0] mpm_endpoint_ctrlport_req_addr; + wire [ 3:0] mpm_endpoint_ctrlport_req_byte_en; + wire [31:0] mpm_endpoint_ctrlport_req_data; + wire mpm_endpoint_ctrlport_req_rd; + wire mpm_endpoint_ctrlport_req_wr; + wire mpm_endpoint_ctrlport_resp_ack; + wire [31:0] mpm_endpoint_ctrlport_resp_data; + wire [ 1:0] mpm_endpoint_ctrlport_resp_status; + + ctrlport_timer #( + .EXEC_LATE_CMDS (1) + ) ctrlport_timer_mpm ( + .clk (ctrlport_clk), + .rst (ctrlport_rst), + .time_now (radio_time_prc), + .time_now_stb (radio_time_stb_prc), + .time_ignore_bits (time_ignore_bits), + .s_ctrlport_req_wr (mpm_endpoint_ctrlport_pll_clk_req_wr), + .s_ctrlport_req_rd (mpm_endpoint_ctrlport_pll_clk_req_rd), + .s_ctrlport_req_addr (mpm_endpoint_ctrlport_pll_clk_req_addr), + .s_ctrlport_req_data (mpm_endpoint_ctrlport_pll_clk_req_data), + .s_ctrlport_req_byte_en (mpm_endpoint_ctrlport_pll_clk_req_byte_en), + .s_ctrlport_req_has_time (mpm_endpoint_ctrlport_pll_clk_req_has_time), + .s_ctrlport_req_time (mpm_endpoint_ctrlport_pll_clk_req_time), + .s_ctrlport_resp_ack (mpm_endpoint_ctrlport_pll_clk_resp_ack), + .s_ctrlport_resp_status (mpm_endpoint_ctrlport_pll_clk_resp_status), + .s_ctrlport_resp_data (mpm_endpoint_ctrlport_pll_clk_resp_data), + .m_ctrlport_req_wr (mpm_endpoint_ctrlport_req_wr), + .m_ctrlport_req_rd (mpm_endpoint_ctrlport_req_rd), + .m_ctrlport_req_addr (mpm_endpoint_ctrlport_req_addr), + .m_ctrlport_req_data (mpm_endpoint_ctrlport_req_data), + .m_ctrlport_req_byte_en (mpm_endpoint_ctrlport_req_byte_en), + .m_ctrlport_resp_ack (mpm_endpoint_ctrlport_resp_ack), + .m_ctrlport_resp_status (mpm_endpoint_ctrlport_resp_status), + .m_ctrlport_resp_data (mpm_endpoint_ctrlport_resp_data) + ); + + //--------------------------------------------------------------------------- + // User Application Request + //--------------------------------------------------------------------------- + // Transfer request to pll_ref_clk domain. + + wire [19:0] app_ctrlport_pll_clk_req_addr; + wire [ 3:0] app_ctrlport_pll_clk_req_byte_en; + wire [31:0] app_ctrlport_pll_clk_req_data; + wire app_ctrlport_pll_clk_req_has_time; + wire app_ctrlport_pll_clk_req_rd; + wire [63:0] app_ctrlport_pll_clk_req_time; + wire app_ctrlport_pll_clk_req_wr; + wire app_ctrlport_pll_clk_resp_ack; + wire [31:0] app_ctrlport_pll_clk_resp_data; + wire [ 1:0] app_ctrlport_pll_clk_resp_status; + + ctrlport_clk_cross ctrlport_clk_cross_app ( + .rst (ctrlport_rst), + .s_ctrlport_clk (radio_clk), + .s_ctrlport_req_wr (s_ctrlport_req_wr), + .s_ctrlport_req_rd (s_ctrlport_req_rd), + .s_ctrlport_req_addr (s_ctrlport_req_addr), + .s_ctrlport_req_portid (), + .s_ctrlport_req_rem_epid (), + .s_ctrlport_req_rem_portid (), + .s_ctrlport_req_data (s_ctrlport_req_data), + .s_ctrlport_req_byte_en (s_ctrlport_req_byte_en), + .s_ctrlport_req_has_time (s_ctrlport_req_has_time), + .s_ctrlport_req_time (s_ctrlport_req_time), + .s_ctrlport_resp_ack (s_ctrlport_resp_ack), + .s_ctrlport_resp_status (s_ctrlport_resp_status), + .s_ctrlport_resp_data (s_ctrlport_resp_data), + .m_ctrlport_clk (ctrlport_clk), + .m_ctrlport_req_wr (app_ctrlport_pll_clk_req_wr), + .m_ctrlport_req_rd (app_ctrlport_pll_clk_req_rd), + .m_ctrlport_req_addr (app_ctrlport_pll_clk_req_addr), + .m_ctrlport_req_portid (), + .m_ctrlport_req_rem_epid (), + .m_ctrlport_req_rem_portid (), + .m_ctrlport_req_data (app_ctrlport_pll_clk_req_data), + .m_ctrlport_req_byte_en (app_ctrlport_pll_clk_req_byte_en), + .m_ctrlport_req_has_time (app_ctrlport_pll_clk_req_has_time), + .m_ctrlport_req_time (app_ctrlport_pll_clk_req_time), + .m_ctrlport_resp_ack (app_ctrlport_pll_clk_resp_ack), + .m_ctrlport_resp_status (app_ctrlport_pll_clk_resp_status), + .m_ctrlport_resp_data (app_ctrlport_pll_clk_resp_data) + ); + + // Apply timing to application based ControlPort request. + wire [19:0] app_ctrlport_req_addr; + wire [ 3:0] app_ctrlport_req_byte_en; + wire [31:0] app_ctrlport_req_data; + wire app_ctrlport_req_rd; + wire app_ctrlport_req_wr; + wire app_ctrlport_resp_ack; + wire [31:0] app_ctrlport_resp_data; + wire [ 1:0] app_ctrlport_resp_status; + + ctrlport_timer #( + .EXEC_LATE_CMDS (1) + ) ctrlport_timer_app ( + .clk (ctrlport_clk), + .rst (ctrlport_rst), + .time_now (radio_time_prc), + .time_now_stb (radio_time_stb_prc), + .time_ignore_bits (time_ignore_bits), + .s_ctrlport_req_wr (app_ctrlport_pll_clk_req_wr), + .s_ctrlport_req_rd (app_ctrlport_pll_clk_req_rd), + .s_ctrlport_req_addr (app_ctrlport_pll_clk_req_addr), + .s_ctrlport_req_data (app_ctrlport_pll_clk_req_data), + .s_ctrlport_req_byte_en (app_ctrlport_pll_clk_req_byte_en), + .s_ctrlport_req_has_time (app_ctrlport_pll_clk_req_has_time), + .s_ctrlport_req_time (app_ctrlport_pll_clk_req_time), + .s_ctrlport_resp_ack (app_ctrlport_pll_clk_resp_ack), + .s_ctrlport_resp_status (app_ctrlport_pll_clk_resp_status), + .s_ctrlport_resp_data (app_ctrlport_pll_clk_resp_data), + .m_ctrlport_req_wr (app_ctrlport_req_wr), + .m_ctrlport_req_rd (app_ctrlport_req_rd), + .m_ctrlport_req_addr (app_ctrlport_req_addr), + .m_ctrlport_req_data (app_ctrlport_req_data), + .m_ctrlport_req_byte_en (app_ctrlport_req_byte_en), + .m_ctrlport_resp_ack (app_ctrlport_resp_ack), + .m_ctrlport_resp_status (app_ctrlport_resp_status), + .m_ctrlport_resp_data (app_ctrlport_resp_data) + ); + + //--------------------------------------------------------------------------- + // QSFP LED Controller + //--------------------------------------------------------------------------- + + wire [19:0] led_ctrlport_req_addr; + wire [ 3:0] led_ctrlport_req_byte_en; + wire [31:0] led_ctrlport_req_data; + wire led_ctrlport_req_rd; + wire led_ctrlport_req_wr; + wire led_ctrlport_resp_ack; + wire [31:0] led_ctrlport_resp_data; + wire [ 1:0] led_ctrlport_resp_status; + + qsfp_led_controller + # (.LED_REGISTER_ADDRESS(MB_CPLD + PL_REGISTERS + LED_REGISTER)) + qsfp_led_controller_i ( + .ctrlport_clk (ctrlport_clk), + .ctrlport_rst (ctrlport_rst), + .m_ctrlport_req_wr (led_ctrlport_req_wr), + .m_ctrlport_req_rd (led_ctrlport_req_rd), + .m_ctrlport_req_addr (led_ctrlport_req_addr), + .m_ctrlport_req_data (led_ctrlport_req_data), + .m_ctrlport_req_byte_en (led_ctrlport_req_byte_en), + .m_ctrlport_resp_ack (led_ctrlport_resp_ack), + .m_ctrlport_resp_status (led_ctrlport_resp_status), + .m_ctrlport_resp_data (led_ctrlport_resp_data), + .qsfp0_led_active (qsfp0_led_active), + .qsfp0_led_link (qsfp0_led_link), + .qsfp1_led_active (qsfp1_led_active), + .qsfp1_led_link (qsfp1_led_link)); + + //--------------------------------------------------------------------------- + // iPass present controller + //--------------------------------------------------------------------------- + + wire [19:0] ipass_ctrlport_req_addr; + wire [ 3:0] ipass_ctrlport_req_byte_en; + wire [31:0] ipass_ctrlport_req_data; + wire ipass_ctrlport_req_rd; + wire ipass_ctrlport_req_wr; + wire ipass_ctrlport_resp_ack; + wire [31:0] ipass_ctrlport_resp_data; + wire [ 1:0] ipass_ctrlport_resp_status; + + wire ipass_enable; + + ipass_present_controller ipass_present_controller_i ( + .ctrlport_clk (ctrlport_clk), + .ctrlport_rst (ctrlport_rst), + .m_ctrlport_req_wr (ipass_ctrlport_req_wr), + .m_ctrlport_req_rd (ipass_ctrlport_req_rd), + .m_ctrlport_req_addr (ipass_ctrlport_req_addr), + .m_ctrlport_req_data (ipass_ctrlport_req_data), + .m_ctrlport_req_byte_en (ipass_ctrlport_req_byte_en), + .m_ctrlport_resp_ack (ipass_ctrlport_resp_ack), + .m_ctrlport_resp_status (ipass_ctrlport_resp_status), + .m_ctrlport_resp_data (ipass_ctrlport_resp_data), + .enable (ipass_enable), + .ipass_present_n (ipass_present_n) + ); + + //--------------------------------------------------------------------------- + // Combine all incoming combiner requests and provide to targets + //--------------------------------------------------------------------------- + + wire [19:0] m_ctrlport_req_addr; + wire [31:0] m_ctrlport_req_data; + wire m_ctrlport_req_rd; + wire m_ctrlport_req_wr; + wire m_ctrlport_resp_ack; + wire [31:0] m_ctrlport_resp_data; + wire [ 1:0] m_ctrlport_resp_status; + + ctrlport_combiner #( + .NUM_MASTERS (4), + .PRIORITY (1) + ) ctrlport_combiner_i ( + .ctrlport_clk (ctrlport_clk), + .ctrlport_rst (ctrlport_rst), + .s_ctrlport_req_wr ({ipass_ctrlport_req_wr, led_ctrlport_req_wr, mpm_endpoint_ctrlport_req_wr, app_ctrlport_req_wr}), + .s_ctrlport_req_rd ({ipass_ctrlport_req_rd, led_ctrlport_req_rd, mpm_endpoint_ctrlport_req_rd, app_ctrlport_req_rd}), + .s_ctrlport_req_addr ({ipass_ctrlport_req_addr, led_ctrlport_req_addr, mpm_endpoint_ctrlport_req_addr, app_ctrlport_req_addr}), + .s_ctrlport_req_portid (), + .s_ctrlport_req_rem_epid (), + .s_ctrlport_req_rem_portid (), + .s_ctrlport_req_data ({ipass_ctrlport_req_data, led_ctrlport_req_data, mpm_endpoint_ctrlport_req_data, app_ctrlport_req_data}), + .s_ctrlport_req_byte_en ({ipass_ctrlport_req_byte_en, led_ctrlport_req_byte_en, mpm_endpoint_ctrlport_req_byte_en, app_ctrlport_req_byte_en}), + .s_ctrlport_req_has_time (), + .s_ctrlport_req_time (), + .s_ctrlport_resp_ack ({ipass_ctrlport_resp_ack, led_ctrlport_resp_ack, mpm_endpoint_ctrlport_resp_ack, app_ctrlport_resp_ack}), + .s_ctrlport_resp_status ({ipass_ctrlport_resp_status, led_ctrlport_resp_status, mpm_endpoint_ctrlport_resp_status, app_ctrlport_resp_status}), + .s_ctrlport_resp_data ({ipass_ctrlport_resp_data, led_ctrlport_resp_data, mpm_endpoint_ctrlport_resp_data, app_ctrlport_resp_data}), + .m_ctrlport_req_wr (m_ctrlport_req_wr), + .m_ctrlport_req_rd (m_ctrlport_req_rd), + .m_ctrlport_req_addr (m_ctrlport_req_addr), + .m_ctrlport_req_portid (), + .m_ctrlport_req_rem_epid (), + .m_ctrlport_req_rem_portid (), + .m_ctrlport_req_data (m_ctrlport_req_data), + .m_ctrlport_req_byte_en (), + .m_ctrlport_req_has_time (), + .m_ctrlport_req_time (), + .m_ctrlport_resp_ack (m_ctrlport_resp_ack), + .m_ctrlport_resp_status (m_ctrlport_resp_status), + .m_ctrlport_resp_data (m_ctrlport_resp_data) + ); + + + // Split for CPLD facing requests and others. + wire [19:0] base_reg_ctrlport_req_addr; + wire [31:0] base_reg_ctrlport_req_data; + wire base_reg_ctrlport_req_rd; + wire base_reg_ctrlport_req_wr; + wire base_reg_ctrlport_resp_ack; + wire [31:0] base_reg_ctrlport_resp_data; + wire [ 1:0] base_reg_ctrlport_resp_status; + + wire [19:0] spi_master_ctrlport_req_addr; + wire [31:0] spi_master_ctrlport_req_data; + wire spi_master_ctrlport_req_rd; + wire spi_master_ctrlport_req_wr; + wire spi_master_ctrlport_resp_ack; + wire [31:0] spi_master_ctrlport_resp_data; + wire [ 1:0] spi_master_ctrlport_resp_status; + + wire [19:0] unused_fpga_intermediate_ctrlport_req_addr; + wire [31:0] unused_fpga_intermediate_ctrlport_req_data; + wire unused_fpga_intermediate_ctrlport_req_rd; + wire unused_fpga_intermediate_ctrlport_req_wr; + wire unused_fpga_intermediate_ctrlport_resp_ack; + wire [31:0] unused_fpga_intermediate_ctrlport_resp_data; + wire [ 1:0] unused_fpga_intermediate_ctrlport_resp_status; + + wire [19:0] unused_fpga_msbs_ctrlport_req_addr; + wire [31:0] unused_fpga_msbs_ctrlport_req_data; + wire unused_fpga_msbs_ctrlport_req_rd; + wire unused_fpga_msbs_ctrlport_req_wr; + wire unused_fpga_msbs_ctrlport_resp_ack; + wire [31:0] unused_fpga_msbs_ctrlport_resp_data; + wire [ 1:0] unused_fpga_msbs_ctrlport_resp_status; + + ctrlport_splitter #( + .NUM_SLAVES (4) + ) ctrlport_splitter_i ( + .ctrlport_clk (ctrlport_clk), + .ctrlport_rst (ctrlport_rst), + .s_ctrlport_req_wr (m_ctrlport_req_wr), + .s_ctrlport_req_rd (m_ctrlport_req_rd), + .s_ctrlport_req_addr (m_ctrlport_req_addr), + .s_ctrlport_req_data (m_ctrlport_req_data), + .s_ctrlport_req_byte_en (), + .s_ctrlport_req_has_time (), + .s_ctrlport_req_time (), + .s_ctrlport_resp_ack (m_ctrlport_resp_ack), + .s_ctrlport_resp_status (m_ctrlport_resp_status), + .s_ctrlport_resp_data (m_ctrlport_resp_data), + .m_ctrlport_req_wr ({unused_fpga_msbs_ctrlport_req_wr, unused_fpga_intermediate_ctrlport_req_wr, base_reg_ctrlport_req_wr, spi_master_ctrlport_req_wr}), + .m_ctrlport_req_rd ({unused_fpga_msbs_ctrlport_req_rd, unused_fpga_intermediate_ctrlport_req_rd, base_reg_ctrlport_req_rd, spi_master_ctrlport_req_rd}), + .m_ctrlport_req_addr ({unused_fpga_msbs_ctrlport_req_addr, unused_fpga_intermediate_ctrlport_req_addr, base_reg_ctrlport_req_addr, spi_master_ctrlport_req_addr}), + .m_ctrlport_req_data ({unused_fpga_msbs_ctrlport_req_data, unused_fpga_intermediate_ctrlport_req_data, base_reg_ctrlport_req_data, spi_master_ctrlport_req_data}), + .m_ctrlport_req_byte_en (), + .m_ctrlport_req_has_time (), + .m_ctrlport_req_time (), + .m_ctrlport_resp_ack ({unused_fpga_msbs_ctrlport_resp_ack, unused_fpga_intermediate_ctrlport_resp_ack, base_reg_ctrlport_resp_ack, spi_master_ctrlport_resp_ack}), + .m_ctrlport_resp_status ({unused_fpga_msbs_ctrlport_resp_status, unused_fpga_intermediate_ctrlport_resp_status, base_reg_ctrlport_resp_status, spi_master_ctrlport_resp_status}), + .m_ctrlport_resp_data ({unused_fpga_msbs_ctrlport_resp_data, unused_fpga_intermediate_ctrlport_resp_data, base_reg_ctrlport_resp_data, spi_master_ctrlport_resp_data}) + ); + + //--------------------------------------------------------------------------- + // Targets for Requests + //--------------------------------------------------------------------------- + + wire [15:0] db_clock_divider; + wire [15:0] mb_clock_divider; + + cpld_interface_regs #( + .BASE_ADDRESS (BASE), + .NUM_ADDRESSES (BASE_SIZE) + ) cpld_interface_regs_i ( + .ctrlport_clk (ctrlport_clk), + .ctrlport_rst (ctrlport_rst), + .s_ctrlport_req_wr (base_reg_ctrlport_req_wr), + .s_ctrlport_req_rd (base_reg_ctrlport_req_rd), + .s_ctrlport_req_addr (base_reg_ctrlport_req_addr), + .s_ctrlport_req_data (base_reg_ctrlport_req_data), + .s_ctrlport_resp_ack (base_reg_ctrlport_resp_ack), + .s_ctrlport_resp_status (base_reg_ctrlport_resp_status), + .s_ctrlport_resp_data (base_reg_ctrlport_resp_data), + .mb_clock_divider (mb_clock_divider), + .db_clock_divider (db_clock_divider), + .ipass_enable (ipass_enable), + .version_info (version_info) + ); + + ctrlport_spi_master #( + .CPLD_ADDRESS_WIDTH (15), + .MB_CPLD_BASE_ADDRESS (MB_CPLD), + .DB_0_CPLD_BASE_ADDRESS (DB0_CPLD), + .DB_1_CPLD_BASE_ADDRESS (DB1_CPLD) + ) ctrlport_spi_master_i ( + .ctrlport_clk (ctrlport_clk), + .ctrlport_rst (ctrlport_rst), + .s_ctrlport_req_wr (spi_master_ctrlport_req_wr), + .s_ctrlport_req_rd (spi_master_ctrlport_req_rd), + .s_ctrlport_req_addr (spi_master_ctrlport_req_addr), + .s_ctrlport_req_data (spi_master_ctrlport_req_data), + .s_ctrlport_resp_ack (spi_master_ctrlport_resp_ack), + .s_ctrlport_resp_status (spi_master_ctrlport_resp_status), + .s_ctrlport_resp_data (spi_master_ctrlport_resp_data), + .ss (ss), + .sclk (sclk), + .mosi (mosi), + .miso (miso), + .mb_clock_divider (mb_clock_divider), + .db_clock_divider (db_clock_divider) + ); + + //--------------------------------------------------------------------------- + // Invalid target address spaces + //--------------------------------------------------------------------------- + + ctrlport_terminator #( + .START_ADDRESS (BASE + BASE_SIZE), + .LAST_ADDRESS (MB_CPLD-1) + ) ctrlport_terminator_intermediate ( + .ctrlport_clk (ctrlport_clk), + .ctrlport_rst (ctrlport_rst), + .s_ctrlport_req_wr (unused_fpga_intermediate_ctrlport_req_wr), + .s_ctrlport_req_rd (unused_fpga_intermediate_ctrlport_req_rd), + .s_ctrlport_req_addr (unused_fpga_intermediate_ctrlport_req_addr), + .s_ctrlport_req_data (unused_fpga_intermediate_ctrlport_req_data), + .s_ctrlport_resp_ack (unused_fpga_intermediate_ctrlport_resp_ack), + .s_ctrlport_resp_status (unused_fpga_intermediate_ctrlport_resp_status), + .s_ctrlport_resp_data (unused_fpga_intermediate_ctrlport_resp_data) + ); + + ctrlport_terminator #( + .START_ADDRESS (DB1_CPLD + DB1_CPLD_SIZE), + .LAST_ADDRESS (2**CTRLPORT_ADDR_W-1) + ) ctrlport_terminator_msbs ( + .ctrlport_clk (ctrlport_clk), + .ctrlport_rst (ctrlport_rst), + .s_ctrlport_req_wr (unused_fpga_msbs_ctrlport_req_wr), + .s_ctrlport_req_rd (unused_fpga_msbs_ctrlport_req_rd), + .s_ctrlport_req_addr (unused_fpga_msbs_ctrlport_req_addr), + .s_ctrlport_req_data (unused_fpga_msbs_ctrlport_req_data), + .s_ctrlport_resp_ack (unused_fpga_msbs_ctrlport_resp_ack), + .s_ctrlport_resp_status (unused_fpga_msbs_ctrlport_resp_status), + .s_ctrlport_resp_data (unused_fpga_msbs_ctrlport_resp_data) + ); + +endmodule + + +`default_nettype wire + + +//XmlParse xml_on +// +// +// This register map is available from the PS via AXI and MPM endpoint. +// Its size is 128K (17 bits). Only the 17 LSBs are used as address in this documentation. +// +// +// +// +// +// All registers of the MB CPLD (PL part). +// +// +// +// +// All registers of the first DB CPLD. Register map will be added later on. +// +// +// +// +// All registers of the second DB CPLD. Register map will be added later on. +// +// +// +// +//XmlParse xml_off diff --git a/fpga/usrp3/top/x400/cpld_interface_regs.v b/fpga/usrp3/top/x400/cpld_interface_regs.v new file mode 100644 index 000000000..72cfa9ca9 --- /dev/null +++ b/fpga/usrp3/top/x400/cpld_interface_regs.v @@ -0,0 +1,285 @@ +// +// Copyright 2021 Ettus Research, A National Instruments Brand +// +// SPDX-License-Identifier: LGPL-3.0-or-later +// +// Module: cpld_interface_regs +// +// Description: +// +// Basic registers to inform software about version and capabilities. +// +// Parameters: +// +// BASE_ADDRESS : Base address for CtrlPort registers. +// NUM_ADDRESSES : Number of bytes of address space to use. +// + +`default_nettype none + + +module cpld_interface_regs #( + parameter BASE_ADDRESS = 0, + parameter NUM_ADDRESSES = 128 +) ( + input wire ctrlport_clk, + input wire ctrlport_rst, + + // Request + input wire s_ctrlport_req_wr, + input wire s_ctrlport_req_rd, + input wire [19:0] s_ctrlport_req_addr, + input wire [31:0] s_ctrlport_req_data, + // Response + output reg s_ctrlport_resp_ack, + output reg [ 1:0] s_ctrlport_resp_status, + output reg [31:0] s_ctrlport_resp_data, + + // Configuration to the SPI master + output wire [15:0] mb_clock_divider, + output wire [15:0] db_clock_divider, + + output reg ipass_enable = 1'b0, + + // Version (Constant) + output wire [95:0] version_info +); + + `include "regmap/cpld_interface_regmap_utils.vh" + `include "regmap/versioning_regs_regmap_utils.vh" + `include "regmap/versioning_utils.vh" + `include "../../lib/rfnoc/core/ctrlport.vh" + + //---------------------------------------------------------- + // Address calculation + //---------------------------------------------------------- + + wire address_in_range = (s_ctrlport_req_addr >= BASE_ADDRESS) && + (s_ctrlport_req_addr < BASE_ADDRESS + NUM_ADDRESSES); + + //---------------------------------------------------------- + // Static variables + //---------------------------------------------------------- + + localparam SIGNATURE_VALUE = 32'hCB1D1FAC; + + //---------------------------------------------------------- + // Internal registers + //---------------------------------------------------------- + reg [SCRATCH_REGISTER_SIZE-1:0] scratch_reg; + reg [MB_DIVIDER_SIZE-1:0] mb_divider_reg = 2; + reg [DB_DIVIDER_SIZE-1:0] db_divider_reg = 5; + + //---------------------------------------------------------- + // Assign configuration signals + //---------------------------------------------------------- + + assign mb_clock_divider = mb_divider_reg; + assign db_clock_divider = db_divider_reg; + + //---------------------------------------------------------- + // Handling of ControlPort requests + //---------------------------------------------------------- + + always @(posedge ctrlport_clk) begin + // Reset internal registers and responses + if (ctrlport_rst) begin + scratch_reg <= 0; + s_ctrlport_resp_ack <= 1'b0; + s_ctrlport_resp_data <= {32{1'bx}}; + s_ctrlport_resp_status <= {2{1'bx}}; + + end else begin + // Write requests + if (s_ctrlport_req_wr) begin + // Always issue an ack and no data + s_ctrlport_resp_ack <= 1'b1; + s_ctrlport_resp_data <= {32{1'bx}}; + s_ctrlport_resp_status <= CTRL_STS_OKAY; + + case (s_ctrlport_req_addr) + BASE_ADDRESS + SCRATCH_REGISTER: begin + scratch_reg <= s_ctrlport_req_data; + end + + BASE_ADDRESS + IPASS_CONTROL: begin + ipass_enable <= s_ctrlport_req_data[IPASS_ENABLE_TRANSFER]; + end + + BASE_ADDRESS + MOTHERBOARD_CPLD_DIVIDER: begin + mb_divider_reg <= s_ctrlport_req_data[MB_DIVIDER_MSB:MB_DIVIDER]; + end + + BASE_ADDRESS + DAUGHTERBOARD_CPLD_DIVIDER: begin + db_divider_reg <= s_ctrlport_req_data[DB_DIVIDER_MSB:DB_DIVIDER]; + end + + // Error on undefined address + default: begin + if (address_in_range) begin + s_ctrlport_resp_status <= CTRL_STS_CMDERR; + + // No response if out of range + end else begin + s_ctrlport_resp_ack <= 1'b0; + end + end + endcase + + // Read request + end else if (s_ctrlport_req_rd) begin + // Default assumption: valid request + s_ctrlport_resp_ack <= 1'b1; + s_ctrlport_resp_status <= CTRL_STS_OKAY; + + case (s_ctrlport_req_addr) + BASE_ADDRESS + SIGNATURE_REGISTER: begin + s_ctrlport_resp_data <= SIGNATURE_VALUE; + end + + BASE_ADDRESS + SCRATCH_REGISTER: begin + s_ctrlport_resp_data <= scratch_reg; + end + + BASE_ADDRESS + IPASS_CONTROL: begin + s_ctrlport_resp_data <= 32'h0; + s_ctrlport_resp_data[IPASS_ENABLE_TRANSFER] <= ipass_enable; + end + + BASE_ADDRESS + MOTHERBOARD_CPLD_DIVIDER: begin + s_ctrlport_resp_data <= {{(CTRLPORT_DATA_W - MB_DIVIDER_SIZE){1'b0}}, mb_divider_reg}; + end + + BASE_ADDRESS + DAUGHTERBOARD_CPLD_DIVIDER: begin + s_ctrlport_resp_data <= {{(CTRLPORT_DATA_W - DB_DIVIDER_SIZE){1'b0}}, db_divider_reg}; + end + + // Error on undefined address + default: begin + s_ctrlport_resp_data <= {32{1'bx}}; + if (address_in_range) begin + s_ctrlport_resp_status <= CTRL_STS_CMDERR; + + // No response if out of range + end else begin + s_ctrlport_resp_ack <= 1'b0; + end + end + endcase + + // No request + end else begin + s_ctrlport_resp_ack <= 1'b0; + end + end + end + + //---------------------------------------------------------- + // Version Info + //---------------------------------------------------------- + + // Version metadata. Constants come from auto-generated file + // versioning_regs_regmap_utils.vh. + assign version_info = build_component_versions( + CPLD_IFC_VERSION_LAST_MODIFIED_TIME, + build_version( + CPLD_IFC_OLDEST_COMPATIBLE_VERSION_MAJOR, + CPLD_IFC_OLDEST_COMPATIBLE_VERSION_MINOR, + CPLD_IFC_OLDEST_COMPATIBLE_VERSION_BUILD + ), + build_version( + CPLD_IFC_CURRENT_VERSION_MAJOR, + CPLD_IFC_CURRENT_VERSION_MINOR, + CPLD_IFC_CURRENT_VERSION_BUILD + ) + ); + +endmodule + + +`default_nettype wire + + +//XmlParse xml_on +// +// +// +// +// CPLD interface module.{BR/} +// For guidance on when to update these revision numbers, +// please refer to the register map documentation accordingly: +//
  • Current version: @.VERSIONING_REGS_REGMAP..CURRENT_VERSION +//
  • Oldest compatible version: @.VERSIONING_REGS_REGMAP..OLDEST_COMPATIBLE_VERSION +//
  • Version last modified: @.VERSIONING_REGS_REGMAP..VERSION_LAST_MODIFIED +// +// +// +// +// +// +// +// +// +// +// +// +// +// +// +// Basic registers containing version and capabilities information. +// +// +// +// Contains the product's signature. +// +// fixed value 0xCB1D1FAC +// +// +// +// +// Read/write register for general software use. +// +// +// +// +// +// +// +// If 1 enables the forwarding of iPass cable present signal to MB CPLD +// using ctrlport requests. On change from 0 to 1 the current status is +// transferred to the MB CPLD via SPI ctrlport request initially. +// +// +// +// +// +// +// +// Registers to control the SPI clock frequency of the CPLD interfaces. +// The resulting clock frequency is calculated by fPRC2(divider+1). +//
    +// Note that the PLL Reference Clock (PRC) is depending on the RF clocks. +//     +// +// +// +// Clock divider used for SPI transactions targeting the MB CPLD.
    +// Minimum required value is 2. +//     +// +// Divider value +// +//     +// +// +// +// Clock divider used for SPI transactions targeting any of the DB CPLDs.
    +// Minimum required value is 5. +//     +// +// Divider value +// +//     +//     +//     +//XmlParse xml_off diff --git a/fpga/usrp3/top/x400/ctrlport_spi_master.v b/fpga/usrp3/top/x400/ctrlport_spi_master.v new file mode 100644 index 000000000..0279dbd29 --- /dev/null +++ b/fpga/usrp3/top/x400/ctrlport_spi_master.v @@ -0,0 +1,243 @@ +// +// Copyright 2021 Ettus Research, A National Instruments Brand +// +// SPDX-License-Identifier: LGPL-3.0-or-later +// +// Module: ctrlport_spi_master +// +// Description: +// +// This block transfers a control port request via SPI. The request format on +// SPI is defined as: +// +// Write request: +// 1'b1 = write, 15 bit address, 32 bit data (MOSI), 8 bit processing gap, +// 5 bit padding, 1 bit ack, 2 bit status +// +// Read request: +// 1'b0 = read, 15 bit address, 8 bit processing gap, 32 bit data (MISO), +// 5 bit padding, 1 bit ack, 2 bit status +// +// Parameters: +// +// CPLD_ADDRESS_WIDTH : Number of address bits to allocate to one CPLD +// register map. +// MB_CPLD_BASE_ADDRESS : Base address for the motherboard CPLD. +// DB_0_CPLD_BASE_ADDRESS : Base address for the first daughterboard CPLD. +// DB_1_CPLD_BASE_ADDRESS : Base address for the second daughterboard CPLD. +// + +`default_nettype none + + +module ctrlport_spi_master #( + parameter CPLD_ADDRESS_WIDTH = 15, + parameter MB_CPLD_BASE_ADDRESS = 20'h8000, + parameter DB_0_CPLD_BASE_ADDRESS = 20'h10000, + parameter DB_1_CPLD_BASE_ADDRESS = 20'h18000 +) ( + input wire ctrlport_clk, + input wire ctrlport_rst, + + // Request + input wire s_ctrlport_req_wr, + input wire s_ctrlport_req_rd, + input wire [19:0] s_ctrlport_req_addr, + input wire [31:0] s_ctrlport_req_data, + + // Response + output reg s_ctrlport_resp_ack = 1'b0, + output reg [ 1:0] s_ctrlport_resp_status = 2'b0, + output reg [31:0] s_ctrlport_resp_data = 32'b0, + + // SPI + output wire [1:0] ss, + output wire sclk, + output wire mosi, + input wire miso, + + // Configuration from register interface + input wire [15:0] mb_clock_divider, + input wire [15:0] db_clock_divider +); + + `include "../../lib/rfnoc/core/ctrlport.vh" + + // Registers / wires for SPI core communication + reg [31:0] set_data = 0; + reg [ 7:0] set_addr = 0; + reg set_stb = 1'b0; + + wire [63:0] readback; + wire readback_stb; + + //--------------------------------------------------------------------------- + // Address calculation + //--------------------------------------------------------------------------- + + // Define configuration for the address calculation + localparam [19:0] BASE_ADDRESS_MASK = {20{1'b1}} << CPLD_ADDRESS_WIDTH; + + // Wires for saving access + wire mb_cpld_access = (s_ctrlport_req_addr & BASE_ADDRESS_MASK) == MB_CPLD_BASE_ADDRESS; + wire db_0_cpld_access = (s_ctrlport_req_addr & BASE_ADDRESS_MASK) == DB_0_CPLD_BASE_ADDRESS; + wire db_1_cpld_access = (s_ctrlport_req_addr & BASE_ADDRESS_MASK) == DB_1_CPLD_BASE_ADDRESS; + + //--------------------------------------------------------------------------- + // FSM to handle transfers + //--------------------------------------------------------------------------- + + localparam IDLE = 3'd0; + localparam SET_DIVIDER = 3'd1; + localparam WRITE_SPI_MSB = 3'd2; + localparam WRITE_SPI_LSB = 3'd3; + localparam CONFIG_TRANSFER = 3'd4; + localparam WAIT_SPI = 3'd5; + + localparam DIVIDER_ADDRESS = 8'd0; + localparam CTRL_ADDRESS = 8'd1; + localparam DATA_UPPER_ADDRESS = 8'd2; + localparam DATA_LOWER_ADDRESS = 8'd3; + + // Combined static configuration consisting of + // 0x4000 = in data bit latched on rising edge of sclk + // - out data launched on falling edge + // - num bits = 64 + localparam CTRL_VALUE = 32'h40000000; + + reg [ 2:0] state = IDLE; + reg [31:0] data_cache; + reg [19:0] address_cache; + reg wr_cache; + reg [15:0] divider; + reg [ 1:0] cs; + + always @ (posedge ctrlport_clk) begin + // Moving reset to the end of the block to reduce fanout of ctrlport_rst + + // Default assignments + s_ctrlport_resp_ack <= 1'b0; + set_stb <= 1'b0; + + case (state) + IDLE: begin + // Requests appear + if (s_ctrlport_req_wr | s_ctrlport_req_rd) begin + // Any CPLD targeted + if (mb_cpld_access | db_0_cpld_access | db_1_cpld_access) begin + state <= CONFIG_TRANSFER; + end + end + + // Select chip select and divider value + if (mb_cpld_access) begin + divider <= mb_clock_divider; + cs <= 2'b00; + end else begin + divider <= db_clock_divider; + if (db_0_cpld_access) begin + cs <= 2'b10; + end else begin + cs <= 2'b01; + end + end + + // Save data and address for further steps + data_cache <= s_ctrlport_req_data; + address_cache <= s_ctrlport_req_addr; + wr_cache <= s_ctrlport_req_wr; + end + + // Set slave select + CONFIG_TRANSFER: begin + state <= SET_DIVIDER; + + set_stb <= 1'b1; + set_addr <= CTRL_ADDRESS; + // Slave select located in LSBs. Inverted against the desired value in + // cs register as 1 represents slave enabled in combination with + // generic IDLE value. + set_data <= CTRL_VALUE | {30'b0, ~cs}; + end + + // Write divider to SPI core + SET_DIVIDER: begin + state <= WRITE_SPI_LSB; + + set_stb <= 1'b1; + set_addr <= DIVIDER_ADDRESS; + set_data <= {16'b0, divider}; + end + + // Write lower bits to SPI core (aligned to MSB) + WRITE_SPI_LSB: begin + state <= WRITE_SPI_MSB; + + set_stb <= 1'b1; + set_addr <= DATA_LOWER_ADDRESS; + set_data <= {data_cache[15:0], 16'bx}; + end + + // Write upper bits, which triggers transaction to start + WRITE_SPI_MSB: begin + state <= WAIT_SPI; + + set_stb <= 1'b1; + set_addr <= DATA_UPPER_ADDRESS; + set_data <= {wr_cache, address_cache[14:0], data_cache[31:16]}; + end + + // Wait for transaction to complete and translate to ctrlport response + WAIT_SPI: begin + s_ctrlport_resp_status <= readback[2] ? readback[1:0] : CTRL_STS_CMDERR; + s_ctrlport_resp_data <= wr_cache ? {CTRLPORT_DATA_W {1'b0}} : readback[39:8]; + s_ctrlport_resp_ack <= readback_stb; + + if (readback_stb) begin + state <= IDLE; + end + end + + default: begin + state <= IDLE; + end + endcase + + // Reset control registers only + if (ctrlport_rst) begin + state <= IDLE; + s_ctrlport_resp_ack <= 1'b0; + set_stb <= 1'b0; + end + end + + //--------------------------------------------------------------------------- + // SPI master + //--------------------------------------------------------------------------- + + simple_spi_core_64bit #( + .BASE (0), + .WIDTH (2), + .CLK_IDLE (0), + .SEN_IDLE (2'b11), + .MAX_BITS (64) + ) simple_spi_core_64bit_i ( + .clock (ctrlport_clk), + .reset (ctrlport_rst), + .set_stb (set_stb), + .set_addr (set_addr), + .set_data (set_data), + .readback (readback), + .readback_stb (readback_stb), + .ready (), + .sen (ss), + .sclk (sclk), + .mosi (mosi), + .miso (miso), + .debug () + ); + +endmodule + + +`default_nettype wire diff --git a/fpga/usrp3/top/x400/dboards/ctrlport_byte_deserializer.v b/fpga/usrp3/top/x400/dboards/ctrlport_byte_deserializer.v new file mode 100644 index 000000000..b8fde0025 --- /dev/null +++ b/fpga/usrp3/top/x400/dboards/ctrlport_byte_deserializer.v @@ -0,0 +1,186 @@ +// +// Copyright 2021 Ettus Research, a National Instruments Brand +// +// SPDX-License-Identifier: LGPL-3.0-or-later +// +// Module: ctrlport_byte_deserializer +// +// Description: +// Slave interface of CtrlPort interface serialized as byte stream. +// See description in ctrlport_byte_serializer module for more details. +// + +`default_nettype none + +module ctrlport_byte_deserializer ( + input wire ctrlport_clk, + input wire ctrlport_rst, + + // Request + output wire m_ctrlport_req_wr, + output wire m_ctrlport_req_rd, + output wire [19:0] m_ctrlport_req_addr, + output wire [31:0] m_ctrlport_req_data, + + // Response + input wire m_ctrlport_resp_ack, + input wire [ 1:0] m_ctrlport_resp_status, + input wire [31:0] m_ctrlport_resp_data, + + // byte interface + input wire [ 7:0] bytestream_data_in, + input wire bytestream_valid_in, + input wire bytestream_direction, + output reg [ 7:0] bytestream_data_out = 8'b0, + output reg bytestream_valid_out = 1'b0, + output reg bytestream_output_enable = 1'b0 +); + + `include "../../../lib/rfnoc/core/ctrlport.vh" + + //--------------------------------------------------------------- + // transfer constants + //--------------------------------------------------------------- + // derived from transaction specification + localparam NUM_BYTES_RX_READ = 2; + localparam NUM_BYTES_TX_READ = 5; + localparam NUM_BYTES_RX_WRITE = 6; + localparam NUM_BYTES_TX_WRITE = 1; + + localparam SPI_TRANSFER_ADDRESS_WIDTH = 15; + + //---------------------------------------------------------- + // handle transfer + //---------------------------------------------------------- + localparam INIT_RX = 2'd0; + localparam RECEIVE = 2'd1; + localparam WAIT_RESPONSE = 2'd2; + localparam SENDING = 2'd3; + + // internal registers + reg [ 1:0] state = INIT_RX; + reg [NUM_BYTES_RX_WRITE*8-1:0] request_cache = {NUM_BYTES_RX_WRITE*8 {1'b0}}; + reg [ NUM_BYTES_TX_READ*8-1:0] response_cache = {NUM_BYTES_TX_READ*8 {1'b0}}; + reg [ 2:0] byte_counter = 3'b0; + reg transfer_complete = 1'b0; + reg write_transfer = 1'b0; + + // input registers to relax input timing + reg [7:0] bytestream_data_in_reg = 8'b0; + reg bytestream_valid_in_reg = 1'b0; + reg bytestream_direction_reg = 1'b0; + always @ (posedge ctrlport_clk) begin + bytestream_data_in_reg <= bytestream_data_in; + bytestream_valid_in_reg <= bytestream_valid_in; + bytestream_direction_reg <= bytestream_direction; + end + + // state machine + always @ (posedge ctrlport_clk) begin + if (ctrlport_rst) begin + state <= INIT_RX; + byte_counter <= 3'b0; + transfer_complete <= 1'b0; + bytestream_output_enable <= 1'b0; + + end else begin + // default assignments + transfer_complete <= 1'b0; + // direction defined by master + bytestream_output_enable <= bytestream_direction; + bytestream_valid_out <= 1'b0; + + case (state) + // additional cycle for switching to make sure valid signal is driven + // from master when being in RECEIVE state + INIT_RX: begin + byte_counter <= 3'b0; + if (bytestream_direction_reg == 0) begin + state <= RECEIVE; + end + end + + // wait for reception of request from master + RECEIVE: begin + if (bytestream_valid_in_reg) begin + byte_counter <= byte_counter + 1'b1; + request_cache <= {request_cache[NUM_BYTES_RX_WRITE*8-9:0], bytestream_data_in_reg}; + + // capture write or read + if (byte_counter == 0) begin + write_transfer <= bytestream_data_in_reg[7]; + end + + // wait until request completes + if ((write_transfer && byte_counter == NUM_BYTES_RX_WRITE-1) || + (~write_transfer && byte_counter == NUM_BYTES_RX_READ-1)) begin + transfer_complete <= 1'b1; + state <= WAIT_RESPONSE; + end + end + + // Workaround for missing pull down resistor: + // Use pull up and schmitt trigger to detect FPGA reload by line going high unexpectedly + if (bytestream_direction_reg == 1) begin + state <= INIT_RX; + end + end + + WAIT_RESPONSE: begin + byte_counter <= 3'b0; + if (m_ctrlport_resp_ack) begin + state <= SENDING; + + if (write_transfer) begin + response_cache <= {5'b0, 1'b1, m_ctrlport_resp_status, 32'b0}; + end else begin + response_cache <= {m_ctrlport_resp_data, 5'b0, 1'b1, m_ctrlport_resp_status}; + end + end + + //abort by host + if (bytestream_direction_reg == 0) begin + state <= INIT_RX; + end + end + + SENDING: begin + bytestream_valid_out <= 1'b1; + bytestream_data_out <= response_cache[NUM_BYTES_TX_READ*8-8+:8]; + response_cache <= {response_cache[NUM_BYTES_TX_READ*8-9:0], 8'b0}; + byte_counter <= byte_counter + 1'b1; + + // wait until request completes + if ((write_transfer && byte_counter == NUM_BYTES_TX_WRITE-1) || + (~write_transfer && byte_counter == NUM_BYTES_TX_READ-1)) begin + state <= INIT_RX; + end + + //abort by host + if (bytestream_direction_reg == 0) begin + state <= INIT_RX; + end + end + + default: begin + state <= INIT_RX; + end + endcase + end + end + + //---------------------------------------------------------- + // assign request to ctrlport + //---------------------------------------------------------- + assign m_ctrlport_req_wr = write_transfer & transfer_complete; + assign m_ctrlport_req_rd = ~write_transfer & transfer_complete; + assign m_ctrlport_req_data = request_cache[0+:CTRLPORT_DATA_W]; + assign m_ctrlport_req_addr = (write_transfer) ? + // Skipping data in LSBs to get to the address for writes. + {5'b0, request_cache[CTRLPORT_DATA_W+:SPI_TRANSFER_ADDRESS_WIDTH]} : + // Full request = address of 2 bytes in LSBs. + {5'b0, request_cache[0+:SPI_TRANSFER_ADDRESS_WIDTH]}; + +endmodule + +`default_nettype wire diff --git a/fpga/usrp3/top/x400/dboards/ctrlport_byte_serializer.v b/fpga/usrp3/top/x400/dboards/ctrlport_byte_serializer.v new file mode 100644 index 000000000..3bb6df3c6 --- /dev/null +++ b/fpga/usrp3/top/x400/dboards/ctrlport_byte_serializer.v @@ -0,0 +1,228 @@ +// +// Copyright 2021 Ettus Research, a National Instruments Brand +// +// SPDX-License-Identifier: LGPL-3.0-or-later +// +// Module: ctrlport_byte_serializer +// +// Description: +// Serializes CtrlPort requests into a byte stream. +// +// The serialized data is similar to an AXI4-Streaming interface with one byte +// per clock cycle and a valid signal. Direction controls the current transmission +// direction. 0 = Master to Slave, 1 = Slave to Master, where this module is the +// master. Direction is always present in direction master to slave where the +// other signals valid and data can be shared on a tri-state bus. +// +// The transmission is defined as described below. The bytes are transmitted MSB +// first. +// Write request: +// 1'b1 = write, 15 bit address, 32 bit data (MOSI) = 6 bytes request +// 5 bit padding, 1 bit ack, 2 bit status = 1 byte response +// Read request: +// 1'b0 = read, 15 bit address = 2 bytes request +// 32 bit data, 5 bit padding, 1 bit ack, 2 bit status = 5 bytes response +// +// When sharing valid and data signal lines between master and slave the +// timing is defined as: +// +// clk __/--\__/--\__/--\__/--\__/--\__/--\__/--\__/--\__/--\__/--\__/--\__ +// direction _______________________/-----------------\____________ +// master output enable _____/-----------------\______________________________ +// slave output enable _____________________________/-----------------\______ +// valid & data zzzzz| Master driven | zzz | Slave driven | zzzzz +// transaction <--- Request ---><--- Response ---> +// +// The slave should use the direction signal to derive it's own output enable +// leaving the master the option to terminate the transaction. +// On switch from slave to master the direction has to be changed at least +// one clock cycle before enabling the master output enable to avoid driving the +// bus from two sources. +// + +`default_nettype none + +module ctrlport_byte_serializer ( + // Clock and Reset + input wire ctrlport_clk, + input wire ctrlport_rst, + + // Request + input wire s_ctrlport_req_wr, + input wire s_ctrlport_req_rd, + input wire [19:0] s_ctrlport_req_addr, + input wire [31:0] s_ctrlport_req_data, + + // Response + output reg s_ctrlport_resp_ack = 1'b0, + output reg [ 1:0] s_ctrlport_resp_status = 2'b0, + output reg [31:0] s_ctrlport_resp_data = 32'b0, + + // GPIO interface + input wire [ 7:0] bytestream_data_in, + input wire bytestream_valid_in, + output reg [ 7:0] bytestream_data_out = 8'b0, + output reg bytestream_valid_out = 1'b0, + output reg bytestream_direction = 1'b0, + output reg bytestream_output_enable = 1'b1 +); + + `include "../../../lib/rfnoc/core/ctrlport.vh" + + //--------------------------------------------------------------- + // transfer constants + //--------------------------------------------------------------- + // derived from the transaction format (see description above) + localparam NUM_BYTES_TX_READ = 2; + localparam NUM_BYTES_RX_READ = 5; + localparam NUM_BYTES_TX_WRITE = 6; + localparam NUM_BYTES_RX_WRITE = 1; + + localparam TIMEOUT_COUNTER_WIDTH = 6; + + //---------------------------------------------------------- + // FSM to handle transfers + //---------------------------------------------------------- + localparam IDLE = 3'd0; + localparam SENDING = 3'd1; + localparam INIT_RX = 3'd2; + localparam DIR_SWITCH = 3'd3; + localparam DIR_SWITCH_DLY = 3'd4; + localparam RECEIVING = 3'd5; + localparam ACK = 3'd6; + localparam TIMEOUT = 3'd7; + + // input registers to relax input timing + reg [7:0] bytestream_data_in_reg = 8'b0; + reg bytestream_valid_in_reg = 1'b0; + always @ (posedge ctrlport_clk) begin + bytestream_data_in_reg <= bytestream_data_in; + bytestream_valid_in_reg <= bytestream_valid_in; + end + + // internal registers + reg [ 2:0] state = IDLE; + reg [NUM_BYTES_TX_WRITE*8-1:0] request_cache = {NUM_BYTES_TX_WRITE*8{1'b0}}; + reg [ NUM_BYTES_RX_READ*8-1:0] response_cache = {NUM_BYTES_RX_READ*8{1'b0}}; + reg [ 2:0] byte_counter = 3'b0; + reg write_transfer = 1'b0; + reg [TIMEOUT_COUNTER_WIDTH-1:0] timeout_counter = {TIMEOUT_COUNTER_WIDTH {1'b0}}; + + always @ (posedge ctrlport_clk) begin + if (ctrlport_rst) begin + state <= IDLE; + + bytestream_valid_out <= 1'b0; + byte_counter <= 3'b0; + bytestream_direction <= 1'b0; + bytestream_output_enable <= 1'b1; + + s_ctrlport_resp_ack <= 1'b0; + end else begin + case (state) + IDLE: begin + // reset values from previous states + s_ctrlport_resp_ack <= 1'b0; + bytestream_valid_out <= 1'b0; + bytestream_output_enable <= 1'b1; + byte_counter <= 3'b0; + timeout_counter <= {TIMEOUT_COUNTER_WIDTH {1'b0}}; + + // start transmission on read or write + if (s_ctrlport_req_rd || s_ctrlport_req_wr) begin + state <= SENDING; + request_cache <= {s_ctrlport_req_wr, s_ctrlport_req_addr[14:0], s_ctrlport_req_data}; + write_transfer <= s_ctrlport_req_wr; + end + end + + // send as many bytes as required for read / write + SENDING: begin + bytestream_data_out <= request_cache[NUM_BYTES_TX_WRITE*8-8+:8]; + request_cache <= {request_cache[NUM_BYTES_TX_WRITE*8-9:0], 8'b0}; + bytestream_valid_out <= 1'b1; + byte_counter <= byte_counter + 1'b1; + + if ((write_transfer && byte_counter == NUM_BYTES_TX_WRITE-1) || + (~write_transfer && byte_counter == NUM_BYTES_TX_READ-1)) begin + state <= INIT_RX; + end + end + + // first cycle for switching to make sure valid signal is driven + // from slave when being in RECEIVING state + INIT_RX: begin + state <= DIR_SWITCH; + + bytestream_direction <= 1'b1; + bytestream_output_enable <= 1'b0; + bytestream_valid_out <= 1'b0; + + byte_counter <= 3'b0; + end + + // second switching cycle to let CPLD load the lines based on direction + DIR_SWITCH: begin + state <= DIR_SWITCH_DLY; + end + + // third switching cycle to compensate data input register + DIR_SWITCH_DLY: begin + state <= RECEIVING; + end + + // wait for response to be received + // immediately change direction after successful reception to have one + // clock cycle of pause to avoid double driving the bus + RECEIVING: begin + timeout_counter <= timeout_counter + 1; + + if (bytestream_valid_in_reg) begin + byte_counter <= byte_counter + 1'b1; + response_cache = {response_cache[NUM_BYTES_RX_READ*8-9:0], bytestream_data_in_reg}; + + if ((write_transfer && byte_counter == NUM_BYTES_RX_WRITE-1) || + (~write_transfer && byte_counter == NUM_BYTES_RX_READ-1)) begin + state <= ACK; + bytestream_direction <= 1'b0; + end + end + + if (timeout_counter == {TIMEOUT_COUNTER_WIDTH {1'b1}}) begin + state <= TIMEOUT; + bytestream_direction <= 1'b0; + end + end + + // issue ctrlport response + ACK: begin + state <= IDLE; + + s_ctrlport_resp_ack <= 1'b1; + // status based on received ack + s_ctrlport_resp_status <= response_cache[2] ? response_cache[1:0] : CTRL_STS_CMDERR; + if (write_transfer) begin + s_ctrlport_resp_data <= 32'b0; + end else begin + s_ctrlport_resp_data <= response_cache[39:8]; + end + end + + TIMEOUT: begin + state <= IDLE; + + s_ctrlport_resp_ack <= 1'b1; + s_ctrlport_resp_status <= CTRL_STS_CMDERR; + s_ctrlport_resp_data <= 32'b0; + end + + default: begin + state <= IDLE; + end + endcase + end + end + +endmodule + +`default_nettype wire diff --git a/fpga/usrp3/top/x400/dboards/db_gpio_interface.v b/fpga/usrp3/top/x400/dboards/db_gpio_interface.v new file mode 100644 index 000000000..1e8cd44ee --- /dev/null +++ b/fpga/usrp3/top/x400/dboards/db_gpio_interface.v @@ -0,0 +1,323 @@ +// +// Copyright 2021 Ettus Research, a National Instruments Brand +// +// SPDX-License-Identifier: LGPL-3.0-or-later +// +// Module: db_gpio_interface +// +// Description: +// Interface for GPIO interface towards daughterboards. +// +// A ControlPort interface is serialized into bytes along with a valid signal. +// The ControlPort supports write requests only. Byte enables are not supported. +// There is support for timed commands. +// Furthermore there are 4 state wires towards the DB. Ensure an appropriate +// hold time on the states as the transmission happens in pll_ref_clk, which is +// slower than radio_clk. Pulses of e.g. just a single clock cycle may not get +// transferred to the DB. +// +// The 20 available GPIO lines are assigned with +// - 5x empty +// - bytestream direction +// - bytestream valid +// - bytestream data (8 bits) +// - 1x empty +// - db_state (4 bits) +// + +`default_nettype none + +module db_gpio_interface ( + // Clocks and reset + input wire radio_clk, + input wire pll_ref_clk, + + // DB state lines (domain: radio_clk) + input wire [ 3:0] db_state, + + // time interfaces (domain: radio_clk) + input wire [63:0] radio_time, + input wire radio_time_stb, + input wire [ 3:0] time_ignore_bits, + + // Request (domain: radio_clk) + input wire ctrlport_rst, + input wire s_ctrlport_req_wr, + input wire s_ctrlport_req_rd, + input wire [19:0] s_ctrlport_req_addr, + input wire [31:0] s_ctrlport_req_data, + input wire [ 3:0] s_ctrlport_req_byte_en, + input wire s_ctrlport_req_has_time, + input wire [63:0] s_ctrlport_req_time, + + // Response (domain: radio_clk) + output wire s_ctrlport_resp_ack, + output wire [ 1:0] s_ctrlport_resp_status, + output wire [31:0] s_ctrlport_resp_data, + + // GPIO interface (domain: pll_ref_clk) + input wire [19:0] gpio_in, + output wire [19:0] gpio_out, + output wire [19:0] gpio_out_en, + + // Version (Constant) + output wire [95:0] version_info +); + + `include "../regmap/versioning_regs_regmap_utils.vh" + `include "../regmap/versioning_utils.vh" + + //---------------------------------------------------------------------------- + // Timed command processing + //---------------------------------------------------------------------------- + wire [19:0] ctrlport_timed_req_addr; + wire [31:0] ctrlport_timed_req_data; + wire ctrlport_timed_req_rd; + wire ctrlport_timed_req_wr; + wire ctrlport_timed_resp_ack; + reg [31:0] ctrlport_timed_resp_data = 0; + reg [ 1:0] ctrlport_timed_resp_status = 0; + + ctrlport_timer #( + .EXEC_LATE_CMDS(1) + ) ctrlport_timer_i ( + .clk (radio_clk), + .rst (ctrlport_rst), + .time_now (radio_time), + .time_now_stb (radio_time_stb), + .time_ignore_bits (time_ignore_bits), + .s_ctrlport_req_wr (s_ctrlport_req_wr), + .s_ctrlport_req_rd (s_ctrlport_req_rd), + .s_ctrlport_req_addr (s_ctrlport_req_addr), + .s_ctrlport_req_data (s_ctrlport_req_data), + .s_ctrlport_req_byte_en (s_ctrlport_req_byte_en), + .s_ctrlport_req_has_time (s_ctrlport_req_has_time), + .s_ctrlport_req_time (s_ctrlport_req_time), + .s_ctrlport_resp_ack (s_ctrlport_resp_ack), + .s_ctrlport_resp_status (s_ctrlport_resp_status), + .s_ctrlport_resp_data (s_ctrlport_resp_data), + .m_ctrlport_req_wr (ctrlport_timed_req_wr), + .m_ctrlport_req_rd (ctrlport_timed_req_rd), + .m_ctrlport_req_addr (ctrlport_timed_req_addr), + .m_ctrlport_req_data (ctrlport_timed_req_data), + .m_ctrlport_req_byte_en (), + .m_ctrlport_resp_ack (ctrlport_timed_resp_ack), + .m_ctrlport_resp_status (ctrlport_timed_resp_status), + .m_ctrlport_resp_data (ctrlport_timed_resp_data) + ); + + //---------------------------------------------------------------------------- + // Clock domain crossing (radio_clk -> pll_ref_clk) + //---------------------------------------------------------------------------- + // Radio_clk is derived from pll_ref_clk by an integer multiplier and + // originate from the same PLL. + // Therefore the clock crossing can be achieved by using simple registers. + // Static timing analysis will be able to meet setup and hold requirements on + // them. + + // holding read and write flags for multiple radio_clk cycles + reg ctrlport_timed_req_wr_hold = 1'b0; + reg ctrlport_timed_req_rd_hold = 1'b0; + + reg [19:0] ctrlport_req_addr_prc = 20'b0; + reg [31:0] ctrlport_req_data_prc = 32'b0; + reg ctrlport_req_rd_prc = 1'b0; + reg ctrlport_req_wr_prc = 1'b0; + + wire ctrlport_resp_ack_prc; + wire [31:0] ctrlport_resp_data_prc; + wire [ 1:0] ctrlport_resp_status_prc; + + reg ctrlport_req_rd_fall = 1'b0; + reg ctrlport_req_wr_fall = 1'b0; + reg [31:0] ctrlport_resp_data_fall = 32'b0; + reg [ 1:0] ctrlport_resp_status_fall = 2'b0; + reg ctrlport_resp_ack_fall = 1'b0; + + // Retime signals to falling edge of radio_clk. + // Because radio_clk is more heavily loaded than pll_ref_clk, it arrives at + // the FF's later, which leads to hold time violations when moving signals + // from pll_ref_clk to radio_clk. By sampling on the falling edge of + // radio_clk, we provide (nominally) half a radio_clk period of hold, while + // reducing setup time by half. The late arrival of radio_clk adds back some + // of the lost setup margin. + always @(negedge radio_clk) begin + ctrlport_req_rd_fall <= ctrlport_req_rd_prc; + ctrlport_req_wr_fall <= ctrlport_req_wr_prc; + ctrlport_resp_ack_fall <= ctrlport_resp_ack_prc; + ctrlport_resp_status_fall <= ctrlport_resp_status_prc; + ctrlport_resp_data_fall <= ctrlport_resp_data_prc; + end + + always @(posedge radio_clk) begin + if (ctrlport_req_wr_fall) begin + ctrlport_timed_req_wr_hold <= 1'b0; + end else if (ctrlport_timed_req_wr) begin + ctrlport_timed_req_wr_hold <= 1'b1; + end + if (ctrlport_req_rd_fall) begin + ctrlport_timed_req_rd_hold <= 1'b0; + end else if (ctrlport_timed_req_rd) begin + ctrlport_timed_req_rd_hold <= 1'b1; + end + + // capture request address and data + if (ctrlport_timed_req_wr || ctrlport_timed_req_rd) begin + ctrlport_req_addr_prc <= ctrlport_timed_req_addr; + ctrlport_req_data_prc <= ctrlport_timed_req_data; + end + end + + // capture extended flags in pll_ref_clk domain + always @(posedge pll_ref_clk) begin + ctrlport_req_wr_prc <= ctrlport_timed_req_wr_hold; + ctrlport_req_rd_prc <= ctrlport_timed_req_rd_hold; + end + + // search for rising edge in response + reg [1:0] ctrlport_timed_ack_reg = 2'b0; + always @(posedge radio_clk) begin + ctrlport_timed_ack_reg = {ctrlport_timed_ack_reg[0], ctrlport_resp_ack_fall}; + end + assign ctrlport_timed_resp_ack = ctrlport_timed_ack_reg[0] & ~ctrlport_timed_ack_reg[1]; + + // capture response data + always @(posedge radio_clk) begin + if (ctrlport_resp_ack_fall) begin + ctrlport_timed_resp_status <= ctrlport_resp_status_fall; + ctrlport_timed_resp_data <= ctrlport_resp_data_fall; + end + end + + // transfer state lines + reg [3:0] db_state_prc = 4'b0; + reg [3:0] db_state_prc_fe = 4'b0; + always @(posedge pll_ref_clk) begin + db_state_prc <= db_state; + end + always @(negedge pll_ref_clk) begin + db_state_prc_fe <= db_state_prc; + end + + // transfer reset + reg ctrlport_rst_hold = 1'b0; + reg ctrlport_rst_prc = 1'b0; + reg ctrlport_rst_fall = 1'b0; + always @(posedge radio_clk) begin + if (ctrlport_rst) begin + ctrlport_rst_hold <= 1'b1; + end else if (ctrlport_rst_fall) begin + ctrlport_rst_hold <= 1'b0; + end + end + always @(posedge pll_ref_clk) begin + ctrlport_rst_prc <= ctrlport_rst_hold; + end + always @(negedge radio_clk) begin + ctrlport_rst_fall <= ctrlport_rst_prc; + end + + + //---------------------------------------------------------------------------- + // Ctrlport serializer + //---------------------------------------------------------------------------- + wire [7:0] bytestream_data_in; + wire [7:0] bytestream_data_out; + wire bytestream_direction; + wire bytestream_output_enable; + wire bytestream_valid_in; + wire bytestream_valid_out; + + ctrlport_byte_serializer serializer_i ( + .ctrlport_clk (pll_ref_clk), + .ctrlport_rst (ctrlport_rst_prc), + .s_ctrlport_req_wr (ctrlport_req_wr_prc), + .s_ctrlport_req_rd (ctrlport_req_rd_prc), + .s_ctrlport_req_addr (ctrlport_req_addr_prc), + .s_ctrlport_req_data (ctrlport_req_data_prc), + .s_ctrlport_resp_ack (ctrlport_resp_ack_prc), + .s_ctrlport_resp_status (ctrlport_resp_status_prc), + .s_ctrlport_resp_data (ctrlport_resp_data_prc), + .bytestream_data_in (bytestream_data_in), + .bytestream_valid_in (bytestream_valid_in), + .bytestream_data_out (bytestream_data_out), + .bytestream_valid_out (bytestream_valid_out), + .bytestream_direction (bytestream_direction), + .bytestream_output_enable (bytestream_output_enable) + ); + + // IOB registers to drive data on the falling edge + reg [7:0] bytestream_data_out_fe; + reg bytestream_direction_fe; + reg bytestream_output_enable_fe; + reg bytestream_valid_out_fe; + + // Signals are shifted into a falling edge domain to help meet + // hold requirements at CPLD + always @(negedge pll_ref_clk) begin + if (ctrlport_rst_prc) begin + bytestream_data_out_fe <= 8'b0; + bytestream_valid_out_fe <= 1'b0; + bytestream_direction_fe <= 1'b0; + bytestream_output_enable_fe <= 1'b1; + end else begin + bytestream_data_out_fe <= bytestream_data_out; + bytestream_valid_out_fe <= bytestream_valid_out; + bytestream_direction_fe <= bytestream_direction; + bytestream_output_enable_fe <= bytestream_output_enable; + end + end + + //---------------------------------------------------------------------------- + // wire assignment + //---------------------------------------------------------------------------- + // 5 unused, 10 used, 1 unused and 4 used signals + assign gpio_out = {5'b0, bytestream_direction_fe, bytestream_valid_out_fe, bytestream_data_out_fe, 1'b0, db_state_prc_fe}; + assign gpio_out_en = {5'b0, 1'b1, {9 {bytestream_output_enable_fe}}, 1'b0, {4 {1'b1}} }; + + assign bytestream_valid_in = gpio_in[13]; + assign bytestream_data_in = gpio_in[12:5]; + + //---------------------------------------------------------------------------- + // version_info + //---------------------------------------------------------------------------- + + // Version metadata, constants come from auto-generated versioning_regs_regmap_utils.vh + assign version_info = build_component_versions( + DB_GPIO_IFC_VERSION_LAST_MODIFIED_TIME, + build_version( + DB_GPIO_IFC_OLDEST_COMPATIBLE_VERSION_MAJOR, + DB_GPIO_IFC_OLDEST_COMPATIBLE_VERSION_MINOR, + DB_GPIO_IFC_OLDEST_COMPATIBLE_VERSION_BUILD), + build_version( + DB_GPIO_IFC_CURRENT_VERSION_MAJOR, + DB_GPIO_IFC_CURRENT_VERSION_MINOR, + DB_GPIO_IFC_CURRENT_VERSION_BUILD)); + +endmodule + +`default_nettype wire + +//XmlParse xml_on +// +// +// +// +// Daughterboard GPIO interface.{BR/} +// For guidance on when to update these revision numbers, +// please refer to the register map documentation accordingly: +//
  • Current version: @.VERSIONING_REGS_REGMAP..CURRENT_VERSION +//
  • Oldest compatible version: @.VERSIONING_REGS_REGMAP..OLDEST_COMPATIBLE_VERSION +//
  • Version last modified: @.VERSIONING_REGS_REGMAP..VERSION_LAST_MODIFIED +// +// +// +// +// +// +// +// +// +// +// +//XmlParse xml_off diff --git a/fpga/usrp3/top/x400/dboards/db_gpio_reordering.v b/fpga/usrp3/top/x400/dboards/db_gpio_reordering.v new file mode 100644 index 000000000..f24a3f3d9 --- /dev/null +++ b/fpga/usrp3/top/x400/dboards/db_gpio_reordering.v @@ -0,0 +1,108 @@ +// +// Copyright 2021 Ettus Research, a National Instruments Brand +// +// SPDX-License-Identifier: LGPL-3.0-or-later +// +// Module: db_gpio_reordering +// +// Description: +// Reorders the GPIO wires towards the DB CPLDs in a common way for DB 0 and 1. +// +// The digital daughterboard connector has 120 pins [A-F][1-20]. +// The numbering on the motherboard traces do not match for daughterboard 0 and 1. +// This module orders the FPGA outputs MSB first and connects it to the DB +// connection with increasing letter and increasing number. +// For DB 0 this results in: +// FPGA Bit 19 = A7 (trace: DB0/1_GPIO[19]) +// FPGA Bit 18 = A8 (trace: DB0/1_GPIO[17]) +// ... +// FPGA Bit 0 = C19 (trace: DB0/1_GPIO[12]) +// This enables usages of the same daughterboard CPLD image on both connectors. +// + +`default_nettype none + +module db_gpio_reordering ( + // 20 bit internal interface + output wire [19:0] db0_gpio_in_int, + input wire [19:0] db0_gpio_out_int, + input wire [19:0] db0_gpio_out_en_int, + output wire [19:0] db1_gpio_in_int, + input wire [19:0] db1_gpio_out_int, + input wire [19:0] db1_gpio_out_en_int, + + // 20 bit external interface + input wire [19:0] db0_gpio_in_ext, + output wire [19:0] db0_gpio_out_ext, + output wire [19:0] db0_gpio_out_en_ext, + input wire [19:0] db1_gpio_in_ext, + output wire [19:0] db1_gpio_out_ext, + output wire [19:0] db1_gpio_out_en_ext +); + + //port indexes + localparam ENTRY_BITWIDTH = 5; + localparam NUM_ENTRIES = 20; + localparam [ENTRY_BITWIDTH*NUM_ENTRIES-1:0] PORT0_MAPPING = { + 5'd 19, + 5'd 17, + 5'd 0, + 5'd 14, + 5'd 15, + 5'd 10, + 5'd 4, + 5'd 5, + 5'd 16, + 5'd 18, + 5'd 8, + 5'd 6, + 5'd 1, + 5'd 9, + 5'd 2, + 5'd 3, + 5'd 11, + 5'd 7, + 5'd 13, + 5'd 12 }; + localparam [ENTRY_BITWIDTH*NUM_ENTRIES-1:0] PORT1_MAPPING = { + 5'd 10, + 5'd 6, + 5'd 7, + 5'd 2, + 5'd 3, + 5'd 0, + 5'd 1, + 5'd 4, + 5'd 8, + 5'd 9, + 5'd 11, + 5'd 5, + 5'd 13, + 5'd 12, + 5'd 15, + 5'd 14, + 5'd 19, + 5'd 18, + 5'd 17, + 5'd 16 }; + + // reordering assignments + generate + genvar i; + for (i=0; i + + X4XX_FPGA + + + + + + + \ No newline at end of file diff --git a/fpga/usrp3/top/x400/doc/X4XX_FPGA_left.htm b/fpga/usrp3/top/x400/doc/X4XX_FPGA_left.htm new file mode 100644 index 000000000..d643a7346 --- /dev/null +++ b/fpga/usrp3/top/x400/doc/X4XX_FPGA_left.htm @@ -0,0 +1,684 @@ + + + + + + + +
    +

    + + + X4XX_FPGA +

    +
    +

    + + + P5 Content +

    +
    +
    +

    + + + ports +

    +
    +

    ARM_M_AXI_HPM0

    +

    ARM_S_AXI_HPC0

    +

    ARM_S_AXI_HPC1

    +

    ARM_SPI1_CS3

    +
    +
    +

    + + + AXI_HPM0_REGMAP +

    +

    + + + COMMON +

    +
    +

    RPU

    +

    JTAG_ENGINE

    +

    WR

    +

    MPM_ENDPOINT

    +

    CORE_REGS

    +

    INT_ETH_DMA

    +

    INT_ETH_REGS

    +

    RFDC

    +

    RFDC_REGS

    +
    +

    + + + UHD_ONLY +

    +
    +

    QSFP_0_0

    +

    QSFP_0_1

    +

    QSFP_0_2

    +

    QSFP_0_3

    +

    QSFP_1_0

    +

    QSFP_1_1

    +

    QSFP_1_2

    +

    QSFP_1_3

    +
    +
    +

    + + + MB_CPLD_PS_REGMAP +

    +

    + + + MB_CPLD_PS_WINDOWS +

    +
    +

    PS_REGISTERS

    +

    RECONFIG

    +

    POWER_REGISTERS

    +
    +

    + + + PS_SPI_ENDPOINTS +

    +
    +

    enum SPI_ENDPOINT

    +
    +
    +

    + + + CMAC_REGMAP +

    +

    + + + XILINX_CMAC_REGISTERS +

    +
    +
    +
    +

    + + + CONSTANTS_REGMAP +

    +

    + + + CONSTANTS_GROUP +

    +
    +

    enum CONSTANTS_ENUM

    +
    +
    +

    + + + CORE_REGS_REGMAP +

    +

    + + + CORE_REGS +

    +
    +

    GLOBAL_REGS

    +

    VERSIONING_REGS

    +

    TIMEKEEPER

    +

    DIO

    +
    +
    +

    + + + CPLD_INTERFACE_REGMAP +

    +

    + + + CPLD_INTERFACE_REGS +

    +
    +

    SIGNATURE_REGISTER

    +

    SCRATCH_REGISTER

    +
    +

    + + + CPLD_SPI_CONTROL_REGS +

    +
    +

    MOTHERBOARD_CPLD_DIVIDER

    +

    DAUGHTERBOARD_CPLD_DIVIDER

    +
    +

    + + + IPASS_REGS +

    +
    +

    IPASS_CONTROL

    +
    +
    +

    + + + DIO_REGMAP +

    +

    + + + DIO_REGS +

    +
    +

    DIO_MASTER_REGISTER

    +

    DIO_DIRECTION_REGISTER

    +

    DIO_INPUT_REGISTER

    +

    DIO_OUTPUT_REGISTER

    +
    +
    +

    + + + DMA_REGMAP +

    +

    + + + XILINX_DMA_REGISTERS +

    +
    +
    +
    +

    + + + ETH_DMA_CTRL_REGMAP +

    +

    + + + ETH_DMA_CTRL +

    +
    +

    AXI_DMA_CTRL

    +

    ETH_IO_CTRL

    +
    +
    +

    + + + GLOBAL_REGS_REGMAP +

    +

    + + + GLOBAL_REGS +

    +
    +

    COMPAT_NUM_REG

    +

    DATESTAMP_REG

    +

    GIT_HASH_REG

    +

    SCRATCH_REG

    +

    DEVICE_ID_REG

    +

    RFNOC_INFO_REG

    +

    CLOCK_CTRL_REG

    +

    PPS_CTRL_REG

    +

    CHDR_CLK_RATE_REG

    +

    CHDR_CLK_COUNT_REG

    +

    GPS_CTRL_REG

    +

    GPS_STATUS_REG

    +

    DBOARD_CTRL_REG

    +

    DBOARD_STATUS_REG

    +

    NUM_TIMEKEEPERS_REG

    +

    SERIAL_NUM_LOW_REG

    +

    SERIAL_NUM_HIGH_REG

    +

    MFG_TEST_CTRL_REG

    +

    MFG_TEST_STATUS_REG

    +

    QSFP_PORT_0_0_INFO_REG

    +

    QSFP_PORT_0_1_INFO_REG

    +

    QSFP_PORT_0_2_INFO_REG

    +

    QSFP_PORT_0_3_INFO_REG

    +

    QSFP_PORT_1_0_INFO_REG

    +

    QSFP_PORT_1_1_INFO_REG

    +

    QSFP_PORT_1_2_INFO_REG

    +

    QSFP_PORT_1_3_INFO_REG

    +
    +
    +

    + + + JTAG_REGMAP +

    +

    + + + JTAG_REGS +

    +
    +

    TX_DATA

    +

    STB_DATA

    +

    CONTROL

    +

    RX_DATA

    +
    +
    +

    + + + MB_CPLD_PL_REGMAP +

    +

    + + + MB_CPLD_PL_WINDOWS +

    +
    +

    PL_REGISTERS

    +

    JTAG_DB0

    +

    JTAG_DB1

    +
    +
    +

    + + + NIXGE_REGMAP +

    +

    + + + XGE_MAC_REGS +

    +
    +

    PORT_INFO

    +

    MAC_CTRL_STATUS

    +

    MAC_PHY_STATUS

    +

    MAC_LED_CTL

    +

    ETH_MDIO_BASE

    +

    AURORA_OVERRUNS

    +

    AURORA_CHECKSUM_ERRORS

    +

    AURORA_BIST_CHECKER_SAMPS

    +

    AURORA_BIST_CHECKER_ERRORS

    +
    +

    + + + XGE_MAC_WINDOW +

    +
    +

    XGE_MAC

    +
    +
    +

    + + + PL_CPLD_BASE_REGMAP +

    +

    + + + MB_CPLD_LED_REGS +

    +
    +

    LED_REGISTER

    +
    +

    + + + PL_CMI_REGS +

    +
    +

    CABLE_PRESENT_REG

    +
    +

    + + + PL_CPLD_BASE_REGS +

    +
    +

    SIGNATURE_REGISTER

    +

    REVISION_REGISTER

    +

    OLDEST_COMPATIBLE_REVISION_REGISTER

    +

    SCRATCH_REGISTER

    +

    GIT_HASH_REGISTER

    +
    +
    +

    + + + PL_CPLD_REGMAP +

    +

    + + + PL_CPLD_WINDOWS +

    +
    +

    BASE

    +

    MB_CPLD

    +

    DB0_CPLD

    +

    DB1_CPLD

    +
    +
    +

    + + + PL_DMA_MASTER_REGMAP +

    +

    + + + HPC0_DMA +

    +
    +

    AXI_HPC0_WINDOW

    +
    +

    + + + HPC1_DMA +

    +
    +

    AXI_HPC1_WINDOW

    +
    +
    +

    + + + PS_CPLD_BASE_REGMAP +

    +

    + + + DIO_REGS +

    +
    +

    DIO_DIRECTION_REGISTER

    +
    +

    + + + PS_CMI_REGS +

    +
    +

    SERIAL_NUM_LOW_REG

    +

    SERIAL_NUM_HIGH_REG

    +

    CMI_CONTROL_STATUS

    +
    +

    + + + PS_CONTROL_REGS +

    +
    +

    PL_DB_REGISTER

    +
    +

    + + + PS_CPLD_BASE_REGS +

    +
    +

    SIGNATURE_REGISTER

    +

    REVISION_REGISTER

    +

    OLDEST_COMPATIBLE_REVISION_REGISTER

    +

    SCRATCH_REGISTER

    +

    GIT_HASH_REGISTER

    +
    +
    +

    + + + PS_POWER_REGMAP +

    +

    + + + PS_POWER_REGS +

    +
    +

    IPASS_POWER_REG

    +

    OSC_POWER_REG

    +
    +
    +

    + + + QSFP_REGMAP +

    +

    + + + QSFP_WINDOWS +

    +
    +

    ETH_DMA

    +

    NIXGE

    +

    UIO

    +

    CMAC

    +
    +
    +

    + + + RADIO_CTRLPORT_REGMAP +

    +

    + + + RADIO_CTRLPORT_WINDOWS +

    +
    +

    DB_WINDOW

    +

    RFDC_TIMING_WINDOW

    +
    +
    +

    + + + RECONFIG_REGMAP +

    +

    + + + RECONFIG_REGS +

    +
    +

    enum FLASH_PRIMARY_IMAGE_ADDR_ENUM

    +

    FLASH_STATUS_REG

    +

    FLASH_CONTROL_REG

    +

    FLASH_ADDR_REG

    +

    FLASH_WRITE_DATA_REG

    +

    FLASH_READ_DATA_REG

    +

    FLASH_CFM0_START_ADDR_REG

    +

    FLASH_CFM0_END_ADDR_REG

    +
    +
    +

    + + + RFDC_REGS_REGMAP +

    +

    + + + RFDC_REGS +

    +
    +

    enum FABRIC_DSP_BW_ENUM

    +

    MMCM

    +

    INVERT_IQ_REG

    +

    MMCM_RESET_REG

    +

    RF_RESET_CONTROL_REG

    +

    RF_RESET_STATUS_REG

    +

    RF_AXI_STATUS_REG

    +

    FABRIC_DSP_REG

    +

    CALIBRATION_DATA

    +

    CALIBRATION_ENABLE

    +

    THRESHOLD_STATUS

    +

    RF_PLL_CONTROL_REG

    +

    RF_PLL_STATUS_REG

    +
    +
    +

    + + + RFDC_TIMING_REGMAP +

    +

    + + + RFDC_TIMING_REGS +

    +
    +

    NCO_RESET_REG

    +

    GEARBOX_RESET_REG

    +
    +
    +

    + + + SPI_REGMAP +

    +

    + + + SPI_REGS +

    +
    +

    RX_DATA_LOW

    +

    RX_DATA_HIGH

    +

    TX_DATA_LOW

    +

    TX_DATA_HIGH

    +

    CONTROL

    +

    CLOCK_DIVIDER

    +

    SLAVE_SELECT

    +
    +
    +

    + + + UIO_REGMAP +

    +

    + + + UIO_REGS +

    +
    +

    IP

    +

    UDP

    +

    BRIDGE_MAC_LSB

    +

    BRIDGE_MAC_MSB

    +

    BRIDGE_IP

    +

    BRIDGE_UDP

    +

    BRIDGE_ENABLE

    +

    CHDR_DROPPED

    +

    CPU_DROPPED

    +

    PAUSE

    +
    +
    +

    + + + VERSIONING_REGS_REGMAP +

    +

    + + + VERSIONING_CONSTANTS +

    +
    +

    enum CPLD_IFC_VERSION

    +

    enum DB_GPIO_IFC_VERSION

    +

    enum FPGA_VERSION

    +

    enum RF_CORE_100M_VERSION

    +

    enum RF_CORE_400M_VERSION

    +
    +

    + + + VERSIONING_REGS +

    +
    +

    enum COMPONENTS_INDEXES

    +

    CURRENT_VERSION

    +

    OLDEST_COMPATIBLE_VERSION

    +

    VERSION_LAST_MODIFIED

    +

    RESERVED

    +
    +
    +

    + + + XGE_MAC_REGMAP +

    +

    + + + OPENCORE_XGE_REGISTERS +

    +
    +
    +
    +
    + + \ No newline at end of file diff --git a/fpga/usrp3/top/x400/doc/X4XX_FPGA_right.htm b/fpga/usrp3/top/x400/doc/X4XX_FPGA_right.htm new file mode 100644 index 000000000..4a4cacffa --- /dev/null +++ b/fpga/usrp3/top/x400/doc/X4XX_FPGA_right.htm @@ -0,0 +1,22509 @@ + + + + + + + + +
    + +

    X4XX_FPGA

    + This documentation provides a description of the different register spaces available + for the USRP X4xx Open-Source FPGA target implementation, accessible through the + embedded ARM A53 processor in the RFSoC chip, and other UHD hosts. +

    The top is defined in HDL source file common_regs.v, x4xx.v.

    +

    P5 Content

    +

    Register map supplied for open-source projects

    +

    "All content provided is Copyright 2021 National Instruments Corporation. +For information on NI trademark guidelines, please see http://www.ni.com/legal/trademarks/. For the NI Patent Notice, please see http://www.ni.com/legal/patents/." +

    +
    + +

    ports

    + This section lists all common Processing System ports through + which the register maps in this project are accessed. Each input + port to the fabric will point to a regmap. +
    + + +

    Port ARM_M_AXI_HPM0 (input)

    + +

    + + Target Regmap = AXI_HPM0_REGMAP + +

    + +
    + +This is the main AXI4-Lite master interface that the PS + exposes to the kernel to interact with the FPGA fabric. + There are multiple endpoints connected to this interface. + +
    + +

    + This port is defined in HDL source file common_regs.v. +

    + +
    + +
    + + +

    Port ARM_S_AXI_HPC0 (output)

    + +

    + + Source Window = PL_DMA_MASTER_REGMAP|AXI_HPC0_WINDOW + +

    + +
    + +This is one of the two cache-coherent AXI slave ports available to + communicate from the fabric (master) to the PS (slave). + +
    + +

    + This port is defined in HDL source file common_regs.v. +

    + +
    + +
    + + +

    Port ARM_S_AXI_HPC1 (output)

    + +

    + + Source Window = PL_DMA_MASTER_REGMAP|AXI_HPC1_WINDOW + +

    + +
    + +This is one of the two cache-coherent AXI slave ports available to + communicate from the fabric (master) to the PS (slave). + +
    + +

    + This port is defined in HDL source file common_regs.v. +

    + +
    + +
    + + +

    Port ARM_SPI1_CS3 (input)

    + +

    + + Target Regmap = MB_CPLD_PS_REGMAP + +

    + +
    + +This is the SPI1 interface + (see Zynq UltraScale+ Devices Register Reference) + of the PS. + With chip select 3 enabled transactions are targeted for the PS MB CPLD register interface linked here.
    + The request format on SPI is defined as.
    + Write request: +
      +
    • 1'b1 = write +
    • 15 bit address +
    • 32 bit data (MOSI) +
    • 8 bit processing gap +
    • 5 bit padding +
    • 1 bit ack +
    • 2 bit status +
    + Read request: +
      +
    • 1'b0 = read +
    • 15 bit address +
    • 8 bit processing gap +
    • 32 bit data (MISO) +
    • 5 bit padding +
    • 1 bit ack +
    • 2 bit status +
    + +
    + +

    + This port is defined in HDL source file common_regs.v. +

    + +
    + +
    + +
    + +
    + +

    AXI_HPM0_REGMAP

    +
    +

    This is the map for the register space that the Processing System's +M_AXI_HPM0_FPD port (AXI4 master interface) has access to. +This port has a 40-bit address bus.

    +

    COMMON

    +
    +
    +
    + + +

    Offset 0x80000000: RPU Window (R|W)

    + + (show extended info) +
    + + + + + + + + + + + + + +
    + + + +
    Port ARM_M_AXI_HPM0
    + +    		 + + + + + +
    RPU
      offset=0x80000000
      size=0x10000 (64 Kbytes)
    + +    		 + + + + + +
    + + +Total Offset =
      0x80000000 + +
    + +

    + +

    This window is defined in HDL source file common_regs.v.

    + +
    + +
    + +
    +

    Space reserved for RPU access

    + +
    + +
    + +
    + + +

    Offset 0x1000000000: JTAG_ENGINE Window (R|W)

    + + (show extended info) +
    + + + + + + + + + + + + + +
    + + + +
    Port ARM_M_AXI_HPM0
    + +    		 + + + + + +
    JTAG_ENGINE
      offset=0x1000000000
      size=0x1000 (4 Kbytes)
    + +    		 + + + + + +
    + + +Total Offset =
      0x1000000000 + +
    + +

    + +

    This window is defined in HDL source file common_regs.v.

    + +
    + +
    + +
    +

    Register space for the JTAG engine for MB CPLD programming.

    + +
    + +
    + +
    + + +

    Offset 0x100003F000: WR Window (R|W)

    + + (show extended info) +
    + + + + + + + + + + + + + +
    + + + +
    Port ARM_M_AXI_HPM0
    + +    		 + + + + + +
    WR
      offset=0x100003F000
      size=0x1000 (4 Kbytes)
    + +    		 + + + + + +
    + + +Total Offset =
      0x100003F000 + +
    + +

    + +

    This window is defined in HDL source file common_regs.v.

    + +
    + +
    + +
    +

    NOT IMPLEMENTED YET! Register space reserved for White Rabbit.

    + +
    + +
    + +
    + + +

    Offset 0x1000080000: MPM_ENDPOINT Window (R|W)

    +

      Target regmap = PL_CPLD_REGMAP

    + (show extended info) +
    + + + + + + + + + + + + + +
    + + + +
    Port ARM_M_AXI_HPM0
    + +    		 + + + + + +
    MPM_ENDPOINT
      offset=0x1000080000
      size=0x20000 (128 Kbytes)
    + +    		 + + + + + +
    + + +Total Offset =
      0x1000080000 + +
    + +

    + +

    This window is defined in HDL source file common_regs.v.

    + +
    + +
    + +
    +

    MPM endpoint fro MB/DB communication.

    + +
    + +
    + +
    + + +

    Offset 0x10000A0000: CORE_REGS Window (R|W)

    +

      Target regmap = CORE_REGS_REGMAP

    + (show extended info) +
    + + + + + + + + + + + + + +
    + + + +
    Port ARM_M_AXI_HPM0
    + +    		 + + + + + +
    CORE_REGS
      offset=0x10000A0000
      size=0x4000 (16 Kbytes)
    + +    		 + + + + + +
    + + +Total Offset =
      0x10000A0000 + +
    + +

    + +

    This window is defined in HDL source file common_regs.v.

    + +
    + +
    + +
    +

    Register space reserved for mboard-regs (Core).

    + +
    + +
    + +
    + + +

    Offset 0x10000A4000: INT_ETH_DMA Window (R|W)

    +

      Target regmap = ETH_DMA_CTRL_REGMAP

    + (show extended info) +
    + + + + + + + + + + + + + +
    + + + +
    Port ARM_M_AXI_HPM0
    + +    		 + + + + + +
    INT_ETH_DMA
      offset=0x10000A4000
      size=0x6000 (24 Kbytes)
    + +    		 + + + + + +
    + + +Total Offset =
      0x10000A4000 + +
    + +

    + +

    This window is defined in HDL source file common_regs.v.

    + +
    + +
    + +
    +

    AXI DMA engine for internal Ethernet interface.

    + +
    + +
    + +
    + + +

    Offset 0x10000AA000: INT_ETH_REGS Window (R|W)

    + + (show extended info) +
    + + + + + + + + + + + + + +
    + + + +
    Port ARM_M_AXI_HPM0
    + +    		 + + + + + +
    INT_ETH_REGS
      offset=0x10000AA000
      size=0x2000 (8 Kbytes)
    + +    		 + + + + + +
    + + +Total Offset =
      0x10000AA000 + +
    + +

    + +

    This window is defined in HDL source file common_regs.v.

    + +
    + +
    + +
    +

    Misc. registers for internal Ethernet.

    + +
    + +
    + +
    + + +

    Offset 0x1000100000: RFDC Window (R|W)

    + + (show extended info) +
    + + + + + + + + + + + + + +
    + + + +
    Port ARM_M_AXI_HPM0
    + +    		 + + + + + +
    RFDC
      offset=0x1000100000
      size=0x40000 (256 Kbytes)
    + +    		 + + + + + +
    + + +Total Offset =
      0x1000100000 + +
    + +

    + +

    This window is defined in HDL source file common_regs.v.

    + +
    + +
    + +
    +

    Register space occupied by the Xilinx RFDC IP block.

    + +
    + +
    + +
    + + +

    Offset 0x1000140000: RFDC_REGS Window (R|W)

    +

      Target regmap = RFDC_REGS_REGMAP

    + (show extended info) +
    + + + + + + + + + + + + + +
    + + + +
    Port ARM_M_AXI_HPM0
    + +    		 + + + + + +
    RFDC_REGS
      offset=0x1000140000
      size=0x20000 (128 Kbytes)
    + +    		 + + + + + +
    + + +Total Offset =
      0x1000140000 + +
    + +

    + +

    This window is defined in HDL source file common_regs.v.

    + +
    + +
    + +
    +

    Register space for RFDC control/status registers.

    + +
    + +
    + +
    + +

    UHD_ONLY

    +
    +
      +
    • 0_0 indicates QSFP0 - Lane0 or a 4 LANE QSFP0
      • +
    • 0_1 indicates QSFP0 - Lane1
      • +
    • 0_2 indicates QSFP0 - Lane2
      • +
    • 0_3 indicates QSFP0 - Lane3
      • +
    • 1_0 indicates QSFP1 - Lane0 or a 4 LANE QSFP1
      • +
    • 1_1 indicates QSFP1 - Lane1
      • +
    • 1_2 indicates QSFP1 - Lane2
      • +
    • 1_3 indicates QSFP1 - Lane3
      • +
    +
    + + +

    Offset 0x1200000000: QSFP_0_0 Window (R|W)

    +

      Target regmap = QSFP_REGMAP

    + (show extended info) +
    + + + + + + + + + + + + + +
    + + + +
    Port ARM_M_AXI_HPM0
    + +    		 + + + + + +
    QSFP_0_0
      offset=0x1200000000
      size=0x10000 (64 Kbytes)
    + +    		 + + + + + +
    + + +Total Offset =
      0x1200000000 + +
    + +

    + +

    This window is defined in HDL source file uhd_regs.v.

    + +
    + +
    + +
    +
    + +
    + +
    + +
    + + +

    Offset 0x1200010000: QSFP_0_1 Window (R|W)

    +

      Target regmap = QSFP_REGMAP

    + (show extended info) +
    + + + + + + + + + + + + + +
    + + + +
    Port ARM_M_AXI_HPM0
    + +    		 + + + + + +
    QSFP_0_1
      offset=0x1200010000
      size=0x10000 (64 Kbytes)
    + +    		 + + + + + +
    + + +Total Offset =
      0x1200010000 + +
    + +

    + +

    This window is defined in HDL source file uhd_regs.v.

    + +
    + +
    + +
    +
    + +
    + +
    + +
    + + +

    Offset 0x1200020000: QSFP_0_2 Window (R|W)

    +

      Target regmap = QSFP_REGMAP

    + (show extended info) +
    + + + + + + + + + + + + + +
    + + + +
    Port ARM_M_AXI_HPM0
    + +    		 + + + + + +
    QSFP_0_2
      offset=0x1200020000
      size=0x10000 (64 Kbytes)
    + +    		 + + + + + +
    + + +Total Offset =
      0x1200020000 + +
    + +

    + +

    This window is defined in HDL source file uhd_regs.v.

    + +
    + +
    + +
    +
    + +
    + +
    + +
    + + +

    Offset 0x1200030000: QSFP_0_3 Window (R|W)

    +

      Target regmap = QSFP_REGMAP

    + (show extended info) +
    + + + + + + + + + + + + + +
    + + + +
    Port ARM_M_AXI_HPM0
    + +    		 + + + + + +
    QSFP_0_3
      offset=0x1200030000
      size=0x10000 (64 Kbytes)
    + +    		 + + + + + +
    + + +Total Offset =
      0x1200030000 + +
    + +

    + +

    This window is defined in HDL source file uhd_regs.v.

    + +
    + +
    + +
    +
    + +
    + +
    + +
    + + +

    Offset 0x1200040000: QSFP_1_0 Window (R|W)

    +

      Target regmap = QSFP_REGMAP

    + (show extended info) +
    + + + + + + + + + + + + + +
    + + + +
    Port ARM_M_AXI_HPM0
    + +    		 + + + + + +
    QSFP_1_0
      offset=0x1200040000
      size=0x10000 (64 Kbytes)
    + +    		 + + + + + +
    + + +Total Offset =
      0x1200040000 + +
    + +

    + +

    This window is defined in HDL source file uhd_regs.v.

    + +
    + +
    + +
    +
    + +
    + +
    + +
    + + +

    Offset 0x1200050000: QSFP_1_1 Window (R|W)

    +

      Target regmap = QSFP_REGMAP

    + (show extended info) +
    + + + + + + + + + + + + + +
    + + + +
    Port ARM_M_AXI_HPM0
    + +    		 + + + + + +
    QSFP_1_1
      offset=0x1200050000
      size=0x10000 (64 Kbytes)
    + +    		 + + + + + +
    + + +Total Offset =
      0x1200050000 + +
    + +

    + +

    This window is defined in HDL source file uhd_regs.v.

    + +
    + +
    + +
    +
    + +
    + +
    + +
    + + +

    Offset 0x1200060000: QSFP_1_2 Window (R|W)

    +

      Target regmap = QSFP_REGMAP

    + (show extended info) +
    + + + + + + + + + + + + + +
    + + + +
    Port ARM_M_AXI_HPM0
    + +    		 + + + + + +
    QSFP_1_2
      offset=0x1200060000
      size=0x10000 (64 Kbytes)
    + +    		 + + + + + +
    + + +Total Offset =
      0x1200060000 + +
    + +

    + +

    This window is defined in HDL source file uhd_regs.v.

    + +
    + +
    + +
    +
    + +
    + +
    + +
    + + +

    Offset 0x1200070000: QSFP_1_3 Window (R|W)

    +

      Target regmap = QSFP_REGMAP

    + (show extended info) +
    + + + + + + + + + + + + + +
    + + + +
    Port ARM_M_AXI_HPM0
    + +    		 + + + + + +
    QSFP_1_3
      offset=0x1200070000
      size=0x10000 (64 Kbytes)
    + +    		 + + + + + +
    + + +Total Offset =
      0x1200070000 + +
    + +

    + +

    This window is defined in HDL source file uhd_regs.v.

    + +
    + +
    + +
    +
    + +
    + +
    + +
    + +
    + +
    + +

    MB_CPLD_PS_REGMAP

    +
    +

    This register map is available using the PS CPLD SPI interface.

    +

    MB_CPLD_PS_WINDOWS

    +
    +
    +
    + + +

    Offset 0x0000: PS_REGISTERS Window (R|W)

    +

      Target regmap = PS_CPLD_BASE_REGMAP

    + (show extended info) +
    + + + + + + + + + + + + + +
    + + + +
    Port ARM_SPI1_CS3
    + +    		 + + + + + +
    PS_REGISTERS
      offset=0x0000
      size=0x40 (64 bytes)
    + +    		 + + + + + +
    + + +Total Offset =
      0x000000 + +
    + +

    + +

    This window is defined in HDL source file mb_cpld.v.

    + +
    + +
    + +
    +
    + +
    + +
    + +
    + + +

    Offset 0x0040: RECONFIG Window (R|W)

    +

      Target regmap = RECONFIG_REGMAP

    + (show extended info) +
    + + + + + + + + + + + + + +
    + + + +
    Port ARM_SPI1_CS3
    + +    		 + + + + + +
    RECONFIG
      offset=0x0040
      size=0x20 (32 bytes)
    + +    		 + + + + + +
    + + +Total Offset =
      0x000040 + +
    + +

    + +

    This window is defined in HDL source file mb_cpld.v.

    + +
    + +
    + +
    +
    + +
    + +
    + +
    + + +

    Offset 0x0060: POWER_REGISTERS Window (R|W)

    +

      Target regmap = PS_POWER_REGMAP

    + (show extended info) +
    + + + + + + + + + + + + + +
    + + + +
    Port ARM_SPI1_CS3
    + +    		 + + + + + +
    POWER_REGISTERS
      offset=0x0060
      size=0x20 (32 bytes)
    + +    		 + + + + + +
    + + +Total Offset =
      0x000060 + +
    + +

    + +

    This window is defined in HDL source file mb_cpld.v.

    + +
    + +
    + +
    +
    + +
    + +
    + +
    + +

    PS_SPI_ENDPOINTS

    +
    +
    +
    + + +

    SPI_ENDPOINT Enumeration

    +
    +
    + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + +
    Value Name
    0 +

    PS_CS_MB_CPLD

    + +

    +
    + +
    1 +

    PS_CS_LMK32

    + +

    +
    + +
    2 +

    PS_CS_TPM

    + +

    +
    + +
    3 +

    PS_CS_PHASE_DAC

    + +

    +
    + +
    4 +

    PS_CS_DB0_CAL_EEPROM

    + +

    +
    + +
    5 +

    PS_CS_DB1_CAL_EEPROM

    + +

    +
    + +
    6 +

    PS_CS_CLK_AUX_DB

    + +

    +
    + +
    7 +

    PS_CS_IDLE

    + +

    +
    + +
    + +

    + This enumerated type is defined in HDL source file mb_cpld.v. +

    + +
    + +
    + +
    + +
    + +

    CMAC_REGMAP

    +
    +
    +

    XILINX_CMAC_REGISTERS

    +
    +

    100G MAC ethernet registers (Link 0) defined in the CMAC Manual starting on pg 187.

    +
      +
    • http://www.xilinx.com/support/documentation/ip_documentation/cmac_usplus/v2_4/pg203-cmac-usplus.pdf
      • +
    +
    + +
    + +
    + +

    CONSTANTS_REGMAP

    + +

    CONSTANTS_GROUP

    + Basic registers containing version and capabilities information. +
    + + +

    CONSTANTS_ENUM Enumeration

    +This enumeration is used to create the constants held in the basic registers. + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + +
    Value Name
    Dec Hex
    1731576710x0A522D27 +

    PS_CPLD_SIGNATURE

    + +
    5380590280x20122114 +

    OLDEST_CPLD_REVISION

    + +
    5537218770x21012015 +

    CPLD_REVISION

    + +
    10714061510x3FDC5C47 +

    PL_CPLD_SIGNATURE

    + +
    + +

    + This enumerated type is defined in HDL source file mb_cpld.v. +

    + +
    + +
    + +
    + +
    + +

    CORE_REGS_REGMAP

    + This is the map for the registers that the CORE_REGS window has access to + from the ARM_AXI_HPM0_FPD port. + + The registers contained here conform the mboard-regs node that MPM uses + to manage general FPGA control/status calls, such as versioning, + timekeeper, GPIO, etc. +

    CORE_REGS

    + +
    + + +

    Offset 0x0000: GLOBAL_REGS Window (R|W)

    +

      Target regmap = GLOBAL_REGS_REGMAP

    + (show extended info) +
    + + + + + + + + + + + + + + + +
    + + + +
    Port ARM_M_AXI_HPM0
    + +    		 + + + + +
    AXI_HPM0_REGMAP|CORE_REGS
      0x10000A0000
    + +    		 + + + + + +
    GLOBAL_REGS
      offset=0x0000
      size=0xC00 (3 Kbytes)
    + +    		 + + + + + +
    + + +Total Offset =
      0x10000A0000 + +
    + +

    + +

    This window is defined in HDL source file x4xx_core_common.v.

    + +
    + +
    + +Window to access global registers in the FPGA. + +
    + +
    + +
    + + +

    Offset 0x0C00: VERSIONING_REGS Window (R|W)

    +

      Target regmap = VERSIONING_REGS_REGMAP

    + (show extended info) +
    + + + + + + + + + + + + + + + +
    + + + +
    Port ARM_M_AXI_HPM0
    + +    		 + + + + +
    AXI_HPM0_REGMAP|CORE_REGS
      0x10000A0000
    + +    		 + + + + + +
    VERSIONING_REGS
      offset=0x0C00
      size=0x400 (1 Kbyte)
    + +    		 + + + + + +
    + + +Total Offset =
      0x10000A0C00 + +
    + +

    + +

    This window is defined in HDL source file x4xx_core_common.v.

    + +
    + +
    + +Window to access versioning registers in the FPGA. + +
    + +
    + +
    + + +

    Offset 0x1000: TIMEKEEPER Window (R|W)

    + + (show extended info) +
    + + + + + + + + + + + + + + + +
    + + + +
    Port ARM_M_AXI_HPM0
    + +    		 + + + + +
    AXI_HPM0_REGMAP|CORE_REGS
      0x10000A0000
    + +    		 + + + + + +
    TIMEKEEPER
      offset=0x1000
      size=0x20 (32 bytes)
    + +    		 + + + + + +
    + + +Total Offset =
      0x10000A1000 + +
    + +

    + +

    This window is defined in HDL source file x4xx_core_common.v.

    + +
    + +
    + +Window to access the timekeeper register map. + +
    + +
    + +
    + + +

    Offset 0x2000: DIO Window (R|W)

    +

      Target regmap = DIO_REGMAP

    + (show extended info) +
    + + + + + + + + + + + + + + + +
    + + + +
    Port ARM_M_AXI_HPM0
    + +    		 + + + + +
    AXI_HPM0_REGMAP|CORE_REGS
      0x10000A0000
    + +    		 + + + + + +
    DIO
      offset=0x2000
      size=0x20 (32 bytes)
    + +    		 + + + + + +
    + + +Total Offset =
      0x10000A2000 + +
    + +

    + +

    This window is defined in HDL source file x4xx_core_common.v.

    + +
    + +
    + +Window to access the DIO register map. + +
    + +
    + +
    + +
    + +
    + +

    CPLD_INTERFACE_REGMAP

    + +

    CPLD_INTERFACE_REGS

    + Basic registers containing version and capabilities information. +
    + + +

    Offset 0x0000: SIGNATURE_REGISTER Register (R)

    + + (show extended info) +
    + + + + + + + + + + + + + + + + + +
    + + + +
    Port ARM_M_AXI_HPM0
    + +    		 + + + + +
    AXI_HPM0_REGMAP|MPM_ENDPOINT
      0x1000080000
    + +    		 + + + + +
    PL_CPLD_REGMAP|BASE
      0x000000
    + +    		 + + + + +
    SIGNATURE_REGISTER
      offset=0x0000
    + +    		 + + + + + +
    + + +Total Offset =
      0x1000080000 + +
    + +

    + +

    Initial Value not specified +

    + +

    This register is defined in HDL source file cpld_interface_regs.v.

    + +
    + +
    + +Contains the product's signature. + +
    + + + + + + + + + +
    BitsName
    31..0 +

    PRODUCT_SIGNATURE

    +

    fixed value 0xCB1D1FAC

    + +
    + +
    + +
    + + +

    Offset 0x000C: SCRATCH_REGISTER Register (R|W)

    + + (show extended info) +
    + + + + + + + + + + + + + + + + + +
    + + + +
    Port ARM_M_AXI_HPM0
    + +    		 + + + + +
    AXI_HPM0_REGMAP|MPM_ENDPOINT
      0x1000080000
    + +    		 + + + + +
    PL_CPLD_REGMAP|BASE
      0x000000
    + +    		 + + + + +
    SCRATCH_REGISTER
      offset=0x000C
    + +    		 + + + + + +
    + + +Total Offset =
      0x100008000C + +
    + +

    + +

    Initial Value not specified +

    + +

    This register is defined in HDL source file cpld_interface_regs.v.

    + +
    + +
    + +Read/write register for general software use. + +
    + +
    + +
    + +

    CPLD_SPI_CONTROL_REGS

    + Registers to control the SPI clock frequency of the CPLD interfaces. + The resulting clock frequency is calculated by fPRC2(divider+1). +
    + Note that the PLL Reference Clock (PRC) is depending on the RF clocks. +
    + + +

    Offset 0x0020: MOTHERBOARD_CPLD_DIVIDER Register (R|W)

    + + (show extended info) +
    + + + + + + + + + + + + + + + + + +
    + + + +
    Port ARM_M_AXI_HPM0
    + +    		 + + + + +
    AXI_HPM0_REGMAP|MPM_ENDPOINT
      0x1000080000
    + +    		 + + + + +
    PL_CPLD_REGMAP|BASE
      0x000000
    + +    		 + + + + +
    MOTHERBOARD_CPLD_DIVIDER
      offset=0x0020
    + +    		 + + + + + +
    + + +Total Offset =
      0x1000080020 + +
    + +

    + +

    Initial Value = 0x00000002 +

    + +

    This register is defined in HDL source file cpld_interface_regs.v.

    + +
    + +
    + +Clock divider used for SPI transactions targeting the MB CPLD.
    + Minimum required value is 2. + +
    + + + + + + + + + + + + + + + + + + + +
    BitsName
    31..24 +

    Reserved

    +

    + +
    23..16 +

    Reserved

    +

    + +
    15..0 +

    MB_DIVIDER   (initialvalue=2)

    +

    Divider value

    + +
    + +
    + +
    + + +

    Offset 0x0024: DAUGHTERBOARD_CPLD_DIVIDER Register (R|W)

    + + (show extended info) +
    + + + + + + + + + + + + + + + + + +
    + + + +
    Port ARM_M_AXI_HPM0
    + +    		 + + + + +
    AXI_HPM0_REGMAP|MPM_ENDPOINT
      0x1000080000
    + +    		 + + + + +
    PL_CPLD_REGMAP|BASE
      0x000000
    + +    		 + + + + +
    DAUGHTERBOARD_CPLD_DIVIDER
      offset=0x0024
    + +    		 + + + + + +
    + + +Total Offset =
      0x1000080024 + +
    + +

    + +

    Initial Value = 0x00000005 +

    + +

    This register is defined in HDL source file cpld_interface_regs.v.

    + +
    + +
    + +Clock divider used for SPI transactions targeting any of the DB CPLDs.
    + Minimum required value is 5. + +
    + + + + + + + + + + + + + + + + + + + +
    BitsName
    31..24 +

    Reserved

    +

    + +
    23..16 +

    Reserved

    +

    + +
    15..0 +

    DB_DIVIDER   (initialvalue=5)

    +

    Divider value

    + +
    + +
    + +
    + +

    IPASS_REGS

    + +
    + + +

    Offset 0x0010: IPASS_CONTROL Register (R|W)

    + + (show extended info) +
    + + + + + + + + + + + + + + + + + +
    + + + +
    Port ARM_M_AXI_HPM0
    + +    		 + + + + +
    AXI_HPM0_REGMAP|MPM_ENDPOINT
      0x1000080000
    + +    		 + + + + +
    PL_CPLD_REGMAP|BASE
      0x000000
    + +    		 + + + + +
    IPASS_CONTROL
      offset=0x0010
    + +    		 + + + + + +
    + + +Total Offset =
      0x1000080010 + +
    + +

    + +

    Initial Value not specified +

    + +

    This register is defined in HDL source file cpld_interface_regs.v.

    + +
    + +
    + + + +
    + + + + + + + + + + + + + + + + + + + + + + + + + + + + + +
    BitsName
    31..24 +

    Reserved

    +

    + +
    23..16 +

    Reserved

    +

    + +
    15..8 +

    Reserved

    +

    + +
    7..1 +

    Reserved

    +

    + +
    0 +

    IPASS_ENABLE_TRANSFER

    +

    If 1 enables the forwarding of iPass cable present signal to MB CPLD + using ctrlport requests. On change from 0 to 1 the current status is + transferred to the MB CPLD via SPI ctrlport request initially.

    + +
    + +
    + +
    + +
    + +
    + +

    DIO_REGMAP

    + +

    DIO_REGS

    + Registers to control the GPIO buffer direction on the FPGA connected to the DIO board. + Further registers enable the PS to control and read the GPIO lines as master. + Make sure the GPIO lines between FPGA and GPIO board are not driven by two drivers. + Set the DIO registers in PS_CPLD_BASE_REGMAP appropriately. +
    + + +

    Offset 0x0000: DIO_MASTER_REGISTER Register (R|W)

    + + (show extended info) +
    + + + + + + + + + + + + + + + + + +
    + + + +
    Port ARM_M_AXI_HPM0
    + +    		 + + + + +
    AXI_HPM0_REGMAP|CORE_REGS
      0x10000A0000
    + +    		 + + + + +
    CORE_REGS_REGMAP|DIO
      0x002000
    + +    		 + + + + +
    DIO_MASTER_REGISTER
      offset=0x0000
    + +    		 + + + + + +
    + + +Total Offset =
      0x10000A2000 + +
    + +

    + +

    Initial Value = 0x00000000 +

    + +

    This register is defined in HDL source file x4xx_dio.v.

    + +
    + +
    + +Sets whether the DIO signal line is driven by this register interface or the user application.
    + 0 = user application is master, 1 = PS is master + +
    + + + + + + + + + + + + + + + + + + + + + + + + +
    BitsName
    31..28 +

    Reserved

    +

    + +
    27..16 +

    DIO_MASTER_B   (initialvalue=0)

    +

    + +
    15..12 +

    Reserved

    +

    + +
    11..0 +

    DIO_MASTER_A   (initialvalue=0)

    +

    + +
    + +
    + +
    + + +

    Offset 0x0004: DIO_DIRECTION_REGISTER Register (R|W)

    + + (show extended info) +
    + + + + + + + + + + + + + + + + + +
    + + + +
    Port ARM_M_AXI_HPM0
    + +    		 + + + + +
    AXI_HPM0_REGMAP|CORE_REGS
      0x10000A0000
    + +    		 + + + + +
    CORE_REGS_REGMAP|DIO
      0x002000
    + +    		 + + + + +
    DIO_DIRECTION_REGISTER
      offset=0x0004
    + +    		 + + + + + +
    + + +Total Offset =
      0x10000A2004 + +
    + +

    + +

    Initial Value = 0x00000000 +

    + +

    This register is defined in HDL source file x4xx_dio.v.

    + +
    + +
    + +Set the direction of FPGA buffer connected to DIO ports on the DIO board.
    + Each bit represents one signal line. 0 = line is an input to the FPGA, 1 = line is an output driven by the FPGA. + +
    + + + + + + + + + + + + + + + + + + + + + + + + +
    BitsName
    31..28 +

    Reserved

    +

    + +
    27..16 +

    DIO_DIRECTION_B   (initialvalue=0)

    +

    + +
    15..12 +

    Reserved

    +

    + +
    11..0 +

    DIO_DIRECTION_A   (initialvalue=0)

    +

    + +
    + +
    + +
    + + +

    Offset 0x0008: DIO_INPUT_REGISTER Register (R)

    + + (show extended info) +
    + + + + + + + + + + + + + + + + + +
    + + + +
    Port ARM_M_AXI_HPM0
    + +    		 + + + + +
    AXI_HPM0_REGMAP|CORE_REGS
      0x10000A0000
    + +    		 + + + + +
    CORE_REGS_REGMAP|DIO
      0x002000
    + +    		 + + + + +
    DIO_INPUT_REGISTER
      offset=0x0008
    + +    		 + + + + + +
    + + +Total Offset =
      0x10000A2008 + +
    + +

    + +

    Initial Value not specified +

    + +

    This register is defined in HDL source file x4xx_dio.v.

    + +
    + +
    + +Status of each bit at the FPGA input. + +
    + + + + + + + + + + + + + + + + + + + + + + + + +
    BitsName
    31..28 +

    Reserved

    +

    + +
    27..16 +

    DIO_INPUT_B

    +

    + +
    15..12 +

    Reserved

    +

    + +
    11..0 +

    DIO_INPUT_A

    +

    + +
    + +
    + +
    + + +

    Offset 0x000C: DIO_OUTPUT_REGISTER Register (R|W)

    + + (show extended info) +
    + + + + + + + + + + + + + + + + + +
    + + + +
    Port ARM_M_AXI_HPM0
    + +    		 + + + + +
    AXI_HPM0_REGMAP|CORE_REGS
      0x10000A0000
    + +    		 + + + + +
    CORE_REGS_REGMAP|DIO
      0x002000
    + +    		 + + + + +
    DIO_OUTPUT_REGISTER
      offset=0x000C
    + +    		 + + + + + +
    + + +Total Offset =
      0x10000A200C + +
    + +

    + +

    Initial Value = 0x00000000 +

    + +

    This register is defined in HDL source file x4xx_dio.v.

    + +
    + +
    + +Controls the values on each DIO signal line in case the line master is set to PS in DIO_MASTER_REGISTER. + +
    + + + + + + + + + + + + + + + + + + + + + + + + +
    BitsName
    31..28 +

    Reserved

    +

    + +
    27..16 +

    DIO_OUTPUT_B   (initialvalue=0)

    +

    + +
    15..12 +

    Reserved

    +

    + +
    11..0 +

    DIO_OUTPUT_A   (initialvalue=0)

    +

    + +
    + +
    + +
    + +
    + +
    + +

    DMA_REGMAP

    +
    +
    +

    XILINX_DMA_REGISTERS

    +
    +

    Scatter Gather DMA block defined in Xilinx DMA manual start on pg 11

    +
      +
    • https://www.xilinx.com/support/documentation/ip_documentation/axi_dma/v7_1/pg021_axi_dma.pdf
      • +
    +
    + +
    + +
    + +

    ETH_DMA_CTRL_REGMAP

    + This is the map that the nixge driver uses in Ethernet DMA to + move data between the Processing System's architecture and the fabric. + This map is a combination of two main components: a Xilix AXI DMA engine + and some registers for MAC/PHY control. +

    ETH_DMA_CTRL

    + +
    + + +

    Offset 0x0000: AXI_DMA_CTRL Window (R|W)

    + + (show extended info) +
    + + + + + + + + + + + + + + + +
    + + + +
    Port ARM_M_AXI_HPM0
    + +    		 + + + + +
    AXI_HPM0_REGMAP|INT_ETH_DMA
      0x10000A4000
    + +    		 + + + + + +
    AXI_DMA_CTRL
      offset=0x0000
      size=0x4000 (16 Kbytes)
    + +    		 + + + + + +
    + + +Total Offset =
      0x10000A4000 + +
    + +

    + +

    This window is defined in HDL source file common_regs.v.

    + +
    + +
    + +Refer to Xilinx' AXI DMA v7.1 IP product guide for further + information on this register map: + https://www.xilinx.com/support/documentation/ip_documentation/axi_dma/v7_1/pg021_axi_dma.pdf + +
    + +
    + +
    + + +

    Offset 0x4000: ETH_IO_CTRL Window (R|W)

    + + (show extended info) +
    + + + + + + + + + + + + + + + +
    + + + +
    Port ARM_M_AXI_HPM0
    + +    		 + + + + +
    AXI_HPM0_REGMAP|INT_ETH_DMA
      0x10000A4000
    + +    		 + + + + + +
    ETH_IO_CTRL
      offset=0x4000
      size=0x2000 (8 Kbytes)
    + +    		 + + + + + +
    + + +Total Offset =
      0x10000A8000 + +
    + +

    + +

    This window is defined in HDL source file common_regs.v.

    + +
    + +
    + +MAC/PHY control for the Ethernet interface. + +
    + +
    + +
    + +
    + +
    + +

    GLOBAL_REGS_REGMAP

    + +

    GLOBAL_REGS

    + +
    + + +

    Offset 0x0000: COMPAT_NUM_REG Register (R)

    + + (show extended info) +
    + + + + + + + + + + + + + + + + + +
    + + + +
    Port ARM_M_AXI_HPM0
    + +    		 + + + + +
    AXI_HPM0_REGMAP|CORE_REGS
      0x10000A0000
    + +    		 + + + + +
    CORE_REGS_REGMAP|GLOBAL_REGS
      0x000000
    + +    		 + + + + +
    COMPAT_NUM_REG
      offset=0x0000
    + +    		 + + + + + +
    + + +Total Offset =
      0x10000A0000 + +
    + +

    + +

    Initial Value not specified +

    + +

    This register is defined in HDL source file x4xx_global_regs.v.

    + +
    + +
    + +Revision number + +
    + + + + + + + + + + + + + + +
    BitsName
    31..16 +

    COMPAT_MAJOR

    +

    + +
    15..0 +

    COMPAT_MINOR

    +

    + +
    + +
    + +
    + + +

    Offset 0x0004: DATESTAMP_REG Register (R)

    + + (show extended info) +
    + + + + + + + + + + + + + + + + + +
    + + + +
    Port ARM_M_AXI_HPM0
    + +    		 + + + + +
    AXI_HPM0_REGMAP|CORE_REGS
      0x10000A0000
    + +    		 + + + + +
    CORE_REGS_REGMAP|GLOBAL_REGS
      0x000000
    + +    		 + + + + +
    DATESTAMP_REG
      offset=0x0004
    + +    		 + + + + + +
    + + +Total Offset =
      0x10000A0004 + +
    + +

    + +

    Initial Value not specified +

    + +

    This register is defined in HDL source file x4xx_global_regs.v.

    + +
    + +
    + +Build datestamp (32-bit) + +
    + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + +
    BitsName
    31..27 +

    DAY

    +

    + +
    26..23 +

    MONTH

    +

    + +
    22..17 +

    YEAR

    +

    This is the year number after 2000 (e.g. 2019 = d19).

    + +
    16..12 +

    HOUR

    +

    + +
    11..6 +

    MINUTES

    +

    + +
    5..0 +

    SECONDS

    +

    + +
    + +
    + +
    + + +

    Offset 0x0008: GIT_HASH_REG Register (R)

    + + (show extended info) +
    + + + + + + + + + + + + + + + + + +
    + + + +
    Port ARM_M_AXI_HPM0
    + +    		 + + + + +
    AXI_HPM0_REGMAP|CORE_REGS
      0x10000A0000
    + +    		 + + + + +
    CORE_REGS_REGMAP|GLOBAL_REGS
      0x000000
    + +    		 + + + + +
    GIT_HASH_REG
      offset=0x0008
    + +    		 + + + + + +
    + + +Total Offset =
      0x10000A0008 + +
    + +

    + +

    Initial Value not specified +

    + +

    This register is defined in HDL source file x4xx_global_regs.v.

    + +
    + +
    + +Git hash of source commit. + +
    + +
    + +
    + + +

    Offset 0x000C: SCRATCH_REG Register (R|W)

    + + (show extended info) +
    + + + + + + + + + + + + + + + + + +
    + + + +
    Port ARM_M_AXI_HPM0
    + +    		 + + + + +
    AXI_HPM0_REGMAP|CORE_REGS
      0x10000A0000
    + +    		 + + + + +
    CORE_REGS_REGMAP|GLOBAL_REGS
      0x000000
    + +    		 + + + + +
    SCRATCH_REG
      offset=0x000C
    + +    		 + + + + + +
    + + +Total Offset =
      0x10000A000C + +
    + +

    + +

    Initial Value not specified +

    + +

    This register is defined in HDL source file x4xx_global_regs.v.

    + +
    + +
    + +Scratch register for testing. + +
    + +
    + +
    + + +

    Offset 0x0010: DEVICE_ID_REG Register (R|W)

    + + (show extended info) +
    + + + + + + + + + + + + + + + + + +
    + + + +
    Port ARM_M_AXI_HPM0
    + +    		 + + + + +
    AXI_HPM0_REGMAP|CORE_REGS
      0x10000A0000
    + +    		 + + + + +
    CORE_REGS_REGMAP|GLOBAL_REGS
      0x000000
    + +    		 + + + + +
    DEVICE_ID_REG
      offset=0x0010
    + +    		 + + + + + +
    + + +Total Offset =
      0x10000A0010 + +
    + +

    + +

    Initial Value not specified +

    + +

    This register is defined in HDL source file x4xx_global_regs.v.

    + +
    + +
    + +Register that contains the motherboard's device ID. + +
    + + + + + + + + + + + + + + + + + + + + + + + + +
    BitsName
    31 +

    PCIE_PRESENT_BIT

    +

    Set to 1 if PCI-Express core is present in FPGA design.

    + +
    30..24 +

    Reserved

    +

    + +
    23..16 +

    Reserved

    +

    + +
    15..0 +

    DEVICE_ID

    +

    + +
    + +
    + +
    + + +

    Offset 0x0014: RFNOC_INFO_REG Register (R)

    + + (show extended info) +
    + + + + + + + + + + + + + + + + + +
    + + + +
    Port ARM_M_AXI_HPM0
    + +    		 + + + + +
    AXI_HPM0_REGMAP|CORE_REGS
      0x10000A0000
    + +    		 + + + + +
    CORE_REGS_REGMAP|GLOBAL_REGS
      0x000000
    + +    		 + + + + +
    RFNOC_INFO_REG
      offset=0x0014
    + +    		 + + + + + +
    + + +Total Offset =
      0x10000A0014 + +
    + +

    + +

    Initial Value not specified +

    + +

    This register is defined in HDL source file x4xx_global_regs.v.

    + +
    + +
    + +Register that provides information on the RFNoC protocol. + +
    + + + + + + + + + + + + + + + + + + + +
    BitsName
    31..16 +

    CHDR_WIDTH

    +

    + +
    15..8 +

    RFNOC_PROTO_MAJOR

    +

    + +
    7..0 +

    RFNOC_PROTO_MINOR

    +

    + +
    + +
    + +
    + + +

    Offset 0x0018: CLOCK_CTRL_REG Register (R|W)

    + + (show extended info) +
    + + + + + + + + + + + + + + + + + +
    + + + +
    Port ARM_M_AXI_HPM0
    + +    		 + + + + +
    AXI_HPM0_REGMAP|CORE_REGS
      0x10000A0000
    + +    		 + + + + +
    CORE_REGS_REGMAP|GLOBAL_REGS
      0x000000
    + +    		 + + + + +
    CLOCK_CTRL_REG
      offset=0x0018
    + +    		 + + + + + +
    + + +Total Offset =
      0x10000A0018 + +
    + +

    + +

    Initial Value = 0x00000000 +

    + +

    This register is defined in HDL source file x4xx_global_regs.v.

    + +
    + +
    + +Control register for clocking resources. + +
    + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + +
    BitsName
    31..24 +

    PPS_BRC_DELAY

    +

    Number of base reference clock cycles from appearance of the PPS + rising edge to the occurrence of the aligned edge of base reference + clock and PLL reference clock at the sample PLL output. This number + is the sum of the actual value based on PLL_SYNC_DELAY (also + accumulate the fixed amount of clock cycles) and if any the number of + cycles the SPLL requires from issuing of the SYNC signal to the + aligned edge (with LMK04832 = 0).
    + The number written to this register has to be reduced by 1 due to + HDL implementation.

    + +
    23..16 +

    PLL_SYNC_DELAY

    +

    Due to the HDL implementation the rising edge of the SYNC signal for + the LMK04832 is generated 2 clock cycles after the PPS rising edge. + This delay can be further increased by setting this delay value + (e.g. PLL_SYNC_DELAY=3 will result in a total delay of 5 clock cycles).
    + In case two X400 devices are connected using the PPS and reference clock the master delay value needs to be 3 clock cycles + higher than the slave delay value to align the LMK sync edges in time.

    + +
    15..10 +

    Reserved

    +

    + +
    9r +

    PLL_SYNC_DONE

    +

    Indicates the success of the PLL reset started by PLL_SYNC_TRIGGER. Reset on deassertion of PLL_SYNC_TRIGGER.

    + +
    8w +

    PLL_SYNC_TRIGGER

    +

    Assertion triggers the SYNC signal generation for LMK04832 after the next appearance of the PPS rising edge. + There is no self reset on this trigger. + Keep this trigger asserted until PLL_SYNC_DONE is asserted.

    + +
    7..6 +

    Reserved

    +

    + +
    5..4 +

    TRIGGER_IO_SELECT   (initialvalue=TRIG_IO_INPUT)

    +

    IMPORTANT! SW must ensure any TRIG_IO consumers (downstream devices) ignore + and/or re-sync after enabling this port, since the output-enable is basically + asynchronous to the actual TRIG_IO driver.

    + +

    + The values for this bitfield are in the TRIG_IO_ENUM table. + (show here) +

    +
    + +
    + + + + + + + + + + + + + + + + + + + + + + + + + + +
    Value Name
    0 +

    TRIG_IO_INPUT

    + +
    1 +

    TRIG_IO_PPS_OUTPUT

    + +
    + +

    + This enumerated type is defined in HDL source file x4xx_global_regs.v. +

    + +
    + +
    + +
    3r +

    REFCLK_LOCKED

    +

    RESERVED. This bit is not implemented on X4xx and reads as 0.

    + +
    2 +

    REF_SELECT

    +

    RESERVED. This bit is not implemented on X4xx and reads as 0.

    + +
    1..0 +

    PPS_SELECT   (initialvalue=PPS_INT_25MHZ)

    +

    Select the source of the PPS signal. + For the internal generation the value depending on the base reference clock has to be chosen. + The external reference is taken from the PPS_IN pin and is independent of the base reference clock.

    + +

    + The values for this bitfield are in the PPS_ENUM table. + (show here) +

    +
    + +
    + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + +
    Value Name
    0 +

    PPS_INT_25MHZ

    + +
    1 +

    PPS_INT_10MHZ

    + +
    2 +

    PPS_EXT

    + +
    + +

    + This enumerated type is defined in HDL source file x4xx_global_regs.v. +

    + +
    + +
    + +
    + +
    + +
    + + +

    Offset 0x001C: PPS_CTRL_REG Register (R|W)

    + + (show extended info) +
    + + + + + + + + + + + + + + + + + +
    + + + +
    Port ARM_M_AXI_HPM0
    + +    		 + + + + +
    AXI_HPM0_REGMAP|CORE_REGS
      0x10000A0000
    + +    		 + + + + +
    CORE_REGS_REGMAP|GLOBAL_REGS
      0x000000
    + +    		 + + + + +
    PPS_CTRL_REG
      offset=0x001C
    + +    		 + + + + + +
    + + +Total Offset =
      0x10000A001C + +
    + +

    + +

    Initial Value not specified +

    + +

    This register is defined in HDL source file x4xx_global_regs.v.

    + +
    + +
    + +Control registers for PPS generation. + +
    + + + + + + + + + + + + + + + + + + + + + + + + + + + + + +
    BitsName
    31 +

    PPS_RC_ENABLED

    +

    Enables the PPS signal in radio clock domain. Please make sure that + the values of PPS_BRC_DELAY, PPS_PRC_DELAY and PRC_RC_DIVIDER are + set before enabling this bit. It is recommended to disable the PPS + for changes on the other values. Use a wait time of at least 1 second + before changing this value to ensure the values are stable for the + next PPS edge.

    + +
    30 +

    Reserved

    +

    + +
    29..28 +

    PRC_RC_DIVIDER

    +

    Clock multiplier used to generate radio clock from PLL reference clock. + The value written to the register has to be reduced by 2 due to + HDL implementation.

    + +
    27..26 +

    Reserved

    +

    + +
    25..0 +

    PPS_PRC_DELAY

    +

    The number of PLL reference clock cycles from one aligned edge to the + desired aligned edge to issue the PPS in radio clock domain. This + delay is configurable to any aligned edge within a maximum delay of 1 + second (period of PPS).
    + The value written to the register has to be reduced by 4 due to + HDL implementation.

    + +
    + +
    + +
    + + +

    Offset 0x0020: CHDR_CLK_RATE_REG Register (R)

    + + (show extended info) +
    + + + + + + + + + + + + + + + + + +
    + + + +
    Port ARM_M_AXI_HPM0
    + +    		 + + + + +
    AXI_HPM0_REGMAP|CORE_REGS
      0x10000A0000
    + +    		 + + + + +
    CORE_REGS_REGMAP|GLOBAL_REGS
      0x000000
    + +    		 + + + + +
    CHDR_CLK_RATE_REG
      offset=0x0020
    + +    		 + + + + + +
    + + +Total Offset =
      0x10000A0020 + +
    + +

    + +

    Initial Value = 0x0BEBC200 +

    + +

    This register is defined in HDL source file x4xx_global_regs.v.

    + +
    + +
    + +Returns the RFNoC bus clock rate (CHDR). + +
    + + + + + + + + + +
    BitsName
    31..0 +

    CHDR_CLK   (initialvalue=CHDR_CLK_VALUE)

    +

    + +

    + The values for this bitfield are in the CHDR_CLK_ENUM table. + (show here) +

    +
    + +
    + + + + + + + + + + + + + + + + + + + + + + + + + + + + +
    Value Name
    Dec Hex
    2000000000xBEBC200 +

    CHDR_CLK_VALUE

    + +
    + +

    + This enumerated type is defined in HDL source file x4xx_global_regs.v. +

    + +
    + +
    + +
    + +
    + +
    + + +

    Offset 0x0024: CHDR_CLK_COUNT_REG Register (R)

    + + (show extended info) +
    + + + + + + + + + + + + + + + + + +
    + + + +
    Port ARM_M_AXI_HPM0
    + +    		 + + + + +
    AXI_HPM0_REGMAP|CORE_REGS
      0x10000A0000
    + +    		 + + + + +
    CORE_REGS_REGMAP|GLOBAL_REGS
      0x000000
    + +    		 + + + + +
    CHDR_CLK_COUNT_REG
      offset=0x0024
    + +    		 + + + + + +
    + + +Total Offset =
      0x10000A0024 + +
    + +

    + +

    Initial Value not specified +

    + +

    This register is defined in HDL source file x4xx_global_regs.v.

    + +
    + +
    + +Returns the count value of a free-running counter driven by the RFNoC + CHDR bus clock. + +
    + +
    + +
    + + +

    Offset 0x0038: GPS_CTRL_REG Register (R|W)

    + + (show extended info) +
    + + + + + + + + + + + + + + + + + +
    + + + +
    Port ARM_M_AXI_HPM0
    + +    		 + + + + +
    AXI_HPM0_REGMAP|CORE_REGS
      0x10000A0000
    + +    		 + + + + +
    CORE_REGS_REGMAP|GLOBAL_REGS
      0x000000
    + +    		 + + + + +
    GPS_CTRL_REG
      offset=0x0038
    + +    		 + + + + + +
    + + +Total Offset =
      0x10000A0038 + +
    + +

    + +

    Initial Value not specified +

    + +

    This register is defined in HDL source file x4xx_global_regs.v.

    + +
    + +
    + +RESERVED. This register is not implemented on X4xx. GPS is connected + to the PS via a UART. + +
    + +
    + +
    + + +

    Offset 0x003C: GPS_STATUS_REG Register (R)

    + + (show extended info) +
    + + + + + + + + + + + + + + + + + +
    + + + +
    Port ARM_M_AXI_HPM0
    + +    		 + + + + +
    AXI_HPM0_REGMAP|CORE_REGS
      0x10000A0000
    + +    		 + + + + +
    CORE_REGS_REGMAP|GLOBAL_REGS
      0x000000
    + +    		 + + + + +
    GPS_STATUS_REG
      offset=0x003C
    + +    		 + + + + + +
    + + +Total Offset =
      0x10000A003C + +
    + +

    + +

    Initial Value not specified +

    + +

    This register is defined in HDL source file x4xx_global_regs.v.

    + +
    + +
    + +RESERVED. This register is not implemented on X4xx. GPS is connected + to the PS via a UART. + +
    + +
    + +
    + + +

    Offset 0x0040: DBOARD_CTRL_REG Register (R|W)

    + + (show extended info) +
    + + + + + + + + + + + + + + + + + +
    + + + +
    Port ARM_M_AXI_HPM0
    + +    		 + + + + +
    AXI_HPM0_REGMAP|CORE_REGS
      0x10000A0000
    + +    		 + + + + +
    CORE_REGS_REGMAP|GLOBAL_REGS
      0x000000
    + +    		 + + + + +
    DBOARD_CTRL_REG
      offset=0x0040
    + +    		 + + + + + +
    + + +Total Offset =
      0x10000A0040 + +
    + +

    + +

    Initial Value not specified +

    + +

    This register is defined in HDL source file x4xx_global_regs.v.

    + +
    + +
    + +RESERVED. This register is not implemented on X4xx. + +
    + +
    + +
    + + +

    Offset 0x0044: DBOARD_STATUS_REG Register (R)

    + + (show extended info) +
    + + + + + + + + + + + + + + + + + +
    + + + +
    Port ARM_M_AXI_HPM0
    + +    		 + + + + +
    AXI_HPM0_REGMAP|CORE_REGS
      0x10000A0000
    + +    		 + + + + +
    CORE_REGS_REGMAP|GLOBAL_REGS
      0x000000
    + +    		 + + + + +
    DBOARD_STATUS_REG
      offset=0x0044
    + +    		 + + + + + +
    + + +Total Offset =
      0x10000A0044 + +
    + +

    + +

    Initial Value not specified +

    + +

    This register is defined in HDL source file x4xx_global_regs.v.

    + +
    + +
    + +RESERVED. This register is not implemented on X4xx. + +
    + +
    + +
    + + +

    Offset 0x0048: NUM_TIMEKEEPERS_REG Register (R)

    + + (show extended info) +
    + + + + + + + + + + + + + + + + + +
    + + + +
    Port ARM_M_AXI_HPM0
    + +    		 + + + + +
    AXI_HPM0_REGMAP|CORE_REGS
      0x10000A0000
    + +    		 + + + + +
    CORE_REGS_REGMAP|GLOBAL_REGS
      0x000000
    + +    		 + + + + +
    NUM_TIMEKEEPERS_REG
      offset=0x0048
    + +    		 + + + + + +
    + + +Total Offset =
      0x10000A0048 + +
    + +

    + +

    Initial Value not specified +

    + +

    This register is defined in HDL source file x4xx_global_regs.v.

    + +
    + +
    + +Register that specifies the number of timekeepers in the core. + +
    + +
    + +
    + + +

    Offset 0x004C: SERIAL_NUM_LOW_REG Register (R|W)

    + + (show extended info) +
    + + + + + + + + + + + + + + + + + +
    + + + +
    Port ARM_M_AXI_HPM0
    + +    		 + + + + +
    AXI_HPM0_REGMAP|CORE_REGS
      0x10000A0000
    + +    		 + + + + +
    CORE_REGS_REGMAP|GLOBAL_REGS
      0x000000
    + +    		 + + + + +
    SERIAL_NUM_LOW_REG
      offset=0x004C
    + +    		 + + + + + +
    + + +Total Offset =
      0x10000A004C + +
    + +

    + +

    Initial Value not specified +

    + +

    This register is defined in HDL source file x4xx_global_regs.v.

    + +
    + +
    + +Least significant bytes of 8 byte serial number + +
    + +
    + +
    + + +

    Offset 0x0050: SERIAL_NUM_HIGH_REG Register (R|W)

    + + (show extended info) +
    + + + + + + + + + + + + + + + + + +
    + + + +
    Port ARM_M_AXI_HPM0
    + +    		 + + + + +
    AXI_HPM0_REGMAP|CORE_REGS
      0x10000A0000
    + +    		 + + + + +
    CORE_REGS_REGMAP|GLOBAL_REGS
      0x000000
    + +    		 + + + + +
    SERIAL_NUM_HIGH_REG
      offset=0x0050
    + +    		 + + + + + +
    + + +Total Offset =
      0x10000A0050 + +
    + +

    + +

    Initial Value not specified +

    + +

    This register is defined in HDL source file x4xx_global_regs.v.

    + +
    + +
    + +Most significant bytes of 8 byte serial number + +
    + +
    + +
    + + +

    Offset 0x0054: MFG_TEST_CTRL_REG Register (R|W)

    + + (show extended info) +
    + + + + + + + + + + + + + + + + + +
    + + + +
    Port ARM_M_AXI_HPM0
    + +    		 + + + + +
    AXI_HPM0_REGMAP|CORE_REGS
      0x10000A0000
    + +    		 + + + + +
    CORE_REGS_REGMAP|GLOBAL_REGS
      0x000000
    + +    		 + + + + +
    MFG_TEST_CTRL_REG
      offset=0x0054
    + +    		 + + + + + +
    + + +Total Offset =
      0x10000A0054 + +
    + +

    + +

    Initial Value not specified +

    + +

    This register is defined in HDL source file x4xx_global_regs.v.

    + +
    + +
    + +Control register for mfg_test functions. + +
    + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + +
    BitsName
    31..24 +

    Reserved

    +

    + +
    23..16 +

    Reserved

    +

    + +
    15..8 +

    Reserved

    +

    + +
    7..2 +

    Reserved

    +

    + +
    1 +

    MFG_TEST_EN_FABRIC_CLK

    +

    When enabled, routes data_clk to FPGA_REF_CLK output port. + When disabled, the FPGA_REF_CLK output is driven to 0.

    + +
    0 +

    MFG_TEST_EN_GTY_RCV_CLK

    +

    When enabled, routes data_clk to GTY_RCV_CLK output port. + When disabled, the GTY_RCV_CLK output is driven to 0.

    + +
    + +
    + +
    + + +

    Offset 0x0058: MFG_TEST_STATUS_REG Register (R|W)

    + + (show extended info) +
    + + + + + + + + + + + + + + + + + +
    + + + +
    Port ARM_M_AXI_HPM0
    + +    		 + + + + +
    AXI_HPM0_REGMAP|CORE_REGS
      0x10000A0000
    + +    		 + + + + +
    CORE_REGS_REGMAP|GLOBAL_REGS
      0x000000
    + +    		 + + + + +
    MFG_TEST_STATUS_REG
      offset=0x0058
    + +    		 + + + + + +
    + + +Total Offset =
      0x10000A0058 + +
    + +

    + +

    Initial Value not specified +

    + +

    This register is defined in HDL source file x4xx_global_regs.v.

    + +
    + +
    + +Status register for mfg_test functions. + +
    + + + + + + + + + + + + + + +
    BitsName
    31..26 +

    Reserved

    +

    + +
    25..0 +

    MFG_TEST_FPGA_AUX_REF_FREQ

    +

    Report the time between rising edges on the FPGA_REF_CLK + input port in 40 MHz Clock ticks. If the count extends + to 1.2 seconds without an edge, the value reported is set + to zero.

    + +
    + +
    + +
    + + +

    Offset 0x0060: QSFP_PORT_0_0_INFO_REG Register (R)

    + + (show extended info) +
    + + + + + + + + + + + + + + + + + +
    + + + +
    Port ARM_M_AXI_HPM0
    + +    		 + + + + +
    AXI_HPM0_REGMAP|CORE_REGS
      0x10000A0000
    + +    		 + + + + +
    CORE_REGS_REGMAP|GLOBAL_REGS
      0x000000
    + +    		 + + + + +
    QSFP_PORT_0_0_INFO_REG
      offset=0x0060
    + +    		 + + + + + +
    + + +Total Offset =
      0x10000A0060 + +
    + +

    + +

    Initial Value not specified +

    + +

    This register is defined in HDL source file x4xx_global_regs.v.

    + +
    + +
    + +Returns information from the QSFP0 Lane0. + +
    + +
    + +
    + + +

    Offset 0x0064: QSFP_PORT_0_1_INFO_REG Register (R)

    + + (show extended info) +
    + + + + + + + + + + + + + + + + + +
    + + + +
    Port ARM_M_AXI_HPM0
    + +    		 + + + + +
    AXI_HPM0_REGMAP|CORE_REGS
      0x10000A0000
    + +    		 + + + + +
    CORE_REGS_REGMAP|GLOBAL_REGS
      0x000000
    + +    		 + + + + +
    QSFP_PORT_0_1_INFO_REG
      offset=0x0064
    + +    		 + + + + + +
    + + +Total Offset =
      0x10000A0064 + +
    + +

    + +

    Initial Value not specified +

    + +

    This register is defined in HDL source file x4xx_global_regs.v.

    + +
    + +
    + +Returns information from the QSFP0 Lane1. + +
    + +
    + +
    + + +

    Offset 0x0068: QSFP_PORT_0_2_INFO_REG Register (R)

    + + (show extended info) +
    + + + + + + + + + + + + + + + + + +
    + + + +
    Port ARM_M_AXI_HPM0
    + +    		 + + + + +
    AXI_HPM0_REGMAP|CORE_REGS
      0x10000A0000
    + +    		 + + + + +
    CORE_REGS_REGMAP|GLOBAL_REGS
      0x000000
    + +    		 + + + + +
    QSFP_PORT_0_2_INFO_REG
      offset=0x0068
    + +    		 + + + + + +
    + + +Total Offset =
      0x10000A0068 + +
    + +

    + +

    Initial Value not specified +

    + +

    This register is defined in HDL source file x4xx_global_regs.v.

    + +
    + +
    + +Returns information from the QSFP0 Lane2. + +
    + +
    + +
    + + +

    Offset 0x006C: QSFP_PORT_0_3_INFO_REG Register (R)

    + + (show extended info) +
    + + + + + + + + + + + + + + + + + +
    + + + +
    Port ARM_M_AXI_HPM0
    + +    		 + + + + +
    AXI_HPM0_REGMAP|CORE_REGS
      0x10000A0000
    + +    		 + + + + +
    CORE_REGS_REGMAP|GLOBAL_REGS
      0x000000
    + +    		 + + + + +
    QSFP_PORT_0_3_INFO_REG
      offset=0x006C
    + +    		 + + + + + +
    + + +Total Offset =
      0x10000A006C + +
    + +

    + +

    Initial Value not specified +

    + +

    This register is defined in HDL source file x4xx_global_regs.v.

    + +
    + +
    + +Returns information from the QSFP0 Lane3. + +
    + +
    + +
    + + +

    Offset 0x0070: QSFP_PORT_1_0_INFO_REG Register (R)

    + + (show extended info) +
    + + + + + + + + + + + + + + + + + +
    + + + +
    Port ARM_M_AXI_HPM0
    + +    		 + + + + +
    AXI_HPM0_REGMAP|CORE_REGS
      0x10000A0000
    + +    		 + + + + +
    CORE_REGS_REGMAP|GLOBAL_REGS
      0x000000
    + +    		 + + + + +
    QSFP_PORT_1_0_INFO_REG
      offset=0x0070
    + +    		 + + + + + +
    + + +Total Offset =
      0x10000A0070 + +
    + +

    + +

    Initial Value not specified +

    + +

    This register is defined in HDL source file x4xx_global_regs.v.

    + +
    + +
    + +Returns information from the QSFP1 Lane0. + +
    + +
    + +
    + + +

    Offset 0x0074: QSFP_PORT_1_1_INFO_REG Register (R)

    + + (show extended info) +
    + + + + + + + + + + + + + + + + + +
    + + + +
    Port ARM_M_AXI_HPM0
    + +    		 + + + + +
    AXI_HPM0_REGMAP|CORE_REGS
      0x10000A0000
    + +    		 + + + + +
    CORE_REGS_REGMAP|GLOBAL_REGS
      0x000000
    + +    		 + + + + +
    QSFP_PORT_1_1_INFO_REG
      offset=0x0074
    + +    		 + + + + + +
    + + +Total Offset =
      0x10000A0074 + +
    + +

    + +

    Initial Value not specified +

    + +

    This register is defined in HDL source file x4xx_global_regs.v.

    + +
    + +
    + +Returns information from the QSFP1 Lane1. + +
    + +
    + +
    + + +

    Offset 0x0078: QSFP_PORT_1_2_INFO_REG Register (R)

    + + (show extended info) +
    + + + + + + + + + + + + + + + + + +
    + + + +
    Port ARM_M_AXI_HPM0
    + +    		 + + + + +
    AXI_HPM0_REGMAP|CORE_REGS
      0x10000A0000
    + +    		 + + + + +
    CORE_REGS_REGMAP|GLOBAL_REGS
      0x000000
    + +    		 + + + + +
    QSFP_PORT_1_2_INFO_REG
      offset=0x0078
    + +    		 + + + + + +
    + + +Total Offset =
      0x10000A0078 + +
    + +

    + +

    Initial Value not specified +

    + +

    This register is defined in HDL source file x4xx_global_regs.v.

    + +
    + +
    + +Returns information from the QSFP1 Lane2. + +
    + +
    + +
    + + +

    Offset 0x007C: QSFP_PORT_1_3_INFO_REG Register (R)

    + + (show extended info) +
    + + + + + + + + + + + + + + + + + +
    + + + +
    Port ARM_M_AXI_HPM0
    + +    		 + + + + +
    AXI_HPM0_REGMAP|CORE_REGS
      0x10000A0000
    + +    		 + + + + +
    CORE_REGS_REGMAP|GLOBAL_REGS
      0x000000
    + +    		 + + + + +
    QSFP_PORT_1_3_INFO_REG
      offset=0x007C
    + +    		 + + + + + +
    + + +Total Offset =
      0x10000A007C + +
    + +

    + +

    Initial Value not specified +

    + +

    This register is defined in HDL source file x4xx_global_regs.v.

    + +
    + +
    + +Returns information from the QSFP1 Lane3. + +
    + +
    + +
    + +
    + +
    + +

    JTAG_REGMAP

    +
    +
    +

    JTAG_REGS

    +
    +

    This register map is present for each JTAG module.

    +

    Basic operation would be:

    +
      +
    • poll ready until asserted
      • +
    • write / read data
      • +
    • write CONTROL register along with reset deasserted to start a transaction
      • +
    +

    For resetting the BITQ FSM, simply assert reset.

    +

    This operation seems a little strange, but it is what the axi_bitq driver +expects. This behavior has been implemented in previous products.

    +
    + + +

    Offset 0x0000: TX_DATA Register (W)

    + + (show extended info) +
    + + + + + + + + + + + + + + + + + + + + + + + + + + + +
    + + + +
    Port ARM_M_AXI_HPM0
    + +    		 + + + + +
    AXI_HPM0_REGMAP|MPM_ENDPOINT
      0x1000080000
    + +    		 + + + + +
    PL_CPLD_REGMAP|MB_CPLD
      0x008000
    + +    		 + + + + +
    MB_CPLD_PL_REGMAP|JTAG_DB0
      0x000060
    + +    		 + + + + +
    TX_DATA
      offset=0x0000
    + +    		 + + + + + +
    + + +Total Offset =
      0x1000088060 + +
    + +
    + + + + +
    MB_CPLD_PL_REGMAP|JTAG_DB1
      0x000080
    + +    		 + + + + + +
    + + +Total Offset =
      0x1000088080 + +
    + +

    + +

    Initial Value not specified +

    + +

    This register is defined in HDL source file ctrlport_to_jtag.v.

    + +
    + +
    + +
    +

    Data to be transmitted (TDI)

    + +
    + +
    + +
    + + +

    Offset 0x0004: STB_DATA Register (W)

    + + (show extended info) +
    + + + + + + + + + + + + + + + + + + + + + + + + + + + +
    + + + +
    Port ARM_M_AXI_HPM0
    + +    		 + + + + +
    AXI_HPM0_REGMAP|MPM_ENDPOINT
      0x1000080000
    + +    		 + + + + +
    PL_CPLD_REGMAP|MB_CPLD
      0x008000
    + +    		 + + + + +
    MB_CPLD_PL_REGMAP|JTAG_DB0
      0x000060
    + +    		 + + + + +
    STB_DATA
      offset=0x0004
    + +    		 + + + + + +
    + + +Total Offset =
      0x1000088064 + +
    + +
    + + + + +
    MB_CPLD_PL_REGMAP|JTAG_DB1
      0x000080
    + +    		 + + + + + +
    + + +Total Offset =
      0x1000088084 + +
    + +

    + +

    Initial Value not specified +

    + +

    This register is defined in HDL source file ctrlport_to_jtag.v.

    + +
    + +
    + +
    +

    Data to be transmitted (TMS)

    + +
    + +
    + +
    + + +

    Offset 0x0008: CONTROL Register (R|W)

    + + (show extended info) +
    + + + + + + + + + + + + + + + + + + + + + + + + + + + +
    + + + +
    Port ARM_M_AXI_HPM0
    + +    		 + + + + +
    AXI_HPM0_REGMAP|MPM_ENDPOINT
      0x1000080000
    + +    		 + + + + +
    PL_CPLD_REGMAP|MB_CPLD
      0x008000
    + +    		 + + + + +
    MB_CPLD_PL_REGMAP|JTAG_DB0
      0x000060
    + +    		 + + + + +
    CONTROL
      offset=0x0008
    + +    		 + + + + + +
    + + +Total Offset =
      0x1000088068 + +
    + +
    + + + + +
    MB_CPLD_PL_REGMAP|JTAG_DB1
      0x000080
    + +    		 + + + + + +
    + + +Total Offset =
      0x1000088088 + +
    + +

    + +

    Initial Value = 0x00000001 +

    + +

    This register is defined in HDL source file ctrlport_to_jtag.v.

    + +
    + +
    + +
    +

    JTAG module status and control

    + +
    + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + +
    BitsName
    31r +

    ready

    +

    +

    Bitq FSM is ready for input (no data transmission in progress).

    + +
    31w +

    reset

    +

    +

    When asserted ('1') a soft-reset for the bitq FSM is triggered, +preventing any transactions to take place.

    +

    Deassert this bit, along with values for prescalar and length +to trigger a new transaction (start strobe).

    + +
    30..24 +

    Reserved

    +

    + +
    23..16 +

    Reserved

    +

    + +
    15..13 +

    Reserved

    +

    + +
    12..8 +

    length

    +

    +

    (Number of bits - 1) to be transferred

    + +
    7..0 +

    prescalar   (initialvalue=true)

    +

    +

    Clock divider. Resulting JTAG frequency will be f_ctrlport / (2*(prescalar + 1)). See window description for details on the initial/minimum value.

    + +
    + +
    + +
    + + +

    Offset 0x000C: RX_DATA Register (R)

    + + (show extended info) +
    + + + + + + + + + + + + + + + + + + + + + + + + + + + +
    + + + +
    Port ARM_M_AXI_HPM0
    + +    		 + + + + +
    AXI_HPM0_REGMAP|MPM_ENDPOINT
      0x1000080000
    + +    		 + + + + +
    PL_CPLD_REGMAP|MB_CPLD
      0x008000
    + +    		 + + + + +
    MB_CPLD_PL_REGMAP|JTAG_DB0
      0x000060
    + +    		 + + + + +
    RX_DATA
      offset=0x000C
    + +    		 + + + + + +
    + + +Total Offset =
      0x100008806C + +
    + +
    + + + + +
    MB_CPLD_PL_REGMAP|JTAG_DB1
      0x000080
    + +    		 + + + + + +
    + + +Total Offset =
      0x100008808C + +
    + +

    + +

    Initial Value not specified +

    + +

    This register is defined in HDL source file ctrlport_to_jtag.v.

    + +
    + +
    + +
    +

    Received data (TDO)

    + +
    + +
    + +
    + +
    + +
    + +

    MB_CPLD_PL_REGMAP

    +
    +

    This register map is available using the PL CPLD SPI interface. +All protocol masters controller by this register map are running with a clock frequency of 50 MHz.

    +

    MB_CPLD_PL_WINDOWS

    +
    +
    +
    + + +

    Offset 0x0000: PL_REGISTERS Window (R|W)

    +

      Target regmap = PL_CPLD_BASE_REGMAP

    + (show extended info) +
    + + + + + + + + + + + + + + + + + +
    + + + +
    Port ARM_M_AXI_HPM0
    + +    		 + + + + +
    AXI_HPM0_REGMAP|MPM_ENDPOINT
      0x1000080000
    + +    		 + + + + +
    PL_CPLD_REGMAP|MB_CPLD
      0x008000
    + +    		 + + + + + +
    PL_REGISTERS
      offset=0x0000
      size=0x40 (64 bytes)
    + +    		 + + + + + +
    + + +Total Offset =
      0x1000088000 + +
    + +

    + +

    This window is defined in HDL source file mb_cpld.v.

    + +
    + +
    + +
    +
    + +
    + +
    + +
    + + +

    Offset 0x0060: JTAG_DB0 Window (R|W)

    +

      Target regmap = JTAG_REGMAP

    + (show extended info) +
    + + + + + + + + + + + + + + + + + +
    + + + +
    Port ARM_M_AXI_HPM0
    + +    		 + + + + +
    AXI_HPM0_REGMAP|MPM_ENDPOINT
      0x1000080000
    + +    		 + + + + +
    PL_CPLD_REGMAP|MB_CPLD
      0x008000
    + +    		 + + + + + +
    JTAG_DB0
      offset=0x0060
      size=0x20 (32 bytes)
    + +    		 + + + + + +
    + + +Total Offset =
      0x1000088060 + +
    + +

    + +

    This window is defined in HDL source file mb_cpld.v.

    + +
    + +
    + +
    +

    JTAG Master connected to first daugherboard's CPLD JTAG interface.

    +

    Use minimum value of 1 for JTAG_REGMAP.prescalar because the DB CPLD JTAG interface maximum clock frequency is 20 MHz.

    + +
    + +
    + +
    + + +

    Offset 0x0080: JTAG_DB1 Window (R|W)

    +

      Target regmap = JTAG_REGMAP

    + (show extended info) +
    + + + + + + + + + + + + + + + + + +
    + + + +
    Port ARM_M_AXI_HPM0
    + +    		 + + + + +
    AXI_HPM0_REGMAP|MPM_ENDPOINT
      0x1000080000
    + +    		 + + + + +
    PL_CPLD_REGMAP|MB_CPLD
      0x008000
    + +    		 + + + + + +
    JTAG_DB1
      offset=0x0080
      size=0x20 (32 bytes)
    + +    		 + + + + + +
    + + +Total Offset =
      0x1000088080 + +
    + +

    + +

    This window is defined in HDL source file mb_cpld.v.

    + +
    + +
    + +
    +

    JTAG Master connected to second daugherboard's CPLD JTAG interface.

    +

    Use minimum value of 1 for JTAG_REGMAP.prescalar because the DB CPLD JTAG interface maximum clock frequency is 20 MHz.

    + +
    + +
    + +
    + +
    + +
    + +

    NIXGE_REGMAP

    +
    +
    +

    XGE_MAC_REGS

    +
    +

    nixge (maps to 10g mac if present)

    +
    + + +

    Offset 0x0000: PORT_INFO Register (R|W)

    + + (show extended info) +
    + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + +
    + + + +
    Port ARM_M_AXI_HPM0
    + +    		 + + + + +
    AXI_HPM0_REGMAP|QSFP_0_0
      0x1200000000
    + +    		 + + + + +
    QSFP_REGMAP|NIXGE
      0x008000
    + +    		 + + + + +
    PORT_INFO
      offset=0x0000
    + +    		 + + + + + +
    + + +Total Offset =
      0x1200008000 + +
    + +
    + + + + +
    AXI_HPM0_REGMAP|QSFP_0_1
      0x1200010000
    + +    		 + + + + + +
    + + +Total Offset =
      0x1200018000 + +
    + +
    + + + + +
    AXI_HPM0_REGMAP|QSFP_0_2
      0x1200020000
    + +    		 + + + + + +
    + + +Total Offset =
      0x1200028000 + +
    + +
    + + + + +
    AXI_HPM0_REGMAP|QSFP_0_3
      0x1200030000
    + +    		 + + + + + +
    + + +Total Offset =
      0x1200038000 + +
    + +
    + + + + +
    AXI_HPM0_REGMAP|QSFP_1_0
      0x1200040000
    + +    		 + + + + + +
    + + +Total Offset =
      0x1200048000 + +
    + +
    + + + + +
    AXI_HPM0_REGMAP|QSFP_1_1
      0x1200050000
    + +    		 + + + + + +
    + + +Total Offset =
      0x1200058000 + +
    + +
    + + + + +
    AXI_HPM0_REGMAP|QSFP_1_2
      0x1200060000
    + +    		 + + + + + +
    + + +Total Offset =
      0x1200068000 + +
    + +
    + + + + +
    AXI_HPM0_REGMAP|QSFP_1_3
      0x1200070000
    + +    		 + + + + + +
    + + +Total Offset =
      0x1200078000 + +
    + +

    + +

    Initial Value not specified +

    + +

    This register is defined in HDL source file uhd_regs.v.

    + +
    + +
    + +
    +
    + +
    + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + +
    BitsName
    31..24 +

    COMPAT_NUM

    +

    +

    Constant indicating version for this space. +Not used by the NIXGE driver (12/4/2020)

    + +
    23..18 +

    Reserved

    +

    + +
    17 +

    ACTIVITY

    +

    +

    Generically this mirrors the activity LED. Specific meaning varies based on the MGT_PROTOCOL.

    + +
    16 +

    LINK_UP

    +

    +

    Generically means that a connection with a peer has been established. Specific +meaning varies based on the MGT_PROTOCOL.

    + +
    15..8 +

    MGT_PROTOCOL

    +

    +

    Constant indicating what flavor of communication this port is using

    +
      +
    • 0 = NONE
      • +
    • 1 = 1GbE
      • +
    • 2 = 10GbE
      • +
    • 3 = Aurora
      • +
    • 4 = WhiteRabbit
      • +
    • 5 = 100GbE
      • +

    + +
    7..0 +

    PORTNUM

    +

    +

    Constant indicating which port this register is hooked to

    +
      +
    • 0 = QSFP0
      • +
    • 1 = QSFP1
      • +

    + +
    + +
    + +
    + + +

    Offset 0x0004: MAC_CTRL_STATUS Register (R|W)

    + + (show extended info) +
    + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + +
    + + + +
    Port ARM_M_AXI_HPM0
    + +    		 + + + + +
    AXI_HPM0_REGMAP|QSFP_0_0
      0x1200000000
    + +    		 + + + + +
    QSFP_REGMAP|NIXGE
      0x008000
    + +    		 + + + + +
    MAC_CTRL_STATUS
      offset=0x0004
    + +    		 + + + + + +
    + + +Total Offset =
      0x1200008004 + +
    + +
    + + + + +
    AXI_HPM0_REGMAP|QSFP_0_1
      0x1200010000
    + +    		 + + + + + +
    + + +Total Offset =
      0x1200018004 + +
    + +
    + + + + +
    AXI_HPM0_REGMAP|QSFP_0_2
      0x1200020000
    + +    		 + + + + + +
    + + +Total Offset =
      0x1200028004 + +
    + +
    + + + + +
    AXI_HPM0_REGMAP|QSFP_0_3
      0x1200030000
    + +    		 + + + + + +
    + + +Total Offset =
      0x1200038004 + +
    + +
    + + + + +
    AXI_HPM0_REGMAP|QSFP_1_0
      0x1200040000
    + +    		 + + + + + +
    + + +Total Offset =
      0x1200048004 + +
    + +
    + + + + +
    AXI_HPM0_REGMAP|QSFP_1_1
      0x1200050000
    + +    		 + + + + + +
    + + +Total Offset =
      0x1200058004 + +
    + +
    + + + + +
    AXI_HPM0_REGMAP|QSFP_1_2
      0x1200060000
    + +    		 + + + + + +
    + + +Total Offset =
      0x1200068004 + +
    + +
    + + + + +
    AXI_HPM0_REGMAP|QSFP_1_3
      0x1200070000
    + +    		 + + + + + +
    + + +Total Offset =
      0x1200078004 + +
    + +

    + +

    Initial Value not specified +

    + +

    This register is defined in HDL source file uhd_regs.v.

    + +
    + +
    + +
    +

    Definition of this register depends on Protocol

    +

    10GBE

    +

    READ - Status

    +
      +
    • 0 = status_crc_error
      • +
    • 1 = status_fragment_error
      • +
    • 2 = status_txdfifo_ovflow
      • +
    • 3 = status_txdfifo_udflow
      • +
    • 4 = status_rxdfifo_ovflow
      • +
    • 5 = status_rxdfifo_udflow
      • +
    • 6 = status_pause_frame_rx
      • +
    • 7 = status_local_fault
      • +
    • 8 = status_remote_fault
      • +
    +

    WRITE - Ctl

    +
      +
    • 0 = ctrl_tx_enable
      • +
    +

    100 GBE

    +

    READ - Status

    +
      +
    • 0 = tx_ovfout - Sets if TX overflow reported by CMAC + (Stays set till MAC is reset). This is a fatal error
      • +
    • 1 = tx_unfout - Sets if TX underflow reported by CMAC + (Stays set till MAC is reset). This is a fatal error
      • +
    • 2 = stat_rx_aligned - goes high when CMAC has finished + alignment, and is ready to start reception of traffic.
      • +
    • 3 = mac_dropped_packet - If the mac RX wants to push data(TVALID) + but upstream is trying to hold(TREADY)off we drop a packet. + Upstream circuitry should detect this when traffic is forked + between CHDR and CPU, so this bit will only set if there is a + HW design error.
      • +
    • 4 = auto_config_done - This bit goes high when the auto_config + state machine finishes operation. It is very similiar to + stat_rx_alligned, but waits for extra writes which occur + after allignement to complete.
      • +
    • 24:16 = pause_mask - readable version of pause_mask bellow.
      • +
    +

    WRITE - Ctl

    +
      +
    • 0 = auto_enable - Defaults to ON after reset - Enables a + state machine that performs CMAC register writes to + bring up the MAC without SW intervention.
      • +
    • 24:16 = pause_mask - A second layer of enables(the first being + register in the CMAC) on the pause_request mechanic. Bits + 7:0 of enable pause on PFC7:0. Bit 8 enables global pause + request (not priority controlled). The mask is used for TX + and RX.
      • +
    + +
    + +
    + +
    + + +

    Offset 0x0008: MAC_PHY_STATUS Register (R|W)

    + + (show extended info) +
    + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + +
    + + + +
    Port ARM_M_AXI_HPM0
    + +    		 + + + + +
    AXI_HPM0_REGMAP|QSFP_0_0
      0x1200000000
    + +    		 + + + + +
    QSFP_REGMAP|NIXGE
      0x008000
    + +    		 + + + + +
    MAC_PHY_STATUS
      offset=0x0008
    + +    		 + + + + + +
    + + +Total Offset =
      0x1200008008 + +
    + +
    + + + + +
    AXI_HPM0_REGMAP|QSFP_0_1
      0x1200010000
    + +    		 + + + + + +
    + + +Total Offset =
      0x1200018008 + +
    + +
    + + + + +
    AXI_HPM0_REGMAP|QSFP_0_2
      0x1200020000
    + +    		 + + + + + +
    + + +Total Offset =
      0x1200028008 + +
    + +
    + + + + +
    AXI_HPM0_REGMAP|QSFP_0_3
      0x1200030000
    + +    		 + + + + + +
    + + +Total Offset =
      0x1200038008 + +
    + +
    + + + + +
    AXI_HPM0_REGMAP|QSFP_1_0
      0x1200040000
    + +    		 + + + + + +
    + + +Total Offset =
      0x1200048008 + +
    + +
    + + + + +
    AXI_HPM0_REGMAP|QSFP_1_1
      0x1200050000
    + +    		 + + + + + +
    + + +Total Offset =
      0x1200058008 + +
    + +
    + + + + +
    AXI_HPM0_REGMAP|QSFP_1_2
      0x1200060000
    + +    		 + + + + + +
    + + +Total Offset =
      0x1200068008 + +
    + +
    + + + + +
    AXI_HPM0_REGMAP|QSFP_1_3
      0x1200070000
    + +    		 + + + + + +
    + + +Total Offset =
      0x1200078008 + +
    + +

    + +

    Initial Value not specified +

    + +

    This register is defined in HDL source file uhd_regs.v.

    + +
    + +
    + +
    +

    Definition of this register depends on Protocol

    +

    10GBE

    +

    *READ - Status *

    +
      +
    • 0 = core_status 0 - link_up
      • +
    • 1 = core_status 1
      • +
    • 2 = core_status 2
      • +
    • 3 = core_status 3
      • +
    • 4 = core_status 4
      • +
    • 5 = core_status 5
      • +
    • 6 = core_status 6
      • +
    • 7 = core_status 7
      • +
    +

    100 GBE

    +

    READ - Status

    +
      +
    • 0 = usr_tx_reset - TX PLL's have locked - The clock for the 100G mac isn't stable till this bit sets.
      • +
    • 1 = usr_rx_reset - RX PLL's have locked
      • +
    + +
    + +
    + +
    + + +

    Offset 0x000C: MAC_LED_CTL Register (R|W)

    + + (show extended info) +
    + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + +
    + + + +
    Port ARM_M_AXI_HPM0
    + +    		 + + + + +
    AXI_HPM0_REGMAP|QSFP_0_0
      0x1200000000
    + +    		 + + + + +
    QSFP_REGMAP|NIXGE
      0x008000
    + +    		 + + + + +
    MAC_LED_CTL
      offset=0x000C
    + +    		 + + + + + +
    + + +Total Offset =
      0x120000800C + +
    + +
    + + + + +
    AXI_HPM0_REGMAP|QSFP_0_1
      0x1200010000
    + +    		 + + + + + +
    + + +Total Offset =
      0x120001800C + +
    + +
    + + + + +
    AXI_HPM0_REGMAP|QSFP_0_2
      0x1200020000
    + +    		 + + + + + +
    + + +Total Offset =
      0x120002800C + +
    + +
    + + + + +
    AXI_HPM0_REGMAP|QSFP_0_3
      0x1200030000
    + +    		 + + + + + +
    + + +Total Offset =
      0x120003800C + +
    + +
    + + + + +
    AXI_HPM0_REGMAP|QSFP_1_0
      0x1200040000
    + +    		 + + + + + +
    + + +Total Offset =
      0x120004800C + +
    + +
    + + + + +
    AXI_HPM0_REGMAP|QSFP_1_1
      0x1200050000
    + +    		 + + + + + +
    + + +Total Offset =
      0x120005800C + +
    + +
    + + + + +
    AXI_HPM0_REGMAP|QSFP_1_2
      0x1200060000
    + +    		 + + + + + +
    + + +Total Offset =
      0x120006800C + +
    + +
    + + + + +
    AXI_HPM0_REGMAP|QSFP_1_3
      0x1200070000
    + +    		 + + + + + +
    + + +Total Offset =
      0x120007800C + +
    + +

    + +

    Initial Value not specified +

    + +

    This register is defined in HDL source file uhd_regs.v.

    + +
    + +
    + +
    +
    + +
    + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + +
    BitsName
    31..24 +

    Reserved

    +

    + +
    23..16 +

    Reserved

    +

    + +
    15..8 +

    Reserved

    +

    + +
    7..2 +

    Reserved

    +

    + +
    1 +

    identify_value

    +

    +

    When identify_enable is set, this value controls the activity LED.

    + +
    0 +

    identify_enable

    +

    +

    When set identify_value is used to control the activity LED. +When clear the activity LED set on any TX or RX traffic to the mgt

    + +
    + +
    + +
    + + +

    Offset 0x0010: ETH_MDIO_BASE Register (R|W)

    + + (show extended info) +
    + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + +
    + + + +
    Port ARM_M_AXI_HPM0
    + +    		 + + + + +
    AXI_HPM0_REGMAP|QSFP_0_0
      0x1200000000
    + +    		 + + + + +
    QSFP_REGMAP|NIXGE
      0x008000
    + +    		 + + + + +
    ETH_MDIO_BASE
      offset=0x0010
    + +    		 + + + + + +
    + + +Total Offset =
      0x1200008010 + +
    + +
    + + + + +
    AXI_HPM0_REGMAP|QSFP_0_1
      0x1200010000
    + +    		 + + + + + +
    + + +Total Offset =
      0x1200018010 + +
    + +
    + + + + +
    AXI_HPM0_REGMAP|QSFP_0_2
      0x1200020000
    + +    		 + + + + + +
    + + +Total Offset =
      0x1200028010 + +
    + +
    + + + + +
    AXI_HPM0_REGMAP|QSFP_0_3
      0x1200030000
    + +    		 + + + + + +
    + + +Total Offset =
      0x1200038010 + +
    + +
    + + + + +
    AXI_HPM0_REGMAP|QSFP_1_0
      0x1200040000
    + +    		 + + + + + +
    + + +Total Offset =
      0x1200048010 + +
    + +
    + + + + +
    AXI_HPM0_REGMAP|QSFP_1_1
      0x1200050000
    + +    		 + + + + + +
    + + +Total Offset =
      0x1200058010 + +
    + +
    + + + + +
    AXI_HPM0_REGMAP|QSFP_1_2
      0x1200060000
    + +    		 + + + + + +
    + + +Total Offset =
      0x1200068010 + +
    + +
    + + + + +
    AXI_HPM0_REGMAP|QSFP_1_3
      0x1200070000
    + +    		 + + + + + +
    + + +Total Offset =
      0x1200078010 + +
    + +

    + +

    Initial Value not specified +

    + +

    This register is defined in HDL source file uhd_regs.v.

    + +
    + +
    + +
    +

    The x4xx family of products does not use MDIO.

    + +
    + +
    + +
    + + +

    Offset 0x0020: AURORA_OVERRUNS Register (R|W)

    + + (show extended info) +
    + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + +
    + + + +
    Port ARM_M_AXI_HPM0
    + +    		 + + + + +
    AXI_HPM0_REGMAP|QSFP_0_0
      0x1200000000
    + +    		 + + + + +
    QSFP_REGMAP|NIXGE
      0x008000
    + +    		 + + + + +
    AURORA_OVERRUNS
      offset=0x0020
    + +    		 + + + + + +
    + + +Total Offset =
      0x1200008020 + +
    + +
    + + + + +
    AXI_HPM0_REGMAP|QSFP_0_1
      0x1200010000
    + +    		 + + + + + +
    + + +Total Offset =
      0x1200018020 + +
    + +
    + + + + +
    AXI_HPM0_REGMAP|QSFP_0_2
      0x1200020000
    + +    		 + + + + + +
    + + +Total Offset =
      0x1200028020 + +
    + +
    + + + + +
    AXI_HPM0_REGMAP|QSFP_0_3
      0x1200030000
    + +    		 + + + + + +
    + + +Total Offset =
      0x1200038020 + +
    + +
    + + + + +
    AXI_HPM0_REGMAP|QSFP_1_0
      0x1200040000
    + +    		 + + + + + +
    + + +Total Offset =
      0x1200048020 + +
    + +
    + + + + +
    AXI_HPM0_REGMAP|QSFP_1_1
      0x1200050000
    + +    		 + + + + + +
    + + +Total Offset =
      0x1200058020 + +
    + +
    + + + + +
    AXI_HPM0_REGMAP|QSFP_1_2
      0x1200060000
    + +    		 + + + + + +
    + + +Total Offset =
      0x1200068020 + +
    + +
    + + + + +
    AXI_HPM0_REGMAP|QSFP_1_3
      0x1200070000
    + +    		 + + + + + +
    + + +Total Offset =
      0x1200078020 + +
    + +

    + +

    Initial Value not specified +

    + +

    This register is defined in HDL source file uhd_regs.v.

    + +
    + +
    + +
    +

    Only valid if the protocol is Aurora.

    + +
    + +
    + +
    + + +

    Offset 0x0024: AURORA_CHECKSUM_ERRORS Register (R|W)

    + + (show extended info) +
    + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + +
    + + + +
    Port ARM_M_AXI_HPM0
    + +    		 + + + + +
    AXI_HPM0_REGMAP|QSFP_0_0
      0x1200000000
    + +    		 + + + + +
    QSFP_REGMAP|NIXGE
      0x008000
    + +    		 + + + + +
    AURORA_CHECKSUM_ERRORS
      offset=0x0024
    + +    		 + + + + + +
    + + +Total Offset =
      0x1200008024 + +
    + +
    + + + + +
    AXI_HPM0_REGMAP|QSFP_0_1
      0x1200010000
    + +    		 + + + + + +
    + + +Total Offset =
      0x1200018024 + +
    + +
    + + + + +
    AXI_HPM0_REGMAP|QSFP_0_2
      0x1200020000
    + +    		 + + + + + +
    + + +Total Offset =
      0x1200028024 + +
    + +
    + + + + +
    AXI_HPM0_REGMAP|QSFP_0_3
      0x1200030000
    + +    		 + + + + + +
    + + +Total Offset =
      0x1200038024 + +
    + +
    + + + + +
    AXI_HPM0_REGMAP|QSFP_1_0
      0x1200040000
    + +    		 + + + + + +
    + + +Total Offset =
      0x1200048024 + +
    + +
    + + + + +
    AXI_HPM0_REGMAP|QSFP_1_1
      0x1200050000
    + +    		 + + + + + +
    + + +Total Offset =
      0x1200058024 + +
    + +
    + + + + +
    AXI_HPM0_REGMAP|QSFP_1_2
      0x1200060000
    + +    		 + + + + + +
    + + +Total Offset =
      0x1200068024 + +
    + +
    + + + + +
    AXI_HPM0_REGMAP|QSFP_1_3
      0x1200070000
    + +    		 + + + + + +
    + + +Total Offset =
      0x1200078024 + +
    + +

    + +

    Initial Value not specified +

    + +

    This register is defined in HDL source file uhd_regs.v.

    + +
    + +
    + +
    +

    Only valid if the protocol is Aurora.

    + +
    + +
    + +
    + + +

    Offset 0x0028: AURORA_BIST_CHECKER_SAMPS Register (R|W)

    + + (show extended info) +
    + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + +
    + + + +
    Port ARM_M_AXI_HPM0
    + +    		 + + + + +
    AXI_HPM0_REGMAP|QSFP_0_0
      0x1200000000
    + +    		 + + + + +
    QSFP_REGMAP|NIXGE
      0x008000
    + +    		 + + + + +
    AURORA_BIST_CHECKER_SAMPS
      offset=0x0028
    + +    		 + + + + + +
    + + +Total Offset =
      0x1200008028 + +
    + +
    + + + + +
    AXI_HPM0_REGMAP|QSFP_0_1
      0x1200010000
    + +    		 + + + + + +
    + + +Total Offset =
      0x1200018028 + +
    + +
    + + + + +
    AXI_HPM0_REGMAP|QSFP_0_2
      0x1200020000
    + +    		 + + + + + +
    + + +Total Offset =
      0x1200028028 + +
    + +
    + + + + +
    AXI_HPM0_REGMAP|QSFP_0_3
      0x1200030000
    + +    		 + + + + + +
    + + +Total Offset =
      0x1200038028 + +
    + +
    + + + + +
    AXI_HPM0_REGMAP|QSFP_1_0
      0x1200040000
    + +    		 + + + + + +
    + + +Total Offset =
      0x1200048028 + +
    + +
    + + + + +
    AXI_HPM0_REGMAP|QSFP_1_1
      0x1200050000
    + +    		 + + + + + +
    + + +Total Offset =
      0x1200058028 + +
    + +
    + + + + +
    AXI_HPM0_REGMAP|QSFP_1_2
      0x1200060000
    + +    		 + + + + + +
    + + +Total Offset =
      0x1200068028 + +
    + +
    + + + + +
    AXI_HPM0_REGMAP|QSFP_1_3
      0x1200070000
    + +    		 + + + + + +
    + + +Total Offset =
      0x1200078028 + +
    + +

    + +

    Initial Value not specified +

    + +

    This register is defined in HDL source file uhd_regs.v.

    + +
    + +
    + +
    +

    Only valid if the protocol is Aurora.

    + +
    + +
    + +
    + + +

    Offset 0x002C: AURORA_BIST_CHECKER_ERRORS Register (R|W)

    + + (show extended info) +
    + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + +
    + + + +
    Port ARM_M_AXI_HPM0
    + +    		 + + + + +
    AXI_HPM0_REGMAP|QSFP_0_0
      0x1200000000
    + +    		 + + + + +
    QSFP_REGMAP|NIXGE
      0x008000
    + +    		 + + + + +
    AURORA_BIST_CHECKER_ERRORS
      offset=0x002C
    + +    		 + + + + + +
    + + +Total Offset =
      0x120000802C + +
    + +
    + + + + +
    AXI_HPM0_REGMAP|QSFP_0_1
      0x1200010000
    + +    		 + + + + + +
    + + +Total Offset =
      0x120001802C + +
    + +
    + + + + +
    AXI_HPM0_REGMAP|QSFP_0_2
      0x1200020000
    + +    		 + + + + + +
    + + +Total Offset =
      0x120002802C + +
    + +
    + + + + +
    AXI_HPM0_REGMAP|QSFP_0_3
      0x1200030000
    + +    		 + + + + + +
    + + +Total Offset =
      0x120003802C + +
    + +
    + + + + +
    AXI_HPM0_REGMAP|QSFP_1_0
      0x1200040000
    + +    		 + + + + + +
    + + +Total Offset =
      0x120004802C + +
    + +
    + + + + +
    AXI_HPM0_REGMAP|QSFP_1_1
      0x1200050000
    + +    		 + + + + + +
    + + +Total Offset =
      0x120005802C + +
    + +
    + + + + +
    AXI_HPM0_REGMAP|QSFP_1_2
      0x1200060000
    + +    		 + + + + + +
    + + +Total Offset =
      0x120006802C + +
    + +
    + + + + +
    AXI_HPM0_REGMAP|QSFP_1_3
      0x1200070000
    + +    		 + + + + + +
    + + +Total Offset =
      0x120007802C + +
    + +

    + +

    Initial Value not specified +

    + +

    This register is defined in HDL source file uhd_regs.v.

    + +
    + +
    + +
    +

    Only valid if the protocol is Aurora.

    + +
    + +
    + +
    + +

    XGE_MAC_WINDOW

    +
    +
    +
    + + +

    Offset 0x1000: XGE_MAC Window (R|W)

    +

      Target regmap = XGE_MAC_REGMAP

    + (show extended info) +
    + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + +
    + + + +
    Port ARM_M_AXI_HPM0
    + +    		 + + + + +
    AXI_HPM0_REGMAP|QSFP_0_0
      0x1200000000
    + +    		 + + + + +
    QSFP_REGMAP|NIXGE
      0x008000
    + +    		 + + + + + +
    XGE_MAC
      offset=0x1000
      size=0x1000 (4 Kbytes)
    + +    		 + + + + + +
    + + +Total Offset =
      0x1200009000 + +
    + +
    + + + + +
    AXI_HPM0_REGMAP|QSFP_0_1
      0x1200010000
    + +    		 + + + + + +
    + + +Total Offset =
      0x1200019000 + +
    + +
    + + + + +
    AXI_HPM0_REGMAP|QSFP_0_2
      0x1200020000
    + +    		 + + + + + +
    + + +Total Offset =
      0x1200029000 + +
    + +
    + + + + +
    AXI_HPM0_REGMAP|QSFP_0_3
      0x1200030000
    + +    		 + + + + + +
    + + +Total Offset =
      0x1200039000 + +
    + +
    + + + + +
    AXI_HPM0_REGMAP|QSFP_1_0
      0x1200040000
    + +    		 + + + + + +
    + + +Total Offset =
      0x1200049000 + +
    + +
    + + + + +
    AXI_HPM0_REGMAP|QSFP_1_1
      0x1200050000
    + +    		 + + + + + +
    + + +Total Offset =
      0x1200059000 + +
    + +
    + + + + +
    AXI_HPM0_REGMAP|QSFP_1_2
      0x1200060000
    + +    		 + + + + + +
    + + +Total Offset =
      0x1200069000 + +
    + +
    + + + + +
    AXI_HPM0_REGMAP|QSFP_1_3
      0x1200070000
    + +    		 + + + + + +
    + + +Total Offset =
      0x1200079000 + +
    + +

    + +

    This window is defined in HDL source file uhd_regs.v.

    + +
    + +
    + +
    +
    + +
    + +
    + +
    + +
    + +
    + +

    PL_CPLD_BASE_REGMAP

    + +

    MB_CPLD_LED_REGS

    + Register Map to control QSFP LEDs. +
    + + +

    Offset 0x0020: LED_REGISTER Register (R|W)

    + + (show extended info) +
    + + + + + + + + + + + + + + + + + + + +
    + + + +
    Port ARM_M_AXI_HPM0
    + +    		 + + + + +
    AXI_HPM0_REGMAP|MPM_ENDPOINT
      0x1000080000
    + +    		 + + + + +
    PL_CPLD_REGMAP|MB_CPLD
      0x008000
    + +    		 + + + + +
    MB_CPLD_PL_REGMAP|PL_REGISTERS
      0x000000
    + +    		 + + + + +
    LED_REGISTER
      offset=0x0020
    + +    		 + + + + + +
    + + +Total Offset =
      0x1000088020 + +
    + +

    + +

    Initial Value not specified +

    + +

    This register is defined in HDL source file pl_cpld_regs.v.

    + +
    + +
    + +Provides to the LEDs of the QSFP ports. + Write access will directly change the LED status. + The LED lights up if the corresponding bit is set. + +
    + + + + + + + + + + + + + + + + + + + + + + + + +
    BitsName
    15..12 +

    QSFP1_LED_ACTIVE

    +

    Active LEDs of QSFP port 1

    + +
    11..8 +

    QSFP1_LED_LINK

    +

    Link LEDs of QSFP port 1

    + +
    7..4 +

    QSFP0_LED_ACTIVE

    +

    Active LEDs of QSFP port 0

    + +
    3..0 +

    QSFP0_LED_LINK

    +

    Link LEDs of QSFP port 0

    + +
    + +
    + +
    + +

    PL_CMI_REGS

    + Cable present status register. +
    + + +

    Offset 0x0030: CABLE_PRESENT_REG Register (R|W)

    + + (show extended info) +
    + + + + + + + + + + + + + + + + + + + +
    + + + +
    Port ARM_M_AXI_HPM0
    + +    		 + + + + +
    AXI_HPM0_REGMAP|MPM_ENDPOINT
      0x1000080000
    + +    		 + + + + +
    PL_CPLD_REGMAP|MB_CPLD
      0x008000
    + +    		 + + + + +
    MB_CPLD_PL_REGMAP|PL_REGISTERS
      0x000000
    + +    		 + + + + +
    CABLE_PRESENT_REG
      offset=0x0030
    + +    		 + + + + + +
    + + +Total Offset =
      0x1000088030 + +
    + +

    + +

    Initial Value not specified +

    + +

    This register is defined in HDL source file pl_cpld_regs.v.

    + +
    + +
    + +Information from FPGA about the cable present status. + +
    + + + + + + + + + + + + + + +
    BitsName
    1 +

    IPASS1_CABLE_PRESENT

    +

    Set to 1 if cable present in iPass 1 connector.

    + +
    0 +

    IPASS0_CABLE_PRESENT

    +

    Set to 1 if cable present in iPass 0 connector.

    + +
    + +
    + +
    + +

    PL_CPLD_BASE_REGS

    + Basic registers containing version and capabilities information. +
    + + +

    Offset 0x0000: SIGNATURE_REGISTER Register (R)

    + + (show extended info) +
    + + + + + + + + + + + + + + + + + + + +
    + + + +
    Port ARM_M_AXI_HPM0
    + +    		 + + + + +
    AXI_HPM0_REGMAP|MPM_ENDPOINT
      0x1000080000
    + +    		 + + + + +
    PL_CPLD_REGMAP|MB_CPLD
      0x008000
    + +    		 + + + + +
    MB_CPLD_PL_REGMAP|PL_REGISTERS
      0x000000
    + +    		 + + + + +
    SIGNATURE_REGISTER
      offset=0x0000
    + +    		 + + + + + +
    + + +Total Offset =
      0x1000088000 + +
    + +

    + +

    Initial Value not specified +

    + +

    This register is defined in HDL source file pl_cpld_regs.v.

    + +
    + +
    + +Contains the product's signature. + +
    + + + + + + + + + +
    BitsName
    31..0 +

    PRODUCT_SIGNATURE

    +

    Fixed value PL_CPLD_SIGNATURE of CONSTANTS_REGMAP

    + +
    + +
    + +
    + + +

    Offset 0x0004: REVISION_REGISTER Register (R)

    + + (show extended info) +
    + + + + + + + + + + + + + + + + + + + +
    + + + +
    Port ARM_M_AXI_HPM0
    + +    		 + + + + +
    AXI_HPM0_REGMAP|MPM_ENDPOINT
      0x1000080000
    + +    		 + + + + +
    PL_CPLD_REGMAP|MB_CPLD
      0x008000
    + +    		 + + + + +
    MB_CPLD_PL_REGMAP|PL_REGISTERS
      0x000000
    + +    		 + + + + +
    REVISION_REGISTER
      offset=0x0004
    + +    		 + + + + + +
    + + +Total Offset =
      0x1000088004 + +
    + +

    + +

    Initial Value not specified +

    + +

    This register is defined in HDL source file pl_cpld_regs.v.

    + +
    + +
    + +Contains the CPLD revision (see CPLD_REVISION of CONSTANTS_REGMAP) + +
    + + + + + + + + + + + + + + + + + + + + + + + + +
    BitsName
    31..24 +

    REVISION_YY

    +

    Contains revision year code.

    + +
    23..16 +

    REVISION_MM

    +

    Contains revision month code.

    + +
    15..8 +

    REVISION_DD

    +

    Contains revision day code.

    + +
    7..0 +

    REVISION_HH

    +

    Contains revision hour code.

    + +
    + +
    + +
    + + +

    Offset 0x0008: OLDEST_COMPATIBLE_REVISION_REGISTER Register (R)

    + + (show extended info) +
    + + + + + + + + + + + + + + + + + + + +
    + + + +
    Port ARM_M_AXI_HPM0
    + +    		 + + + + +
    AXI_HPM0_REGMAP|MPM_ENDPOINT
      0x1000080000
    + +    		 + + + + +
    PL_CPLD_REGMAP|MB_CPLD
      0x008000
    + +    		 + + + + +
    MB_CPLD_PL_REGMAP|PL_REGISTERS
      0x000000
    + +    		 + + + + +
    OLDEST_COMPATIBLE_REVISION_REGISTER
      offset=0x0008
    + +    		 + + + + + +
    + + +Total Offset =
      0x1000088008 + +
    + +

    + +

    Initial Value not specified +

    + +

    This register is defined in HDL source file pl_cpld_regs.v.

    + +
    + +
    + +This register returns (in YYMMDDHH format) the oldest revision + that is still compatible with this one. Compatible means that + registers or register bits may have been added, but not + modified or deleted (see OLDEST_CPLD_REVISION of CONSTANTS_REGMAP). + +
    + + + + + + + + + + + + + + + + + + + + + + + + +
    BitsName
    31..24 +

    OLD_REVISION_YY

    +

    Contains revision year code.

    + +
    23..16 +

    OLD_REVISION_MM

    +

    Contains revision month code.

    + +
    15..8 +

    OLD_REVISION_DD

    +

    Contains revision day code.

    + +
    7..0 +

    OLD_REVISION_HH

    +

    Contains revision hour code.

    + +
    + +
    + +
    + + +

    Offset 0x000C: SCRATCH_REGISTER Register (R|W)

    + + (show extended info) +
    + + + + + + + + + + + + + + + + + + + +
    + + + +
    Port ARM_M_AXI_HPM0
    + +    		 + + + + +
    AXI_HPM0_REGMAP|MPM_ENDPOINT
      0x1000080000
    + +    		 + + + + +
    PL_CPLD_REGMAP|MB_CPLD
      0x008000
    + +    		 + + + + +
    MB_CPLD_PL_REGMAP|PL_REGISTERS
      0x000000
    + +    		 + + + + +
    SCRATCH_REGISTER
      offset=0x000C
    + +    		 + + + + + +
    + + +Total Offset =
      0x100008800C + +
    + +

    + +

    Initial Value not specified +

    + +

    This register is defined in HDL source file pl_cpld_regs.v.

    + +
    + +
    + +Read/write register for general software use. + +
    + +
    + +
    + + +

    Offset 0x0010: GIT_HASH_REGISTER Register (R)

    + + (show extended info) +
    + + + + + + + + + + + + + + + + + + + +
    + + + +
    Port ARM_M_AXI_HPM0
    + +    		 + + + + +
    AXI_HPM0_REGMAP|MPM_ENDPOINT
      0x1000080000
    + +    		 + + + + +
    PL_CPLD_REGMAP|MB_CPLD
      0x008000
    + +    		 + + + + +
    MB_CPLD_PL_REGMAP|PL_REGISTERS
      0x000000
    + +    		 + + + + +
    GIT_HASH_REGISTER
      offset=0x0010
    + +    		 + + + + + +
    + + +Total Offset =
      0x1000088010 + +
    + +

    + +

    Initial Value not specified +

    + +

    This register is defined in HDL source file pl_cpld_regs.v.

    + +
    + +
    + +Git hash of commit used to build this image.
    + Value equals 0xDEADBEEF if the git hash was not used during synthesis. + +
    + + + + + + + + + + + + + + +
    BitsName
    31..28 +

    GIT_CLEAN

    +

    0x0 in case the git status was clean
    + 0xF in case there were uncommitted changes

    + +
    27..0 +

    GIT_HASH

    +

    7 hex digit hash code of the commit

    + +
    + +
    + +
    + +
    + +
    + +

    PL_CPLD_REGMAP

    + This register map is available from the PS via AXI and MPM endpoint. + Its size is 128K (17 bits). Only the 17 LSBs are used as address in this documentation. +

    PL_CPLD_WINDOWS

    + +
    + + +

    Offset 0x0000: BASE Window (R|W)

    +

      Target regmap = CPLD_INTERFACE_REGMAP

    + (show extended info) +
    + + + + + + + + + + + + + + + +
    + + + +
    Port ARM_M_AXI_HPM0
    + +    		 + + + + +
    AXI_HPM0_REGMAP|MPM_ENDPOINT
      0x1000080000
    + +    		 + + + + + +
    BASE
      offset=0x0000
      size=0x40 (64 bytes)
    + +    		 + + + + + +
    + + +Total Offset =
      0x1000080000 + +
    + +

    + +

    This window is defined in HDL source file cpld_interface.v.

    + +
    + +
    + + + +
    + +
    + +
    + + +

    Offset 0x8000: MB_CPLD Window (R|W)

    +

      Target regmap = MB_CPLD_PL_REGMAP

    + (show extended info) +
    + + + + + + + + + + + + + + + +
    + + + +
    Port ARM_M_AXI_HPM0
    + +    		 + + + + +
    AXI_HPM0_REGMAP|MPM_ENDPOINT
      0x1000080000
    + +    		 + + + + + +
    MB_CPLD
      offset=0x8000
      size=0x8000 (32 Kbytes)
    + +    		 + + + + + +
    + + +Total Offset =
      0x1000088000 + +
    + +

    + +

    This window is defined in HDL source file cpld_interface.v.

    + +
    + +
    + +All registers of the MB CPLD (PL part). + +
    + +
    + +
    + + +

    Offset 0x10000: DB0_CPLD Window (R|W)

    + + (show extended info) +
    + + + + + + + + + + + + + + + +
    + + + +
    Port ARM_M_AXI_HPM0
    + +    		 + + + + +
    AXI_HPM0_REGMAP|MPM_ENDPOINT
      0x1000080000
    + +    		 + + + + + +
    DB0_CPLD
      offset=0x10000
      size=0x8000 (32 Kbytes)
    + +    		 + + + + + +
    + + +Total Offset =
      0x1000090000 + +
    + +

    + +

    This window is defined in HDL source file cpld_interface.v.

    + +
    + +
    + +All registers of the first DB CPLD. Register map will be added later on. + +
    + +
    + +
    + + +

    Offset 0x18000: DB1_CPLD Window (R|W)

    + + (show extended info) +
    + + + + + + + + + + + + + + + +
    + + + +
    Port ARM_M_AXI_HPM0
    + +    		 + + + + +
    AXI_HPM0_REGMAP|MPM_ENDPOINT
      0x1000080000
    + +    		 + + + + + +
    DB1_CPLD
      offset=0x18000
      size=0x8000 (32 Kbytes)
    + +    		 + + + + + +
    + + +Total Offset =
      0x1000098000 + +
    + +

    + +

    This window is defined in HDL source file cpld_interface.v.

    + +
    + +
    + +All registers of the second DB CPLD. Register map will be added later on. + +
    + +
    + +
    + +
    + +
    + +

    PL_DMA_MASTER_REGMAP

    + This is a regmap to document the different ports that have access to the PS system memory. + Each port may have different restrictions on system memory. See the corresponding window + for details +

    HPC0_DMA

    + +
    + + +

    Offset 0x0000: AXI_HPC0_WINDOW Window (R|W)

    +

      Target port = X4XX_FPGA|ARM_S_AXI_HPC0

    + (show extended info) +
    + + + + + + + + + +
    + + + + + +
    AXI_HPC0_WINDOW
      offset=0x0000
      size=0x10000000000 (1024 Gbytes)
    + +

    + +

    This window is defined in HDL source file common_regs.v.

    + +
    + +
    + +The HPC0 port of the PS is used for general purpose cache-coherent accesses + to the PS system memory. Different applications may use it for different + purposes. Its access is configured as follows:
    + + + + + + +
    Offset Size Description
    0x0008000000000x000800000000DDR_HIGH
    0x00000000 0x80000000 DDR_LOW
    0xFF000000 0x01000000 LPS_OCM
    0xC0000000 0x20000000 QSPI
    + +
    + +
    + +
    + +

    HPC1_DMA

    + +
    + + +

    Offset 0x0000: AXI_HPC1_WINDOW Window (R|W)

    +

      Target port = X4XX_FPGA|ARM_S_AXI_HPC1

    + (show extended info) +
    + + + + + + + + + +
    + + + + + +
    AXI_HPC1_WINDOW
      offset=0x0000
      size=0x1000000000 (64 Gbytes)
    + +

    + +

    This window is defined in HDL source file common_regs.v.

    + +
    + +
    + +The HPC1 port of the PS is connected to the Ethernet DMA module. Three slave + interfaces are lumped together in this window: scatter-gather, dma-rx, and dma-tx. + Its access is configured as follows:
    + + + + + +
    Offset Size Description
    0x0008000000000x000800000000DDR_HIGH
    0x00000000 0x80000000 DDR_LOW
    0xC0000000 0x20000000 QSPI
    + +
    + +
    + +
    + +
    + +
    + +

    PS_CPLD_BASE_REGMAP

    + +

    DIO_REGS

    + Registers to control the GPIO buffer direction on the DIO board connected to the FPGA. + Make sure the GPIO lines between FPGA and GPIO board are not driven by two drivers. + Set the direction in the FPGA's DIO register appropriately. +
    + + +

    Offset 0x0030: DIO_DIRECTION_REGISTER Register (R|W)

    + + (show extended info) +
    + + + + + + + + + + + + + + + +
    + + + +
    Port ARM_SPI1_CS3
    + +    		 + + + + +
    MB_CPLD_PS_REGMAP|PS_REGISTERS
      0x000000
    + +    		 + + + + +
    DIO_DIRECTION_REGISTER
      offset=0x0030
    + +    		 + + + + + +
    + + +Total Offset =
      0x000030 + +
    + +

    + +

    Initial Value = 0x00000000 +

    + +

    This register is defined in HDL source file ps_cpld_regs.v.

    + +
    + +
    + +Set the direction of FPGA buffer connected to DIO ports on the DIO board.
    + Each bit represents one signal line. 0 = line is an input to the FPGA, 1 = line is an output driven by the FPGA. + +
    + + + + + + + + + + + + + + + + + + + + + + + + +
    BitsName
    31..28 +

    Reserved

    +

    + +
    27..16 +

    DIO_DIRECTION_B   (initialvalue=0)

    +

    + +
    15..12 +

    Reserved

    +

    + +
    11..0 +

    DIO_DIRECTION_A   (initialvalue=0)

    +

    + +
    + +
    + +
    + +

    PS_CMI_REGS

    + Cable present status register. +
    + + +

    Offset 0x0034: SERIAL_NUM_LOW_REG Register (R|W)

    + + (show extended info) +
    + + + + + + + + + + + + + + + +
    + + + +
    Port ARM_SPI1_CS3
    + +    		 + + + + +
    MB_CPLD_PS_REGMAP|PS_REGISTERS
      0x000000
    + +    		 + + + + +
    SERIAL_NUM_LOW_REG
      offset=0x0034
    + +    		 + + + + + +
    + + +Total Offset =
      0x000034 + +
    + +

    + +

    Initial Value not specified +

    + +

    This register is defined in HDL source file ps_cpld_regs.v.

    + +
    + +
    + +Least significant bytes of 5 byte serial number. + +
    + +
    + +
    + + +

    Offset 0x0038: SERIAL_NUM_HIGH_REG Register (R|W)

    + + (show extended info) +
    + + + + + + + + + + + + + + + +
    + + + +
    Port ARM_SPI1_CS3
    + +    		 + + + + +
    MB_CPLD_PS_REGMAP|PS_REGISTERS
      0x000000
    + +    		 + + + + +
    SERIAL_NUM_HIGH_REG
      offset=0x0038
    + +    		 + + + + + +
    + + +Total Offset =
      0x000038 + +
    + +

    + +

    Initial Value not specified +

    + +

    This register is defined in HDL source file ps_cpld_regs.v.

    + +
    + +
    + +Most significant byte of 5 byte serial number. + +
    + +
    + +
    + + +

    Offset 0x003C: CMI_CONTROL_STATUS Register (R|W)

    + + (show extended info) +
    + + + + + + + + + + + + + + + +
    + + + +
    Port ARM_SPI1_CS3
    + +    		 + + + + +
    MB_CPLD_PS_REGMAP|PS_REGISTERS
      0x000000
    + +    		 + + + + +
    CMI_CONTROL_STATUS
      offset=0x003C
    + +    		 + + + + + +
    + + +Total Offset =
      0x00003C + +
    + +

    + +

    Initial Value not specified +

    + +

    This register is defined in HDL source file ps_cpld_regs.v.

    + +
    + +
    + +Control CMI communication and delivers information on the CMI link status. + +
    + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + +
    BitsName
    31r +

    OTHER_SIDE_DETECTED

    +

    1 if an upstream CMI device has been detected.

    + +
    30..24 +

    Reserved

    +

    + +
    23..16 +

    Reserved

    +

    + +
    15..8 +

    Reserved

    +

    + +
    7..1 +

    Reserved

    +

    + +
    0 +

    CMI_READY

    +

    Set if the device is ready to establish a PCI-Express link (affects CMI_CLP_READY bit).

    + +
    + +
    + +
    + +

    PS_CONTROL_REGS

    + Register Map to control MB CPLD functions. +
    + + +

    Offset 0x0020: PL_DB_REGISTER Register (R|W)

    + + (show extended info) +
    + + + + + + + + + + + + + + + +
    + + + +
    Port ARM_SPI1_CS3
    + +    		 + + + + +
    MB_CPLD_PS_REGMAP|PS_REGISTERS
      0x000000
    + +    		 + + + + +
    PL_DB_REGISTER
      offset=0x0020
    + +    		 + + + + + +
    + + +Total Offset =
      0x000020 + +
    + +

    + +

    Initial Value not specified +

    + +

    This register is defined in HDL source file ps_cpld_regs.v.

    + +
    + +
    + +Register to control the PL part DB SPI connection and reset generation. + The DB connection is clocked with PLL reference clock. Ensure this clock is stable + and enabled before starting any SPI request. + The PLL reference clock can be disabled if both DB connections are disabled or inactive. + To enable the DB connection, enable clock with one write access and release + reset with the next write access. + To disable the DB connection, assert reset with one write access and + disable clocks with the next write access. + +
    + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + +
    BitsName
    31..24 +

    Reserved

    +

    + +
    23..22 +

    Reserved

    +

    + +
    21w +

    ASSERT_RESET_DB1

    +

    Writing with this flag set asserts reset for DB 1 (overrides RELEASE_RESET_DB1)

    + +
    20w +

    ASSERT_RESET_DB0

    +

    Writing with this flag set asserts reset for DB 0 (overrides RELEASE_RESET_DB0)

    + +
    19..18 +

    Reserved

    +

    + +
    17w +

    RELEASE_RESET_DB1

    +

    Writing with this flag set releases DB 1 reset. (may be overwritten by ASSERT_RESET_DB1)

    + +
    16w +

    RELEASE_RESET_DB0

    +

    Writing with this flag set releases DB 0 reset. (may be overwritten by ASSERT_RESET_DB0)

    + +
    15 +

    Reserved

    +

    + +
    14w +

    DISABLE_PLL_REF_CLOCK

    +

    Writing with this flag set disables the PLL reference clock (overrides ENABLE_PLL_REF_CLOCK). Assert this flag to reconfigure the clock.

    + +
    13w +

    DISABLE_CLOCK_DB1

    +

    Writing with this flag set disables DB 1 clock forwarding (overrides ENABLE_CLOCK_DB1)

    + +
    12w +

    DISABLE_CLOCK_DB0

    +

    Writing with this flag set disables DB 0 clock forwarding (overrides ENABLE_CLOCK_DB0)

    + +
    11 +

    Reserved

    +

    + +
    10w +

    ENABLE_PLL_REF_CLOCK

    +

    Writing with this flag set enables the PLL reference clock. Assert this flag after PLL reference clock is stable. (may be overwritten by DISABLE_PLL_REF_CLOCK)

    + +
    9w +

    ENABLE_CLOCK_DB1

    +

    Writing with this flag set enables DB 1 clock forwarding. (may be overwritten by DISABLE_CLOCK_DB1)

    + +
    8w +

    ENABLE_CLOCK_DB0

    +

    Writing with this flag set enables DB 0 clock forwarding. (may be overwritten by DISABLE_CLOCK_DB0)

    + +
    7..6 +

    Reserved

    +

    + +
    5r +

    DB1_RESET_ASSERTED

    +

    Indicates that reset is asserted for DB 1.

    + +
    4r +

    DB0_RESET_ASSERTED

    +

    Indicates that reset is asserted for DB 0.

    + +
    3 +

    Reserved

    +

    + +
    2r +

    PLL_REF_CLOCK_ENABLED

    +

    Indicates if the PLL reference clock for the PL interface is enabled.

    + +
    1r +

    DB1_CLOCK_ENABLED

    +

    Indicates if a clock is forwarded to DB 1.

    + +
    0r +

    DB0_CLOCK_ENABLED

    +

    Indicates if a clock is forwarded to DB 0.

    + +
    + +
    + +
    + +

    PS_CPLD_BASE_REGS

    + Basic registers containing version and capabilites information. +
    + + +

    Offset 0x0000: SIGNATURE_REGISTER Register (R)

    + + (show extended info) +
    + + + + + + + + + + + + + + + +
    + + + +
    Port ARM_SPI1_CS3
    + +    		 + + + + +
    MB_CPLD_PS_REGMAP|PS_REGISTERS
      0x000000
    + +    		 + + + + +
    SIGNATURE_REGISTER
      offset=0x0000
    + +    		 + + + + + +
    + + +Total Offset =
      0x000000 + +
    + +

    + +

    Initial Value not specified +

    + +

    This register is defined in HDL source file ps_cpld_regs.v.

    + +
    + +
    + +Contains the product's signature. + +
    + + + + + + + + + +
    BitsName
    31..0 +

    PRODUCT_SIGNATURE

    +

    Fixed value PS_CPLD_SIGNATURE of CONSTANTS_REGMAP

    + +
    + +
    + +
    + + +

    Offset 0x0004: REVISION_REGISTER Register (R)

    + + (show extended info) +
    + + + + + + + + + + + + + + + +
    + + + +
    Port ARM_SPI1_CS3
    + +    		 + + + + +
    MB_CPLD_PS_REGMAP|PS_REGISTERS
      0x000000
    + +    		 + + + + +
    REVISION_REGISTER
      offset=0x0004
    + +    		 + + + + + +
    + + +Total Offset =
      0x000004 + +
    + +

    + +

    Initial Value not specified +

    + +

    This register is defined in HDL source file ps_cpld_regs.v.

    + +
    + +
    + +Contains the CPLD revision (see CPLD_REVISION of CONSTANTS_REGMAP). + +
    + + + + + + + + + + + + + + + + + + + + + + + + +
    BitsName
    31..24 +

    REVISION_YY

    +

    Contains revision year code.

    + +
    23..16 +

    REVISION_MM

    +

    Contains revision month code.

    + +
    15..8 +

    REVISION_DD

    +

    Contains revision day code.

    + +
    7..0 +

    REVISION_HH

    +

    Contains revision hour code.

    + +
    + +
    + +
    + + +

    Offset 0x0008: OLDEST_COMPATIBLE_REVISION_REGISTER Register (R)

    + + (show extended info) +
    + + + + + + + + + + + + + + + +
    + + + +
    Port ARM_SPI1_CS3
    + +    		 + + + + +
    MB_CPLD_PS_REGMAP|PS_REGISTERS
      0x000000
    + +    		 + + + + +
    OLDEST_COMPATIBLE_REVISION_REGISTER
      offset=0x0008
    + +    		 + + + + + +
    + + +Total Offset =
      0x000008 + +
    + +

    + +

    Initial Value not specified +

    + +

    This register is defined in HDL source file ps_cpld_regs.v.

    + +
    + +
    + +This register returns (in YYMMDDHH format) the oldest revision + that is still compatible with this one. Compatible means that + registers or register bits may have been added, but not + modified or deleted (see OLDEST_CPLD_REVISION of CONSTANTS_REGMAP). + +
    + + + + + + + + + + + + + + + + + + + + + + + + +
    BitsName
    31..24 +

    OLD_REVISION_YY

    +

    Contains revision year code.

    + +
    23..16 +

    OLD_REVISION_MM

    +

    Contains revision month code.

    + +
    15..8 +

    OLD_REVISION_DD

    +

    Contains revision day code.

    + +
    7..0 +

    OLD_REVISION_HH

    +

    Contains revision hour code.

    + +
    + +
    + +
    + + +

    Offset 0x000C: SCRATCH_REGISTER Register (R|W)

    + + (show extended info) +
    + + + + + + + + + + + + + + + +
    + + + +
    Port ARM_SPI1_CS3
    + +    		 + + + + +
    MB_CPLD_PS_REGMAP|PS_REGISTERS
      0x000000
    + +    		 + + + + +
    SCRATCH_REGISTER
      offset=0x000C
    + +    		 + + + + + +
    + + +Total Offset =
      0x00000C + +
    + +

    + +

    Initial Value not specified +

    + +

    This register is defined in HDL source file ps_cpld_regs.v.

    + +
    + +
    + +Read/write register for general software use. + +
    + +
    + +
    + + +

    Offset 0x0010: GIT_HASH_REGISTER Register (R)

    + + (show extended info) +
    + + + + + + + + + + + + + + + +
    + + + +
    Port ARM_SPI1_CS3
    + +    		 + + + + +
    MB_CPLD_PS_REGMAP|PS_REGISTERS
      0x000000
    + +    		 + + + + +
    GIT_HASH_REGISTER
      offset=0x0010
    + +    		 + + + + + +
    + + +Total Offset =
      0x000010 + +
    + +

    + +

    Initial Value not specified +

    + +

    This register is defined in HDL source file ps_cpld_regs.v.

    + +
    + +
    + +Git hash of commit used to build this image.
    + Value equals 0xDEADBEEF if the git hash was not used during synthesis. + +
    + + + + + + + + + + + + + + +
    BitsName
    31..28 +

    GIT_CLEAN

    +

    0x0 in case the git status was clean
    + 0xF in case there were uncommitted changes

    + +
    27..0 +

    GIT_HASH

    +

    7 hex digit hash code of the commit

    + +
    + +
    + +
    + +
    + +
    + +

    PS_POWER_REGMAP

    + +

    PS_POWER_REGS

    + Registers to control power supplies on the motherboard. +
    + + +

    Offset 0x0000: IPASS_POWER_REG Register (R|W)

    + + (show extended info) +
    + + + + + + + + + + + + + + + +
    + + + +
    Port ARM_SPI1_CS3
    + +    		 + + + + +
    MB_CPLD_PS_REGMAP|POWER_REGISTERS
      0x000060
    + +    		 + + + + +
    IPASS_POWER_REG
      offset=0x0000
    + +    		 + + + + + +
    + + +Total Offset =
      0x000060 + +
    + +

    + +

    Initial Value not specified +

    + +

    This register is defined in HDL source file ps_power_regs.v.

    + +
    + +
    + +Controls the power supplies for the iPass connectors. + +
    + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + +
    BitsName
    31r +

    IPASS_POWER_FAULT1

    +

    Asserted signal indicates a power fault in power switch for iPass + connector 1. Sticky bit. Asserted on occurrence. Reset using + IPASS_CLEAR_POWER_FAULT1.

    + +
    31w +

    IPASS_CLEAR_POWER_FAULT1

    +

    Clear IPASS_POWER_FAULT1.

    + +
    30r +

    IPASS_POWER_FAULT0

    +

    Asserted signal indicates a power fault in power switch for iPass + connector 0. Sticky bit. Asserted on occurrence. Reset using + IPASS_CLEAR_POWER_FAULT0.

    + +
    30w +

    IPASS_CLEAR_POWER_FAULT0

    +

    Clear IPASS_POWER_FAULT0.

    + +
    29..24 +

    Reserved

    +

    + +
    23..16 +

    Reserved

    +

    + +
    15..8 +

    Reserved

    +

    + +
    7..1 +

    Reserved

    +

    + +
    0 +

    IPASS_DISABLE_POWER_BIT

    +

    Set to 1 to disable power for both iPass connectors.

    + +
    + +
    + +
    + + +

    Offset 0x0004: OSC_POWER_REG Register (R|W)

    + + (show extended info) +
    + + + + + + + + + + + + + + + +
    + + + +
    Port ARM_SPI1_CS3
    + +    		 + + + + +
    MB_CPLD_PS_REGMAP|POWER_REGISTERS
      0x000060
    + +    		 + + + + +
    OSC_POWER_REG
      offset=0x0004
    + +    		 + + + + + +
    + + +Total Offset =
      0x000064 + +
    + +

    + +

    Initial Value not specified +

    + +

    This register is defined in HDL source file ps_power_regs.v.

    + +
    + +
    + +Controls the power supplies for the oscillators. + +
    + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + +
    BitsName
    31..24 +

    Reserved

    +

    + +
    23..16 +

    Reserved

    +

    + +
    15..8 +

    Reserved

    +

    + +
    7..2 +

    Reserved

    +

    + +
    1 +

    OSC_122_88

    +

    Enables 5V power switch for the 122.88 MHz oscillator.

    + +
    0 +

    OSC_100

    +

    Enables 5V power switch for the 100 MHz oscillator.

    + +
    + +
    + +
    + +
    + +
    + +

    QSFP_REGMAP

    +
    +
    +

    QSFP_WINDOWS

    +
    +

    Register space for a single QSFP Communication port. This currently breaks into 2 possible configurations

    +
      +
    • 1X10GB Ethernet - Using OpenCore XGE MAC
      • +
    • 1x100GB Ethernet - Using Xilinx CMAC
      • +
    • (future possible) - Xilinx Aurora (various rates and lane widths)
      • +
    • (future possible) - 4X10GB Ethernet
      • +
    +
    + + +

    Offset 0x0000: ETH_DMA Window (R|W)

    +

      Target regmap = DMA_REGMAP

    + (show extended info) +
    + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + +
    + + + +
    Port ARM_M_AXI_HPM0
    + +    		 + + + + +
    AXI_HPM0_REGMAP|QSFP_0_0
      0x1200000000
    + +    		 + + + + + +
    ETH_DMA
      offset=0x0000
      size=0x4000 (16 Kbytes)
    + +    		 + + + + + +
    + + +Total Offset =
      0x1200000000 + +
    + +
    + + + + +
    AXI_HPM0_REGMAP|QSFP_0_1
      0x1200010000
    + +    		 + + + + + +
    + + +Total Offset =
      0x1200010000 + +
    + +
    + + + + +
    AXI_HPM0_REGMAP|QSFP_0_2
      0x1200020000
    + +    		 + + + + + +
    + + +Total Offset =
      0x1200020000 + +
    + +
    + + + + +
    AXI_HPM0_REGMAP|QSFP_0_3
      0x1200030000
    + +    		 + + + + + +
    + + +Total Offset =
      0x1200030000 + +
    + +
    + + + + +
    AXI_HPM0_REGMAP|QSFP_1_0
      0x1200040000
    + +    		 + + + + + +
    + + +Total Offset =
      0x1200040000 + +
    + +
    + + + + +
    AXI_HPM0_REGMAP|QSFP_1_1
      0x1200050000
    + +    		 + + + + + +
    + + +Total Offset =
      0x1200050000 + +
    + +
    + + + + +
    AXI_HPM0_REGMAP|QSFP_1_2
      0x1200060000
    + +    		 + + + + + +
    + + +Total Offset =
      0x1200060000 + +
    + +
    + + + + +
    AXI_HPM0_REGMAP|QSFP_1_3
      0x1200070000
    + +    		 + + + + + +
    + + +Total Offset =
      0x1200070000 + +
    + +

    + +

    This window is defined in HDL source file uhd_regs.v.

    + +
    + +
    + +
    +
    + +
    + +
    + +
    + + +

    Offset 0x8000: NIXGE Window (R|W)

    +

      Target regmap = NIXGE_REGMAP

    + (show extended info) +
    + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + +
    + + + +
    Port ARM_M_AXI_HPM0
    + +    		 + + + + +
    AXI_HPM0_REGMAP|QSFP_0_0
      0x1200000000
    + +    		 + + + + + +
    NIXGE
      offset=0x8000
      size=0x2000 (8 Kbytes)
    + +    		 + + + + + +
    + + +Total Offset =
      0x1200008000 + +
    + +
    + + + + +
    AXI_HPM0_REGMAP|QSFP_0_1
      0x1200010000
    + +    		 + + + + + +
    + + +Total Offset =
      0x1200018000 + +
    + +
    + + + + +
    AXI_HPM0_REGMAP|QSFP_0_2
      0x1200020000
    + +    		 + + + + + +
    + + +Total Offset =
      0x1200028000 + +
    + +
    + + + + +
    AXI_HPM0_REGMAP|QSFP_0_3
      0x1200030000
    + +    		 + + + + + +
    + + +Total Offset =
      0x1200038000 + +
    + +
    + + + + +
    AXI_HPM0_REGMAP|QSFP_1_0
      0x1200040000
    + +    		 + + + + + +
    + + +Total Offset =
      0x1200048000 + +
    + +
    + + + + +
    AXI_HPM0_REGMAP|QSFP_1_1
      0x1200050000
    + +    		 + + + + + +
    + + +Total Offset =
      0x1200058000 + +
    + +
    + + + + +
    AXI_HPM0_REGMAP|QSFP_1_2
      0x1200060000
    + +    		 + + + + + +
    + + +Total Offset =
      0x1200068000 + +
    + +
    + + + + +
    AXI_HPM0_REGMAP|QSFP_1_3
      0x1200070000
    + +    		 + + + + + +
    + + +Total Offset =
      0x1200078000 + +
    + +

    + +

    This window is defined in HDL source file uhd_regs.v.

    + +
    + +
    + +
    +
    + +
    + +
    + +
    + + +

    Offset 0xA000: UIO Window (R|W)

    +

      Target regmap = UIO_REGMAP

    + (show extended info) +
    + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + +
    + + + +
    Port ARM_M_AXI_HPM0
    + +    		 + + + + +
    AXI_HPM0_REGMAP|QSFP_0_0
      0x1200000000
    + +    		 + + + + + +
    UIO
      offset=0xA000
      size=0x2000 (8 Kbytes)
    + +    		 + + + + + +
    + + +Total Offset =
      0x120000A000 + +
    + +
    + + + + +
    AXI_HPM0_REGMAP|QSFP_0_1
      0x1200010000
    + +    		 + + + + + +
    + + +Total Offset =
      0x120001A000 + +
    + +
    + + + + +
    AXI_HPM0_REGMAP|QSFP_0_2
      0x1200020000
    + +    		 + + + + + +
    + + +Total Offset =
      0x120002A000 + +
    + +
    + + + + +
    AXI_HPM0_REGMAP|QSFP_0_3
      0x1200030000
    + +    		 + + + + + +
    + + +Total Offset =
      0x120003A000 + +
    + +
    + + + + +
    AXI_HPM0_REGMAP|QSFP_1_0
      0x1200040000
    + +    		 + + + + + +
    + + +Total Offset =
      0x120004A000 + +
    + +
    + + + + +
    AXI_HPM0_REGMAP|QSFP_1_1
      0x1200050000
    + +    		 + + + + + +
    + + +Total Offset =
      0x120005A000 + +
    + +
    + + + + +
    AXI_HPM0_REGMAP|QSFP_1_2
      0x1200060000
    + +    		 + + + + + +
    + + +Total Offset =
      0x120006A000 + +
    + +
    + + + + +
    AXI_HPM0_REGMAP|QSFP_1_3
      0x1200070000
    + +    		 + + + + + +
    + + +Total Offset =
      0x120007A000 + +
    + +

    + +

    This window is defined in HDL source file uhd_regs.v.

    + +
    + +
    + +
    +
    + +
    + +
    + +
    + + +

    Offset 0xC000: CMAC Window (R|W)

    +

      Target regmap = CMAC_REGMAP

    + (show extended info) +
    + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + +
    + + + +
    Port ARM_M_AXI_HPM0
    + +    		 + + + + +
    AXI_HPM0_REGMAP|QSFP_0_0
      0x1200000000
    + +    		 + + + + + +
    CMAC
      offset=0xC000
      size=0x2000 (8 Kbytes)
    + +    		 + + + + + +
    + + +Total Offset =
      0x120000C000 + +
    + +
    + + + + +
    AXI_HPM0_REGMAP|QSFP_0_1
      0x1200010000
    + +    		 + + + + + +
    + + +Total Offset =
      0x120001C000 + +
    + +
    + + + + +
    AXI_HPM0_REGMAP|QSFP_0_2
      0x1200020000
    + +    		 + + + + + +
    + + +Total Offset =
      0x120002C000 + +
    + +
    + + + + +
    AXI_HPM0_REGMAP|QSFP_0_3
      0x1200030000
    + +    		 + + + + + +
    + + +Total Offset =
      0x120003C000 + +
    + +
    + + + + +
    AXI_HPM0_REGMAP|QSFP_1_0
      0x1200040000
    + +    		 + + + + + +
    + + +Total Offset =
      0x120004C000 + +
    + +
    + + + + +
    AXI_HPM0_REGMAP|QSFP_1_1
      0x1200050000
    + +    		 + + + + + +
    + + +Total Offset =
      0x120005C000 + +
    + +
    + + + + +
    AXI_HPM0_REGMAP|QSFP_1_2
      0x1200060000
    + +    		 + + + + + +
    + + +Total Offset =
      0x120006C000 + +
    + +
    + + + + +
    AXI_HPM0_REGMAP|QSFP_1_3
      0x1200070000
    + +    		 + + + + + +
    + + +Total Offset =
      0x120007C000 + +
    + +

    + +

    This window is defined in HDL source file uhd_regs.v.

    + +
    + +
    + +
    +
    + +
    + +
    + +
    + +
    + +
    + +

    RADIO_CTRLPORT_REGMAP

    + +

    RADIO_CTRLPORT_WINDOWS

    + Each radio's CtrlPort peripheral interface is divided into the + following memory spaces. Note that the CtrlPort peripheral interface + starts at offset 0x80000 in the RFNoC Radio block's register space. +
    + + +

    Offset 0x0000: DB_WINDOW Window (R|W)

    + + (show extended info) +
    + + + + + + + + + +
    + + + + + +
    DB_WINDOW
      offset=0x0000
      size=0x8000 (32 Kbytes)
    + +

    + +

    This window is defined in HDL source file rfdc_timing_control.v.

    + +
    + +
    + +Daughterboard GPIO interface. Register access within this space + is directed to the associated daughterboard CPLD. + +
    + +
    + +
    + + +

    Offset 0x8000: RFDC_TIMING_WINDOW Window (R|W)

    +

      Target regmap = RFDC_TIMING_REGMAP

    + (show extended info) +
    + + + + + + + + + +
    + + + + + +
    RFDC_TIMING_WINDOW
      offset=0x8000
      size=0x8000 (32 Kbytes)
    + +

    + +

    This window is defined in HDL source file rfdc_timing_control.v.

    + +
    + +
    + +RFDC timing control interface. + +
    + +
    + +
    + +
    + +
    + +

    RECONFIG_REGMAP

    + +

    RECONFIG_REGS

    + These registers are used to upload and verify a new primary image to the + Max 10 FPGA on-chip flash when configured to support dual configuration + images. The steps below outline the process of verifying/preparing the + new image to be written, erasing the current image, writing the new + image, and verifying the new image was successfully written. +

    Prepare the data... +

    1. The Max 10 FPGA build should generate a *cfm0_auto.rpd + file The *.rpd file is a "raw programming + data" file holding all data related to the + configuration image (CFM0). There are two + important items to note regarding the addresses. + First the *rpd data uses byte addresses. + Second, the start/end addresses defined by + FLASH_PRIMARY_IMAGE_ADDR_ENUM are 32-bit word addresses

      2. +

    2. As a sanity check, verify the size of the raw + programming data for CFM0 correspond to the address + range of FLASH_PRIMARY_IMAGE_ADDR_ENUM. Do this by + reading the values from FLASH_CFM0_START_ADDR_REG and + FLASH_CFM0_END_ADDR, subtract both values, add one and + multiply by four. +

      3. +

    3. Having passed the sanity check the *.rpd data must + now be manipulated into the form required by Altera's + on-chip flash IP. Two operations must be performed. + First the data must be converted from bytes to 32-bit + words. Second the bit order must be reversed. This is + illustrated in in the following table which shows byte + address and data from the *.rpd file compared to the + word address and data to be written to the on-chip + flash. + + + + + + + + + + +
      .Map Addr.Map DataFlash AddrFlash Data
      0x2B8000x010xAC000x8040C020
      0x2B8010x02
      0x2B8020x03
      0x2B8030x04
      0x2B8040x050xAC010xA060E010
      0x2B8050x06
      0x2B8060x07
      0x2B8070x08
      +

      4. +

    4. The resulting set of flash address data pairs should + be used when writing FLASH_ADDR_REG and + FLASH_WRITE_DATA_REG to update the CFM0 image. + However, prior to writing the new image the old image + must be erased. +

      5. +
    +

    +

    Erase the current primary flash image... +

    1. Read FLASH_STATUS_REG and verify no error bits are + asserted and that all read, write, and erase operations + are idle.

      2. +

    2. Disable write protection of the flash by strobing the + FLASH_DISABLE_WP_STB bit of FLASH_CONTROL_REG. +

      3. +

    3. Verify write protection is disabled and no errors are + present by reading FLASH_STATUS_REG.

      4. +

    4. Initiate the erase operation by setting + FLASH_ERASE_SECTOR and strobing FLASH_ERASE_STB of + FLASH_CONTROL_REG.

      5. +

    5. Poll the FLASH_ERASE_IDLE bit of + FLASH_STATUS_REG until it de-asserts indicating the + erase operation is complete, then verify the operation + was successful by checking that the FLASH_ERASE_ERR + bit is de-asserted. Erase operations are expected to + take a maximum of 350 msec. Upon completion of the erase + operation write protection will remain disabled. +

      6. +

    6. Erase additional sectors as required (see + FLASH_ERASE_SECTOR for details) by restarting with first + step.

      7. +
    +

    +

    Write the new primary flash image... +

    1. Read FLASH_STATUS_REG and verify no error bits are + asserted, all read, write, and erase operations are + idle, and write protection is disabled.
      2. +

    2. Set the target address for the write to the Max 10 + on-chip flash by writing value from + FLASH_CFM0_START_ADDR_REG to FLASH_ADDR_REG.

      3. +

    3. Set the data to be written to this address by writing + the new 32-bit word of the new image to + FLASH_WRITE_DATA_REG.

      4. +

    4. Initiate the write by strobing FLASH_WRITE_STB of + FLASH_CONTROL_REG.

      5. +

    5. Poll the FLASH_WRITE_IDLE bit of + FLASH_STATUS_REG until it de-asserts indicating the + write operation is complete, then verify the operation + was successful by checking that the FLASH_WRITE_ERR + bit is de-asserted. Write operations are expected to + take a maximum of 550 usec.

      6. +

    6. Upon completion of the write operation return to step + 2, incrementing the target address by one, and writing + the next 32-bit word to Max10FlashWriteDatReg. If this + was the last write, indicated by writing to + FLASH_PRIMARY_IMAGE_END_ADDR, proceed to the next step + to enable write protection.

      7. +

    7. After writing the new image enable write protection + by strobing the FLASH_ENABLE_WP_STB bit of + FLASH_CONTROL_REG.

      8. +
    +

    +

    Verify the new primary flash image... +

    1. Read FLASH_STATUS_REG and verify no error bits are + asserted and that all read, write, and erase operations + are idle.

      2. +

    2. Set the target address for the read in the Max 10 + on-chip flash by writing value from + FLASH_CFM0_START_ADDR_REG to FLASH_ADDR_REG.

      3. +

    3. Initiate the read by strobing FLASH_READ_STB of + FLASH_CONTROL_REG.

      4. +

    4. Poll the FLASH_READ_IDLE bit of + FLASH_STATUS_REG until it de-asserts indicating the + read operation is complete, then verify the operation + was successful by checking that the FLASH_READ_ERR + bit is de-asserted. There is no guidance on exactly how + long reads take to complete, but they are expected to be + fairly quick. A very conservative timeout on this + polling would be similar to that used for write + operations.

      5. +

    5. Upon completion of the read operation the resulting + data returned by the on-chip flash will be available in + Max10FlashReadDatReg. Read this register, compare to + expected value previously written, and ensure they + match.

      6. +

    6. Return to step 2, incrementing the target + address by one. If this was the last read verification + is complete and no further action is required.

      7. +
    +

    +

    After the flash has been erased, programmed, and verified, a power + cycle is required for the new image to become active. +

    +
    + + +

    FLASH_PRIMARY_IMAGE_ADDR_ENUM Enumeration

    +Those values are the start and end address of the CFM image flash + sector from Intel's On-Chip Flash IP Generator. Note that the values + given in the IP generator are byte based where the values of this enum + are U32 based (divided by 4). + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + +
    Value Name
    Dec Hex
    40960x01000 +

    FLASH_PRIMARY_IMAGE_START_ADDR_MEM_INIT

    + +
    399360x09C00 +

    FLASH_PRIMARY_IMAGE_START_ADDR

    + +
    757750x127FF +

    FLASH_PRIMARY_IMAGE_END_ADDR

    + +
    + +

    + This enumerated type is defined in HDL source file reconfig_engine.v. +

    + +
    + +
    + + +

    Offset 0x0000: FLASH_STATUS_REG Register (R)

    + + (show extended info) +
    + + + + + + + + + + + + + + + +
    + + + +
    Port ARM_SPI1_CS3
    + +    		 + + + + +
    MB_CPLD_PS_REGMAP|RECONFIG
      0x000040
    + +    		 + + + + +
    FLASH_STATUS_REG
      offset=0x0000
    + +    		 + + + + + +
    + + +Total Offset =
      0x000040 + +
    + +

    + +

    Initial Value not specified +

    + +

    This register is defined in HDL source file reconfig_engine.v.

    + +
    + +
    + + + +
    + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + +
    BitsName
    31..24 +

    Reserved

    +

    + +
    23..17 +

    Reserved

    +

    + +
    16 +

    FLASH_MEM_INIT_ENABLED

    +

    This bit is asserted when the flash can hold an image with memory + initialization.

    + +
    15..14 +

    Reserved

    +

    + +
    13 +

    FLASH_WRITE_ERR

    +

    This bit is asserted when write operation fails. Clear this error + by strobing the CLEAR_FLASH_WRITE_ERROR_STB bit of this register. In + the event of a write error... +

  • the primary configuration image may be corrupted, and + power cycling the board may result unknown behavior.
    • +
  • write protection of the flash will automatically be + re-enabled.
    • +
  • attempts to disable write protection will be ignored.
    • +
  • attempts to read/write/erase the flash will be ignored.

    • + +
    12 +

    FLASH_WRITE_IDLE

    +

    This bit is de-asserted when a write operation is in progress. Poll + this bit after strobing the FLASH_WRITE_STB bit of + FLASH_CONTROL_REG to determine when the write operation has + completed, then check the FLASH_WRITE_ERR bit to verify the + operation was successful.

    + +
    11..10 +

    Reserved

    +

    + +
    9 +

    FLASH_ERASE_ERR

    +

    This bit is asserted when an erase operation fails. Clear this + error by strobing CLEAR_FLASH_ERASE_ERROR_STB of this register. In + the event of an erase error... +

  • the primary configuration image may be corrupted, and + power cycling the board may result in unknown behavior.
    • +
  • write protection of the flash will automatically be + re-enabled.
    • +
  • attempts to disable write protection will be ignored.
    • +
  • attempts to read/write/erase the flash will be ignored.

    • + +
    8 +

    FLASH_ERASE_IDLE

    +

    This bit is de-asserted when an erase operation is in progress. Poll + this bit after strobing the FLASH_ERASE_STB bit of + FLASH_CONTROL_REG to determine when the erase operation has + completed, then check the FLASH_ERASE_ERR bit to verify the + operation was successful.

    + +
    7..6 +

    Reserved

    +

    + +
    5 +

    FLASH_READ_ERR

    +

    This bit is asserted when a read operation fails. Clear this error + by strobing the CLEAR_FLASH_READ_ERROR_STB of this register. In the + event of a read error... +

  • the data in FLASH_READ_DATA_REG is invalid.
    • +
  • attempts to disable write protection will be ignored.
    • +
  • attempts to read/write/erase the flash will be ignored.

    • + +
    4 +

    FLASH_READ_IDLE

    +

    This bit is de-asserted when a read operation is in progress. Poll + this bit after strobing the FLASH_READ_STB bit of + FLASH_CONTROL_REG to determine when the read operation has + completed, then check the FLASH_READ_ERR bit to verify the + operation was successful.

    + +
    3..1 +

    Reserved

    +

    + +
    0 +

    FLASH_WP_ENABLED

    +

    This bit is asserted when the flash is write protected and + de-asserted when write protection is disabled. +

  • Write protection must be enabled prior to performing read + operations.
    • +
  • Write protection must be disabled prior to performing write and + erase operations.

    • + +
    + +
    + +
    + + +

    Offset 0x0004: FLASH_CONTROL_REG Register (W)

    + + (show extended info) +
    + + + + + + + + + + + + + + + +
    + + + +
    Port ARM_SPI1_CS3
    + +    		 + + + + +
    MB_CPLD_PS_REGMAP|RECONFIG
      0x000040
    + +    		 + + + + +
    FLASH_CONTROL_REG
      offset=0x0004
    + +    		 + + + + + +
    + + +Total Offset =
      0x000044 + +
    + +

    + +

    Initial Value not specified +

    + +

    This register is defined in HDL source file reconfig_engine.v.

    + +
    + +
    + + + +
    + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + +
    BitsName
    31..24 +

    Reserved

    +

    + +
    23..16 +

    Reserved

    +

    + +
    15..11 +

    Reserved

    +

    + +
    10w +

    CLEAR_FLASH_ERASE_ERROR_STB   (Strobe)

    +

    Strobe this bit to clear an erase error.

    + +
    9w +

    CLEAR_FLASH_WRITE_ERROR_STB   (Strobe)

    +

    Strobe this bit to clear a write error.

    + +
    8w +

    CLEAR_FLASH_READ_ERROR_STB   (Strobe)

    +

    Strobe this bit to clear a read error.

    + +
    7..5w +

    FLASH_ERASE_SECTOR   (Strobe)

    +

    Defines the sector to be erased. Has to be set latest with the + write access which starts the erase operation by strobing + FLASH_ERASE_STB.
    + If the flash is configured to support memory initialization (see + FLASH_MEM_INIT_ENABLED flag) the sectors 2 to 4 have to be erased. + If the flag is not asserted only sector 4 has to be erased.

    + +
    4w +

    FLASH_ERASE_STB   (Strobe)

    +

    Strobe this bit to erase the primary Max10 configuration image + (CFM0). +

  • Prior to strobing this bit verify no other write or erase + operations are in progress, write protection is disabled, and no + error bits are asserted by reading FLASH_STATUS_REG.
    • +
  • Attempts to erase the primary image while other write or erase + operations are in progress will be ignored. +
  • Attempts to erase the primary image when write protection is + enabled will be ignored.
    • +
  • Strobing this bit and FLASH_WRITE_STB simultaneously will + result both the erase and the write operation being ignored, both + corresponding error bits being set, and write protection being + re-enabled.
    • +
  • After strobing this bit poll the FLASH_ERASE_IDLE and + FLASH_ERASE_ERR bits of FLASH_STATUS_REG to determine when + the erase operation is complete and if it was successful.

    • + +
    3w +

    FLASH_WRITE_STB   (Strobe)

    +

    Strobe this bit to write the data contained in + FLASH_WRITE_DATA_REG to the flash address identified in + FLASH_ADDR_REG. +

  • The flash must be erased before writing new data.
    • +
  • Prior to strobing this bit verify write protection is + disabled, no other write or erase operations are in progress, and + no error bits are asserted by reading FLASH_STATUS_REG.
    • +
  • Attempts to write data while other write or erase operations + are in progress will be ignored.
    • +
  • Attempts to write data with write protection enabled will be + ignored.
    • +
  • Strobing this bit and FLASH_ERASE_STB simultaneously will + result in both the write and erase operation being ignored, + both corresponding error bits being set, and write protection + being re-enabled.
    • +
  • After strobing this bit poll theMax10FlashWriteIdle and + FLASH_WRITE_ERR bits of FLASH_STATUS_REG to determine when + the write operation is complete and if it was successful.

    • + +
    2w +

    FLASH_READ_STB   (Strobe)

    +

    Strobe this bit to read data from the flash address identified in + FLASH_ADDR_REG. +

  • Prior to strobing this bit verify no read, write, or erase + operations are in progress, no error bits are asserted, and + write protection is enabled by reading FLASH_STATUS_REG.
    • +
  • Attempts to read data while other operations are in progress + or while write protection is disabled will be ignored.
    • +
  • After strobing this bit poll the FLASH_READ_IDLE and + FLASH_READ_ERR bits of FLASH_STATUS_REG to determine when + the read operation is complete and if it was successful.
    • +
  • Upon successful completion the data read from flash will be + available in FLASH_READ_DATA_REG.

    • + +
    1w +

    FLASH_DISABLE_WP_STB   (Strobe)

    +

    Strobe this bit to disable write protection to the section of the + Max 10 on-chip flash storing the primary configuration image + (CFM0). +

  • Read the FLASH_WP_ENABLED bit of FLASH_STATUS_REG to + determine the current state of write protection.
    • +
  • Prior to strobing this bit verify no read operations are in + progress and no error bits are asserted by reading + FLASH_STATUS_REG.
    • +
  • Attempts to disable write protection while a read is in + progress will be ignored.
    • +
  • Attempts to disable write protection will be ignored if + this bit is strobed simultaneously with either FLASH_READ_STB + or FLASH_ENABLE_WP_STB.
    • +
  • Write protection must be disabled prior to performing erase or + write operations.
    • +
  • Upon completion of erase/write operations write protection + will remain disabled. When not actively erasing or writing a new + image write protection should be enabled to avoid data + corruption.

    • + +
    0w +

    FLASH_ENABLE_WP_STB   (Strobe)

    +

    Strobe this bit to enable write protection to the section of the + Max 10 on-chip flash storing the primary configuration image + (CFM0). +

  • Read the FLASH_WP_ENABLED bit of FLASH_STATUS_REG to + determine the current state of write protection.
    • +
  • Prior to strobing this bit verify no write or erase operations + are in progress and no error bits are asserted by reading + FLASH_STATUS_REG.
    • +
  • Attempts to enable write protection while erase or write + operations are in progress will be ignored.
    • +
  • Write protection must be enabled prior to performing + read operations.
    • +
  • Write protection should be enabled after completing + write or erase operations to prevent data corruption.

    • + +
    + +
    + +
    + + +

    Offset 0x0008: FLASH_ADDR_REG Register (R|W)

    + + (show extended info) +
    + + + + + + + + + + + + + + + +
    + + + +
    Port ARM_SPI1_CS3
    + +    		 + + + + +
    MB_CPLD_PS_REGMAP|RECONFIG
      0x000040
    + +    		 + + + + +
    FLASH_ADDR_REG
      offset=0x0008
    + +    		 + + + + + +
    + + +Total Offset =
      0x000048 + +
    + +

    + +

    Initial Value not specified +

    + +

    This register is defined in HDL source file reconfig_engine.v.

    + +
    + +
    + + + +
    + + + + + + + + + + + + + + + + + + + +
    BitsName
    31..24 +

    Reserved

    +

    + +
    23..17 +

    Reserved

    +

    + +
    16..0 +

    FLASH_ADDR

    +

    This field holds the target address for the next read or + write operation. Set this field prior to strobing the + FLASH_WRITE_STB and FLASH_READ_STB bits of + FLASH_CONTROL_REG. Valid addresses are defined by the + FLASH_PRIMARY_IMAGE_ADDR_ENUM enumeration.

    + +
    + +
    + +
    + + +

    Offset 0x000C: FLASH_WRITE_DATA_REG Register (W)

    + + (show extended info) +
    + + + + + + + + + + + + + + + +
    + + + +
    Port ARM_SPI1_CS3
    + +    		 + + + + +
    MB_CPLD_PS_REGMAP|RECONFIG
      0x000040
    + +    		 + + + + +
    FLASH_WRITE_DATA_REG
      offset=0x000C
    + +    		 + + + + + +
    + + +Total Offset =
      0x00004C + +
    + +

    + +

    Initial Value not specified +

    + +

    This register is defined in HDL source file reconfig_engine.v.

    + +
    + +
    + + + +
    + + + + + + + + + +
    BitsName
    31..0w +

    FLASH_WRITE_DATA

    +

    Data in this register will be written to the flash at the address + identified in FLASH_ADDR_REG when a successful write operation + is executed.

    + +
    + +
    + +
    + + +

    Offset 0x0010: FLASH_READ_DATA_REG Register (R)

    + + (show extended info) +
    + + + + + + + + + + + + + + + +
    + + + +
    Port ARM_SPI1_CS3
    + +    		 + + + + +
    MB_CPLD_PS_REGMAP|RECONFIG
      0x000040
    + +    		 + + + + +
    FLASH_READ_DATA_REG
      offset=0x0010
    + +    		 + + + + + +
    + + +Total Offset =
      0x000050 + +
    + +

    + +

    Initial Value not specified +

    + +

    This register is defined in HDL source file reconfig_engine.v.

    + +
    + +
    + + + +
    + + + + + + + + + +
    BitsName
    31..0 +

    FLASH_READ_DATA

    +

    This register contains data read from the flash address identified + in FLASH_ADDR_REG after a successful read operation is executed.

    + +
    + +
    + +
    + + +

    Offset 0x0014: FLASH_CFM0_START_ADDR_REG Register (R)

    + + (show extended info) +
    + + + + + + + + + + + + + + + +
    + + + +
    Port ARM_SPI1_CS3
    + +    		 + + + + +
    MB_CPLD_PS_REGMAP|RECONFIG
      0x000040
    + +    		 + + + + +
    FLASH_CFM0_START_ADDR_REG
      offset=0x0014
    + +    		 + + + + + +
    + + +Total Offset =
      0x000054 + +
    + +

    + +

    Initial Value not specified +

    + +

    This register is defined in HDL source file reconfig_engine.v.

    + +
    + +
    + + + +
    + + + + + + + + + +
    BitsName
    31..0 +

    FLASH_CFM0_START_ADDR

    +

    Start address of CFM0 image within flash memory (as defined in FLASH_PRIMARY_IMAGE_ADDR_ENUM).

    + +
    + +
    + +
    + + +

    Offset 0x0018: FLASH_CFM0_END_ADDR_REG Register (R)

    + + (show extended info) +
    + + + + + + + + + + + + + + + +
    + + + +
    Port ARM_SPI1_CS3
    + +    		 + + + + +
    MB_CPLD_PS_REGMAP|RECONFIG
      0x000040
    + +    		 + + + + +
    FLASH_CFM0_END_ADDR_REG
      offset=0x0018
    + +    		 + + + + + +
    + + +Total Offset =
      0x000058 + +
    + +

    + +

    Initial Value not specified +

    + +

    This register is defined in HDL source file reconfig_engine.v.

    + +
    + +
    + + + +
    + + + + + + + + + +
    BitsName
    31..0 +

    FLASH_CFM0_END_ADDR

    +

    Last address of CFM0 image within flash memory (as defined in FLASH_PRIMARY_IMAGE_ADDR_ENUM).

    + +
    + +
    + +
    + +
    + +
    + +

    RFDC_REGS_REGMAP

    + +

    RFDC_REGS

    + These are the registers located within the RFDC block design + that provide control and status support for the RF chain. +
    + + +

    FABRIC_DSP_BW_ENUM Enumeration

    + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + +
    Value Name
    Dec Hex
    00x000 +

    FABRIC_DSP_BW_NONE

    + +
    1000x064 +

    FABRIC_DSP_BW_100M

    + +
    2000x0C8 +

    FABRIC_DSP_BW_200M

    + +
    4000x190 +

    FABRIC_DSP_BW_400M

    + +
    + +

    + This enumerated type is defined in HDL source file common_regs.v. +

    + +
    + +
    + + +

    Offset 0x0000: MMCM Window (R|W)

    + + (show extended info) +
    + + + + + + + + + + + + + + + +
    + + + +
    Port ARM_M_AXI_HPM0
    + +    		 + + + + +
    AXI_HPM0_REGMAP|RFDC_REGS
      0x1000140000
    + +    		 + + + + + +
    MMCM
      offset=0x0000
      size=0x10000 (64 Kbytes)
    + +    		 + + + + + +
    + + +Total Offset =
      0x1000140000 + +
    + +

    + +

    This window is defined in HDL source file common_regs.v.

    + +
    + +
    + +Register space for controlling the data clock MMCM instance + within the RFDC block design. + Refer to Xilinx' Clocking Wizard v6.0 Product Guide for the + regiter space description in chapter 2. + (https://www.xilinx.com/support/documentation/ip_documentation/clk_wiz/v6_0/pg065-clk-wiz.pdf) + +
    + +
    + +
    + + +

    Offset 0x10000: INVERT_IQ_REG Register (R|W)

    + + (show extended info) +
    + + + + + + + + + + + + + + + +
    + + + +
    Port ARM_M_AXI_HPM0
    + +    		 + + + + +
    AXI_HPM0_REGMAP|RFDC_REGS
      0x1000140000
    + +    		 + + + + +
    INVERT_IQ_REG
      offset=0x10000
    + +    		 + + + + + +
    + + +Total Offset =
      0x1000150000 + +
    + +

    + +

    Initial Value not specified +

    + +

    This register is defined in HDL source file common_regs.v.

    + +
    + +
    + +Control register for inverting I/Q data. + +
    + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + +
    BitsName
    31..24 +

    Reserved

    +

    + +
    23..16 +

    Reserved

    +

    + +
    15 +

    INVERT_DB1_DAC3_IQ

    +

    + +
    14 +

    INVERT_DB1_DAC2_IQ

    +

    + +
    13 +

    INVERT_DB1_DAC1_IQ

    +

    + +
    12 +

    INVERT_DB1_DAC0_IQ

    +

    + +
    11 +

    INVERT_DB0_DAC3_IQ

    +

    + +
    10 +

    INVERT_DB0_DAC2_IQ

    +

    + +
    9 +

    INVERT_DB0_DAC1_IQ

    +

    + +
    8 +

    INVERT_DB0_DAC0_IQ

    +

    + +
    7 +

    INVERT_DB1_ADC3_IQ

    +

    + +
    6 +

    INVERT_DB1_ADC2_IQ

    +

    + +
    5 +

    INVERT_DB1_ADC1_IQ

    +

    + +
    4 +

    INVERT_DB1_ADC0_IQ

    +

    + +
    3 +

    INVERT_DB0_ADC3_IQ

    +

    + +
    2 +

    INVERT_DB0_ADC2_IQ

    +

    + +
    1 +

    INVERT_DB0_ADC1_IQ

    +

    + +
    0 +

    INVERT_DB0_ADC0_IQ

    +

    + +
    + +
    + +
    + + +

    Offset 0x11000: MMCM_RESET_REG Register (R|W)

    + + (show extended info) +
    + + + + + + + + + + + + + + + +
    + + + +
    Port ARM_M_AXI_HPM0
    + +    		 + + + + +
    AXI_HPM0_REGMAP|RFDC_REGS
      0x1000140000
    + +    		 + + + + +
    MMCM_RESET_REG
      offset=0x11000
    + +    		 + + + + + +
    + + +Total Offset =
      0x1000151000 + +
    + +

    + +

    Initial Value not specified +

    + +

    This register is defined in HDL source file common_regs.v.

    + +
    + +
    + +Control register for resetting the data clock MMCM. + +
    + + + + + + + + + + + + + + + + + + + + + + + + + + + + + +
    BitsName
    31..24 +

    Reserved

    +

    + +
    23..16 +

    Reserved

    +

    + +
    15..8 +

    Reserved

    +

    + +
    7..1 +

    Reserved

    +

    + +
    0 +

    RESET_MMCM

    +

    Write a '1' to this bit to reset the MMCM. Then write a + '0' to place the MMCM out of reset.

    + +
    + +
    + +
    + + +

    Offset 0x12000: RF_RESET_CONTROL_REG Register (R|W)

    + + (show extended info) +
    + + + + + + + + + + + + + + + +
    + + + +
    Port ARM_M_AXI_HPM0
    + +    		 + + + + +
    AXI_HPM0_REGMAP|RFDC_REGS
      0x1000140000
    + +    		 + + + + +
    RF_RESET_CONTROL_REG
      offset=0x12000
    + +    		 + + + + + +
    + + +Total Offset =
      0x1000152000 + +
    + +

    + +

    Initial Value not specified +

    + +

    This register is defined in HDL source file common_regs.v.

    + +
    + +
    + +Control register for the RF reset controller. + Verify the FSM ID before polling starting any reset sequence. + To use the SW reset triggers: Wait until DB*_DONE is de-asserted. + Assert either the *_RESET or *_ENABLE bitfields. + Wait until DB*_DONE is asserted to release the trigger. + The DB*_DONE signal should then de-assert.
    + Note: The *_DB1 constants are not used in the HDL, their purpose is + merely for documentation. + +
    + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + +
    BitsName
    31..24 +

    Reserved

    +

    + +
    23..16 +

    Reserved

    +

    + +
    15..10 +

    Reserved

    +

    + +
    9 +

    DAC_ENABLE

    +

    Write a '1' to this bit to trigger the enable sequence for + the daughterboard 0 DAC chain. Write a '0' once + db0_dac_seq_done is asserted.

    + +
    8 +

    DAC_RESET

    +

    Write a '1' to this bit to trigger a reset for the + daughterboard 0 DAC chain. Write a '0' once db0_dac_seq_done + is asserted.

    + +
    7..6 +

    Reserved

    +

    + +
    5 +

    ADC_ENABLE

    +

    Write a '1' to this bit to trigger the enable sequence for + the daughterboard 0 ADC chain. Write a '0' once + db0_adc_seq_done is asserted.

    + +
    4 +

    ADC_RESET

    +

    Write a '1' to this bit to trigger a reset for the + daughterboard 0 ADC chain. Write a '0' once db0_adc_seq_done + is asserted.

    + +
    3..1 +

    Reserved

    +

    + +
    0 +

    FSM_RESET

    +

    Write a '1' to this bit to reset the RF reset controller. + Write a '0' once db0_fsm_reset_done asserts.

    + +
    + +
    + +
    + + +

    Offset 0x12008: RF_RESET_STATUS_REG Register (R)

    + + (show extended info) +
    + + + + + + + + + + + + + + + +
    + + + +
    Port ARM_M_AXI_HPM0
    + +    		 + + + + +
    AXI_HPM0_REGMAP|RFDC_REGS
      0x1000140000
    + +    		 + + + + +
    RF_RESET_STATUS_REG
      offset=0x12008
    + +    		 + + + + + +
    + + +Total Offset =
      0x1000152008 + +
    + +

    + +

    Initial Value not specified +

    + +

    This register is defined in HDL source file common_regs.v.

    + +
    + +
    + +Status register for the RF reset controller. + Verify the FSM ID before polling starting any reset sequence. + Refer to RF_RESET_CONTROL_REG for instructions on how to use + the status bits in this register.
    + Note: The *_DB1 constants are not used in the HDL, their purpose is + merely for documentation. + +
    + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + +
    BitsName
    31..24 +

    Reserved

    +

    + +
    23..16 +

    Reserved

    +

    + +
    15..12 +

    Reserved

    +

    + +
    11 +

    DAC_SEQ_DONE

    +

    This bit asserts ('1') when the DB0 DAC chain reset sequence + is completed. The bitfield deasserts ('0') after + deasserting the issued triggered (enable or reset).

    + +
    10..8 +

    Reserved

    +

    + +
    7 +

    ADC_SEQ_DONE

    +

    This bit asserts ('1') when the DB0 ADC chain reset sequence + is completed. The bitfield deasserts ('0') after + deasserting the issued triggered (enable or reset).

    + +
    6..4 +

    Reserved

    +

    + +
    3 +

    FSM_RESET_DONE

    +

    This bit asserts ('1') when the DB0 RF reset controller FSM + reset sequence is completed. The bitfield deasserts ('0') + after deasserting db0_fsm_reset.

    + +
    2..0 +

    Reserved

    +

    + +
    + +
    + +
    + + +

    Offset 0x13000: RF_AXI_STATUS_REG Register (R)

    + + (show extended info) +
    + + + + + + + + + + + + + + + +
    + + + +
    Port ARM_M_AXI_HPM0
    + +    		 + + + + +
    AXI_HPM0_REGMAP|RFDC_REGS
      0x1000140000
    + +    		 + + + + +
    RF_AXI_STATUS_REG
      offset=0x13000
    + +    		 + + + + + +
    + + +Total Offset =
      0x1000153000 + +
    + +

    + +

    Initial Value not specified +

    + +

    This register is defined in HDL source file common_regs.v.

    + +
    + +
    + +Status register for the RF AXI-Stream interfaces.
    + Note: The *_DB1 constants are not used in the HDL, their purpose is + merely for documentation. + +
    + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + +
    BitsName
    31..30 +

    USER_ADC_TREADY_DB1

    +

    This bitfield is wired to the user's ADC (DB1) AXI-Stream + TReady handshake signals. The LSB is channel 0 and the MSB + is channel 1.

    + +
    29..28 +

    USER_ADC_TVALID_DB1

    +

    This bitfield is wired to the user's ADC (DB1) AXI-Stream + TValid handshake signals. The LSB is channel 0 and the MSB + is channel 1.

    + +
    27..26 +

    RFDC_ADC_I_TVALID_DB1

    +

    This bitfield is wired to the RFDC's ADC (DB1) AXI-Stream + TValid handshake signals (I portion). The LSB is channel 0 + and the MSB is channel 1.

    + +
    25..24 +

    RFDC_ADC_Q_TVALID_DB1

    +

    This bitfield is wired to the RFDC's ADC (DB1) AXI-Stream + TValid handshake signals (Q portion). The LSB is channel 0 + and the MSB is channel 1.

    + +
    23..22 +

    RFDC_ADC_I_TREADY_DB1

    +

    This bitfield is wired to the RFDC's ADC (DB1) AXI-Stream + TReady handshake signals (I portion). The LSB is channel 0 + and the MSB is channel 1.

    + +
    21..20 +

    RFDC_ADC_Q_TREADY_DB1

    +

    This bitfield is wired to the RFDC's ADC (DB1) AXI-Stream + TReady handshake signals (Q portion). The LSB is channel 0 + and the MSB is channel 1.

    + +
    19..18 +

    RFDC_DAC_TVALID_DB1

    +

    This bitfield is wired to the RFDC's DAC (DB1) AXI-Stream + TValid handshake signals. The LSB is channel 0 and the MSB + is channel 1.

    + +
    17..16 +

    RFDC_DAC_TREADY_DB1

    +

    This bitfield is wired to the RFDC's DAC (DB1) AXI-Stream + TReady handshake signals. The LSB is channel 0 and the MSB + is channel 1.

    + +
    15..14 +

    USER_ADC_TREADY

    +

    This bitfield is wired to the user's ADC (DB0) AXI-Stream + TReady handshake signals. The LSB is channel 0 and the MSB + is channel 1.

    + +
    13..12 +

    USER_ADC_TVALID

    +

    This bitfield is wired to the user's ADC (DB0) AXI-Stream + TValid handshake signals. The LSB is channel 0 and the MSB + is channel 1.

    + +
    11..10 +

    RFDC_ADC_I_TVALID

    +

    This bitfield is wired to the RFDC's ADC (DB0) AXI-Stream + TValid handshake signals (I portion). The LSB is channel 0 + and the MSB is channel 1.

    + +
    9..8 +

    RFDC_ADC_Q_TVALID

    +

    This bitfield is wired to the RFDC's ADC (DB0) AXI-Stream + TValid handshake signals (Q portion). The LSB is channel 0 + and the MSB is channel 1.

    + +
    7..6 +

    RFDC_ADC_I_TREADY

    +

    This bitfield is wired to the RFDC's ADC (DB0) AXI-Stream + TReady handshake signals (I portion). The LSB is channel 0 + and the MSB is channel 1.

    + +
    5..4 +

    RFDC_ADC_Q_TREADY

    +

    This bitfield is wired to the RFDC's ADC (DB0) AXI-Stream + TReady handshake signals (Q portion). The LSB is channel 0 + and the MSB is channel 1.

    + +
    3..2 +

    RFDC_DAC_TVALID

    +

    This bitfield is wired to the RFDC's DAC (DB0) AXI-Stream + TValid handshake signals. The LSB is channel 0 and the MSB + is channel 1.

    + +
    1..0 +

    RFDC_DAC_TREADY

    +

    This bitfield is wired to the RFDC's DAC (DB0) AXI-Stream + TReady handshake signals. The LSB is channel 0 and the MSB + is channel 1.

    + +
    + +
    + +
    + + +

    Offset 0x13008: FABRIC_DSP_REG Register (R)

    + + (show extended info) +
    + + + + + + + + + + + + + + + +
    + + + +
    Port ARM_M_AXI_HPM0
    + +    		 + + + + +
    AXI_HPM0_REGMAP|RFDC_REGS
      0x1000140000
    + +    		 + + + + +
    FABRIC_DSP_REG
      offset=0x13008
    + +    		 + + + + + +
    + + +Total Offset =
      0x1000153008 + +
    + +

    + +

    Initial Value = 0x00000000 +

    + +

    This register is defined in HDL source file common_regs.v.

    + +
    + +
    + +This register provides information to the driver on the type + of DSP that is instantiated in the fabric.
    + The X410 platform supports multiple RF daughterboards, each requiring + a different fabric RF DSP chain that works with specific RFDC settings. + Each bandwidth DSP chain has a unique identifier (BW in MHz), this + information is conveyed in this register to let the driver + configure the RFDC with the proper settings. + Also, channel count for the DSP module is included.
    + Note: The *_DB1 constants are not used in the HDL, their purpose is + merely for documentation. + +
    + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + +
    BitsName
    31..30 +

    FABRIC_DSP_TX_CNT_DB1   (initialvalue=0)

    +

    Fabric DSP TX channel count for daughterboard 0.

    + +
    29..28 +

    FABRIC_DSP_RX_CNT_DB1   (initialvalue=0)

    +

    Fabric DSP RX channel count for daughterboard 0.

    + +
    27..16 +

    FABRIC_DSP_BW_DB1   (initialvalue=FABRIC_DSP_BW_NONE)

    +

    Fabric DSP BW in MHz for daughterboard 1.

    + +

    + The values for this bitfield are in the FABRIC_DSP_BW_ENUM table. + (show here) +

    +
    + +
    + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + +
    Value Name
    Dec Hex
    00x000 +

    FABRIC_DSP_BW_NONE

    + +
    1000x064 +

    FABRIC_DSP_BW_100M

    + +
    2000x0C8 +

    FABRIC_DSP_BW_200M

    + +
    4000x190 +

    FABRIC_DSP_BW_400M

    + +
    + +

    + This enumerated type is defined in HDL source file common_regs.v. +

    + +
    + +
    + +
    15..14 +

    FABRIC_DSP_TX_CNT   (initialvalue=0)

    +

    Fabric DSP TX channel count for daughterboard 0.

    + +
    13..12 +

    FABRIC_DSP_RX_CNT   (initialvalue=0)

    +

    Fabric DSP RX channel count for daughterboard 0.

    + +
    11..0 +

    FABRIC_DSP_BW   (initialvalue=FABRIC_DSP_BW_NONE)

    +

    Fabric DSP BW in MHz for daughterboard 0.

    + +

    + The values for this bitfield are in the FABRIC_DSP_BW_ENUM table. + (show here) +

    +
    + +
    + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + +
    Value Name
    Dec Hex
    00x000 +

    FABRIC_DSP_BW_NONE

    + +
    1000x064 +

    FABRIC_DSP_BW_100M

    + +
    2000x0C8 +

    FABRIC_DSP_BW_200M

    + +
    4000x190 +

    FABRIC_DSP_BW_400M

    + +
    + +

    + This enumerated type is defined in HDL source file common_regs.v. +

    + +
    + +
    + +
    + +
    + +
    + + +

    Offset 0x14000: CALIBRATION_DATA Register (R|W)

    + + (show extended info) +
    + + + + + + + + + + + + + + + +
    + + + +
    Port ARM_M_AXI_HPM0
    + +    		 + + + + +
    AXI_HPM0_REGMAP|RFDC_REGS
      0x1000140000
    + +    		 + + + + +
    CALIBRATION_DATA
      offset=0x14000
    + +    		 + + + + + +
    + + +Total Offset =
      0x1000154000 + +
    + +

    + +

    Initial Value not specified +

    + +

    This register is defined in HDL source file common_regs.v.

    + +
    + +
    + +The fields of this register provide data to all the DAC channels when enabled + by the CALIBRATION_ENABLE register. + +
    + + + + + + + + + + + + + + +
    BitsName
    31..16 +

    Q_DATA

    +

    + +
    15..0 +

    I_DATA

    +

    + +
    + +
    + +
    + + +

    Offset 0x14008: CALIBRATION_ENABLE Register (R|W)

    + + (show extended info) +
    + + + + + + + + + + + + + + + +
    + + + +
    Port ARM_M_AXI_HPM0
    + +    		 + + + + +
    AXI_HPM0_REGMAP|RFDC_REGS
      0x1000140000
    + +    		 + + + + +
    CALIBRATION_ENABLE
      offset=0x14008
    + +    		 + + + + + +
    + + +Total Offset =
      0x1000154008 + +
    + +

    + +

    Initial Value not specified +

    + +

    This register is defined in HDL source file common_regs.v.

    + +
    + +
    + +This register enables calibration data in the DAC data path for each of the + four channels. Each of these bits is normally '0'. When written '1', DAC data + for the corresponding channel will be constantly driven with the contents of + the CALIBRATION_DATA register. + +
    + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + +
    BitsName
    31..24 +

    Reserved

    +

    + +
    23..16 +

    Reserved

    +

    + +
    15..8 +

    Reserved

    +

    + +
    7..6 +

    Reserved

    +

    + +
    5 +

    ENABLE_CALIBRATION_DATA_3

    +

    Enables calibration data for channel 3.

    + +
    4 +

    ENABLE_CALIBRATION_DATA_2

    +

    Enables calibration data for channel 2.

    + +
    3..2 +

    Reserved

    +

    + +
    1 +

    ENABLE_CALIBRATION_DATA_1

    +

    Enables calibration data for channel 1.

    + +
    0 +

    ENABLE_CALIBRATION_DATA_0

    +

    Enables calibration data for channel 0.

    + +
    + +
    + +
    + + +

    Offset 0x15000: THRESHOLD_STATUS Register (R|W)

    + + (show extended info) +
    + + + + + + + + + + + + + + + +
    + + + +
    Port ARM_M_AXI_HPM0
    + +    		 + + + + +
    AXI_HPM0_REGMAP|RFDC_REGS
      0x1000140000
    + +    		 + + + + +
    THRESHOLD_STATUS
      offset=0x15000
    + +    		 + + + + + +
    + + +Total Offset =
      0x1000155000 + +
    + +

    + +

    Initial Value not specified +

    + +

    This register is defined in HDL source file common_regs.v.

    + +
    + +
    + +This register shows threshold status for the ADCs. Each bit reflects the + RFDC's real-time ADC status signals, which will assert when the ADC input + signal exceeds the programmed threshold value. The status will remain + asserted until cleared by software. + The bitfield names follow the pattern ADCX_ZZ_over_threshold(1|2), where X is + the location of the tile in the converter column and ZZ is either 01 (the + lower RF-ADC in the tile) or 23 (the upper RF-ADC in the tile). + See also the Xilinx document PG269. + +
    + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + +
    BitsName
    31..24 +

    Reserved

    +

    + +
    23..16 +

    Reserved

    +

    + +
    15..12 +

    Reserved

    +

    + +
    11 +

    ADC2_23_THRESHOLD2

    +

    + +
    10 +

    ADC2_23_THRESHOLD1

    +

    + +
    9 +

    ADC2_01_THRESHOLD2

    +

    + +
    8 +

    ADC2_01_THRESHOLD1

    +

    + +
    7..4 +

    Reserved

    +

    + +
    3 +

    ADC0_23_THRESHOLD2

    +

    + +
    2 +

    ADC0_23_THRESHOLD1

    +

    + +
    1 +

    ADC0_01_THRESHOLD2

    +

    + +
    0 +

    ADC0_01_THRESHOLD1

    +

    + +
    + +
    + +
    + + +

    Offset 0x16000: RF_PLL_CONTROL_REG Register (R|W)

    + + (show extended info) +
    + + + + + + + + + + + + + + + +
    + + + +
    Port ARM_M_AXI_HPM0
    + +    		 + + + + +
    AXI_HPM0_REGMAP|RFDC_REGS
      0x1000140000
    + +    		 + + + + +
    RF_PLL_CONTROL_REG
      offset=0x16000
    + +    		 + + + + + +
    + + +Total Offset =
      0x1000156000 + +
    + +

    + +

    Initial Value not specified +

    + +

    This register is defined in HDL source file common_regs.v.

    + +
    + +
    + +Enable RF MMCM outputs. + +
    + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + +
    BitsName
    31..24 +

    Reserved

    +

    + +
    23..17 +

    Reserved

    +

    + +
    16 +

    CLEAR_DATA_CLK_UNLOCKED

    +

    + +
    15..13 +

    Reserved

    +

    + +
    12 +

    ENABLE_RF_CLK_2X

    +

    + +
    11..9 +

    Reserved

    +

    + +
    8 +

    ENABLE_RF_CLK

    +

    + +
    7..5 +

    Reserved

    +

    + +
    4 +

    ENABLE_DATA_CLK_2X

    +

    + +
    3..1 +

    Reserved

    +

    + +
    0 +

    ENABLE_DATA_CLK

    +

    + +
    + +
    + +
    + + +

    Offset 0x16008: RF_PLL_STATUS_REG Register (R)

    + + (show extended info) +
    + + + + + + + + + + + + + + + +
    + + + +
    Port ARM_M_AXI_HPM0
    + +    		 + + + + +
    AXI_HPM0_REGMAP|RFDC_REGS
      0x1000140000
    + +    		 + + + + +
    RF_PLL_STATUS_REG
      offset=0x16008
    + +    		 + + + + + +
    + + +Total Offset =
      0x1000156008 + +
    + +

    + +

    Initial Value not specified +

    + +

    This register is defined in HDL source file common_regs.v.

    + +
    + +
    + +Data Clk Pll Status Register + +
    + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + +
    BitsName
    31..24 +

    Reserved

    +

    + +
    23..21 +

    Reserved

    +

    + +
    20 +

    DATA_CLK_PLL_LOCKED

    +

    + +
    19..17 +

    Reserved

    +

    + +
    16 +

    DATA_CLK_PLL_UNLOCKED_STICKY

    +

    + +
    15..8 +

    Reserved

    +

    + +
    7..0 +

    Reserved

    +

    + +
    + +
    + +
    + +
    + +
    + +

    RFDC_TIMING_REGMAP

    + +

    RFDC_TIMING_REGS

    + +
    + + +

    Offset 0x0000: NCO_RESET_REG Register (R|W)

    + + (show extended info) +
    + + + + + + + + + + + + + +
    + + + + +
    RADIO_CTRLPORT_REGMAP|RFDC_TIMING_WINDOW
      0x008000
    + +    		 + + + + +
    NCO_RESET_REG
      offset=0x0000
    + +    		 + + + + + +
    + + +Total Offset =
      0x008000 + +
    + +

    + +

    Initial Value not specified +

    + +

    This register is defined in HDL source file rfdc_timing_control.v.

    + +
    + +
    + +NCO reset control register. + +
    + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + +
    BitsName
    31..24 +

    Reserved

    +

    + +
    23..16 +

    Reserved

    +

    + +
    15..8 +

    Reserved

    +

    + +
    7..2 +

    Reserved

    +

    + +
    1r +

    NCO_RESET_DONE

    +

    When 1, indicates that the NCO reset has completed.

    + +
    0w +

    NCO_RESET_START   (Strobe)

    +

    Write a 1 to this bit to start a reset the RFDC's NCO.

    + +
    + +
    + +
    + + +

    Offset 0x0004: GEARBOX_RESET_REG Register (R|W)

    + + (show extended info) +
    + + + + + + + + + + + + + +
    + + + + +
    RADIO_CTRLPORT_REGMAP|RFDC_TIMING_WINDOW
      0x008000
    + +    		 + + + + +
    GEARBOX_RESET_REG
      offset=0x0004
    + +    		 + + + + + +
    + + +Total Offset =
      0x008004 + +
    + +

    + +

    Initial Value not specified +

    + +

    This register is defined in HDL source file rfdc_timing_control.v.

    + +
    + +
    + +Gearbox reset control register. + +
    + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + +
    BitsName
    31..24 +

    Reserved

    +

    + +
    23..16 +

    Reserved

    +

    + +
    15..8 +

    Reserved

    +

    + +
    7..2 +

    Reserved

    +

    + +
    1w +

    DAC_RESET   (Strobe)

    +

    This reset is for the gearbox on the DAC data path that is used to + move data from one clock domain to another outside the RFDC. Write + a 1 to this bit to send a reset pulse to the DAC gearbox.

    + +
    0w +

    ADC_RESET   (Strobe)

    +

    This reset is for the gearbox on the ADC data path that is used to + move data from one clock domain to another outside the RFDC. Write + a 1 to this bit to send a reset pulse to the ADC gearbox.

    + +
    + +
    + +
    + +
    + +
    + +

    SPI_REGMAP

    +
    +
    +

    SPI_REGS

    +
    +

    This register map is present for each SPI master.

    +

    For information about the register content and the way to interact with the core see the +documentation +of the SPI master from opencores used internally.

    +

    The core is configured to operate with 16 slave signal signals, up to 128 bits per transmission and 8 bit clock divider. +Only 64 bits of data are available via this register interface.

    +

    For the different SPI modes use the following table to derive the bits in CONTROL register. Only option 0 (CPOL=0, CPHA=0) has been tested.

    + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + +
    CPOLCPHATX_NEGRX_NEG
    0010
    0101
    1001
    1110
    +
    + + +

    Offset 0x0000: RX_DATA_LOW Register (R)

    + + (show extended info) +
    + + + + + + + + + +
    + + + + +
    RX_DATA_LOW
      offset=0x0000
    + +

    + +

    Initial Value not specified +

    + +

    This register is defined in HDL source file ctrlport_to_spi.v.

    + +
    + +
    + +
    +

    Lower 32 bits of the received word. (RxWord[31:0])

    + +
    + +
    + +
    + + +

    Offset 0x0004: RX_DATA_HIGH Register (R)

    + + (show extended info) +
    + + + + + + + + + +
    + + + + +
    RX_DATA_HIGH
      offset=0x0004
    + +

    + +

    Initial Value not specified +

    + +

    This register is defined in HDL source file ctrlport_to_spi.v.

    + +
    + +
    + +
    +

    Higher 32 bits of the received word. (RxWord[63:32])

    + +
    + +
    + +
    + + +

    Offset 0x0008: TX_DATA_LOW Register (W)

    + + (show extended info) +
    + + + + + + + + + +
    + + + + +
    TX_DATA_LOW
      offset=0x0008
    + +

    + +

    Initial Value not specified +

    + +

    This register is defined in HDL source file ctrlport_to_spi.v.

    + +
    + +
    + +
    +

    Lower 32 bits of the received word. (TxWord[31:0])

    + +
    + +
    + +
    + + +

    Offset 0x000C: TX_DATA_HIGH Register (W)

    + + (show extended info) +
    + + + + + + + + + +
    + + + + +
    TX_DATA_HIGH
      offset=0x000C
    + +

    + +

    Initial Value not specified +

    + +

    This register is defined in HDL source file ctrlport_to_spi.v.

    + +
    + +
    + +
    +

    Higher 32 bits of the received word. (TxWord[63:32])

    + +
    + +
    + +
    + + +

    Offset 0x0010: CONTROL Register (R|W)

    + + (show extended info) +
    + + + + + + + + + +
    + + + + +
    CONTROL
      offset=0x0010
    + +

    + +

    Initial Value not specified +

    + +

    This register is defined in HDL source file ctrlport_to_spi.v.

    + +
    + +
    + +
    +

    Control register

    + +
    + +
    + +
    + + +

    Offset 0x0014: CLOCK_DIVIDER Register (R|W)

    + + (show extended info) +
    + + + + + + + + + +
    + + + + +
    CLOCK_DIVIDER
      offset=0x0014
    + +

    + +

    Initial Value not specified +

    + +

    This register is defined in HDL source file ctrlport_to_spi.v.

    + +
    + +
    + +
    +
    + +
    + + + + + + + + + +
    BitsName
    7..0 +

    Divider

    +

    +

    Clock Divider.

    + +
    + +
    + +
    + + +

    Offset 0x0018: SLAVE_SELECT Register (R|W)

    + + (show extended info) +
    + + + + + + + + + +
    + + + + +
    SLAVE_SELECT
      offset=0x0018
    + +

    + +

    Initial Value not specified +

    + +

    This register is defined in HDL source file ctrlport_to_spi.v.

    + +
    + +
    + +
    +
    + +
    + + + + + + + + + +
    BitsName
    15..0 +

    SS

    +

    +

    Slave select.

    + +
    + +
    + +
    + +
    + +
    + +

    UIO_REGMAP

    +
    +
    +

    UIO_REGS

    +
    +

    UIO

    +
    + + +

    Offset 0x0000: IP Register (R|W)

    + + (show extended info) +
    + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + +
    + + + +
    Port ARM_M_AXI_HPM0
    + +    		 + + + + +
    AXI_HPM0_REGMAP|QSFP_0_0
      0x1200000000
    + +    		 + + + + +
    QSFP_REGMAP|UIO
      0x00A000
    + +    		 + + + + +
    IP
      offset=0x0000
    + +    		 + + + + + +
    + + +Total Offset =
      0x120000A000 + +
    + +
    + + + + +
    AXI_HPM0_REGMAP|QSFP_0_1
      0x1200010000
    + +    		 + + + + + +
    + + +Total Offset =
      0x120001A000 + +
    + +
    + + + + +
    AXI_HPM0_REGMAP|QSFP_0_2
      0x1200020000
    + +    		 + + + + + +
    + + +Total Offset =
      0x120002A000 + +
    + +
    + + + + +
    AXI_HPM0_REGMAP|QSFP_0_3
      0x1200030000
    + +    		 + + + + + +
    + + +Total Offset =
      0x120003A000 + +
    + +
    + + + + +
    AXI_HPM0_REGMAP|QSFP_1_0
      0x1200040000
    + +    		 + + + + + +
    + + +Total Offset =
      0x120004A000 + +
    + +
    + + + + +
    AXI_HPM0_REGMAP|QSFP_1_1
      0x1200050000
    + +    		 + + + + + +
    + + +Total Offset =
      0x120005A000 + +
    + +
    + + + + +
    AXI_HPM0_REGMAP|QSFP_1_2
      0x1200060000
    + +    		 + + + + + +
    + + +Total Offset =
      0x120006A000 + +
    + +
    + + + + +
    AXI_HPM0_REGMAP|QSFP_1_3
      0x1200070000
    + +    		 + + + + + +
    + + +Total Offset =
      0x120007A000 + +
    + +

    + +

    Initial Value not specified +

    + +

    This register is defined in HDL source file uhd_regs.v.

    + +
    + +
    + +
    +

    Set this port's IP address

    + +
    + +
    + +
    + + +

    Offset 0x0004: UDP Register (R|W)

    + + (show extended info) +
    + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + +
    + + + +
    Port ARM_M_AXI_HPM0
    + +    		 + + + + +
    AXI_HPM0_REGMAP|QSFP_0_0
      0x1200000000
    + +    		 + + + + +
    QSFP_REGMAP|UIO
      0x00A000
    + +    		 + + + + +
    UDP
      offset=0x0004
    + +    		 + + + + + +
    + + +Total Offset =
      0x120000A004 + +
    + +
    + + + + +
    AXI_HPM0_REGMAP|QSFP_0_1
      0x1200010000
    + +    		 + + + + + +
    + + +Total Offset =
      0x120001A004 + +
    + +
    + + + + +
    AXI_HPM0_REGMAP|QSFP_0_2
      0x1200020000
    + +    		 + + + + + +
    + + +Total Offset =
      0x120002A004 + +
    + +
    + + + + +
    AXI_HPM0_REGMAP|QSFP_0_3
      0x1200030000
    + +    		 + + + + + +
    + + +Total Offset =
      0x120003A004 + +
    + +
    + + + + +
    AXI_HPM0_REGMAP|QSFP_1_0
      0x1200040000
    + +    		 + + + + + +
    + + +Total Offset =
      0x120004A004 + +
    + +
    + + + + +
    AXI_HPM0_REGMAP|QSFP_1_1
      0x1200050000
    + +    		 + + + + + +
    + + +Total Offset =
      0x120005A004 + +
    + +
    + + + + +
    AXI_HPM0_REGMAP|QSFP_1_2
      0x1200060000
    + +    		 + + + + + +
    + + +Total Offset =
      0x120006A004 + +
    + +
    + + + + +
    AXI_HPM0_REGMAP|QSFP_1_3
      0x1200070000
    + +    		 + + + + + +
    + + +Total Offset =
      0x120007A004 + +
    + +

    + +

    Initial Value not specified +

    + +

    This register is defined in HDL source file uhd_regs.v.

    + +
    + +
    + +
    +

    Set the UDP port for CHDR_traffic

    + +
    + +
    + +
    + + +

    Offset 0x0010: BRIDGE_MAC_LSB Register (R|W)

    + + (show extended info) +
    + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + +
    + + + +
    Port ARM_M_AXI_HPM0
    + +    		 + + + + +
    AXI_HPM0_REGMAP|QSFP_0_0
      0x1200000000
    + +    		 + + + + +
    QSFP_REGMAP|UIO
      0x00A000
    + +    		 + + + + +
    BRIDGE_MAC_LSB
      offset=0x0010
    + +    		 + + + + + +
    + + +Total Offset =
      0x120000A010 + +
    + +
    + + + + +
    AXI_HPM0_REGMAP|QSFP_0_1
      0x1200010000
    + +    		 + + + + + +
    + + +Total Offset =
      0x120001A010 + +
    + +
    + + + + +
    AXI_HPM0_REGMAP|QSFP_0_2
      0x1200020000
    + +    		 + + + + + +
    + + +Total Offset =
      0x120002A010 + +
    + +
    + + + + +
    AXI_HPM0_REGMAP|QSFP_0_3
      0x1200030000
    + +    		 + + + + + +
    + + +Total Offset =
      0x120003A010 + +
    + +
    + + + + +
    AXI_HPM0_REGMAP|QSFP_1_0
      0x1200040000
    + +    		 + + + + + +
    + + +Total Offset =
      0x120004A010 + +
    + +
    + + + + +
    AXI_HPM0_REGMAP|QSFP_1_1
      0x1200050000
    + +    		 + + + + + +
    + + +Total Offset =
      0x120005A010 + +
    + +
    + + + + +
    AXI_HPM0_REGMAP|QSFP_1_2
      0x1200060000
    + +    		 + + + + + +
    + + +Total Offset =
      0x120006A010 + +
    + +
    + + + + +
    AXI_HPM0_REGMAP|QSFP_1_3
      0x1200070000
    + +    		 + + + + + +
    + + +Total Offset =
      0x120007A010 + +
    + +

    + +

    Initial Value not specified +

    + +

    This register is defined in HDL source file uhd_regs.v.

    + +
    + +
    + +
    +

    If BRIDGE_ENABLE is set use this MAC_ID

    + +
    + +
    + +
    + + +

    Offset 0x0014: BRIDGE_MAC_MSB Register (R|W)

    + + (show extended info) +
    + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + +
    + + + +
    Port ARM_M_AXI_HPM0
    + +    		 + + + + +
    AXI_HPM0_REGMAP|QSFP_0_0
      0x1200000000
    + +    		 + + + + +
    QSFP_REGMAP|UIO
      0x00A000
    + +    		 + + + + +
    BRIDGE_MAC_MSB
      offset=0x0014
    + +    		 + + + + + +
    + + +Total Offset =
      0x120000A014 + +
    + +
    + + + + +
    AXI_HPM0_REGMAP|QSFP_0_1
      0x1200010000
    + +    		 + + + + + +
    + + +Total Offset =
      0x120001A014 + +
    + +
    + + + + +
    AXI_HPM0_REGMAP|QSFP_0_2
      0x1200020000
    + +    		 + + + + + +
    + + +Total Offset =
      0x120002A014 + +
    + +
    + + + + +
    AXI_HPM0_REGMAP|QSFP_0_3
      0x1200030000
    + +    		 + + + + + +
    + + +Total Offset =
      0x120003A014 + +
    + +
    + + + + +
    AXI_HPM0_REGMAP|QSFP_1_0
      0x1200040000
    + +    		 + + + + + +
    + + +Total Offset =
      0x120004A014 + +
    + +
    + + + + +
    AXI_HPM0_REGMAP|QSFP_1_1
      0x1200050000
    + +    		 + + + + + +
    + + +Total Offset =
      0x120005A014 + +
    + +
    + + + + +
    AXI_HPM0_REGMAP|QSFP_1_2
      0x1200060000
    + +    		 + + + + + +
    + + +Total Offset =
      0x120006A014 + +
    + +
    + + + + +
    AXI_HPM0_REGMAP|QSFP_1_3
      0x1200070000
    + +    		 + + + + + +
    + + +Total Offset =
      0x120007A014 + +
    + +

    + +

    Initial Value not specified +

    + +

    This register is defined in HDL source file uhd_regs.v.

    + +
    + +
    + +
    +

    If BRIDGE_ENABLE is set use this MAC_ID

    + +
    + +
    + +
    + + +

    Offset 0x0018: BRIDGE_IP Register (R|W)

    + + (show extended info) +
    + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + +
    + + + +
    Port ARM_M_AXI_HPM0
    + +    		 + + + + +
    AXI_HPM0_REGMAP|QSFP_0_0
      0x1200000000
    + +    		 + + + + +
    QSFP_REGMAP|UIO
      0x00A000
    + +    		 + + + + +
    BRIDGE_IP
      offset=0x0018
    + +    		 + + + + + +
    + + +Total Offset =
      0x120000A018 + +
    + +
    + + + + +
    AXI_HPM0_REGMAP|QSFP_0_1
      0x1200010000
    + +    		 + + + + + +
    + + +Total Offset =
      0x120001A018 + +
    + +
    + + + + +
    AXI_HPM0_REGMAP|QSFP_0_2
      0x1200020000
    + +    		 + + + + + +
    + + +Total Offset =
      0x120002A018 + +
    + +
    + + + + +
    AXI_HPM0_REGMAP|QSFP_0_3
      0x1200030000
    + +    		 + + + + + +
    + + +Total Offset =
      0x120003A018 + +
    + +
    + + + + +
    AXI_HPM0_REGMAP|QSFP_1_0
      0x1200040000
    + +    		 + + + + + +
    + + +Total Offset =
      0x120004A018 + +
    + +
    + + + + +
    AXI_HPM0_REGMAP|QSFP_1_1
      0x1200050000
    + +    		 + + + + + +
    + + +Total Offset =
      0x120005A018 + +
    + +
    + + + + +
    AXI_HPM0_REGMAP|QSFP_1_2
      0x1200060000
    + +    		 + + + + + +
    + + +Total Offset =
      0x120006A018 + +
    + +
    + + + + +
    AXI_HPM0_REGMAP|QSFP_1_3
      0x1200070000
    + +    		 + + + + + +
    + + +Total Offset =
      0x120007A018 + +
    + +

    + +

    Initial Value not specified +

    + +

    This register is defined in HDL source file uhd_regs.v.

    + +
    + +
    + +
    +

    If BRIDGE_ENABLE is set use this IP Address

    + +
    + +
    + +
    + + +

    Offset 0x001C: BRIDGE_UDP Register (R|W)

    + + (show extended info) +
    + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + +
    + + + +
    Port ARM_M_AXI_HPM0
    + +    		 + + + + +
    AXI_HPM0_REGMAP|QSFP_0_0
      0x1200000000
    + +    		 + + + + +
    QSFP_REGMAP|UIO
      0x00A000
    + +    		 + + + + +
    BRIDGE_UDP
      offset=0x001C
    + +    		 + + + + + +
    + + +Total Offset =
      0x120000A01C + +
    + +
    + + + + +
    AXI_HPM0_REGMAP|QSFP_0_1
      0x1200010000
    + +    		 + + + + + +
    + + +Total Offset =
      0x120001A01C + +
    + +
    + + + + +
    AXI_HPM0_REGMAP|QSFP_0_2
      0x1200020000
    + +    		 + + + + + +
    + + +Total Offset =
      0x120002A01C + +
    + +
    + + + + +
    AXI_HPM0_REGMAP|QSFP_0_3
      0x1200030000
    + +    		 + + + + + +
    + + +Total Offset =
      0x120003A01C + +
    + +
    + + + + +
    AXI_HPM0_REGMAP|QSFP_1_0
      0x1200040000
    + +    		 + + + + + +
    + + +Total Offset =
      0x120004A01C + +
    + +
    + + + + +
    AXI_HPM0_REGMAP|QSFP_1_1
      0x1200050000
    + +    		 + + + + + +
    + + +Total Offset =
      0x120005A01C + +
    + +
    + + + + +
    AXI_HPM0_REGMAP|QSFP_1_2
      0x1200060000
    + +    		 + + + + + +
    + + +Total Offset =
      0x120006A01C + +
    + +
    + + + + +
    AXI_HPM0_REGMAP|QSFP_1_3
      0x1200070000
    + +    		 + + + + + +
    + + +Total Offset =
      0x120007A01C + +
    + +

    + +

    Initial Value not specified +

    + +

    This register is defined in HDL source file uhd_regs.v.

    + +
    + +
    + +
    +

    If BRIDGE_ENABLE is set use this UDP Port for CHDR_traffic

    + +
    + +
    + +
    + + +

    Offset 0x0020: BRIDGE_ENABLE Register (R|W)

    + + (show extended info) +
    + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + +
    + + + +
    Port ARM_M_AXI_HPM0
    + +    		 + + + + +
    AXI_HPM0_REGMAP|QSFP_0_0
      0x1200000000
    + +    		 + + + + +
    QSFP_REGMAP|UIO
      0x00A000
    + +    		 + + + + +
    BRIDGE_ENABLE
      offset=0x0020
    + +    		 + + + + + +
    + + +Total Offset =
      0x120000A020 + +
    + +
    + + + + +
    AXI_HPM0_REGMAP|QSFP_0_1
      0x1200010000
    + +    		 + + + + + +
    + + +Total Offset =
      0x120001A020 + +
    + +
    + + + + +
    AXI_HPM0_REGMAP|QSFP_0_2
      0x1200020000
    + +    		 + + + + + +
    + + +Total Offset =
      0x120002A020 + +
    + +
    + + + + +
    AXI_HPM0_REGMAP|QSFP_0_3
      0x1200030000
    + +    		 + + + + + +
    + + +Total Offset =
      0x120003A020 + +
    + +
    + + + + +
    AXI_HPM0_REGMAP|QSFP_1_0
      0x1200040000
    + +    		 + + + + + +
    + + +Total Offset =
      0x120004A020 + +
    + +
    + + + + +
    AXI_HPM0_REGMAP|QSFP_1_1
      0x1200050000
    + +    		 + + + + + +
    + + +Total Offset =
      0x120005A020 + +
    + +
    + + + + +
    AXI_HPM0_REGMAP|QSFP_1_2
      0x1200060000
    + +    		 + + + + + +
    + + +Total Offset =
      0x120006A020 + +
    + +
    + + + + +
    AXI_HPM0_REGMAP|QSFP_1_3
      0x1200070000
    + +    		 + + + + + +
    + + +Total Offset =
      0x120007A020 + +
    + +

    + +

    Initial Value not specified +

    + +

    This register is defined in HDL source file uhd_regs.v.

    + +
    + +
    + +
    +

    Bit 0 Controls the following logic

    +
    always_comb begin : bridge_mux
+my_mac            = bridge_en ? bridge_mac_reg : mac_reg;
+my_ip             = bridge_en ? bridge_ip_reg : ip_reg;
+my_udp_chdr_port  = bridge_en ? bridge_udp_port : udp_port;
+end
+
    + +
    + +
    + +
    + + +

    Offset 0x0030: CHDR_DROPPED Register (R|W)

    + + (show extended info) +
    + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + +
    + + + +
    Port ARM_M_AXI_HPM0
    + +    		 + + + + +
    AXI_HPM0_REGMAP|QSFP_0_0
      0x1200000000
    + +    		 + + + + +
    QSFP_REGMAP|UIO
      0x00A000
    + +    		 + + + + +
    CHDR_DROPPED
      offset=0x0030
    + +    		 + + + + + +
    + + +Total Offset =
      0x120000A030 + +
    + +
    + + + + +
    AXI_HPM0_REGMAP|QSFP_0_1
      0x1200010000
    + +    		 + + + + + +
    + + +Total Offset =
      0x120001A030 + +
    + +
    + + + + +
    AXI_HPM0_REGMAP|QSFP_0_2
      0x1200020000
    + +    		 + + + + + +
    + + +Total Offset =
      0x120002A030 + +
    + +
    + + + + +
    AXI_HPM0_REGMAP|QSFP_0_3
      0x1200030000
    + +    		 + + + + + +
    + + +Total Offset =
      0x120003A030 + +
    + +
    + + + + +
    AXI_HPM0_REGMAP|QSFP_1_0
      0x1200040000
    + +    		 + + + + + +
    + + +Total Offset =
      0x120004A030 + +
    + +
    + + + + +
    AXI_HPM0_REGMAP|QSFP_1_1
      0x1200050000
    + +    		 + + + + + +
    + + +Total Offset =
      0x120005A030 + +
    + +
    + + + + +
    AXI_HPM0_REGMAP|QSFP_1_2
      0x1200060000
    + +    		 + + + + + +
    + + +Total Offset =
      0x120006A030 + +
    + +
    + + + + +
    AXI_HPM0_REGMAP|QSFP_1_3
      0x1200070000
    + +    		 + + + + + +
    + + +Total Offset =
      0x120007A030 + +
    + +

    + +

    Initial Value not specified +

    + +

    This register is defined in HDL source file uhd_regs.v.

    + +
    + +
    + +
    +

    Count the number of Packets dropped that were addressed to the CHDR section.

    + +
    + +
    + +
    + + +

    Offset 0x0034: CPU_DROPPED Register (R|W)

    + + (show extended info) +
    + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + +
    + + + +
    Port ARM_M_AXI_HPM0
    + +    		 + + + + +
    AXI_HPM0_REGMAP|QSFP_0_0
      0x1200000000
    + +    		 + + + + +
    QSFP_REGMAP|UIO
      0x00A000
    + +    		 + + + + +
    CPU_DROPPED
      offset=0x0034
    + +    		 + + + + + +
    + + +Total Offset =
      0x120000A034 + +
    + +
    + + + + +
    AXI_HPM0_REGMAP|QSFP_0_1
      0x1200010000
    + +    		 + + + + + +
    + + +Total Offset =
      0x120001A034 + +
    + +
    + + + + +
    AXI_HPM0_REGMAP|QSFP_0_2
      0x1200020000
    + +    		 + + + + + +
    + + +Total Offset =
      0x120002A034 + +
    + +
    + + + + +
    AXI_HPM0_REGMAP|QSFP_0_3
      0x1200030000
    + +    		 + + + + + +
    + + +Total Offset =
      0x120003A034 + +
    + +
    + + + + +
    AXI_HPM0_REGMAP|QSFP_1_0
      0x1200040000
    + +    		 + + + + + +
    + + +Total Offset =
      0x120004A034 + +
    + +
    + + + + +
    AXI_HPM0_REGMAP|QSFP_1_1
      0x1200050000
    + +    		 + + + + + +
    + + +Total Offset =
      0x120005A034 + +
    + +
    + + + + +
    AXI_HPM0_REGMAP|QSFP_1_2
      0x1200060000
    + +    		 + + + + + +
    + + +Total Offset =
      0x120006A034 + +
    + +
    + + + + +
    AXI_HPM0_REGMAP|QSFP_1_3
      0x1200070000
    + +    		 + + + + + +
    + + +Total Offset =
      0x120007A034 + +
    + +

    + +

    Initial Value not specified +

    + +

    This register is defined in HDL source file uhd_regs.v.

    + +
    + +
    + +
    +

    Count the number of Packets dropped that were addressed to us, but not to the CHDR section.

    + +
    + +
    + +
    + + +

    Offset 0x0038: PAUSE Register (R|W)

    + + (show extended info) +
    + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + +
    + + + +
    Port ARM_M_AXI_HPM0
    + +    		 + + + + +
    AXI_HPM0_REGMAP|QSFP_0_0
      0x1200000000
    + +    		 + + + + +
    QSFP_REGMAP|UIO
      0x00A000
    + +    		 + + + + +
    PAUSE
      offset=0x0038
    + +    		 + + + + + +
    + + +Total Offset =
      0x120000A038 + +
    + +
    + + + + +
    AXI_HPM0_REGMAP|QSFP_0_1
      0x1200010000
    + +    		 + + + + + +
    + + +Total Offset =
      0x120001A038 + +
    + +
    + + + + +
    AXI_HPM0_REGMAP|QSFP_0_2
      0x1200020000
    + +    		 + + + + + +
    + + +Total Offset =
      0x120002A038 + +
    + +
    + + + + +
    AXI_HPM0_REGMAP|QSFP_0_3
      0x1200030000
    + +    		 + + + + + +
    + + +Total Offset =
      0x120003A038 + +
    + +
    + + + + +
    AXI_HPM0_REGMAP|QSFP_1_0
      0x1200040000
    + +    		 + + + + + +
    + + +Total Offset =
      0x120004A038 + +
    + +
    + + + + +
    AXI_HPM0_REGMAP|QSFP_1_1
      0x1200050000
    + +    		 + + + + + +
    + + +Total Offset =
      0x120005A038 + +
    + +
    + + + + +
    AXI_HPM0_REGMAP|QSFP_1_2
      0x1200060000
    + +    		 + + + + + +
    + + +Total Offset =
      0x120006A038 + +
    + +
    + + + + +
    AXI_HPM0_REGMAP|QSFP_1_3
      0x1200070000
    + +    		 + + + + + +
    + + +Total Offset =
      0x120007A038 + +
    + +

    + +

    Initial Value not specified +

    + +

    This register is defined in HDL source file uhd_regs.v.

    + +
    + +
    + +
    +
    + +
    + + + + + + + + + + + + + + +
    BitsName
    31..16 +

    pause_clear

    +

    +

    If the fullness of the CHDR_FIFO in ETH_W words falls bellow this value stop requesting an ethernet pause. +Pause clear must be less than pause set or terrible things will happen. +The clearing of the pause request causes the MAC to send a request to resume traffic. This feature is only +used with 100Gb ethernet

    + +
    15..0 +

    pause_set

    +

    +

    If the fullness of the CHDR_FIFO in ETH_W words exceeds this value request an ethernet pause. This feature is only +used with 100Gb ethernet

    + +
    + +
    + +
    + +
    + +
    + +

    VERSIONING_REGS_REGMAP

    + +

    VERSIONING_CONSTANTS

    + +
    + + +

    CPLD_IFC_VERSION Enumeration

    +CPLD interface module.
    + For guidance on when to update these revision numbers, + please refer to the register map documentation accordingly: +
  • Current version: CURRENT_VERSION +
  • Oldest compatible version: OLDEST_COMPATIBLE_VERSION +
  • Version last modified: VERSION_LAST_MODIFIED + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + +
    Value Name
    Dec Hex
    00x00000000 +

    CPLD_IFC_CURRENT_VERSION_MINOR

    + +
    00x00000000 +

    CPLD_IFC_CURRENT_VERSION_BUILD

    + +
    00x00000000 +

    CPLD_IFC_OLDEST_COMPATIBLE_VERSION_MINOR

    + +
    00x00000000 +

    CPLD_IFC_OLDEST_COMPATIBLE_VERSION_BUILD

    + +
    20x00000002 +

    CPLD_IFC_CURRENT_VERSION_MAJOR

    + +
    20x00000002 +

    CPLD_IFC_OLDEST_COMPATIBLE_VERSION_MAJOR

    + +
    5537198170x21011809 +

    CPLD_IFC_VERSION_LAST_MODIFIED_TIME

    + +
    + +

    + This enumerated type is defined in HDL source file cpld_interface_regs.v. +

    + + + +
    + + +

    DB_GPIO_IFC_VERSION Enumeration

    +Daughterboard GPIO interface.
    + For guidance on when to update these revision numbers, + please refer to the register map documentation accordingly: +
  • Current version: CURRENT_VERSION +
  • Oldest compatible version: OLDEST_COMPATIBLE_VERSION +
  • Version last modified: VERSION_LAST_MODIFIED + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + +
    Value Name
    Dec Hex
    00x00000000 +

    DB_GPIO_IFC_CURRENT_VERSION_MINOR

    + +
    00x00000000 +

    DB_GPIO_IFC_CURRENT_VERSION_BUILD

    + +
    00x00000000 +

    DB_GPIO_IFC_OLDEST_COMPATIBLE_VERSION_MINOR

    + +
    00x00000000 +

    DB_GPIO_IFC_OLDEST_COMPATIBLE_VERSION_BUILD

    + +
    10x00000001 +

    DB_GPIO_IFC_CURRENT_VERSION_MAJOR

    + +
    10x00000001 +

    DB_GPIO_IFC_OLDEST_COMPATIBLE_VERSION_MAJOR

    + +
    5379865820x20110616 +

    DB_GPIO_IFC_VERSION_LAST_MODIFIED_TIME

    + +
    + +

    + This enumerated type is defined in HDL source file db_gpio_interface.v. +

    + + + +
    + + +

    FPGA_VERSION Enumeration

    +FPGA version.
    + For guidance on when to update these revision numbers, + please refer to the register map documentation accordingly: +
  • Current version: CURRENT_VERSION +
  • Oldest compatible version: OLDEST_COMPATIBLE_VERSION +
  • Version last modified: VERSION_LAST_MODIFIED + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + +
    Value Name
    Dec Hex
    00x00000000 +

    FPGA_CURRENT_VERSION_BUILD

    + +
    00x00000000 +

    FPGA_OLDEST_COMPATIBLE_VERSION_MINOR

    + +
    00x00000000 +

    FPGA_OLDEST_COMPATIBLE_VERSION_BUILD

    + +
    30x00000003 +

    FPGA_CURRENT_VERSION_MINOR

    + +
    70x00000007 +

    FPGA_CURRENT_VERSION_MAJOR

    + +
    70x00000007 +

    FPGA_OLDEST_COMPATIBLE_VERSION_MAJOR

    + +
    5539159260x21041616 +

    FPGA_VERSION_LAST_MODIFIED_TIME

    + +
    + +

    + This enumerated type is defined in HDL source file x4xx.v. +

    + + + +
    + + +

    RF_CORE_100M_VERSION Enumeration

    +100 MHz RF core.
    + For guidance on when to update these revision numbers, + please refer to the register map documentation accordingly: +
  • Current version: CURRENT_VERSION +
  • Oldest compatible version: OLDEST_COMPATIBLE_VERSION +
  • Version last modified: VERSION_LAST_MODIFIED + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + +
    Value Name
    Dec Hex
    00x00000000 +

    RF_CORE_100M_CURRENT_VERSION_MINOR

    + +
    00x00000000 +

    RF_CORE_100M_CURRENT_VERSION_BUILD

    + +
    00x00000000 +

    RF_CORE_100M_OLDEST_COMPATIBLE_VERSION_MINOR

    + +
    00x00000000 +

    RF_CORE_100M_OLDEST_COMPATIBLE_VERSION_BUILD

    + +
    10x00000001 +

    RF_CORE_100M_CURRENT_VERSION_MAJOR

    + +
    10x00000001 +

    RF_CORE_100M_OLDEST_COMPATIBLE_VERSION_MAJOR

    + +
    5379292390x20102617 +

    RF_CORE_100M_VERSION_LAST_MODIFIED_TIME

    + +
    + +

    + This enumerated type is defined in HDL source file rf_core_100m.v. +

    + + + +
    + + +

    RF_CORE_400M_VERSION Enumeration

    +400 MHz RF core.
    + For guidance on when to update these revision numbers, + please refer to the register map documentation accordingly: +
  • Current version: CURRENT_VERSION +
  • Oldest compatible version: OLDEST_COMPATIBLE_VERSION +
  • Version last modified: VERSION_LAST_MODIFIED + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + +
    Value Name
    Dec Hex
    00x00000000 +

    RF_CORE_400M_CURRENT_VERSION_MINOR

    + +
    00x00000000 +

    RF_CORE_400M_CURRENT_VERSION_BUILD

    + +
    00x00000000 +

    RF_CORE_400M_OLDEST_COMPATIBLE_VERSION_MINOR

    + +
    00x00000000 +

    RF_CORE_400M_OLDEST_COMPATIBLE_VERSION_BUILD

    + +
    10x00000001 +

    RF_CORE_400M_CURRENT_VERSION_MAJOR

    + +
    10x00000001 +

    RF_CORE_400M_OLDEST_COMPATIBLE_VERSION_MAJOR

    + +
    5379292390x20102617 +

    RF_CORE_400M_VERSION_LAST_MODIFIED_TIME

    + +
    + +

    + This enumerated type is defined in HDL source file rf_core_400m.v. +

    + + + + + +

    VERSIONING_REGS

    + +
    + + +

    COMPONENTS_INDEXES Enumeration

    +This enum contains indexes for all the components in the X410 + (both common and app-specific) which version information is + desired to be available for compatibility tracking purposes.
    + + + + + +
    Description Index range Max # of components
    Common components 0 to 23 24
    UHD-specific components 24 to 43 20
    LV-specific components 44 to 63 20
    + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + +
    Value Name
    0 +

    FPGA_VERSION_INDEX

    + +
    1 +

    CPLD_IFC_INDEX

    + +
    2 +

    DB0_RF_CORE_INDEX

    + +
    3 +

    DB1_RF_CORE_INDEX

    + +
    4 +

    DB0_GPIO_IFC_INDEX

    + +
    5 +

    DB1_GPIO_IFC_INDEX

    + +
    + +

    + This enumerated type is defined in HDL source file x4xx_versioning_regs.v. +

    + +
    + +
    + + +

    Offset 0x0000: CURRENT_VERSION(63:0) Register Array (R)

    + + (show extended info) +
    + + + + + + + + + + + + + + + + + +
    + + + +
    Port ARM_M_AXI_HPM0
    + +    		 + + + + +
    AXI_HPM0_REGMAP|CORE_REGS
      0x10000A0000
    + +    		 + + + + +
    CORE_REGS_REGMAP|VERSIONING_REGS
      0x000C00
    + +    		 + + + + +
    CURRENT_VERSION
      offset=0x0000 + i*0x10
    + +    		 + + + + + + +
    + + +Cannot determine accessibility through this path
    +Total Offset =
      0x10000A0C00 + i*0x10 + +
    + +

    + +

    Initial Values
    + + +
    default=>0x00000000
    +

    + +

    This register is defined in HDL source file x4xx_versioning_regs.v.
    +It uses RegType VERSION_TYPE which is defined in HDL source file x4xx_versioning_regs.v.

    + +
    + +
    + +Component's current version.
    + This register contains the current component's version implemented in HDL. + The current version shall be used to detect a component being too + old for the driver/software:
    + SW oldest compatible version > Component's current version --> Component is too old. + +
    + + + + + + + + + + + + + + + + + + + +
    BitsName
    31..23 +

    MAJOR   (initialvalue=0)

    +

    Major number (max = 511): an increase reflects a breaking change.
    + IMPORTANT! MAJOR must always remain in sync between the component's + CURRENT_VERSION and OLDEST_COMPATIBLE_VERSION registers.

    + Update MAJOR when: +

  • the component has changed and requires a software changes as a result. +
  • the component's bitfields/registers have been modified or deleted. +
  • the component's bitfields/registers are initialized to different value (unexpected by software). +
  • new bitfields/registers are added that require software interaction for the component to operate.

    + +
    • 22..12 +

    MINOR   (initialvalue=0)

    +

    Minor number (max = 2047): an increase reflects a non-breaking change that the driver should be aware of.

    + Update MINOR when: +

  • a new feature is added to the component, which does not conflict with the driver. +
  • minor implementation changes were made to the component which are worth tracking. +
  • the component has added new bitfields/registers that do not require software interaction + (i.e. the default value is 0 and writing 0 does not change behavior, assuming SW writes 0's to + previously undefined bits). +
  • MAJOR is updated (reset MINOR to 0).

    + +
    • 11..0 +

    BUILD   (initialvalue=0)

    +

    Build number (max = 4095): an increase reflects a change in the source code that yields a new implementation, + but that should not impact the component's behavior
    + Eventually, this number is intended to be automatically incremented for any new build.

    + Meanwhile, update BUILD when: +

  • the component's source code changes are not captured by MAJOR or MINOR. +
  • MINOR or MAJOR are updated (reset BUILD to 0).

    + +
    • + +
    + +
    + + +

    Offset 0x0004: OLDEST_COMPATIBLE_VERSION(63:0) Register Array (R)

    + + (show extended info) +
    + + + + + + + + + + + + + + + + + +
    + + + +
    Port ARM_M_AXI_HPM0
    + +    		 + + + + +
    AXI_HPM0_REGMAP|CORE_REGS
      0x10000A0000
    + +    		 + + + + +
    CORE_REGS_REGMAP|VERSIONING_REGS
      0x000C00
    + +    		 + + + + +
    OLDEST_COMPATIBLE_VERSION
      offset=0x0004 + i*0x10
    + +    		 + + + + + + +
    + + +Cannot determine accessibility through this path
    +Total Offset =
      0x10000A0C04 + i*0x10 + +
    + +

    + +

    Initial Values
    + + +
    default=>0x00000000
    +

    + +

    This register is defined in HDL source file x4xx_versioning_regs.v.
    +It uses RegType VERSION_TYPE which is defined in HDL source file x4xx_versioning_regs.v.

    + +
    + +
    + +Component's oldest compatible version.
    + This register contains the oldest compatible component's version, that is the oldest + component's implementation that is compatible with the current implementation.
    + The oldest compatible version shall be used to detect a component being too + new for the driver/software:
    + SW current version < Component's oldest compatible version --> Component is too new. + +
    + + + + + + + + + + + + + + + + + + + +
    BitsName
    31..23 +

    MAJOR   (initialvalue=0)

    +

    Major number (max = 511): an increase reflects a breaking change.
    + IMPORTANT! MAJOR must always remain in sync between the component's + CURRENT_VERSION and OLDEST_COMPATIBLE_VERSION registers.

    + Update MAJOR when: +

  • the component has changed and requires a software changes as a result. +
  • the component's bitfields/registers have been modified or deleted. +
  • the component's bitfields/registers are initialized to different value (unexpected by software). +
  • new bitfields/registers are added that require software interaction for the component to operate.

    + +
    • 22..12 +

    MINOR   (initialvalue=0)

    +

    Minor number (max = 2047): an increase reflects a non-breaking change that the driver should be aware of.

    + Update MINOR when: +

  • a new feature is added to the component, which does not conflict with the driver. +
  • minor implementation changes were made to the component which are worth tracking. +
  • the component has added new bitfields/registers that do not require software interaction + (i.e. the default value is 0 and writing 0 does not change behavior, assuming SW writes 0's to + previously undefined bits). +
  • MAJOR is updated (reset MINOR to 0).

    + +
    • 11..0 +

    BUILD   (initialvalue=0)

    +

    Build number (max = 4095): an increase reflects a change in the source code that yields a new implementation, + but that should not impact the component's behavior
    + Eventually, this number is intended to be automatically incremented for any new build.

    + Meanwhile, update BUILD when: +

  • the component's source code changes are not captured by MAJOR or MINOR. +
  • MINOR or MAJOR are updated (reset BUILD to 0).

    + +
    • + +
    + +
    + + +

    Offset 0x0008: VERSION_LAST_MODIFIED(63:0) Register Array (R)

    + + (show extended info) +
    + + + + + + + + + + + + + + + + + +
    + + + +
    Port ARM_M_AXI_HPM0
    + +    		 + + + + +
    AXI_HPM0_REGMAP|CORE_REGS
      0x10000A0000
    + +    		 + + + + +
    CORE_REGS_REGMAP|VERSIONING_REGS
      0x000C00
    + +    		 + + + + +
    VERSION_LAST_MODIFIED
      offset=0x0008 + i*0x10
    + +    		 + + + + + + +
    + + +Cannot determine accessibility through this path
    +Total Offset =
      0x10000A0C08 + i*0x10 + +
    + +

    + +

    Initial Value not specified +

    + +

    This register is defined in HDL source file x4xx_versioning_regs.v.
    +It uses RegType TIMESTAMP_TYPE which is defined in HDL source file x4xx_versioning_regs.v.

    + +
    + +
    + +Component's versions update time.
    + This register provides the time stamp for the last modification to + the component's versions (current & oldest compatible). + The time stamp is provided in hexadecimal format: 0xYYMMDDHH.
    + + +
    + + + + + + + + + + + + + + + + + + + + + + + + +
    BitsName
    31..24 +

    YY

    +

    This is the year number after 2000 (e.g. 2019 = 0x19).

    + +
    23..16 +

    MM

    +

    + +
    15..8 +

    DD

    +

    + +
    7..0 +

    HH

    +

    + +
    + +
    + +
    + + +

    Offset 0x000C: RESERVED(63:0) Register Array (R)

    + + (show extended info) +
    + + + + + + + + + + + + + + + + + +
    + + + +
    Port ARM_M_AXI_HPM0
    + +    		 + + + + +
    AXI_HPM0_REGMAP|CORE_REGS
      0x10000A0000
    + +    		 + + + + +
    CORE_REGS_REGMAP|VERSIONING_REGS
      0x000C00
    + +    		 + + + + +
    RESERVED
      offset=0x000C + i*0x10
    + +    		 + + + + + + +
    + + +Cannot determine accessibility through this path
    +Total Offset =
      0x10000A0C0C + i*0x10 + +
    + +

    + +

    Initial Value not specified +

    + +

    This register is defined in HDL source file x4xx_versioning_regs.v.
    +It uses RegType RESERVED_TYPE which is defined in HDL source file x4xx_versioning_regs.v.

    + +
    + +
    + +Reserved.
    + + +
    + +
    + +
    + + + +
    + +

    XGE_MAC_REGMAP

    +
    +
    +

    OPENCORE_XGE_REGISTERS

    +
    +

    10G MAC ethernet registers defined in the USRP OSS distribution fpga/usrp3/lib/xge/doc/xge_mac_spec.pdf

    +
    + +
    + + + \ No newline at end of file diff --git a/fpga/usrp3/top/x400/dts/usrp_x410_fpga_C1.dts b/fpga/usrp3/top/x400/dts/usrp_x410_fpga_C1.dts new file mode 100644 index 000000000..00ad4d25d --- /dev/null +++ b/fpga/usrp3/top/x400/dts/usrp_x410_fpga_C1.dts @@ -0,0 +1,20 @@ +/* + * Copyright 2021 Ettus Research, a National Instruments Brand + * + * SPDX-License-Identifier: LGPL-3.0-or-later + */ + +/dts-v1/; +/plugin/; + +#include "x410-version-info.dtsi" + +#include "x410-fpga.dtsi" + +#include "x410-common.dtsi" + +#include "x410-rfdc.dtsi" + +#include "x410-dma.dtsi" + +#include "x410-100gbe-port0.dtsi" diff --git a/fpga/usrp3/top/x400/dts/usrp_x410_fpga_CG.dts b/fpga/usrp3/top/x400/dts/usrp_x410_fpga_CG.dts new file mode 100644 index 000000000..35d9238e2 --- /dev/null +++ b/fpga/usrp3/top/x400/dts/usrp_x410_fpga_CG.dts @@ -0,0 +1,22 @@ +/* + * Copyright 2021 Ettus Research, a National Instruments Brand + * + * SPDX-License-Identifier: LGPL-3.0-or-later + */ + +/dts-v1/; +/plugin/; + +#include "x410-version-info.dtsi" + +#include "x410-fpga.dtsi" + +#include "x410-common.dtsi" + +#include "x410-rfdc.dtsi" + +#include "x410-dma.dtsi" + +#include "x410-100gbe-port0.dtsi" + +#include "x410-100gbe-port1.dtsi" diff --git a/fpga/usrp3/top/x400/dts/usrp_x410_fpga_X1.dts b/fpga/usrp3/top/x400/dts/usrp_x410_fpga_X1.dts new file mode 100644 index 000000000..42142cd9b --- /dev/null +++ b/fpga/usrp3/top/x400/dts/usrp_x410_fpga_X1.dts @@ -0,0 +1,21 @@ +/* + * Copyright 2021 Ettus Research, a National Instruments Brand + * + * SPDX-License-Identifier: LGPL-3.0-or-later + */ + +/dts-v1/; +/plugin/; + +#include "x410-version-info.dtsi" + +#include "x410-fpga.dtsi" + +#include "x410-common.dtsi" + +#include "x410-rfdc.dtsi" + +#include "x410-dma.dtsi" + +#include "x410-10gbe-port0.dtsi" + diff --git a/fpga/usrp3/top/x400/dts/usrp_x410_fpga_X4.dts b/fpga/usrp3/top/x400/dts/usrp_x410_fpga_X4.dts new file mode 100644 index 000000000..8fd7e450b --- /dev/null +++ b/fpga/usrp3/top/x400/dts/usrp_x410_fpga_X4.dts @@ -0,0 +1,20 @@ +/* + * Copyright 2021 Ettus Research, a National Instruments Brand + * + * SPDX-License-Identifier: LGPL-3.0-or-later + */ + +/dts-v1/; +/plugin/; + +#include "x410-version-info.dtsi" + +#include "x410-fpga.dtsi" + +#include "x410-common.dtsi" + +#include "x410-rfdc.dtsi" + +#include "x410-dma.dtsi" + +#include "x410-10gbe-port0-x4.dtsi" diff --git a/fpga/usrp3/top/x400/dts/usrp_x410_fpga_X4C.dts b/fpga/usrp3/top/x400/dts/usrp_x410_fpga_X4C.dts new file mode 100644 index 000000000..be2c23a03 --- /dev/null +++ b/fpga/usrp3/top/x400/dts/usrp_x410_fpga_X4C.dts @@ -0,0 +1,22 @@ +/* + * Copyright 2021 Ettus Research, a National Instruments Brand + * + * SPDX-License-Identifier: LGPL-3.0-or-later + */ + +/dts-v1/; +/plugin/; + +#include "x410-version-info.dtsi" + +#include "x410-fpga.dtsi" + +#include "x410-common.dtsi" + +#include "x410-rfdc.dtsi" + +#include "x410-dma.dtsi" + +#include "x410-10gbe-port0-x4.dtsi" + +#include "x410-100gbe-port1.dtsi" diff --git a/fpga/usrp3/top/x400/dts/usrp_x410_fpga_XG.dts b/fpga/usrp3/top/x400/dts/usrp_x410_fpga_XG.dts new file mode 100644 index 000000000..46f7c0526 --- /dev/null +++ b/fpga/usrp3/top/x400/dts/usrp_x410_fpga_XG.dts @@ -0,0 +1,22 @@ +/* + * Copyright 2021 Ettus Research, a National Instruments Brand + * + * SPDX-License-Identifier: LGPL-3.0-or-later + */ + +/dts-v1/; +/plugin/; + +#include "x410-version-info.dtsi" + +#include "x410-fpga.dtsi" + +#include "x410-common.dtsi" + +#include "x410-rfdc.dtsi" + +#include "x410-dma.dtsi" + +#include "x410-10gbe-port0.dtsi" + +#include "x410-10gbe-port1.dtsi" diff --git a/fpga/usrp3/top/x400/dts/x410-100gbe-port0.dtsi b/fpga/usrp3/top/x400/dts/x410-100gbe-port0.dtsi new file mode 100644 index 000000000..7b6470dd6 --- /dev/null +++ b/fpga/usrp3/top/x400/dts/x410-100gbe-port0.dtsi @@ -0,0 +1,41 @@ +/* + * Copyright 2021 Ettus Research, a National Instruments Brand + * + * SPDX-License-Identifier: LGPL-3.0-or-later + */ + +&fpga_full { + #address-cells = <2>; + #size-cells = <2>; + + nixge0: ethernet@1200000000 { + compatible = "ni,xge-enet-3.00"; + reg = <0x12 0x00000000 0x0 0x4000 + 0x12 0x00008000 0x0 0x2000>; + reg-names = "dma", "ctrl"; + + interrupts = <0 108 4 0 109 4>; + interrupt-names = "rx", "tx"; + interrupt-parent = <&gic>; + + nvmem-cells = <ð1_addr>; + nvmem-cell-names = "address"; + + status = "okay"; + + phy-mode = "internal"; + + fixed-link { + speed = <1000>; + full-duplex; + link-gpios = <&gpio 94 0>; + }; + }; + + misc_enet_regs_0: uio@120000A000 { + status = "okay"; + compatible = "usrp-uio"; + reg = <0x12 0x0000A000 0x0 0x2000>; + reg-names = "misc-enet-regs0"; + }; +}; diff --git a/fpga/usrp3/top/x400/dts/x410-100gbe-port1.dtsi b/fpga/usrp3/top/x400/dts/x410-100gbe-port1.dtsi new file mode 100644 index 000000000..6897671b9 --- /dev/null +++ b/fpga/usrp3/top/x400/dts/x410-100gbe-port1.dtsi @@ -0,0 +1,41 @@ +/* + * Copyright 2021 Ettus Research, a National Instruments Brand + * + * SPDX-License-Identifier: LGPL-3.0-or-later + */ + +&fpga_full { + #address-cells = <2>; + #size-cells = <2>; + + nixge1: ethernet@1200040000 { + compatible = "ni,xge-enet-3.00"; + reg = <0x12 0x00040000 0x0 0x4000 + 0x12 0x00048000 0x0 0x2000>; + reg-names = "dma", "ctrl"; + + interrupts = <0 110 4 0 111 4>; + interrupt-names = "rx", "tx"; + interrupt-parent = <&gic>; + + nvmem-cells = <ð5_addr>; + nvmem-cell-names = "address"; + + status = "okay"; + + phy-mode = "internal"; + + fixed-link { + speed = <1000>; + full-duplex; + link-gpios = <&gpio 98 0>; + }; + }; + + misc_enet_regs_1: uio@120004A000 { + status = "okay"; + compatible = "usrp-uio"; + reg = <0x12 0x0004A000 0x0 0x2000>; + reg-names = "misc-enet-regs1"; + }; +}; diff --git a/fpga/usrp3/top/x400/dts/x410-10gbe-port0-x4.dtsi b/fpga/usrp3/top/x400/dts/x410-10gbe-port0-x4.dtsi new file mode 100644 index 000000000..1a3b8a487 --- /dev/null +++ b/fpga/usrp3/top/x400/dts/x410-10gbe-port0-x4.dtsi @@ -0,0 +1,134 @@ +/* + * Copyright 2021 Ettus Research, a National Instruments Brand + * + * SPDX-License-Identifier: LGPL-3.0-or-later + */ + +&fpga_full { + #address-cells = <2>; + #size-cells = <2>; + + nixge0: ethernet@1200000000 { + compatible = "ni,xge-enet-3.00"; + reg = <0x12 0x00000000 0x0 0x4000 + 0x12 0x00008000 0x0 0x2000>; + reg-names = "dma", "ctrl"; + + interrupts = <0 108 4 0 109 4>; + interrupt-names = "rx", "tx"; + interrupt-parent = <&gic>; + + nvmem-cells = <ð1_addr>; + nvmem-cell-names = "address"; + + status = "okay"; + + phy-mode = "xgmii"; + + fixed-link { + speed = <10000>; + full-duplex; + link-gpios = <&gpio 94 0>; + }; + }; + + nixge0_1: ethernet@1200010000 { + compatible = "ni,xge-enet-3.00"; + reg = <0x12 0x00010000 0x0 0x4000 + 0x12 0x00018000 0x0 0x2000>; + reg-names = "dma", "ctrl"; + + interrupts = <0 108 4 0 109 4>; + interrupt-names = "rx", "tx"; + interrupt-parent = <&gic>; + + nvmem-cells = <ð2_addr>; + nvmem-cell-names = "address"; + + status = "okay"; + + phy-mode = "xgmii"; + + fixed-link { + speed = <10000>; + full-duplex; + link-gpios = <&gpio 95 0>; + }; + }; + + nixge0_2: ethernet@1200020000 { + compatible = "ni,xge-enet-3.00"; + reg = <0x12 0x00020000 0x0 0x4000 + 0x12 0x00028000 0x0 0x2000>; + reg-names = "dma", "ctrl"; + + interrupts = <0 108 4 0 109 4>; + interrupt-names = "rx", "tx"; + interrupt-parent = <&gic>; + + nvmem-cells = <ð3_addr>; + nvmem-cell-names = "address"; + + status = "okay"; + + phy-mode = "xgmii"; + + fixed-link { + speed = <10000>; + full-duplex; + link-gpios = <&gpio 96 0>; + }; + }; + + nixge0_3: ethernet@1200030000 { + compatible = "ni,xge-enet-3.00"; + reg = <0x12 0x00030000 0x0 0x4000 + 0x12 0x00038000 0x0 0x2000>; + reg-names = "dma", "ctrl"; + + interrupts = <0 108 4 0 109 4>; + interrupt-names = "rx", "tx"; + interrupt-parent = <&gic>; + + nvmem-cells = <ð4_addr>; + nvmem-cell-names = "address"; + + status = "okay"; + + phy-mode = "xgmii"; + + fixed-link { + speed = <10000>; + full-duplex; + link-gpios = <&gpio 97 0>; + }; + }; + + misc_enet_regs_0: uio@120000A000 { + status = "okay"; + compatible = "usrp-uio"; + reg = <0x12 0x0000A000 0x0 0x2000>; + reg-names = "misc-enet-regs0"; + }; + + misc_enet_regs_0_1: uio@120001A000 { + status = "okay"; + compatible = "usrp-uio"; + reg = <0x12 0x0001A000 0x0 0x2000>; + reg-names = "misc-enet-regs0-1"; + }; + + misc_enet_regs_0_2: uio@120002A000 { + status = "okay"; + compatible = "usrp-uio"; + reg = <0x12 0x0002A000 0x0 0x2000>; + reg-names = "misc-enet-regs0-2"; + }; + + misc_enet_regs_0_3: uio@120003A000 { + status = "okay"; + compatible = "usrp-uio"; + reg = <0x12 0x0003A000 0x0 0x2000>; + reg-names = "misc-enet-regs0-3"; + }; +}; diff --git a/fpga/usrp3/top/x400/dts/x410-10gbe-port0.dtsi b/fpga/usrp3/top/x400/dts/x410-10gbe-port0.dtsi new file mode 100644 index 000000000..968c9bb98 --- /dev/null +++ b/fpga/usrp3/top/x400/dts/x410-10gbe-port0.dtsi @@ -0,0 +1,41 @@ +/* + * Copyright 2021 Ettus Research, a National Instruments Brand + * + * SPDX-License-Identifier: LGPL-3.0-or-later + */ + +&fpga_full { + #address-cells = <2>; + #size-cells = <2>; + + nixge0: ethernet@1200000000 { + compatible = "ni,xge-enet-3.00"; + reg = <0x12 0x00000000 0x0 0x4000 + 0x12 0x00008000 0x0 0x2000>; + reg-names = "dma", "ctrl"; + + interrupts = <0 108 4 0 109 4>; + interrupt-names = "rx", "tx"; + interrupt-parent = <&gic>; + + nvmem-cells = <ð1_addr>; + nvmem-cell-names = "address"; + + status = "okay"; + + phy-mode = "xgmii"; + + fixed-link { + speed = <10000>; + full-duplex; + link-gpios = <&gpio 94 0>; + }; + }; + + misc_enet_regs_0: uio@120000A000 { + status = "okay"; + compatible = "usrp-uio"; + reg = <0x12 0x0000A000 0x0 0x2000>; + reg-names = "misc-enet-regs0"; + }; +}; diff --git a/fpga/usrp3/top/x400/dts/x410-10gbe-port1-x4.dtsi b/fpga/usrp3/top/x400/dts/x410-10gbe-port1-x4.dtsi new file mode 100644 index 000000000..5f4f5c8ed --- /dev/null +++ b/fpga/usrp3/top/x400/dts/x410-10gbe-port1-x4.dtsi @@ -0,0 +1,134 @@ +/* + * Copyright 2021 Ettus Research, a National Instruments Brand + * + * SPDX-License-Identifier: LGPL-3.0-or-later + */ + +&fpga_full { + #address-cells = <2>; + #size-cells = <2>; + + nixge1: ethernet@1200040000 { + compatible = "ni,xge-enet-3.00"; + reg = <0x12 0x00040000 0x0 0x4000 + 0x12 0x00048000 0x0 0x2000>; + reg-names = "dma", "ctrl"; + + interrupts = <0 110 4 0 111 4>; + interrupt-names = "rx", "tx"; + interrupt-parent = <&gic>; + + nvmem-cells = <ð5_addr>; + nvmem-cell-names = "address"; + + status = "okay"; + + phy-mode = "xgmii"; + + fixed-link { + speed = <10000>; + full-duplex; + link-gpios = <&gpio 98 0>; + }; + }; + + nixge1_1: ethernet@1200050000 { + compatible = "ni,xge-enet-3.00"; + reg = <0x12 0x00050000 0x0 0x4000 + 0x12 0x00058000 0x0 0x2000>; + reg-names = "dma", "ctrl"; + + interrupts = <0 110 4 0 111 4>; + interrupt-names = "rx", "tx"; + interrupt-parent = <&gic>; + + nvmem-cells = <ð6_addr>; + nvmem-cell-names = "address"; + + status = "okay"; + + phy-mode = "xgmii"; + + fixed-link { + speed = <10000>; + full-duplex; + link-gpios = <&gpio 99 0>; + }; + }; + + nixge1_2: ethernet@1200060000 { + compatible = "ni,xge-enet-3.00"; + reg = <0x12 0x00060000 0x0 0x4000 + 0x12 0x00068000 0x0 0x2000>; + reg-names = "dma", "ctrl"; + + interrupts = <0 110 4 0 111 4>; + interrupt-names = "rx", "tx"; + interrupt-parent = <&gic>; + + nvmem-cells = <ð7_addr>; + nvmem-cell-names = "address"; + + status = "okay"; + + phy-mode = "xgmii"; + + fixed-link { + speed = <10000>; + full-duplex; + link-gpios = <&gpio 100 0>; + }; + }; + + nixge1_3: ethernet@1200070000 { + compatible = "ni,xge-enet-3.00"; + reg = <0x12 0x00070000 0x0 0x4000 + 0x12 0x00078000 0x0 0x2000>; + reg-names = "dma", "ctrl"; + + interrupts = <0 110 4 0 111 4>; + interrupt-names = "rx", "tx"; + interrupt-parent = <&gic>; + + nvmem-cells = <ð8_addr>; + nvmem-cell-names = "address"; + + status = "okay"; + + phy-mode = "xgmii"; + + fixed-link { + speed = <10000>; + full-duplex; + link-gpios = <&gpio 101 0>; + }; + }; + + misc_enet_regs_1: uio@120004A000 { + status = "okay"; + compatible = "usrp-uio"; + reg = <0x12 0x0004A000 0x0 0x2000>; + reg-names = "misc-enet-regs1"; + }; + + misc_enet_regs_1_1: uio@120005A000 { + status = "okay"; + compatible = "usrp-uio"; + reg = <0x12 0x0005A000 0x0 0x2000>; + reg-names = "misc-enet-regs1-1"; + }; + + misc_enet_regs_1_2: uio@120006A000 { + status = "okay"; + compatible = "usrp-uio"; + reg = <0x12 0x0006A000 0x0 0x2000>; + reg-names = "misc-enet-regs1-2"; + }; + + misc_enet_regs_1_3: uio@120007A000 { + status = "okay"; + compatible = "usrp-uio"; + reg = <0x12 0x0007A000 0x0 0x2000>; + reg-names = "misc-enet-regs1-3"; + }; +}; diff --git a/fpga/usrp3/top/x400/dts/x410-10gbe-port1.dtsi b/fpga/usrp3/top/x400/dts/x410-10gbe-port1.dtsi new file mode 100644 index 000000000..62a82cf3b --- /dev/null +++ b/fpga/usrp3/top/x400/dts/x410-10gbe-port1.dtsi @@ -0,0 +1,41 @@ +/* + * Copyright 2021 Ettus Research, a National Instruments Brand + * + * SPDX-License-Identifier: LGPL-3.0-or-later + */ + +&fpga_full { + #address-cells = <2>; + #size-cells = <2>; + + nixge1: ethernet@1200040000 { + compatible = "ni,xge-enet-3.00"; + reg = <0x12 0x00040000 0x0 0x4000 + 0x12 0x00048000 0x0 0x2000>; + reg-names = "dma", "ctrl"; + + interrupts = <0 110 4 0 111 4>; + interrupt-names = "rx", "tx"; + interrupt-parent = <&gic>; + + nvmem-cells = <ð5_addr>; + nvmem-cell-names = "address"; + + status = "okay"; + + phy-mode = "xgmii"; + + fixed-link { + speed = <10000>; + full-duplex; + link-gpios = <&gpio 98 0>; + }; + }; + + misc_enet_regs_1: uio@120004A000 { + status = "okay"; + compatible = "usrp-uio"; + reg = <0x12 0x0004A000 0x0 0x2000>; + reg-names = "misc-enet-regs1"; + }; +}; diff --git a/fpga/usrp3/top/x400/dts/x410-common.dtsi b/fpga/usrp3/top/x400/dts/x410-common.dtsi new file mode 100644 index 000000000..b42266f50 --- /dev/null +++ b/fpga/usrp3/top/x400/dts/x410-common.dtsi @@ -0,0 +1,28 @@ +/* + * Copyright 2021 Ettus Research, a National Instruments Brand + * + * SPDX-License-Identifier: LGPL-3.0-or-later + */ + +&fpga_full { + #address-cells = <2>; + #size-cells = <2>; + uio@1000000000 { + compatible = "usrp-uio"; + reg = <0x10 0x00000000 0x0 0x1000>; + reg-names = "jtag-0"; + status = "okay"; + }; + uio@1000080000 { + compatible = "usrp-uio"; + reg = <0x10 0x00080000 0x0 0x20000>; + reg-names = "ctrlport-mboard-regs"; + status = "okay"; + }; + uio@10000A0000 { + compatible = "usrp-uio"; + reg = <0x10 0x000A0000 0x0 0x4000>; + reg-names = "mboard-regs"; + status = "okay"; + }; +}; diff --git a/fpga/usrp3/top/x400/dts/x410-dma.dtsi b/fpga/usrp3/top/x400/dts/x410-dma.dtsi new file mode 100644 index 000000000..d90fee699 --- /dev/null +++ b/fpga/usrp3/top/x400/dts/x410-dma.dtsi @@ -0,0 +1,50 @@ +/* + * Copyright 2021 Ettus Research, a National Instruments Brand + * + * SPDX-License-Identifier: LGPL-3.0-or-later + */ + +&fpga_full { + #address-cells = <2>; + #size-cells = <2>; + + misc_clk_3: misc_clk_3 { + #clock-cells = <0>; + clock-frequency = <200000000>; + compatible = "fixed-clock"; + }; + + // AXI DMA engine + control + nixge_internal: ethernet@10000A4000 { + compatible = "ni,xge-enet-3.00"; + reg = <0x10 0x000A4000 0x0 0x4000 + 0x10 0x000A8000 0x0 0x2000>; + reg-names = "dma", "ctrl"; + + clocks = <&misc_clk_3>; + clock-names = "bus_clk"; + + interrupts = <0 104 4 0 105 4>; + interrupt-names = "tx", "rx"; + interrupt-parent = <&gic>; + + status = "okay"; + + phy-mode = "internal"; + local-mac-address = <0x00 0x01 0x02 0x03 0x04 0x05>; + + fixed-link { + speed = <1000>; + full-duplex; + }; + }; + + // Misc internal Ethernet registers + uio@10000AA000 { + compatible = "usrp-uio"; + reg = <0x10 0x000AA000 0x0 0x2000>; + reg-names = "misc-enet-int-regs"; + status = "okay"; + }; + +}; diff --git a/fpga/usrp3/top/x400/dts/x410-fpga.dtsi b/fpga/usrp3/top/x400/dts/x410-fpga.dtsi new file mode 100644 index 000000000..66afb4091 --- /dev/null +++ b/fpga/usrp3/top/x400/dts/x410-fpga.dtsi @@ -0,0 +1,9 @@ +/* + * Copyright 2021 Ettus Research, a National Instruments Brand + * + * SPDX-License-Identifier: LGPL-3.0-or-later + */ + +&fpga_full { + firmware-name = "x410.bin"; +}; diff --git a/fpga/usrp3/top/x400/dts/x410-rfdc.dtsi b/fpga/usrp3/top/x400/dts/x410-rfdc.dtsi new file mode 100644 index 000000000..039f3afab --- /dev/null +++ b/fpga/usrp3/top/x400/dts/x410-rfdc.dtsi @@ -0,0 +1,38 @@ +/* + * Copyright 2021 Ettus Research, a National Instruments Brand + * + * SPDX-License-Identifier: LGPL-3.0-or-later + */ + +&fpga_full { + #address-cells = <2>; + #size-cells = <2>; + + misc_clk_1: misc_clk_1 { + #clock-cells = <0>; + clock-frequency = <40000000>; + compatible = "fixed-clock"; + }; + + misc_clk_2: misc_clk_2 { + #clock-cells = <0>; + clock-frequency = <184320000>; + compatible = "fixed-clock"; + }; + + rf_data_converter: usp_rf_data_converter@1000100000 { + clock-names = "s_axi_aclk", "m0_axis_aclk", "m2_axis_aclk", "s0_axis_aclk", "s1_axis_aclk"; + clocks = <&misc_clk_1>, <&misc_clk_2>, <&misc_clk_2>, <&misc_clk_2>, <&misc_clk_2>; + compatible = "xlnx,usp-rf-data-converter-2.1"; + num-insts = <0x1>; + param-list = [ 00 00 00 00 00 10 00 10 00 00 00 00 01 00 00 00 00 00 00 00 00 00 00 00 01 00 00 00 01 00 00 00 00 00 00 00 01 00 00 00 00 00 00 00 0f d6 ff 39 cc 97 07 40 0a d7 a3 70 3d 0a a7 40 0a d7 a3 70 3d 0a 67 40 0a 00 00 00 02 00 00 00 01 00 00 00 00 00 00 00 9e ef a7 c6 4b 37 1a 40 04 00 00 00 01 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 01 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 02 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 02 00 00 00 00 00 00 00 00 00 00 00 10 00 00 00 02 00 00 00 00 00 00 00 00 00 00 00 02 00 00 00 00 00 00 00 10 00 00 00 02 00 00 00 00 00 00 00 00 00 00 00 02 00 00 00 00 00 00 00 10 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 03 00 00 00 00 00 00 00 10 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 03 00 00 00 01 00 00 00 00 00 00 00 0f d6 ff 39 cc 97 07 40 0a d7 a3 70 3d 0a a7 40 0a d7 a3 70 3d 0a 67 40 0a 00 00 00 02 00 00 00 01 00 00 00 00 00 00 00 9e ef a7 c6 4b 37 1a 40 04 00 00 00 01 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 01 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 02 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 02 00 00 00 00 00 00 00 00 00 00 00 10 00 00 00 02 00 00 00 00 00 00 00 00 00 00 00 02 00 00 00 00 00 00 00 10 00 00 00 02 00 00 00 00 00 00 00 00 00 00 00 02 00 00 00 00 00 00 00 10 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 03 00 00 00 00 00 00 00 10 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 03 00 00 00 00 00 00 00 00 00 00 00 9a 99 99 99 99 99 19 40 00 00 00 00 00 00 b9 40 00 00 00 00 00 00 00 00 0a 00 00 00 02 00 00 00 01 00 00 00 00 00 00 00 9e ef a7 c6 4b 37 1a 40 00 00 00 00 00 00 00 00 00 00 00 00 02 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 02 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 02 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 02 00 00 00 00 00 00 00 00 00 00 00 10 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 03 00 00 00 00 00 00 00 10 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 03 00 00 00 00 00 00 00 10 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 03 00 00 00 00 00 00 00 10 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 03 00 00 00 00 00 00 00 00 00 00 00 9a 99 99 99 99 99 19 40 00 00 00 00 00 00 b9 40 00 00 00 00 00 00 00 00 0a 00 00 00 02 00 00 00 01 00 00 00 00 00 00 00 9e ef a7 c6 4b 37 1a 40 00 00 00 00 00 00 00 00 00 00 00 00 02 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 02 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 02 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 02 00 00 00 00 00 00 00 00 00 00 00 10 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 03 00 00 00 00 00 00 00 10 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 03 00 00 00 00 00 00 00 10 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 03 00 00 00 00 00 00 00 10 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 03 00 00 00 01 00 00 00 00 00 00 00 0f d6 ff 39 cc 97 07 40 0a d7 a3 70 3d 0a a7 40 0a d7 a3 70 3d 0a 67 40 0a 00 00 00 02 00 00 00 01 00 00 00 00 00 00 00 fc a9 f1 d2 4d 62 10 40 02 00 00 00 01 00 00 00 00 00 00 00 01 00 00 00 00 00 00 00 01 00 00 00 00 00 00 00 01 00 00 00 00 00 00 00 01 00 00 00 08 00 00 00 02 00 00 00 00 00 00 00 02 00 00 00 01 00 00 00 08 00 00 00 02 00 00 00 00 00 00 00 02 00 00 00 01 00 00 00 08 00 00 00 02 00 00 00 00 00 00 00 02 00 00 00 01 00 00 00 08 00 00 00 02 00 00 00 00 00 00 00 02 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 40 00 00 00 00 00 40 9f 40 00 00 00 00 00 00 00 00 0a 00 00 00 02 00 00 00 01 00 00 00 00 00 00 00 fc a9 f1 d2 4d 62 10 40 02 00 00 00 00 00 00 00 02 00 00 00 00 00 00 00 02 00 00 00 00 00 00 00 02 00 00 00 00 00 00 00 02 00 00 00 00 00 00 00 08 00 00 00 00 00 00 00 00 00 00 00 03 00 00 00 00 00 00 00 08 00 00 00 00 00 00 00 00 00 00 00 03 00 00 00 00 00 00 00 08 00 00 00 00 00 00 00 00 00 00 00 03 00 00 00 00 00 00 00 08 00 00 00 00 00 00 00 00 00 00 00 03 00 00 00 01 00 00 00 00 00 00 00 0f d6 ff 39 cc 97 07 40 0a d7 a3 70 3d 0a a7 40 0a d7 a3 70 3d 0a 67 40 0a 00 00 00 02 00 00 00 01 00 00 00 00 00 00 00 fc a9 f1 d2 4d 62 10 40 02 00 00 00 01 00 00 00 00 00 00 00 01 00 00 00 00 00 00 00 01 00 00 00 00 00 00 00 01 00 00 00 00 00 00 00 01 00 00 00 08 00 00 00 02 00 00 00 00 00 00 00 02 00 00 00 01 00 00 00 08 00 00 00 02 00 00 00 00 00 00 00 02 00 00 00 01 00 00 00 08 00 00 00 02 00 00 00 00 00 00 00 02 00 00 00 01 00 00 00 08 00 00 00 02 00 00 00 00 00 00 00 02 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 40 00 00 00 00 00 40 9f 40 00 00 00 00 00 00 00 00 0a 00 00 00 02 00 00 00 01 00 00 00 00 00 00 00 fc a9 f1 d2 4d 62 10 40 02 00 00 00 00 00 00 00 02 00 00 00 00 00 00 00 02 00 00 00 00 00 00 00 02 00 00 00 00 00 00 00 02 00 00 00 00 00 00 00 08 00 00 00 00 00 00 00 00 00 00 00 03 00 00 00 00 00 00 00 08 00 00 00 00 00 00 00 00 00 00 00 03 00 00 00 00 00 00 00 08 00 00 00 00 00 00 00 00 00 00 00 03 00 00 00 00 00 00 00 08 00 00 00 00 00 00 00 00 00 00 00 03 00 00 00]; + reg = <0x00000010 0x00100000 0x0 0x40000>; + }; + + rfdc_regs: uio@1000140000 { + status = "okay"; + compatible = "usrp-uio"; + reg = <0x10 0x00140000 0x0 0x20000>; + reg-names = "rfdc-regs"; + }; +}; diff --git a/fpga/usrp3/top/x400/ip/Makefile.inc b/fpga/usrp3/top/x400/ip/Makefile.inc new file mode 100644 index 000000000..7904740f9 --- /dev/null +++ b/fpga/usrp3/top/x400/ip/Makefile.inc @@ -0,0 +1,87 @@ +# +# Copyright 2021 Ettus Research, a National Instruments Brand +# +# SPDX-License-Identifier: LGPL-3.0-or-later +# + +include $(IP_DIR)/xge_pcs_pma/Makefile.inc +include $(IP_DIR)/x4xx_ps_rfdc_bd/Makefile.inc +include $(IP_DIR)/axi_interconnect_app_bd/Makefile.inc +include $(IP_DIR)/axi_interconnect_eth_bd/Makefile.inc +include $(IP_DIR)/axi_interconnect_dma_bd/Makefile.inc +include $(IP_DIR)/ddr4_64bits/Makefile.inc +include $(IP_DIR)/adc_100m_bd/Makefile.inc +include $(IP_DIR)/adc_400m_bd/Makefile.inc +include $(IP_DIR)/dac_100m_bd/Makefile.inc +include $(IP_DIR)/dac_400m_bd/Makefile.inc +include $(IP_DIR)/axi64_4k_2clk_fifo/Makefile.inc +include $(IP_DIR)/fifo_short_2clk/Makefile.inc +include $(IP_DIR)/fifo_4k_2clk/Makefile.inc +include $(IP_DIR)/eth_100g_bd/Makefile.inc +include $(IP_DIR)/axi_eth_dma_bd/Makefile.inc +include $(IP_DIR)/hb47_1to2/Makefile.inc +include $(IP_DIR)/hb47_2to1/Makefile.inc + +BD_SRCS = \ +$(IP_X4XX_PS_RFDC_BD_SRCS) \ +$(IP_X4XX_PS_RFDC_HDL_SRCS) \ +$(IP_AXI_INTERCONNECT_APP_BD_SRCS) \ +$(IP_AXI_INTERCONNECT_ETH_BD_SRCS) \ +$(IP_AXI_INTERCONNECT_ETH_HDL_SRCS) \ +$(IP_AXI_INTERCONNECT_DMA_BD_SRCS) \ +$(IP_AXI_INTERCONNECT_DMA_HDL_SRCS) \ +$(IP_ADC_100M_BD_SRCS) \ +$(IP_ADC_100M_HDL_SRCS) \ +$(IP_DAC_100M_BD_SRCS) \ +$(IP_DAC_100M_HDL_SRCS) \ +$(IP_ADC_400M_BD_SRCS) \ +$(IP_ADC_400M_HDL_SRCS) \ +$(IP_DAC_400M_BD_SRCS) \ +$(IP_DAC_400M_HDL_SRCS) \ +$(IP_100G_BD_SRCS) \ +$(IP_100G_HDL_SRCS) \ +$(IP_AXI_ETH_DMA_BD_SRCS) \ +$(IP_AXI_ETH_DMA_BD_HDL_SRCS) + +IP_XCI_SRCS = \ +$(IP_DDR4_64BITS_SRCS) \ +$(IP_XGE_PCS_PMA_SRCS) \ +$(IP_AXI64_4K_2CLK_FIFO_SRCS) \ +$(IP_FIFO_SHORT_2CLK_SRCS) \ +$(IP_FIFO_4K_2CLK_SRCS) \ +$(IP_HB47_1TO2_SRCS) \ +$(IP_HB47_2TO1_SRCS) \ + +BD_OUTPUTS = \ +$(BD_X4XX_PS_RFDC_BD_OUTS) \ +$(BD_AXI_INTERCONNECT_APP_BD_OUTS) \ +$(BD_AXI_INTERCONNECT_ETH_BD_OUTS) \ +$(BD_AXI_INTERCONNECT_DMA_BD_OUTS) \ +$(BD_ADC_100M_BD_OUTS) \ +$(BD_ADC_400M_BD_OUTS) \ +$(BD_DAC_100M_BD_OUTS) \ +$(BD_DAC_400M_BD_OUTS) \ +$(BD_100G_BD_OUTS) \ +$(BD_AXI_ETH_DMA_BD_OUTS) + +IP_SYNTH_OUTPUTS = \ +$(IP_DDR4_64BITS_OUTS) \ +$(IP_XGE_PCS_PMA_OUTS) \ +$(IP_AXI64_4K_2CLK_FIFO_OUTS) \ +$(IP_FIFO_SHORT_2CLK_OUTS) \ +$(IP_FIFO_4K_2CLK_OUTS) \ +$(IP_HB47_1TO2_OUTS) \ +$(IP_HB47_2TO1_OUTS) \ + +IP_HDL_SIM_SRCS = \ +$(IP_AXI64_4K_2CLK_FIFO_HDL_SIM_SRCS) \ +$(IP_FIFO_4K_2CLK_HDL_SIM_SRCS) \ +$(IP_FIFO_SHORT_2CLK_HDL_SIM_SRCS) \ +$(IP_AXI_INTERCONNECT_ETH_HDL_SIM_SRCS) \ +$(IP_AXI_INTERCONNECT_DMA_HDL_SIM_SRCS) \ +$(IP_100G_HDL_SIM_SRCS) \ +$(IP_XGE_PCS_PMA_HDL_SIM_SRCS) + +ip: $(IP_SYNTH_OUTPUTS) $(BD_OUTPUTS) + +.PHONY: ip diff --git a/fpga/usrp3/top/x400/ip/adc_100m_bd/.gitignore b/fpga/usrp3/top/x400/ip/adc_100m_bd/.gitignore new file mode 100644 index 000000000..49f7d3710 --- /dev/null +++ b/fpga/usrp3/top/x400/ip/adc_100m_bd/.gitignore @@ -0,0 +1 @@ +synthstub/ diff --git a/fpga/usrp3/top/x400/ip/adc_100m_bd/Makefile.inc b/fpga/usrp3/top/x400/ip/adc_100m_bd/Makefile.inc new file mode 100644 index 000000000..91130f5ad --- /dev/null +++ b/fpga/usrp3/top/x400/ip/adc_100m_bd/Makefile.inc @@ -0,0 +1,38 @@ +# +# Copyright 2021 Ettus Research, a National Instruments Brand +# +# SPDX-License-Identifier: LGPL-3.0-or-later +# + +include $(TOOLS_DIR)/make/viv_ip_builder.mak + +IP_ADC_100M_ORIG_SRCS = $(addprefix $(IP_DIR)/adc_100m_bd/, \ +adc_100m_bd.tcl \ +) + +IP_ADC_100M_HDL_SRCS = $(addprefix $(BASE_DIR)/x400/rf/, \ +100m/ddc_saturate.vhd \ +100m/adc_3_1_clk_converter.vhd \ +100m/adc_gearbox_2x1.v \ +common/PkgRf.vhd \ +common/scale_2x.vhd \ +) + +IP_ADC_100M_BDTCL_SRCS = $(addprefix $(IP_BUILD_DIR)/adc_100m_bd/, \ +adc_100m_bd.tcl \ +) + +IP_ADC_100M_BD_SRCS = $(addprefix $(IP_BUILD_DIR)/adc_100m_bd/, \ +adc_100m_bd/adc_100m_bd.bd \ +) + +BD_ADC_100M_BD_OUTS = $(addprefix $(IP_BUILD_DIR)/adc_100m_bd/, \ +adc_100m_bd.bd.out \ +adc_100m_bd/adc_100m_bd_ooc.xdc \ +adc_100m_bd/synth/adc_100m_bd.v \ +) + +EMPTY_IP_SRCS = + +$(IP_ADC_100M_BD_SRCS) $(BD_ADC_100M_BD_OUTS) $(IP_ADC_100M_BDTCL_SRCS): $(IP_ADC_100M_ORIG_SRCS) $(IP_ADC_100M_HDL_SRCS) + $(call BUILD_VIVADO_BDTCL,adc_100m_bd,$(ARCH),$(PART_ID),$(IP_DIR),$(IP_BUILD_DIR),$(EMPTY_IP_SRCS),$(IP_ADC_100M_HDL_SRCS),) diff --git a/fpga/usrp3/top/x400/ip/adc_100m_bd/adc_100m_bd.tcl b/fpga/usrp3/top/x400/ip/adc_100m_bd/adc_100m_bd.tcl new file mode 100644 index 000000000..a3fcc6edc --- /dev/null +++ b/fpga/usrp3/top/x400/ip/adc_100m_bd/adc_100m_bd.tcl @@ -0,0 +1,435 @@ + +################################################################ +# This is a generated script based on design: adc_100m_bd +# +# Though there are limitations about the generated script, +# the main purpose of this utility is to make learning +# IP Integrator Tcl commands easier. +################################################################ + +namespace eval _tcl { +proc get_script_folder {} { + set script_path [file normalize [info script]] + set script_folder [file dirname $script_path] + return $script_folder +} +} +variable script_folder +set script_folder [_tcl::get_script_folder] + +################################################################ +# Check if script is running in correct Vivado version. +################################################################ +set scripts_vivado_version 2019.1 +set current_vivado_version [version -short] + +if { [string first $scripts_vivado_version $current_vivado_version] == -1 } { + puts "" + catch {common::send_msg_id "BD_TCL-109" "ERROR" "This script was generated using Vivado <$scripts_vivado_version> and is being run in <$current_vivado_version> of Vivado. Please run the script in Vivado <$scripts_vivado_version> then open the design in Vivado <$current_vivado_version>. Upgrade the design by running \"Tools => Report => Report IP Status...\", then run write_bd_tcl to create an updated script."} + + return 1 +} + +################################################################ +# START +################################################################ + +# To test this script, run the following commands from Vivado Tcl console: +# source adc_100m_bd_script.tcl + + +# The design that will be created by this Tcl script contains the following +# module references: +# adc_3_1_clk_converter, adc_gearbox_2x1, ddc_saturate, scale_2x + +# Please add the sources of those modules before sourcing this Tcl script. + +# If there is no project opened, this script will create a +# project, but make sure you do not have an existing project +# <./myproj/project_1.xpr> in the current working folder. + +set list_projs [get_projects -quiet] +if { $list_projs eq "" } { + create_project project_1 myproj -part xczu28dr-ffvg1517-1-e +} + + +# CHANGE DESIGN NAME HERE +variable design_name +set design_name adc_100m_bd + +# If you do not already have an existing IP Integrator design open, +# you can create a design using the following command: +# create_bd_design $design_name + +# Creating design if needed +set errMsg "" +set nRet 0 + +set cur_design [current_bd_design -quiet] +set list_cells [get_bd_cells -quiet] + +if { ${design_name} eq "" } { + # USE CASES: + # 1) Design_name not set + + set errMsg "Please set the variable to a non-empty value." + set nRet 1 + +} elseif { ${cur_design} ne "" && ${list_cells} eq "" } { + # USE CASES: + # 2): Current design opened AND is empty AND names same. + # 3): Current design opened AND is empty AND names diff; design_name NOT in project. + # 4): Current design opened AND is empty AND names diff; design_name exists in project. + + if { $cur_design ne $design_name } { + common::send_msg_id "BD_TCL-001" "INFO" "Changing value of from <$design_name> to <$cur_design> since current design is empty." + set design_name [get_property NAME $cur_design] + } + common::send_msg_id "BD_TCL-002" "INFO" "Constructing design in IPI design <$cur_design>..." + +} elseif { ${cur_design} ne "" && $list_cells ne "" && $cur_design eq $design_name } { + # USE CASES: + # 5) Current design opened AND has components AND same names. + + set errMsg "Design <$design_name> already exists in your project, please set the variable to another value." + set nRet 1 +} elseif { [get_files -quiet ${design_name}.bd] ne "" } { + # USE CASES: + # 6) Current opened design, has components, but diff names, design_name exists in project. + # 7) No opened design, design_name exists in project. + + set errMsg "Design <$design_name> already exists in your project, please set the variable to another value." + set nRet 2 + +} else { + # USE CASES: + # 8) No opened design, design_name not in project. + # 9) Current opened design, has components, but diff names, design_name not in project. + + common::send_msg_id "BD_TCL-003" "INFO" "Currently there is no design <$design_name> in project, so creating one..." + + create_bd_design $design_name + + common::send_msg_id "BD_TCL-004" "INFO" "Making design <$design_name> as current_bd_design." + current_bd_design $design_name + +} + + # Add USER_COMMENTS on $design_name + set_property USER_COMMENTS.comment_0 "Scale_2x is a simple shift to left by 2 logic and does not need any pipeline stage" [get_bd_designs $design_name] + +common::send_msg_id "BD_TCL-005" "INFO" "Currently the variable is equal to \"$design_name\"." + +if { $nRet != 0 } { + catch {common::send_msg_id "BD_TCL-114" "ERROR" $errMsg} + return $nRet +} + +set bCheckIPsPassed 1 +################################################################## +# CHECK IPs +################################################################## +set bCheckIPs 1 +if { $bCheckIPs == 1 } { + set list_check_ips "\ +xilinx.com:ip:axis_register_slice:1.1\ +xilinx.com:ip:xlconstant:1.1\ +xilinx.com:ip:fir_compiler:7.2\ +" + + set list_ips_missing "" + common::send_msg_id "BD_TCL-006" "INFO" "Checking if the following IPs exist in the project's IP catalog: $list_check_ips ." + + foreach ip_vlnv $list_check_ips { + set ip_obj [get_ipdefs -all $ip_vlnv] + if { $ip_obj eq "" } { + lappend list_ips_missing $ip_vlnv + } + } + + if { $list_ips_missing ne "" } { + catch {common::send_msg_id "BD_TCL-115" "ERROR" "The following IPs are not found in the IP Catalog:\n $list_ips_missing\n\nResolution: Please add the repository containing the IP(s) to the project." } + set bCheckIPsPassed 0 + } + +} + +################################################################## +# CHECK Modules +################################################################## +set bCheckModules 1 +if { $bCheckModules == 1 } { + set list_check_mods "\ +adc_3_1_clk_converter\ +adc_gearbox_2x1\ +ddc_saturate\ +scale_2x\ +" + + set list_mods_missing "" + common::send_msg_id "BD_TCL-006" "INFO" "Checking if the following modules exist in the project's sources: $list_check_mods ." + + foreach mod_vlnv $list_check_mods { + if { [can_resolve_reference $mod_vlnv] == 0 } { + lappend list_mods_missing $mod_vlnv + } + } + + if { $list_mods_missing ne "" } { + catch {common::send_msg_id "BD_TCL-115" "ERROR" "The following module(s) are not found in the project: $list_mods_missing" } + common::send_msg_id "BD_TCL-008" "INFO" "Please add source files for the missing module(s) above." + set bCheckIPsPassed 0 + } +} + +if { $bCheckIPsPassed != 1 } { + common::send_msg_id "BD_TCL-1003" "WARNING" "Will not continue with creation of design due to the error(s) above." + return 3 +} + +################################################################## +# DESIGN PROCs +################################################################## + + + +# Procedure to create entire design; Provide argument to make +# procedure reusable. If parentCell is "", will use root. +proc create_root_design { parentCell } { + + variable script_folder + variable design_name + + if { $parentCell eq "" } { + set parentCell [get_bd_cells /] + } + + # Get object for parentCell + set parentObj [get_bd_cells $parentCell] + if { $parentObj == "" } { + catch {common::send_msg_id "BD_TCL-100" "ERROR" "Unable to find parent cell <$parentCell>!"} + return + } + + # Make sure parentObj is hier blk + set parentType [get_property TYPE $parentObj] + if { $parentType ne "hier" } { + catch {common::send_msg_id "BD_TCL-101" "ERROR" "Parent <$parentObj> has TYPE = <$parentType>. Expected to be ."} + return + } + + # Save current instance; Restore later + set oldCurInst [current_bd_instance .] + + # Set parent object as current + current_bd_instance $parentObj + + + # Create interface ports + set adc_data_out [ create_bd_intf_port -mode Master -vlnv xilinx.com:interface:axis_rtl:1.0 adc_data_out ] + set_property -dict [ list \ + CONFIG.FREQ_HZ {122880000} \ + ] $adc_data_out + + set adc_i_data_in [ create_bd_intf_port -mode Slave -vlnv xilinx.com:interface:axis_rtl:1.0 adc_i_data_in ] + set_property -dict [ list \ + CONFIG.FREQ_HZ {184320000} \ + CONFIG.HAS_TKEEP {0} \ + CONFIG.HAS_TLAST {0} \ + CONFIG.HAS_TREADY {1} \ + CONFIG.HAS_TSTRB {0} \ + CONFIG.LAYERED_METADATA {undef} \ + CONFIG.TDATA_NUM_BYTES {4} \ + CONFIG.TDEST_WIDTH {0} \ + CONFIG.TID_WIDTH {0} \ + CONFIG.TUSER_WIDTH {0} \ + ] $adc_i_data_in + + set adc_q_data_in [ create_bd_intf_port -mode Slave -vlnv xilinx.com:interface:axis_rtl:1.0 adc_q_data_in ] + set_property -dict [ list \ + CONFIG.FREQ_HZ {184320000} \ + CONFIG.HAS_TKEEP {0} \ + CONFIG.HAS_TLAST {0} \ + CONFIG.HAS_TREADY {1} \ + CONFIG.HAS_TSTRB {0} \ + CONFIG.LAYERED_METADATA {undef} \ + CONFIG.TDATA_NUM_BYTES {4} \ + CONFIG.TDEST_WIDTH {0} \ + CONFIG.TID_WIDTH {0} \ + CONFIG.TUSER_WIDTH {0} \ + ] $adc_q_data_in + + + # Create ports + set adc_data_out_resetn_dclk [ create_bd_port -dir I -type rst adc_data_out_resetn_dclk ] + set data_clk [ create_bd_port -dir I -type clk data_clk ] + set_property -dict [ list \ + CONFIG.ASSOCIATED_BUSIF {adc_data_out} \ + CONFIG.FREQ_HZ {122880000} \ + ] $data_clk + set enable_data_to_fir_rclk [ create_bd_port -dir I enable_data_to_fir_rclk ] + set fir_resetn_rclk2x [ create_bd_port -dir I -type rst fir_resetn_rclk2x ] + set rfdc_adc_axi_resetn_rclk [ create_bd_port -dir I -type rst rfdc_adc_axi_resetn_rclk ] + set rfdc_clk [ create_bd_port -dir I -type clk rfdc_clk ] + set_property -dict [ list \ + CONFIG.ASSOCIATED_BUSIF {adc_i_data_in:adc_q_data_in} \ + CONFIG.ASSOCIATED_RESET {adc_gearbox_resetn_rclk:rfdc_adc_axi_resetn_rclk} \ + CONFIG.FREQ_HZ {184320000} \ + ] $rfdc_clk + set rfdc_clk_2x [ create_bd_port -dir I -type clk rfdc_clk_2x ] + set_property -dict [ list \ + CONFIG.FREQ_HZ {368640000} \ + ] $rfdc_clk_2x + set swap_iq_2x [ create_bd_port -dir I swap_iq_2x ] + + # Create instance: adc_3_1_clk_converter_0, and set properties + set block_name adc_3_1_clk_converter + set block_cell_name adc_3_1_clk_converter_0 + if { [catch {set adc_3_1_clk_converter_0 [create_bd_cell -type module -reference $block_name $block_cell_name] } errmsg] } { + catch {common::send_msg_id "BD_TCL-105" "ERROR" "Unable to add referenced block <$block_name>. Please add the files for ${block_name}'s definition into the project."} + return 1 + } elseif { $adc_3_1_clk_converter_0 eq "" } { + catch {common::send_msg_id "BD_TCL-106" "ERROR" "Unable to referenced block <$block_name>. Please add the files for ${block_name}'s definition into the project."} + return 1 + } + + # Create instance: adc_data_to_axi, and set properties + set adc_data_to_axi [ create_bd_cell -type ip -vlnv xilinx.com:ip:axis_register_slice:1.1 adc_data_to_axi ] + set_property -dict [ list \ + CONFIG.HAS_TREADY {0} \ + CONFIG.REG_CONFIG {1} \ + CONFIG.TDATA_NUM_BYTES {4} \ + ] $adc_data_to_axi + + # Create instance: adc_gearbox_2x1_0, and set properties + set block_name adc_gearbox_2x1 + set block_cell_name adc_gearbox_2x1_0 + if { [catch {set adc_gearbox_2x1_0 [create_bd_cell -type module -reference $block_name $block_cell_name] } errmsg] } { + catch {common::send_msg_id "BD_TCL-105" "ERROR" "Unable to add referenced block <$block_name>. Please add the files for ${block_name}'s definition into the project."} + return 1 + } elseif { $adc_gearbox_2x1_0 eq "" } { + catch {common::send_msg_id "BD_TCL-106" "ERROR" "Unable to referenced block <$block_name>. Please add the files for ${block_name}'s definition into the project."} + return 1 + } + + # Create instance: adc_i_data_from_axi, and set properties + set adc_i_data_from_axi [ create_bd_cell -type ip -vlnv xilinx.com:ip:axis_register_slice:1.1 adc_i_data_from_axi ] + set_property -dict [ list \ + CONFIG.REG_CONFIG {0} \ + CONFIG.TDATA_NUM_BYTES {4} \ + ] $adc_i_data_from_axi + + # Create instance: adc_q_data_from_axi, and set properties + set adc_q_data_from_axi [ create_bd_cell -type ip -vlnv xilinx.com:ip:axis_register_slice:1.1 adc_q_data_from_axi ] + set_property -dict [ list \ + CONFIG.REG_CONFIG {0} \ + CONFIG.TDATA_NUM_BYTES {4} \ + ] $adc_q_data_from_axi + + # Create instance: const_1, and set properties + set const_1 [ create_bd_cell -type ip -vlnv xilinx.com:ip:xlconstant:1.1 const_1 ] + + # Create instance: ddc_saturate, and set properties + set block_name ddc_saturate + set block_cell_name ddc_saturate + if { [catch {set ddc_saturate [create_bd_cell -type module -reference $block_name $block_cell_name] } errmsg] } { + catch {common::send_msg_id "BD_TCL-105" "ERROR" "Unable to add referenced block <$block_name>. Please add the files for ${block_name}'s definition into the project."} + return 1 + } elseif { $ddc_saturate eq "" } { + catch {common::send_msg_id "BD_TCL-106" "ERROR" "Unable to referenced block <$block_name>. Please add the files for ${block_name}'s definition into the project."} + return 1 + } + + # Create instance: fir_compiler_0, and set properties + set fir_compiler_0 [ create_bd_cell -type ip -vlnv xilinx.com:ip:fir_compiler:7.2 fir_compiler_0 ] + set_property -dict [ list \ + CONFIG.Clock_Frequency {384} \ + CONFIG.CoefficientVector {-2,0,8,12,0,-26,-36,0,63,81,0,-130,-161,0,241,291,0,-415,-491,0,676,788,0,-1059,-1223,0,1621,1864,0,-2473,-2860,0,3892,4607,0,-6820,-8705,0,17900,36048,43690,36048,17900,0,-8705,-6820,0,4607,3892,0,-2860,-2473,0,1864,1621,0,-1223,-1059,0,788,676,0,-491,-415,0,291,241,0,-161,-130,0,81,63,0,-36,-26,0,12,8,0,-2} \ + CONFIG.Coefficient_Fractional_Bits {0} \ + CONFIG.Coefficient_Sets {1} \ + CONFIG.Coefficient_Sign {Signed} \ + CONFIG.Coefficient_Structure {Non_Symmetric} \ + CONFIG.Coefficient_Width {18} \ + CONFIG.ColumnConfig {27} \ + CONFIG.Data_Fractional_Bits {0} \ + CONFIG.Data_Width {16} \ + CONFIG.Decimation_Rate {3} \ + CONFIG.Filter_Architecture {Systolic_Multiply_Accumulate} \ + CONFIG.Filter_Type {Decimation} \ + CONFIG.Has_ARESETn {true} \ + CONFIG.Interpolation_Rate {1} \ + CONFIG.M_DATA_Has_TREADY {false} \ + CONFIG.Number_Channels {1} \ + CONFIG.Number_Paths {2} \ + CONFIG.Output_Rounding_Mode {Convergent_Rounding_to_Even} \ + CONFIG.Output_Width {17} \ + CONFIG.Quantization {Integer_Coefficients} \ + CONFIG.RateSpecification {Frequency_Specification} \ + CONFIG.Reset_Data_Vector {true} \ + CONFIG.S_DATA_Has_FIFO {false} \ + CONFIG.Sample_Frequency {384} \ + CONFIG.Zero_Pack_Factor {1} \ + ] $fir_compiler_0 + + # Create instance: scale_2x_0, and set properties + set block_name scale_2x + set block_cell_name scale_2x_0 + if { [catch {set scale_2x_0 [create_bd_cell -type module -reference $block_name $block_cell_name] } errmsg] } { + catch {common::send_msg_id "BD_TCL-105" "ERROR" "Unable to add referenced block <$block_name>. Please add the files for ${block_name}'s definition into the project."} + return 1 + } elseif { $scale_2x_0 eq "" } { + catch {common::send_msg_id "BD_TCL-106" "ERROR" "Unable to referenced block <$block_name>. Please add the files for ${block_name}'s definition into the project."} + return 1 + } + set_property -dict [ list \ + CONFIG.kDataWidth {32} \ + ] $scale_2x_0 + + # Create interface connections + connect_bd_intf_net -intf_net adc_data_combine_M_AXIS [get_bd_intf_ports adc_data_out] [get_bd_intf_pins adc_data_to_axi/M_AXIS] + connect_bd_intf_net -intf_net adc_i_axi_data_1 [get_bd_intf_ports adc_i_data_in] [get_bd_intf_pins adc_i_data_from_axi/S_AXIS] + connect_bd_intf_net -intf_net adc_q_axi_data_1 [get_bd_intf_ports adc_q_data_in] [get_bd_intf_pins adc_q_data_from_axi/S_AXIS] + connect_bd_intf_net -intf_net fir_compiler_0_M_AXIS_DATA [get_bd_intf_pins adc_3_1_clk_converter_0/s_axis] [get_bd_intf_pins fir_compiler_0/M_AXIS_DATA] + + # Create port connections + connect_bd_net -net adc_3_1_clk_converter_0_m_axis_tdata [get_bd_pins adc_3_1_clk_converter_0/m_axis_tdata] [get_bd_pins ddc_saturate/cDataIn] + connect_bd_net -net adc_3_1_clk_converter_0_m_axis_tvalid [get_bd_pins adc_3_1_clk_converter_0/m_axis_tvalid] [get_bd_pins ddc_saturate/cDataValidIn] + connect_bd_net -net adc_data_out_resetn_dclk_1 [get_bd_ports adc_data_out_resetn_dclk] [get_bd_pins adc_3_1_clk_converter_0/m_axis_resetn] [get_bd_pins adc_data_to_axi/aresetn] + connect_bd_net -net adc_gearbox_2x1_0_adc_data_out_2x [get_bd_pins adc_gearbox_2x1_0/adc_out_2x] [get_bd_pins fir_compiler_0/s_axis_data_tdata] + connect_bd_net -net adc_gearbox_2x1_0_rfi_1x [get_bd_pins adc_i_data_from_axi/m_axis_tready] [get_bd_pins adc_q_data_from_axi/m_axis_tready] [get_bd_pins const_1/dout] + connect_bd_net -net adc_gearbox_2x1_0_valid_out_2x [get_bd_pins adc_gearbox_2x1_0/valid_out_2x] [get_bd_pins fir_compiler_0/s_axis_data_tvalid] + connect_bd_net -net adc_q_data_breakout_m_axis_tdata [get_bd_pins adc_gearbox_2x1_0/adc_q_in_1x] [get_bd_pins adc_q_data_from_axi/m_axis_tdata] + connect_bd_net -net aresetn_0_1 [get_bd_ports fir_resetn_rclk2x] [get_bd_pins adc_3_1_clk_converter_0/s_axis_resetn] [get_bd_pins fir_compiler_0/aresetn] + connect_bd_net -net axis_register_slice_0_m_axis_tdata [get_bd_pins adc_gearbox_2x1_0/adc_i_in_1x] [get_bd_pins adc_i_data_from_axi/m_axis_tdata] + connect_bd_net -net axis_register_slice_0_m_axis_tvalid [get_bd_pins adc_gearbox_2x1_0/valid_in_1x] [get_bd_pins adc_i_data_from_axi/m_axis_tvalid] + connect_bd_net -net data_clock_mmcm_data_clk [get_bd_ports data_clk] [get_bd_pins adc_3_1_clk_converter_0/m_axis_clk] [get_bd_pins adc_data_to_axi/aclk] [get_bd_pins ddc_saturate/Clk] + connect_bd_net -net data_clock_mmcm_rfdc_clk [get_bd_ports rfdc_clk] [get_bd_pins adc_gearbox_2x1_0/clk1x] [get_bd_pins adc_i_data_from_axi/aclk] [get_bd_pins adc_q_data_from_axi/aclk] + connect_bd_net -net data_clock_mmcm_rfdc_clk_2x [get_bd_ports rfdc_clk_2x] [get_bd_pins adc_3_1_clk_converter_0/s_axis_clk] [get_bd_pins adc_gearbox_2x1_0/clk2x] [get_bd_pins fir_compiler_0/aclk] + connect_bd_net -net ddc_saturate_cDataOut [get_bd_pins ddc_saturate/cDataOut] [get_bd_pins scale_2x_0/cDataIn] + connect_bd_net -net ddc_saturate_cDataValidOut [get_bd_pins ddc_saturate/cDataValidOut] [get_bd_pins scale_2x_0/cDataValidIn] + connect_bd_net -net enable_data_to_fir_rclk_1 [get_bd_ports enable_data_to_fir_rclk] [get_bd_pins adc_gearbox_2x1_0/enable_1x] + connect_bd_net -net rfdc_adc_axi_resetn_rclk_1 [get_bd_ports rfdc_adc_axi_resetn_rclk] [get_bd_pins adc_gearbox_2x1_0/reset_n_1x] [get_bd_pins adc_i_data_from_axi/aresetn] [get_bd_pins adc_q_data_from_axi/aresetn] + connect_bd_net -net scale_2x_0_cDataOut [get_bd_pins adc_data_to_axi/s_axis_tdata] [get_bd_pins scale_2x_0/cDataOut] + connect_bd_net -net scale_2x_0_cDataValidOut [get_bd_pins adc_data_to_axi/s_axis_tvalid] [get_bd_pins scale_2x_0/cDataValidOut] + connect_bd_net -net swap_iq_2x_1 [get_bd_ports swap_iq_2x] [get_bd_pins adc_gearbox_2x1_0/swap_iq_2x] + + # Create address segments + + + # Restore current instance + current_bd_instance $oldCurInst + + validate_bd_design + save_bd_design +} +# End of create_root_design() + + +################################################################## +# MAIN FLOW +################################################################## + +create_root_design "" + + diff --git a/fpga/usrp3/top/x400/ip/adc_100m_bd/hdl_sources.tcl b/fpga/usrp3/top/x400/ip/adc_100m_bd/hdl_sources.tcl new file mode 100644 index 000000000..770a4c041 --- /dev/null +++ b/fpga/usrp3/top/x400/ip/adc_100m_bd/hdl_sources.tcl @@ -0,0 +1,10 @@ +set script_loc [file normalize [info script]] +set script_dir [file dirname $script_loc] + +# Vivado's block diagram default library for files not belonging to any special +# library is called xil_defaultlib +read_verilog -library xil_defaultlib $script_dir/../../rf/100m/adc_gearbox_2x1.v +read_vhdl -library xil_defaultlib $script_dir/../../rf/100m/ddc_saturate.vhd +read_vhdl -library xil_defaultlib $script_dir/../../rf/100m/adc_3_1_clk_converter.vhd +read_vhdl -library xil_defaultlib $script_dir/../../rf/common/PkgRf.vhd +read_vhdl -library xil_defaultlib $script_dir/../../rf/common/scale_2x.vhd diff --git a/fpga/usrp3/top/x400/ip/adc_400m_bd/Makefile.inc b/fpga/usrp3/top/x400/ip/adc_400m_bd/Makefile.inc new file mode 100644 index 000000000..658ee13fb --- /dev/null +++ b/fpga/usrp3/top/x400/ip/adc_400m_bd/Makefile.inc @@ -0,0 +1,38 @@ +# +# Copyright 2021 Ettus Research, a National Instruments Brand +# +# SPDX-License-Identifier: LGPL-3.0-or-later +# + +include $(TOOLS_DIR)/make/viv_ip_builder.mak + +IP_ADC_400M_ORIG_SRCS = $(addprefix $(IP_DIR)/adc_400m_bd/, \ +adc_400m_bd.tcl \ +) + +IP_ADC_400M_HDL_SRCS = $(addprefix $(BASE_DIR)/x400/rf/, \ +400m/ddc_400m_saturate.vhd \ +400m/adc_gearbox_8x4.v \ +400m/adc_gearbox_2x4.vhd \ +common/PkgRf.vhd \ +common/scale_2x.vhd \ +) + +IP_ADC_400M_BDTCL_SRCS = $(addprefix $(IP_BUILD_DIR)/adc_400m_bd/, \ +adc_400m_bd.tcl \ +) + +IP_ADC_400M_BD_SRCS = $(addprefix $(IP_BUILD_DIR)/adc_400m_bd/, \ +adc_400m_bd/adc_400m_bd.bd \ +) + +BD_ADC_400M_BD_OUTS = $(addprefix $(IP_BUILD_DIR)/adc_400m_bd/, \ +adc_400m_bd.bd.out \ +adc_400m_bd/adc_400m_bd_ooc.xdc \ +adc_400m_bd/synth/adc_400m_bd.v \ +) + +EMPTY_IP_SRCS = + +$(IP_ADC_400M_BD_SRCS) $(BD_ADC_400M_BD_OUTS) $(IP_ADC_400M_BDTCL_SRCS): $(IP_ADC_400M_ORIG_SRCS) $(IP_ADC_400M_HDL_SRCS) + $(call BUILD_VIVADO_BDTCL,adc_400m_bd,$(ARCH),$(PART_ID),$(IP_DIR),$(IP_BUILD_DIR),$(EMPTY_IP_SRCS),$(IP_ADC_400M_HDL_SRCS),) diff --git a/fpga/usrp3/top/x400/ip/adc_400m_bd/adc_400m_bd.tcl b/fpga/usrp3/top/x400/ip/adc_400m_bd/adc_400m_bd.tcl new file mode 100644 index 000000000..59ed94947 --- /dev/null +++ b/fpga/usrp3/top/x400/ip/adc_400m_bd/adc_400m_bd.tcl @@ -0,0 +1,432 @@ + +################################################################ +# This is a generated script based on design: adc_400m_bd +# +# Though there are limitations about the generated script, +# the main purpose of this utility is to make learning +# IP Integrator Tcl commands easier. +################################################################ + +namespace eval _tcl { +proc get_script_folder {} { + set script_path [file normalize [info script]] + set script_folder [file dirname $script_path] + return $script_folder +} +} +variable script_folder +set script_folder [_tcl::get_script_folder] + +################################################################ +# Check if script is running in correct Vivado version. +################################################################ +set scripts_vivado_version 2019.1 +set current_vivado_version [version -short] + +if { [string first $scripts_vivado_version $current_vivado_version] == -1 } { + puts "" + catch {common::send_msg_id "BD_TCL-109" "ERROR" "This script was generated using Vivado <$scripts_vivado_version> and is being run in <$current_vivado_version> of Vivado. Please run the script in Vivado <$scripts_vivado_version> then open the design in Vivado <$current_vivado_version>. Upgrade the design by running \"Tools => Report => Report IP Status...\", then run write_bd_tcl to create an updated script."} + + return 1 +} + +################################################################ +# START +################################################################ + +# To test this script, run the following commands from Vivado Tcl console: +# source adc_400m_bd_script.tcl + + +# The design that will be created by this Tcl script contains the following +# module references: +# adc_gearbox_2x4, adc_gearbox_8x4, ddc_400m_saturate, scale_2x + +# Please add the sources of those modules before sourcing this Tcl script. + +# If there is no project opened, this script will create a +# project, but make sure you do not have an existing project +# <./myproj/project_1.xpr> in the current working folder. + +set list_projs [get_projects -quiet] +if { $list_projs eq "" } { + create_project project_1 myproj -part xczu28dr-ffvg1517-1-e +} + + +# CHANGE DESIGN NAME HERE +variable design_name +set design_name adc_400m_bd + +# If you do not already have an existing IP Integrator design open, +# you can create a design using the following command: +# create_bd_design $design_name + +# Creating design if needed +set errMsg "" +set nRet 0 + +set cur_design [current_bd_design -quiet] +set list_cells [get_bd_cells -quiet] + +if { ${design_name} eq "" } { + # USE CASES: + # 1) Design_name not set + + set errMsg "Please set the variable to a non-empty value." + set nRet 1 + +} elseif { ${cur_design} ne "" && ${list_cells} eq "" } { + # USE CASES: + # 2): Current design opened AND is empty AND names same. + # 3): Current design opened AND is empty AND names diff; design_name NOT in project. + # 4): Current design opened AND is empty AND names diff; design_name exists in project. + + if { $cur_design ne $design_name } { + common::send_msg_id "BD_TCL-001" "INFO" "Changing value of from <$design_name> to <$cur_design> since current design is empty." + set design_name [get_property NAME $cur_design] + } + common::send_msg_id "BD_TCL-002" "INFO" "Constructing design in IPI design <$cur_design>..." + +} elseif { ${cur_design} ne "" && $list_cells ne "" && $cur_design eq $design_name } { + # USE CASES: + # 5) Current design opened AND has components AND same names. + + set errMsg "Design <$design_name> already exists in your project, please set the variable to another value." + set nRet 1 +} elseif { [get_files -quiet ${design_name}.bd] ne "" } { + # USE CASES: + # 6) Current opened design, has components, but diff names, design_name exists in project. + # 7) No opened design, design_name exists in project. + + set errMsg "Design <$design_name> already exists in your project, please set the variable to another value." + set nRet 2 + +} else { + # USE CASES: + # 8) No opened design, design_name not in project. + # 9) Current opened design, has components, but diff names, design_name not in project. + + common::send_msg_id "BD_TCL-003" "INFO" "Currently there is no design <$design_name> in project, so creating one..." + + create_bd_design $design_name + + common::send_msg_id "BD_TCL-004" "INFO" "Making design <$design_name> as current_bd_design." + current_bd_design $design_name + +} + + # Add USER_COMMENTS on $design_name + set_property USER_COMMENTS.comment_0 "Scale_2x is a simple shift to left by 2 logic and does not need any pipeline stage" [get_bd_designs $design_name] + +common::send_msg_id "BD_TCL-005" "INFO" "Currently the variable is equal to \"$design_name\"." + +if { $nRet != 0 } { + catch {common::send_msg_id "BD_TCL-114" "ERROR" $errMsg} + return $nRet +} + +set bCheckIPsPassed 1 +################################################################## +# CHECK IPs +################################################################## +set bCheckIPs 1 +if { $bCheckIPs == 1 } { + set list_check_ips "\ +xilinx.com:ip:axis_register_slice:1.1\ +xilinx.com:ip:xlconstant:1.1\ +xilinx.com:ip:fir_compiler:7.2\ +" + + set list_ips_missing "" + common::send_msg_id "BD_TCL-006" "INFO" "Checking if the following IPs exist in the project's IP catalog: $list_check_ips ." + + foreach ip_vlnv $list_check_ips { + set ip_obj [get_ipdefs -all $ip_vlnv] + if { $ip_obj eq "" } { + lappend list_ips_missing $ip_vlnv + } + } + + if { $list_ips_missing ne "" } { + catch {common::send_msg_id "BD_TCL-115" "ERROR" "The following IPs are not found in the IP Catalog:\n $list_ips_missing\n\nResolution: Please add the repository containing the IP(s) to the project." } + set bCheckIPsPassed 0 + } + +} + +################################################################## +# CHECK Modules +################################################################## +set bCheckModules 1 +if { $bCheckModules == 1 } { + set list_check_mods "\ +adc_gearbox_2x4\ +adc_gearbox_8x4\ +ddc_400m_saturate\ +scale_2x\ +" + + set list_mods_missing "" + common::send_msg_id "BD_TCL-006" "INFO" "Checking if the following modules exist in the project's sources: $list_check_mods ." + + foreach mod_vlnv $list_check_mods { + if { [can_resolve_reference $mod_vlnv] == 0 } { + lappend list_mods_missing $mod_vlnv + } + } + + if { $list_mods_missing ne "" } { + catch {common::send_msg_id "BD_TCL-115" "ERROR" "The following module(s) are not found in the project: $list_mods_missing" } + common::send_msg_id "BD_TCL-008" "INFO" "Please add source files for the missing module(s) above." + set bCheckIPsPassed 0 + } +} + +if { $bCheckIPsPassed != 1 } { + common::send_msg_id "BD_TCL-1003" "WARNING" "Will not continue with creation of design due to the error(s) above." + return 3 +} + +################################################################## +# DESIGN PROCs +################################################################## + + + +# Procedure to create entire design; Provide argument to make +# procedure reusable. If parentCell is "", will use root. +proc create_root_design { parentCell } { + + variable script_folder + variable design_name + + if { $parentCell eq "" } { + set parentCell [get_bd_cells /] + } + + # Get object for parentCell + set parentObj [get_bd_cells $parentCell] + if { $parentObj == "" } { + catch {common::send_msg_id "BD_TCL-100" "ERROR" "Unable to find parent cell <$parentCell>!"} + return + } + + # Make sure parentObj is hier blk + set parentType [get_property TYPE $parentObj] + if { $parentType ne "hier" } { + catch {common::send_msg_id "BD_TCL-101" "ERROR" "Parent <$parentObj> has TYPE = <$parentType>. Expected to be ."} + return + } + + # Save current instance; Restore later + set oldCurInst [current_bd_instance .] + + # Set parent object as current + current_bd_instance $parentObj + + + # Create interface ports + set adc_data_out [ create_bd_intf_port -mode Master -vlnv xilinx.com:interface:axis_rtl:1.0 adc_data_out ] + set_property -dict [ list \ + CONFIG.FREQ_HZ {122880000} \ + ] $adc_data_out + + set adc_i_data_in [ create_bd_intf_port -mode Slave -vlnv xilinx.com:interface:axis_rtl:1.0 adc_i_data_in ] + set_property -dict [ list \ + CONFIG.FREQ_HZ {184320000} \ + CONFIG.HAS_TKEEP {0} \ + CONFIG.HAS_TLAST {0} \ + CONFIG.HAS_TREADY {1} \ + CONFIG.HAS_TSTRB {0} \ + CONFIG.LAYERED_METADATA {undef} \ + CONFIG.TDATA_NUM_BYTES {16} \ + CONFIG.TDEST_WIDTH {0} \ + CONFIG.TID_WIDTH {0} \ + CONFIG.TUSER_WIDTH {0} \ + ] $adc_i_data_in + + set adc_q_data_in [ create_bd_intf_port -mode Slave -vlnv xilinx.com:interface:axis_rtl:1.0 adc_q_data_in ] + set_property -dict [ list \ + CONFIG.FREQ_HZ {184320000} \ + CONFIG.HAS_TKEEP {0} \ + CONFIG.HAS_TLAST {0} \ + CONFIG.HAS_TREADY {1} \ + CONFIG.HAS_TSTRB {0} \ + CONFIG.LAYERED_METADATA {undef} \ + CONFIG.TDATA_NUM_BYTES {16} \ + CONFIG.TDEST_WIDTH {0} \ + CONFIG.TID_WIDTH {0} \ + CONFIG.TUSER_WIDTH {0} \ + ] $adc_q_data_in + + + # Create ports + set adc_data_out_resetn_dclk [ create_bd_port -dir I -type rst adc_data_out_resetn_dclk ] + set data_clk [ create_bd_port -dir I -type clk data_clk ] + set_property -dict [ list \ + CONFIG.ASSOCIATED_RESET {adc_data_out_resetn_dclk} \ + CONFIG.FREQ_HZ {122880000} \ + ] $data_clk + set enable_data_to_fir_rclk [ create_bd_port -dir I enable_data_to_fir_rclk ] + set fir_resetn_rclk2x [ create_bd_port -dir I -type rst fir_resetn_rclk2x ] + set rfdc_adc_axi_resetn_rclk [ create_bd_port -dir I -type rst rfdc_adc_axi_resetn_rclk ] + set rfdc_clk [ create_bd_port -dir I -type clk rfdc_clk ] + set_property -dict [ list \ + CONFIG.FREQ_HZ {184320000} \ + ] $rfdc_clk + set rfdc_clk_2x [ create_bd_port -dir I -type clk rfdc_clk_2x ] + set_property -dict [ list \ + CONFIG.ASSOCIATED_RESET {fir_resetn_rclk2x} \ + CONFIG.FREQ_HZ {368640000} \ + ] $rfdc_clk_2x + set swap_iq_2x [ create_bd_port -dir I swap_iq_2x ] + + # Create instance: adc_data_to_axi, and set properties + set adc_data_to_axi [ create_bd_cell -type ip -vlnv xilinx.com:ip:axis_register_slice:1.1 adc_data_to_axi ] + set_property -dict [ list \ + CONFIG.HAS_TREADY {0} \ + CONFIG.REG_CONFIG {1} \ + CONFIG.TDATA_NUM_BYTES {16} \ + ] $adc_data_to_axi + + # Create instance: adc_gearbox_2x4_0, and set properties + set block_name adc_gearbox_2x4 + set block_cell_name adc_gearbox_2x4_0 + if { [catch {set adc_gearbox_2x4_0 [create_bd_cell -type module -reference $block_name $block_cell_name] } errmsg] } { + catch {common::send_msg_id "BD_TCL-105" "ERROR" "Unable to add referenced block <$block_name>. Please add the files for ${block_name}'s definition into the project."} + return 1 + } elseif { $adc_gearbox_2x4_0 eq "" } { + catch {common::send_msg_id "BD_TCL-106" "ERROR" "Unable to referenced block <$block_name>. Please add the files for ${block_name}'s definition into the project."} + return 1 + } + + # Create instance: adc_gearbox_8x4_0, and set properties + set block_name adc_gearbox_8x4 + set block_cell_name adc_gearbox_8x4_0 + if { [catch {set adc_gearbox_8x4_0 [create_bd_cell -type module -reference $block_name $block_cell_name] } errmsg] } { + catch {common::send_msg_id "BD_TCL-105" "ERROR" "Unable to add referenced block <$block_name>. Please add the files for ${block_name}'s definition into the project."} + return 1 + } elseif { $adc_gearbox_8x4_0 eq "" } { + catch {common::send_msg_id "BD_TCL-106" "ERROR" "Unable to referenced block <$block_name>. Please add the files for ${block_name}'s definition into the project."} + return 1 + } + + # Create instance: adc_i_data_from_axi, and set properties + set adc_i_data_from_axi [ create_bd_cell -type ip -vlnv xilinx.com:ip:axis_register_slice:1.1 adc_i_data_from_axi ] + set_property -dict [ list \ + CONFIG.REG_CONFIG {0} \ + CONFIG.TDATA_NUM_BYTES {16} \ + ] $adc_i_data_from_axi + + # Create instance: adc_q_data_from_axi, and set properties + set adc_q_data_from_axi [ create_bd_cell -type ip -vlnv xilinx.com:ip:axis_register_slice:1.1 adc_q_data_from_axi ] + set_property -dict [ list \ + CONFIG.REG_CONFIG {0} \ + CONFIG.TDATA_NUM_BYTES {16} \ + ] $adc_q_data_from_axi + + # Create instance: const_1, and set properties + set const_1 [ create_bd_cell -type ip -vlnv xilinx.com:ip:xlconstant:1.1 const_1 ] + + # Create instance: ddc_400m_saturate_0, and set properties + set block_name ddc_400m_saturate + set block_cell_name ddc_400m_saturate_0 + if { [catch {set ddc_400m_saturate_0 [create_bd_cell -type module -reference $block_name $block_cell_name] } errmsg] } { + catch {common::send_msg_id "BD_TCL-105" "ERROR" "Unable to add referenced block <$block_name>. Please add the files for ${block_name}'s definition into the project."} + return 1 + } elseif { $ddc_400m_saturate_0 eq "" } { + catch {common::send_msg_id "BD_TCL-106" "ERROR" "Unable to referenced block <$block_name>. Please add the files for ${block_name}'s definition into the project."} + return 1 + } + + # Create instance: fir_compiler_0, and set properties + set fir_compiler_0 [ create_bd_cell -type ip -vlnv xilinx.com:ip:fir_compiler:7.2 fir_compiler_0 ] + set_property -dict [ list \ + CONFIG.Clock_Frequency {384} \ + CONFIG.CoefficientVector {2,5,0,-13,-20,0,40,55,0,-95,-121,0,191,236,0,-351,-422,0,599,708,0,-974,-1136,0,1534,1778,0,-2392,-2783,0,3825,4547,0,-6775,-8668,0,17881,36039,43691,36039,17881,0,-8668,-6775,0,4547,3825,0,-2783,-2392,0,1778,1534,0,-1136,-974,0,708,599,0,-422,-351,0,236,191,0,-121,-95,0,55,40,0,-20,-13,0,5,2} \ + CONFIG.Coefficient_Fractional_Bits {0} \ + CONFIG.Coefficient_Sets {1} \ + CONFIG.Coefficient_Sign {Signed} \ + CONFIG.Coefficient_Structure {Inferred} \ + CONFIG.Coefficient_Width {18} \ + CONFIG.ColumnConfig {26} \ + CONFIG.Decimation_Rate {3} \ + CONFIG.Filter_Architecture {Systolic_Multiply_Accumulate} \ + CONFIG.Filter_Type {Decimation} \ + CONFIG.Has_ARESETn {true} \ + CONFIG.Interpolation_Rate {1} \ + CONFIG.Number_Channels {1} \ + CONFIG.Number_Paths {2} \ + CONFIG.Output_Rounding_Mode {Convergent_Rounding_to_Even} \ + CONFIG.Output_Width {17} \ + CONFIG.Quantization {Integer_Coefficients} \ + CONFIG.RateSpecification {Frequency_Specification} \ + CONFIG.Reset_Data_Vector {false} \ + CONFIG.S_DATA_Has_FIFO {false} \ + CONFIG.Sample_Frequency {1536} \ + CONFIG.Zero_Pack_Factor {1} \ + ] $fir_compiler_0 + + # Create instance: scale_2x_0, and set properties + set block_name scale_2x + set block_cell_name scale_2x_0 + if { [catch {set scale_2x_0 [create_bd_cell -type module -reference $block_name $block_cell_name] } errmsg] } { + catch {common::send_msg_id "BD_TCL-105" "ERROR" "Unable to add referenced block <$block_name>. Please add the files for ${block_name}'s definition into the project."} + return 1 + } elseif { $scale_2x_0 eq "" } { + catch {common::send_msg_id "BD_TCL-106" "ERROR" "Unable to referenced block <$block_name>. Please add the files for ${block_name}'s definition into the project."} + return 1 + } + set_property -dict [ list \ + CONFIG.kDataWidth {128} \ + ] $scale_2x_0 + + # Create interface connections + connect_bd_intf_net -intf_net S_AXIS_0_1 [get_bd_intf_ports adc_q_data_in] [get_bd_intf_pins adc_q_data_from_axi/S_AXIS] + connect_bd_intf_net -intf_net S_AXIS_0_2 [get_bd_intf_ports adc_i_data_in] [get_bd_intf_pins adc_i_data_from_axi/S_AXIS] + connect_bd_intf_net -intf_net adc_data_to_axi_M_AXIS [get_bd_intf_ports adc_data_out] [get_bd_intf_pins adc_data_to_axi/M_AXIS] + + # Create port connections + connect_bd_net -net aclk_0_3 [get_bd_ports rfdc_clk_2x] [get_bd_pins adc_gearbox_2x4_0/Clk3x] [get_bd_pins adc_gearbox_8x4_0/clk2x] [get_bd_pins fir_compiler_0/aclk] + connect_bd_net -net adc_data_out_resetn_dclk [get_bd_ports adc_data_out_resetn_dclk] [get_bd_pins adc_data_to_axi/aresetn] [get_bd_pins adc_gearbox_2x4_0/ac1Reset_n] + connect_bd_net -net adc_gearbox_2x4_0_c1DataOut [get_bd_pins adc_gearbox_2x4_0/c1DataOut] [get_bd_pins ddc_400m_saturate_0/cDataIn] + connect_bd_net -net adc_gearbox_2x4_0_c1DataValidOut [get_bd_pins adc_gearbox_2x4_0/c1DataValidOut] [get_bd_pins ddc_400m_saturate_0/cDataValidIn] + connect_bd_net -net adc_gearbox_8x4_0_adc_out_2x [get_bd_pins adc_gearbox_8x4_0/adc_out_2x] [get_bd_pins fir_compiler_0/s_axis_data_tdata] + connect_bd_net -net adc_gearbox_8x4_0_valid_out_2x [get_bd_pins adc_gearbox_8x4_0/valid_out_2x] [get_bd_pins fir_compiler_0/s_axis_data_tvalid] + connect_bd_net -net adc_i_data_from_axi_m_axis_tdata [get_bd_pins adc_gearbox_8x4_0/adc_i_in_1x] [get_bd_pins adc_i_data_from_axi/m_axis_tdata] + connect_bd_net -net adc_q_data_from_axi_m_axis_tdata [get_bd_pins adc_gearbox_8x4_0/adc_q_in_1x] [get_bd_pins adc_q_data_from_axi/m_axis_tdata] + connect_bd_net -net adc_q_data_from_axi_m_axis_tvalid [get_bd_pins adc_gearbox_8x4_0/valid_in_1x] [get_bd_pins adc_q_data_from_axi/m_axis_tvalid] + connect_bd_net -net aresetn_0_1 [get_bd_ports fir_resetn_rclk2x] [get_bd_pins adc_gearbox_2x4_0/ac3Reset_n] [get_bd_pins fir_compiler_0/aresetn] + connect_bd_net -net const_1_dout [get_bd_pins adc_i_data_from_axi/m_axis_tready] [get_bd_pins adc_q_data_from_axi/m_axis_tready] [get_bd_pins const_1/dout] + connect_bd_net -net data_clk_1 [get_bd_ports data_clk] [get_bd_pins adc_data_to_axi/aclk] [get_bd_pins adc_gearbox_2x4_0/Clk1x] [get_bd_pins ddc_400m_saturate_0/Clk] + connect_bd_net -net ddc_400m_saturate_0_cDataOut [get_bd_pins ddc_400m_saturate_0/cDataOut] [get_bd_pins scale_2x_0/cDataIn] + connect_bd_net -net ddc_400m_saturate_0_cDataValidOut [get_bd_pins ddc_400m_saturate_0/cDataValidOut] [get_bd_pins scale_2x_0/cDataValidIn] + connect_bd_net -net enable_1x_0_1 [get_bd_ports enable_data_to_fir_rclk] [get_bd_pins adc_gearbox_8x4_0/enable_1x] + connect_bd_net -net fir_compiler_0_m_axis_data_tdata [get_bd_pins adc_gearbox_2x4_0/c3DataIn] [get_bd_pins fir_compiler_0/m_axis_data_tdata] + connect_bd_net -net fir_compiler_0_m_axis_data_tvalid [get_bd_pins adc_gearbox_2x4_0/c3DataValidIn] [get_bd_pins fir_compiler_0/m_axis_data_tvalid] + connect_bd_net -net reset_n_1x_0_1 [get_bd_ports rfdc_adc_axi_resetn_rclk] [get_bd_pins adc_gearbox_8x4_0/reset_n_1x] [get_bd_pins adc_i_data_from_axi/aresetn] [get_bd_pins adc_q_data_from_axi/aresetn] + connect_bd_net -net rfdc_clk_1 [get_bd_ports rfdc_clk] [get_bd_pins adc_gearbox_8x4_0/clk1x] [get_bd_pins adc_i_data_from_axi/aclk] [get_bd_pins adc_q_data_from_axi/aclk] + connect_bd_net -net scale_2x_0_cDataOut [get_bd_pins adc_data_to_axi/s_axis_tdata] [get_bd_pins scale_2x_0/cDataOut] + connect_bd_net -net scale_2x_0_cDataValidOut [get_bd_pins adc_data_to_axi/s_axis_tvalid] [get_bd_pins scale_2x_0/cDataValidOut] + connect_bd_net -net swap_iq_2x_0_1 [get_bd_ports swap_iq_2x] [get_bd_pins adc_gearbox_8x4_0/swap_iq_2x] + + # Create address segments + + + # Restore current instance + current_bd_instance $oldCurInst + + validate_bd_design + save_bd_design +} +# End of create_root_design() + + +################################################################## +# MAIN FLOW +################################################################## + +create_root_design "" + + diff --git a/fpga/usrp3/top/x400/ip/adc_400m_bd/hdl_sources.tcl b/fpga/usrp3/top/x400/ip/adc_400m_bd/hdl_sources.tcl new file mode 100644 index 000000000..c19ebf78e --- /dev/null +++ b/fpga/usrp3/top/x400/ip/adc_400m_bd/hdl_sources.tcl @@ -0,0 +1,10 @@ +set script_loc [file normalize [info script]] +set script_dir [file dirname $script_loc] + +# Vivado's block diagram default library for files not belonging to any special +# library is called xil_defaultlib +read_verilog -library xil_defaultlib $script_dir/../../rf/400m/adc_gearbox_8x4.v +read_vhdl -library xil_defaultlib $script_dir/../../rf/common/PkgRf.vhd +read_vhdl -library xil_defaultlib $script_dir/../../rf/400m/adc_gearbox_2x4.vhd +read_vhdl -library xil_defaultlib $script_dir/../../rf/400m/ddc_400m_saturate.vhd +read_vhdl -library xil_defaultlib $script_dir/../../rf/common/scale_2x.vhd diff --git a/fpga/usrp3/top/x400/ip/adc_400m_bd/synthstub/adc_400m_bd.vhd b/fpga/usrp3/top/x400/ip/adc_400m_bd/synthstub/adc_400m_bd.vhd new file mode 100644 index 000000000..68a8770b4 --- /dev/null +++ b/fpga/usrp3/top/x400/ip/adc_400m_bd/synthstub/adc_400m_bd.vhd @@ -0,0 +1,48 @@ +------------------------------------------------------------------------------------------ +-- +-- File: adc_400m_bd.vhd +-- Author: niBlockDesign::niBdExportStub +-- Original Project: HwBuildTools +-- Date: 21 October 2020 +-- +------------------------------------------------------------------------------------------ +-- (c) Copyright National Instruments Corporation +-- All Rights Reserved +-- National Instruments Internal Information +------------------------------------------------------------------------------------------ +-- +-- Purpose: This is an automatically generated stub file to match the entity +-- declaration for 'adc_400m_bd'. This file was created using niBdExportStub +-- Do not modify this file directly! +-- +------------------------------------------------------------------------------------------ + +library ieee; +use ieee.std_logic_1164.all; +library unisim; +use unisim.vcomponents.all; + +entity adc_400m_bd is +port ( + adc_data_out_resetn_dclk : in STD_LOGIC; + data_clk : in STD_LOGIC; + enable_data_to_fir_rclk : in STD_LOGIC; + fir_resetn_rclk2x : in STD_LOGIC; + rfdc_adc_axi_resetn_rclk : in STD_LOGIC; + rfdc_clk : in STD_LOGIC; + rfdc_clk_2x : in STD_LOGIC; + swap_iq_2x : in STD_LOGIC; + adc_q_data_in_tvalid : in STD_LOGIC; + adc_q_data_in_tready : out STD_LOGIC; + adc_q_data_in_tdata : in STD_LOGIC_VECTOR ( 127 downto 0 ); + adc_i_data_in_tvalid : in STD_LOGIC; + adc_i_data_in_tready : out STD_LOGIC; + adc_i_data_in_tdata : in STD_LOGIC_VECTOR ( 127 downto 0 ); + adc_data_out_tvalid : out STD_LOGIC; + adc_data_out_tdata : out STD_LOGIC_VECTOR ( 127 downto 0 ) + ); + end entity adc_400m_bd; + +architecture stub of adc_400m_bd is +begin +end architecture stub; diff --git a/fpga/usrp3/top/x400/ip/axi64_4k_2clk_fifo/Makefile.inc b/fpga/usrp3/top/x400/ip/axi64_4k_2clk_fifo/Makefile.inc new file mode 100644 index 000000000..81ddcdc00 --- /dev/null +++ b/fpga/usrp3/top/x400/ip/axi64_4k_2clk_fifo/Makefile.inc @@ -0,0 +1,21 @@ +# +# Copyright 2021 Ettus Research, a National Instruments Brand +# +# SPDX-License-Identifier: LGPL-3.0-or-later +# + +include $(TOOLS_DIR)/make/viv_ip_builder.mak + +IP_AXI64_4K_2CLK_FIFO_SRCS = $(IP_BUILD_DIR)/axi64_4k_2clk_fifo/axi64_4k_2clk_fifo.xci + +IP_AXI64_4K_2CLK_FIFO_HDL_SIM_SRCS = $(addprefix $(IP_BUILD_DIR)/axi64_4k_2clk_fifo/, \ +axi64_4k_2clk_fifo_sim_netlist.v \ +) + +IP_AXI64_4K_2CLK_FIFO_OUTS = $(addprefix $(IP_BUILD_DIR)/axi64_4k_2clk_fifo/, \ +axi64_4k_2clk_fifo.xci.out \ +synth/axi64_4k_2clk_fifo.vhd \ +) + +$(IP_AXI64_4K_2CLK_FIFO_SRCS) $(IP_AXI64_4K_2CLK_FIFO_OUTS) : $(IP_DIR)/axi64_4k_2clk_fifo/axi64_4k_2clk_fifo.xci + $(call BUILD_VIVADO_IP,axi64_4k_2clk_fifo,$(ARCH),$(PART_ID),$(IP_DIR),$(IP_BUILD_DIR),0) diff --git a/fpga/usrp3/top/x400/ip/axi64_4k_2clk_fifo/axi64_4k_2clk_fifo.xci b/fpga/usrp3/top/x400/ip/axi64_4k_2clk_fifo/axi64_4k_2clk_fifo.xci new file mode 100644 index 000000000..26d706087 --- /dev/null +++ b/fpga/usrp3/top/x400/ip/axi64_4k_2clk_fifo/axi64_4k_2clk_fifo.xci @@ -0,0 +1,584 @@ + + + xilinx.com + xci + unknown + 1.0 + + + axi64_4k_2clk_fifo + + + + + + 100000000 + 0 + 0.000 + + + 100000000 + 0 + 0.000 + 1 + 0 + 0 + 0 + + 1 + 100000000 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 1 + 1 + 1 + 1 + 1 + 0.000 + AXI4LITE + READ_WRITE + 0 + 0 + 0 + 0 + 0 + + 100000000 + 0 + 1 + 1 + 0 + 0 + undef + 0.000 + 8 + 0 + 0 + 4 + + + + 100000000 + 0 + 0.000 + + 100000000 + 0 + 0.000 + 0 + 1 + 0 + 0 + 0 + + 1 + 100000000 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 1 + 1 + 1 + 1 + 1 + 0.000 + AXI4LITE + READ_WRITE + 0 + 0 + 0 + 0 + 0 + + 100000000 + 0 + 1 + 1 + 0 + 0 + undef + 0.000 + 8 + 0 + 0 + 4 + + + + 100000000 + 0 + 0.000 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 64 + 1 + 1 + 8 + 8 + 4 + 0 + 32 + 1 + 1 + 1 + 64 + 1 + 8 + 1 + 1 + 1 + 1 + 0 + 0 + 10 + BlankString + 18 + 69 + 32 + 64 + 32 + 64 + 2 + 0 + 18 + 0 + 1 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + zynq + 1 + 0 + 0 + 1 + 0 + 0 + 0 + 1 + 1 + 0 + 1 + 0 + 0 + 0 + 0 + 1 + 0 + 1 + 0 + 0 + 0 + 1 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 1 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 11 + 12 + 11 + 12 + 11 + 12 + 0 + 1 + 1 + BlankString + 1 + 0 + 0 + 0 + 1 + 0 + 4kx4 + 512x72 + 512x36 + 1kx36 + 512x36 + 1kx36 + 512x36 + 2 + 509 + 13 + 1021 + 13 + 1021 + 13 + 3 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 1022 + 511 + 15 + 1023 + 15 + 1023 + 15 + 1021 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 10 + 1024 + 1 + 10 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 2 + 0 + 0 + 0 + 0 + 1 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 10 + 1024 + 512 + 16 + 1024 + 16 + 1024 + 16 + 1 + 10 + 9 + 4 + 10 + 4 + 10 + 4 + 1 + 32 + 0 + 0 + false + false + false + 0 + 0 + Slave_Interface_Clock_Enable + Independent_Clock + axi64_4k_2clk_fifo + 64 + false + 10 + false + false + 0 + 2 + 509 + 13 + 1021 + 13 + 1021 + 13 + 3 + false + false + true + false + false + false + false + false + false + Hard_ECC + false + false + false + false + false + false + true + false + true + true + Data_FIFO + Data_FIFO + Data_FIFO + Data_FIFO + Data_FIFO + Data_FIFO + Independent_Clocks_Block_RAM + Independent_Clocks_Distributed_RAM + Independent_Clocks_Block_RAM + Independent_Clocks_Distributed_RAM + Independent_Clocks_Block_RAM + Independent_Clocks_Distributed_RAM + Common_Clock_Block_RAM + 1 + 1022 + 511 + 15 + 1023 + 15 + 1023 + 15 + 1021 + false + false + false + 0 + AXI_STREAM + false + false + false + false + false + false + false + false + false + false + false + false + false + false + 18 + 1024 + 512 + 16 + 1024 + 16 + 1024 + 16 + false + 18 + 1024 + Embedded_Reg + false + false + Active_High + Active_High + AXI4 + Standard_FIFO + No_Programmable_Empty_Threshold + No_Programmable_Empty_Threshold + No_Programmable_Empty_Threshold + No_Programmable_Empty_Threshold + No_Programmable_Empty_Threshold + No_Programmable_Empty_Threshold + No_Programmable_Empty_Threshold + No_Programmable_Full_Threshold + No_Programmable_Full_Threshold + No_Programmable_Full_Threshold + No_Programmable_Full_Threshold + No_Programmable_Full_Threshold + No_Programmable_Full_Threshold + No_Programmable_Full_Threshold + READ_WRITE + 0 + 1 + false + 10 + Fully_Registered + Fully_Registered + Fully_Registered + Fully_Registered + Fully_Registered + Fully_Registered + true + Asynchronous_Reset + false + 8 + 0 + 0 + 8 + 8 + 4 + false + false + Active_High + Active_High + true + false + false + false + false + Active_High + 0 + false + Active_High + 1 + false + 10 + false + FIFO + false + false + false + false + FIFO + FIFO + 2 + 2 + false + FIFO + FIFO + FIFO + zynq + + + xc7z100 + ffg900 + VERILOG + + MIXED + -2 + + + TRUE + TRUE + IP_Flow + 4 + TRUE + . + + . + 2019.1 + OUT_OF_CONTEXT + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + diff --git a/fpga/usrp3/top/x400/ip/axi_eth_dma_bd/Makefile.inc b/fpga/usrp3/top/x400/ip/axi_eth_dma_bd/Makefile.inc new file mode 100644 index 000000000..c1da814e2 --- /dev/null +++ b/fpga/usrp3/top/x400/ip/axi_eth_dma_bd/Makefile.inc @@ -0,0 +1,31 @@ +# +# Copyright 2021 Ettus Research, a National Instruments Brand +# +# SPDX-License-Identifier: LGPL-3.0-or-later +# + +include $(TOOLS_DIR)/make/viv_ip_builder.mak + +IP_AXI_ETH_DMA_BD_HDL_SRCS = $(addprefix $(IP_DIR)/axi_eth_dma_bd/, \ +axi_eth_dma.sv \ +) + +IP_AXI_ETH_DMA_BD_ORIG_SRCS = $(addprefix $(IP_DIR)/axi_eth_dma_bd/, \ +axi_eth_dma_bd.tcl \ +) + +IP_AXI_ETH_DMA_BDTCL_SRCS = $(addprefix $(IP_BUILD_DIR)/axi_eth_dma_bd/, \ +axi_eth_dma_bd.tcl \ +) + +IP_AXI_ETH_DMA_BD_SRCS = $(addprefix $(IP_BUILD_DIR)/axi_eth_dma_bd/, \ +axi_eth_dma_bd/axi_eth_dma_bd.bd \ +) + +BD_AXI_ETH_DMA_BD_OUTS = $(addprefix $(IP_BUILD_DIR)/axi_eth_dma_bd/, \ +axi_eth_dma_bd.bd.out \ +axi_eth_dma_bd/synth/axi_eth_dma_bd.v \ +) + +$(IP_AXI_ETH_DMA_BD_SRCS) $(BD_AXI_ETH_DMA_BD_OUTS) $(IP_AXI_ETH_DMA_BDTCL_SRCS): $(IP_AXI_ETH_DMA_BD_ORIG_SRCS) + $(call BUILD_VIVADO_BDTCL,axi_eth_dma_bd,$(ARCH),$(PART_ID),$(IP_DIR),$(IP_BUILD_DIR),$(LIB_DIR)/vivado_ipi) diff --git a/fpga/usrp3/top/x400/ip/axi_eth_dma_bd/axi_eth_dma.sv b/fpga/usrp3/top/x400/ip/axi_eth_dma_bd/axi_eth_dma.sv new file mode 100644 index 000000000..87e8825c5 --- /dev/null +++ b/fpga/usrp3/top/x400/ip/axi_eth_dma_bd/axi_eth_dma.sv @@ -0,0 +1,73 @@ +// +// Copyright 2021 Ettus Research, A National Instruments Brand +// +// SPDX-License-Identifier: LGPL-3.0-or-later +// +// Module: axi_eth_dma +// +// Description: Wrapper for the Xilinx AXI DMA +// + +module axi_eth_dma ( + // All interfaces on s_axi_eth_dma.clk domain + AxiStreamIf.slave e2c, // from enet mac + AxiStreamIf.master c2e, // to enet mac + AxiLiteIf.slave s_axi_eth_dma, // Register interface + AxiIf.master axi_hp, // DMA interface to host memory + output logic eth_rx_irq, + output logic eth_tx_irq + +); + + `include "../../../../lib/axi4lite_sv/axi_lite.vh" + `include "../../../../lib/axi4s_sv/axi4s.vh" + `include "../../../../lib/axi4_sv/axi.vh" + + // _v versions have no procedural assignment so they can drive a port. + AxiLiteIf_v #(32,10) + s_axi_eth_dma_v(.clk(s_axi_eth_dma.clk), .rst(s_axi_eth_dma.rst)); + AxiIf_v #(128,49) + axi_hp_v(.clk(s_axi_eth_dma.clk), .rst(s_axi_eth_dma.rst)); + + AxiStreamIf #(.DATA_WIDTH(c2e.DATA_WIDTH), .USER_WIDTH(c2e.USER_WIDTH), .TUSER(0)) + c2e_v (c2e.clk, c2e.rst); + AxiStreamIf #(.DATA_WIDTH(e2c.DATA_WIDTH), .USER_WIDTH(e2c.USER_WIDTH), .TUSER(0)) + e2c_v (e2c.clk, e2c.rst); + + always_comb begin + // O = I; (O , I ) + `AXI4LITE_ASSIGN(s_axi_eth_dma_v, s_axi_eth_dma) + // Overriding assignments to mask off upper address bits + s_axi_eth_dma_v.araddr = 0; + s_axi_eth_dma_v.araddr[9:0] = s_axi_eth_dma.araddr[9:0]; + s_axi_eth_dma_v.awaddr = 0; + s_axi_eth_dma_v.awaddr[9:0] = s_axi_eth_dma.awaddr[9:0]; + end + always_comb begin `AXI4S_ASSIGN(e2c_v, e2c) end + always_comb begin `AXI4S_ASSIGN(c2e, c2e_v) end + always_comb begin `AXI4_ASSIGN(axi_hp, axi_hp_v) end + + axi_eth_dma_bd axi_eth_dma_bd_i ( + .clk40 (s_axi_eth_dma.clk), + .clk40_rstn (!s_axi_eth_dma.rst), + + .c2e_tdata (c2e_v.tdata), + .c2e_tkeep (c2e_v.tkeep), + .c2e_tlast (c2e_v.tlast), + .c2e_tready (c2e_v.tready), + .c2e_tvalid (c2e_v.tvalid), + + .e2c_tdata (e2c_v.tdata), + .e2c_tkeep (e2c_v.tkeep), + .e2c_tlast (e2c_v.tlast), + .e2c_tready (e2c_v.tready), + .e2c_tvalid (e2c_v.tvalid), + + `AXI4LITE_PORT_ASSIGN_NRS(axi_eth_dma, s_axi_eth_dma_v) + `AXI4_PORT_ASSIGN_NR(axi_hp, axi_hp_v) + + .eth_tx_irq (eth_tx_irq), + .eth_rx_irq (eth_rx_irq) + ); + +endmodule diff --git a/fpga/usrp3/top/x400/ip/axi_eth_dma_bd/axi_eth_dma_bd.tcl b/fpga/usrp3/top/x400/ip/axi_eth_dma_bd/axi_eth_dma_bd.tcl new file mode 100644 index 000000000..da97912fc --- /dev/null +++ b/fpga/usrp3/top/x400/ip/axi_eth_dma_bd/axi_eth_dma_bd.tcl @@ -0,0 +1,325 @@ + +################################################################ +# This is a generated script based on design: axi_eth_dma_bd +# +# Though there are limitations about the generated script, +# the main purpose of this utility is to make learning +# IP Integrator Tcl commands easier. +################################################################ + +namespace eval _tcl { +proc get_script_folder {} { + set script_path [file normalize [info script]] + set script_folder [file dirname $script_path] + return $script_folder +} +} +variable script_folder +set script_folder [_tcl::get_script_folder] + +################################################################ +# Check if script is running in correct Vivado version. +################################################################ +set scripts_vivado_version 2019.1 +set current_vivado_version [version -short] + +if { [string first $scripts_vivado_version $current_vivado_version] == -1 } { + puts "" + catch {common::send_msg_id "BD_TCL-109" "ERROR" "This script was generated using Vivado <$scripts_vivado_version> and is being run in <$current_vivado_version> of Vivado. Please run the script in Vivado <$scripts_vivado_version> then open the design in Vivado <$current_vivado_version>. Upgrade the design by running \"Tools => Report => Report IP Status...\", then run write_bd_tcl to create an updated script."} + + return 1 +} + +################################################################ +# START +################################################################ + +# To test this script, run the following commands from Vivado Tcl console: +# source axi_eth_dma_bd_script.tcl + +# If there is no project opened, this script will create a +# project, but make sure you do not have an existing project +# <./myproj/project_1.xpr> in the current working folder. + +set list_projs [get_projects -quiet] +if { $list_projs eq "" } { + create_project project_1 myproj -part xczu28dr-ffvg1517-1-e +} + + +# CHANGE DESIGN NAME HERE +variable design_name +set design_name axi_eth_dma_bd + +# If you do not already have an existing IP Integrator design open, +# you can create a design using the following command: +# create_bd_design $design_name + +# Creating design if needed +set errMsg "" +set nRet 0 + +set cur_design [current_bd_design -quiet] +set list_cells [get_bd_cells -quiet] + +if { ${design_name} eq "" } { + # USE CASES: + # 1) Design_name not set + + set errMsg "Please set the variable to a non-empty value." + set nRet 1 + +} elseif { ${cur_design} ne "" && ${list_cells} eq "" } { + # USE CASES: + # 2): Current design opened AND is empty AND names same. + # 3): Current design opened AND is empty AND names diff; design_name NOT in project. + # 4): Current design opened AND is empty AND names diff; design_name exists in project. + + if { $cur_design ne $design_name } { + common::send_msg_id "BD_TCL-001" "INFO" "Changing value of from <$design_name> to <$cur_design> since current design is empty." + set design_name [get_property NAME $cur_design] + } + common::send_msg_id "BD_TCL-002" "INFO" "Constructing design in IPI design <$cur_design>..." + +} elseif { ${cur_design} ne "" && $list_cells ne "" && $cur_design eq $design_name } { + # USE CASES: + # 5) Current design opened AND has components AND same names. + + set errMsg "Design <$design_name> already exists in your project, please set the variable to another value." + set nRet 1 +} elseif { [get_files -quiet ${design_name}.bd] ne "" } { + # USE CASES: + # 6) Current opened design, has components, but diff names, design_name exists in project. + # 7) No opened design, design_name exists in project. + + set errMsg "Design <$design_name> already exists in your project, please set the variable to another value." + set nRet 2 + +} else { + # USE CASES: + # 8) No opened design, design_name not in project. + # 9) Current opened design, has components, but diff names, design_name not in project. + + common::send_msg_id "BD_TCL-003" "INFO" "Currently there is no design <$design_name> in project, so creating one..." + + create_bd_design $design_name + + common::send_msg_id "BD_TCL-004" "INFO" "Making design <$design_name> as current_bd_design." + current_bd_design $design_name + +} + +common::send_msg_id "BD_TCL-005" "INFO" "Currently the variable is equal to \"$design_name\"." + +if { $nRet != 0 } { + catch {common::send_msg_id "BD_TCL-114" "ERROR" $errMsg} + return $nRet +} + +set bCheckIPsPassed 1 +################################################################## +# CHECK IPs +################################################################## +set bCheckIPs 1 +if { $bCheckIPs == 1 } { + set list_check_ips "\ +xilinx.com:ip:axi_dma:7.1\ +xilinx.com:ip:smartconnect:1.0\ +" + + set list_ips_missing "" + common::send_msg_id "BD_TCL-006" "INFO" "Checking if the following IPs exist in the project's IP catalog: $list_check_ips ." + + foreach ip_vlnv $list_check_ips { + set ip_obj [get_ipdefs -all $ip_vlnv] + if { $ip_obj eq "" } { + lappend list_ips_missing $ip_vlnv + } + } + + if { $list_ips_missing ne "" } { + catch {common::send_msg_id "BD_TCL-115" "ERROR" "The following IPs are not found in the IP Catalog:\n $list_ips_missing\n\nResolution: Please add the repository containing the IP(s) to the project." } + set bCheckIPsPassed 0 + } + +} + +if { $bCheckIPsPassed != 1 } { + common::send_msg_id "BD_TCL-1003" "WARNING" "Will not continue with creation of design due to the error(s) above." + return 3 +} + +################################################################## +# DESIGN PROCs +################################################################## + + + +# Procedure to create entire design; Provide argument to make +# procedure reusable. If parentCell is "", will use root. +proc create_root_design { parentCell } { + + variable script_folder + variable design_name + + if { $parentCell eq "" } { + set parentCell [get_bd_cells /] + } + + # Get object for parentCell + set parentObj [get_bd_cells $parentCell] + if { $parentObj == "" } { + catch {common::send_msg_id "BD_TCL-100" "ERROR" "Unable to find parent cell <$parentCell>!"} + return + } + + # Make sure parentObj is hier blk + set parentType [get_property TYPE $parentObj] + if { $parentType ne "hier" } { + catch {common::send_msg_id "BD_TCL-101" "ERROR" "Parent <$parentObj> has TYPE = <$parentType>. Expected to be ."} + return + } + + # Save current instance; Restore later + set oldCurInst [current_bd_instance .] + + # Set parent object as current + current_bd_instance $parentObj + + + # Create interface ports + set axi_eth_dma [ create_bd_intf_port -mode Slave -vlnv xilinx.com:interface:aximm_rtl:1.0 axi_eth_dma ] + set_property -dict [ list \ + CONFIG.ADDR_WIDTH {40} \ + CONFIG.ARUSER_WIDTH {0} \ + CONFIG.AWUSER_WIDTH {0} \ + CONFIG.BUSER_WIDTH {0} \ + CONFIG.DATA_WIDTH {32} \ + CONFIG.FREQ_HZ {40000000} \ + CONFIG.HAS_BRESP {1} \ + CONFIG.HAS_BURST {0} \ + CONFIG.HAS_CACHE {0} \ + CONFIG.HAS_LOCK {0} \ + CONFIG.HAS_PROT {0} \ + CONFIG.HAS_QOS {0} \ + CONFIG.HAS_REGION {0} \ + CONFIG.HAS_RRESP {1} \ + CONFIG.HAS_WSTRB {0} \ + CONFIG.ID_WIDTH {0} \ + CONFIG.MAX_BURST_LENGTH {1} \ + CONFIG.NUM_READ_OUTSTANDING {8} \ + CONFIG.NUM_READ_THREADS {1} \ + CONFIG.NUM_WRITE_OUTSTANDING {8} \ + CONFIG.NUM_WRITE_THREADS {1} \ + CONFIG.PROTOCOL {AXI4LITE} \ + CONFIG.READ_WRITE_MODE {READ_WRITE} \ + CONFIG.RUSER_BITS_PER_BYTE {0} \ + CONFIG.RUSER_WIDTH {0} \ + CONFIG.SUPPORTS_NARROW_BURST {0} \ + CONFIG.WUSER_BITS_PER_BYTE {0} \ + CONFIG.WUSER_WIDTH {0} \ + ] $axi_eth_dma + + set axi_hp [ create_bd_intf_port -mode Master -vlnv xilinx.com:interface:aximm_rtl:1.0 axi_hp ] + set_property -dict [ list \ + CONFIG.ADDR_WIDTH {49} \ + CONFIG.DATA_WIDTH {128} \ + CONFIG.FREQ_HZ {40000000} \ + CONFIG.HAS_REGION {0} \ + CONFIG.NUM_READ_OUTSTANDING {16} \ + CONFIG.NUM_WRITE_OUTSTANDING {16} \ + CONFIG.PROTOCOL {AXI4} \ + ] $axi_hp + + set c2e [ create_bd_intf_port -mode Master -vlnv xilinx.com:interface:axis_rtl:1.0 c2e ] + set_property -dict [ list \ + CONFIG.FREQ_HZ {40000000} \ + ] $c2e + + set e2c [ create_bd_intf_port -mode Slave -vlnv xilinx.com:interface:axis_rtl:1.0 e2c ] + set_property -dict [ list \ + CONFIG.FREQ_HZ {40000000} \ + CONFIG.HAS_TKEEP {1} \ + CONFIG.HAS_TLAST {1} \ + CONFIG.HAS_TREADY {1} \ + CONFIG.HAS_TSTRB {0} \ + CONFIG.LAYERED_METADATA {undef} \ + CONFIG.TDATA_NUM_BYTES {8} \ + CONFIG.TDEST_WIDTH {0} \ + CONFIG.TID_WIDTH {0} \ + CONFIG.TUSER_WIDTH {0} \ + ] $e2c + + + # Create ports + set clk40 [ create_bd_port -dir I -type clk clk40 ] + set_property -dict [ list \ + CONFIG.ASSOCIATED_BUSIF {e2c:axi_eth_dma:axi_hp:c2e} \ + CONFIG.ASSOCIATED_RESET {clk40_rstn} \ + CONFIG.FREQ_HZ {40000000} \ + ] $clk40 + set clk40_rstn [ create_bd_port -dir I -type rst clk40_rstn ] + set eth_rx_irq [ create_bd_port -dir O -type intr eth_rx_irq ] + set eth_tx_irq [ create_bd_port -dir O -type intr eth_tx_irq ] + + # Create instance: axi_eth_dma, and set properties + set axi_eth_dma [ create_bd_cell -type ip -vlnv xilinx.com:ip:axi_dma:7.1 axi_eth_dma ] + set_property -dict [ list \ + CONFIG.c_addr_width {36} \ + CONFIG.c_enable_multi_channel {0} \ + CONFIG.c_include_mm2s_dre {1} \ + CONFIG.c_include_s2mm {1} \ + CONFIG.c_include_s2mm_dre {1} \ + CONFIG.c_m_axi_mm2s_data_width {64} \ + CONFIG.c_m_axi_s2mm_data_width {64} \ + CONFIG.c_m_axis_mm2s_tdata_width {64} \ + CONFIG.c_micro_dma {0} \ + CONFIG.c_mm2s_burst_size {8} \ + CONFIG.c_s2mm_burst_size {16} \ + CONFIG.c_sg_include_stscntrl_strm {0} \ + ] $axi_eth_dma + + # Create instance: smartconnect_eth_dma, and set properties + set smartconnect_eth_dma [ create_bd_cell -type ip -vlnv xilinx.com:ip:smartconnect:1.0 smartconnect_eth_dma ] + set_property -dict [ list \ + CONFIG.NUM_SI {3} \ + ] $smartconnect_eth_dma + + # Create interface connections + connect_bd_intf_net -intf_net Conn3 [get_bd_intf_ports c2e] [get_bd_intf_pins axi_eth_dma/M_AXIS_MM2S] + connect_bd_intf_net -intf_net Conn4 [get_bd_intf_ports e2c] [get_bd_intf_pins axi_eth_dma/S_AXIS_S2MM] + connect_bd_intf_net -intf_net axi_eth_dma_internal_M_AXI_MM2S [get_bd_intf_pins axi_eth_dma/M_AXI_MM2S] [get_bd_intf_pins smartconnect_eth_dma/S01_AXI] + connect_bd_intf_net -intf_net axi_eth_dma_internal_M_AXI_S2MM [get_bd_intf_pins axi_eth_dma/M_AXI_S2MM] [get_bd_intf_pins smartconnect_eth_dma/S02_AXI] + connect_bd_intf_net -intf_net axi_eth_dma_internal_M_AXI_SG [get_bd_intf_pins axi_eth_dma/M_AXI_SG] [get_bd_intf_pins smartconnect_eth_dma/S00_AXI] + connect_bd_intf_net -intf_net axi_interconnect_common_m_axi_eth_dma_ctrl [get_bd_intf_ports axi_eth_dma] [get_bd_intf_pins axi_eth_dma/S_AXI_LITE] + connect_bd_intf_net -intf_net smartconnect_0_M00_AXI [get_bd_intf_ports axi_hp] [get_bd_intf_pins smartconnect_eth_dma/M00_AXI] + + # Create port connections + connect_bd_net -net axi_eth_dma_mm2s_introut [get_bd_ports eth_tx_irq] [get_bd_pins axi_eth_dma/mm2s_introut] + connect_bd_net -net axi_eth_dma_s2mm_introut [get_bd_ports eth_rx_irq] [get_bd_pins axi_eth_dma/s2mm_introut] + connect_bd_net -net clk40 [get_bd_ports clk40] [get_bd_pins axi_eth_dma/m_axi_mm2s_aclk] [get_bd_pins axi_eth_dma/m_axi_s2mm_aclk] [get_bd_pins axi_eth_dma/m_axi_sg_aclk] [get_bd_pins axi_eth_dma/s_axi_lite_aclk] [get_bd_pins smartconnect_eth_dma/aclk] + connect_bd_net -net clk40_rstn [get_bd_ports clk40_rstn] [get_bd_pins axi_eth_dma/axi_resetn] [get_bd_pins smartconnect_eth_dma/aresetn] + + # Create address segments + create_bd_addr_seg -range 0x001000000000 -offset 0x00000000 [get_bd_addr_spaces axi_eth_dma/Data_SG] [get_bd_addr_segs axi_hp/Reg] SEG_m_axi_to_ps_Reg + create_bd_addr_seg -range 0x001000000000 -offset 0x00000000 [get_bd_addr_spaces axi_eth_dma/Data_MM2S] [get_bd_addr_segs axi_hp/Reg] SEG_m_axi_to_ps_Reg + create_bd_addr_seg -range 0x001000000000 -offset 0x00000000 [get_bd_addr_spaces axi_eth_dma/Data_S2MM] [get_bd_addr_segs axi_hp/Reg] SEG_m_axi_to_ps_Reg + create_bd_addr_seg -range 0x010000000000 -offset 0x00000000 [get_bd_addr_spaces axi_eth_dma] [get_bd_addr_segs axi_eth_dma/S_AXI_LITE/Reg] SEG_axi_eth_dma_Reg + + + # Restore current instance + current_bd_instance $oldCurInst + + validate_bd_design + save_bd_design +} +# End of create_root_design() + + +################################################################## +# MAIN FLOW +################################################################## + +create_root_design "" + + diff --git a/fpga/usrp3/top/x400/ip/axi_eth_dma_bd/synthstub/axi_eth_dma_bd.vhd b/fpga/usrp3/top/x400/ip/axi_eth_dma_bd/synthstub/axi_eth_dma_bd.vhd new file mode 100644 index 000000000..55ef1c05c --- /dev/null +++ b/fpga/usrp3/top/x400/ip/axi_eth_dma_bd/synthstub/axi_eth_dma_bd.vhd @@ -0,0 +1,90 @@ +-- +-- Copyright 2021 Ettus Research, a National Instruments Brand +-- +-- SPDX-License-Identifier: LGPL-3.0-or-later +-- +-- Module: axi_eth_dma_bd +-- +-- Description: +-- +-- This is an automatically generated stub file to match the entity +-- declaration for 'axi_eth_dma_bd'. This file was created using +-- niBdExportStub Do not modify this file directly! +-- + +library ieee; +use ieee.std_logic_1164.all; +library unisim; +use unisim.vcomponents.all; + +entity axi_eth_dma_bd is +port ( + clk40 : in STD_LOGIC; + clk40_rstn : in STD_LOGIC; + eth_rx_irq : out STD_LOGIC; + eth_tx_irq : out STD_LOGIC; + c2e_tdata : out STD_LOGIC_VECTOR ( 63 downto 0 ); + c2e_tkeep : out STD_LOGIC_VECTOR ( 7 downto 0 ); + c2e_tlast : out STD_LOGIC; + c2e_tready : in STD_LOGIC; + c2e_tvalid : out STD_LOGIC; + e2c_tdata : in STD_LOGIC_VECTOR ( 63 downto 0 ); + e2c_tkeep : in STD_LOGIC_VECTOR ( 7 downto 0 ); + e2c_tlast : in STD_LOGIC; + e2c_tready : out STD_LOGIC; + e2c_tvalid : in STD_LOGIC; + axi_eth_dma_araddr : in STD_LOGIC_VECTOR ( 9 downto 0 ); + axi_eth_dma_arready : out STD_LOGIC; + axi_eth_dma_arvalid : in STD_LOGIC; + axi_eth_dma_awaddr : in STD_LOGIC_VECTOR ( 9 downto 0 ); + axi_eth_dma_awready : out STD_LOGIC; + axi_eth_dma_awvalid : in STD_LOGIC; + axi_eth_dma_bready : in STD_LOGIC; + axi_eth_dma_bresp : out STD_LOGIC_VECTOR ( 1 downto 0 ); + axi_eth_dma_bvalid : out STD_LOGIC; + axi_eth_dma_rdata : out STD_LOGIC_VECTOR ( 31 downto 0 ); + axi_eth_dma_rready : in STD_LOGIC; + axi_eth_dma_rresp : out STD_LOGIC_VECTOR ( 1 downto 0 ); + axi_eth_dma_rvalid : out STD_LOGIC; + axi_eth_dma_wdata : in STD_LOGIC_VECTOR ( 31 downto 0 ); + axi_eth_dma_wready : out STD_LOGIC; + axi_eth_dma_wvalid : in STD_LOGIC; + axi_hp_awaddr : out STD_LOGIC_VECTOR ( 48 downto 0 ); + axi_hp_awlen : out STD_LOGIC_VECTOR ( 7 downto 0 ); + axi_hp_awsize : out STD_LOGIC_VECTOR ( 2 downto 0 ); + axi_hp_awburst : out STD_LOGIC_VECTOR ( 1 downto 0 ); + axi_hp_awlock : out STD_LOGIC_VECTOR ( 0 to 0 ); + axi_hp_awcache : out STD_LOGIC_VECTOR ( 3 downto 0 ); + axi_hp_awprot : out STD_LOGIC_VECTOR ( 2 downto 0 ); + axi_hp_awqos : out STD_LOGIC_VECTOR ( 3 downto 0 ); + axi_hp_awvalid : out STD_LOGIC; + axi_hp_awready : in STD_LOGIC; + axi_hp_wdata : out STD_LOGIC_VECTOR ( 127 downto 0 ); + axi_hp_wstrb : out STD_LOGIC_VECTOR ( 15 downto 0 ); + axi_hp_wlast : out STD_LOGIC; + axi_hp_wvalid : out STD_LOGIC; + axi_hp_wready : in STD_LOGIC; + axi_hp_bresp : in STD_LOGIC_VECTOR ( 1 downto 0 ); + axi_hp_bvalid : in STD_LOGIC; + axi_hp_bready : out STD_LOGIC; + axi_hp_araddr : out STD_LOGIC_VECTOR ( 48 downto 0 ); + axi_hp_arlen : out STD_LOGIC_VECTOR ( 7 downto 0 ); + axi_hp_arsize : out STD_LOGIC_VECTOR ( 2 downto 0 ); + axi_hp_arburst : out STD_LOGIC_VECTOR ( 1 downto 0 ); + axi_hp_arlock : out STD_LOGIC_VECTOR ( 0 to 0 ); + axi_hp_arcache : out STD_LOGIC_VECTOR ( 3 downto 0 ); + axi_hp_arprot : out STD_LOGIC_VECTOR ( 2 downto 0 ); + axi_hp_arqos : out STD_LOGIC_VECTOR ( 3 downto 0 ); + axi_hp_arvalid : out STD_LOGIC; + axi_hp_arready : in STD_LOGIC; + axi_hp_rdata : in STD_LOGIC_VECTOR ( 127 downto 0 ); + axi_hp_rresp : in STD_LOGIC_VECTOR ( 1 downto 0 ); + axi_hp_rlast : in STD_LOGIC; + axi_hp_rvalid : in STD_LOGIC; + axi_hp_rready : out STD_LOGIC + ); + end entity axi_eth_dma_bd; + +architecture stub of axi_eth_dma_bd is +begin +end architecture stub; diff --git a/fpga/usrp3/top/x400/ip/axi_interconnect_app_bd/Makefile.inc b/fpga/usrp3/top/x400/ip/axi_interconnect_app_bd/Makefile.inc new file mode 100644 index 000000000..788b06761 --- /dev/null +++ b/fpga/usrp3/top/x400/ip/axi_interconnect_app_bd/Makefile.inc @@ -0,0 +1,28 @@ +# +# Copyright 2021 Ettus Research, a National Instruments Brand +# +# SPDX-License-Identifier: LGPL-3.0-or-later +# + +include $(TOOLS_DIR)/make/viv_ip_builder.mak + +IP_AXI_INTERCONNECT_APP_ORIG_SRCS = $(addprefix $(IP_DIR)/axi_interconnect_app_bd/, \ +axi_interconnect_app_bd.tcl \ +) + +IP_AXI_INTERCONNECT_APP_BDTCL_SRCS = $(addprefix $(IP_BUILD_DIR)/axi_interconnect_app_bd/, \ +axi_interconnect_app_bd.tcl \ +) + +IP_AXI_INTERCONNECT_APP_BD_SRCS = $(addprefix $(IP_BUILD_DIR)/axi_interconnect_app_bd/, \ +axi_interconnect_app_bd/axi_interconnect_app_bd.bd \ +) + +BD_AXI_INTERCONNECT_APP_BD_OUTS = $(addprefix $(IP_BUILD_DIR)/axi_interconnect_app_bd/, \ +axi_interconnect_app_bd.bd.out \ +axi_interconnect_app_bd/axi_interconnect_app_bd_ooc.xdc \ +axi_interconnect_app_bd/synth/axi_interconnect_app_bd.v \ +) + +$(IP_AXI_INTERCONNECT_APP_BD_SRCS) $(BD_AXI_INTERCONNECT_APP_BD_OUTS) $(IP_AXI_INTERCONNECT_APP_BDTCL_SRCS): $(IP_AXI_INTERCONNECT_APP_ORIG_SRCS) + $(call BUILD_VIVADO_BDTCL,axi_interconnect_app_bd,$(ARCH),$(PART_ID),$(IP_DIR),$(IP_BUILD_DIR),$(LIB_DIR)/vivado_ipi) diff --git a/fpga/usrp3/top/x400/ip/axi_interconnect_app_bd/axi_interconnect_app_bd.tcl b/fpga/usrp3/top/x400/ip/axi_interconnect_app_bd/axi_interconnect_app_bd.tcl new file mode 100644 index 000000000..6647aa39a --- /dev/null +++ b/fpga/usrp3/top/x400/ip/axi_interconnect_app_bd/axi_interconnect_app_bd.tcl @@ -0,0 +1,303 @@ + +################################################################ +# This is a generated script based on design: axi_interconnect_app_bd +# +# Though there are limitations about the generated script, +# the main purpose of this utility is to make learning +# IP Integrator Tcl commands easier. +################################################################ + +namespace eval _tcl { +proc get_script_folder {} { + set script_path [file normalize [info script]] + set script_folder [file dirname $script_path] + return $script_folder +} +} +variable script_folder +set script_folder [_tcl::get_script_folder] + +################################################################ +# Check if script is running in correct Vivado version. +################################################################ +set scripts_vivado_version 2019.1 +set current_vivado_version [version -short] + +if { [string first $scripts_vivado_version $current_vivado_version] == -1 } { + puts "" + catch {common::send_msg_id "BD_TCL-109" "ERROR" "This script was generated using Vivado <$scripts_vivado_version> and is being run in <$current_vivado_version> of Vivado. Please run the script in Vivado <$scripts_vivado_version> then open the design in Vivado <$current_vivado_version>. Upgrade the design by running \"Tools => Report => Report IP Status...\", then run write_bd_tcl to create an updated script."} + + return 1 +} + +################################################################ +# START +################################################################ + +# To test this script, run the following commands from Vivado Tcl console: +# source axi_interconnect_app_bd_script.tcl + +# If there is no project opened, this script will create a +# project, but make sure you do not have an existing project +# <./myproj/project_1.xpr> in the current working folder. + +set list_projs [get_projects -quiet] +if { $list_projs eq "" } { + create_project project_1 myproj -part xczu28dr-ffvg1517-1-e +} + + +# CHANGE DESIGN NAME HERE +variable design_name +set design_name axi_interconnect_app_bd + +# If you do not already have an existing IP Integrator design open, +# you can create a design using the following command: +# create_bd_design $design_name + +# Creating design if needed +set errMsg "" +set nRet 0 + +set cur_design [current_bd_design -quiet] +set list_cells [get_bd_cells -quiet] + +if { ${design_name} eq "" } { + # USE CASES: + # 1) Design_name not set + + set errMsg "Please set the variable to a non-empty value." + set nRet 1 + +} elseif { ${cur_design} ne "" && ${list_cells} eq "" } { + # USE CASES: + # 2): Current design opened AND is empty AND names same. + # 3): Current design opened AND is empty AND names diff; design_name NOT in project. + # 4): Current design opened AND is empty AND names diff; design_name exists in project. + + if { $cur_design ne $design_name } { + common::send_msg_id "BD_TCL-001" "INFO" "Changing value of from <$design_name> to <$cur_design> since current design is empty." + set design_name [get_property NAME $cur_design] + } + common::send_msg_id "BD_TCL-002" "INFO" "Constructing design in IPI design <$cur_design>..." + +} elseif { ${cur_design} ne "" && $list_cells ne "" && $cur_design eq $design_name } { + # USE CASES: + # 5) Current design opened AND has components AND same names. + + set errMsg "Design <$design_name> already exists in your project, please set the variable to another value." + set nRet 1 +} elseif { [get_files -quiet ${design_name}.bd] ne "" } { + # USE CASES: + # 6) Current opened design, has components, but diff names, design_name exists in project. + # 7) No opened design, design_name exists in project. + + set errMsg "Design <$design_name> already exists in your project, please set the variable to another value." + set nRet 2 + +} else { + # USE CASES: + # 8) No opened design, design_name not in project. + # 9) Current opened design, has components, but diff names, design_name not in project. + + common::send_msg_id "BD_TCL-003" "INFO" "Currently there is no design <$design_name> in project, so creating one..." + + create_bd_design $design_name + + common::send_msg_id "BD_TCL-004" "INFO" "Making design <$design_name> as current_bd_design." + current_bd_design $design_name + +} + +common::send_msg_id "BD_TCL-005" "INFO" "Currently the variable is equal to \"$design_name\"." + +if { $nRet != 0 } { + catch {common::send_msg_id "BD_TCL-114" "ERROR" $errMsg} + return $nRet +} + +set bCheckIPsPassed 1 +################################################################## +# CHECK IPs +################################################################## +set bCheckIPs 1 +if { $bCheckIPs == 1 } { + set list_check_ips "\ +" + + set list_ips_missing "" + common::send_msg_id "BD_TCL-006" "INFO" "Checking if the following IPs exist in the project's IP catalog: $list_check_ips ." + + foreach ip_vlnv $list_check_ips { + set ip_obj [get_ipdefs -all $ip_vlnv] + if { $ip_obj eq "" } { + lappend list_ips_missing $ip_vlnv + } + } + + if { $list_ips_missing ne "" } { + catch {common::send_msg_id "BD_TCL-115" "ERROR" "The following IPs are not found in the IP Catalog:\n $list_ips_missing\n\nResolution: Please add the repository containing the IP(s) to the project." } + set bCheckIPsPassed 0 + } + +} + +if { $bCheckIPsPassed != 1 } { + common::send_msg_id "BD_TCL-1003" "WARNING" "Will not continue with creation of design due to the error(s) above." + return 3 +} + +################################################################## +# DESIGN PROCs +################################################################## + + + +# Procedure to create entire design; Provide argument to make +# procedure reusable. If parentCell is "", will use root. +proc create_root_design { parentCell } { + + variable script_folder + variable design_name + + if { $parentCell eq "" } { + set parentCell [get_bd_cells /] + } + + # Get object for parentCell + set parentObj [get_bd_cells $parentCell] + if { $parentObj == "" } { + catch {common::send_msg_id "BD_TCL-100" "ERROR" "Unable to find parent cell <$parentCell>!"} + return + } + + # Make sure parentObj is hier blk + set parentType [get_property TYPE $parentObj] + if { $parentType ne "hier" } { + catch {common::send_msg_id "BD_TCL-101" "ERROR" "Parent <$parentObj> has TYPE = <$parentType>. Expected to be ."} + return + } + + # Save current instance; Restore later + set oldCurInst [current_bd_instance .] + + # Set parent object as current + current_bd_instance $parentObj + + + # Create interface ports + set m_axi_qsfp0 [ create_bd_intf_port -mode Master -vlnv xilinx.com:interface:aximm_rtl:1.0 m_axi_qsfp0 ] + set_property -dict [ list \ + CONFIG.ADDR_WIDTH {40} \ + CONFIG.CLK_DOMAIN {axi_interconnect_app_bd_clk40} \ + CONFIG.DATA_WIDTH {32} \ + CONFIG.FREQ_HZ {40000000} \ + CONFIG.HAS_BURST {0} \ + CONFIG.HAS_CACHE {0} \ + CONFIG.HAS_LOCK {0} \ + CONFIG.HAS_PROT {0} \ + CONFIG.HAS_QOS {0} \ + CONFIG.HAS_REGION {0} \ + CONFIG.NUM_READ_OUTSTANDING {2} \ + CONFIG.NUM_WRITE_OUTSTANDING {2} \ + CONFIG.PROTOCOL {AXI4LITE} \ + ] $m_axi_qsfp0 + + set m_axi_qsfp1 [ create_bd_intf_port -mode Master -vlnv xilinx.com:interface:aximm_rtl:1.0 m_axi_qsfp1 ] + set_property -dict [ list \ + CONFIG.ADDR_WIDTH {40} \ + CONFIG.CLK_DOMAIN {axi_interconnect_app_bd_clk40} \ + CONFIG.DATA_WIDTH {32} \ + CONFIG.FREQ_HZ {40000000} \ + CONFIG.HAS_BURST {0} \ + CONFIG.HAS_CACHE {0} \ + CONFIG.HAS_LOCK {0} \ + CONFIG.HAS_PROT {0} \ + CONFIG.HAS_QOS {0} \ + CONFIG.HAS_REGION {0} \ + CONFIG.HAS_WSTRB {0} \ + CONFIG.NUM_READ_OUTSTANDING {2} \ + CONFIG.NUM_WRITE_OUTSTANDING {2} \ + CONFIG.PROTOCOL {AXI4LITE} \ + ] $m_axi_qsfp1 + + set s_axi_app [ create_bd_intf_port -mode Slave -vlnv xilinx.com:interface:aximm_rtl:1.0 s_axi_app ] + set_property -dict [ list \ + CONFIG.ADDR_WIDTH {40} \ + CONFIG.ARUSER_WIDTH {0} \ + CONFIG.AWUSER_WIDTH {0} \ + CONFIG.BUSER_WIDTH {0} \ + CONFIG.CLK_DOMAIN {axi_interconnect_app_bd_clk40} \ + CONFIG.DATA_WIDTH {32} \ + CONFIG.FREQ_HZ {40000000} \ + CONFIG.HAS_BRESP {1} \ + CONFIG.HAS_BURST {0} \ + CONFIG.HAS_CACHE {0} \ + CONFIG.HAS_LOCK {0} \ + CONFIG.HAS_PROT {1} \ + CONFIG.HAS_QOS {0} \ + CONFIG.HAS_REGION {0} \ + CONFIG.HAS_RRESP {1} \ + CONFIG.HAS_WSTRB {1} \ + CONFIG.ID_WIDTH {0} \ + CONFIG.MAX_BURST_LENGTH {1} \ + CONFIG.NUM_READ_OUTSTANDING {8} \ + CONFIG.NUM_READ_THREADS {4} \ + CONFIG.NUM_WRITE_OUTSTANDING {8} \ + CONFIG.NUM_WRITE_THREADS {4} \ + CONFIG.PROTOCOL {AXI4LITE} \ + CONFIG.READ_WRITE_MODE {READ_WRITE} \ + CONFIG.RUSER_BITS_PER_BYTE {0} \ + CONFIG.RUSER_WIDTH {0} \ + CONFIG.SUPPORTS_NARROW_BURST {0} \ + CONFIG.WUSER_BITS_PER_BYTE {0} \ + CONFIG.WUSER_WIDTH {0} \ + ] $s_axi_app + + + # Create ports + set clk40 [ create_bd_port -dir I -type clk clk40 ] + set_property -dict [ list \ + CONFIG.ASSOCIATED_BUSIF {m_axi_qsfp0:m_axi_qsfp1:s_axi_app} \ + CONFIG.ASSOCIATED_RESET {clk40_rstn} \ + CONFIG.CLK_DOMAIN {axi_interconnect_app_bd_clk40} \ + CONFIG.FREQ_HZ {40000000} \ + ] $clk40 + set clk40_rstn [ create_bd_port -dir I -type rst clk40_rstn ] + + # Create instance: axi_interconnect_0, and set properties + set axi_interconnect_0 [ create_bd_cell -type ip -vlnv xilinx.com:ip:axi_interconnect:2.1 axi_interconnect_0 ] + set_property -dict [ list \ + CONFIG.NUM_MI {2} \ + ] $axi_interconnect_0 + + # Create interface connections + connect_bd_intf_net -intf_net S00_AXI_1 [get_bd_intf_ports s_axi_app] [get_bd_intf_pins axi_interconnect_0/S00_AXI] + connect_bd_intf_net -intf_net axi_interconnect_0_M00_AXI [get_bd_intf_ports m_axi_qsfp0] [get_bd_intf_pins axi_interconnect_0/M00_AXI] + connect_bd_intf_net -intf_net axi_interconnect_0_M01_AXI [get_bd_intf_ports m_axi_qsfp1] [get_bd_intf_pins axi_interconnect_0/M01_AXI] + + # Create port connections + connect_bd_net -net clk40_1 [get_bd_ports clk40] [get_bd_pins axi_interconnect_0/ACLK] [get_bd_pins axi_interconnect_0/M00_ACLK] [get_bd_pins axi_interconnect_0/M01_ACLK] [get_bd_pins axi_interconnect_0/S00_ACLK] + connect_bd_net -net clk40_rstn_1 [get_bd_ports clk40_rstn] [get_bd_pins axi_interconnect_0/ARESETN] [get_bd_pins axi_interconnect_0/M00_ARESETN] [get_bd_pins axi_interconnect_0/M01_ARESETN] [get_bd_pins axi_interconnect_0/S00_ARESETN] + + # Create address segments + create_bd_addr_seg -range 0x00040000 -offset 0x001200000000 [get_bd_addr_spaces s_axi_app] [get_bd_addr_segs m_axi_qsfp0/Reg] SEG_m_axi_qsfp0_Reg + create_bd_addr_seg -range 0x00040000 -offset 0x001200040000 [get_bd_addr_spaces s_axi_app] [get_bd_addr_segs m_axi_qsfp1/Reg] SEG_m_axi_qsfp1_Reg + + + # Restore current instance + current_bd_instance $oldCurInst + + validate_bd_design + save_bd_design +} +# End of create_root_design() + + +################################################################## +# MAIN FLOW +################################################################## + +create_root_design "" + + diff --git a/fpga/usrp3/top/x400/ip/axi_interconnect_dma_bd/Makefile.inc b/fpga/usrp3/top/x400/ip/axi_interconnect_dma_bd/Makefile.inc new file mode 100644 index 000000000..31b996bb9 --- /dev/null +++ b/fpga/usrp3/top/x400/ip/axi_interconnect_dma_bd/Makefile.inc @@ -0,0 +1,41 @@ +# +# Copyright 2021 Ettus Research, a National Instruments Brand +# +# SPDX-License-Identifier: LGPL-3.0-or-later +# + +include $(TOOLS_DIR)/make/viv_ip_builder.mak + +IP_AXI_INTERCONNECT_DMA_HDL_SRCS = $(addprefix $(IP_DIR)/axi_interconnect_dma_bd/, \ +axi_interconnect_dma.sv \ +) + +IP_AXI_INTERCONNECT_DMA_HDL_SIM_SRCS = $(wildcard $(addprefix $(IP_BUILD_DIR)/axi_interconnect_dma_bd/axi_interconnect_dma_bd/, \ +sim/axi_interconnect_dma_bd.v\ +ip/axi_interconnect_dma_bd_xbar_0/sim/axi_interconnect_dma_bd_xbar_0.v\ +ipshared/*/simulation/fifo_generator_vlog_beh.v\ +ipshared/*/hdl/*.v\ +)) + +IP_AXI_INTERCONNECT_DMA_ORIG_SRCS = $(addprefix $(IP_DIR)/axi_interconnect_dma_bd/, \ +axi_interconnect_dma_bd.tcl \ +) + +IP_AXI_INTERCONNECT_DMA_BDTCL_SRCS = $(addprefix $(IP_BUILD_DIR)/axi_interconnect_dma_bd/, \ +axi_interconnect_dma_bd.tcl \ +) + +IP_AXI_INTERCONNECT_DMA_BD_SRCS = $(addprefix $(IP_BUILD_DIR)/axi_interconnect_dma_bd/, \ +axi_interconnect_dma_bd/axi_interconnect_dma_bd.bd \ +) + +BD_AXI_INTERCONNECT_DMA_BD_OUTS = $(addprefix $(IP_BUILD_DIR)/axi_interconnect_dma_bd/, \ +axi_interconnect_dma_bd.bd.out \ +axi_interconnect_dma_bd/axi_interconnect_dma_bd_ooc.xdc \ +axi_interconnect_dma_bd/synth/axi_interconnect_dma_bd.v \ +) + + + +$(IP_AXI_INTERCONNECT_DMA_BD_SRCS) $(BD_AXI_INTERCONNECT_DMA_BD_OUTS) $(IP_AXI_INTERCONNECT_DMA_BDTCL_SRCS): $(IP_AXI_INTERCONNECT_DMA_ORIG_SRCS) + $(call BUILD_VIVADO_BDTCL,axi_interconnect_dma_bd,$(ARCH),$(PART_ID),$(IP_DIR),$(IP_BUILD_DIR),$(LIB_DIR)/vivado_ipi) diff --git a/fpga/usrp3/top/x400/ip/axi_interconnect_dma_bd/axi_interconnect_dma.sv b/fpga/usrp3/top/x400/ip/axi_interconnect_dma_bd/axi_interconnect_dma.sv new file mode 100644 index 000000000..9fd2f6589 --- /dev/null +++ b/fpga/usrp3/top/x400/ip/axi_interconnect_dma_bd/axi_interconnect_dma.sv @@ -0,0 +1,40 @@ +// +// Copyright 2021 Ettus Research, A National Instruments Brand +// +// SPDX-License-Identifier: LGPL-3.0-or-later +// +// Module: axi_interconnect_dma +// +// Description: Wrapper for the Xilinx AXI interconnect block +// + +module axi_interconnect_dma ( + AxiIf.slave s_axi_hp_dma [3:0], // Incoming AXI from DMA engines + AxiIf.master m_axi_hp // Outgoing AXI to memory +); + + // AxiIf_v has no procedural assignments so it can be driven by a port. + `include "../../../../lib/axi4_sv/axi.vh" + AxiIf_v #(128,49) + m_axi_hp_v(.clk(m_axi_hp.clk), .rst(m_axi_hp.rst)); + AxiIf_v #(128,49) + s_axi_hp_dma_v[3:0](.clk(m_axi_hp.clk), .rst(m_axi_hp.rst)); + + // O = I; (O , I ) + always_comb begin `AXI4_ASSIGN(m_axi_hp, m_axi_hp_v) end + always_comb begin `AXI4_ASSIGN(s_axi_hp_dma_v[0], s_axi_hp_dma[0]) end + always_comb begin `AXI4_ASSIGN(s_axi_hp_dma_v[1], s_axi_hp_dma[1]) end + always_comb begin `AXI4_ASSIGN(s_axi_hp_dma_v[2], s_axi_hp_dma[2]) end + always_comb begin `AXI4_ASSIGN(s_axi_hp_dma_v[3], s_axi_hp_dma[3]) end + + axi_interconnect_dma_bd axi_interconnect_dma_bd_i ( + `AXI4_PORT_ASSIGN_NR(m_axi_hp, m_axi_hp_v) + `AXI4_PORT_ASSIGN_NR(s_axi_hp_dma0, s_axi_hp_dma_v[0]) + `AXI4_PORT_ASSIGN_NR(s_axi_hp_dma1, s_axi_hp_dma_v[1]) + `AXI4_PORT_ASSIGN_NR(s_axi_hp_dma2, s_axi_hp_dma_v[2]) + `AXI4_PORT_ASSIGN_NR(s_axi_hp_dma3, s_axi_hp_dma_v[3]) + .clk40 (m_axi_hp.clk), + .clk40_rstn (!m_axi_hp.rst) + ); + +endmodule diff --git a/fpga/usrp3/top/x400/ip/axi_interconnect_dma_bd/axi_interconnect_dma_bd.tcl b/fpga/usrp3/top/x400/ip/axi_interconnect_dma_bd/axi_interconnect_dma_bd.tcl new file mode 100644 index 000000000..43c959ac0 --- /dev/null +++ b/fpga/usrp3/top/x400/ip/axi_interconnect_dma_bd/axi_interconnect_dma_bd.tcl @@ -0,0 +1,405 @@ + +################################################################ +# This is a generated script based on design: axi_interconnect_dma_bd +# +# Though there are limitations about the generated script, +# the main purpose of this utility is to make learning +# IP Integrator Tcl commands easier. +################################################################ + +namespace eval _tcl { +proc get_script_folder {} { + set script_path [file normalize [info script]] + set script_folder [file dirname $script_path] + return $script_folder +} +} +variable script_folder +set script_folder [_tcl::get_script_folder] + +################################################################ +# Check if script is running in correct Vivado version. +################################################################ +set scripts_vivado_version 2019.1 +set current_vivado_version [version -short] + +if { [string first $scripts_vivado_version $current_vivado_version] == -1 } { + puts "" + catch {common::send_msg_id "BD_TCL-109" "ERROR" "This script was generated using Vivado <$scripts_vivado_version> and is being run in <$current_vivado_version> of Vivado. Please run the script in Vivado <$scripts_vivado_version> then open the design in Vivado <$current_vivado_version>. Upgrade the design by running \"Tools => Report => Report IP Status...\", then run write_bd_tcl to create an updated script."} + + return 1 +} + +################################################################ +# START +################################################################ + +# To test this script, run the following commands from Vivado Tcl console: +# source axi_interconnect_dma_bd_script.tcl + +# If there is no project opened, this script will create a +# project, but make sure you do not have an existing project +# <./myproj/project_1.xpr> in the current working folder. + +set list_projs [get_projects -quiet] +if { $list_projs eq "" } { + create_project project_1 myproj -part xczu28dr-ffvg1517-1-e +} + + +# CHANGE DESIGN NAME HERE +variable design_name +set design_name axi_interconnect_dma_bd + +# If you do not already have an existing IP Integrator design open, +# you can create a design using the following command: +# create_bd_design $design_name + +# Creating design if needed +set errMsg "" +set nRet 0 + +set cur_design [current_bd_design -quiet] +set list_cells [get_bd_cells -quiet] + +if { ${design_name} eq "" } { + # USE CASES: + # 1) Design_name not set + + set errMsg "Please set the variable to a non-empty value." + set nRet 1 + +} elseif { ${cur_design} ne "" && ${list_cells} eq "" } { + # USE CASES: + # 2): Current design opened AND is empty AND names same. + # 3): Current design opened AND is empty AND names diff; design_name NOT in project. + # 4): Current design opened AND is empty AND names diff; design_name exists in project. + + if { $cur_design ne $design_name } { + common::send_msg_id "BD_TCL-001" "INFO" "Changing value of from <$design_name> to <$cur_design> since current design is empty." + set design_name [get_property NAME $cur_design] + } + common::send_msg_id "BD_TCL-002" "INFO" "Constructing design in IPI design <$cur_design>..." + +} elseif { ${cur_design} ne "" && $list_cells ne "" && $cur_design eq $design_name } { + # USE CASES: + # 5) Current design opened AND has components AND same names. + + set errMsg "Design <$design_name> already exists in your project, please set the variable to another value." + set nRet 1 +} elseif { [get_files -quiet ${design_name}.bd] ne "" } { + # USE CASES: + # 6) Current opened design, has components, but diff names, design_name exists in project. + # 7) No opened design, design_name exists in project. + + set errMsg "Design <$design_name> already exists in your project, please set the variable to another value." + set nRet 2 + +} else { + # USE CASES: + # 8) No opened design, design_name not in project. + # 9) Current opened design, has components, but diff names, design_name not in project. + + common::send_msg_id "BD_TCL-003" "INFO" "Currently there is no design <$design_name> in project, so creating one..." + + create_bd_design $design_name + + common::send_msg_id "BD_TCL-004" "INFO" "Making design <$design_name> as current_bd_design." + current_bd_design $design_name + +} + +common::send_msg_id "BD_TCL-005" "INFO" "Currently the variable is equal to \"$design_name\"." + +if { $nRet != 0 } { + catch {common::send_msg_id "BD_TCL-114" "ERROR" $errMsg} + return $nRet +} + +set bCheckIPsPassed 1 +################################################################## +# CHECK IPs +################################################################## +set bCheckIPs 1 +if { $bCheckIPs == 1 } { + set list_check_ips "\ +" + + set list_ips_missing "" + common::send_msg_id "BD_TCL-006" "INFO" "Checking if the following IPs exist in the project's IP catalog: $list_check_ips ." + + foreach ip_vlnv $list_check_ips { + set ip_obj [get_ipdefs -all $ip_vlnv] + if { $ip_obj eq "" } { + lappend list_ips_missing $ip_vlnv + } + } + + if { $list_ips_missing ne "" } { + catch {common::send_msg_id "BD_TCL-115" "ERROR" "The following IPs are not found in the IP Catalog:\n $list_ips_missing\n\nResolution: Please add the repository containing the IP(s) to the project." } + set bCheckIPsPassed 0 + } + +} + +if { $bCheckIPsPassed != 1 } { + common::send_msg_id "BD_TCL-1003" "WARNING" "Will not continue with creation of design due to the error(s) above." + return 3 +} + +################################################################## +# DESIGN PROCs +################################################################## + + + +# Procedure to create entire design; Provide argument to make +# procedure reusable. If parentCell is "", will use root. +proc create_root_design { parentCell } { + + variable script_folder + variable design_name + + if { $parentCell eq "" } { + set parentCell [get_bd_cells /] + } + + # Get object for parentCell + set parentObj [get_bd_cells $parentCell] + if { $parentObj == "" } { + catch {common::send_msg_id "BD_TCL-100" "ERROR" "Unable to find parent cell <$parentCell>!"} + return + } + + # Make sure parentObj is hier blk + set parentType [get_property TYPE $parentObj] + if { $parentType ne "hier" } { + catch {common::send_msg_id "BD_TCL-101" "ERROR" "Parent <$parentObj> has TYPE = <$parentType>. Expected to be ."} + return + } + + # Save current instance; Restore later + set oldCurInst [current_bd_instance .] + + # Set parent object as current + current_bd_instance $parentObj + + + # Create interface ports + set m_axi_hp [ create_bd_intf_port -mode Master -vlnv xilinx.com:interface:aximm_rtl:1.0 m_axi_hp ] + set_property -dict [ list \ + CONFIG.ADDR_WIDTH {49} \ + CONFIG.CLK_DOMAIN {axi_interconnect_dma_bd_clk40} \ + CONFIG.DATA_WIDTH {128} \ + CONFIG.FREQ_HZ {40000000} \ + CONFIG.HAS_BURST {1} \ + CONFIG.HAS_CACHE {1} \ + CONFIG.HAS_LOCK {1} \ + CONFIG.HAS_PROT {1} \ + CONFIG.HAS_QOS {1} \ + CONFIG.HAS_REGION {0} \ + CONFIG.NUM_READ_OUTSTANDING {16} \ + CONFIG.NUM_WRITE_OUTSTANDING {16} \ + CONFIG.PROTOCOL {AXI4} \ + CONFIG.READ_WRITE_MODE {READ_WRITE} \ + ] $m_axi_hp + + set s_axi_hp_dma0 [ create_bd_intf_port -mode Slave -vlnv xilinx.com:interface:aximm_rtl:1.0 s_axi_hp_dma0 ] + set_property -dict [ list \ + CONFIG.ADDR_WIDTH {49} \ + CONFIG.ARUSER_WIDTH {0} \ + CONFIG.AWUSER_WIDTH {0} \ + CONFIG.BUSER_WIDTH {0} \ + CONFIG.CLK_DOMAIN {axi_interconnect_dma_bd_clk40} \ + CONFIG.DATA_WIDTH {128} \ + CONFIG.FREQ_HZ {40000000} \ + CONFIG.HAS_BRESP {1} \ + CONFIG.HAS_BURST {1} \ + CONFIG.HAS_CACHE {1} \ + CONFIG.HAS_LOCK {1} \ + CONFIG.HAS_PROT {1} \ + CONFIG.HAS_QOS {1} \ + CONFIG.HAS_REGION {0} \ + CONFIG.HAS_RRESP {1} \ + CONFIG.HAS_WSTRB {1} \ + CONFIG.ID_WIDTH {0} \ + CONFIG.MAX_BURST_LENGTH {16} \ + CONFIG.NUM_READ_OUTSTANDING {8} \ + CONFIG.NUM_READ_THREADS {4} \ + CONFIG.NUM_WRITE_OUTSTANDING {8} \ + CONFIG.NUM_WRITE_THREADS {4} \ + CONFIG.PROTOCOL {AXI4} \ + CONFIG.READ_WRITE_MODE {READ_WRITE} \ + CONFIG.RUSER_BITS_PER_BYTE {0} \ + CONFIG.RUSER_WIDTH {0} \ + CONFIG.SUPPORTS_NARROW_BURST {0} \ + CONFIG.WUSER_BITS_PER_BYTE {0} \ + CONFIG.WUSER_WIDTH {0} \ + ] $s_axi_hp_dma0 + + set s_axi_hp_dma1 [ create_bd_intf_port -mode Slave -vlnv xilinx.com:interface:aximm_rtl:1.0 s_axi_hp_dma1 ] + set_property -dict [ list \ + CONFIG.ADDR_WIDTH {49} \ + CONFIG.ARUSER_WIDTH {0} \ + CONFIG.AWUSER_WIDTH {0} \ + CONFIG.BUSER_WIDTH {0} \ + CONFIG.CLK_DOMAIN {axi_interconnect_dma_bd_clk40} \ + CONFIG.DATA_WIDTH {128} \ + CONFIG.FREQ_HZ {40000000} \ + CONFIG.HAS_BRESP {1} \ + CONFIG.HAS_BURST {1} \ + CONFIG.HAS_CACHE {1} \ + CONFIG.HAS_LOCK {1} \ + CONFIG.HAS_PROT {1} \ + CONFIG.HAS_QOS {1} \ + CONFIG.HAS_REGION {0} \ + CONFIG.HAS_RRESP {1} \ + CONFIG.HAS_WSTRB {1} \ + CONFIG.ID_WIDTH {0} \ + CONFIG.MAX_BURST_LENGTH {16} \ + CONFIG.NUM_READ_OUTSTANDING {8} \ + CONFIG.NUM_READ_THREADS {4} \ + CONFIG.NUM_WRITE_OUTSTANDING {8} \ + CONFIG.NUM_WRITE_THREADS {4} \ + CONFIG.PROTOCOL {AXI4} \ + CONFIG.READ_WRITE_MODE {READ_WRITE} \ + CONFIG.RUSER_BITS_PER_BYTE {0} \ + CONFIG.RUSER_WIDTH {0} \ + CONFIG.SUPPORTS_NARROW_BURST {0} \ + CONFIG.WUSER_BITS_PER_BYTE {0} \ + CONFIG.WUSER_WIDTH {0} \ + ] $s_axi_hp_dma1 + + set s_axi_hp_dma2 [ create_bd_intf_port -mode Slave -vlnv xilinx.com:interface:aximm_rtl:1.0 s_axi_hp_dma2 ] + set_property -dict [ list \ + CONFIG.ADDR_WIDTH {49} \ + CONFIG.ARUSER_WIDTH {0} \ + CONFIG.AWUSER_WIDTH {0} \ + CONFIG.BUSER_WIDTH {0} \ + CONFIG.CLK_DOMAIN {axi_interconnect_dma_bd_clk40} \ + CONFIG.DATA_WIDTH {128} \ + CONFIG.FREQ_HZ {40000000} \ + CONFIG.HAS_BRESP {1} \ + CONFIG.HAS_BURST {1} \ + CONFIG.HAS_CACHE {1} \ + CONFIG.HAS_LOCK {1} \ + CONFIG.HAS_PROT {1} \ + CONFIG.HAS_QOS {1} \ + CONFIG.HAS_REGION {0} \ + CONFIG.HAS_RRESP {1} \ + CONFIG.HAS_WSTRB {1} \ + CONFIG.ID_WIDTH {0} \ + CONFIG.MAX_BURST_LENGTH {16} \ + CONFIG.NUM_READ_OUTSTANDING {8} \ + CONFIG.NUM_READ_THREADS {4} \ + CONFIG.NUM_WRITE_OUTSTANDING {8} \ + CONFIG.NUM_WRITE_THREADS {4} \ + CONFIG.PROTOCOL {AXI4} \ + CONFIG.READ_WRITE_MODE {READ_WRITE} \ + CONFIG.RUSER_BITS_PER_BYTE {0} \ + CONFIG.RUSER_WIDTH {0} \ + CONFIG.SUPPORTS_NARROW_BURST {0} \ + CONFIG.WUSER_BITS_PER_BYTE {0} \ + CONFIG.WUSER_WIDTH {0} \ + ] $s_axi_hp_dma2 + + set s_axi_hp_dma3 [ create_bd_intf_port -mode Slave -vlnv xilinx.com:interface:aximm_rtl:1.0 s_axi_hp_dma3 ] + set_property -dict [ list \ + CONFIG.ADDR_WIDTH {49} \ + CONFIG.ARUSER_WIDTH {0} \ + CONFIG.AWUSER_WIDTH {0} \ + CONFIG.BUSER_WIDTH {0} \ + CONFIG.CLK_DOMAIN {axi_interconnect_dma_bd_clk40} \ + CONFIG.DATA_WIDTH {128} \ + CONFIG.FREQ_HZ {40000000} \ + CONFIG.HAS_BRESP {1} \ + CONFIG.HAS_BURST {1} \ + CONFIG.HAS_CACHE {1} \ + CONFIG.HAS_LOCK {1} \ + CONFIG.HAS_PROT {1} \ + CONFIG.HAS_QOS {1} \ + CONFIG.HAS_REGION {0} \ + CONFIG.HAS_RRESP {1} \ + CONFIG.HAS_WSTRB {1} \ + CONFIG.ID_WIDTH {0} \ + CONFIG.MAX_BURST_LENGTH {16} \ + CONFIG.NUM_READ_OUTSTANDING {8} \ + CONFIG.NUM_READ_THREADS {4} \ + CONFIG.NUM_WRITE_OUTSTANDING {8} \ + CONFIG.NUM_WRITE_THREADS {4} \ + CONFIG.PROTOCOL {AXI4} \ + CONFIG.READ_WRITE_MODE {READ_WRITE} \ + CONFIG.RUSER_BITS_PER_BYTE {0} \ + CONFIG.RUSER_WIDTH {0} \ + CONFIG.SUPPORTS_NARROW_BURST {0} \ + CONFIG.WUSER_BITS_PER_BYTE {0} \ + CONFIG.WUSER_WIDTH {0} \ + ] $s_axi_hp_dma3 + + + # Create ports + set clk40 [ create_bd_port -dir I -type clk clk40 ] + set_property -dict [ list \ + CONFIG.ASSOCIATED_BUSIF {s_axi_hp_dma0:s_axi_hp_dma1:s_axi_hp_dma2:s_axi_hp_dma3:m_axi_hp} \ + CONFIG.ASSOCIATED_RESET {clk40_rstn} \ + CONFIG.CLK_DOMAIN {axi_interconnect_dma_bd_clk40} \ + CONFIG.FREQ_HZ {40000000} \ + ] $clk40 + set clk40_rstn [ create_bd_port -dir I -type rst clk40_rstn ] + + # Create instance: axi_interconnect_0, and set properties + set axi_interconnect_0 [ create_bd_cell -type ip -vlnv xilinx.com:ip:axi_interconnect:2.1 axi_interconnect_0 ] + set_property -dict [ list \ + CONFIG.ENABLE_ADVANCED_OPTIONS {1} \ + CONFIG.M00_HAS_DATA_FIFO {1} \ + CONFIG.M00_HAS_REGSLICE {4} \ + CONFIG.NUM_MI {1} \ + CONFIG.NUM_SI {4} \ + CONFIG.S00_HAS_DATA_FIFO {1} \ + CONFIG.S00_HAS_REGSLICE {4} \ + CONFIG.S01_ARB_PRIORITY {0} \ + CONFIG.S01_HAS_DATA_FIFO {1} \ + CONFIG.S01_HAS_REGSLICE {4} \ + CONFIG.S02_ARB_PRIORITY {0} \ + CONFIG.S02_HAS_DATA_FIFO {1} \ + CONFIG.S02_HAS_REGSLICE {4} \ + CONFIG.S03_ARB_PRIORITY {0} \ + CONFIG.S03_HAS_DATA_FIFO {1} \ + CONFIG.S03_HAS_REGSLICE {4} \ + CONFIG.STRATEGY {1} \ + ] $axi_interconnect_0 + + # Create interface connections + connect_bd_intf_net -intf_net S00_AXI_1 [get_bd_intf_ports s_axi_hp_dma0] [get_bd_intf_pins axi_interconnect_0/S00_AXI] + connect_bd_intf_net -intf_net axi_interconnect_0_M00_AXI [get_bd_intf_ports m_axi_hp] [get_bd_intf_pins axi_interconnect_0/M00_AXI] + connect_bd_intf_net -intf_net s_axi_eth1_1 [get_bd_intf_ports s_axi_hp_dma1] [get_bd_intf_pins axi_interconnect_0/S01_AXI] + connect_bd_intf_net -intf_net s_axi_eth2_1 [get_bd_intf_ports s_axi_hp_dma2] [get_bd_intf_pins axi_interconnect_0/S02_AXI] + connect_bd_intf_net -intf_net s_axi_eth3_1 [get_bd_intf_ports s_axi_hp_dma3] [get_bd_intf_pins axi_interconnect_0/S03_AXI] + + # Create port connections + connect_bd_net -net clk40_1 [get_bd_ports clk40] [get_bd_pins axi_interconnect_0/ACLK] [get_bd_pins axi_interconnect_0/M00_ACLK] [get_bd_pins axi_interconnect_0/S00_ACLK] [get_bd_pins axi_interconnect_0/S01_ACLK] [get_bd_pins axi_interconnect_0/S02_ACLK] [get_bd_pins axi_interconnect_0/S03_ACLK] + connect_bd_net -net clk40_rstn_1 [get_bd_ports clk40_rstn] [get_bd_pins axi_interconnect_0/ARESETN] [get_bd_pins axi_interconnect_0/M00_ARESETN] [get_bd_pins axi_interconnect_0/S00_ARESETN] [get_bd_pins axi_interconnect_0/S01_ARESETN] [get_bd_pins axi_interconnect_0/S02_ARESETN] [get_bd_pins axi_interconnect_0/S03_ARESETN] + + # Create address segments + create_bd_addr_seg -range 0x0002000000000000 -offset 0x00000000 [get_bd_addr_spaces s_axi_hp_dma0] [get_bd_addr_segs m_axi_hp/Reg] SEG_m_axi_hp_Reg + create_bd_addr_seg -range 0x0002000000000000 -offset 0x00000000 [get_bd_addr_spaces s_axi_hp_dma1] [get_bd_addr_segs m_axi_hp/Reg] SEG_m_axi_hp_Reg + create_bd_addr_seg -range 0x0002000000000000 -offset 0x00000000 [get_bd_addr_spaces s_axi_hp_dma2] [get_bd_addr_segs m_axi_hp/Reg] SEG_m_axi_hp_Reg + create_bd_addr_seg -range 0x0002000000000000 -offset 0x00000000 [get_bd_addr_spaces s_axi_hp_dma3] [get_bd_addr_segs m_axi_hp/Reg] SEG_m_axi_hp_Reg + + + # Restore current instance + current_bd_instance $oldCurInst + + validate_bd_design + save_bd_design +} +# End of create_root_design() + + +################################################################## +# MAIN FLOW +################################################################## + +create_root_design "" + + diff --git a/fpga/usrp3/top/x400/ip/axi_interconnect_eth_bd/Makefile.inc b/fpga/usrp3/top/x400/ip/axi_interconnect_eth_bd/Makefile.inc new file mode 100644 index 000000000..f21a366f0 --- /dev/null +++ b/fpga/usrp3/top/x400/ip/axi_interconnect_eth_bd/Makefile.inc @@ -0,0 +1,41 @@ +# +# Copyright 2021 Ettus Research, a National Instruments Brand +# +# SPDX-License-Identifier: LGPL-3.0-or-later +# + +include $(TOOLS_DIR)/make/viv_ip_builder.mak + +IP_AXI_INTERCONNECT_ETH_HDL_SRCS = $(addprefix $(IP_DIR)/axi_interconnect_eth_bd/, \ +axi_interconnect_eth.sv \ +) + +IP_AXI_INTERCONNECT_ETH_HDL_SIM_SRCS = $(wildcard $(addprefix $(IP_BUILD_DIR)/axi_interconnect_eth_bd/axi_interconnect_eth_bd/, \ +sim/axi_interconnect_eth_bd.v\ +ip/axi_interconnect_eth_bd_xbar_0/sim/axi_interconnect_eth_bd_xbar_0.v\ +ipshared/*/simulation/fifo_generator_vlog_beh.v\ +ipshared/*/hdl/*.v\ +)) + +IP_AXI_INTERCONNECT_ETH_ORIG_SRCS = $(addprefix $(IP_DIR)/axi_interconnect_eth_bd/, \ +axi_interconnect_eth_bd.tcl \ +) + +IP_AXI_INTERCONNECT_ETH_BDTCL_SRCS = $(addprefix $(IP_BUILD_DIR)/axi_interconnect_eth_bd/, \ +axi_interconnect_eth_bd.tcl \ +) + +IP_AXI_INTERCONNECT_ETH_BD_SRCS = $(addprefix $(IP_BUILD_DIR)/axi_interconnect_eth_bd/, \ +axi_interconnect_eth_bd/axi_interconnect_eth_bd.bd \ +) + +BD_AXI_INTERCONNECT_ETH_BD_OUTS = $(addprefix $(IP_BUILD_DIR)/axi_interconnect_eth_bd/, \ +axi_interconnect_eth_bd.bd.out \ +axi_interconnect_eth_bd/synth/axi_interconnect_eth_bd.v \ +axi_interconnect_eth_bd/axi_interconnect_eth_bd_ooc.xdc \ +) + + + +$(IP_AXI_INTERCONNECT_ETH_BD_SRCS) $(BD_AXI_INTERCONNECT_ETH_BD_OUTS) $(IP_AXI_INTERCONNECT_ETH_BDTCL_SRCS): $(IP_AXI_INTERCONNECT_ETH_ORIG_SRCS) + $(call BUILD_VIVADO_BDTCL,axi_interconnect_eth_bd,$(ARCH),$(PART_ID),$(IP_DIR),$(IP_BUILD_DIR),$(LIB_DIR)/vivado_ipi) diff --git a/fpga/usrp3/top/x400/ip/axi_interconnect_eth_bd/axi_interconnect_eth.sv b/fpga/usrp3/top/x400/ip/axi_interconnect_eth_bd/axi_interconnect_eth.sv new file mode 100644 index 000000000..d74389c03 --- /dev/null +++ b/fpga/usrp3/top/x400/ip/axi_interconnect_eth_bd/axi_interconnect_eth.sv @@ -0,0 +1,98 @@ +// +// Copyright 2021 Ettus Research, A National Instruments Brand +// +// SPDX-License-Identifier: LGPL-3.0-or-later +// +// Module: axi_interconnect_eth +// +// Description: +// +// Wrapper for the Xilinx AXI Lite interconnect block +// + +module axi_interconnect_eth ( + // All interfaces on s_axi_eth.clk domain + AxiLiteIf.master m_axi_dma[3:0], // maps to CPU_DMA +0x00000-0x07FFF + AxiLiteIf.master m_axi_misc[3:0], // maps to nixge +0x08000-0x09FFF + // UIO +0x0A000-0x0BFFF + AxiLiteIf.master m_axi_mac[3:0], // maps to 100G Mac +0x0C000-0x0DFFF + + AxiLiteIf.slave s_axi_eth // incoming axi_net bus +); + + + // AxiLiteIf_v has no procedural assignments so it can be + // driven by a port. + `include "../../../../lib/axi4lite_sv/axi_lite.vh" + AxiLiteIf_v #(32,40) + m_axi_dma_v[3:0](.clk(s_axi_eth.clk),.rst(s_axi_eth.rst)); + AxiLiteIf_v #(32,40) + m_axi_misc_v[3:0](.clk(s_axi_eth.clk),.rst(s_axi_eth.rst)); + AxiLiteIf_v #(32,40) + m_axi_mac_v[3:0](.clk(s_axi_eth.clk),.rst(s_axi_eth.rst)); + AxiLiteIf_v #(32,40) + s_axi_eth_v(.clk(s_axi_eth.clk),.rst(s_axi_eth.rst)); + + // O = I;(O ,I ) + always_comb begin `AXI4LITE_ASSIGN(m_axi_dma[0],m_axi_dma_v[0]) end + always_comb begin `AXI4LITE_ASSIGN(m_axi_dma[1],m_axi_dma_v[1]) end + always_comb begin `AXI4LITE_ASSIGN(m_axi_dma[2],m_axi_dma_v[2]) end + always_comb begin `AXI4LITE_ASSIGN(m_axi_dma[3],m_axi_dma_v[3]) end + always_comb begin `AXI4LITE_ASSIGN(m_axi_misc[0],m_axi_misc_v[0]) end + always_comb begin `AXI4LITE_ASSIGN(m_axi_misc[1],m_axi_misc_v[1]) end + always_comb begin `AXI4LITE_ASSIGN(m_axi_misc[2],m_axi_misc_v[2]) end + always_comb begin `AXI4LITE_ASSIGN(m_axi_misc[3],m_axi_misc_v[3]) end + always_comb begin `AXI4LITE_ASSIGN(m_axi_mac[0],m_axi_mac_v[0]) end + always_comb begin `AXI4LITE_ASSIGN(m_axi_mac[1],m_axi_mac_v[1]) end + always_comb begin `AXI4LITE_ASSIGN(m_axi_mac[2],m_axi_mac_v[2]) end + always_comb begin `AXI4LITE_ASSIGN(m_axi_mac[3],m_axi_mac_v[3]) end + always_comb begin `AXI4LITE_ASSIGN(s_axi_eth_v,s_axi_eth) end + + axi_interconnect_eth_bd axi_interconnect_eth_bd_i + ( + `AXI4LITE_PORT_ASSIGN_NR(m_axi_dma0,m_axi_dma_v[0]) + .m_axi_dma0_arprot(), + .m_axi_dma0_awprot(), + `AXI4LITE_PORT_ASSIGN_NR(m_axi_dma1,m_axi_dma_v[1]) + .m_axi_dma1_arprot(), + .m_axi_dma1_awprot(), + `AXI4LITE_PORT_ASSIGN_NR(m_axi_dma2,m_axi_dma_v[2]) + .m_axi_dma2_arprot(), + .m_axi_dma2_awprot(), + `AXI4LITE_PORT_ASSIGN_NR(m_axi_dma3,m_axi_dma_v[3]) + .m_axi_dma3_arprot(), + .m_axi_dma3_awprot(), + + `AXI4LITE_PORT_ASSIGN_NR(m_axi_mac0,m_axi_mac_v[0]) + .m_axi_mac0_arprot(), + .m_axi_mac0_awprot(), + `AXI4LITE_PORT_ASSIGN_NR(m_axi_mac1,m_axi_mac_v[1]) + .m_axi_mac1_arprot(), + .m_axi_mac1_awprot(), + `AXI4LITE_PORT_ASSIGN_NR(m_axi_mac2,m_axi_mac_v[2]) + .m_axi_mac2_arprot(), + .m_axi_mac2_awprot(), + `AXI4LITE_PORT_ASSIGN_NR(m_axi_mac3,m_axi_mac_v[3]) + .m_axi_mac3_arprot(), + .m_axi_mac3_awprot(), + + `AXI4LITE_PORT_ASSIGN_NR(m_axi_misc0,m_axi_misc_v[0]) + .m_axi_misc0_arprot(), + .m_axi_misc0_awprot(), + `AXI4LITE_PORT_ASSIGN_NR(m_axi_misc1,m_axi_misc_v[1]) + .m_axi_misc1_arprot(), + .m_axi_misc1_awprot(), + `AXI4LITE_PORT_ASSIGN_NR(m_axi_misc2,m_axi_misc_v[2]) + .m_axi_misc2_arprot(), + .m_axi_misc2_awprot(), + `AXI4LITE_PORT_ASSIGN_NR(m_axi_misc3,m_axi_misc_v[3]) + .m_axi_misc3_arprot(), + .m_axi_misc3_awprot(), + + `AXI4LITE_PORT_ASSIGN_NR(s_axi_eth,s_axi_eth_v) + .s_axi_eth_arprot(3'b0), + .s_axi_eth_awprot(3'b0), + .clk40(s_axi_eth.clk), + .clk40_rstn(!s_axi_eth.rst)); + +endmodule diff --git a/fpga/usrp3/top/x400/ip/axi_interconnect_eth_bd/axi_interconnect_eth_bd.tcl b/fpga/usrp3/top/x400/ip/axi_interconnect_eth_bd/axi_interconnect_eth_bd.tcl new file mode 100644 index 000000000..2efa50bfd --- /dev/null +++ b/fpga/usrp3/top/x400/ip/axi_interconnect_eth_bd/axi_interconnect_eth_bd.tcl @@ -0,0 +1,462 @@ + +################################################################ +# This is a generated script based on design: axi_interconnect_eth_bd +# +# Though there are limitations about the generated script, +# the main purpose of this utility is to make learning +# IP Integrator Tcl commands easier. +################################################################ + +namespace eval _tcl { +proc get_script_folder {} { + set script_path [file normalize [info script]] + set script_folder [file dirname $script_path] + return $script_folder +} +} +variable script_folder +set script_folder [_tcl::get_script_folder] + +################################################################ +# Check if script is running in correct Vivado version. +################################################################ +set scripts_vivado_version 2019.1 +set current_vivado_version [version -short] + +if { [string first $scripts_vivado_version $current_vivado_version] == -1 } { + puts "" + catch {common::send_msg_id "BD_TCL-109" "ERROR" "This script was generated using Vivado <$scripts_vivado_version> and is being run in <$current_vivado_version> of Vivado. Please run the script in Vivado <$scripts_vivado_version> then open the design in Vivado <$current_vivado_version>. Upgrade the design by running \"Tools => Report => Report IP Status...\", then run write_bd_tcl to create an updated script."} + + return 1 +} + +################################################################ +# START +################################################################ + +# To test this script, run the following commands from Vivado Tcl console: +# source axi_interconnect_eth_bd_script.tcl + +# If there is no project opened, this script will create a +# project, but make sure you do not have an existing project +# <./myproj/project_1.xpr> in the current working folder. + +set list_projs [get_projects -quiet] +if { $list_projs eq "" } { + create_project project_1 myproj -part xczu28dr-ffvg1517-1-e +} + + +# CHANGE DESIGN NAME HERE +variable design_name +set design_name axi_interconnect_eth_bd + +# If you do not already have an existing IP Integrator design open, +# you can create a design using the following command: +# create_bd_design $design_name + +# Creating design if needed +set errMsg "" +set nRet 0 + +set cur_design [current_bd_design -quiet] +set list_cells [get_bd_cells -quiet] + +if { ${design_name} eq "" } { + # USE CASES: + # 1) Design_name not set + + set errMsg "Please set the variable to a non-empty value." + set nRet 1 + +} elseif { ${cur_design} ne "" && ${list_cells} eq "" } { + # USE CASES: + # 2): Current design opened AND is empty AND names same. + # 3): Current design opened AND is empty AND names diff; design_name NOT in project. + # 4): Current design opened AND is empty AND names diff; design_name exists in project. + + if { $cur_design ne $design_name } { + common::send_msg_id "BD_TCL-001" "INFO" "Changing value of from <$design_name> to <$cur_design> since current design is empty." + set design_name [get_property NAME $cur_design] + } + common::send_msg_id "BD_TCL-002" "INFO" "Constructing design in IPI design <$cur_design>..." + +} elseif { ${cur_design} ne "" && $list_cells ne "" && $cur_design eq $design_name } { + # USE CASES: + # 5) Current design opened AND has components AND same names. + + set errMsg "Design <$design_name> already exists in your project, please set the variable to another value." + set nRet 1 +} elseif { [get_files -quiet ${design_name}.bd] ne "" } { + # USE CASES: + # 6) Current opened design, has components, but diff names, design_name exists in project. + # 7) No opened design, design_name exists in project. + + set errMsg "Design <$design_name> already exists in your project, please set the variable to another value." + set nRet 2 + +} else { + # USE CASES: + # 8) No opened design, design_name not in project. + # 9) Current opened design, has components, but diff names, design_name not in project. + + common::send_msg_id "BD_TCL-003" "INFO" "Currently there is no design <$design_name> in project, so creating one..." + + create_bd_design $design_name + + common::send_msg_id "BD_TCL-004" "INFO" "Making design <$design_name> as current_bd_design." + current_bd_design $design_name + +} + +common::send_msg_id "BD_TCL-005" "INFO" "Currently the variable is equal to \"$design_name\"." + +if { $nRet != 0 } { + catch {common::send_msg_id "BD_TCL-114" "ERROR" $errMsg} + return $nRet +} + +set bCheckIPsPassed 1 +################################################################## +# CHECK IPs +################################################################## +set bCheckIPs 1 +if { $bCheckIPs == 1 } { + set list_check_ips "\ +" + + set list_ips_missing "" + common::send_msg_id "BD_TCL-006" "INFO" "Checking if the following IPs exist in the project's IP catalog: $list_check_ips ." + + foreach ip_vlnv $list_check_ips { + set ip_obj [get_ipdefs -all $ip_vlnv] + if { $ip_obj eq "" } { + lappend list_ips_missing $ip_vlnv + } + } + + if { $list_ips_missing ne "" } { + catch {common::send_msg_id "BD_TCL-115" "ERROR" "The following IPs are not found in the IP Catalog:\n $list_ips_missing\n\nResolution: Please add the repository containing the IP(s) to the project." } + set bCheckIPsPassed 0 + } + +} + +if { $bCheckIPsPassed != 1 } { + common::send_msg_id "BD_TCL-1003" "WARNING" "Will not continue with creation of design due to the error(s) above." + return 3 +} + +################################################################## +# DESIGN PROCs +################################################################## + + + +# Procedure to create entire design; Provide argument to make +# procedure reusable. If parentCell is "", will use root. +proc create_root_design { parentCell } { + + variable script_folder + variable design_name + + if { $parentCell eq "" } { + set parentCell [get_bd_cells /] + } + + # Get object for parentCell + set parentObj [get_bd_cells $parentCell] + if { $parentObj == "" } { + catch {common::send_msg_id "BD_TCL-100" "ERROR" "Unable to find parent cell <$parentCell>!"} + return + } + + # Make sure parentObj is hier blk + set parentType [get_property TYPE $parentObj] + if { $parentType ne "hier" } { + catch {common::send_msg_id "BD_TCL-101" "ERROR" "Parent <$parentObj> has TYPE = <$parentType>. Expected to be ."} + return + } + + # Save current instance; Restore later + set oldCurInst [current_bd_instance .] + + # Set parent object as current + current_bd_instance $parentObj + + + # Create interface ports + set m_axi_dma0 [ create_bd_intf_port -mode Master -vlnv xilinx.com:interface:aximm_rtl:1.0 m_axi_dma0 ] + set_property -dict [ list \ + CONFIG.ADDR_WIDTH {40} \ + CONFIG.CLK_DOMAIN {axi_interconnect_eth_bd_clk40} \ + CONFIG.DATA_WIDTH {32} \ + CONFIG.FREQ_HZ {40000000} \ + CONFIG.HAS_BURST {0} \ + CONFIG.HAS_CACHE {0} \ + CONFIG.HAS_LOCK {0} \ + CONFIG.HAS_QOS {0} \ + CONFIG.HAS_REGION {0} \ + CONFIG.PROTOCOL {AXI4LITE} \ + ] $m_axi_dma0 + + set m_axi_dma1 [ create_bd_intf_port -mode Master -vlnv xilinx.com:interface:aximm_rtl:1.0 m_axi_dma1 ] + set_property -dict [ list \ + CONFIG.ADDR_WIDTH {40} \ + CONFIG.CLK_DOMAIN {axi_interconnect_eth_bd_clk40} \ + CONFIG.DATA_WIDTH {32} \ + CONFIG.FREQ_HZ {40000000} \ + CONFIG.HAS_BURST {0} \ + CONFIG.HAS_CACHE {0} \ + CONFIG.HAS_LOCK {0} \ + CONFIG.HAS_QOS {0} \ + CONFIG.HAS_REGION {0} \ + CONFIG.PROTOCOL {AXI4LITE} \ + ] $m_axi_dma1 + + set m_axi_dma2 [ create_bd_intf_port -mode Master -vlnv xilinx.com:interface:aximm_rtl:1.0 m_axi_dma2 ] + set_property -dict [ list \ + CONFIG.ADDR_WIDTH {40} \ + CONFIG.CLK_DOMAIN {axi_interconnect_eth_bd_clk40} \ + CONFIG.DATA_WIDTH {32} \ + CONFIG.FREQ_HZ {40000000} \ + CONFIG.HAS_BURST {0} \ + CONFIG.HAS_CACHE {0} \ + CONFIG.HAS_LOCK {0} \ + CONFIG.HAS_QOS {0} \ + CONFIG.HAS_REGION {0} \ + CONFIG.PROTOCOL {AXI4LITE} \ + ] $m_axi_dma2 + + set m_axi_dma3 [ create_bd_intf_port -mode Master -vlnv xilinx.com:interface:aximm_rtl:1.0 m_axi_dma3 ] + set_property -dict [ list \ + CONFIG.ADDR_WIDTH {40} \ + CONFIG.CLK_DOMAIN {axi_interconnect_eth_bd_clk40} \ + CONFIG.DATA_WIDTH {32} \ + CONFIG.FREQ_HZ {40000000} \ + CONFIG.HAS_BURST {0} \ + CONFIG.HAS_CACHE {0} \ + CONFIG.HAS_LOCK {0} \ + CONFIG.HAS_QOS {0} \ + CONFIG.HAS_REGION {0} \ + CONFIG.PROTOCOL {AXI4LITE} \ + ] $m_axi_dma3 + + set m_axi_mac0 [ create_bd_intf_port -mode Master -vlnv xilinx.com:interface:aximm_rtl:1.0 m_axi_mac0 ] + set_property -dict [ list \ + CONFIG.ADDR_WIDTH {40} \ + CONFIG.CLK_DOMAIN {axi_interconnect_eth_bd_clk40} \ + CONFIG.DATA_WIDTH {32} \ + CONFIG.FREQ_HZ {40000000} \ + CONFIG.HAS_BURST {0} \ + CONFIG.HAS_CACHE {0} \ + CONFIG.HAS_LOCK {0} \ + CONFIG.HAS_PROT {0} \ + CONFIG.HAS_QOS {0} \ + CONFIG.HAS_REGION {0} \ + CONFIG.NUM_READ_OUTSTANDING {2} \ + CONFIG.NUM_WRITE_OUTSTANDING {2} \ + CONFIG.PROTOCOL {AXI4LITE} \ + ] $m_axi_mac0 + + set m_axi_mac1 [ create_bd_intf_port -mode Master -vlnv xilinx.com:interface:aximm_rtl:1.0 m_axi_mac1 ] + set_property -dict [ list \ + CONFIG.ADDR_WIDTH {40} \ + CONFIG.CLK_DOMAIN {axi_interconnect_eth_bd_clk40} \ + CONFIG.DATA_WIDTH {32} \ + CONFIG.FREQ_HZ {40000000} \ + CONFIG.HAS_BURST {0} \ + CONFIG.HAS_CACHE {0} \ + CONFIG.HAS_LOCK {0} \ + CONFIG.HAS_QOS {0} \ + CONFIG.HAS_REGION {0} \ + CONFIG.PROTOCOL {AXI4LITE} \ + ] $m_axi_mac1 + + set m_axi_mac2 [ create_bd_intf_port -mode Master -vlnv xilinx.com:interface:aximm_rtl:1.0 m_axi_mac2 ] + set_property -dict [ list \ + CONFIG.ADDR_WIDTH {40} \ + CONFIG.CLK_DOMAIN {axi_interconnect_eth_bd_clk40} \ + CONFIG.DATA_WIDTH {32} \ + CONFIG.FREQ_HZ {40000000} \ + CONFIG.HAS_BURST {0} \ + CONFIG.HAS_CACHE {0} \ + CONFIG.HAS_LOCK {0} \ + CONFIG.HAS_QOS {0} \ + CONFIG.HAS_REGION {0} \ + CONFIG.PROTOCOL {AXI4LITE} \ + ] $m_axi_mac2 + + set m_axi_mac3 [ create_bd_intf_port -mode Master -vlnv xilinx.com:interface:aximm_rtl:1.0 m_axi_mac3 ] + set_property -dict [ list \ + CONFIG.ADDR_WIDTH {40} \ + CONFIG.CLK_DOMAIN {axi_interconnect_eth_bd_clk40} \ + CONFIG.DATA_WIDTH {32} \ + CONFIG.FREQ_HZ {40000000} \ + CONFIG.HAS_BURST {0} \ + CONFIG.HAS_CACHE {0} \ + CONFIG.HAS_LOCK {0} \ + CONFIG.HAS_QOS {0} \ + CONFIG.HAS_REGION {0} \ + CONFIG.PROTOCOL {AXI4LITE} \ + ] $m_axi_mac3 + + set m_axi_misc0 [ create_bd_intf_port -mode Master -vlnv xilinx.com:interface:aximm_rtl:1.0 m_axi_misc0 ] + set_property -dict [ list \ + CONFIG.ADDR_WIDTH {40} \ + CONFIG.CLK_DOMAIN {axi_interconnect_eth_bd_clk40} \ + CONFIG.DATA_WIDTH {32} \ + CONFIG.FREQ_HZ {40000000} \ + CONFIG.HAS_BURST {0} \ + CONFIG.HAS_CACHE {0} \ + CONFIG.HAS_LOCK {0} \ + CONFIG.HAS_PROT {0} \ + CONFIG.HAS_QOS {0} \ + CONFIG.HAS_REGION {0} \ + CONFIG.NUM_READ_OUTSTANDING {2} \ + CONFIG.NUM_WRITE_OUTSTANDING {2} \ + CONFIG.PROTOCOL {AXI4LITE} \ + ] $m_axi_misc0 + + set m_axi_misc1 [ create_bd_intf_port -mode Master -vlnv xilinx.com:interface:aximm_rtl:1.0 m_axi_misc1 ] + set_property -dict [ list \ + CONFIG.ADDR_WIDTH {40} \ + CONFIG.CLK_DOMAIN {axi_interconnect_eth_bd_clk40} \ + CONFIG.DATA_WIDTH {32} \ + CONFIG.FREQ_HZ {40000000} \ + CONFIG.HAS_BURST {0} \ + CONFIG.HAS_CACHE {0} \ + CONFIG.HAS_LOCK {0} \ + CONFIG.HAS_QOS {0} \ + CONFIG.HAS_REGION {0} \ + CONFIG.PROTOCOL {AXI4LITE} \ + ] $m_axi_misc1 + + set m_axi_misc2 [ create_bd_intf_port -mode Master -vlnv xilinx.com:interface:aximm_rtl:1.0 m_axi_misc2 ] + set_property -dict [ list \ + CONFIG.ADDR_WIDTH {40} \ + CONFIG.CLK_DOMAIN {axi_interconnect_eth_bd_clk40} \ + CONFIG.DATA_WIDTH {32} \ + CONFIG.FREQ_HZ {40000000} \ + CONFIG.HAS_BURST {0} \ + CONFIG.HAS_CACHE {0} \ + CONFIG.HAS_LOCK {0} \ + CONFIG.HAS_QOS {0} \ + CONFIG.HAS_REGION {0} \ + CONFIG.PROTOCOL {AXI4LITE} \ + ] $m_axi_misc2 + + set m_axi_misc3 [ create_bd_intf_port -mode Master -vlnv xilinx.com:interface:aximm_rtl:1.0 m_axi_misc3 ] + set_property -dict [ list \ + CONFIG.ADDR_WIDTH {40} \ + CONFIG.CLK_DOMAIN {axi_interconnect_eth_bd_clk40} \ + CONFIG.DATA_WIDTH {32} \ + CONFIG.FREQ_HZ {40000000} \ + CONFIG.HAS_BURST {0} \ + CONFIG.HAS_CACHE {0} \ + CONFIG.HAS_LOCK {0} \ + CONFIG.HAS_QOS {0} \ + CONFIG.HAS_REGION {0} \ + CONFIG.PROTOCOL {AXI4LITE} \ + ] $m_axi_misc3 + + set s_axi_eth [ create_bd_intf_port -mode Slave -vlnv xilinx.com:interface:aximm_rtl:1.0 s_axi_eth ] + set_property -dict [ list \ + CONFIG.ADDR_WIDTH {40} \ + CONFIG.ARUSER_WIDTH {0} \ + CONFIG.AWUSER_WIDTH {0} \ + CONFIG.BUSER_WIDTH {0} \ + CONFIG.CLK_DOMAIN {axi_interconnect_eth_bd_clk40} \ + CONFIG.DATA_WIDTH {32} \ + CONFIG.FREQ_HZ {40000000} \ + CONFIG.HAS_BRESP {1} \ + CONFIG.HAS_BURST {0} \ + CONFIG.HAS_CACHE {0} \ + CONFIG.HAS_LOCK {0} \ + CONFIG.HAS_PROT {1} \ + CONFIG.HAS_QOS {0} \ + CONFIG.HAS_REGION {0} \ + CONFIG.HAS_RRESP {1} \ + CONFIG.HAS_WSTRB {1} \ + CONFIG.ID_WIDTH {0} \ + CONFIG.MAX_BURST_LENGTH {1} \ + CONFIG.NUM_READ_OUTSTANDING {8} \ + CONFIG.NUM_READ_THREADS {4} \ + CONFIG.NUM_WRITE_OUTSTANDING {8} \ + CONFIG.NUM_WRITE_THREADS {4} \ + CONFIG.PROTOCOL {AXI4LITE} \ + CONFIG.READ_WRITE_MODE {READ_WRITE} \ + CONFIG.RUSER_BITS_PER_BYTE {0} \ + CONFIG.RUSER_WIDTH {0} \ + CONFIG.SUPPORTS_NARROW_BURST {0} \ + CONFIG.WUSER_BITS_PER_BYTE {0} \ + CONFIG.WUSER_WIDTH {0} \ + ] $s_axi_eth + + + # Create ports + set clk40 [ create_bd_port -dir I -type clk clk40 ] + set_property -dict [ list \ + CONFIG.ASSOCIATED_BUSIF {m_axi_misc0:m_axi_mac0:s_axi_eth:m_axi_misc3:m_axi_mac3:m_axi_dma1:m_axi_misc1:m_axi_mac2:m_axi_dma2:m_axi_mac1:m_axi_misc2:m_axi_dma0:m_axi_dma3} \ + CONFIG.ASSOCIATED_RESET {clk40_rstn} \ + CONFIG.CLK_DOMAIN {axi_interconnect_eth_bd_clk40} \ + CONFIG.FREQ_HZ {40000000} \ + ] $clk40 + set clk40_rstn [ create_bd_port -dir I -type rst clk40_rstn ] + + # Create instance: axi_interconnect_0, and set properties + set axi_interconnect_0 [ create_bd_cell -type ip -vlnv xilinx.com:ip:axi_interconnect:2.1 axi_interconnect_0 ] + set_property -dict [ list \ + CONFIG.NUM_MI {12} \ + ] $axi_interconnect_0 + + # Create interface connections + connect_bd_intf_net -intf_net S00_AXI_1 [get_bd_intf_ports s_axi_eth] [get_bd_intf_pins axi_interconnect_0/S00_AXI] + connect_bd_intf_net -intf_net axi_interconnect_0_M00_AXI [get_bd_intf_ports m_axi_misc0] [get_bd_intf_pins axi_interconnect_0/M00_AXI] + connect_bd_intf_net -intf_net axi_interconnect_0_M01_AXI [get_bd_intf_ports m_axi_mac0] [get_bd_intf_pins axi_interconnect_0/M01_AXI] + connect_bd_intf_net -intf_net axi_interconnect_0_M02_AXI [get_bd_intf_ports m_axi_dma0] [get_bd_intf_pins axi_interconnect_0/M02_AXI] + connect_bd_intf_net -intf_net axi_interconnect_0_M03_AXI [get_bd_intf_ports m_axi_misc1] [get_bd_intf_pins axi_interconnect_0/M03_AXI] + connect_bd_intf_net -intf_net axi_interconnect_0_M04_AXI [get_bd_intf_ports m_axi_mac1] [get_bd_intf_pins axi_interconnect_0/M04_AXI] + connect_bd_intf_net -intf_net axi_interconnect_0_M05_AXI [get_bd_intf_ports m_axi_dma1] [get_bd_intf_pins axi_interconnect_0/M05_AXI] + connect_bd_intf_net -intf_net axi_interconnect_0_M06_AXI [get_bd_intf_ports m_axi_misc2] [get_bd_intf_pins axi_interconnect_0/M06_AXI] + connect_bd_intf_net -intf_net axi_interconnect_0_M07_AXI [get_bd_intf_ports m_axi_mac2] [get_bd_intf_pins axi_interconnect_0/M07_AXI] + connect_bd_intf_net -intf_net axi_interconnect_0_M08_AXI [get_bd_intf_ports m_axi_dma2] [get_bd_intf_pins axi_interconnect_0/M08_AXI] + connect_bd_intf_net -intf_net axi_interconnect_0_M09_AXI [get_bd_intf_ports m_axi_misc3] [get_bd_intf_pins axi_interconnect_0/M09_AXI] + connect_bd_intf_net -intf_net axi_interconnect_0_M10_AXI [get_bd_intf_ports m_axi_mac3] [get_bd_intf_pins axi_interconnect_0/M10_AXI] + connect_bd_intf_net -intf_net axi_interconnect_0_M11_AXI [get_bd_intf_ports m_axi_dma3] [get_bd_intf_pins axi_interconnect_0/M11_AXI] + + # Create port connections + connect_bd_net -net clk40_1 [get_bd_ports clk40] [get_bd_pins axi_interconnect_0/ACLK] [get_bd_pins axi_interconnect_0/M00_ACLK] [get_bd_pins axi_interconnect_0/M01_ACLK] [get_bd_pins axi_interconnect_0/M02_ACLK] [get_bd_pins axi_interconnect_0/M03_ACLK] [get_bd_pins axi_interconnect_0/M04_ACLK] [get_bd_pins axi_interconnect_0/M05_ACLK] [get_bd_pins axi_interconnect_0/M06_ACLK] [get_bd_pins axi_interconnect_0/M07_ACLK] [get_bd_pins axi_interconnect_0/M08_ACLK] [get_bd_pins axi_interconnect_0/M09_ACLK] [get_bd_pins axi_interconnect_0/M10_ACLK] [get_bd_pins axi_interconnect_0/M11_ACLK] [get_bd_pins axi_interconnect_0/S00_ACLK] + connect_bd_net -net clk40_rstn_1 [get_bd_ports clk40_rstn] [get_bd_pins axi_interconnect_0/ARESETN] [get_bd_pins axi_interconnect_0/M00_ARESETN] [get_bd_pins axi_interconnect_0/M01_ARESETN] [get_bd_pins axi_interconnect_0/M02_ARESETN] [get_bd_pins axi_interconnect_0/M03_ARESETN] [get_bd_pins axi_interconnect_0/M04_ARESETN] [get_bd_pins axi_interconnect_0/M05_ARESETN] [get_bd_pins axi_interconnect_0/M06_ARESETN] [get_bd_pins axi_interconnect_0/M07_ARESETN] [get_bd_pins axi_interconnect_0/M08_ARESETN] [get_bd_pins axi_interconnect_0/M09_ARESETN] [get_bd_pins axi_interconnect_0/M10_ARESETN] [get_bd_pins axi_interconnect_0/M11_ARESETN] [get_bd_pins axi_interconnect_0/S00_ARESETN] + + # Create address segments + create_bd_addr_seg -range 0x00008000 -offset 0x00000000 [get_bd_addr_spaces s_axi_eth] [get_bd_addr_segs m_axi_dma0/Reg] SEG_m_axi_dma0_Reg + create_bd_addr_seg -range 0x00008000 -offset 0x00010000 [get_bd_addr_spaces s_axi_eth] [get_bd_addr_segs m_axi_dma1/Reg] SEG_m_axi_dma1_Reg + create_bd_addr_seg -range 0x00008000 -offset 0x00020000 [get_bd_addr_spaces s_axi_eth] [get_bd_addr_segs m_axi_dma2/Reg] SEG_m_axi_dma2_Reg + create_bd_addr_seg -range 0x00008000 -offset 0x00030000 [get_bd_addr_spaces s_axi_eth] [get_bd_addr_segs m_axi_dma3/Reg] SEG_m_axi_dma3_Reg + create_bd_addr_seg -range 0x00002000 -offset 0x0000C000 [get_bd_addr_spaces s_axi_eth] [get_bd_addr_segs m_axi_mac0/Reg] SEG_m_axi_mac0_Reg + create_bd_addr_seg -range 0x00002000 -offset 0x0001C000 [get_bd_addr_spaces s_axi_eth] [get_bd_addr_segs m_axi_mac1/Reg] SEG_m_axi_mac1_Reg + create_bd_addr_seg -range 0x00002000 -offset 0x0002C000 [get_bd_addr_spaces s_axi_eth] [get_bd_addr_segs m_axi_mac2/Reg] SEG_m_axi_mac2_Reg + create_bd_addr_seg -range 0x00002000 -offset 0x0003C000 [get_bd_addr_spaces s_axi_eth] [get_bd_addr_segs m_axi_mac3/Reg] SEG_m_axi_mac3_Reg + create_bd_addr_seg -range 0x00004000 -offset 0x00008000 [get_bd_addr_spaces s_axi_eth] [get_bd_addr_segs m_axi_misc0/Reg] SEG_m_axi_misc0_Reg + create_bd_addr_seg -range 0x00004000 -offset 0x00018000 [get_bd_addr_spaces s_axi_eth] [get_bd_addr_segs m_axi_misc1/Reg] SEG_m_axi_misc1_Reg + create_bd_addr_seg -range 0x00004000 -offset 0x00028000 [get_bd_addr_spaces s_axi_eth] [get_bd_addr_segs m_axi_misc2/Reg] SEG_m_axi_misc2_Reg + create_bd_addr_seg -range 0x00004000 -offset 0x00038000 [get_bd_addr_spaces s_axi_eth] [get_bd_addr_segs m_axi_misc3/Reg] SEG_m_axi_misc3_Reg + + + # Restore current instance + current_bd_instance $oldCurInst + + validate_bd_design + save_bd_design +} +# End of create_root_design() + + +################################################################## +# MAIN FLOW +################################################################## + +create_root_design "" + + diff --git a/fpga/usrp3/top/x400/ip/dac_100m_bd/.gitignore b/fpga/usrp3/top/x400/ip/dac_100m_bd/.gitignore new file mode 100644 index 000000000..49f7d3710 --- /dev/null +++ b/fpga/usrp3/top/x400/ip/dac_100m_bd/.gitignore @@ -0,0 +1 @@ +synthstub/ diff --git a/fpga/usrp3/top/x400/ip/dac_100m_bd/Makefile.inc b/fpga/usrp3/top/x400/ip/dac_100m_bd/Makefile.inc new file mode 100644 index 000000000..c107580be --- /dev/null +++ b/fpga/usrp3/top/x400/ip/dac_100m_bd/Makefile.inc @@ -0,0 +1,36 @@ +# +# Copyright 2021 Ettus Research, a National Instruments Brand +# +# SPDX-License-Identifier: LGPL-3.0-or-later +# + +include $(TOOLS_DIR)/make/viv_ip_builder.mak + +IP_DAC_100M_ORIG_SRCS = $(addprefix $(IP_DIR)/dac_100m_bd/, \ +dac_100m_bd.tcl \ +) + +IP_DAC_100M_HDL_SRCS = $(addprefix $(BASE_DIR)/x400/rf/100m/, \ +duc_saturate.vhd \ +dac_1_3_clk_converter.vhd \ +dac_2_1_clk_converter.vhd \ +) + +IP_DAC_100M_BDTCL_SRCS = $(addprefix $(IP_BUILD_DIR)/dac_100m_bd/, \ +dac_100m_bd.tcl \ +) + +IP_DAC_100M_BD_SRCS = $(addprefix $(IP_BUILD_DIR)/dac_100m_bd/, \ +dac_100m_bd/dac_100m_bd.bd \ +) + +BD_DAC_100M_BD_OUTS = $(addprefix $(IP_BUILD_DIR)/dac_100m_bd/, \ +dac_100m_bd.bd.out \ +dac_100m_bd/dac_100m_bd_ooc.xdc \ +dac_100m_bd/synth/dac_100m_bd.v \ +) + +EMPTY_IP_SRCS = + +$(IP_DAC_100M_BD_SRCS) $(BD_DAC_100M_BD_OUTS) $(IP_DAC_100M_BDTCL_SRCS): $(IP_DAC_100M_ORIG_SRCS) + $(call BUILD_VIVADO_BDTCL,dac_100m_bd,$(ARCH),$(PART_ID),$(IP_DIR),$(IP_BUILD_DIR),$(EMPTY_IP_SRCS),$(IP_DAC_100M_HDL_SRCS),) diff --git a/fpga/usrp3/top/x400/ip/dac_100m_bd/dac_100m_bd.tcl b/fpga/usrp3/top/x400/ip/dac_100m_bd/dac_100m_bd.tcl new file mode 100644 index 000000000..fcc30e5c7 --- /dev/null +++ b/fpga/usrp3/top/x400/ip/dac_100m_bd/dac_100m_bd.tcl @@ -0,0 +1,389 @@ + +################################################################ +# This is a generated script based on design: dac_100m_bd +# +# Though there are limitations about the generated script, +# the main purpose of this utility is to make learning +# IP Integrator Tcl commands easier. +################################################################ + +namespace eval _tcl { +proc get_script_folder {} { + set script_path [file normalize [info script]] + set script_folder [file dirname $script_path] + return $script_folder +} +} +variable script_folder +set script_folder [_tcl::get_script_folder] + +################################################################ +# Check if script is running in correct Vivado version. +################################################################ +set scripts_vivado_version 2019.1 +set current_vivado_version [version -short] + +if { [string first $scripts_vivado_version $current_vivado_version] == -1 } { + puts "" + catch {common::send_msg_id "BD_TCL-109" "ERROR" "This script was generated using Vivado <$scripts_vivado_version> and is being run in <$current_vivado_version> of Vivado. Please run the script in Vivado <$scripts_vivado_version> then open the design in Vivado <$current_vivado_version>. Upgrade the design by running \"Tools => Report => Report IP Status...\", then run write_bd_tcl to create an updated script."} + + return 1 +} + +################################################################ +# START +################################################################ + +# To test this script, run the following commands from Vivado Tcl console: +# source dac_100m_bd_script.tcl + + +# The design that will be created by this Tcl script contains the following +# module references: +# dac_1_3_clk_converter, dac_2_1_clk_converter, duc_saturate + +# Please add the sources of those modules before sourcing this Tcl script. + +# If there is no project opened, this script will create a +# project, but make sure you do not have an existing project +# <./myproj/project_1.xpr> in the current working folder. + +set list_projs [get_projects -quiet] +if { $list_projs eq "" } { + create_project project_1 myproj -part xczu28dr-ffvg1517-1-e +} + + +# CHANGE DESIGN NAME HERE +variable design_name +set design_name dac_100m_bd + +# If you do not already have an existing IP Integrator design open, +# you can create a design using the following command: +# create_bd_design $design_name + +# Creating design if needed +set errMsg "" +set nRet 0 + +set cur_design [current_bd_design -quiet] +set list_cells [get_bd_cells -quiet] + +if { ${design_name} eq "" } { + # USE CASES: + # 1) Design_name not set + + set errMsg "Please set the variable to a non-empty value." + set nRet 1 + +} elseif { ${cur_design} ne "" && ${list_cells} eq "" } { + # USE CASES: + # 2): Current design opened AND is empty AND names same. + # 3): Current design opened AND is empty AND names diff; design_name NOT in project. + # 4): Current design opened AND is empty AND names diff; design_name exists in project. + + if { $cur_design ne $design_name } { + common::send_msg_id "BD_TCL-001" "INFO" "Changing value of from <$design_name> to <$cur_design> since current design is empty." + set design_name [get_property NAME $cur_design] + } + common::send_msg_id "BD_TCL-002" "INFO" "Constructing design in IPI design <$cur_design>..." + +} elseif { ${cur_design} ne "" && $list_cells ne "" && $cur_design eq $design_name } { + # USE CASES: + # 5) Current design opened AND has components AND same names. + + set errMsg "Design <$design_name> already exists in your project, please set the variable to another value." + set nRet 1 +} elseif { [get_files -quiet ${design_name}.bd] ne "" } { + # USE CASES: + # 6) Current opened design, has components, but diff names, design_name exists in project. + # 7) No opened design, design_name exists in project. + + set errMsg "Design <$design_name> already exists in your project, please set the variable to another value." + set nRet 2 + +} else { + # USE CASES: + # 8) No opened design, design_name not in project. + # 9) Current opened design, has components, but diff names, design_name not in project. + + common::send_msg_id "BD_TCL-003" "INFO" "Currently there is no design <$design_name> in project, so creating one..." + + create_bd_design $design_name + + common::send_msg_id "BD_TCL-004" "INFO" "Making design <$design_name> as current_bd_design." + current_bd_design $design_name + +} + +common::send_msg_id "BD_TCL-005" "INFO" "Currently the variable is equal to \"$design_name\"." + +if { $nRet != 0 } { + catch {common::send_msg_id "BD_TCL-114" "ERROR" $errMsg} + return $nRet +} + +set bCheckIPsPassed 1 +################################################################## +# CHECK IPs +################################################################## +set bCheckIPs 1 +if { $bCheckIPs == 1 } { + set list_check_ips "\ +xilinx.com:ip:xlconstant:1.1\ +xilinx.com:ip:fir_compiler:7.2\ +xilinx.com:ip:xlconcat:2.1\ +xilinx.com:ip:axis_register_slice:1.1\ +" + + set list_ips_missing "" + common::send_msg_id "BD_TCL-006" "INFO" "Checking if the following IPs exist in the project's IP catalog: $list_check_ips ." + + foreach ip_vlnv $list_check_ips { + set ip_obj [get_ipdefs -all $ip_vlnv] + if { $ip_obj eq "" } { + lappend list_ips_missing $ip_vlnv + } + } + + if { $list_ips_missing ne "" } { + catch {common::send_msg_id "BD_TCL-115" "ERROR" "The following IPs are not found in the IP Catalog:\n $list_ips_missing\n\nResolution: Please add the repository containing the IP(s) to the project." } + set bCheckIPsPassed 0 + } + +} + +################################################################## +# CHECK Modules +################################################################## +set bCheckModules 1 +if { $bCheckModules == 1 } { + set list_check_mods "\ +dac_1_3_clk_converter\ +dac_2_1_clk_converter\ +duc_saturate\ +" + + set list_mods_missing "" + common::send_msg_id "BD_TCL-006" "INFO" "Checking if the following modules exist in the project's sources: $list_check_mods ." + + foreach mod_vlnv $list_check_mods { + if { [can_resolve_reference $mod_vlnv] == 0 } { + lappend list_mods_missing $mod_vlnv + } + } + + if { $list_mods_missing ne "" } { + catch {common::send_msg_id "BD_TCL-115" "ERROR" "The following module(s) are not found in the project: $list_mods_missing" } + common::send_msg_id "BD_TCL-008" "INFO" "Please add source files for the missing module(s) above." + set bCheckIPsPassed 0 + } +} + +if { $bCheckIPsPassed != 1 } { + common::send_msg_id "BD_TCL-1003" "WARNING" "Will not continue with creation of design due to the error(s) above." + return 3 +} + +################################################################## +# DESIGN PROCs +################################################################## + + + +# Procedure to create entire design; Provide argument to make +# procedure reusable. If parentCell is "", will use root. +proc create_root_design { parentCell } { + + variable script_folder + variable design_name + + if { $parentCell eq "" } { + set parentCell [get_bd_cells /] + } + + # Get object for parentCell + set parentObj [get_bd_cells $parentCell] + if { $parentObj == "" } { + catch {common::send_msg_id "BD_TCL-100" "ERROR" "Unable to find parent cell <$parentCell>!"} + return + } + + # Make sure parentObj is hier blk + set parentType [get_property TYPE $parentObj] + if { $parentType ne "hier" } { + catch {common::send_msg_id "BD_TCL-101" "ERROR" "Parent <$parentObj> has TYPE = <$parentType>. Expected to be ."} + return + } + + # Save current instance; Restore later + set oldCurInst [current_bd_instance .] + + # Set parent object as current + current_bd_instance $parentObj + + + # Create interface ports + set dac_data_in [ create_bd_intf_port -mode Slave -vlnv xilinx.com:interface:axis_rtl:1.0 dac_data_in ] + set_property -dict [ list \ + CONFIG.FREQ_HZ {122880000} \ + CONFIG.HAS_TKEEP {0} \ + CONFIG.HAS_TLAST {0} \ + CONFIG.HAS_TREADY {1} \ + CONFIG.HAS_TSTRB {0} \ + CONFIG.LAYERED_METADATA {undef} \ + CONFIG.TDATA_NUM_BYTES {4} \ + CONFIG.TDEST_WIDTH {0} \ + CONFIG.TID_WIDTH {0} \ + CONFIG.TUSER_WIDTH {0} \ + ] $dac_data_in + + set dac_data_out [ create_bd_intf_port -mode Master -vlnv xilinx.com:interface:axis_rtl:1.0 dac_data_out ] + set_property -dict [ list \ + CONFIG.FREQ_HZ {184320000} \ + ] $dac_data_out + + + # Create ports + set dac_data_in_resetn_dclk [ create_bd_port -dir I -type rst dac_data_in_resetn_dclk ] + set dac_data_in_resetn_rclk [ create_bd_port -dir I -type rst dac_data_in_resetn_rclk ] + set dac_data_in_resetn_rclk2x [ create_bd_port -dir I -type rst dac_data_in_resetn_rclk2x ] + set data_clk [ create_bd_port -dir I -type clk data_clk ] + set_property -dict [ list \ + CONFIG.ASSOCIATED_BUSIF {dac_data_in} \ + CONFIG.ASSOCIATED_RESET {dac_data_in_resetn_dclk} \ + CONFIG.FREQ_HZ {122880000} \ + ] $data_clk + set rfdc_clk [ create_bd_port -dir I -type clk rfdc_clk ] + set_property -dict [ list \ + CONFIG.ASSOCIATED_BUSIF {dac_data_out} \ + CONFIG.ASSOCIATED_RESET {dac_data_in_resetn_rclk} \ + CONFIG.FREQ_HZ {184320000} \ + ] $rfdc_clk + set rfdc_clk_2x [ create_bd_port -dir I -type clk rfdc_clk_2x ] + set_property -dict [ list \ + CONFIG.ASSOCIATED_RESET {dac_data_in_resetn_rclk2x} \ + CONFIG.FREQ_HZ {368640000} \ + ] $rfdc_clk_2x + + # Create instance: constant_high, and set properties + set constant_high [ create_bd_cell -type ip -vlnv xilinx.com:ip:xlconstant:1.1 constant_high ] + + # Create instance: dac_1_3_clk_converter_0, and set properties + set block_name dac_1_3_clk_converter + set block_cell_name dac_1_3_clk_converter_0 + if { [catch {set dac_1_3_clk_converter_0 [create_bd_cell -type module -reference $block_name $block_cell_name] } errmsg] } { + catch {common::send_msg_id "BD_TCL-105" "ERROR" "Unable to add referenced block <$block_name>. Please add the files for ${block_name}'s definition into the project."} + return 1 + } elseif { $dac_1_3_clk_converter_0 eq "" } { + catch {common::send_msg_id "BD_TCL-106" "ERROR" "Unable to referenced block <$block_name>. Please add the files for ${block_name}'s definition into the project."} + return 1 + } + + # Create instance: dac_2_1_clk_converter_0, and set properties + set block_name dac_2_1_clk_converter + set block_cell_name dac_2_1_clk_converter_0 + if { [catch {set dac_2_1_clk_converter_0 [create_bd_cell -type module -reference $block_name $block_cell_name] } errmsg] } { + catch {common::send_msg_id "BD_TCL-105" "ERROR" "Unable to add referenced block <$block_name>. Please add the files for ${block_name}'s definition into the project."} + return 1 + } elseif { $dac_2_1_clk_converter_0 eq "" } { + catch {common::send_msg_id "BD_TCL-106" "ERROR" "Unable to referenced block <$block_name>. Please add the files for ${block_name}'s definition into the project."} + return 1 + } + + # Create instance: dac_interpolator, and set properties + set dac_interpolator [ create_bd_cell -type ip -vlnv xilinx.com:ip:fir_compiler:7.2 dac_interpolator ] + set_property -dict [ list \ + CONFIG.Clock_Frequency {368.64} \ + CONFIG.CoefficientVector {-7,0,24,37,0,-78,-107,0,189,244,0,-389,-484,0,723,873,0,-1245,-1473,0,2029,2364,0,-3177,-3668,0,4862,5592,0,-7418,-8579,0,11675,13820,0,-20461,-26115,0,53699,108144,131069,108144,53699,0,-26115,-20461,0,13820,11675,0,-8579,-7418,0,5592,4862,0,-3668,-3177,0,2364,2029,0,-1473,-1245,0,873,723,0,-484,-389,0,244,189,0,-107,-78,0,37,24,0,-7} \ + CONFIG.Coefficient_Fractional_Bits {0} \ + CONFIG.Coefficient_Sets {1} \ + CONFIG.Coefficient_Sign {Signed} \ + CONFIG.Coefficient_Structure {Symmetric} \ + CONFIG.Coefficient_Width {18} \ + CONFIG.ColumnConfig {14} \ + CONFIG.Data_Fractional_Bits {0} \ + CONFIG.Data_Width {16} \ + CONFIG.Decimation_Rate {1} \ + CONFIG.Filter_Architecture {Systolic_Multiply_Accumulate} \ + CONFIG.Filter_Type {Interpolation} \ + CONFIG.Has_ARESETn {true} \ + CONFIG.Interpolation_Rate {3} \ + CONFIG.M_DATA_Has_TREADY {false} \ + CONFIG.Number_Channels {1} \ + CONFIG.Number_Paths {2} \ + CONFIG.Output_Rounding_Mode {Convergent_Rounding_to_Even} \ + CONFIG.Output_Width {18} \ + CONFIG.Quantization {Integer_Coefficients} \ + CONFIG.RateSpecification {Frequency_Specification} \ + CONFIG.Reset_Data_Vector {false} \ + CONFIG.S_DATA_Has_FIFO {false} \ + CONFIG.Sample_Frequency {122.88} \ + CONFIG.Zero_Pack_Factor {1} \ + ] $dac_interpolator + + # Create instance: data_combiner, and set properties + set data_combiner [ create_bd_cell -type ip -vlnv xilinx.com:ip:xlconcat:2.1 data_combiner ] + set_property -dict [ list \ + CONFIG.IN0_WIDTH {32} \ + CONFIG.IN1_WIDTH {32} \ + ] $data_combiner + + # Create instance: duc_saturate, and set properties + set block_name duc_saturate + set block_cell_name duc_saturate + if { [catch {set duc_saturate [create_bd_cell -type module -reference $block_name $block_cell_name] } errmsg] } { + catch {common::send_msg_id "BD_TCL-105" "ERROR" "Unable to add referenced block <$block_name>. Please add the files for ${block_name}'s definition into the project."} + return 1 + } elseif { $duc_saturate eq "" } { + catch {common::send_msg_id "BD_TCL-106" "ERROR" "Unable to referenced block <$block_name>. Please add the files for ${block_name}'s definition into the project."} + return 1 + } + + # Create instance: registered_dac_data, and set properties + set registered_dac_data [ create_bd_cell -type ip -vlnv xilinx.com:ip:axis_register_slice:1.1 registered_dac_data ] + set_property -dict [ list \ + CONFIG.REG_CONFIG {1} \ + CONFIG.TDATA_NUM_BYTES {4} \ + ] $registered_dac_data + + # Create interface connections + connect_bd_intf_net -intf_net dac_1_3_clk_converter_0_m_axis [get_bd_intf_pins dac_1_3_clk_converter_0/m_axis] [get_bd_intf_pins dac_interpolator/S_AXIS_DATA] + connect_bd_intf_net -intf_net dac_2_1_clk_converter_0_m_axis [get_bd_intf_ports dac_data_out] [get_bd_intf_pins dac_2_1_clk_converter_0/m_axis] + connect_bd_intf_net -intf_net dac_data_in_1 [get_bd_intf_ports dac_data_in] [get_bd_intf_pins dac_1_3_clk_converter_0/s_axis] + + # Create port connections + connect_bd_net -net aclk_0_1 [get_bd_ports data_clk] [get_bd_pins dac_1_3_clk_converter_0/s_axis_aclk] + connect_bd_net -net aresetn_0_1 [get_bd_ports dac_data_in_resetn_dclk] [get_bd_pins dac_1_3_clk_converter_0/s_axis_aresetn] + connect_bd_net -net axis_register_slice_0_m_axis_tdata [get_bd_pins data_combiner/In0] [get_bd_pins registered_dac_data/m_axis_tdata] + connect_bd_net -net dac_data_in_resetn_rclk2x [get_bd_ports dac_data_in_resetn_rclk2x] [get_bd_pins dac_1_3_clk_converter_0/m_axis_aresetn] [get_bd_pins dac_2_1_clk_converter_0/s_axis_aresetn] [get_bd_pins dac_interpolator/aresetn] [get_bd_pins registered_dac_data/aresetn] + connect_bd_net -net dac_data_in_resetn_rclk_1 [get_bd_ports dac_data_in_resetn_rclk] [get_bd_pins dac_2_1_clk_converter_0/m_axis_aresetn] + connect_bd_net -net dac_interpolator_m_axis_data_tdata [get_bd_pins dac_interpolator/m_axis_data_tdata] [get_bd_pins duc_saturate/cDataIn] + connect_bd_net -net dac_interpolator_m_axis_data_tvalid [get_bd_pins dac_interpolator/m_axis_data_tvalid] [get_bd_pins duc_saturate/cDataValidIn] + connect_bd_net -net data_combiner_dout [get_bd_pins dac_2_1_clk_converter_0/s_axis_tdata] [get_bd_pins data_combiner/dout] + connect_bd_net -net ddc_saturate_0_cDataOut [get_bd_pins data_combiner/In1] [get_bd_pins duc_saturate/cDataOut] [get_bd_pins registered_dac_data/s_axis_tdata] + connect_bd_net -net duc_saturate_0_cDataValidOut [get_bd_pins duc_saturate/cDataValidOut] [get_bd_pins registered_dac_data/s_axis_tvalid] + connect_bd_net -net m_axis_aclk_0_1 [get_bd_ports rfdc_clk_2x] [get_bd_pins dac_1_3_clk_converter_0/m_axis_aclk] [get_bd_pins dac_2_1_clk_converter_0/s_axis_aclk] [get_bd_pins dac_interpolator/aclk] [get_bd_pins duc_saturate/Clk] [get_bd_pins registered_dac_data/aclk] + connect_bd_net -net registered_dac_data_m_axis_tvalid [get_bd_pins dac_2_1_clk_converter_0/s_axis_tvalid] [get_bd_pins registered_dac_data/m_axis_tvalid] + connect_bd_net -net rfdc_clk_1 [get_bd_ports rfdc_clk] [get_bd_pins dac_2_1_clk_converter_0/m_axis_aclk] + connect_bd_net -net xlconstant_0_dout [get_bd_pins constant_high/dout] [get_bd_pins registered_dac_data/m_axis_tready] + + # Create address segments + + + # Restore current instance + current_bd_instance $oldCurInst + + validate_bd_design + save_bd_design +} +# End of create_root_design() + + +################################################################## +# MAIN FLOW +################################################################## + +create_root_design "" + + diff --git a/fpga/usrp3/top/x400/ip/dac_100m_bd/hdl_sources.tcl b/fpga/usrp3/top/x400/ip/dac_100m_bd/hdl_sources.tcl new file mode 100644 index 000000000..c33ee9cd5 --- /dev/null +++ b/fpga/usrp3/top/x400/ip/dac_100m_bd/hdl_sources.tcl @@ -0,0 +1,6 @@ +set script_loc [file normalize [info script]] +set script_dir [file dirname $script_loc] + +read_vhdl -library work $script_dir/../../rf/100m/duc_saturate.vhd +read_vhdl -library work $script_dir/../../rf/100m/dac_1_3_clk_converter.vhd +read_vhdl -library work $script_dir/../../rf/100m/dac_2_1_clk_converter.vhd diff --git a/fpga/usrp3/top/x400/ip/dac_400m_bd/Makefile.inc b/fpga/usrp3/top/x400/ip/dac_400m_bd/Makefile.inc new file mode 100644 index 000000000..c55c67928 --- /dev/null +++ b/fpga/usrp3/top/x400/ip/dac_400m_bd/Makefile.inc @@ -0,0 +1,38 @@ +# +# Copyright 2021 Ettus Research, a National Instruments Brand +# +# SPDX-License-Identifier: LGPL-3.0-or-later +# + +include $(TOOLS_DIR)/make/viv_ip_builder.mak + +IP_DAC_400M_ORIG_SRCS = $(addprefix $(IP_DIR)/dac_400m_bd/, \ +dac_400m_bd.tcl \ +) + +IP_DAC_400M_HDL_SRCS = $(addprefix $(BASE_DIR)/x400/rf/400m/, \ +duc_400m_saturate.vhd \ +dac_gearbox_6x8.vhd \ +dac_gearbox_6x12.vhd \ +dac_gearbox_12x8.vhd \ +dac_gearbox_4x2.v \ +) + +IP_DAC_400M_BDTCL_SRCS = $(addprefix $(IP_BUILD_DIR)/dac_400m_bd/, \ +dac_400m_bd.tcl \ +) + +IP_DAC_400M_BD_SRCS = $(addprefix $(IP_BUILD_DIR)/dac_400m_bd/, \ +dac_400m_bd/dac_400m_bd.bd \ +) + +BD_DAC_400M_BD_OUTS = $(addprefix $(IP_BUILD_DIR)/dac_400m_bd/, \ +dac_400m_bd.bd.out \ +dac_400m_bd/dac_400m_bd_ooc.xdc \ +dac_400m_bd/synth/dac_400m_bd.v \ +) + +EMPTY_IP_SRCS = + +$(IP_DAC_400M_BD_SRCS) $(BD_DAC_400M_BD_OUTS) $(IP_DAC_400M_BDTCL_SRCS): $(IP_DAC_400M_ORIG_SRCS) + $(call BUILD_VIVADO_BDTCL,dac_400m_bd,$(ARCH),$(PART_ID),$(IP_DIR),$(IP_BUILD_DIR),$(EMPTY_IP_SRCS),$(IP_DAC_400M_HDL_SRCS),) diff --git a/fpga/usrp3/top/x400/ip/dac_400m_bd/dac_400m_bd.tcl b/fpga/usrp3/top/x400/ip/dac_400m_bd/dac_400m_bd.tcl new file mode 100644 index 000000000..96392adcf --- /dev/null +++ b/fpga/usrp3/top/x400/ip/dac_400m_bd/dac_400m_bd.tcl @@ -0,0 +1,348 @@ + +################################################################ +# This is a generated script based on design: dac_400m_bd +# +# Though there are limitations about the generated script, +# the main purpose of this utility is to make learning +# IP Integrator Tcl commands easier. +################################################################ + +namespace eval _tcl { +proc get_script_folder {} { + set script_path [file normalize [info script]] + set script_folder [file dirname $script_path] + return $script_folder +} +} +variable script_folder +set script_folder [_tcl::get_script_folder] + +################################################################ +# Check if script is running in correct Vivado version. +################################################################ +set scripts_vivado_version 2019.1 +set current_vivado_version [version -short] + +if { [string first $scripts_vivado_version $current_vivado_version] == -1 } { + puts "" + catch {common::send_msg_id "BD_TCL-109" "ERROR" "This script was generated using Vivado <$scripts_vivado_version> and is being run in <$current_vivado_version> of Vivado. Please run the script in Vivado <$scripts_vivado_version> then open the design in Vivado <$current_vivado_version>. Upgrade the design by running \"Tools => Report => Report IP Status...\", then run write_bd_tcl to create an updated script."} + + return 1 +} + +################################################################ +# START +################################################################ + +# To test this script, run the following commands from Vivado Tcl console: +# source dac_400m_bd_script.tcl + + +# The design that will be created by this Tcl script contains the following +# module references: +# dac_gearbox_4x2, dac_gearbox_6x8, duc_400m_saturate + +# Please add the sources of those modules before sourcing this Tcl script. + +# If there is no project opened, this script will create a +# project, but make sure you do not have an existing project +# <./myproj/project_1.xpr> in the current working folder. + +set list_projs [get_projects -quiet] +if { $list_projs eq "" } { + create_project project_1 myproj -part xczu28dr-ffvg1517-1-e +} + + +# CHANGE DESIGN NAME HERE +variable design_name +set design_name dac_400m_bd + +# If you do not already have an existing IP Integrator design open, +# you can create a design using the following command: +# create_bd_design $design_name + +# Creating design if needed +set errMsg "" +set nRet 0 + +set cur_design [current_bd_design -quiet] +set list_cells [get_bd_cells -quiet] + +if { ${design_name} eq "" } { + # USE CASES: + # 1) Design_name not set + + set errMsg "Please set the variable to a non-empty value." + set nRet 1 + +} elseif { ${cur_design} ne "" && ${list_cells} eq "" } { + # USE CASES: + # 2): Current design opened AND is empty AND names same. + # 3): Current design opened AND is empty AND names diff; design_name NOT in project. + # 4): Current design opened AND is empty AND names diff; design_name exists in project. + + if { $cur_design ne $design_name } { + common::send_msg_id "BD_TCL-001" "INFO" "Changing value of from <$design_name> to <$cur_design> since current design is empty." + set design_name [get_property NAME $cur_design] + } + common::send_msg_id "BD_TCL-002" "INFO" "Constructing design in IPI design <$cur_design>..." + +} elseif { ${cur_design} ne "" && $list_cells ne "" && $cur_design eq $design_name } { + # USE CASES: + # 5) Current design opened AND has components AND same names. + + set errMsg "Design <$design_name> already exists in your project, please set the variable to another value." + set nRet 1 +} elseif { [get_files -quiet ${design_name}.bd] ne "" } { + # USE CASES: + # 6) Current opened design, has components, but diff names, design_name exists in project. + # 7) No opened design, design_name exists in project. + + set errMsg "Design <$design_name> already exists in your project, please set the variable to another value." + set nRet 2 + +} else { + # USE CASES: + # 8) No opened design, design_name not in project. + # 9) Current opened design, has components, but diff names, design_name not in project. + + common::send_msg_id "BD_TCL-003" "INFO" "Currently there is no design <$design_name> in project, so creating one..." + + create_bd_design $design_name + + common::send_msg_id "BD_TCL-004" "INFO" "Making design <$design_name> as current_bd_design." + current_bd_design $design_name + +} + +common::send_msg_id "BD_TCL-005" "INFO" "Currently the variable is equal to \"$design_name\"." + +if { $nRet != 0 } { + catch {common::send_msg_id "BD_TCL-114" "ERROR" $errMsg} + return $nRet +} + +set bCheckIPsPassed 1 +################################################################## +# CHECK IPs +################################################################## +set bCheckIPs 1 +if { $bCheckIPs == 1 } { + set list_check_ips "\ +xilinx.com:ip:fir_compiler:7.2\ +" + + set list_ips_missing "" + common::send_msg_id "BD_TCL-006" "INFO" "Checking if the following IPs exist in the project's IP catalog: $list_check_ips ." + + foreach ip_vlnv $list_check_ips { + set ip_obj [get_ipdefs -all $ip_vlnv] + if { $ip_obj eq "" } { + lappend list_ips_missing $ip_vlnv + } + } + + if { $list_ips_missing ne "" } { + catch {common::send_msg_id "BD_TCL-115" "ERROR" "The following IPs are not found in the IP Catalog:\n $list_ips_missing\n\nResolution: Please add the repository containing the IP(s) to the project." } + set bCheckIPsPassed 0 + } + +} + +################################################################## +# CHECK Modules +################################################################## +set bCheckModules 1 +if { $bCheckModules == 1 } { + set list_check_mods "\ +dac_gearbox_4x2\ +dac_gearbox_6x8\ +duc_400m_saturate\ +" + + set list_mods_missing "" + common::send_msg_id "BD_TCL-006" "INFO" "Checking if the following modules exist in the project's sources: $list_check_mods ." + + foreach mod_vlnv $list_check_mods { + if { [can_resolve_reference $mod_vlnv] == 0 } { + lappend list_mods_missing $mod_vlnv + } + } + + if { $list_mods_missing ne "" } { + catch {common::send_msg_id "BD_TCL-115" "ERROR" "The following module(s) are not found in the project: $list_mods_missing" } + common::send_msg_id "BD_TCL-008" "INFO" "Please add source files for the missing module(s) above." + set bCheckIPsPassed 0 + } +} + +if { $bCheckIPsPassed != 1 } { + common::send_msg_id "BD_TCL-1003" "WARNING" "Will not continue with creation of design due to the error(s) above." + return 3 +} + +################################################################## +# DESIGN PROCs +################################################################## + + + +# Procedure to create entire design; Provide argument to make +# procedure reusable. If parentCell is "", will use root. +proc create_root_design { parentCell } { + + variable script_folder + variable design_name + + if { $parentCell eq "" } { + set parentCell [get_bd_cells /] + } + + # Get object for parentCell + set parentObj [get_bd_cells $parentCell] + if { $parentObj == "" } { + catch {common::send_msg_id "BD_TCL-100" "ERROR" "Unable to find parent cell <$parentCell>!"} + return + } + + # Make sure parentObj is hier blk + set parentType [get_property TYPE $parentObj] + if { $parentType ne "hier" } { + catch {common::send_msg_id "BD_TCL-101" "ERROR" "Parent <$parentObj> has TYPE = <$parentType>. Expected to be ."} + return + } + + # Save current instance; Restore later + set oldCurInst [current_bd_instance .] + + # Set parent object as current + current_bd_instance $parentObj + + + # Create interface ports + + # Create ports + set dac_data_in_resetn_dclk [ create_bd_port -dir I -type rst dac_data_in_resetn_dclk ] + set dac_data_in_resetn_dclk2x [ create_bd_port -dir I -type rst dac_data_in_resetn_dclk2x ] + set dac_data_in_resetn_rclk [ create_bd_port -dir I -type rst dac_data_in_resetn_rclk ] + set dac_data_in_tdata [ create_bd_port -dir I -from 127 -to 0 -type data dac_data_in_tdata ] + set dac_data_in_tready [ create_bd_port -dir O -type data dac_data_in_tready ] + set dac_data_in_tvalid [ create_bd_port -dir I -type data dac_data_in_tvalid ] + set dac_data_out_tdata [ create_bd_port -dir O -from 255 -to 0 -type data dac_data_out_tdata ] + set dac_data_out_tready [ create_bd_port -dir I -type data dac_data_out_tready ] + set dac_data_out_tvalid [ create_bd_port -dir O -type data dac_data_out_tvalid ] + set data_clk [ create_bd_port -dir I -type clk data_clk ] + set_property -dict [ list \ + CONFIG.FREQ_HZ {122880000} \ + ] $data_clk + set data_clk_2x [ create_bd_port -dir I -type clk data_clk_2x ] + set_property -dict [ list \ + CONFIG.ASSOCIATED_RESET {dac_data_in_resetn_dclk2x} \ + CONFIG.FREQ_HZ {245760000} \ + ] $data_clk_2x + set rfdc_clk [ create_bd_port -dir I -type clk rfdc_clk ] + set_property -dict [ list \ + CONFIG.FREQ_HZ {184320000} \ + ] $rfdc_clk + + # Create instance: dac_gearbox_4x2_0, and set properties + set block_name dac_gearbox_4x2 + set block_cell_name dac_gearbox_4x2_0 + if { [catch {set dac_gearbox_4x2_0 [create_bd_cell -type module -reference $block_name $block_cell_name] } errmsg] } { + catch {common::send_msg_id "BD_TCL-105" "ERROR" "Unable to add referenced block <$block_name>. Please add the files for ${block_name}'s definition into the project."} + return 1 + } elseif { $dac_gearbox_4x2_0 eq "" } { + catch {common::send_msg_id "BD_TCL-106" "ERROR" "Unable to referenced block <$block_name>. Please add the files for ${block_name}'s definition into the project."} + return 1 + } + + # Create instance: dac_gearbox_6x8_0, and set properties + set block_name dac_gearbox_6x8 + set block_cell_name dac_gearbox_6x8_0 + if { [catch {set dac_gearbox_6x8_0 [create_bd_cell -type module -reference $block_name $block_cell_name] } errmsg] } { + catch {common::send_msg_id "BD_TCL-105" "ERROR" "Unable to add referenced block <$block_name>. Please add the files for ${block_name}'s definition into the project."} + return 1 + } elseif { $dac_gearbox_6x8_0 eq "" } { + catch {common::send_msg_id "BD_TCL-106" "ERROR" "Unable to referenced block <$block_name>. Please add the files for ${block_name}'s definition into the project."} + return 1 + } + + # Create instance: dac_interpolator, and set properties + set dac_interpolator [ create_bd_cell -type ip -vlnv xilinx.com:ip:fir_compiler:7.2 dac_interpolator ] + set_property -dict [ list \ + CONFIG.Clock_Frequency {245.76} \ + CONFIG.CoefficientVector {-7,0,24,37,0,-78,-107,0,189,244,0,-389,-484,0,723,873,0,-1245,-1473,0,2029,2364,0,-3177,-3668,0,4862,5592,0,-7418,-8579,0,11675,13820,0,-20461,-26115,0,53699,108144,131069,108144,53699,0,-26115,-20461,0,13820,11675,0,-8579,-7418,0,5592,4862,0,-3668,-3177,0,2364,2029,0,-1473,-1245,0,873,723,0,-484,-389,0,244,189,0,-107,-78,0,37,24,0,-7} \ + CONFIG.Coefficient_Fractional_Bits {0} \ + CONFIG.Coefficient_Sets {1} \ + CONFIG.Coefficient_Sign {Signed} \ + CONFIG.Coefficient_Structure {Inferred} \ + CONFIG.Coefficient_Width {18} \ + CONFIG.ColumnConfig {27} \ + CONFIG.Decimation_Rate {1} \ + CONFIG.Filter_Architecture {Systolic_Multiply_Accumulate} \ + CONFIG.Filter_Type {Interpolation} \ + CONFIG.Has_ARESETn {true} \ + CONFIG.Interpolation_Rate {3} \ + CONFIG.Number_Channels {1} \ + CONFIG.Number_Paths {2} \ + CONFIG.Output_Rounding_Mode {Convergent_Rounding_to_Even} \ + CONFIG.Output_Width {18} \ + CONFIG.Quantization {Integer_Coefficients} \ + CONFIG.RateSpecification {Frequency_Specification} \ + CONFIG.Reset_Data_Vector {false} \ + CONFIG.S_DATA_Has_FIFO {false} \ + CONFIG.Sample_Frequency {491.52} \ + CONFIG.Zero_Pack_Factor {1} \ + ] $dac_interpolator + + # Create instance: duc_400m_saturate_0, and set properties + set block_name duc_400m_saturate + set block_cell_name duc_400m_saturate_0 + if { [catch {set duc_400m_saturate_0 [create_bd_cell -type module -reference $block_name $block_cell_name] } errmsg] } { + catch {common::send_msg_id "BD_TCL-105" "ERROR" "Unable to add referenced block <$block_name>. Please add the files for ${block_name}'s definition into the project."} + return 1 + } elseif { $duc_400m_saturate_0 eq "" } { + catch {common::send_msg_id "BD_TCL-106" "ERROR" "Unable to referenced block <$block_name>. Please add the files for ${block_name}'s definition into the project."} + return 1 + } + + # Create port connections + connect_bd_net -net dac_data_in_1 [get_bd_ports dac_data_in_tdata] [get_bd_pins dac_gearbox_4x2_0/data_in_1x] + connect_bd_net -net dac_data_in_resetn_dclk_1 [get_bd_ports dac_data_in_resetn_dclk] [get_bd_pins dac_gearbox_4x2_0/reset_n_1x] [get_bd_pins dac_gearbox_6x8_0/ac1Reset_n] + connect_bd_net -net dac_data_in_resetn_rclk_1 [get_bd_ports dac_data_in_resetn_rclk] [get_bd_pins dac_gearbox_6x8_0/arReset_n] + connect_bd_net -net dac_data_out_tready_1 [get_bd_ports dac_data_out_tready] [get_bd_pins dac_gearbox_6x8_0/rReadyForOutput] + connect_bd_net -net dac_data_valid_in_1 [get_bd_ports dac_data_in_tvalid] [get_bd_pins dac_gearbox_4x2_0/valid_in_1x] + connect_bd_net -net dac_gearbox_4x2_0_data_out_2x [get_bd_pins dac_gearbox_4x2_0/data_out_2x] [get_bd_pins dac_interpolator/s_axis_data_tdata] + connect_bd_net -net dac_gearbox_4x2_0_ready_out_1x [get_bd_ports dac_data_in_tready] [get_bd_pins dac_gearbox_4x2_0/ready_out_1x] + connect_bd_net -net dac_gearbox_4x2_0_valid_out_2x [get_bd_pins dac_gearbox_4x2_0/valid_out_2x] [get_bd_pins dac_interpolator/s_axis_data_tvalid] + connect_bd_net -net dac_gearbox_6x8_0_rDataOut [get_bd_ports dac_data_out_tdata] [get_bd_pins dac_gearbox_6x8_0/rDataOut] + connect_bd_net -net dac_gearbox_6x8_0_rDataValidOut [get_bd_ports dac_data_out_tvalid] [get_bd_pins dac_gearbox_6x8_0/rDataValidOut] + connect_bd_net -net dac_interpolator_m_axis_data_tdata [get_bd_pins dac_interpolator/m_axis_data_tdata] [get_bd_pins duc_400m_saturate_0/cDataIn] + connect_bd_net -net dac_interpolator_m_axis_data_tvalid [get_bd_pins dac_interpolator/m_axis_data_tvalid] [get_bd_pins duc_400m_saturate_0/cDataValidIn] + connect_bd_net -net data_clk_1 [get_bd_ports data_clk] [get_bd_pins dac_gearbox_4x2_0/clk1x] [get_bd_pins dac_gearbox_6x8_0/Clk1x] + connect_bd_net -net data_clk_2x_1 [get_bd_ports data_clk_2x] [get_bd_pins dac_gearbox_4x2_0/clk2x] [get_bd_pins dac_gearbox_6x8_0/Clk2x] [get_bd_pins dac_interpolator/aclk] [get_bd_pins duc_400m_saturate_0/Clk] + connect_bd_net -net data_resetn_dclk2x_1 [get_bd_ports dac_data_in_resetn_dclk2x] [get_bd_pins dac_gearbox_6x8_0/ac2Reset_n] [get_bd_pins dac_interpolator/aresetn] + connect_bd_net -net duc_400m_saturate_0_cDataOut [get_bd_pins dac_gearbox_6x8_0/c2DataIn] [get_bd_pins duc_400m_saturate_0/cDataOut] + connect_bd_net -net duc_400m_saturate_0_cDataValidOut [get_bd_pins dac_gearbox_6x8_0/c2DataValidIn] [get_bd_pins duc_400m_saturate_0/cDataValidOut] + connect_bd_net -net rfdc_clk_1 [get_bd_ports rfdc_clk] [get_bd_pins dac_gearbox_6x8_0/RfClk] + + # Create address segments + + + # Restore current instance + current_bd_instance $oldCurInst + + validate_bd_design + save_bd_design +} +# End of create_root_design() + + +################################################################## +# MAIN FLOW +################################################################## + +create_root_design "" + + diff --git a/fpga/usrp3/top/x400/ip/dac_400m_bd/hdl_sources.tcl b/fpga/usrp3/top/x400/ip/dac_400m_bd/hdl_sources.tcl new file mode 100644 index 000000000..46c2b485e --- /dev/null +++ b/fpga/usrp3/top/x400/ip/dac_400m_bd/hdl_sources.tcl @@ -0,0 +1,9 @@ +set script_loc [file normalize [info script]] +set script_dir [file dirname $script_loc] + +read_verilog -library work $script_dir/../../rf/400m/dac_gearbox_4x2.v +read_vhdl -library work $script_dir/../../rf/common/PkgRf.vhd +read_vhdl -library work $script_dir/../../rf/400m/dac_gearbox_6x8.vhd +read_vhdl -library work $script_dir/../../rf/400m/dac_gearbox_6x12.vhd +read_vhdl -library work $script_dir/../../rf/400m/dac_gearbox_12x8.vhd +read_vhdl -library work $script_dir/../../rf/400m/duc_400m_saturate.vhd diff --git a/fpga/usrp3/top/x400/ip/dac_400m_bd/synthstub/dac_400m_bd.vhd b/fpga/usrp3/top/x400/ip/dac_400m_bd/synthstub/dac_400m_bd.vhd new file mode 100644 index 000000000..d959d5752 --- /dev/null +++ b/fpga/usrp3/top/x400/ip/dac_400m_bd/synthstub/dac_400m_bd.vhd @@ -0,0 +1,44 @@ +------------------------------------------------------------------------------------------ +-- +-- File: dac_400m_bd.vhd +-- Author: niBlockDesign::niBdExportStub +-- Original Project: HwBuildTools +-- Date: 22 April 2020 +-- +------------------------------------------------------------------------------------------ +-- (c) Copyright National Instruments Corporation +-- All Rights Reserved +-- National Instruments Internal Information +------------------------------------------------------------------------------------------ +-- +-- Purpose: This is an automatically generated stub file to match the entity +-- declaration for 'dac_400m_bd'. This file was created using niBdExportStub +-- Do not modify this file directly! +-- +------------------------------------------------------------------------------------------ + +library ieee; +use ieee.std_logic_1164.all; +library unisim; +use unisim.vcomponents.all; + +entity dac_400m_bd is +port ( + dac_data_in_resetn_dclk : in STD_LOGIC; + dac_data_in_resetn_dclk2x : in STD_LOGIC; + dac_data_in_resetn_rclk : in STD_LOGIC; + dac_data_in_tdata : in STD_LOGIC_VECTOR ( 127 downto 0 ); + dac_data_in_tready : out STD_LOGIC; + dac_data_in_tvalid : in STD_LOGIC; + dac_data_out_tdata : out STD_LOGIC_VECTOR ( 255 downto 0 ); + dac_data_out_tready : in STD_LOGIC; + dac_data_out_tvalid : out STD_LOGIC; + data_clk : in STD_LOGIC; + data_clk_2x : in STD_LOGIC; + rfdc_clk : in STD_LOGIC + ); + end entity dac_400m_bd; + +architecture stub of dac_400m_bd is +begin +end architecture stub; diff --git a/fpga/usrp3/top/x400/ip/ddr4_64bits/Makefile.inc b/fpga/usrp3/top/x400/ip/ddr4_64bits/Makefile.inc new file mode 100644 index 000000000..4b3ebada2 --- /dev/null +++ b/fpga/usrp3/top/x400/ip/ddr4_64bits/Makefile.inc @@ -0,0 +1,18 @@ +# +# Copyright 2021 Ettus Research, a National Instruments Brand +# +# SPDX-License-Identifier: LGPL-3.0-or-later +# + +include $(TOOLS_DIR)/make/viv_ip_builder.mak + +IP_DDR4_64BITS_SRCS = \ +$(IP_BUILD_DIR)/ddr4_64bits/ddr4_64bits.xci + +IP_DDR4_64BITS_OUTS = $(addprefix $(IP_BUILD_DIR)/ddr4_64bits/, \ +ddr4_64bits.xci.out \ +) + + +$(IP_DDR4_64BITS_SRCS) $(IP_DDR4_64BITS_OUTS) : $(IP_DIR)/ddr4_64bits/ddr4_64bits.xci + $(call BUILD_VIVADO_IP,ddr4_64bits,$(ARCH),$(PART_ID),$(IP_DIR),$(IP_BUILD_DIR),0) diff --git a/fpga/usrp3/top/x400/ip/ddr4_64bits/ddr4_64bits.xci b/fpga/usrp3/top/x400/ip/ddr4_64bits/ddr4_64bits.xci new file mode 100644 index 000000000..d1b5484e5 --- /dev/null +++ b/fpga/usrp3/top/x400/ip/ddr4_64bits/ddr4_64bits.xci @@ -0,0 +1,450 @@ + + + xilinx.com + xci + unknown + 1.0 + + + ddr4_64bits + + + + + + 0 + + + + 0 + + + + 0 + + + + 0 + TDM + 8 + false + 11 + 11 + true + + true + 8 + + COMPONENTS + ROW_COLUMN_BANK + Single + 1250 + 0 + + 0 + 0 + 32 + 0 + 0 + 0 + + 512 + 1 + 1 + 1 + 1 + 1 + 1 + 0 + 1 + 1 + 4 + 0 + 256 + 2 + 1 + 2 + 1 + 0.000 + AXI4 + READ_WRITE + 0 + 0 + 1 + 0 + 0 + 1 + 0 + 0 + 0 + + 1 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 1 + 1 + 1 + 1 + 1 + 0.000 + AXI4LITE + READ_WRITE + 0 + 0 + 0 + 0 + 0 + false + 100000000 + + + + 100000000 + 0 + 0.000 + 0 + 29 + 512 + 64 + X0Y11 + X0Y10 + X0Y70 + X0Y11 + 0 + 0 + DDR4_SDRAM + 17 + 0 + 0 + 32 + 512 + 4 + 1 + 2 + 0 + 0 + 0 + 1 + 1 + 0 + 15 + 9996 + 5 + 0 + VCO_2X + 10 + 8Gb + 29 + 1 + 0 + 0 + 8 + 8 + 0 + 938 + 1 + 8 + 8 + 64 + 0 + 1.2V + false + No + 1600 + 0 + 0 + MT40A512M16HA-075E + Components + 16 + 8Gb + 8 + 8192 + 16 + 4294967296 + 750 + DDR4_750_Timing + 0 + 0 + 1 + 0 + 1 + 16 + 0 + 0 + 075E + 1 + 1 + 300000000 + 1 + 1 + 0.84 + 0 + 4 + 1 + 5 + 833 + 0 + 37 + 16 + 2 + 39 + 17 + 9363 + 421 + 145 + 17 + + 8 + 7 + 4 + 10 + 19 + + 10 + 4 + 109 + 128 + 0 + 256 + DDR4 + 1 + 0 + 0 + 0 + 0 + 0 + 0 + FALSE + 9996 + 0 + 0 + 0 + 0 + 0 + 0 + NONE + Disable + 1 + 0.0 + 0 + 0.0 + 0 + 0.0 + 0 + 0.0 + 0 + 1 + 0 + None + None + None + None + 0 + 17 + 1 + 1 + 1 + 1 + DDR4_SDRAM + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + false + false + 32 + RD_PRI_REG + 512 + 4 + false + true + 0 + 0 + 0 + 0 + 8 + Sequential + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 15 + 5 + 0 + 0 + 0 + 0 + 512 + 17 + 12 + true + false + no_file_loaded + 1 + DM_NO_DBI + 64 + false + false + 9996 + 0 + 0 + false + ROW_COLUMN_BANK + MainMemory + MT40A512M16HA-075E + Components + 1.2V + 0 + 0 + 0 + 0 + RZQ/6 + Normal + RZQ/7 + 0 + 4:1 + false + false + false + Single + false + 0 + 0 + 0 + 0 + 833 + false + false + false + 0 + 0 + 0 + 5 + 1 + false + 1 + 1 + Custom + Custom + false + ddr4_64bits + false + false + Disable + false + true + SIMPLE_TG + OFF + false + 1 + false + 1 + false + 1 + Complete_Memory_Controller + false + Custom + Differential + false + BFM + Differential + false + false + false + zynquplusRFSOC + + + xczu28dr + ffvg1517 + VERILOG + + MIXED + -1 + + E + TRUE + TRUE + IP_Flow + 73068 + TRUE + . + + . + 2019.1.1_AR73068 + OUT_OF_CONTEXT + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + diff --git a/fpga/usrp3/top/x400/ip/eth_100g_bd/Makefile.inc b/fpga/usrp3/top/x400/ip/eth_100g_bd/Makefile.inc new file mode 100644 index 000000000..88c9c1184 --- /dev/null +++ b/fpga/usrp3/top/x400/ip/eth_100g_bd/Makefile.inc @@ -0,0 +1,53 @@ +# +# Copyright 2021 Ettus Research, a National Instruments Brand +# +# SPDX-License-Identifier: LGPL-3.0-or-later +# + +include $(TOOLS_DIR)/make/viv_ip_builder.mak + +IP_100G_HDL_SRCS = $(addprefix $(IP_DIR)/eth_100g_bd/, \ +PkgEth100gLbus.sv \ +eth_100g.sv \ +eth_100g_axis2lbus.sv \ +eth_100g_lbus2axis.sv \ +) + +IP_100G_HDL_SIM_SRCS = $(addprefix $(IP_DIR)/eth_100g_bd/, \ +model_100gbe.sv \ +) \ +$(wildcard $(addprefix $(IP_BUILD_DIR)/eth_100g_bd/eth_100g_bd/, \ +sim/eth_100g_bd.v\ +ip/*/ip_0/sim/*.v\ +ip/*/sim/*.h\ +ip/*/sim/*.v\ +ip/eth_100g_bd_cmac_usplus_0_0/cmac_usplus_v2_6_1/*.v\ +ip/eth_100g_bd_cmac_usplus_0_0/eth_100g_bd_cmac_usplus_0_0/example_design/*.v\ +ip/eth_100g_bd_cmac_usplus_0_0/eth_100g_bd_cmac_usplus_0_0/header_files/*.h\ +ip/eth_100g_bd_cmac_usplus_0_0/eth_100g_bd_cmac_usplus_0_0.v\ +ipshared/*/hdl/*.v\ +ipshared/*/hdl/*.sv\ +)) + +IP_100G_ORIG_SRCS = $(addprefix $(IP_DIR)/eth_100g_bd/, \ +eth_100g_bd.tcl \ +) + +IP_100G_BDTCL_SRCS = $(addprefix $(IP_BUILD_DIR)/eth_100g_bd/, \ +eth_100g_bd.tcl \ +) + +IP_100G_BD_SRCS = $(addprefix $(IP_BUILD_DIR)/eth_100g_bd/, \ +eth_100g_bd/eth_100g_bd.bd \ +) + +BD_100G_BD_OUTS = $(addprefix $(IP_BUILD_DIR)/eth_100g_bd/, \ +eth_100g_bd.bd.out \ +eth_100g_bd/eth_100g_bd_ooc.xdc \ +eth_100g_bd/synth/eth_100g_bd.v \ +) + +EMPTY_IP_SRCS = + +$(IP_100G_BD_SRCS) $(BD_100G_BD_OUTS) $(IP_100G_BDTCL_SRCS): $(IP_100G_ORIG_SRCS) + $(call BUILD_VIVADO_BDTCL,eth_100g_bd,$(ARCH),$(PART_ID),$(IP_DIR),$(IP_BUILD_DIR),$(EMPTY_IP_SRCS)) diff --git a/fpga/usrp3/top/x400/ip/eth_100g_bd/PkgEth100gLbus.sv b/fpga/usrp3/top/x400/ip/eth_100g_bd/PkgEth100gLbus.sv new file mode 100644 index 000000000..588313e55 --- /dev/null +++ b/fpga/usrp3/top/x400/ip/eth_100g_bd/PkgEth100gLbus.sv @@ -0,0 +1,36 @@ +// +// Copyright 2021 Ettus Research, a National Instruments Brand +// +// SPDX-License-Identifier: LGPL-3.0-or-later +// +// Module: PkgEth100gLbus +// +// Description: +// +// Package to define an Lbus record +// + +//----------------------------------------------------------------------------- +// Lbus interface +// +// This is the segmented local bus interface on the Xilinx CMAC IP +// see Xilinx CMAC documentation for detail +// https://www.xilinx.com/support/documentation/ip_documentation/cmac_usplus/v2_4/pg203-cmac-usplus.pdf +//----------------------------------------------------------------------------- + +package PkgEth100gLbus; + + localparam DATA_WIDTH = 512; + localparam NUM_SEG = 4; + localparam SEG_DATA_WIDTH = DATA_WIDTH/NUM_SEG; + + typedef struct packed { + logic [SEG_DATA_WIDTH-1:0] data; + logic [$clog2(SEG_DATA_WIDTH/8)-1:0] mty; + logic sop; + logic eop; + logic err; + logic ena; + } lbus_t; + +endpackage : PkgEth100gLbus diff --git a/fpga/usrp3/top/x400/ip/eth_100g_bd/eth_100g.sv b/fpga/usrp3/top/x400/ip/eth_100g_bd/eth_100g.sv new file mode 100644 index 000000000..456db06d9 --- /dev/null +++ b/fpga/usrp3/top/x400/ip/eth_100g_bd/eth_100g.sv @@ -0,0 +1,1220 @@ +// +// Copyright 2021 Ettus Research, A National Instruments brand +// +// SPDX-License-Identifier: LGPL-3.0-or-later +// +// Module: eth_100g +// +// Description: Wrapper for the Xilinx 100G mac + + +module eth_100g #( + logic PAUSE_EN = 1, + logic [15:0] PAUSE_QUANTA = 16'hFFFF, + logic [15:0] PAUSE_REFRESH = 16'hFFFF + )( + + // Resets + input logic areset, + // Clock for misc stuff + input logic clk100, + // Low jitter refclk + input logic refclk_p, + input logic refclk_n, + // RX Clk for output + output logic rx_rec_clk_out, + // MGT high-speed IO + output logic[3:0] tx_p, + output logic[3:0] tx_n, + input logic[3:0] rx_p, + input logic[3:0] rx_n, + + // Data port + output logic mgt_clk, + output logic mgt_rst, + input logic mgt_pause_req, + // Interface clocks for mgt_tx and mgt_rx are NOT used (logic uses mgt_clk) + AxiStreamIf.slave mgt_tx, + AxiStreamIf.master mgt_rx, + // Axi port + AxiLiteIf.slave mgt_axil, + // Misc + output logic [31:0] phy_status, + input logic [31:0] mac_ctrl, + output logic [31:0] mac_status, + output logic phy_reset, + output logic link_up +); + + logic tx_ovfout; + logic tx_unfout; + logic stat_rx_aligned; + logic stat_auto_config_done; + logic stat_auto_config_done_bclk; + logic usr_tx_reset; + logic usr_rx_reset; + + // Heirarchical refference (xilinx says it will synthesize) + // eth_100g_bd_i/cmac_usplus_0/gt_rxrecclkout} + assign rx_rec_clk_out = eth_100g_bd_i.cmac_usplus_0.gt_rxrecclkout[0]; + //status registers + always_comb begin + phy_status = 0; + phy_status[0] = usr_tx_reset; + phy_status[1] = usr_rx_reset; + + end + + logic [8:0] pause_mask; // from mac ctl register bits 24:16 + + always_ff @(posedge mgt_clk) begin : mac_status_reg + if (mgt_rst) begin + mac_status <= 0; + end else begin + mac_status[0] <= mac_status[0] || tx_ovfout; + mac_status[1] <= mac_status[1] || tx_unfout; + mac_status[2] <= stat_rx_aligned; + mac_status[3] <= mac_status[3] || (!mgt_rx.tready && mgt_rx.tvalid); + mac_status[4] <= stat_auto_config_done; + mac_status[24:16] <= pause_mask; + end + end + + //extra simulation checks + localparam USE_MAC_CHECKS = 1; + if (USE_MAC_CHECKS) begin + always_ff @(posedge mgt_rx.clk) begin : check_no_holdoff + if (!mgt_rx.rst) begin + if (!mgt_rx.tready && mgt_rx.tvalid) begin + $fatal(1,"MAC RX can't hold off the MAC"); + end + assert(tx_ovfout==0) else + $fatal(1,"MAC TX had an overflow!"); + assert(tx_unfout==0) else + $fatal(1,"MAC TX had an underflow!"); + end + end + end + + initial begin + assert (mgt_tx.DATA_WIDTH == 512) else + $fatal("mgt_rx.DATA_WIDTH must be 512"); + // $clog2(512/8)+1 + assert (mgt_rx.USER_WIDTH == 7) else + $fatal("mgt_rx.USER_WIDTH must be 7"); + assert (mgt_tx.TDATA == 1) else + $fatal("mgt_tx.TDATA must be enabled"); + assert (mgt_tx.TUSER == 1) else + $fatal("mgt_tx.TUSER must be enabled"); + assert (mgt_tx.TKEEP == 1) else + $fatal("mgt_tx.TKEEP must be enabled"); + assert (mgt_tx.TLAST == 1) else + $fatal("mgt_tx.TLAST must be enabled"); + assert (mgt_rx.DATA_WIDTH == 512) else + $fatal("mgt_rx.DATA_WIDTH must be 512"); + // $clog2(512/8)+1 + assert (mgt_rx.USER_WIDTH == 7) else + $fatal("mgt_rx.DATA_WIDTH must be 7"); + assert (mgt_rx.TDATA == 1) else + $fatal("mgt_rx.TDATA must be enabled"); + assert (mgt_rx.TUSER == 1) else + $fatal("mgt_rx.TUSER must be enabled"); + assert (mgt_rx.TKEEP == 0) else + $fatal("mgt_rx.TKEEP must not be enabled"); + assert (mgt_rx.TLAST == 1) else + $fatal("mgt_rx.TLAST must be enabled"); + end + + AxiStreamIf #(.DATA_WIDTH(512),.TUSER(0),.TKEEP(0)) + eth100g_tx(mgt_clk,mgt_rst); + AxiStreamIf #(.DATA_WIDTH(512),.USER_WIDTH(7),.TKEEP(0)) + eth100g_rx(mgt_clk,mgt_rst); + + logic mgt_tx_idle; + logic mgt_tx_pause; + + always_comb begin + eth100g_tx.tdata = mgt_tx.tdata; + eth100g_tx.tuser = 0; + eth100g_tx.tkeep = mgt_tx.tkeep; + eth100g_tx.tvalid = mgt_tx.tvalid && !mgt_tx_pause; + eth100g_tx.tlast = mgt_tx.tlast; + mgt_tx.tready = eth100g_tx.tready && !mgt_tx_pause; + end + + always_comb begin + mgt_rx.tdata = eth100g_rx.tdata; + mgt_rx.tuser = eth100g_rx.tuser; + mgt_rx.tuser[mgt_rx.USER_WIDTH-1] = // assign error bit [MSB] + // CRC failure + eth100g_rx.tuser[mgt_rx.USER_WIDTH-1] || + // Missed a DATA word. + mgt_rx.tvalid && !mgt_rx.tready; + mgt_rx.tkeep = eth100g_rx.tkeep; + mgt_rx.tvalid = eth100g_rx.tvalid; + mgt_rx.tlast = eth100g_rx.tlast; + // The MAC ignores hold off. Data must be consumed every clock it is valid. + // eth100g_rx.tready = mgt_rx.tready; + end + + // This is a heavily replicated signal, add some pipeline + // to it to make it easier to spread out + logic mgt_rst_0; + + + // Flow control signals + // 0-7 map to PCP codes 0-7. 8 is a global pause request + logic [8:0] stat_rx_pause_req ; + logic [8:0] ctl_tx_pause_req ; // drive for at least 16 clocks + logic ctl_tx_resend_pause; // resend the pause request (tieing this high forces a spam of resend requests) + + // QuantaPeriod is 512 bit times or 5.12 ns + // resend pause requests so (quanta*QuantaPeriod)/(refresh*QuantaPeriod) is the percentage of BW that gets through. + // pause_mask is part of the mac_ctrl register + always_comb begin + ctl_tx_resend_pause = 0; + ctl_tx_pause_req = '0; + if (mgt_pause_req) begin + ctl_tx_pause_req = pause_mask; + end + end + logic mgt_tx_pause_req; + assign mgt_tx_pause_req = (pause_mask & stat_rx_pause_req) != 0; + always_ff @(posedge mgt_clk,posedge areset) begin : reset_timing_dff + if (areset) begin + mgt_rst_0 <= 1'b1; + mgt_rst <= 1'b1; + mgt_tx_pause <= 1'b0; + mgt_tx_idle <= 1'b1; + end else begin + mgt_rst_0 <= !link_up; + mgt_rst <= mgt_rst_0; + //idle until a valid sets + if (mgt_tx_idle) begin + if (!eth100g_tx.tvalid) begin + mgt_tx_pause <= mgt_tx_pause_req; + end else begin + // one clock packet + if (eth100g_tx.tvalid && eth100g_tx.tlast && eth100g_tx.tready) begin + mgt_tx_idle <= 1; + mgt_tx_pause <= mgt_tx_pause_req; + end else begin + mgt_tx_idle <= 0; + end + end + //set idle if end of packet is accepted + end else if (eth100g_tx.tvalid && eth100g_tx.tlast && eth100g_tx.tready) begin + mgt_tx_idle <= 1; + mgt_tx_pause <= mgt_tx_pause_req; + end + end + end + + always_comb phy_reset = usr_tx_reset || usr_rx_reset; + always_comb link_up = stat_rx_aligned && !phy_reset; + + // resets stat counts and moves the total to the readable version. + localparam PM_COUNT = 40000; + logic pm_tick = 0; + logic [15:0] pm_tick_count; + always_ff @(posedge mgt_axil.clk) begin : pm_tick_counter + if (mgt_axil.rst) begin + pm_tick_count = 0; + pm_tick = 0; + end else begin + if (pm_tick_count == PM_COUNT-1) begin + pm_tick_count = 0; + pm_tick = 1; + end else begin + pm_tick_count = pm_tick_count+1; + pm_tick = 0; + end + end + end + + `include "../../../../lib/axi4lite_sv/axi_lite.vh" + AxiLiteIf_v #(.DATA_WIDTH(mgt_axil.DATA_WIDTH),.ADDR_WIDTH(32)) + mgt_axil_v(.clk(mgt_axil.clk),.rst(mgt_axil.rst)); + + localparam AUTO_CONNECT=1; + // When enabled the port will automatically attempt to connect to an Ethernet partner + // without requiring any action from SW. If it is not defined, SW will have to perform + // a similar set of writes. Xilinx publishes a driver for the MAC, that we could associate. + // The sequence of writes was taken from the CMAC example, without any deep knowledge + // of what the standard Ethernet connection protocol is. + + // Inject writes to perform connection inbetween other SW writes to read the mac. + if (AUTO_CONNECT) begin : yes_auto_connect + // defined in https://www.xilinx.com/support/documentation/ip_documentation/cmac_usplus/v2_4/pg203-cmac-usplus.pdf + // pg 187 + localparam CONFIGURATION_TX_REG1 = 32'h000C; + localparam ctl_tx_ctl_enable = 0; + localparam ctl_tx_ctl_tx_send_lfi = 3; + localparam ctl_tx_ctl_tx_send_rfi = 4; + localparam ctl_tx_ctl_tx_send_idle = 5; + localparam ctl_tx_ctl_test_pattern = 16; + + localparam CONFIGURATION_RX_REG1 = 32'h0014; + localparam ctl_rx_ctl_enable = 0; + localparam ctl_rx_ctl_rx_force_resync = 7; + localparam ctl_rx_ctl_test_pattern = 8; + + localparam RSFEC_CONFIG_INDICATION_CORRECTION = 32'h1000; + localparam rs_fec_in_ctl_rx_rsfec_enable_correction = 0; + localparam rs_fec_in_ctl_rx_rsfec_enable_indication = 1; + localparam rs_fec_in_ctl_rsfec_ieee_error_indication_mode = 2; + + localparam RSFEC_CONFIG_ENABLE = 32'h107C; + localparam rs_fec_in_ctl_rx_rsfec_enable = 0; + localparam rs_fec_in_ctl_tx_rsfec_enable = 1; + + // Extra configuration for Pause Frames (CMAC guide Pg 210) + //0x0084 : 32'h00003DFF [CONFIGURATION_RX_FLOW_CONTROL_CONTROL_REG1] + //0x0088 : 32'h0001C631 [CONFIGURATION_RX_FLOW_CONTROL_CONTROL_REG2] + //0x0048 : 32'hFFFFFFFF [CONFIGURATION_TX_FLOW_CONTROL_QUANTA_REG1] + //0x004C : 32'hFFFFFFFF [CONFIGURATION_TX_FLOW_CONTROL_QUANTA_REG2] + //0x0050 : 32'hFFFFFFFF [CONFIGURATION_TX_FLOW_CONTROL_QUANTA_REG3] + //0x0054 : 32'hFFFFFFFF [CONFIGURATION_TX_FLOW_CONTROL_QUANTA_REG4] + //0x0058 : 32'h0000FFFF [CONFIGURATION_TX_FLOW_CONTROL_QUANTA_REG5] + //0x0034 : 32'hFFFFFFFF [CONFIGURATION_TX_FLOW_CONTROL_REFRESH_REG1] + //0x0038 : 32'hFFFFFFFF [CONFIGURATION_TX_FLOW_CONTROL_REFRESH_REG2] + //0x003C : 32'hFFFFFFFF [CONFIGURATION_TX_FLOW_CONTROL_REFRESH_REG3] + //0x0040 : 32'hFFFFFFFF [CONFIGURATION_TX_FLOW_CONTROL_REFRESH_REG4] + //0x0044 : 32'h0000FFFF [CONFIGURATION_TX_FLOW_CONTROL_REFRESH_REG5] + //0x0030 : 32'h000001FF [CONFIGURATION_TX_FLOW_CONTROL_CONTROL_REG1] + + localparam CONFIGURATION_RX_FLOW_CONTROL_CONTROL_REG1 = 32'h0084; + //3DFF - 0011 1101 1111 1111 + localparam ctl_rx_pause_en = 0; // 9 bits + localparam ctl_rx_enable_gcp = 10; + localparam ctl_rx_enable_pcp = 11; + localparam ctl_rx_enable_gpp = 12; + localparam ctl_rx_enable_ppp = 13; + localparam ctl_rx_pause_ack = 23; // 8 bits + localparam CONFIGURATION_RX_FLOW_CONTROL_CONTROL_REG2 = 32'h0088; + //1C631 - 0001 1100 0110 0011 0001 + localparam ctl_rx_check_mcast_gcp = 0; //1 + localparam ctl_rx_check_ucast_gcp = 1; + localparam ctl_rx_check_sa_gcp = 2; + localparam ctl_rx_check_etype_gcp = 3; + localparam ctl_rx_check_opcode_gcp = 4; //1 + localparam ctl_rx_check_mcast_pcp = 5; //1 + localparam ctl_rx_check_ucast_pcp = 6; + localparam ctl_rx_check_sa_pcp = 7; + localparam ctl_rx_check_etype_pcp = 8; + localparam ctl_rx_check_opcode_pcp = 9; //1 + localparam ctl_rx_check_mcast_gpp = 10; //1 + localparam ctl_rx_check_ucast_gpp = 11; + localparam ctl_rx_check_sa_gpp = 12; + localparam ctl_rx_check_etype_gpp = 13; + localparam ctl_rx_check_opcode_gpp = 14; //1 + localparam ctl_rx_check_opcode_ppp = 15; //1 + localparam ctl_rx_check_mcast_ppp = 16; //1 + localparam ctl_rx_check_ucast_ppp = 17; + localparam ctl_rx_check_sa_ppp = 18; + localparam ctl_rx_check_etype_ppp = 19; + + localparam CONFIGURATION_TX_FLOW_CONTROL_QUANTA_REG1 = 32'h0048; + localparam ctl_tx_pause_quanta0 = 0; + localparam ctl_tx_pause_quanta1 = 16; + localparam CONFIGURATION_TX_FLOW_CONTROL_QUANTA_REG2 = 32'h004C; + localparam ctl_tx_pause_quanta2 = 0; + localparam ctl_tx_pause_quanta3 = 16; + localparam CONFIGURATION_TX_FLOW_CONTROL_QUANTA_REG3 = 32'h0050; + localparam ctl_tx_pause_quanta4 = 0; + localparam ctl_tx_pause_quanta5 = 16; + localparam CONFIGURATION_TX_FLOW_CONTROL_QUANTA_REG4 = 32'h0054; + localparam ctl_tx_pause_quanta6 = 0; + localparam ctl_tx_pause_quanta7 = 16; + localparam CONFIGURATION_TX_FLOW_CONTROL_QUANTA_REG5 = 32'h0058; + localparam ctl_tx_pause_quanta8 = 0; + localparam CONFIGURATION_TX_FLOW_CONTROL_REFRESH_REG1 = 32'h0034; + localparam ctl_tx_pause_refresh_timer0 = 0; + localparam ctl_tx_pause_refresh_timer1 = 16; + localparam CONFIGURATION_TX_FLOW_CONTROL_REFRESH_REG2 = 32'h0038; + localparam ctl_tx_pause_refresh_timer2 = 0; + localparam ctl_tx_pause_refresh_timer3 = 16; + localparam CONFIGURATION_TX_FLOW_CONTROL_REFRESH_REG3 = 32'h003C; + localparam ctl_tx_pause_refresh_timer4 = 0; + localparam ctl_tx_pause_refresh_timer5 = 16; + localparam CONFIGURATION_TX_FLOW_CONTROL_REFRESH_REG4 = 32'h0040; + localparam ctl_tx_pause_refresh_timer6 = 0; + localparam ctl_tx_pause_refresh_timer7 = 16; + localparam CONFIGURATION_TX_FLOW_CONTROL_REFRESH_REG5 = 32'h0044; + localparam ctl_tx_pause_refresh_timer8 = 0; + localparam CONFIGURATION_TX_FLOW_CONTROL_CONTROL_REG1 = 32'h0030; + // 1FF + localparam ctl_tx_pause_enable = 0; // 9 bits + + + AxiLiteIf #(.DATA_WIDTH(mgt_axil.DATA_WIDTH),.ADDR_WIDTH(32)) + auto_axil(.clk(mgt_axil.clk),.rst(mgt_axil.rst)); + + typedef enum logic [4:0] { + ST_RESET = 5'd0, + ST_WR_CONFIGURATION_TX_REG1_IDLE = 5'd1, + ST_WR_RSFEC_CONFIG_INDICATION_CORRECTION = 5'd2, + ST_WR_RSFEC_CONFIG_ENABLE = 5'd3, + ST_WR_CONFIGURATION_RX_REG1 = 5'd4, + ST_WAIT = 5'd5, + ST_WR_CONFIGURATION_TX_REG1_TX_ENABLE = 5'd6, + ST_READY = 5'd7, + // EXTRA PAUSE WRITES + ST_WR_CONFIGURATION_RX_FLOW_CONTROL_CONTROL_REG1 = 5'd8, + ST_WR_CONFIGURATION_RX_FLOW_CONTROL_CONTROL_REG2 = 5'd9, + ST_WR_CONFIGURATION_TX_FLOW_CONTROL_QUANTA_REG1 = 5'd10, + ST_WR_CONFIGURATION_TX_FLOW_CONTROL_QUANTA_REG2 = 5'd11, + ST_WR_CONFIGURATION_TX_FLOW_CONTROL_QUANTA_REG3 = 5'd12, + ST_WR_CONFIGURATION_TX_FLOW_CONTROL_QUANTA_REG4 = 5'd13, + ST_WR_CONFIGURATION_TX_FLOW_CONTROL_QUANTA_REG5 = 5'd14, + ST_WR_CONFIGURATION_TX_FLOW_CONTROL_REFRESH_REG1 = 5'd15, + ST_WR_CONFIGURATION_TX_FLOW_CONTROL_REFRESH_REG2 = 5'd16, + ST_WR_CONFIGURATION_TX_FLOW_CONTROL_REFRESH_REG3 = 5'd17, + ST_WR_CONFIGURATION_TX_FLOW_CONTROL_REFRESH_REG4 = 5'd18, + ST_WR_CONFIGURATION_TX_FLOW_CONTROL_REFRESH_REG5 = 5'd19, + ST_WR_CONFIGURATION_TX_FLOW_CONTROL_CONTROL_REG1 = 5'd20 + } auto_connect_state_t; + + auto_connect_state_t auto_connect_state = ST_RESET; + logic auto_rst0, auto_rst1, auto_rst2, auto_rst3; + logic mgt_axil_in_progress; + logic w_req, aw_req; + logic phy_reset_bclk,stat_rx_aligned_bclk; + logic auto_enable; + + synchronizer #( .STAGES(2), .WIDTH(1), .INITIAL_VAL(0) ) phy_reset_sync_i ( + .clk(mgt_axil.clk), .rst(1'b0), .in(phy_reset), .out(phy_reset_bclk) + ); + + synchronizer #( .STAGES(2), .WIDTH(1), .INITIAL_VAL(0) ) rx_aligned_sync_i ( + .clk(mgt_axil.clk), .rst(1'b0), .in(stat_rx_aligned), .out(stat_rx_aligned_bclk) + ); + + synchronizer #( .STAGES(2), .WIDTH(1), .INITIAL_VAL(0) ) auto_config_done_sync_i ( + .clk(mgt_clk), .rst(1'b0), .in(stat_auto_config_done_bclk), .out(stat_auto_config_done) + ); + + + synchronizer #( .STAGES(2), .WIDTH(1), .INITIAL_VAL(0) ) auto_enable_sync_i ( + .clk(mgt_axil.clk), .rst(1'b0), .in(mac_ctrl[0]), .out(auto_enable) + ); + + synchronizer #( .STAGES(2), .WIDTH(9), .INITIAL_VAL(9'h100) ) pause_mask_sync_i ( + .clk(mgt_clk), .rst(1'b0), .in(mac_ctrl[24:16]), .out(pause_mask) + ); + + + always_ff @(posedge mgt_axil.clk) begin : auto_enable_logic + if (mgt_axil.rst) begin + auto_rst0 <= 1'b1; + auto_rst1 <= 1'b1; + auto_rst2 <= 1'b1; + auto_rst3 <= 1'b1; + auto_connect_state <= ST_RESET; + stat_auto_config_done_bclk <= 1'b0; + mgt_axil_in_progress <= 1'b0; + w_req <= 1'b0; + aw_req <= 1'b0; + + // default is to drive mgt_axi_through + /* write address channel */ + auto_axil.awaddr <= 'bX; + auto_axil.awvalid <= 1'b0; + mgt_axil.awready <= 1'b0; + /* write data channel */ + auto_axil.wdata <= 'bX; + auto_axil.wstrb <= 'b0; + auto_axil.wvalid <= 1'b0; + mgt_axil.wready <= 1'b0; + /* write resp channel */ + mgt_axil.bresp[1:0] <= 'b0; + mgt_axil.bvalid <= 1'b0; + auto_axil.bready <= 1'b0; + /* read address channel */ + auto_axil.araddr <= 'b0; + auto_axil.arvalid <= 1'b0; + mgt_axil.arready <= 1'b0; + /* read resp channel */ + mgt_axil.rdata <= 'bX; + mgt_axil.rresp[1:0] <= 'b0; + mgt_axil.rvalid <= 1'b0; + auto_axil.rready <= 1'b0; + + end else begin + // 4 clocks to mimic Xilinx Example behavior + auto_rst0 <= phy_reset_bclk; + auto_rst1 <= auto_rst0; + auto_rst2 <= auto_rst1; + auto_rst3 <= auto_rst2; + // assumes one access in flight at time (valid for standard Xilinx AXIL driver) + // set if anyone starts driving a W Address / W Data / R Address channel + if (auto_axil.awvalid || auto_axil.wvalid || auto_axil.arvalid) begin + mgt_axil_in_progress <= 1'b1; + // clear on an acknowledged response + end else if ((auto_axil.bvalid && auto_axil.bready) || + (auto_axil.rvalid && auto_axil.rready)) begin + mgt_axil_in_progress <= 1'b0; + end + + // default is to drive mgt_axi_through + /* write address channel */ + auto_axil.awaddr <= mgt_axil.awaddr; + auto_axil.awvalid <= mgt_axil.awvalid; + mgt_axil.awready <= auto_axil.awready; + /* write data channel */ + auto_axil.wdata <= mgt_axil.wdata; + auto_axil.wstrb <= mgt_axil.wstrb; + auto_axil.wvalid <= mgt_axil.wvalid; + mgt_axil.wready <= auto_axil.wready; + /* write resp channel */ + mgt_axil.bresp <= auto_axil.bresp; + mgt_axil.bvalid <= auto_axil.bvalid; + auto_axil.bready <= mgt_axil.bready; + /* read address channel */ + auto_axil.araddr <= mgt_axil.araddr; + auto_axil.arvalid <= mgt_axil.arvalid; + mgt_axil.arready <= auto_axil.arready; + /* read resp channel */ + mgt_axil.rdata <= auto_axil.rdata; + mgt_axil.rresp <= auto_axil.rresp; + mgt_axil.rvalid <= auto_axil.rvalid; + auto_axil.rready <= mgt_axil.rready; + + if (auto_rst3) begin + auto_connect_state = ST_RESET; + stat_auto_config_done_bclk <= 1'b0; + end else begin + case (auto_connect_state) + + ST_RESET: begin + stat_auto_config_done_bclk <= 1'b0; + if (!mgt_axil_in_progress && auto_enable) begin + mgt_axil.awready <= 0; + mgt_axil.wready <= 0; + mgt_axil.arready <= 0; + auto_connect_state <= ST_WR_CONFIGURATION_TX_REG1_IDLE; + w_req <= 1'b1; + aw_req <= 1'b1; + end + end + + ST_WR_CONFIGURATION_TX_REG1_IDLE: begin + mgt_axil.awready <= 0; + mgt_axil.wready <= 0; + mgt_axil.arready <= 0; + auto_axil.arvalid <= 0; + // start transmitting alignment pattern + auto_axil.wdata <= 0; + auto_axil.wdata[ctl_tx_ctl_enable] <= 0; + auto_axil.wdata[ctl_tx_ctl_tx_send_idle] <= 0; + auto_axil.wdata[ctl_tx_ctl_tx_send_lfi] <= 0; + auto_axil.wdata[ctl_tx_ctl_tx_send_rfi] <= 1; + auto_axil.wdata[ctl_tx_ctl_test_pattern] <= 0; + auto_axil.wstrb <= '1; + auto_axil.wvalid <= w_req; + auto_axil.awaddr <= CONFIGURATION_TX_REG1; + auto_axil.awvalid <= aw_req; + auto_axil.bready <= 1'b1; + if (auto_axil.wready) begin + auto_axil.wvalid <= 1'b0; + w_req <= 1'b0; + end + if (auto_axil.awready) begin + auto_axil.awvalid <= 1'b0; + aw_req <= 1'b0; + end + if (auto_axil.bvalid) begin + auto_connect_state <= ST_WR_RSFEC_CONFIG_INDICATION_CORRECTION; + w_req <= 1'b1; + aw_req <= 1'b1; + end + end + + ST_WR_RSFEC_CONFIG_INDICATION_CORRECTION: begin + mgt_axil.awready <= 0; + mgt_axil.wready <= 0; + mgt_axil.arready <= 0; + auto_axil.arvalid <= 0; + // configure fec + auto_axil.wdata <= 0; + auto_axil.wdata[rs_fec_in_ctl_rx_rsfec_enable_correction] <= 1; + auto_axil.wdata[rs_fec_in_ctl_rx_rsfec_enable_indication] <= 1; + auto_axil.wdata[rs_fec_in_ctl_rsfec_ieee_error_indication_mode] <= 1; + auto_axil.wstrb <= '1; + auto_axil.wvalid <= w_req; + auto_axil.awaddr <= RSFEC_CONFIG_INDICATION_CORRECTION; + auto_axil.awvalid <= aw_req; + auto_axil.bready <= 1'b1; + if (auto_axil.wready) begin + auto_axil.wvalid <= 1'b0; + w_req <= 1'b0; + end + if (auto_axil.awready) begin + auto_axil.awvalid <= 1'b0; + aw_req <= 1'b0; + end + if (auto_axil.bvalid) begin + auto_connect_state <= ST_WR_RSFEC_CONFIG_ENABLE; + w_req <= 1'b1; + aw_req <= 1'b1; + end + end + + ST_WR_RSFEC_CONFIG_ENABLE: begin + mgt_axil.awready <= 0; + mgt_axil.wready <= 0; + mgt_axil.arready <= 0; + auto_axil.arvalid <= 0; + // enable fec + auto_axil.wdata <= 0; + auto_axil.wdata[rs_fec_in_ctl_rx_rsfec_enable] <= 1; + auto_axil.wdata[rs_fec_in_ctl_tx_rsfec_enable] <= 1; + auto_axil.wstrb <= '1; + auto_axil.wvalid <= w_req; + auto_axil.awaddr <= RSFEC_CONFIG_ENABLE; + auto_axil.awvalid <= aw_req; + auto_axil.bready <= 1'b1; + if (auto_axil.wready) begin + auto_axil.wvalid <= 1'b0; + w_req <= 1'b0; + end + if (auto_axil.awready) begin + auto_axil.awvalid <= 1'b0; + aw_req <= 1'b0; + end + if (auto_axil.bvalid) begin + auto_connect_state <= ST_WR_CONFIGURATION_RX_REG1; + w_req <= 1'b1; + aw_req <= 1'b1; + end + end + + ST_WR_CONFIGURATION_RX_REG1: begin + mgt_axil.awready <= 0; + mgt_axil.wready <= 0; + mgt_axil.arready <= 0; + auto_axil.arvalid <= 0; + // turn on RX interface + auto_axil.wdata <= 0; + auto_axil.wdata[ctl_rx_ctl_enable] <= 1; + auto_axil.wdata[ctl_rx_ctl_rx_force_resync] <= 0; + auto_axil.wdata[ctl_rx_ctl_test_pattern] <= 0; + auto_axil.wstrb <= '1; + auto_axil.wvalid <= w_req; + auto_axil.awaddr <= CONFIGURATION_RX_REG1; + auto_axil.awvalid <= aw_req; + auto_axil.bready <= 1'b1; + if (auto_axil.wready) begin + auto_axil.wvalid <= 1'b0; + w_req <= 1'b0; + end + if (auto_axil.awready) begin + auto_axil.awvalid <= 1'b0; + aw_req <= 1'b0; + end + if (auto_axil.bvalid) begin + auto_connect_state <= ST_WAIT; + end + end + + ST_WAIT: begin + mgt_axil.awready <= 0; + mgt_axil.wready <= 0; + mgt_axil.arready <= 0; + auto_axil.arvalid <= 0; + // don't drive any writes, but hold off bus + auto_axil.wdata <= 0; + auto_axil.wstrb <= 0; + auto_axil.wvalid <= 0; + auto_axil.awaddr <= 0; + auto_axil.awvalid <= 0; + auto_axil.bready <= 0; + if (stat_rx_aligned_bclk) begin + auto_connect_state <= ST_WR_CONFIGURATION_TX_REG1_TX_ENABLE; + w_req <= 1'b1; + aw_req <= 1'b1; + end + end + + ST_WR_CONFIGURATION_TX_REG1_TX_ENABLE: begin + mgt_axil.awready <= 0; + mgt_axil.wready <= 0; + mgt_axil.arready <= 0; + auto_axil.arvalid <= 0; + // stop transmitting alignment pattern + // and start transmitting data + auto_axil.wdata <= 0; + auto_axil.wdata[ctl_tx_ctl_enable] <= 1; + auto_axil.wdata[ctl_tx_ctl_tx_send_idle] <= 0; + auto_axil.wdata[ctl_tx_ctl_tx_send_lfi] <= 0; + auto_axil.wdata[ctl_tx_ctl_tx_send_rfi] <= 0; + auto_axil.wdata[ctl_tx_ctl_test_pattern] <= 0; + auto_axil.wstrb <= '1; + auto_axil.wvalid <= w_req; + auto_axil.awaddr <= CONFIGURATION_TX_REG1; + auto_axil.awvalid <= aw_req; + auto_axil.bready <= 1'b1; + if (auto_axil.wready) begin + auto_axil.wvalid <= 1'b0; + w_req <= 1'b0; + end + if (auto_axil.awready) begin + auto_axil.awvalid <= 1'b0; + aw_req <= 1'b0; + end + if (auto_axil.bvalid) begin + if (PAUSE_EN) begin + auto_connect_state <= ST_WR_CONFIGURATION_RX_FLOW_CONTROL_CONTROL_REG1; + w_req <= 1'b1; + aw_req <= 1'b1; + end else begin + auto_connect_state <= ST_READY; + end + end + end + + ST_WR_CONFIGURATION_RX_FLOW_CONTROL_CONTROL_REG1: begin + mgt_axil.awready <= 0; + mgt_axil.wready <= 0; + mgt_axil.arready <= 0; + auto_axil.arvalid <= 0; + // turn on RX interface + auto_axil.wdata <= 0; + //3DFF - 0011 1101 1111 1111 + auto_axil.wdata[ctl_rx_pause_en+:9] <= '1; + auto_axil.wdata[ctl_rx_enable_gcp] <= 1; + auto_axil.wdata[ctl_rx_enable_pcp] <= 1; + auto_axil.wdata[ctl_rx_enable_gpp] <= 1; + auto_axil.wdata[ctl_rx_enable_ppp] <= 1; + //ctl_rx_pause_ack = 23; // 8 bits NOT SET + auto_axil.wstrb <= '1; + auto_axil.wvalid <= w_req; + auto_axil.awaddr <= CONFIGURATION_RX_FLOW_CONTROL_CONTROL_REG1; + auto_axil.awvalid <= aw_req; + auto_axil.bready <= 1'b1; + if (auto_axil.wready) begin + auto_axil.wvalid <= 1'b0; + w_req <= 1'b0; + end + if (auto_axil.awready) begin + auto_axil.awvalid <= 1'b0; + aw_req <= 1'b0; + end + if (auto_axil.bvalid) begin + auto_connect_state <= ST_WR_CONFIGURATION_RX_FLOW_CONTROL_CONTROL_REG2; + w_req <= 1'b1; + aw_req <= 1'b1; + end + end + + ST_WR_CONFIGURATION_RX_FLOW_CONTROL_CONTROL_REG2: begin + mgt_axil.awready <= 0; + mgt_axil.wready <= 0; + mgt_axil.arready <= 0; + auto_axil.arvalid <= 0; + // turn on RX interface + auto_axil.wdata <= 0; + //1C631 - 0001 1100 0110 0011 0001 + auto_axil.wdata[ctl_rx_check_mcast_gcp ] <= 1; //1 + auto_axil.wdata[ctl_rx_check_ucast_gcp ] <= 0; + auto_axil.wdata[ctl_rx_check_sa_gcp ] <= 0; + auto_axil.wdata[ctl_rx_check_etype_gcp ] <= 0; + auto_axil.wdata[ctl_rx_check_opcode_gcp] <= 1; //1 + auto_axil.wdata[ctl_rx_check_mcast_pcp ] <= 1; //1 + auto_axil.wdata[ctl_rx_check_ucast_pcp ] <= 0; + auto_axil.wdata[ctl_rx_check_sa_pcp ] <= 0; + auto_axil.wdata[ctl_rx_check_etype_pcp ] <= 0; + auto_axil.wdata[ctl_rx_check_opcode_pcp] <= 1; //1 + auto_axil.wdata[ctl_rx_check_mcast_gpp ] <= 1; //1 + auto_axil.wdata[ctl_rx_check_ucast_gpp ] <= 0; + auto_axil.wdata[ctl_rx_check_sa_gpp ] <= 0; + auto_axil.wdata[ctl_rx_check_etype_gpp ] <= 0; + auto_axil.wdata[ctl_rx_check_opcode_gpp] <= 1; //1 + auto_axil.wdata[ctl_rx_check_opcode_ppp] <= 1; //1 + auto_axil.wdata[ctl_rx_check_mcast_ppp ] <= 1; //1 + auto_axil.wdata[ctl_rx_check_ucast_ppp ] <= 0; + auto_axil.wdata[ctl_rx_check_sa_ppp ] <= 0; + auto_axil.wdata[ctl_rx_check_etype_ppp ] <= 0; + auto_axil.wstrb <= '1; + auto_axil.wvalid <= w_req; + auto_axil.awaddr <= CONFIGURATION_RX_FLOW_CONTROL_CONTROL_REG2; + auto_axil.awvalid <= aw_req; + auto_axil.bready <= 1'b1; + if (auto_axil.wready) begin + auto_axil.wvalid <= 1'b0; + w_req <= 1'b0; + end + if (auto_axil.awready) begin + auto_axil.awvalid <= 1'b0; + aw_req <= 1'b0; + end + if (auto_axil.bvalid) begin + auto_connect_state <= ST_WR_CONFIGURATION_TX_FLOW_CONTROL_QUANTA_REG1; + w_req <= 1'b1; + aw_req <= 1'b1; + end + end + + ST_WR_CONFIGURATION_TX_FLOW_CONTROL_QUANTA_REG1: begin + mgt_axil.awready <= 0; + mgt_axil.wready <= 0; + mgt_axil.arready <= 0; + auto_axil.arvalid <= 0; + // turn on RX interface + auto_axil.wdata <= 0; + auto_axil.wdata[ctl_tx_pause_quanta0+:16] <= PAUSE_QUANTA; + auto_axil.wdata[ctl_tx_pause_quanta1+:16] <= PAUSE_QUANTA; + auto_axil.wstrb <= '1; + auto_axil.wvalid <= w_req; + auto_axil.awaddr <= CONFIGURATION_TX_FLOW_CONTROL_QUANTA_REG1; + auto_axil.awvalid <= aw_req; + auto_axil.bready <= 1'b1; + if (auto_axil.wready) begin + auto_axil.wvalid <= 1'b0; + w_req <= 1'b0; + end + if (auto_axil.awready) begin + auto_axil.awvalid <= 1'b0; + aw_req <= 1'b0; + end + if (auto_axil.bvalid) begin + auto_connect_state <= ST_WR_CONFIGURATION_TX_FLOW_CONTROL_QUANTA_REG2; + w_req <= 1'b1; + aw_req <= 1'b1; + end + end + + ST_WR_CONFIGURATION_TX_FLOW_CONTROL_QUANTA_REG2: begin + mgt_axil.awready <= 0; + mgt_axil.wready <= 0; + mgt_axil.arready <= 0; + auto_axil.arvalid <= 0; + // turn on RX interface + auto_axil.wdata <= 0; + auto_axil.wdata[ctl_tx_pause_quanta2+:16] <= PAUSE_QUANTA; + auto_axil.wdata[ctl_tx_pause_quanta3+:16] <= PAUSE_QUANTA; + auto_axil.wstrb <= '1; + auto_axil.wvalid <= w_req; + auto_axil.awaddr <= CONFIGURATION_TX_FLOW_CONTROL_QUANTA_REG2; + auto_axil.awvalid <= aw_req; + auto_axil.bready <= 1'b1; + if (auto_axil.wready) begin + auto_axil.wvalid <= 1'b0; + w_req <= 1'b0; + end + if (auto_axil.awready) begin + auto_axil.awvalid <= 1'b0; + aw_req <= 1'b0; + end + if (auto_axil.bvalid) begin + auto_connect_state <= ST_WR_CONFIGURATION_TX_FLOW_CONTROL_QUANTA_REG3; + w_req <= 1'b1; + aw_req <= 1'b1; + end + end + + ST_WR_CONFIGURATION_TX_FLOW_CONTROL_QUANTA_REG3: begin + mgt_axil.awready <= 0; + mgt_axil.wready <= 0; + mgt_axil.arready <= 0; + auto_axil.arvalid <= 0; + // turn on RX interface + auto_axil.wdata <= 0; + auto_axil.wdata[ctl_tx_pause_quanta4+:16] <= PAUSE_QUANTA; + auto_axil.wdata[ctl_tx_pause_quanta5+:16] <= PAUSE_QUANTA; + auto_axil.wstrb <= '1; + auto_axil.wvalid <= w_req; + auto_axil.awaddr <= CONFIGURATION_TX_FLOW_CONTROL_QUANTA_REG3; + auto_axil.awvalid <= aw_req; + auto_axil.bready <= 1'b1; + if (auto_axil.wready) begin + auto_axil.wvalid <= 1'b0; + w_req <= 1'b0; + end + if (auto_axil.awready) begin + auto_axil.awvalid <= 1'b0; + aw_req <= 1'b0; + end + if (auto_axil.bvalid) begin + auto_connect_state <= ST_WR_CONFIGURATION_TX_FLOW_CONTROL_QUANTA_REG4; + w_req <= 1'b1; + aw_req <= 1'b1; + end + end + + ST_WR_CONFIGURATION_TX_FLOW_CONTROL_QUANTA_REG4: begin + mgt_axil.awready <= 0; + mgt_axil.wready <= 0; + mgt_axil.arready <= 0; + auto_axil.arvalid <= 0; + // turn on RX interface + auto_axil.wdata <= 0; + auto_axil.wdata[ctl_tx_pause_quanta6+:16] <= PAUSE_QUANTA; + auto_axil.wdata[ctl_tx_pause_quanta7+:16] <= PAUSE_QUANTA; + auto_axil.wstrb <= '1; + auto_axil.wvalid <= w_req; + auto_axil.awaddr <= CONFIGURATION_TX_FLOW_CONTROL_QUANTA_REG4; + auto_axil.awvalid <= aw_req; + auto_axil.bready <= 1'b1; + if (auto_axil.wready) begin + auto_axil.wvalid <= 1'b0; + w_req <= 1'b0; + end + if (auto_axil.awready) begin + auto_axil.awvalid <= 1'b0; + aw_req <= 1'b0; + end + if (auto_axil.bvalid) begin + auto_connect_state <= ST_WR_CONFIGURATION_TX_FLOW_CONTROL_QUANTA_REG5; + w_req <= 1'b1; + aw_req <= 1'b1; + end + end + + ST_WR_CONFIGURATION_TX_FLOW_CONTROL_QUANTA_REG5: begin + mgt_axil.awready <= 0; + mgt_axil.wready <= 0; + mgt_axil.arready <= 0; + auto_axil.arvalid <= 0; + // turn on RX interface + auto_axil.wdata <= 0; + auto_axil.wdata[ctl_tx_pause_quanta8+:16] <= PAUSE_QUANTA; + auto_axil.wstrb <= '1; + auto_axil.wvalid <= w_req; + auto_axil.awaddr <= CONFIGURATION_TX_FLOW_CONTROL_QUANTA_REG5; + auto_axil.awvalid <= aw_req; + auto_axil.bready <= 1'b1; + if (auto_axil.wready) begin + auto_axil.wvalid <= 1'b0; + w_req <= 1'b0; + end + if (auto_axil.awready) begin + auto_axil.awvalid <= 1'b0; + aw_req <= 1'b0; + end + if (auto_axil.bvalid) begin + auto_connect_state <= ST_WR_CONFIGURATION_TX_FLOW_CONTROL_REFRESH_REG1; + w_req <= 1'b1; + aw_req <= 1'b1; + end + end + + ST_WR_CONFIGURATION_TX_FLOW_CONTROL_REFRESH_REG1: begin + mgt_axil.awready <= 0; + mgt_axil.wready <= 0; + mgt_axil.arready <= 0; + auto_axil.arvalid <= 0; + // turn on RX interface + auto_axil.wdata <= 0; + auto_axil.wdata[ctl_tx_pause_refresh_timer0+:16] <= PAUSE_REFRESH; + auto_axil.wdata[ctl_tx_pause_refresh_timer1+:16] <= PAUSE_REFRESH; + auto_axil.wstrb <= '1; + auto_axil.wvalid <= w_req; + auto_axil.awaddr <= CONFIGURATION_TX_FLOW_CONTROL_REFRESH_REG1; + auto_axil.awvalid <= aw_req; + auto_axil.bready <= 1'b1; + if (auto_axil.wready) begin + auto_axil.wvalid <= 1'b0; + w_req <= 1'b0; + end + if (auto_axil.awready) begin + auto_axil.awvalid <= 1'b0; + aw_req <= 1'b0; + end + if (auto_axil.bvalid) begin + auto_connect_state <= ST_WR_CONFIGURATION_TX_FLOW_CONTROL_REFRESH_REG2; + w_req <= 1'b1; + aw_req <= 1'b1; + end + end + + ST_WR_CONFIGURATION_TX_FLOW_CONTROL_REFRESH_REG2: begin + mgt_axil.awready <= 0; + mgt_axil.wready <= 0; + mgt_axil.arready <= 0; + auto_axil.arvalid <= 0; + // turn on RX interface + auto_axil.wdata <= 0; + auto_axil.wdata[ctl_tx_pause_refresh_timer2+:16] <= PAUSE_REFRESH; + auto_axil.wdata[ctl_tx_pause_refresh_timer3+:16] <= PAUSE_REFRESH; + auto_axil.wstrb <= '1; + auto_axil.wvalid <= w_req; + auto_axil.awaddr <= CONFIGURATION_TX_FLOW_CONTROL_REFRESH_REG2; + auto_axil.awvalid <= aw_req; + auto_axil.bready <= 1'b1; + if (auto_axil.wready) begin + auto_axil.wvalid <= 1'b0; + w_req <= 1'b0; + end + if (auto_axil.awready) begin + auto_axil.awvalid <= 1'b0; + aw_req <= 1'b0; + end + if (auto_axil.bvalid) begin + auto_connect_state <= ST_WR_CONFIGURATION_TX_FLOW_CONTROL_REFRESH_REG3; + w_req <= 1'b1; + aw_req <= 1'b1; + end + end + + ST_WR_CONFIGURATION_TX_FLOW_CONTROL_REFRESH_REG3: begin + mgt_axil.awready <= 0; + mgt_axil.wready <= 0; + mgt_axil.arready <= 0; + auto_axil.arvalid <= 0; + // turn on RX interface + auto_axil.wdata <= 0; + auto_axil.wdata[ctl_tx_pause_refresh_timer4+:16] <= PAUSE_REFRESH; + auto_axil.wdata[ctl_tx_pause_refresh_timer5+:16] <= PAUSE_REFRESH; + auto_axil.wstrb <= '1; + auto_axil.wvalid <= w_req; + auto_axil.awaddr <= CONFIGURATION_TX_FLOW_CONTROL_REFRESH_REG3; + auto_axil.awvalid <= aw_req; + auto_axil.bready <= 1'b1; + if (auto_axil.wready) begin + auto_axil.wvalid <= 1'b0; + w_req <= 1'b0; + end + if (auto_axil.awready) begin + auto_axil.awvalid <= 1'b0; + aw_req <= 1'b0; + end + if (auto_axil.bvalid) begin + auto_connect_state <= ST_WR_CONFIGURATION_TX_FLOW_CONTROL_REFRESH_REG4; + w_req <= 1'b1; + aw_req <= 1'b1; + end + end + + ST_WR_CONFIGURATION_TX_FLOW_CONTROL_REFRESH_REG4: begin + mgt_axil.awready <= 0; + mgt_axil.wready <= 0; + mgt_axil.arready <= 0; + auto_axil.arvalid <= 0; + // turn on RX interface + auto_axil.wdata <= 0; + auto_axil.wdata[ctl_tx_pause_refresh_timer6+:16] <= PAUSE_REFRESH; + auto_axil.wdata[ctl_tx_pause_refresh_timer7+:16] <= PAUSE_REFRESH; + auto_axil.wstrb <= '1; + auto_axil.wvalid <= w_req; + auto_axil.awaddr <= CONFIGURATION_TX_FLOW_CONTROL_REFRESH_REG4; + auto_axil.awvalid <= aw_req; + auto_axil.bready <= 1'b1; + if (auto_axil.wready) begin + auto_axil.wvalid <= 1'b0; + w_req <= 1'b0; + end + if (auto_axil.awready) begin + auto_axil.awvalid <= 1'b0; + aw_req <= 1'b0; + end + if (auto_axil.bvalid) begin + auto_connect_state <= ST_WR_CONFIGURATION_TX_FLOW_CONTROL_REFRESH_REG5; + w_req <= 1'b1; + aw_req <= 1'b1; + end + end + + ST_WR_CONFIGURATION_TX_FLOW_CONTROL_REFRESH_REG5: begin + mgt_axil.awready <= 0; + mgt_axil.wready <= 0; + mgt_axil.arready <= 0; + auto_axil.arvalid <= 0; + // turn on RX interface + auto_axil.wdata <= 0; + auto_axil.wdata[ctl_tx_pause_refresh_timer8+:16] <= PAUSE_REFRESH; + auto_axil.wstrb <= '1; + auto_axil.wvalid <= w_req; + auto_axil.awaddr <= CONFIGURATION_TX_FLOW_CONTROL_REFRESH_REG5; + auto_axil.awvalid <= aw_req; + auto_axil.bready <= 1'b1; + if (auto_axil.wready) begin + auto_axil.wvalid <= 1'b0; + w_req <= 1'b0; + end + if (auto_axil.awready) begin + auto_axil.awvalid <= 1'b0; + aw_req <= 1'b0; + end + if (auto_axil.bvalid) begin + auto_connect_state <= ST_WR_CONFIGURATION_TX_FLOW_CONTROL_CONTROL_REG1; + w_req <= 1'b1; + aw_req <= 1'b1; + end + end + + ST_WR_CONFIGURATION_TX_FLOW_CONTROL_CONTROL_REG1: begin + mgt_axil.awready <= 0; + mgt_axil.wready <= 0; + mgt_axil.arready <= 0; + auto_axil.arvalid <= 0; + // turn on RX interface + auto_axil.wdata <= 0; + // 1FF + auto_axil.wdata[ctl_tx_pause_enable+:9] <= '1; + auto_axil.wstrb <= '1; + auto_axil.wvalid <= w_req; + auto_axil.awaddr <= CONFIGURATION_TX_FLOW_CONTROL_CONTROL_REG1; + auto_axil.awvalid <= aw_req; + auto_axil.bready <= 1'b1; + if (auto_axil.wready) begin + auto_axil.wvalid <= 1'b0; + w_req <= 1'b0; + end + if (auto_axil.awready) begin + auto_axil.awvalid <= 1'b0; + aw_req <= 1'b0; + end + if (auto_axil.bvalid) begin + auto_connect_state <= ST_READY; + end + end + + ST_READY: begin + stat_auto_config_done_bclk <= 1'b1; + if (!stat_rx_aligned_bclk) begin + auto_connect_state <= ST_RESET; + end + end + + endcase + end + end + end + + always_comb begin + `AXI4LITE_ASSIGN(mgt_axil_v,auto_axil) + + // window address to 0x0000-x1FFF + mgt_axil_v.araddr = 0; + mgt_axil_v.araddr[12:0] = auto_axil.araddr[12:0]; + // window address to 0x0000-x1FFF + mgt_axil_v.awaddr = 0; + mgt_axil_v.awaddr[12:0] = auto_axil.awaddr[12:0]; + end + + end else begin : no_auto_connect + + always_comb begin + `AXI4LITE_ASSIGN(mgt_axil_v,mgt_axil) + + // window address to 0x0000-x1FFF + mgt_axil_v.araddr = 0; + mgt_axil_v.araddr[12:0] = mgt_axil.araddr[12:0]; + // window address to 0x0000-x1FFF + mgt_axil_v.awaddr = 0; + mgt_axil_v.awaddr[12:0] = mgt_axil.awaddr[12:0]; + + stat_auto_config_done_bclk = 1'b1; + end + end + + import PkgEth100gLbus::*; + + + lbus_t lbus_rx [3:0]; + lbus_t lbus_tx [3:0]; + logic lbus_tx_rdyout; + + eth_100g_lbus2axi #(.NUM_SEG(4)) lbus2axi ( + .axis(eth100g_rx), + .lbus_in(lbus_rx) + ); + + eth_100g_axi2lbus #(.NUM_SEG(4)) axi2lbus ( + .axis(eth100g_tx), + .lbus_rdy(lbus_tx_rdyout), + .lbus_out(lbus_tx) + ); + + eth_100g_bd eth_100g_bd_i ( + .refclk_clk_n(refclk_n), + .refclk_clk_p(refclk_p), + .gt_rx_gt_port_0_n(rx_n[0]), + .gt_rx_gt_port_0_p(rx_p[0]), + .gt_rx_gt_port_1_n(rx_n[1]), + .gt_rx_gt_port_1_p(rx_p[1]), + .gt_rx_gt_port_2_n(rx_n[2]), + .gt_rx_gt_port_2_p(rx_p[2]), + .gt_rx_gt_port_3_n(rx_n[3]), + .gt_rx_gt_port_3_p(rx_p[3]), + .init_clk(clk100), + .gt_tx_gt_port_0_n(tx_n[0]), + .gt_tx_gt_port_0_p(tx_p[0]), + .gt_tx_gt_port_1_n(tx_n[1]), + .gt_tx_gt_port_1_p(tx_p[1]), + .gt_tx_gt_port_2_n(tx_n[2]), + .gt_tx_gt_port_2_p(tx_p[2]), + .gt_tx_gt_port_3_n(tx_n[3]), + .gt_tx_gt_port_3_p(tx_p[3]), + .sys_reset(areset), + .usr_rx_reset(usr_rx_reset), + .usr_tx_reset(usr_tx_reset), + .gt_txusrclk2(mgt_clk), + .rx_clk(mgt_clk), //feedback in + .tx_ovfout(tx_ovfout), + .tx_unfout(tx_unfout), + .stat_rx_aligned(stat_rx_aligned), + .drp_clk(clk100), + .core_drp_daddr(10'b0), + .core_drp_den(1'b0), + .core_drp_di(16'b0), + .core_drp_do(), + .core_drp_drdy(), + .core_drp_dwe(1'b0), + `AXI4LITE_PORT_ASSIGN(s_axi,mgt_axil_v) + .pm_tick(pm_tick), + .ctl_tx_pause_req(ctl_tx_pause_req), + .ctl_tx_resend_pause(ctl_tx_resend_pause), + .stat_rx_pause_req(stat_rx_pause_req), + .eth100g_rx_lbus_seg0_data(lbus_rx[0].data), + .eth100g_rx_lbus_seg0_ena(lbus_rx[0].ena), + .eth100g_rx_lbus_seg0_eop(lbus_rx[0].eop), + .eth100g_rx_lbus_seg0_err(lbus_rx[0].err), + .eth100g_rx_lbus_seg0_mty(lbus_rx[0].mty), + .eth100g_rx_lbus_seg0_sop(lbus_rx[0].sop), + .eth100g_rx_lbus_seg1_data(lbus_rx[1].data), + .eth100g_rx_lbus_seg1_ena(lbus_rx[1].ena), + .eth100g_rx_lbus_seg1_eop(lbus_rx[1].eop), + .eth100g_rx_lbus_seg1_err(lbus_rx[1].err), + .eth100g_rx_lbus_seg1_mty(lbus_rx[1].mty), + .eth100g_rx_lbus_seg1_sop(lbus_rx[1].sop), + .eth100g_rx_lbus_seg2_data(lbus_rx[2].data), + .eth100g_rx_lbus_seg2_ena(lbus_rx[2].ena), + .eth100g_rx_lbus_seg2_eop(lbus_rx[2].eop), + .eth100g_rx_lbus_seg2_err(lbus_rx[2].err), + .eth100g_rx_lbus_seg2_mty(lbus_rx[2].mty), + .eth100g_rx_lbus_seg2_sop(lbus_rx[2].sop), + .eth100g_rx_lbus_seg3_data(lbus_rx[3].data), + .eth100g_rx_lbus_seg3_ena(lbus_rx[3].ena), + .eth100g_rx_lbus_seg3_eop(lbus_rx[3].eop), + .eth100g_rx_lbus_seg3_err(lbus_rx[3].err), + .eth100g_rx_lbus_seg3_mty(lbus_rx[3].mty), + .eth100g_rx_lbus_seg3_sop(lbus_rx[3].sop), + .eth100g_tx_lbus_seg0_data(lbus_tx[0].data), + .eth100g_tx_lbus_seg0_ena(lbus_tx[0].ena), + .eth100g_tx_lbus_seg0_eop(lbus_tx[0].eop), + .eth100g_tx_lbus_seg0_err(lbus_tx[0].err), + .eth100g_tx_lbus_seg0_mty(lbus_tx[0].mty), + .eth100g_tx_lbus_seg0_sop(lbus_tx[0].sop), + .eth100g_tx_lbus_seg1_data(lbus_tx[1].data), + .eth100g_tx_lbus_seg1_ena(lbus_tx[1].ena), + .eth100g_tx_lbus_seg1_eop(lbus_tx[1].eop), + .eth100g_tx_lbus_seg1_err(lbus_tx[1].err), + .eth100g_tx_lbus_seg1_mty(lbus_tx[1].mty), + .eth100g_tx_lbus_seg1_sop(lbus_tx[1].sop), + .eth100g_tx_lbus_seg2_data(lbus_tx[2].data), + .eth100g_tx_lbus_seg2_ena(lbus_tx[2].ena), + .eth100g_tx_lbus_seg2_eop(lbus_tx[2].eop), + .eth100g_tx_lbus_seg2_err(lbus_tx[2].err), + .eth100g_tx_lbus_seg2_mty(lbus_tx[2].mty), + .eth100g_tx_lbus_seg2_sop(lbus_tx[2].sop), + .eth100g_tx_lbus_seg3_data(lbus_tx[3].data), + .eth100g_tx_lbus_seg3_ena(lbus_tx[3].ena), + .eth100g_tx_lbus_seg3_eop(lbus_tx[3].eop), + .eth100g_tx_lbus_seg3_err(lbus_tx[3].err), + .eth100g_tx_lbus_seg3_mty(lbus_tx[3].mty), + .eth100g_tx_lbus_seg3_sop(lbus_tx[3].sop), + .eth100g_tx_tx_rdyout(lbus_tx_rdyout)); + +endmodule diff --git a/fpga/usrp3/top/x400/ip/eth_100g_bd/eth_100g_axis2lbus.sv b/fpga/usrp3/top/x400/ip/eth_100g_bd/eth_100g_axis2lbus.sv new file mode 100644 index 000000000..a3c319043 --- /dev/null +++ b/fpga/usrp3/top/x400/ip/eth_100g_bd/eth_100g_axis2lbus.sv @@ -0,0 +1,120 @@ +// +// Copyright 2021 Ettus Research, A National Instruments Brand +// +// SPDX-License-Identifier: LGPL-3.0-or-later +// +// Module: eth_100g_axi2lbus +// +// Description: +// Translate from AXI4S (Xilinx segmented ifc) to lbus. +// +// Built using example provided from Xilinx +// +// Parameters: +// - FIFO_DEPTH - FIFO will be 2** deep +// - NUM_SEG - Number of lbus segments coming in + +import PkgEth100gLbus::*; + +module eth_100g_axi2lbus #( + parameter FIFO_DEPTH = 5, + parameter NUM_SEG = 4 +) +( + + // AXIS IF + AxiStreamIf.slave axis, + + // Lbus Segments + + input logic lbus_rdy, + output lbus_t lbus_out [NUM_SEG-1:0] + +); + + localparam SEG_DATA_WIDTH = DATA_WIDTH/NUM_SEG; + localparam SEG_BYTES = SEG_DATA_WIDTH/8; + localparam SEG_MTY_WIDTH = $clog2(SEG_BYTES); + + // post rotation lbus signals + lbus_t lbus_d [NUM_SEG-1:0]; + + // Find last so we can find SOP + logic found_last; + + // Propagate ready when asserting , propagate delayed ready while deasserting + logic axis_tready_i; + assign axis.tready = axis_tready_i | lbus_rdy; + + always @(posedge axis.clk) begin + axis_tready_i <= lbus_rdy; + end + + //declare a segment width axis bus so I can use it's methods + AxiStreamIf #(.DATA_WIDTH(SEG_DATA_WIDTH),.USER_WIDTH($clog2(SEG_BYTES))) + seg_axi (axis.clk, axis.rst); + assign seg_axi.tlast = 1'b1; + + logic [NUM_SEG:0] valid; + assign valid[NUM_SEG] = 1'b0; + + genvar b; + genvar s; + generate begin : lbus_gen + for (s=0; s < NUM_SEG; s=s+1) begin : segment_loop + // Reverse data byte ordering on each segment + for (b = 0; b < DATA_WIDTH/32; b=b+1) begin : byte_loop + assign lbus_d[s].data[b*8 +: 8] = axis.tdata[((s+1)*(DATA_WIDTH/NUM_SEG)-8-(b*8)) +: 8]; + end : byte_loop + // valid if tkeep is set for any bytes in the segment + assign valid[s] = (| axis.tkeep[s*SEG_BYTES +: SEG_BYTES]) & axis.tvalid; + // enable when valid and transfering + assign lbus_d[s].ena = valid[s] & axis.tready; + // eop on last valid byte if last is set + // we init an extra valid bit to 0 so if all valid bits for all segments are set we trigger an eop on the final segment + assign lbus_d[s].eop = (valid[s] ^ valid[s+1]) & axis.tlast; + // set error on all segmetns if tuser is set + assign lbus_d[s].err = valid[s] & axis.tuser; + // translate keep to trailing bytes and invert sign + always_comb begin + if (lbus_d[s].eop) begin + lbus_d[s].mty = SEG_BYTES - seg_axi.keep2trailing(axis.tkeep[s*SEG_BYTES+: SEG_BYTES]); + end else begin + lbus_d[s].mty = 'b0; + end + end + //SOP can only occur on segment 0, so init all the bits to zero, then assign segment 0 + if (s==0) begin + assign lbus_d[s].sop = found_last & axis.tvalid & axis.tready; + end else begin + assign lbus_d[s].sop = 1'b0; + end + // assign the output DFF's + always_ff @(posedge axis.clk) begin + lbus_out[s].data <= lbus_d[s].data; + lbus_out[s].ena <= lbus_d[s].ena; + lbus_out[s].sop <= lbus_d[s].sop; + lbus_out[s].eop <= lbus_d[s].eop; + lbus_out[s].err <= lbus_d[s].err; + lbus_out[s].mty <= lbus_d[s].mty; + end + + end : segment_loop + end : lbus_gen + endgenerate + + + + // SOP Statemachine + always_ff @(posedge axis.clk) begin : sop_sm + if(axis.rst) begin + found_last <= 1'b1; + end else begin + if(axis.tvalid & axis.tlast & axis.tready) found_last <= 1'b1; + else if(axis.tvalid & axis.tready) found_last <= 1'b0; + end + end : sop_sm + +endmodule + + diff --git a/fpga/usrp3/top/x400/ip/eth_100g_bd/eth_100g_bd.tcl b/fpga/usrp3/top/x400/ip/eth_100g_bd/eth_100g_bd.tcl new file mode 100644 index 000000000..624e0902e --- /dev/null +++ b/fpga/usrp3/top/x400/ip/eth_100g_bd/eth_100g_bd.tcl @@ -0,0 +1,361 @@ + +################################################################ +# This is a generated script based on design: eth_100g_bd +# +# Though there are limitations about the generated script, +# the main purpose of this utility is to make learning +# IP Integrator Tcl commands easier. +################################################################ + +namespace eval _tcl { +proc get_script_folder {} { + set script_path [file normalize [info script]] + set script_folder [file dirname $script_path] + return $script_folder +} +} +variable script_folder +set script_folder [_tcl::get_script_folder] + +################################################################ +# Check if script is running in correct Vivado version. +################################################################ +set scripts_vivado_version 2019.1 +set current_vivado_version [version -short] + +if { [string first $scripts_vivado_version $current_vivado_version] == -1 } { + puts "" + catch {common::send_msg_id "BD_TCL-109" "ERROR" "This script was generated using Vivado <$scripts_vivado_version> and is being run in <$current_vivado_version> of Vivado. Please run the script in Vivado <$scripts_vivado_version> then open the design in Vivado <$current_vivado_version>. Upgrade the design by running \"Tools => Report => Report IP Status...\", then run write_bd_tcl to create an updated script."} + + return 1 +} + +################################################################ +# START +################################################################ + +# To test this script, run the following commands from Vivado Tcl console: +# source eth_100g_bd_script.tcl + +# If there is no project opened, this script will create a +# project, but make sure you do not have an existing project +# <./myproj/project_1.xpr> in the current working folder. + +set list_projs [get_projects -quiet] +if { $list_projs eq "" } { + create_project project_1 myproj -part xczu28dr-ffvg1517-1-e +} + + +# CHANGE DESIGN NAME HERE +variable design_name +set design_name eth_100g_bd + +# If you do not already have an existing IP Integrator design open, +# you can create a design using the following command: +# create_bd_design $design_name + +# Creating design if needed +set errMsg "" +set nRet 0 + +set cur_design [current_bd_design -quiet] +set list_cells [get_bd_cells -quiet] + +if { ${design_name} eq "" } { + # USE CASES: + # 1) Design_name not set + + set errMsg "Please set the variable to a non-empty value." + set nRet 1 + +} elseif { ${cur_design} ne "" && ${list_cells} eq "" } { + # USE CASES: + # 2): Current design opened AND is empty AND names same. + # 3): Current design opened AND is empty AND names diff; design_name NOT in project. + # 4): Current design opened AND is empty AND names diff; design_name exists in project. + + if { $cur_design ne $design_name } { + common::send_msg_id "BD_TCL-001" "INFO" "Changing value of from <$design_name> to <$cur_design> since current design is empty." + set design_name [get_property NAME $cur_design] + } + common::send_msg_id "BD_TCL-002" "INFO" "Constructing design in IPI design <$cur_design>..." + +} elseif { ${cur_design} ne "" && $list_cells ne "" && $cur_design eq $design_name } { + # USE CASES: + # 5) Current design opened AND has components AND same names. + + set errMsg "Design <$design_name> already exists in your project, please set the variable to another value." + set nRet 1 +} elseif { [get_files -quiet ${design_name}.bd] ne "" } { + # USE CASES: + # 6) Current opened design, has components, but diff names, design_name exists in project. + # 7) No opened design, design_name exists in project. + + set errMsg "Design <$design_name> already exists in your project, please set the variable to another value." + set nRet 2 + +} else { + # USE CASES: + # 8) No opened design, design_name not in project. + # 9) Current opened design, has components, but diff names, design_name not in project. + + common::send_msg_id "BD_TCL-003" "INFO" "Currently there is no design <$design_name> in project, so creating one..." + + create_bd_design $design_name + + common::send_msg_id "BD_TCL-004" "INFO" "Making design <$design_name> as current_bd_design." + current_bd_design $design_name + +} + +common::send_msg_id "BD_TCL-005" "INFO" "Currently the variable is equal to \"$design_name\"." + +if { $nRet != 0 } { + catch {common::send_msg_id "BD_TCL-114" "ERROR" $errMsg} + return $nRet +} + +set bCheckIPsPassed 1 +################################################################## +# CHECK IPs +################################################################## +set bCheckIPs 1 +if { $bCheckIPs == 1 } { + set list_check_ips "\ +xilinx.com:ip:cmac_usplus:2.6\ +xilinx.com:ip:xlconstant:1.1\ +" + + set list_ips_missing "" + common::send_msg_id "BD_TCL-006" "INFO" "Checking if the following IPs exist in the project's IP catalog: $list_check_ips ." + + foreach ip_vlnv $list_check_ips { + set ip_obj [get_ipdefs -all $ip_vlnv] + if { $ip_obj eq "" } { + lappend list_ips_missing $ip_vlnv + } + } + + if { $list_ips_missing ne "" } { + catch {common::send_msg_id "BD_TCL-115" "ERROR" "The following IPs are not found in the IP Catalog:\n $list_ips_missing\n\nResolution: Please add the repository containing the IP(s) to the project." } + set bCheckIPsPassed 0 + } + +} + +if { $bCheckIPsPassed != 1 } { + common::send_msg_id "BD_TCL-1003" "WARNING" "Will not continue with creation of design due to the error(s) above." + return 3 +} + +################################################################## +# DESIGN PROCs +################################################################## + + + +# Procedure to create entire design; Provide argument to make +# procedure reusable. If parentCell is "", will use root. +proc create_root_design { parentCell } { + + variable script_folder + variable design_name + + if { $parentCell eq "" } { + set parentCell [get_bd_cells /] + } + + # Get object for parentCell + set parentObj [get_bd_cells $parentCell] + if { $parentObj == "" } { + catch {common::send_msg_id "BD_TCL-100" "ERROR" "Unable to find parent cell <$parentCell>!"} + return + } + + # Make sure parentObj is hier blk + set parentType [get_property TYPE $parentObj] + if { $parentType ne "hier" } { + catch {common::send_msg_id "BD_TCL-101" "ERROR" "Parent <$parentObj> has TYPE = <$parentType>. Expected to be ."} + return + } + + # Save current instance; Restore later + set oldCurInst [current_bd_instance .] + + # Set parent object as current + current_bd_instance $parentObj + + + # Create interface ports + set core_drp [ create_bd_intf_port -mode Slave -vlnv xilinx.com:interface:drp_rtl:1.0 core_drp ] + + set eth100g_rx [ create_bd_intf_port -mode Master -vlnv xilinx.com:display_cmac_usplus:lbus_ports:2.0 eth100g_rx ] + + set eth100g_tx [ create_bd_intf_port -mode Slave -vlnv xilinx.com:display_cmac_usplus:lbus_ports:2.0 eth100g_tx ] + + set gt_rx [ create_bd_intf_port -mode Slave -vlnv xilinx.com:display_cmac_usplus:gt_ports:2.0 gt_rx ] + + set gt_tx [ create_bd_intf_port -mode Master -vlnv xilinx.com:display_cmac_usplus:gt_ports:2.0 gt_tx ] + + set refclk [ create_bd_intf_port -mode Slave -vlnv xilinx.com:interface:diff_clock_rtl:1.0 refclk ] + set_property -dict [ list \ + CONFIG.FREQ_HZ {156250000} \ + ] $refclk + + set s_axi [ create_bd_intf_port -mode Slave -vlnv xilinx.com:interface:aximm_rtl:1.0 s_axi ] + set_property -dict [ list \ + CONFIG.ADDR_WIDTH {32} \ + CONFIG.ARUSER_WIDTH {0} \ + CONFIG.AWUSER_WIDTH {0} \ + CONFIG.BUSER_WIDTH {0} \ + CONFIG.DATA_WIDTH {32} \ + CONFIG.HAS_BRESP {1} \ + CONFIG.HAS_BURST {0} \ + CONFIG.HAS_CACHE {0} \ + CONFIG.HAS_LOCK {0} \ + CONFIG.HAS_PROT {0} \ + CONFIG.HAS_QOS {0} \ + CONFIG.HAS_REGION {0} \ + CONFIG.HAS_RRESP {1} \ + CONFIG.HAS_WSTRB {1} \ + CONFIG.ID_WIDTH {0} \ + CONFIG.MAX_BURST_LENGTH {1} \ + CONFIG.NUM_READ_OUTSTANDING {1} \ + CONFIG.NUM_READ_THREADS {1} \ + CONFIG.NUM_WRITE_OUTSTANDING {1} \ + CONFIG.NUM_WRITE_THREADS {1} \ + CONFIG.PROTOCOL {AXI4LITE} \ + CONFIG.READ_WRITE_MODE {READ_WRITE} \ + CONFIG.RUSER_BITS_PER_BYTE {0} \ + CONFIG.RUSER_WIDTH {0} \ + CONFIG.SUPPORTS_NARROW_BURST {0} \ + CONFIG.WUSER_BITS_PER_BYTE {0} \ + CONFIG.WUSER_WIDTH {0} \ + ] $s_axi + + + # Create ports + set ctl_tx_pause_req [ create_bd_port -dir I -from 8 -to 0 ctl_tx_pause_req ] + set ctl_tx_resend_pause [ create_bd_port -dir I ctl_tx_resend_pause ] + set drp_clk [ create_bd_port -dir I -type clk drp_clk ] + set gt_txusrclk2 [ create_bd_port -dir O -type clk gt_txusrclk2 ] + set_property -dict [ list \ + CONFIG.ASSOCIATED_BUSIF {eth100g_rx:eth100g_tx} \ + CONFIG.FREQ_HZ {322265625} \ + ] $gt_txusrclk2 + set init_clk [ create_bd_port -dir I -type clk init_clk ] + set pm_tick [ create_bd_port -dir I pm_tick ] + set rx_clk [ create_bd_port -dir I -type clk rx_clk ] + set_property -dict [ list \ + CONFIG.FREQ_HZ {322265625} \ + ] $rx_clk + set s_axi_aclk [ create_bd_port -dir I -type clk s_axi_aclk ] + set s_axi_sreset [ create_bd_port -dir I -type rst s_axi_sreset ] + set_property -dict [ list \ + CONFIG.POLARITY {ACTIVE_HIGH} \ + ] $s_axi_sreset + set stat_rx_aligned [ create_bd_port -dir O stat_rx_aligned ] + set stat_rx_pause_req [ create_bd_port -dir O -from 8 -to 0 stat_rx_pause_req ] + set sys_reset [ create_bd_port -dir I -type rst sys_reset ] + set_property -dict [ list \ + CONFIG.POLARITY {ACTIVE_HIGH} \ + ] $sys_reset + set tx_ovfout [ create_bd_port -dir O tx_ovfout ] + set tx_unfout [ create_bd_port -dir O tx_unfout ] + set usr_rx_reset [ create_bd_port -dir O -type rst usr_rx_reset ] + set usr_tx_reset [ create_bd_port -dir O -type rst usr_tx_reset ] + + # Create instance: cmac_usplus_0, and set properties + set cmac_usplus_0 [ create_bd_cell -type ip -vlnv xilinx.com:ip:cmac_usplus:2.6 cmac_usplus_0 ] + set_property -dict [ list \ + CONFIG.CMAC_CAUI4_MODE {1} \ + CONFIG.CMAC_CORE_SELECT {CMACE4_X0Y0} \ + CONFIG.ENABLE_AXI_INTERFACE {1} \ + CONFIG.GT_DRP_CLK {100} \ + CONFIG.GT_GROUP_SELECT {X0Y4~X0Y7} \ + CONFIG.GT_REF_CLK_FREQ {156.25} \ + CONFIG.INCLUDE_AUTO_NEG_LT_LOGIC {0} \ + CONFIG.INCLUDE_RS_FEC {1} \ + CONFIG.INCLUDE_SHARED_LOGIC {2} \ + CONFIG.INCLUDE_STATISTICS_COUNTERS {1} \ + CONFIG.LANE10_GT_LOC {NA} \ + CONFIG.LANE1_GT_LOC {X0Y4} \ + CONFIG.LANE2_GT_LOC {X0Y5} \ + CONFIG.LANE3_GT_LOC {X0Y6} \ + CONFIG.LANE4_GT_LOC {X0Y7} \ + CONFIG.LANE5_GT_LOC {NA} \ + CONFIG.LANE6_GT_LOC {NA} \ + CONFIG.LANE7_GT_LOC {NA} \ + CONFIG.LANE8_GT_LOC {NA} \ + CONFIG.LANE9_GT_LOC {NA} \ + CONFIG.NUM_LANES {4} \ + CONFIG.RX_CHECK_ACK {0} \ + CONFIG.RX_EQ_MODE {AUTO} \ + CONFIG.RX_FLOW_CONTROL {1} \ + CONFIG.TX_FLOW_CONTROL {1} \ + CONFIG.USER_INTERFACE {LBUS} \ + ] $cmac_usplus_0 + + # Create instance: tie_loopback, and set properties + set tie_loopback [ create_bd_cell -type ip -vlnv xilinx.com:ip:xlconstant:1.1 tie_loopback ] + set_property -dict [ list \ + CONFIG.CONST_VAL {0} \ + CONFIG.CONST_WIDTH {12} \ + ] $tie_loopback + + # Create instance: tie_zero, and set properties + set tie_zero [ create_bd_cell -type ip -vlnv xilinx.com:ip:xlconstant:1.1 tie_zero ] + set_property -dict [ list \ + CONFIG.CONST_VAL {0} \ + ] $tie_zero + + # Create interface connections + connect_bd_intf_net -intf_net RefClk_1 [get_bd_intf_ports refclk] [get_bd_intf_pins cmac_usplus_0/gt_ref_clk] + connect_bd_intf_net -intf_net Rx_1 [get_bd_intf_ports gt_rx] [get_bd_intf_pins cmac_usplus_0/gt_rx] + connect_bd_intf_net -intf_net cmac_usplus_0_gt_tx [get_bd_intf_ports gt_tx] [get_bd_intf_pins cmac_usplus_0/gt_tx] + connect_bd_intf_net -intf_net cmac_usplus_0_lbus_rx [get_bd_intf_ports eth100g_rx] [get_bd_intf_pins cmac_usplus_0/lbus_rx] + connect_bd_intf_net -intf_net eth_100g_tx_1 [get_bd_intf_ports eth100g_tx] [get_bd_intf_pins cmac_usplus_0/lbus_tx] + connect_bd_intf_net -intf_net sDrp_1 [get_bd_intf_ports core_drp] [get_bd_intf_pins cmac_usplus_0/core_drp] + connect_bd_intf_net -intf_net s_axi_1 [get_bd_intf_ports s_axi] [get_bd_intf_pins cmac_usplus_0/s_axi] + + # Create port connections + connect_bd_net -net SysClk_1 [get_bd_ports init_clk] [get_bd_pins cmac_usplus_0/init_clk] + connect_bd_net -net aResetIn_1 [get_bd_ports sys_reset] [get_bd_pins cmac_usplus_0/sys_reset] + connect_bd_net -net cmac_usplus_0_gt_txusrclk2 [get_bd_ports gt_txusrclk2] [get_bd_pins cmac_usplus_0/gt_txusrclk2] + connect_bd_net -net cmac_usplus_0_stat_rx_aligned [get_bd_ports stat_rx_aligned] [get_bd_pins cmac_usplus_0/stat_rx_aligned] + connect_bd_net -net cmac_usplus_0_stat_rx_pause_req [get_bd_ports stat_rx_pause_req] [get_bd_pins cmac_usplus_0/stat_rx_pause_req] + connect_bd_net -net cmac_usplus_0_tx_ovfout [get_bd_ports tx_ovfout] [get_bd_pins cmac_usplus_0/tx_ovfout] + connect_bd_net -net cmac_usplus_0_tx_unfout [get_bd_ports tx_unfout] [get_bd_pins cmac_usplus_0/tx_unfout] + connect_bd_net -net cmac_usplus_0_usr_rx_reset [get_bd_ports usr_rx_reset] [get_bd_pins cmac_usplus_0/usr_rx_reset] + connect_bd_net -net cmac_usplus_0_usr_tx_reset [get_bd_ports usr_tx_reset] [get_bd_pins cmac_usplus_0/usr_tx_reset] + connect_bd_net -net ctl_tx_pause_req_1 [get_bd_ports ctl_tx_pause_req] [get_bd_pins cmac_usplus_0/ctl_tx_pause_req] + connect_bd_net -net ctl_tx_resend_pause_1 [get_bd_ports ctl_tx_resend_pause] [get_bd_pins cmac_usplus_0/ctl_tx_resend_pause] + connect_bd_net -net drp_clk_1 [get_bd_ports drp_clk] [get_bd_pins cmac_usplus_0/drp_clk] + connect_bd_net -net pm_tick_1 [get_bd_ports pm_tick] [get_bd_pins cmac_usplus_0/pm_tick] + connect_bd_net -net rx_clk_1 [get_bd_ports rx_clk] [get_bd_pins cmac_usplus_0/rx_clk] + connect_bd_net -net s_axi_aclk_1 [get_bd_ports s_axi_aclk] [get_bd_pins cmac_usplus_0/s_axi_aclk] + connect_bd_net -net s_axi_sreset_1 [get_bd_ports s_axi_sreset] [get_bd_pins cmac_usplus_0/s_axi_sreset] + connect_bd_net -net tie_loopback_dout [get_bd_pins cmac_usplus_0/gt_loopback_in] [get_bd_pins tie_loopback/dout] + connect_bd_net -net tie_zero_dout [get_bd_pins cmac_usplus_0/gtwiz_reset_rx_datapath] [get_bd_pins cmac_usplus_0/gtwiz_reset_tx_datapath] [get_bd_pins tie_zero/dout] + + # Create address segments + create_bd_addr_seg -range 0x00002000 -offset 0x00000000 [get_bd_addr_spaces s_axi] [get_bd_addr_segs cmac_usplus_0/s_axi/Reg] SEG_cmac_usplus_0_Reg + + + # Restore current instance + current_bd_instance $oldCurInst + + validate_bd_design + save_bd_design +} +# End of create_root_design() + + +################################################################## +# MAIN FLOW +################################################################## + +create_root_design "" + + diff --git a/fpga/usrp3/top/x400/ip/eth_100g_bd/eth_100g_lbus2axis.sv b/fpga/usrp3/top/x400/ip/eth_100g_bd/eth_100g_lbus2axis.sv new file mode 100644 index 000000000..0fd1ab42f --- /dev/null +++ b/fpga/usrp3/top/x400/ip/eth_100g_bd/eth_100g_lbus2axis.sv @@ -0,0 +1,555 @@ +// +// Copyright 2021 Ettus Research, A National Instruments Brand +// +// SPDX-License-Identifier: LGPL-3.0-or-later +// +// Module: eth_100g_lbus2axi +// +// Description: +// Translate from lbus (xilinx segmented ifc) to +// AXI4S. +// +// Built using example provided from Xilinx +// +// Parameters: +// - FIFO_DEPTH - FIFO will be 2** deep +// - NUM_SEG - Number of lbus segments coming in +// +// Notes on timing difficulty +// The path back to pop is challenged +// -LBUS is popped out of the FIFO (SRL read can be slow) +// -LBUS is rotated N to 1 Mux (N= number of segments) For 100g N=4 +// -Find where EOP is (search for the first 1) +// -Unrotate the number of words and use that to calculate pop +// +// Fifo Output +// Data starts from the SRL and is indexed by the read pointer +// Data_Valid comes from a comparison on fullness +// Invalid control is forced to zero (necessary for algorithm) +// It's not necessary to force all the data to zero just the control plane. +// +// Fifo output data is rotated (4 to 1) mux then reinterpreted as lbus data +// +// The rotated control signals are analyzed to determine +// no_eop, no_sop, some_empty, no_ena +// +// eop is specifically inspected in a 4in,4out function to find a pseudo +// one hot. this is unrotated along with enable, and combined with +// datavalid to determine the next pop, which controls incrementing of the +// rd_pointer. +// + +import PkgEth100gLbus::*; + +module eth_100g_lbus2axi #( + parameter FIFO_DEPTH = 5, + parameter NUM_SEG = 4 +) +( + + // AXIS IF + AxiStreamIf.master axis, + + // Lbus Segments + input lbus_t lbus_in [NUM_SEG-1:0] + +); + + localparam SEG_BYTES = SEG_DATA_WIDTH/8; + localparam SEG_MTY_WIDTH = $clog2(SEG_BYTES); + localparam SEG_SHMEAR_WIDTH = SEG_DATA_WIDTH + SEG_MTY_WIDTH + 4; + + ////////////////////////////////////////////////////////////////////////////////// + ////////////////// Data Input to FIFO /////////// + ////////////////////////////////////////////////////////////////////////////////// + + lbus_t lbus_fout_p[NUM_SEG-1:0]; //{ena,err,eop,sop,mty,data} + lbus_t lbus_fout[NUM_SEG-1:0]; //{ena,err,eop,sop,mty,data} + //FIFO Logic + logic push; + logic [NUM_SEG-1:0] pop; + + logic [NUM_SEG-1:0] full; + logic [NUM_SEG-1:0] empty; + + // always push the fifo on all lanes + assign push = lbus_in[0].ena; + + // For each lane of incoming data place it into a separate FIFO + generate + genvar b1,gseg1; + begin : gen_seg_fifo + for(gseg1 = 0; gseg1 < NUM_SEG; gseg1=gseg1+1) begin + + ////////////////////////////////////////////////////////////////////////////////// + // INLINE FIFO + ////////////////////////////////////////////////////////////////////////////////// + + // simulation error if we push a full fifo + always_comb begin + if (push) begin + assert (!full[gseg1]) else $error("Pushing full fifo!"); + end + end + + // limit fanout to improve timing + (* max_fanout = 75 *) logic [4:0] a; + + for (b1=0;b1> rot; //rotate_right + + // Copy slice back to the struct + for(gseg2 = 0; gseg2 < NUM_SEG; gseg2=gseg2+1) begin + assign lbus_rot[gseg2][b2] = slice_rotated[gseg2]; + end + + end + end : rotate_lbus + endgenerate + + always_comb begin : rotate_data_valid + rot_empty = {empty,empty} >> rot; //rotate_right + end : rotate_data_valid + + ////////////////////////////////////////////////////////////////////////////////// + ////////////////// LBUS out DFF ///////////////////// + ////////////////////////////////////////////////////////////////////////////////// + // This pipe stage is mainly to allow suming MTY bits and to add space for + // Vivado to try to pipeline the output + // post rotation lbus signals + lbus_t lbus_out [NUM_SEG-1:0]; + logic [NUM_SEG-1:0] axi_seg_valid; + + always_ff @(posedge axis.clk) + begin + if (axis.rst) begin + foreach (lbus_out[seg]) begin : segment_loop + lbus_out[seg] <= '0; + end + axi_seg_valid <= '0; + end else begin + lbus_out <= lbus_rot; + if (send_idle) + axi_seg_valid <= '0; + else if (no_eop) + axi_seg_valid <= '1; + else + axi_seg_valid <= rot_xfer_now; + end + end + + //////////////////////////////////////////////////////////////////////////// + // Generate AXI + //////////////////////////////////////////////////////////////////////////// + logic [axis.DATA_WIDTH - 1:0] axis_tdata_w; + logic [$clog2(axis.DATA_WIDTH/8) - 1:0] axis_tuser_bytes_w; + logic [axis.DATA_WIDTH/8 - 1:0] axis_tkeep_w; + logic [NUM_SEG-1:0] axis_tlast_w; + logic [NUM_SEG-1:0] axis_tvalid_w; + logic [NUM_SEG-1:0] axis_tuser_err_w; + + always_comb begin : axis_translate + axis_tuser_bytes_w = 'd0; // init to zero before summing + foreach (axis_tvalid_w[seg]) begin : segment_loop + axis_tvalid_w[seg] = lbus_out[seg].ena & axi_seg_valid[seg]; + axis_tlast_w[seg] = lbus_out[seg].eop; + axis_tuser_err_w[seg] = lbus_out[seg].err; + + // sum all the segment mty vectors + if (lbus_out[seg].ena && axi_seg_valid[seg]) begin + axis_tuser_bytes_w += SEG_DATA_WIDTH/8 - lbus_out[seg].mty; + end + + // 512 bit word = 64 bytes = 4 X 128 bit(16 byte) segments + // assign bytes : LbusOrder + // S0 : S0B0..S0B15 + // S1 : S1B0..S1B15 + // S2 : S2B0..S2B15 + // S3 : S3B0..S3B15 + // AXI (swap Endianess on each segment) + // AXI = S3B15..S3B0, S2B15..S2B0, S1B15..S1B0, S0B15..S0B0 + for(int b = 0; b < SEG_BYTES; b=b+1) begin : tdata_loop + // ( 1 * 128 )-8- 0*8) 120+:8 = S0B0 + // ( 1 * 128 )-8- 1*8) 112+:8 = S0B1 + // ... + // ( 1 * 128 )-8-14*8) 8+:8 = S0B14 + // ( 1 * 128 )-8-15*8) 0+:8 = S0B15 + //////////////////////////////////// + // ( 2 * 128 )-8- 0*8) 248+:8 = S1B0 + // ( 2 * 128 )-8- 1*8) 240+:8 = S1B1 + // ... + // ( 2 * 128 )-8-14*8) 136+:8 = S1B14 + // ( 2 * 128 )-8-15*8) 128+:8 = S1B15 + //////////////////////////////////// + // ... + //////////////////////////////////// + // ( 4 * 128 )-8- 0*8) 504+:8 = S3B0 + // ( 4 * 128 )-8- 1*8) 496+:8 = S3B1 + // ... + // ( 4 * 128 )-8-14*8) 136+:8 = S3B14 + // ( 4 * 128 )-8-15*8) 384+:8 = S3B15 + axis_tdata_w[((seg+1)*axis.DATA_WIDTH/NUM_SEG-8-b*8) +: 8] = lbus_out[seg].data[b*8 +: 8]; + end : tdata_loop + end : segment_loop + end : axis_translate + + // convert bytes to keep + always_comb begin + axis_tkeep_w = '1; + if (axis_tlast_w != 0 && axis_tuser_bytes_w != 0) begin + foreach(axis_tkeep_w[b]) begin + axis_tkeep_w[b] = axis_tuser_bytes_w > b; + end + end + end + + ////////////////////////////////////////////////////////////////////////////////// + ////////////////// AXIS output flop ///////////////////// + ////////////////////////////////////////////////////////////////////////////////// + + localparam AXIS_MTY_WIDTH = $clog2(axis.BYTES_PER_WORD); + + always_ff @(posedge axis.clk) + begin + if (axis.rst) begin + axis.tdata <= '0; + axis.tvalid <= 1'b0; + axis.tlast <= 1'b0; + axis.tuser <= '0; + axis.tkeep <= '0; + end else begin + axis.tdata <= axis_tdata_w; + axis.tvalid <= |axis_tvalid_w; + axis.tlast <= |axis_tlast_w; + + if (axis.TKEEP == 1) begin + axis.tkeep <= axis_tkeep_w; + end else begin + axis.tkeep <= 'X; + end + + // trailing bytes in last word + axis.tuser[AXIS_MTY_WIDTH-1:0] <= axis_tuser_bytes_w; + // MSB is error + axis.tuser[AXIS_MTY_WIDTH] <= |axis_tuser_err_w; + end + end + +endmodule diff --git a/fpga/usrp3/top/x400/ip/eth_100g_bd/lbus_tb/Makefile b/fpga/usrp3/top/x400/ip/eth_100g_bd/lbus_tb/Makefile new file mode 100644 index 000000000..5ec8b6868 --- /dev/null +++ b/fpga/usrp3/top/x400/ip/eth_100g_bd/lbus_tb/Makefile @@ -0,0 +1,62 @@ +# +# Copyright 2021 Ettus Research, a National Instruments Brand +# +# SPDX-License-Identifier: LGPL-3.0-or-later +# + +#------------------------------------------------- +# Top-of-Makefile +#------------------------------------------------- +# Define BASE_DIR to point to the "top" dir +BASE_DIR = $(abspath ../../../../../top) +# Include viv_sim_preamble after defining BASE_DIR +include $(BASE_DIR)/../tools/make/viv_sim_preamble.mak + +#------------------------------------------------- +# Design Specific +#------------------------------------------------- +# Include makefiles and sources for the DUT and its dependencies +include $(BASE_DIR)/../lib/axi4s_sv/Makefile.srcs +include $(BASE_DIR)/../lib/fifo/Makefile.srcs + + +# If you generate the Xilinx CORE with an AXI interface you can find Xilinx's LBUS translators here +#$(abspath ../../../build-ip/xczu28drffvg1517-1e/eth_100g_bd/eth_100g_bd/ip/eth_100g_bd_cmac_usplus_0_0/eth_100g_bd_cmac_usplus_0_0/example_design/eth_100g_bd_cmac_usplus_0_0_lbus2axis_segmented_top.v) \ +#$(abspath ../../../build-ip/xczu28drffvg1517-1e/eth_100g_bd/eth_100g_bd/ip/eth_100g_bd_cmac_usplus_0_0/eth_100g_bd_cmac_usplus_0_0/example_design/eth_100g_bd_cmac_usplus_0_0_axis2lbus_segmented_top.v) \ + +DESIGN_SRCS = $(abspath \ +$(abspath ../eth_100g_axis2lbus.sv) \ +$(abspath ../eth_100g_lbus2axis.sv) \ +$(FIFO_SRCS) \ +$(AXI4S_SV_SRCS) \ +) + +#------------------------------------------------- +# Testbench Specific +#------------------------------------------------- +MODELSIM_LIBS += secureip unimacro_ver unisims_ver xilinx_vip xpm fifo_generator_v13_2_4 +MODELSIM_ARGS += glbl -t 1fs +# Define toplevel module +TB_TOP_MODULE ?= lbus_all_tb +SIM_TOP = $(TB_TOP_MODULE) + +SIM_SRCS = \ +$(abspath ../PkgEth100gLbus.sv) \ +$(abspath axi_lbus_tb.sv) \ +$(abspath lbus_axi_tb.sv) \ +$(abspath $(TB_TOP_MODULE).sv) \ +$(VIVADO_PATH)/data/verilog/src/glbl.v \ + +# Suppressing the following worthless reminder. +#* Warning: M:/usrp4-hw/oss-repo/fpga/usrp3/lib/axi4s_sv/axi4s_remove_bytes.sv(228): (vlog-2583) [SVCHK] - +# Extra checking for conflicts with always_comb and always_latch variables is done at vopt time +SVLOG_ARGS = -suppress 2583 -keep_delta +VLOG_ARGS = -keep_delta + +#------------------------------------------------- +# Bottom-of-Makefile +#------------------------------------------------- +# Include all simulator specific makefiles here +# Each should define a unique target to simulate +# e.g. xsim, vsim, etc and a common "clean" target +include $(BASE_DIR)/../tools/make/viv_simulator.mak diff --git a/fpga/usrp3/top/x400/ip/eth_100g_bd/lbus_tb/axi_lbus_tb.sv b/fpga/usrp3/top/x400/ip/eth_100g_bd/lbus_tb/axi_lbus_tb.sv new file mode 100644 index 000000000..cfde2d5aa --- /dev/null +++ b/fpga/usrp3/top/x400/ip/eth_100g_bd/lbus_tb/axi_lbus_tb.sv @@ -0,0 +1,285 @@ +// +// Copyright 2021 Ettus Research, a National Instruments Brand +// +// SPDX-License-Identifier: LGPL-3.0-or-later +// +// Module: axi_lbus_tb +// +// Description: +// +// Testbench for eth_interface +// + +module axi_lbus_tb #( + parameter TEST_NAME = "" +)( + /* no IO */ +); + // Include macros and time declarations for use with PkgTestExec + `define TEST_EXEC_OBJ test + `include "test_exec.svh" + import PkgAxiStreamBfm::*; + import PkgEthernet::*; + import PkgTestExec::*; + import PkgEth100gLbus::*; + + localparam DATA_WIDTH = 512; + localparam USER_WIDTH = $clog2(DATA_WIDTH/8)+1; + localparam NUM_SEG = 4; + localparam SEG_DATA_WIDTH = DATA_WIDTH/NUM_SEG; + localparam SEG_BYTES = SEG_DATA_WIDTH/8; + + //---------------------------------------------------- + // clocks + //---------------------------------------------------- + logic clk; + logic rst; + + sim_clock_gen #(.PERIOD(5), .AUTOSTART(1)) + clk_gen (.clk(clk), .rst(rst)); + + //---------------------------------------------------- + //interfaces + //---------------------------------------------------- + AxiStreamIf #(.DATA_WIDTH(DATA_WIDTH),.USER_WIDTH(USER_WIDTH)) + axis (clk, rst); + + //---------------------------------------------------- + // DUT + //---------------------------------------------------- + lbus_t lbus_out [NUM_SEG-1:0]; + lbus_t lbus_g [NUM_SEG-1:0]; + logic lbus_rdy = 1; + + eth_100g_axi2lbus #(.FIFO_DEPTH(5),.NUM_SEG(NUM_SEG)) DUT ( + .axis(axis), + .lbus_rdy(lbus_rdy), + .lbus_out(lbus_out) + ); + + //---------------------------------------------------- + // Xilinx golden model + // When Xilinx is generated with an AXI interface xilinx prints + // an axi2lbus converter that has trouble meeting timing + // this is preserved to allow comparison to that + // TODO: remove when timing is passing and refactor is done + //---------------------------------------------------- +/* + eth_100g_bd_cmac_usplus_0_0_axis2lbus_segmented_top GOLD ( + .core_clk(clk), + .core_rst(rst), + + // AXIS IF + .axis_tvalid(axis.tvalid), + .axis_tready(), + .axis_tdata(axis.tdata), + .axis_tlast(axis.tlast), + .axis_tkeep(axis.tkeep), + .axis_tuser(1'b0), + // LBUS IF + .lbus_rdyout(lbus_rdy), + .lbus_ovfout(1'b0), + .lbus_unfout(1'b0), + // Segment 0 + .lbus_ena0(lbus_g[0].ena), + .lbus_data0(lbus_g[0].data), + .lbus_sop0(lbus_g[0].sop), + .lbus_eop0(lbus_g[0].eop), + .lbus_mty0(lbus_g[0].mty), + .lbus_err0(lbus_g[0].err), + // Segment 1 + .lbus_ena1(lbus_g[1].ena), + .lbus_data1(lbus_g[1].data), + .lbus_sop1(lbus_g[1].sop), + .lbus_eop1(lbus_g[1].eop), + .lbus_mty1(lbus_g[1].mty), + .lbus_err1(lbus_g[1].err), + // Segment 2 + .lbus_ena2(lbus_g[2].ena), + .lbus_data2(lbus_g[2].data), + .lbus_sop2(lbus_g[2].sop), + .lbus_eop2(lbus_g[2].eop), + .lbus_mty2(lbus_g[2].mty), + .lbus_err2(lbus_g[2].err), + // Segment 3 + .lbus_ena3(lbus_g[3].ena), + .lbus_data3(lbus_g[3].data), + .lbus_sop3(lbus_g[3].sop), + .lbus_eop3(lbus_g[3].eop), + .lbus_mty3(lbus_g[3].mty), + .lbus_err3(lbus_g[3].err) + ); +*/ + //---------------------------------------------------- + //BFMS + //---------------------------------------------------- + + TestExec test = new(); + AxiStreamBfm #(.DATA_WIDTH(DATA_WIDTH),.USER_WIDTH(USER_WIDTH)) axi = + new(.slave(null),.master(axis)); + + //--------------------------------------------------------------------------- + // Tests + //--------------------------------------------------------------------------- + + // use Test timeout to check reset goes away + task test_reset(); + test.start_test({TEST_NAME,"Wait for Reset"}, 10us); + wait(!rst); + repeat (10) @(posedge clk); + test.end_test(); + endtask : test_reset + + typedef AxiStreamPacket #(DATA_WIDTH,USER_WIDTH) AxisPacket_t; + typedef XportStreamPacket #(DATA_WIDTH) XportPacket_t; + + + task automatic check_lbus(AxisPacket_t packets[$]); + + int idle_insert = 0; + int byte_count = 0; + int first_clk = 1; + + // loop over packets + foreach(packets[i]) begin + automatic raw_pkt_t pay; + pay = packets[i].dump_bytes; + + first_clk=1; + while (pay.size() > 0) begin + @(posedge clk); + if (lbus_rdy) begin + if (lbus_out[0].ena) begin + for (int s=0; s < NUM_SEG; s++) begin + byte_count = 0; + for (int b = SEG_DATA_WIDTH/8-1; b >= 0; b--) begin + if (pay.size() > 0) begin + assert (lbus_out[s].data[b*8 +: 8] == pay.pop_front()) else $error("Data Mismatch"); + byte_count++; + end + end + assert (lbus_out[s].ena == (byte_count > 0) ) else $error("Ena Mismatch"); + if (lbus_out[s].ena) begin + if (first_clk && s==0) begin + assert (lbus_out[s].sop == 1) else $error("Sop not set"); + end else begin + assert (lbus_out[s].sop == 0) else $error("Sop Set"); + end + assert (lbus_out[s].mty == (SEG_BYTES-byte_count) % SEG_BYTES) else $error("Mty Mismatch"); + assert (lbus_out[s].eop != (pay.size() > 0) ) else $error("Eop Mismatch"); + assert (lbus_out[s].err == 0) else $error("Err Mismatch"); // not checking error yet + end else begin + assert (lbus_out[s].sop == 0) else $error("Sop Set while disabled"); + assert (lbus_out[s].mty == 0) else $error("Mty set while disabled"); + assert (lbus_out[s].eop == 0) else $error("Eop set while disabled"); + assert (lbus_out[s].err == 0) else $error("Err set while disabled"); + end + end // segment loop + first_clk=0; + end // first segment is enabled + + end else begin //not lbus_rdy + for (int s=0; s < NUM_SEG; s++) begin + assert (lbus_out[s].ena == 0) else $error("Idle Ena set"); + assert (lbus_out[s].err == 0) else $error("Idle Err set"); + assert (lbus_out[s].sop == 0) else $error("Idle Sop set"); + assert (lbus_out[s].eop == 0) else $error("Idle Eop set"); + assert (lbus_out[s].mty == 0) else $error("Idle Mty non zero"); + end + end + end // while pay.size > 0 + end // foreach packet + + endtask : check_lbus; + + task automatic test_transfers(int num_samples[$]); + automatic AxisPacket_t send[$]; + automatic AxisPacket_t expected[$]; + automatic int sample_sum = 0; + + test.start_test({TEST_NAME,"Test Transfer"}, 200us); + + foreach (num_samples[i]) begin + automatic raw_pkt_t pay; + + expected[i] = new; + send[i] = new; + + get_ramp_raw_pkt(.num_samps(num_samples[i]),.ramp_start((sample_sum)%256), + .ramp_inc(1),.pkt(pay),.SWIDTH(8)); + sample_sum += num_samples[i]; + send[i].push_bytes(pay); + + // rebuild the expected packet for comparison without the preamble + expected[i].push_bytes(pay); + end + + fork + begin // tx_thread + foreach (send[i]) begin + axi.put(send[i]); + end + end + begin //rx_thread + check_lbus(expected); + end + join + + test.end_test(); + endtask : test_transfers + + //---------------------------------------------------- + // Main test loop + //---------------------------------------------------- + initial begin : tb_main + automatic int num_samples[$]; + automatic int random_value; + clk_gen.reset(); + + // stalling is not allowed by whoever is reading the MAC + // i.e. ready is ignored + axi.set_master_stall_prob(0); + axi.run(); + test_reset(); + + $display("Fixed Sequences"); + num_samples = {64,65,66,67,68,69,70,71}; + test_transfers(num_samples); + num_samples = {64,128,256,512,256,64,64,64}; + test_transfers(num_samples); + num_samples = {65,64,64,64,64,64,64,64}; + test_transfers(num_samples); + num_samples = {65,64,80,80,80,80,80,80}; + test_transfers(num_samples); + num_samples = {64,64,96,80,96,80,96,80}; + test_transfers(num_samples); + $display("Tons of 64"); + num_samples.delete(); + repeat(1000) begin + num_samples.push_back(64); + end + test_transfers(num_samples); + $display("Tons of 65"); + num_samples.delete(); + repeat(1000) begin + num_samples.push_back(65); + end + test_transfers(num_samples); + $display("Tons of Random"); + num_samples.delete(); + repeat(1000) begin + random_value = $urandom_range(64,512); + num_samples.push_back(random_value); + end + test_transfers(num_samples); + + + // End the TB, but don't $finish, since we don't want to kill other + // instances of this testbench that may be running. + test.end_tb(0); + + // Kill the clocks to end this instance of the testbench + clk_gen.kill(); + end // initial begin + +endmodule diff --git a/fpga/usrp3/top/x400/ip/eth_100g_bd/lbus_tb/lbus_all_tb.sv b/fpga/usrp3/top/x400/ip/eth_100g_bd/lbus_tb/lbus_all_tb.sv new file mode 100644 index 000000000..98caa0a86 --- /dev/null +++ b/fpga/usrp3/top/x400/ip/eth_100g_bd/lbus_tb/lbus_all_tb.sv @@ -0,0 +1,22 @@ +// +// Copyright 2021 Ettus Research, a National Instruments Brand +// +// SPDX-License-Identifier: LGPL-3.0-or-later +// +// Module: lbus_all_tb +// +// Description: +// +// Testbench for LBU<->AXI +// + +module lbus_all_tb #( + /* no PARAM */ +)( + /* no IO */ +); + + lbus_axi_tb #(.TEST_NAME("L2A")) L2A (); + axi_lbus_tb #(.TEST_NAME("A2L")) A2L (); + +endmodule diff --git a/fpga/usrp3/top/x400/ip/eth_100g_bd/lbus_tb/lbus_axi_tb.sv b/fpga/usrp3/top/x400/ip/eth_100g_bd/lbus_tb/lbus_axi_tb.sv new file mode 100644 index 000000000..fa5812abe --- /dev/null +++ b/fpga/usrp3/top/x400/ip/eth_100g_bd/lbus_tb/lbus_axi_tb.sv @@ -0,0 +1,343 @@ +// +// Copyright 2021 Ettus Research, a National Instruments Brand +// +// SPDX-License-Identifier: LGPL-3.0-or-later +// +// Module: lbus_axi_tb +// +// Description: +// +// Testbench for eth_interface +// + +module lbus_axi_tb #( + parameter TEST_NAME = "" +)( + /* no IO */ +); + // Include macros and time declarations for use with PkgTestExec + `define TEST_EXEC_OBJ test + `include "test_exec.svh" + import PkgAxiStreamBfm::*; + import PkgEthernet::*; + import PkgTestExec::*; + import PkgEth100gLbus::*; + + localparam DATA_WIDTH = 512; + localparam USER_WIDTH = $clog2(DATA_WIDTH/8)+1; + localparam NUM_SEG = 4; + localparam SEG_DATA_WIDTH = DATA_WIDTH/NUM_SEG; + localparam SEG_BYTES = SEG_DATA_WIDTH/8; + + //---------------------------------------------------- + // clocks + //---------------------------------------------------- + logic clk; + logic rst; + + sim_clock_gen #(.PERIOD(5), .AUTOSTART(1)) + clk_gen (.clk(clk), .rst(rst)); + + //---------------------------------------------------- + //interfaces + //---------------------------------------------------- + AxiStreamIf #(.DATA_WIDTH(DATA_WIDTH),.USER_WIDTH(USER_WIDTH)) + axis (clk, rst); + + AxiStreamIf #(.DATA_WIDTH(DATA_WIDTH),.USER_WIDTH(USER_WIDTH)) + axig (clk, rst); + + //---------------------------------------------------- + // DUT + //---------------------------------------------------- + lbus_t lbus_in [NUM_SEG-1:0]; + + eth_100g_lbus2axi #(.FIFO_DEPTH(5),.NUM_SEG(NUM_SEG)) DUT ( + .axis(axis), + .lbus_in(lbus_in) + ); + + //---------------------------------------------------- + // Xilinx golden model + // When Xilinx is generated with an AXI interface xilinx prints + // a lbus2axis converter that has trouble meeting timing + // this is preserved to allow comparison to that + // TODO: remove when timing is passing and refactor is done + //---------------------------------------------------- +/* + eth_100g_bd_cmac_usplus_0_0_lbus2axis_segmented_top GOLD ( + .core_clk(clk), + .core_rst(rst), + + // AXIS IF + .axis_tvalid(axig.tvalid), + .axis_tdata(axig.tdata), + .axis_tlast(axig.tlast), + .axis_tkeep(axig.tkeep), + .axis_tuser(), + // Segment 0 + .lbus_ena0(lbus_in[0].ena), + .lbus_data0(lbus_in[0].data), + .lbus_sop0(lbus_in[0].sop), + .lbus_eop0(lbus_in[0].eop), + .lbus_mty0(lbus_in[0].mty), + .lbus_err0(lbus_in[0].err), + // Segment 1 + .lbus_ena1(lbus_in[1].ena), + .lbus_data1(lbus_in[1].data), + .lbus_sop1(lbus_in[1].sop), + .lbus_eop1(lbus_in[1].eop), + .lbus_mty1(lbus_in[1].mty), + .lbus_err1(lbus_in[1].err), + // Segment 2 + .lbus_ena2(lbus_in[2].ena), + .lbus_data2(lbus_in[2].data), + .lbus_sop2(lbus_in[2].sop), + .lbus_eop2(lbus_in[2].eop), + .lbus_mty2(lbus_in[2].mty), + .lbus_err2(lbus_in[2].err), + // Segment 3 + .lbus_ena3(lbus_in[3].ena), + .lbus_data3(lbus_in[3].data), + .lbus_sop3(lbus_in[3].sop), + .lbus_eop3(lbus_in[3].eop), + .lbus_mty3(lbus_in[3].mty), + .lbus_err3(lbus_in[3].err) + ); +*/ + //---------------------------------------------------- + //BFMS + //---------------------------------------------------- + + TestExec test = new(); + AxiStreamBfm #(.DATA_WIDTH(DATA_WIDTH),.USER_WIDTH(USER_WIDTH)) axi = + new(.slave(axis),.master(null)); + + //--------------------------------------------------------------------------- + // Tests + //--------------------------------------------------------------------------- + + // use Test timeout to check reset goes away + task test_reset(); + test.start_test({TEST_NAME,"Wait for Reset"}, 10us); + wait(!rst); + repeat (10) @(posedge clk); + test.end_test(); + endtask : test_reset + + typedef AxiStreamPacket #(DATA_WIDTH,USER_WIDTH) AxisPacket_t; + typedef XportStreamPacket #(DATA_WIDTH) XportPacket_t; + + task automatic clear_lbus_in(); + for (int i=0 ; i < NUM_SEG ; ++i) begin + lbus_in[i].data = 'b0; + lbus_in[i].mty = 'b0; + lbus_in[i].sop = 1'b0; + lbus_in[i].eop = 1'b0; + lbus_in[i].err = 1'b0; + lbus_in[i].ena = 1'b0; + end + endtask : clear_lbus_in; + + task automatic send_lbus(AxisPacket_t packets[$]); + + int seg = 0; + int b = 0; + int idle_insert = 0; + + // loop over packets + foreach(packets[i]) begin + automatic raw_pkt_t pay; + pay = packets[i].dump_bytes; + // set for the first segment + lbus_in[seg].sop = 1; + // empty this packets payload + while (pay.size() > 0) begin + lbus_in[seg].ena = 1; + lbus_in[seg].data |= pay.pop_front()<<(SEG_DATA_WIDTH-b*8-8); + if (pay.size() == 0) begin + lbus_in[seg].eop = 1; + lbus_in[seg].mty = SEG_DATA_WIDTH-1-b; + end + if (seg == NUM_SEG-1 && b == SEG_DATA_WIDTH/8-1) begin + @(posedge clk); + clear_lbus_in(); + idle_insert++; + // insert period idle period + if (idle_insert > 2) begin + @(posedge clk); + idle_insert =0; + end + end + b = (b+1) % (SEG_DATA_WIDTH/8); + if (b==0) begin + seg = (seg+1) % NUM_SEG; + end + end // pay.size > 0 + if (b != 0) begin + seg = (seg+1) % NUM_SEG; + if (seg == 0) begin + @(posedge clk); + clear_lbus_in(); + idle_insert++; + // insert period idle period + if (idle_insert > 2) begin + @(posedge clk); + idle_insert =0; + end + end + b = 0; + end + + // 25% of the time we start a new packet + if ($urandom_range(99) < 25) begin + b = 0; + seg = 0; + // 25% of the time add an idle cycle + if ($urandom_range(99) < 25) begin + @(posedge clk); + clear_lbus_in(); + idle_insert++; + // insert period idle period + if (idle_insert > 2) begin + idle_insert =0; + @(posedge clk); + end + @(posedge clk); + end else begin + @(posedge clk); + clear_lbus_in(); + idle_insert++; + // insert period idle period + if (idle_insert > 2) begin + idle_insert =0; + @(posedge clk); + end + end + end + + end // foreach packet + + @(posedge clk); + clear_lbus_in(); + + endtask : send_lbus; + + task automatic compare_packet(AxisPacket_t actual, expected); + + automatic XportPacket_t actual_copy = new(); + automatic XportPacket_t expected_copy = new(); + actual_copy.import_axis(actual); + expected_copy.import_axis(expected); + + expected_copy.tkeep_to_tuser(); + actual_copy.clear_unused_bytes(); + + if (!expected_copy.equal(actual_copy)) begin + $display("Expected"); + expected_copy.print(); + $display("Actual"); + actual_copy.print(); + if (!expected_copy.equal(actual_copy)) + $error("ERROR :: packet mismatch"); + + end + + endtask : compare_packet; + + task automatic test_transfers(int num_samples[$]); + automatic AxisPacket_t send[$]; + automatic AxisPacket_t expected[$]; + automatic int sample_sum = 0; + + test.start_test({TEST_NAME,"Test Transfer"}, 200us); + + foreach (num_samples[i]) begin + automatic raw_pkt_t pay; + + expected[i] = new; + send[i] = new; + + get_ramp_raw_pkt(.num_samps(num_samples[i]),.ramp_start((sample_sum)%256), + .ramp_inc(1),.pkt(pay),.SWIDTH(8)); + sample_sum += num_samples[i]; + send[i].push_bytes(pay); + + // rebuild the expected packet for comparison without the preamble + expected[i].push_bytes(pay); + end + + fork + begin // tx_thread + send_lbus(send); + end + begin //rx_thread + foreach(expected[i]) begin + automatic AxisPacket_t actual; + axi.get(actual); + compare_packet(actual,expected[i]); + end + end + join + + test.end_test(); + endtask : test_transfers + + //---------------------------------------------------- + // Main test loop + //---------------------------------------------------- + initial begin : tb_main + automatic int num_samples[$]; + automatic int random_value; + clk_gen.reset(); + + // stalling is not allowed by whoever is reading the MAC + // i.e. ready is ignored + axi.slave_tready_init = 1'b1; + axi.set_master_stall_prob(0); + axi.set_slave_stall_prob(0); + axi.run(); + clear_lbus_in(); + test_reset(); + + $display("Fixed Sequences"); + num_samples = {64,65,66,67,68,69,70,71}; + test_transfers(num_samples); + num_samples = {64,128,256,512,256,64,64,64}; + test_transfers(num_samples); + num_samples = {65,64,64,64,64,64,64,64}; + test_transfers(num_samples); + num_samples = {65,64,80,80,80,80,80,80}; + test_transfers(num_samples); + num_samples = {64,64,96,80,96,80,96,80}; + test_transfers(num_samples); + $display("Tons of 64"); + num_samples.delete(); + repeat(1000) begin + num_samples.push_back(64); + end + test_transfers(num_samples); + $display("Tons of 65"); + num_samples.delete(); + repeat(1000) begin + num_samples.push_back(65); + end + test_transfers(num_samples); + $display("Tons of Random"); + num_samples.delete(); + repeat(1000) begin + random_value = $urandom_range(64,512); + num_samples.push_back(random_value); + end + test_transfers(num_samples); + + + // End the TB, but don't $finish, since we don't want to kill other + // instances of this testbench that may be running. + test.end_tb(0); + + // Kill the clocks to end this instance of the testbench + clk_gen.kill(); + end // initial begin + +endmodule diff --git a/fpga/usrp3/top/x400/ip/eth_100g_bd/model_100gbe.sv b/fpga/usrp3/top/x400/ip/eth_100g_bd/model_100gbe.sv new file mode 100644 index 000000000..e7995dd44 --- /dev/null +++ b/fpga/usrp3/top/x400/ip/eth_100g_bd/model_100gbe.sv @@ -0,0 +1,234 @@ +// +// Copyright 2021 Ettus Research, A National Instruments Brand +// +// SPDX-License-Identifier: LGPL-3.0-or-later +// +// Module: model_100gbe +// +// Description: +// +// A wrapper of the 100gbe core to axistream interface. this model can be +// used drive packets into the X400 translated to serial Ethernet. This is +// generally pretty slower than just driving things in at the output of the +// mac. +// + +package Pkg100gbMac; + import PkgAxiLite::*; + import PkgAxiLiteBfm::*; + import PkgTestExec::*; + + localparam DATA_WIDTH =32; + localparam ADDR_WIDTH =15; + + typedef AxiLiteBfm #(DATA_WIDTH, ADDR_WIDTH) MacAxiLiteBfm_t; + + // defined in https://www.xilinx.com/support/documentation/ip_documentation/cmac_usplus/v2_4/pg203-cmac-usplus.pdf + // pg 187 + localparam CONFIGURATION_TX_REG1 = 32'h000C; + localparam ctl_tx_ctl_enable = 0; + localparam ctl_tx_ctl_tx_send_lfi = 3; + localparam ctl_tx_ctl_tx_send_rfi = 4; + localparam ctl_tx_ctl_tx_send_idle = 5; + localparam ctl_tx_ctl_test_pattern = 16; + + localparam CONFIGURATION_RX_REG1 = 32'h0014; + localparam ctl_rx_ctl_enable = 0; + localparam ctl_rx_ctl_rx_force_resync = 7; + localparam ctl_rx_ctl_test_pattern = 8; + + localparam RSFEC_CONFIG_INDICATION_CORRECTION = 32'h1000; + localparam rs_fec_in_ctl_rx_rsfec_enable_correction = 0; + localparam rs_fec_in_ctl_rx_rsfec_enable_indication = 1; + localparam rs_fec_in_ctl_rsfec_ieee_error_indication_mode = 2; + + localparam RSFEC_CONFIG_ENABLE = 32'h107C; + localparam rs_fec_in_ctl_rx_rsfec_enable = 0; + localparam rs_fec_in_ctl_tx_rsfec_enable = 1; + + localparam STAT_RX_STATUS_REG = 32'h0204; + localparam stat_rx_status = 0; + localparam stat_rx_aligned = 1; + localparam stat_rx_misaligned = 2; + localparam stat_rx_aligned_err = 3; + + task automatic init_mac (int offset, MacAxiLiteBfm_t axi); + automatic logic [31:0] data; + automatic resp_t resp; + + // start transmitting alignment pattern + data = 0; + data[ctl_tx_ctl_enable] = 0; + data[ctl_tx_ctl_tx_send_idle] = 0; + data[ctl_tx_ctl_tx_send_lfi] = 0; + data[ctl_tx_ctl_tx_send_rfi] = 1; + data[ctl_tx_ctl_test_pattern] = 0; + axi.wr(CONFIGURATION_TX_REG1+offset,data); + + // configure fec + data = 0; + data[rs_fec_in_ctl_rx_rsfec_enable_correction] = 1; + data[rs_fec_in_ctl_rx_rsfec_enable_indication] = 1; + data[rs_fec_in_ctl_rsfec_ieee_error_indication_mode] = 1; + axi.wr(RSFEC_CONFIG_INDICATION_CORRECTION+offset,data); + + data = 0; + data[rs_fec_in_ctl_rx_rsfec_enable] = 1; + data[rs_fec_in_ctl_tx_rsfec_enable] = 1; + axi.wr(RSFEC_CONFIG_ENABLE+offset,data); + + // turn on RX interface + data = 0; + data[ctl_rx_ctl_enable] = 1; + data[ctl_rx_ctl_rx_force_resync] = 0; + data[ctl_rx_ctl_test_pattern] = 0; + axi.wr(CONFIGURATION_RX_REG1+offset,data); + + do begin + axi.rd_block(STAT_RX_STATUS_REG+offset,data,resp); + assert (resp==OKAY); + end while (data[stat_rx_aligned] !== 1); + + // stop transmitting alignment pattern + // and start transmitting data + data = 0; + data[ctl_tx_ctl_enable] = 1; + data[ctl_tx_ctl_tx_send_idle] = 0; + data[ctl_tx_ctl_tx_send_lfi] = 0; + data[ctl_tx_ctl_tx_send_rfi] = 0; + data[ctl_tx_ctl_test_pattern] = 0; + axi.wr(CONFIGURATION_TX_REG1+offset,data); + + endtask : init_mac + +endpackage : Pkg100gbMac + +module model_100gbe ( + input logic areset, + // 156.25 Mhz refclk + input logic ref_clk, + + // QSFP high-speed IO + output logic [3:0] tx_p, + output logic [3:0] tx_n, + input logic [3:0] rx_p, + input logic [3:0] rx_n, + + // CLK and RESET out + output logic mgt_clk, + output logic mgt_rst, + output logic link_up, + + // Data port + AxiStreamIf.slave mgt_tx, + AxiStreamIf.master mgt_rx + +); + + // Include macros and time declarations for use with PkgTestExec + `define TEST_EXEC_OBJ test + `include "test_exec.svh" + import PkgAxiLiteBfm::*; + import PkgTestExec::*; + + logic refclk_p; + logic refclk_n; + + logic clk40,clk40_rst; + logic clk100,clk100_rst; + logic phy_reset; + + assign refclk_p = ref_clk; + assign refclk_n = ~ref_clk; + + //interface + AxiLiteIf #(Pkg100gbMac::DATA_WIDTH,Pkg100gbMac::ADDR_WIDTH) + mgt_axil (clk40, clk40_rst); + //bfm + Pkg100gbMac::MacAxiLiteBfm_t axi = new(.master(mgt_axil)); + TestExec mac_test = new(); + + sim_clock_gen #(.PERIOD(25.0), .AUTOSTART(1)) + clk40_gen (.clk(clk40), .rst(clk40_rst)); + sim_clock_gen #(.PERIOD(100.0), .AUTOSTART(1)) + clk100_gen (.clk(clk100), .rst(clk100_rst)); + + initial begin : init_model + clk40_gen.reset(); + axi.run(); + wait(!clk40_rst); + repeat (10) @(posedge clk40); + + wait(!phy_reset); // both usr_clk's are ok + + mac_test.start_test("model_100gbe::Wait for MAC link_up", 150us); + //Added autoconnect - uncomment to test connecting over AXI + //Pkg100gbMac::init_mac(0,axi); + mac_test.end_test(); + end + + + AxiStreamIf #(.DATA_WIDTH(512),.USER_WIDTH(7),.TKEEP(0)) + eth100g_rx(mgt_clk,mgt_rst); + + always_comb begin + mgt_rx.tdata = eth100g_rx.tdata; + mgt_rx.tuser = eth100g_rx.tuser; + mgt_rx.tkeep = eth100g_rx.trailing2keep(eth100g_rx.tuser); + mgt_rx.tvalid = eth100g_rx.tvalid; + mgt_rx.tlast = eth100g_rx.tlast; + eth100g_rx.tready = mgt_rx.tready; + // The MAC ignores hold off. Data must be consumed every clock it is valid. + if (!mgt_rst) begin + if (!mgt_rx.tready && mgt_rx.tvalid) begin + $error("Model 100Gbe : can't hold off the MAC"); + end + end + end + + // model does not pause. Users could access this heirarchically to test it + logic mgt_pause_req; + assign mgt_pause_req = 1'b0; + + // hold off link up untill the stat_auto_config writes are complete + logic link_up_model; + logic [31:0] mac_status; + always_comb begin + link_up = link_up_model && mac_status[4]; + end + + eth_100g #(.PAUSE_QUANTA(10),.PAUSE_REFRESH(100)) eth_100gx ( + .areset(areset), + //-- Free running 100 MHz clock used for InitClk and AxiLite to mac + //-- 3.125 - 161.132812 MHz. + .clk100(clk100), + // MGT Reference Clock 100/125/156.25/161.1328125 MHz + .refclk_p(refclk_p), + .refclk_n(refclk_n), + // MGT TX/RX differential signals + .tx_p(tx_p), + .tx_n(tx_n), + .rx_p(rx_p), + .rx_n(rx_n), + // 322.26666 Mhz clock generated by 100G Phy from RefClock + .mgt_clk(mgt_clk), + .mgt_rst(mgt_rst), + // pause + .mgt_pause_req(mgt_pause_req), + //------------------------ AXI Stream TX Interface ------------------------ + .mgt_tx(mgt_tx), + //---------------------- AXI Stream RX Interface ------------------------ + // There is no RxTReady signal support by the Ethernet100G IP. Received data has to + // be read immediately or it is lost. + // tUser indicates an error on rcvd packet + .mgt_rx(eth100g_rx), + .mgt_axil(mgt_axil), + // LEDs of QSFP28 port + .phy_status(), + .mac_ctrl(32'h01000001), // autoconfig / pause mask set to global + .mac_status(mac_status), + .phy_reset(phy_reset), + .link_up(link_up_model) + ); + +endmodule diff --git a/fpga/usrp3/top/x400/ip/fifo_4k_2clk/Makefile.inc b/fpga/usrp3/top/x400/ip/fifo_4k_2clk/Makefile.inc new file mode 100644 index 000000000..d1fe561c7 --- /dev/null +++ b/fpga/usrp3/top/x400/ip/fifo_4k_2clk/Makefile.inc @@ -0,0 +1,21 @@ +# +# Copyright 2021 Ettus Research, a National Instruments Brand +# +# SPDX-License-Identifier: LGPL-3.0-or-later +# + +include $(TOOLS_DIR)/make/viv_ip_builder.mak + +IP_FIFO_4K_2CLK_SRCS = $(IP_BUILD_DIR)/fifo_4k_2clk/fifo_4k_2clk.xci + +IP_FIFO_4K_2CLK_HDL_SIM_SRCS = $(addprefix $(IP_BUILD_DIR)/fifo_4k_2clk/, \ +fifo_4k_2clk_sim_netlist.v \ +) + +IP_FIFO_4K_2CLK_OUTS = $(addprefix $(IP_BUILD_DIR)/fifo_4k_2clk/, \ +fifo_4k_2clk.xci.out \ +synth/fifo_4k_2clk.vhd \ +) + +$(IP_FIFO_4K_2CLK_SRCS) $(IP_FIFO_4K_2CLK_OUTS) : $(IP_DIR)/fifo_4k_2clk/fifo_4k_2clk.xci + $(call BUILD_VIVADO_IP,fifo_4k_2clk,$(ARCH),$(PART_ID),$(IP_DIR),$(IP_BUILD_DIR),0) diff --git a/fpga/usrp3/top/x400/ip/fifo_4k_2clk/fifo_4k_2clk.xci b/fpga/usrp3/top/x400/ip/fifo_4k_2clk/fifo_4k_2clk.xci new file mode 100644 index 000000000..888840273 --- /dev/null +++ b/fpga/usrp3/top/x400/ip/fifo_4k_2clk/fifo_4k_2clk.xci @@ -0,0 +1,576 @@ + + + xilinx.com + xci + unknown + 1.0 + + + fifo_4k_2clk + + + + + + 100000000 + 0 + 0.000 + + + 100000000 + 0 + 0.000 + 1 + 0 + 0 + 0 + + 1 + 100000000 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 1 + 1 + 1 + 1 + 1 + 0.000 + AXI4LITE + READ_WRITE + 0 + 0 + 0 + 0 + 0 + + 100000000 + 0 + 0 + 0 + 0 + 0 + undef + 0.000 + 0 + 0 + 0 + 0 + + + + 100000000 + 0 + 0.000 + + 100000000 + 0 + 0.000 + 0 + 1 + 0 + 0 + 0 + + 1 + 100000000 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 1 + 1 + 1 + 1 + 1 + 0.000 + AXI4LITE + READ_WRITE + 0 + 0 + 0 + 0 + 0 + + 100000000 + 0 + 0 + 0 + 0 + 0 + undef + 0.000 + 0 + 0 + 0 + 0 + + + + 100000000 + 0 + 0.000 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 1 + 1 + 1 + 1 + 1 + 4 + 0 + 32 + 1 + 1 + 1 + 64 + 1 + 8 + 1 + 1 + 1 + 1 + 0 + 0 + 9 + BlankString + 72 + 1 + 32 + 64 + 1 + 64 + 2 + 0 + 72 + 0 + 1 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + zynq + 1 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 1 + 0 + 1 + 0 + 0 + 0 + 0 + 1 + 0 + 1 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 1 + 0 + 1 + 0 + 0 + 0 + 0 + 0 + 1 + 0 + 2 + 1 + 1 + 1 + 1 + 1 + 1 + 0 + 0 + 1 + BlankString + 0 + 0 + 0 + 0 + 0 + 1 + 512x72 + 1kx18 + 512x36 + 1kx36 + 512x36 + 1kx36 + 512x36 + 4 + 1022 + 1022 + 1022 + 1022 + 1022 + 1022 + 5 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 511 + 1023 + 1023 + 1023 + 1023 + 1023 + 1023 + 510 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 10 + 512 + 1 + 9 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 2 + 0 + 0 + 0 + 0 + 1 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 1 + 0 + 0 + 0 + 0 + 0 + 0 + 10 + 512 + 1024 + 16 + 1024 + 16 + 1024 + 16 + 1 + 9 + 10 + 4 + 10 + 4 + 10 + 4 + 1 + 32 + 0 + 0 + false + false + false + 0 + 0 + Slave_Interface_Clock_Enable + Common_Clock + fifo_4k_2clk + 64 + false + 9 + true + false + 0 + 4 + 1022 + 1022 + 1022 + 1022 + 1022 + 1022 + 5 + false + false + false + false + false + false + false + false + false + Hard_ECC + false + false + false + false + false + false + true + false + false + true + Data_FIFO + Data_FIFO + Data_FIFO + Data_FIFO + Data_FIFO + Data_FIFO + Common_Clock_Block_RAM + Common_Clock_Block_RAM + Common_Clock_Block_RAM + Common_Clock_Block_RAM + Common_Clock_Block_RAM + Common_Clock_Block_RAM + Independent_Clocks_Block_RAM + 1 + 511 + 1023 + 1023 + 1023 + 1023 + 1023 + 1023 + 510 + false + false + false + 0 + Native + false + false + false + false + false + false + false + false + false + false + false + false + false + false + 72 + 512 + 1024 + 16 + 1024 + 16 + 1024 + 16 + false + 72 + 512 + Embedded_Reg + false + false + Active_High + Active_High + AXI4 + First_Word_Fall_Through + No_Programmable_Empty_Threshold + No_Programmable_Empty_Threshold + No_Programmable_Empty_Threshold + No_Programmable_Empty_Threshold + No_Programmable_Empty_Threshold + No_Programmable_Empty_Threshold + No_Programmable_Empty_Threshold + No_Programmable_Full_Threshold + No_Programmable_Full_Threshold + No_Programmable_Full_Threshold + No_Programmable_Full_Threshold + No_Programmable_Full_Threshold + No_Programmable_Full_Threshold + No_Programmable_Full_Threshold + READ_WRITE + 0 + 1 + true + 10 + Fully_Registered + Fully_Registered + Fully_Registered + Fully_Registered + Fully_Registered + Fully_Registered + true + Asynchronous_Reset + false + 0 + 0 + 0 + 0 + 0 + 4 + false + false + Active_High + Active_High + true + false + false + true + false + Active_High + 0 + false + Active_High + 1 + true + 10 + false + FIFO + false + false + false + false + FIFO + FIFO + 2 + 2 + false + FIFO + FIFO + FIFO + zynq + + + xc7z100 + ffg900 + VERILOG + + MIXED + -2 + + + TRUE + TRUE + IP_Flow + 4 + TRUE + . + + . + 2019.1 + OUT_OF_CONTEXT + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + diff --git a/fpga/usrp3/top/x400/ip/fifo_short_2clk/Makefile.inc b/fpga/usrp3/top/x400/ip/fifo_short_2clk/Makefile.inc new file mode 100644 index 000000000..5fd855017 --- /dev/null +++ b/fpga/usrp3/top/x400/ip/fifo_short_2clk/Makefile.inc @@ -0,0 +1,21 @@ +# +# Copyright 2021 Ettus Research, a National Instruments Brand +# +# SPDX-License-Identifier: LGPL-3.0-or-later +# + +include $(TOOLS_DIR)/make/viv_ip_builder.mak + +IP_FIFO_SHORT_2CLK_SRCS = $(IP_BUILD_DIR)/fifo_short_2clk/fifo_short_2clk.xci + +IP_FIFO_SHORT_2CLK_HDL_SIM_SRCS = $(addprefix $(IP_BUILD_DIR)/fifo_short_2clk/, \ +fifo_short_2clk_sim_netlist.v \ +) + +IP_FIFO_SHORT_2CLK_OUTS = $(addprefix $(IP_BUILD_DIR)/fifo_short_2clk/, \ +fifo_short_2clk.xci.out \ +synth/fifo_short_2clk.vhd \ +) + +$(IP_FIFO_SHORT_2CLK_SRCS) $(IP_FIFO_SHORT_2CLK_OUTS) : $(IP_DIR)/fifo_short_2clk/fifo_short_2clk.xci + $(call BUILD_VIVADO_IP,fifo_short_2clk,$(ARCH),$(PART_ID),$(IP_DIR),$(IP_BUILD_DIR),0) diff --git a/fpga/usrp3/top/x400/ip/fifo_short_2clk/fifo_short_2clk.xci b/fpga/usrp3/top/x400/ip/fifo_short_2clk/fifo_short_2clk.xci new file mode 100644 index 000000000..cc0f896b8 --- /dev/null +++ b/fpga/usrp3/top/x400/ip/fifo_short_2clk/fifo_short_2clk.xci @@ -0,0 +1,578 @@ + + + xilinx.com + xci + unknown + 1.0 + + + fifo_short_2clk + + + + + + 100000000 + 0 + 0.000 + + + 100000000 + 0 + 0.000 + 1 + 0 + 0 + 0 + + 1 + 100000000 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 1 + 1 + 1 + 1 + 1 + 0.000 + AXI4LITE + READ_WRITE + 0 + 0 + 0 + 0 + 0 + + 100000000 + 0 + 0 + 0 + 0 + 0 + undef + 0.000 + 0 + 0 + 0 + 0 + + + + 100000000 + 0 + 0.000 + + 100000000 + 0 + 0.000 + 0 + 1 + 0 + 0 + 0 + + 1 + 100000000 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 1 + 1 + 1 + 1 + 1 + 0.000 + AXI4LITE + READ_WRITE + 0 + 0 + 0 + 0 + 0 + + 100000000 + 0 + 0 + 0 + 0 + 0 + undef + 0.000 + 0 + 0 + 0 + 0 + + + + 100000000 + 0 + 0.000 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 1 + 1 + 1 + 1 + 1 + 4 + 0 + 32 + 1 + 1 + 1 + 64 + 1 + 8 + 1 + 1 + 1 + 1 + 0 + 0 + 5 + BlankString + 72 + 1 + 32 + 64 + 1 + 64 + 2 + 0 + 72 + 0 + 1 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + zynq + 1 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 1 + 0 + 1 + 0 + 0 + 0 + 0 + 1 + 0 + 1 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 1 + 0 + 1 + 0 + 0 + 0 + 0 + 0 + 1 + 0 + 2 + 1 + 1 + 1 + 1 + 1 + 1 + 0 + 0 + 2 + BlankString + 1 + 0 + 0 + 0 + 0 + 1 + 512x72 + 1kx18 + 512x36 + 1kx36 + 512x36 + 1kx36 + 512x36 + 4 + 1022 + 1022 + 1022 + 1022 + 1022 + 1022 + 5 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 31 + 1023 + 1023 + 1023 + 1023 + 1023 + 1023 + 30 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 6 + 32 + 1 + 5 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 3 + 0 + 0 + 0 + 0 + 1 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 1 + 0 + 0 + 0 + 0 + 0 + 0 + 6 + 32 + 1024 + 16 + 1024 + 16 + 1024 + 16 + 1 + 5 + 10 + 4 + 10 + 4 + 10 + 4 + 1 + 32 + 0 + 0 + false + false + false + 0 + 0 + Slave_Interface_Clock_Enable + Common_Clock + fifo_short_2clk + 64 + false + 5 + false + false + 0 + 4 + 1022 + 1022 + 1022 + 1022 + 1022 + 1022 + 5 + false + false + false + false + false + false + false + false + false + Hard_ECC + false + false + false + false + false + false + true + false + false + true + Data_FIFO + Data_FIFO + Data_FIFO + Data_FIFO + Data_FIFO + Data_FIFO + Common_Clock_Block_RAM + Common_Clock_Block_RAM + Common_Clock_Block_RAM + Common_Clock_Block_RAM + Common_Clock_Block_RAM + Common_Clock_Block_RAM + Independent_Clocks_Distributed_RAM + 1 + 31 + 1023 + 1023 + 1023 + 1023 + 1023 + 1023 + 30 + false + false + false + 0 + Native + false + false + false + false + false + false + false + false + false + false + false + false + false + false + 72 + 32 + 1024 + 16 + 1024 + 16 + 1024 + 16 + false + 72 + 32 + Embedded_Reg + false + false + Active_High + Active_High + AXI4 + First_Word_Fall_Through + No_Programmable_Empty_Threshold + No_Programmable_Empty_Threshold + No_Programmable_Empty_Threshold + No_Programmable_Empty_Threshold + No_Programmable_Empty_Threshold + No_Programmable_Empty_Threshold + No_Programmable_Empty_Threshold + No_Programmable_Full_Threshold + No_Programmable_Full_Threshold + No_Programmable_Full_Threshold + No_Programmable_Full_Threshold + No_Programmable_Full_Threshold + No_Programmable_Full_Threshold + No_Programmable_Full_Threshold + READ_WRITE + 0 + 1 + true + 6 + Fully_Registered + Fully_Registered + Fully_Registered + Fully_Registered + Fully_Registered + Fully_Registered + true + Asynchronous_Reset + false + 0 + 0 + 0 + 0 + 0 + 4 + false + false + Active_High + Active_High + true + false + false + true + false + Active_High + 0 + false + Active_High + 1 + true + 6 + false + FIFO + false + false + false + false + FIFO + FIFO + 3 + 2 + false + FIFO + FIFO + FIFO + zynq + + + xc7z100 + ffg900 + VERILOG + + MIXED + -2 + + + TRUE + TRUE + IP_Flow + 4 + TRUE + . + + . + 2019.1 + OUT_OF_CONTEXT + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + diff --git a/fpga/usrp3/top/x400/ip/hb47_1to2/Makefile.inc b/fpga/usrp3/top/x400/ip/hb47_1to2/Makefile.inc new file mode 100644 index 000000000..895f2b50f --- /dev/null +++ b/fpga/usrp3/top/x400/ip/hb47_1to2/Makefile.inc @@ -0,0 +1,17 @@ +# +# Copyright 2021 Ettus Research, a National Instruments Brand +# +# SPDX-License-Identifier: LGPL-3.0-or-later +# + +include $(TOOLS_DIR)/make/viv_ip_builder.mak + +IP_HB47_1TO2_SRCS = $(IP_BUILD_DIR)/hb47_1to2/hb47_1to2.xci + +IP_HB47_1TO2_OUTS = $(addprefix $(IP_BUILD_DIR)/hb47_1to2/, \ +hb47_1to2.xci.out \ +synth/hb47_1to2.vhd \ +) + +$(IP_HB47_1TO2_SRCS) $(IP_HB47_1TO2_OUTS) : $(IP_DIR)/hb47_1to2/hb47_1to2.xci + $(call BUILD_VIVADO_IP,hb47_1to2,$(ARCH),$(PART_ID),$(IP_DIR),$(IP_BUILD_DIR),0) diff --git a/fpga/usrp3/top/x400/ip/hb47_1to2/hb47_1to2.xci b/fpga/usrp3/top/x400/ip/hb47_1to2/hb47_1to2.xci new file mode 100644 index 000000000..7959aa2fe --- /dev/null +++ b/fpga/usrp3/top/x400/ip/hb47_1to2/hb47_1to2.xci @@ -0,0 +1,298 @@ + + + xilinx.com + xci + unknown + 1.0 + + + hb47_1to2 + + + ACTIVE_LOW + + 100000000 + 0 + 0.000 + 0 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + + 100000000 + 0 + 0 + 0 + 0 + 0 + undef + 0.000 + 12 + 0 + 0 + 1 + + 100000000 + 0 + 0 + 0 + 0 + 0 + undef + 0.000 + 0 + 0 + 0 + 0 + + 100000000 + 0 + 0 + 1 + 0 + 0 + undef + 0.000 + 4 + 0 + 0 + 0 + + 100000000 + 0 + 0 + 0 + 0 + 0 + undef + 0.000 + 0 + 0 + 0 + 0 + 35,35,35,35 + 35,35,35,35 + fixed + hb47_1to2.mif + 48 + 2 + 0 + 0,0,0,0 + 0,0,2,2 + 18,18,18,18 + 0 + 18 + 24 + 1 + 4 + hb47_1to2 + 0 + 0 + 1 + 0 + 0 + 16,16 + 0 + 0 + -0;-1;-0;-1 + 0,0,0,0 + 0,1,0,1 + 16,16,16,16 + 16,16 + 16 + 1 + ./ + none + 0 + 0 + 0 + 2 + 0 + 1 + 1 + 0 + 29 + 2 + 0 + 0 + 96 + 1 + 1 + 1 + 24 + 1 + 47 + 0 + 0 + none;none + -0;-1;-0;-1 + 18,18,18,18 + 1 + 18 + 1 + 0,1,2,3 + 1 + 4 + 0 + 0 + 0 + 32 + 1 + zynquplus + 1 + false + false + Basic + 300.0 + Vector + -62, 0, 194, 0, -440, 0, 855, 0, -1505, 0, 2478, 0, -3900, 0, 5990, 0, -9187, 0, 14632, 0, -26536, 0, 83009, 131071, 83009, 0, -26536, 0, 14632, 0, -9187, 0, 5990, 0, -3900, 0, 2478, 0, -1505, 0, 855, 0, -440, 0, 194, 0, -62 + Automatic + no_coe_file_loaded + 0 + false + 1 + Signed + Inferred + 18 + 24 + hb47_1to2 + Not_Required + 1 + Automatic + 0 + Signed + 16 + 1 + false + Systolic_Multiply_Accumulate + 1 + Interpolation + Coregen + false + false + false + 1 + false + true + Automatic + 4 + 2 + false + Not_Required + Automatic + 1 + 1 + 2 + Area + None + None + Automatic + Convergent_Rounding_to_Even + 18 + 0.5 + 0.0 + P4-0,P4-1,P4-2,P4-3,P4-4 + Automatic + Integer_Coefficients + Output_Sample_Period + Integer + no_coe_file_loaded + false + Single + On_Vector + false + Not_Required + 0.5 + 0.001 + All + 1.0 + 0.5 + 1 + zynquplusRFSOC + + + xczu28dr + ffvg1517 + VERILOG + + MIXED + -1 + + E + TRUE + TRUE + IP_Flow + 12 + TRUE + . + + . + 2019.1.1_AR73068 + OUT_OF_CONTEXT + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + diff --git a/fpga/usrp3/top/x400/ip/hb47_2to1/Makefile.inc b/fpga/usrp3/top/x400/ip/hb47_2to1/Makefile.inc new file mode 100644 index 000000000..e4a865941 --- /dev/null +++ b/fpga/usrp3/top/x400/ip/hb47_2to1/Makefile.inc @@ -0,0 +1,17 @@ +# +# Copyright 2021 Ettus Research, a National Instruments Brand +# +# SPDX-License-Identifier: LGPL-3.0-or-later +# + +include $(TOOLS_DIR)/make/viv_ip_builder.mak + +IP_HB47_2TO1_SRCS = $(IP_BUILD_DIR)/hb47_2to1/hb47_2to1.xci + +IP_HB47_2TO1_OUTS = $(addprefix $(IP_BUILD_DIR)/hb47_2to1/, \ +hb47_2to1.xci.out \ +synth/hb47_2to1.vhd \ +) + +$(IP_HB47_2TO1_SRCS) $(IP_HB47_2TO1_OUTS) : $(IP_DIR)/hb47_2to1/hb47_2to1.xci + $(call BUILD_VIVADO_IP,hb47_2to1,$(ARCH),$(PART_ID),$(IP_DIR),$(IP_BUILD_DIR),0) diff --git a/fpga/usrp3/top/x400/ip/hb47_2to1/hb47_2to1.xci b/fpga/usrp3/top/x400/ip/hb47_2to1/hb47_2to1.xci new file mode 100644 index 000000000..e9af18853 --- /dev/null +++ b/fpga/usrp3/top/x400/ip/hb47_2to1/hb47_2to1.xci @@ -0,0 +1,313 @@ + + + xilinx.com + xci + unknown + 1.0 + + + hb47_2to1 + + + ACTIVE_LOW + + 100000000 + 0 + 0.000 + 0 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + + 100000000 + 0 + 0 + 0 + 0 + 0 + undef + 0.000 + 6 + 0 + 0 + 1 + + 100000000 + 0 + 0 + 0 + 0 + 0 + undef + 0.000 + 0 + 0 + 0 + 0 + + 100000000 + 0 + 0 + 1 + 0 + 0 + undef + 0.000 + 8 + 0 + 0 + 0 + + 100000000 + 0 + 0 + 0 + 0 + 0 + undef + 0.000 + 0 + 0 + 0 + 0 + 35,35 + 35,35,35,35 + fixed + hb47_2to1.mif + 47 + 2 + 0 + 0,0,0,0 + 0,0,0,0 + 18,18,18,18 + 0 + 18 + 47 + 1 + 4 + hb47_2to1 + 0 + 0 + 1 + 2 + 0 + 16,16,16,16 + 0 + 0 + -0,2;-1,3;0,-2;1,-3 + 0,0,0,0 + 0,1,2,3 + 16,16,16,16 + 16,16,16,16 + 16 + 1 + ./ + none + 0 + 0 + 0 + 2 + 0 + 1 + 1 + 2 + 52 + 2 + 0 + 0 + 48 + 1 + 1 + 1 + 47 + 1 + 47 + 0 + 0 + none + 0,-2;1,-3 + 17,17 + 1 + 17 + 1 + 2,3,2,3 + 1 + 4 + 0 + 0 + 0 + 64 + 1 + zynquplus + 1 + false + false + Basic + 300.0 + Vector + -62 0 194 0 -440 0 855 0 -1505 0 2478 0 -3900 0 5990 0 -9187 0 14632 0 -26536 0 83009 131071 83009 0 -26536 0 14632 0 -9187 0 5990 0 -3900 0 2478 0 -1505 0 855 0 -440 0 194 0 -62 + Automatic + hb47.coe + 0 + false + 1 + Signed + Inferred + 18 + 47 + hb47_2to1 + Not_Required + 1 + Automatic + 0 + Signed + 16 + 2 + false + Systolic_Multiply_Accumulate + 1 + Decimation + Coregen + false + false + false + 1 + false + true + Automatic + 4 + 1 + false + Not_Required + Automatic + 1 + 1 + 2 + Area + None + None + Automatic + Convergent_Rounding_to_Even + 17 + 0.4 + 0.0 + P4-0,P4-1,P4-2,P4-3,P4-4 + Automatic + Integer_Coefficients + Input_Sample_Period + Integer + no_coe_file_loaded + false + Single + On_Vector + false + Not_Required + 0.5 + 0.001 + All + 1.0 + 0.59 + 1 + zynquplusRFSOC + + + xczu28dr + ffvg1517 + VERILOG + + MIXED + -1 + + E + TRUE + TRUE + IP_Flow + 12 + TRUE + . + + . + 2019.1.1_AR73068 + OUT_OF_CONTEXT + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + diff --git a/fpga/usrp3/top/x400/ip/x4xx_ps_rfdc_bd/Makefile.inc b/fpga/usrp3/top/x400/ip/x4xx_ps_rfdc_bd/Makefile.inc new file mode 100644 index 000000000..5d1d4b3a5 --- /dev/null +++ b/fpga/usrp3/top/x400/ip/x4xx_ps_rfdc_bd/Makefile.inc @@ -0,0 +1,46 @@ +# +# Copyright 2021 Ettus Research, a National Instruments Brand +# +# SPDX-License-Identifier: LGPL-3.0-or-later +# + +include $(TOOLS_DIR)/make/viv_ip_builder.mak + +IP_X4XX_PS_RFDC_ORIG_SRCS = $(addprefix $(IP_DIR)/x4xx_ps_rfdc_bd/, \ +x4xx_ps_rfdc_bd.tcl \ +) + +IP_X4XX_PS_RFDC_HDL_SRCS = $(addprefix $(BASE_DIR)/x400/rf/common/, \ +capture_sysref.v \ +rf_nco_reset.vhd \ +rf_reset_controller.vhd \ +rf_reset.vhd \ +clock_gates.vhd \ +sync_wrapper.v \ +axis_mux.vhd \ +gpio_to_axis_mux.vhd \ +) \ +$(addprefix $(BASE_DIR)/../lib/control/, \ +synchronizer.v \ +synchronizer_impl.v \ +) \ +$(addprefix $(BASE_DIR)/x400/regmap/, PkgRFDC_REGS_REGMAP.vhd ) + +IP_X4XX_PS_RFDC_BDTCL_SRCS = $(addprefix $(IP_BUILD_DIR)/x4xx_ps_rfdc_bd/, \ +x4xx_ps_rfdc_bd.tcl \ +) + +IP_X4XX_PS_RFDC_BD_SRCS = $(addprefix $(IP_BUILD_DIR)/x4xx_ps_rfdc_bd/, \ +x4xx_ps_rfdc_bd/x4xx_ps_rfdc_bd.bd \ +) + +BD_X4XX_PS_RFDC_BD_OUTS = $(addprefix $(IP_BUILD_DIR)/x4xx_ps_rfdc_bd/, \ +x4xx_ps_rfdc_bd.bd.out \ +x4xx_ps_rfdc_bd/x4xx_ps_rfdc_bd_ooc.xdc \ +x4xx_ps_rfdc_bd/synth/x4xx_ps_rfdc_bd.v \ +) + +EMPTY_IP_SRCS = + +$(IP_X4XX_PS_RFDC_BD_SRCS) $(BD_X4XX_PS_RFDC_BD_OUTS) $(IP_X4XX_PS_RFDC_BDTCL_SRCS): $(IP_X4XX_PS_RFDC_ORIG_SRCS) + $(call BUILD_VIVADO_BDTCL,x4xx_ps_rfdc_bd,$(ARCH),$(PART_ID),$(IP_DIR),$(IP_BUILD_DIR),$(LIB_DIR)/vivado_ipi,$(IP_X4XX_PS_RFDC_HDL_SRCS)) diff --git a/fpga/usrp3/top/x400/ip/x4xx_ps_rfdc_bd/hdl_sources.tcl b/fpga/usrp3/top/x400/ip/x4xx_ps_rfdc_bd/hdl_sources.tcl new file mode 100644 index 000000000..65c3aa6ba --- /dev/null +++ b/fpga/usrp3/top/x400/ip/x4xx_ps_rfdc_bd/hdl_sources.tcl @@ -0,0 +1,14 @@ +set script_loc [file normalize [info script]] +set script_dir [file dirname $script_loc] + +read_verilog -library work $script_dir/../../rf/common/capture_sysref.v +read_verilog -library work $script_dir/../../../../lib/control/synchronizer.v +read_verilog -library work $script_dir/../../../../lib/control/synchronizer_impl.v +read_verilog -library work $script_dir/../../rf/common/sync_wrapper.v +read_vhdl -library work $script_dir/../../rf/common/rf_nco_reset.vhd +read_vhdl -library work $script_dir/../../regmap/PkgRFDC_REGS_REGMAP.vhd +read_vhdl -library work $script_dir/../../rf/common/rf_reset_controller.vhd +read_vhdl -library work $script_dir/../../rf/common/rf_reset.vhd +read_vhdl -library work $script_dir/../../rf/common/clock_gates.vhd +read_vhdl -library work $script_dir/../../rf/common/axis_mux.vhd +read_vhdl -library work $script_dir/../../rf/common/gpio_to_axis_mux.vhd diff --git a/fpga/usrp3/top/x400/ip/x4xx_ps_rfdc_bd/regmap/common_regs.v b/fpga/usrp3/top/x400/ip/x4xx_ps_rfdc_bd/regmap/common_regs.v new file mode 100644 index 000000000..454154382 --- /dev/null +++ b/fpga/usrp3/top/x400/ip/x4xx_ps_rfdc_bd/regmap/common_regs.v @@ -0,0 +1,550 @@ +// +// Copyright 2021 Ettus Research, A National Instruments Company +// +// SPDX-License-Identifier: LGPL-3.0-or-later +// +// Module: common_regs +// Description: +// Registers definition within the x4xx_ps_rfdc_bd IP. + +//XmlParse xml_on +// +// +// +// This section lists all common Processing System ports through +// which the register maps in this project are accessed. Each input +// port to the fabric will point to a regmap. +// +// +// +// This is the main AXI4-Lite master interface that the PS +// exposes to the kernel to interact with the FPGA fabric. +// There are multiple endpoints connected to this interface. +// +// +// +// +// This is one of the two cache-coherent AXI slave ports available to +// communicate from the fabric (master) to the PS (slave). +// +// +// +// +// This is one of the two cache-coherent AXI slave ports available to +// communicate from the fabric (master) to the PS (slave). +// +// +// +// +// This is the SPI1 interface +// (see Zynq UltraScale+ Devices Register Reference) +// of the PS. +// With chip select 3 enabled transactions are targeted for the PS MB CPLD register interface linked here.{br} +// The request format on SPI is defined as.{br} +// {b}Write request:{/b} +// {ul} +// {li}1'b1 = write +// {li}15 bit address +// {li}32 bit data (MOSI) +// {li}8 bit processing gap +// {li}5 bit padding +// {li}1 bit ack +// {li}2 bit status +// {/ul} +// {b}Read request:{/b} +// {ul} +// {li}1'b0 = read +// {li}15 bit address +// {li}8 bit processing gap +// {li}32 bit data (MISO) +// {li}5 bit padding +// {li}1 bit ack +// {li}2 bit status +// {/ul} +// +// +// +// +// +// +// +// +// +// +// +// This is the map for the register space that the Processing System's +// M_AXI_HPM0_FPD port (AXI4 master interface) has access to. +// This port has a 40-bit address bus. +// +// +// +// Space reserved for RPU access +// +// +// Register space for the JTAG engine for MB CPLD programming. +// +// +// NOT IMPLEMENTED YET! Register space reserved for White Rabbit. +// +// +// MPM endpoint fro MB/DB communication. +// +// +// Register space reserved for mboard-regs (Core). +// +// +// AXI DMA engine for internal Ethernet interface. +// +// +// Misc. registers for internal Ethernet. +// +// +// Register space occupied by the Xilinx RFDC IP block. +// +// +// Register space for RFDC control/status registers. +// +// +// +// +// +// +// This is the map that the nixge driver uses in Ethernet DMA to +// move data between the Processing System's architecture and the fabric. +// This map is a combination of two main components: a Xilix AXI DMA engine +// and some registers for MAC/PHY control. +// +// +// +// +// Refer to Xilinx' AXI DMA v7.1 IP product guide for further +// information on this register map: +// https://www.xilinx.com/support/documentation/ip_documentation/axi_dma/v7_1/pg021_axi_dma.pdf +// +// +// +// MAC/PHY control for the Ethernet interface. +// +// +// +// +// +// This is a regmap to document the different ports that have access to the PS system memory. +// Each port may have different restrictions on system memory. See the corresponding window +// for details +// +// +// +// +// The HPC0 port of the PS is used for general purpose cache-coherent accesses +// to the PS system memory. Different applications may use it for different +// purposes. Its access is configured as follows: {br} +// {table border="1"} +// {tr}{th}Offset{/th} {th}Size{/th} {th}Description{/th}{tr} +// {tr}{td}0x000800000000{/td}{td}0x000800000000{/td}{td}DDR_HIGH{/td}{tr} +// {tr}{td}0x00000000{/td} {td}0x80000000{/td} {td}DDR_LOW{/td}{tr} +// {tr}{td}0xFF000000{/td} {td}0x01000000{/td} {td}LPS_OCM{/td}{tr} +// {tr}{td}0xC0000000{/td} {td}0x20000000{/td} {td}QSPI{/td}{tr} +// {/table} +// +// +// +// +// +// +// The HPC1 port of the PS is connected to the Ethernet DMA module. Three slave +// interfaces are lumped together in this window: scatter-gather, dma-rx, and dma-tx. +// Its access is configured as follows: {br} +// {table border="1"} +// {tr}{th}Offset{/th} {th}Size{/th} {th}Description{/th}{tr} +// {tr}{td}0x000800000000{/td}{td}0x000800000000{/td}{td}DDR_HIGH{/td}{tr} +// {tr}{td}0x00000000{/td} {td}0x80000000{/td} {td}DDR_LOW{/td}{tr} +// {tr}{td}0xC0000000{/td} {td}0x20000000{/td} {td}QSPI{/td}{tr} +// {/table} +// +// +// +// +// +// +// +// +// These are the registers located within the RFDC block design +// that provide control and status support for the RF chain. +// +// +// +// +// Register space for controlling the data clock MMCM instance +// within the RFDC block design. +// Refer to Xilinx' Clocking Wizard v6.0 Product Guide for the +// regiter space description in chapter 2. +// (https://www.xilinx.com/support/documentation/ip_documentation/clk_wiz/v6_0/pg065-clk-wiz.pdf) +// +// +// +// +// Control register for inverting I/Q data. +// +// +// +// +// +// +// +// +// +// +// +// +// +// +// +// +// +// +// +// +// Control register for resetting the data clock MMCM. +// +// +// Write a '1' to this bit to reset the MMCM. Then write a +// '0' to place the MMCM out of reset. +// +// +// +// +// +// +// Control register for the RF reset controller. +// Verify the FSM ID before polling starting any reset sequence. +// To use the SW reset triggers: Wait until DB*_DONE is de-asserted. +// Assert either the *_RESET or *_ENABLE bitfields. +// Wait until DB*_DONE is asserted to release the trigger. +// The DB*_DONE signal should then de-assert.{BR/} +// {b}Note: The *_DB1 constants are not used in the HDL, their purpose is +// merely for documentation.{/b} +// +// +// +// Write a '1' to this bit to reset the RF reset controller. +// Write a '0' once db0_fsm_reset_done asserts. +// +// +// +// +// Write a '1' to this bit to trigger a reset for the +// daughterboard 0 ADC chain. Write a '0' once db0_adc_seq_done +// is asserted. +// +// +// +// +// Write a '1' to this bit to trigger the enable sequence for +// the daughterboard 0 ADC chain. Write a '0' once +// db0_adc_seq_done is asserted. +// +// +// +// +// Write a '1' to this bit to trigger a reset for the +// daughterboard 0 DAC chain. Write a '0' once db0_dac_seq_done +// is asserted. +// +// +// +// +// Write a '1' to this bit to trigger the enable sequence for +// the daughterboard 0 DAC chain. Write a '0' once +// db0_dac_seq_done is asserted. +// +// +// +// +// +// +// Status register for the RF reset controller. +// Verify the FSM ID before polling starting any reset sequence. +// Refer to RF_RESET_CONTROL_REG for instructions on how to use +// the status bits in this register.{BR/} +// {b}Note: The *_DB1 constants are not used in the HDL, their purpose is +// merely for documentation.{/b} +// +// +// +// This bit asserts ('1') when the DB0 RF reset controller FSM +// reset sequence is completed. The bitfield deasserts ('0') +// after deasserting db0_fsm_reset. +// +// +// +// +// This bit asserts ('1') when the DB0 ADC chain reset sequence +// is completed. The bitfield deasserts ('0') after +// deasserting the issued triggered (enable or reset). +// +// +// +// +// This bit asserts ('1') when the DB0 DAC chain reset sequence +// is completed. The bitfield deasserts ('0') after +// deasserting the issued triggered (enable or reset). +// +// +// +// +// +// +// Status register for the RF AXI-Stream interfaces.{BR/} +// {b}Note: The *_DB1 constants are not used in the HDL, their purpose is +// merely for documentation.{/b} +// +// +// +// This bitfield is wired to the RFDC's DAC (DB0) AXI-Stream +// TReady handshake signals. The LSB is channel 0 and the MSB +// is channel 1. +// +// +// +// +// This bitfield is wired to the RFDC's DAC (DB0) AXI-Stream +// TValid handshake signals. The LSB is channel 0 and the MSB +// is channel 1. +// +// +// +// +// This bitfield is wired to the RFDC's ADC (DB0) AXI-Stream +// TReady handshake signals (Q portion). The LSB is channel 0 +// and the MSB is channel 1. +// +// +// +// +// This bitfield is wired to the RFDC's ADC (DB0) AXI-Stream +// TReady handshake signals (I portion). The LSB is channel 0 +// and the MSB is channel 1. +// +// +// +// +// This bitfield is wired to the RFDC's ADC (DB0) AXI-Stream +// TValid handshake signals (Q portion). The LSB is channel 0 +// and the MSB is channel 1. +// +// +// +// +// This bitfield is wired to the RFDC's ADC (DB0) AXI-Stream +// TValid handshake signals (I portion). The LSB is channel 0 +// and the MSB is channel 1. +// +// +// +// +// This bitfield is wired to the user's ADC (DB0) AXI-Stream +// TValid handshake signals. The LSB is channel 0 and the MSB +// is channel 1. +// +// +// +// +// This bitfield is wired to the user's ADC (DB0) AXI-Stream +// TReady handshake signals. The LSB is channel 0 and the MSB +// is channel 1. +// +// +// +// +// This bitfield is wired to the RFDC's DAC (DB1) AXI-Stream +// TReady handshake signals. The LSB is channel 0 and the MSB +// is channel 1. +// +// +// +// +// This bitfield is wired to the RFDC's DAC (DB1) AXI-Stream +// TValid handshake signals. The LSB is channel 0 and the MSB +// is channel 1. +// +// +// +// +// This bitfield is wired to the RFDC's ADC (DB1) AXI-Stream +// TReady handshake signals (Q portion). The LSB is channel 0 +// and the MSB is channel 1. +// +// +// +// +// This bitfield is wired to the RFDC's ADC (DB1) AXI-Stream +// TReady handshake signals (I portion). The LSB is channel 0 +// and the MSB is channel 1. +// +// +// +// +// This bitfield is wired to the RFDC's ADC (DB1) AXI-Stream +// TValid handshake signals (Q portion). The LSB is channel 0 +// and the MSB is channel 1. +// +// +// +// +// This bitfield is wired to the RFDC's ADC (DB1) AXI-Stream +// TValid handshake signals (I portion). The LSB is channel 0 +// and the MSB is channel 1. +// +// +// +// +// This bitfield is wired to the user's ADC (DB1) AXI-Stream +// TValid handshake signals. The LSB is channel 0 and the MSB +// is channel 1. +// +// +// +// +// This bitfield is wired to the user's ADC (DB1) AXI-Stream +// TReady handshake signals. The LSB is channel 0 and the MSB +// is channel 1. +// +// +// +// +// +// +// The fields of this register provide data to all the DAC channels when enabled +// by the CALIBRATION_ENABLE register. +// +// +// +// +// +// +// +// +// +// This register enables calibration data in the DAC data path for each of the +// four channels. Each of these bits is normally '0'. When written '1', DAC data +// for the corresponding channel will be constantly driven with the contents of +// the CALIBRATION_DATA register. +// +// +// +// Enables calibration data for channel 0. +// +// +// +// +// Enables calibration data for channel 1. +// +// +// +// +// Enables calibration data for channel 2. +// +// +// +// +// Enables calibration data for channel 3. +// +// +// +// +// +// +// Enable RF MMCM outputs. +// +// +// +// +// +// +// +// +// +// +// Data Clk Pll Status Register +// +// +// +// +// +// +// +// This register shows threshold status for the ADCs. Each bit reflects the +// RFDC's real-time ADC status signals, which will assert when the ADC input +// signal exceeds the programmed threshold value. The status will remain +// asserted until cleared by software. +// The bitfield names follow the pattern ADCX_ZZ_over_threshold(1|2), where X is +// the location of the tile in the converter column and ZZ is either 01 (the +// lower RF-ADC in the tile) or 23 (the upper RF-ADC in the tile). +// See also the Xilinx document PG269. +// +// +// +// +// +// +// +// +// +// +// +// +// +// +// +// +// +// +// +// +// +// +// +// +// +// +// +// +// This register provides information to the driver on the type +// of DSP that is instantiated in the fabric.{BR/} +// The X410 platform supports multiple RF daughterboards, each requiring +// a different fabric RF DSP chain that works with specific RFDC settings. +// Each bandwidth DSP chain has a unique identifier (BW in MHz), this +// information is conveyed in this register to let the driver +// configure the RFDC with the proper settings. +// Also, channel count for the DSP module is included.{BR/} +// {b}Note: The *_DB1 constants are not used in the HDL, their purpose is +// merely for documentation.{/b} +// +// +// Fabric DSP BW in MHz for daughterboard 0. +// +// +// Fabric DSP RX channel count for daughterboard 0. +// +// +// Fabric DSP TX channel count for daughterboard 0. +// +// +// Fabric DSP BW in MHz for daughterboard 1. +// +// +// Fabric DSP RX channel count for daughterboard 0. +// +// +// Fabric DSP TX channel count for daughterboard 0. +// +// +// +// +// +//XmlParse xml_off diff --git a/fpga/usrp3/top/x400/ip/x4xx_ps_rfdc_bd/regmap/uhd_regs.v b/fpga/usrp3/top/x400/ip/x4xx_ps_rfdc_bd/regmap/uhd_regs.v new file mode 100644 index 000000000..329393bfc --- /dev/null +++ b/fpga/usrp3/top/x400/ip/x4xx_ps_rfdc_bd/regmap/uhd_regs.v @@ -0,0 +1,336 @@ +// +// Copyright 2021 Ettus Research, A National Instruments Company +// +// SPDX-License-Identifier: LGPL-3.0-or-later +// +// Module: uhd_regs +// Description: +// Registers definition within the x4xx_ps_rfdc_bd IP. + +//XmlParse xml_on +// +// +// +// 100G MAC ethernet registers (Link 0) defined in the CMAC Manual starting on pg 187. +// +// - http://www.xilinx.com/support/documentation/ip_documentation/cmac_usplus/v2_4/pg203-cmac-usplus.pdf +// +// +// +// + +//XmlParse xml_on +// +// +// +// +// 10G MAC ethernet registers defined in the USRP OSS distribution fpga/usrp3/lib/xge/doc/xge_mac_spec.pdf +// +// +// +// + + +// +// +// +// Scatter Gather DMA block defined in Xilinx DMA manual start on pg 11 +// +// - https://www.xilinx.com/support/documentation/ip_documentation/axi_dma/v7_1/pg021_axi_dma.pdf +// +// +// +// + +// +// +// +// +// +// +// nixge (maps to 10g mac if present) +// +// +// +// +// Constant indicating version for this space. +// Not used by the NIXGE driver (12/4/2020) +// +// +// +// +// Generically this mirrors the activity LED. Specific meaning varies based on the MGT_PROTOCOL. +// +// +// +// +// Generically means that a connection with a peer has been established. Specific +// meaning varies based on the MGT_PROTOCOL. +// +// +// +// +// Constant indicating what flavor of communication this port is using +// +// - 0 = NONE +// - 1 = 1GbE +// - 2 = 10GbE +// - 3 = Aurora +// - 4 = WhiteRabbit +// - 5 = 100GbE +// +// +// +// +// +// Constant indicating which port this register is hooked to +// +// - 0 = QSFP0 +// - 1 = QSFP1 +// +// +// +// +// +// +// Definition of this register depends on Protocol +// +// **10GBE** +// +// *READ - Status* +// +// - 0 = status_crc_error +// - 1 = status_fragment_error +// - 2 = status_txdfifo_ovflow +// - 3 = status_txdfifo_udflow +// - 4 = status_rxdfifo_ovflow +// - 5 = status_rxdfifo_udflow +// - 6 = status_pause_frame_rx +// - 7 = status_local_fault +// - 8 = status_remote_fault +// +// *WRITE - Ctl* +// +// - 0 = ctrl_tx_enable +// +// **100 GBE** +// +// *READ - Status* +// +// - 0 = tx_ovfout - Sets if TX overflow reported by CMAC +// (Stays set till MAC is reset). This is a fatal error +// - 1 = tx_unfout - Sets if TX underflow reported by CMAC +// (Stays set till MAC is reset). This is a fatal error +// - 2 = stat_rx_aligned - goes high when CMAC has finished +// alignment, and is ready to start reception of traffic. +// - 3 = mac_dropped_packet - If the mac RX wants to push data(TVALID) +// but upstream is trying to hold(TREADY)off we drop a packet. +// Upstream circuitry should detect this when traffic is forked +// between CHDR and CPU, so this bit will only set if there is a +// HW design error. +// - 4 = auto_config_done - This bit goes high when the auto_config +// state machine finishes operation. It is very similiar to +// stat_rx_alligned, but waits for extra writes which occur +// after allignement to complete. +// - 24:16 = pause_mask - readable version of pause_mask bellow. +// +// *WRITE - Ctl* +// +// - 0 = auto_enable - Defaults to ON after reset - Enables a +// state machine that performs CMAC register writes to +// bring up the MAC without SW intervention. +// - 24:16 = pause_mask - A second layer of enables(the first being +// register in the CMAC) on the pause_request mechanic. Bits +// 7:0 of enable pause on PFC7:0. Bit 8 enables global pause +// request (not priority controlled). The mask is used for TX +// and RX. +// +// +// +// +// +// Definition of this register depends on Protocol +// +// **10GBE** +// +// *READ - Status * +// +// - 0 = core_status 0 - link_up +// - 1 = core_status 1 +// - 2 = core_status 2 +// - 3 = core_status 3 +// - 4 = core_status 4 +// - 5 = core_status 5 +// - 6 = core_status 6 +// - 7 = core_status 7 +// +// **100 GBE** +// +// *READ - Status* +// +// - 0 = usr_tx_reset - TX PLL's have locked - The clock for the 100G mac isn't stable till this bit sets. +// - 1 = usr_rx_reset - RX PLL's have locked +// +// +// +// +// +// +// When set identify_value is used to control the activity LED. +// When clear the activity LED set on any TX or RX traffic to the mgt +// +// +// +// +// When identify_enable is set, this value controls the activity LED. +// +// +// +// +// +// The x4xx family of products does not use MDIO. +// +// +// +// +// Only valid if the protocol is Aurora. +// +// +// +// +// Only valid if the protocol is Aurora. +// +// +// +// +// Only valid if the protocol is Aurora. +// +// +// +// +// Only valid if the protocol is Aurora. +// +// +// +// +// +// +// +// +// UIO +// +// +// +// Set this port's IP address +// +// +// +// +// Set the UDP port for CHDR_traffic +// +// +// +// +// If BRIDGE_ENABLE is set use this MAC_ID +// +// +// +// +// If BRIDGE_ENABLE is set use this MAC_ID +// +// +// +// +// If BRIDGE_ENABLE is set use this IP Address +// +// +// +// +// If BRIDGE_ENABLE is set use this UDP Port for CHDR_traffic +// +// +// +// +// Bit 0 Controls the following logic +// +//```verilog +// always_comb begin : bridge_mux +// my_mac = bridge_en ? bridge_mac_reg : mac_reg; +// my_ip = bridge_en ? bridge_ip_reg : ip_reg; +// my_udp_chdr_port = bridge_en ? bridge_udp_port : udp_port; +// end +//``` +// +// +// +// +// +// Count the number of Packets dropped that were addressed to the CHDR section. +// +// +// +// +// Count the number of Packets dropped that were addressed to us, but not to the CHDR section. +// +// +// +// +// +// If the fullness of the CHDR_FIFO in ETH_W words exceeds this value request an ethernet pause. This feature is only +// used with 100Gb ethernet +// +// +// +// +// If the fullness of the CHDR_FIFO in ETH_W words falls bellow this value stop requesting an ethernet pause. +// *Pause clear must be less than pause set or terrible things will happen.* +// The clearing of the pause request causes the MAC to send a request to resume traffic. This feature is only +// used with 100Gb ethernet +// +// +// +// +// + +// +// +// +// Register space for a single QSFP Communication port. This currently breaks into 2 possible configurations +// +// - 1X10GB Ethernet - Using OpenCore XGE MAC +// - 1x100GB Ethernet - Using Xilinx CMAC +// - (future possible) - Xilinx Aurora (various rates and lane widths) +// - (future possible) - 4X10GB Ethernet +// +// +// +// +// +// +// +// + + +// +// +// +// - 0_0 indicates QSFP0 - Lane0 or a 4 LANE QSFP0 +// - 0_1 indicates QSFP0 - Lane1 +// - 0_2 indicates QSFP0 - Lane2 +// - 0_3 indicates QSFP0 - Lane3 +// - 1_0 indicates QSFP1 - Lane0 or a 4 LANE QSFP1 +// - 1_1 indicates QSFP1 - Lane1 +// - 1_2 indicates QSFP1 - Lane2 +// - 1_3 indicates QSFP1 - Lane3 +// +// +// +// +// +// +// +// +// +// +// +//XmlParse xml_off diff --git a/fpga/usrp3/top/x400/ip/x4xx_ps_rfdc_bd/synthstub/x4xx_ps_rfdc_bd.vhd b/fpga/usrp3/top/x400/ip/x4xx_ps_rfdc_bd/synthstub/x4xx_ps_rfdc_bd.vhd new file mode 100644 index 000000000..2fac8ad64 --- /dev/null +++ b/fpga/usrp3/top/x400/ip/x4xx_ps_rfdc_bd/synthstub/x4xx_ps_rfdc_bd.vhd @@ -0,0 +1,411 @@ +------------------------------------------------------------------------------------------ +-- +-- File: x4xx_ps_rfdc_bd.vhd +-- Author: niBlockDesign::niBdExportStub +-- Original Project: HwBuildTools +-- Date: 03 February 2021 +-- +------------------------------------------------------------------------------------------ +-- (c) Copyright National Instruments Corporation +-- All Rights Reserved +-- National Instruments Internal Information +------------------------------------------------------------------------------------------ +-- +-- Purpose: This is an automatically generated stub file to match the entity +-- declaration for 'x4xx_ps_rfdc_bd'. This file was created using niBdExportStub +-- Do not modify this file directly! +-- +------------------------------------------------------------------------------------------ + +library ieee; +use ieee.std_logic_1164.all; +library unisim; +use unisim.vcomponents.all; + +entity x4xx_ps_rfdc_bd is +port ( + adc_data_out_resetn_dclk : out STD_LOGIC; + adc_enable_data_rclk : out STD_LOGIC; + adc_reset_pulse_dclk : in STD_LOGIC; + adc_rfdc_axi_resetn_rclk : out STD_LOGIC; + bus_clk : in STD_LOGIC; + bus_rstn : in STD_LOGIC; + clk40 : in STD_LOGIC; + clk40_rstn : in STD_LOGIC; + dac_data_in_resetn_dclk : out STD_LOGIC; + dac_data_in_resetn_dclk2x : out STD_LOGIC; + dac_data_in_resetn_rclk : out STD_LOGIC; + dac_data_in_resetn_rclk2x : out STD_LOGIC; + dac_reset_pulse_dclk : in STD_LOGIC; + data_clk : out STD_LOGIC; + data_clk_2x : out STD_LOGIC; + data_clock_locked : out STD_LOGIC; + enable_gated_clocks_clk40 : in STD_LOGIC; + enable_sysref_rclk : in STD_LOGIC; + fir_resetn_rclk2x : out STD_LOGIC; + gated_base_clks_valid_clk40 : out STD_LOGIC; + invert_adc_iq_rclk2 : out STD_LOGIC_VECTOR ( 7 downto 0 ); + invert_dac_iq_rclk2 : out STD_LOGIC_VECTOR ( 7 downto 0 ); + irq0_lpd_rpu_n : in STD_LOGIC; + irq1_lpd_rpu_n : in STD_LOGIC; + jtag0_tck : inout STD_LOGIC; + jtag0_tdi : inout STD_LOGIC; + jtag0_tdo : in STD_LOGIC; + jtag0_tms : inout STD_LOGIC; + nco_reset_done_dclk : out STD_LOGIC; + pl_clk40 : out STD_LOGIC; + pl_clk100 : out STD_LOGIC; + pl_clk166 : out STD_LOGIC; + pl_clk200 : out STD_LOGIC; + pl_ps_irq0 : in STD_LOGIC_VECTOR ( 7 downto 0 ); + pl_ps_irq1 : in STD_LOGIC_VECTOR ( 5 downto 0 ); + pl_resetn0 : out STD_LOGIC; + pl_resetn1 : out STD_LOGIC; + pl_resetn2 : out STD_LOGIC; + pl_resetn3 : out STD_LOGIC; + pll_ref_clk_in : in STD_LOGIC; + pll_ref_clk_out : out STD_LOGIC; + rf_axi_status_clk40 : in STD_LOGIC_VECTOR ( 31 downto 0 ); + rf_dsp_info_clk40 : in STD_LOGIC_VECTOR ( 31 downto 0 ); + rfdc_clk : out STD_LOGIC_VECTOR ( 0 to 0 ); + rfdc_clk_2x : out STD_LOGIC_VECTOR ( 0 to 0 ); + rfdc_irq : out STD_LOGIC; + s_axi_hp0_aclk : in STD_LOGIC; + s_axi_hp1_aclk : in STD_LOGIC; + s_axi_hpc0_aclk : in STD_LOGIC; + start_nco_reset_dclk : in STD_LOGIC; + sysref_out_pclk : out STD_LOGIC; + sysref_out_rclk : out STD_LOGIC; + sysref_pl_in : in STD_LOGIC; + s_axi_hp0_aruser : in STD_LOGIC; + s_axi_hp0_awuser : in STD_LOGIC; + s_axi_hp0_awid : in STD_LOGIC_VECTOR ( 5 downto 0 ); + s_axi_hp0_awaddr : in STD_LOGIC_VECTOR ( 48 downto 0 ); + s_axi_hp0_awlen : in STD_LOGIC_VECTOR ( 7 downto 0 ); + s_axi_hp0_awsize : in STD_LOGIC_VECTOR ( 2 downto 0 ); + s_axi_hp0_awburst : in STD_LOGIC_VECTOR ( 1 downto 0 ); + s_axi_hp0_awlock : in STD_LOGIC; + s_axi_hp0_awcache : in STD_LOGIC_VECTOR ( 3 downto 0 ); + s_axi_hp0_awprot : in STD_LOGIC_VECTOR ( 2 downto 0 ); + s_axi_hp0_awvalid : in STD_LOGIC; + s_axi_hp0_awready : out STD_LOGIC; + s_axi_hp0_wdata : in STD_LOGIC_VECTOR ( 127 downto 0 ); + s_axi_hp0_wstrb : in STD_LOGIC_VECTOR ( 15 downto 0 ); + s_axi_hp0_wlast : in STD_LOGIC; + s_axi_hp0_wvalid : in STD_LOGIC; + s_axi_hp0_wready : out STD_LOGIC; + s_axi_hp0_bid : out STD_LOGIC_VECTOR ( 5 downto 0 ); + s_axi_hp0_bresp : out STD_LOGIC_VECTOR ( 1 downto 0 ); + s_axi_hp0_bvalid : out STD_LOGIC; + s_axi_hp0_bready : in STD_LOGIC; + s_axi_hp0_arid : in STD_LOGIC_VECTOR ( 5 downto 0 ); + s_axi_hp0_araddr : in STD_LOGIC_VECTOR ( 48 downto 0 ); + s_axi_hp0_arlen : in STD_LOGIC_VECTOR ( 7 downto 0 ); + s_axi_hp0_arsize : in STD_LOGIC_VECTOR ( 2 downto 0 ); + s_axi_hp0_arburst : in STD_LOGIC_VECTOR ( 1 downto 0 ); + s_axi_hp0_arlock : in STD_LOGIC; + s_axi_hp0_arcache : in STD_LOGIC_VECTOR ( 3 downto 0 ); + s_axi_hp0_arprot : in STD_LOGIC_VECTOR ( 2 downto 0 ); + s_axi_hp0_arvalid : in STD_LOGIC; + s_axi_hp0_arready : out STD_LOGIC; + s_axi_hp0_rid : out STD_LOGIC_VECTOR ( 5 downto 0 ); + s_axi_hp0_rdata : out STD_LOGIC_VECTOR ( 127 downto 0 ); + s_axi_hp0_rresp : out STD_LOGIC_VECTOR ( 1 downto 0 ); + s_axi_hp0_rlast : out STD_LOGIC; + s_axi_hp0_rvalid : out STD_LOGIC; + s_axi_hp0_rready : in STD_LOGIC; + s_axi_hp0_awqos : in STD_LOGIC_VECTOR ( 3 downto 0 ); + s_axi_hp0_arqos : in STD_LOGIC_VECTOR ( 3 downto 0 ); + s_axis_eth_dma_tdata : in STD_LOGIC_VECTOR ( 63 downto 0 ); + s_axis_eth_dma_tkeep : in STD_LOGIC_VECTOR ( 7 downto 0 ); + s_axis_eth_dma_tlast : in STD_LOGIC; + s_axis_eth_dma_tready : out STD_LOGIC; + s_axis_eth_dma_tvalid : in STD_LOGIC; + s_axi_hp1_aruser : in STD_LOGIC; + s_axi_hp1_awuser : in STD_LOGIC; + s_axi_hp1_awid : in STD_LOGIC_VECTOR ( 5 downto 0 ); + s_axi_hp1_awaddr : in STD_LOGIC_VECTOR ( 48 downto 0 ); + s_axi_hp1_awlen : in STD_LOGIC_VECTOR ( 7 downto 0 ); + s_axi_hp1_awsize : in STD_LOGIC_VECTOR ( 2 downto 0 ); + s_axi_hp1_awburst : in STD_LOGIC_VECTOR ( 1 downto 0 ); + s_axi_hp1_awlock : in STD_LOGIC; + s_axi_hp1_awcache : in STD_LOGIC_VECTOR ( 3 downto 0 ); + s_axi_hp1_awprot : in STD_LOGIC_VECTOR ( 2 downto 0 ); + s_axi_hp1_awvalid : in STD_LOGIC; + s_axi_hp1_awready : out STD_LOGIC; + s_axi_hp1_wdata : in STD_LOGIC_VECTOR ( 127 downto 0 ); + s_axi_hp1_wstrb : in STD_LOGIC_VECTOR ( 15 downto 0 ); + s_axi_hp1_wlast : in STD_LOGIC; + s_axi_hp1_wvalid : in STD_LOGIC; + s_axi_hp1_wready : out STD_LOGIC; + s_axi_hp1_bid : out STD_LOGIC_VECTOR ( 5 downto 0 ); + s_axi_hp1_bresp : out STD_LOGIC_VECTOR ( 1 downto 0 ); + s_axi_hp1_bvalid : out STD_LOGIC; + s_axi_hp1_bready : in STD_LOGIC; + s_axi_hp1_arid : in STD_LOGIC_VECTOR ( 5 downto 0 ); + s_axi_hp1_araddr : in STD_LOGIC_VECTOR ( 48 downto 0 ); + s_axi_hp1_arlen : in STD_LOGIC_VECTOR ( 7 downto 0 ); + s_axi_hp1_arsize : in STD_LOGIC_VECTOR ( 2 downto 0 ); + s_axi_hp1_arburst : in STD_LOGIC_VECTOR ( 1 downto 0 ); + s_axi_hp1_arlock : in STD_LOGIC; + s_axi_hp1_arcache : in STD_LOGIC_VECTOR ( 3 downto 0 ); + s_axi_hp1_arprot : in STD_LOGIC_VECTOR ( 2 downto 0 ); + s_axi_hp1_arvalid : in STD_LOGIC; + s_axi_hp1_arready : out STD_LOGIC; + s_axi_hp1_rid : out STD_LOGIC_VECTOR ( 5 downto 0 ); + s_axi_hp1_rdata : out STD_LOGIC_VECTOR ( 127 downto 0 ); + s_axi_hp1_rresp : out STD_LOGIC_VECTOR ( 1 downto 0 ); + s_axi_hp1_rlast : out STD_LOGIC; + s_axi_hp1_rvalid : out STD_LOGIC; + s_axi_hp1_rready : in STD_LOGIC; + s_axi_hp1_awqos : in STD_LOGIC_VECTOR ( 3 downto 0 ); + s_axi_hp1_arqos : in STD_LOGIC_VECTOR ( 3 downto 0 ); + s_axi_hpc0_aruser : in STD_LOGIC; + s_axi_hpc0_awuser : in STD_LOGIC; + s_axi_hpc0_awid : in STD_LOGIC_VECTOR ( 5 downto 0 ); + s_axi_hpc0_awaddr : in STD_LOGIC_VECTOR ( 48 downto 0 ); + s_axi_hpc0_awlen : in STD_LOGIC_VECTOR ( 7 downto 0 ); + s_axi_hpc0_awsize : in STD_LOGIC_VECTOR ( 2 downto 0 ); + s_axi_hpc0_awburst : in STD_LOGIC_VECTOR ( 1 downto 0 ); + s_axi_hpc0_awlock : in STD_LOGIC; + s_axi_hpc0_awcache : in STD_LOGIC_VECTOR ( 3 downto 0 ); + s_axi_hpc0_awprot : in STD_LOGIC_VECTOR ( 2 downto 0 ); + s_axi_hpc0_awvalid : in STD_LOGIC; + s_axi_hpc0_awready : out STD_LOGIC; + s_axi_hpc0_wdata : in STD_LOGIC_VECTOR ( 127 downto 0 ); + s_axi_hpc0_wstrb : in STD_LOGIC_VECTOR ( 15 downto 0 ); + s_axi_hpc0_wlast : in STD_LOGIC; + s_axi_hpc0_wvalid : in STD_LOGIC; + s_axi_hpc0_wready : out STD_LOGIC; + s_axi_hpc0_bid : out STD_LOGIC_VECTOR ( 5 downto 0 ); + s_axi_hpc0_bresp : out STD_LOGIC_VECTOR ( 1 downto 0 ); + s_axi_hpc0_bvalid : out STD_LOGIC; + s_axi_hpc0_bready : in STD_LOGIC; + s_axi_hpc0_arid : in STD_LOGIC_VECTOR ( 5 downto 0 ); + s_axi_hpc0_araddr : in STD_LOGIC_VECTOR ( 48 downto 0 ); + s_axi_hpc0_arlen : in STD_LOGIC_VECTOR ( 7 downto 0 ); + s_axi_hpc0_arsize : in STD_LOGIC_VECTOR ( 2 downto 0 ); + s_axi_hpc0_arburst : in STD_LOGIC_VECTOR ( 1 downto 0 ); + s_axi_hpc0_arlock : in STD_LOGIC; + s_axi_hpc0_arcache : in STD_LOGIC_VECTOR ( 3 downto 0 ); + s_axi_hpc0_arprot : in STD_LOGIC_VECTOR ( 2 downto 0 ); + s_axi_hpc0_arvalid : in STD_LOGIC; + s_axi_hpc0_arready : out STD_LOGIC; + s_axi_hpc0_rid : out STD_LOGIC_VECTOR ( 5 downto 0 ); + s_axi_hpc0_rdata : out STD_LOGIC_VECTOR ( 127 downto 0 ); + s_axi_hpc0_rresp : out STD_LOGIC_VECTOR ( 1 downto 0 ); + s_axi_hpc0_rlast : out STD_LOGIC; + s_axi_hpc0_rvalid : out STD_LOGIC; + s_axi_hpc0_rready : in STD_LOGIC; + s_axi_hpc0_awqos : in STD_LOGIC_VECTOR ( 3 downto 0 ); + s_axi_hpc0_arqos : in STD_LOGIC_VECTOR ( 3 downto 0 ); + adc0_clk_clk_n : in STD_LOGIC; + adc0_clk_clk_p : in STD_LOGIC; + adc2_clk_clk_n : in STD_LOGIC; + adc2_clk_clk_p : in STD_LOGIC; + m_axi_app_awaddr : out STD_LOGIC_VECTOR ( 39 downto 0 ); + m_axi_app_awprot : out STD_LOGIC_VECTOR ( 2 downto 0 ); + m_axi_app_awvalid : out STD_LOGIC_VECTOR ( 0 to 0 ); + m_axi_app_awready : in STD_LOGIC_VECTOR ( 0 to 0 ); + m_axi_app_wdata : out STD_LOGIC_VECTOR ( 31 downto 0 ); + m_axi_app_wstrb : out STD_LOGIC_VECTOR ( 3 downto 0 ); + m_axi_app_wvalid : out STD_LOGIC_VECTOR ( 0 to 0 ); + m_axi_app_wready : in STD_LOGIC_VECTOR ( 0 to 0 ); + m_axi_app_bresp : in STD_LOGIC_VECTOR ( 1 downto 0 ); + m_axi_app_bvalid : in STD_LOGIC_VECTOR ( 0 to 0 ); + m_axi_app_bready : out STD_LOGIC_VECTOR ( 0 to 0 ); + m_axi_app_araddr : out STD_LOGIC_VECTOR ( 39 downto 0 ); + m_axi_app_arprot : out STD_LOGIC_VECTOR ( 2 downto 0 ); + m_axi_app_arvalid : out STD_LOGIC_VECTOR ( 0 to 0 ); + m_axi_app_arready : in STD_LOGIC_VECTOR ( 0 to 0 ); + m_axi_app_rdata : in STD_LOGIC_VECTOR ( 31 downto 0 ); + m_axi_app_rresp : in STD_LOGIC_VECTOR ( 1 downto 0 ); + m_axi_app_rvalid : in STD_LOGIC_VECTOR ( 0 to 0 ); + m_axi_app_rready : out STD_LOGIC_VECTOR ( 0 to 0 ); + dac0_clk_clk_n : in STD_LOGIC; + dac0_clk_clk_p : in STD_LOGIC; + dac1_clk_clk_n : in STD_LOGIC; + dac1_clk_clk_p : in STD_LOGIC; + gpio_0_tri_i : in STD_LOGIC_VECTOR ( 31 downto 0 ); + gpio_0_tri_o : out STD_LOGIC_VECTOR ( 31 downto 0 ); + gpio_0_tri_t : out STD_LOGIC_VECTOR ( 31 downto 0 ); + m_axi_eth_internal_awaddr : out STD_LOGIC_VECTOR ( 39 downto 0 ); + m_axi_eth_internal_awprot : out STD_LOGIC_VECTOR ( 2 downto 0 ); + m_axi_eth_internal_awvalid : out STD_LOGIC_VECTOR ( 0 to 0 ); + m_axi_eth_internal_awready : in STD_LOGIC_VECTOR ( 0 to 0 ); + m_axi_eth_internal_wdata : out STD_LOGIC_VECTOR ( 31 downto 0 ); + m_axi_eth_internal_wstrb : out STD_LOGIC_VECTOR ( 3 downto 0 ); + m_axi_eth_internal_wvalid : out STD_LOGIC_VECTOR ( 0 to 0 ); + m_axi_eth_internal_wready : in STD_LOGIC_VECTOR ( 0 to 0 ); + m_axi_eth_internal_bresp : in STD_LOGIC_VECTOR ( 1 downto 0 ); + m_axi_eth_internal_bvalid : in STD_LOGIC_VECTOR ( 0 to 0 ); + m_axi_eth_internal_bready : out STD_LOGIC_VECTOR ( 0 to 0 ); + m_axi_eth_internal_araddr : out STD_LOGIC_VECTOR ( 39 downto 0 ); + m_axi_eth_internal_arprot : out STD_LOGIC_VECTOR ( 2 downto 0 ); + m_axi_eth_internal_arvalid : out STD_LOGIC_VECTOR ( 0 to 0 ); + m_axi_eth_internal_arready : in STD_LOGIC_VECTOR ( 0 to 0 ); + m_axi_eth_internal_rdata : in STD_LOGIC_VECTOR ( 31 downto 0 ); + m_axi_eth_internal_rresp : in STD_LOGIC_VECTOR ( 1 downto 0 ); + m_axi_eth_internal_rvalid : in STD_LOGIC_VECTOR ( 0 to 0 ); + m_axi_eth_internal_rready : out STD_LOGIC_VECTOR ( 0 to 0 ); + m_axis_eth_dma_tdata : out STD_LOGIC_VECTOR ( 63 downto 0 ); + m_axis_eth_dma_tkeep : out STD_LOGIC_VECTOR ( 7 downto 0 ); + m_axis_eth_dma_tlast : out STD_LOGIC; + m_axis_eth_dma_tready : in STD_LOGIC; + m_axis_eth_dma_tvalid : out STD_LOGIC; + m_axi_rpu_awaddr : out STD_LOGIC_VECTOR ( 39 downto 0 ); + m_axi_rpu_awprot : out STD_LOGIC_VECTOR ( 2 downto 0 ); + m_axi_rpu_awvalid : out STD_LOGIC; + m_axi_rpu_awready : in STD_LOGIC; + m_axi_rpu_wdata : out STD_LOGIC_VECTOR ( 31 downto 0 ); + m_axi_rpu_wstrb : out STD_LOGIC_VECTOR ( 3 downto 0 ); + m_axi_rpu_wvalid : out STD_LOGIC; + m_axi_rpu_wready : in STD_LOGIC; + m_axi_rpu_bresp : in STD_LOGIC_VECTOR ( 1 downto 0 ); + m_axi_rpu_bvalid : in STD_LOGIC; + m_axi_rpu_bready : out STD_LOGIC; + m_axi_rpu_araddr : out STD_LOGIC_VECTOR ( 39 downto 0 ); + m_axi_rpu_arprot : out STD_LOGIC_VECTOR ( 2 downto 0 ); + m_axi_rpu_arvalid : out STD_LOGIC; + m_axi_rpu_arready : in STD_LOGIC; + m_axi_rpu_rdata : in STD_LOGIC_VECTOR ( 31 downto 0 ); + m_axi_rpu_rresp : in STD_LOGIC_VECTOR ( 1 downto 0 ); + m_axi_rpu_rvalid : in STD_LOGIC; + m_axi_rpu_rready : out STD_LOGIC; + m_axi_core_awaddr : out STD_LOGIC_VECTOR ( 39 downto 0 ); + m_axi_core_awprot : out STD_LOGIC_VECTOR ( 2 downto 0 ); + m_axi_core_awvalid : out STD_LOGIC_VECTOR ( 0 to 0 ); + m_axi_core_awready : in STD_LOGIC_VECTOR ( 0 to 0 ); + m_axi_core_wdata : out STD_LOGIC_VECTOR ( 31 downto 0 ); + m_axi_core_wstrb : out STD_LOGIC_VECTOR ( 3 downto 0 ); + m_axi_core_wvalid : out STD_LOGIC_VECTOR ( 0 to 0 ); + m_axi_core_wready : in STD_LOGIC_VECTOR ( 0 to 0 ); + m_axi_core_bresp : in STD_LOGIC_VECTOR ( 1 downto 0 ); + m_axi_core_bvalid : in STD_LOGIC_VECTOR ( 0 to 0 ); + m_axi_core_bready : out STD_LOGIC_VECTOR ( 0 to 0 ); + m_axi_core_araddr : out STD_LOGIC_VECTOR ( 39 downto 0 ); + m_axi_core_arprot : out STD_LOGIC_VECTOR ( 2 downto 0 ); + m_axi_core_arvalid : out STD_LOGIC_VECTOR ( 0 to 0 ); + m_axi_core_arready : in STD_LOGIC_VECTOR ( 0 to 0 ); + m_axi_core_rdata : in STD_LOGIC_VECTOR ( 31 downto 0 ); + m_axi_core_rresp : in STD_LOGIC_VECTOR ( 1 downto 0 ); + m_axi_core_rvalid : in STD_LOGIC_VECTOR ( 0 to 0 ); + m_axi_core_rready : out STD_LOGIC_VECTOR ( 0 to 0 ); + m_axi_mpm_ep_awaddr : out STD_LOGIC_VECTOR ( 39 downto 0 ); + m_axi_mpm_ep_awprot : out STD_LOGIC_VECTOR ( 2 downto 0 ); + m_axi_mpm_ep_awvalid : out STD_LOGIC_VECTOR ( 0 to 0 ); + m_axi_mpm_ep_awready : in STD_LOGIC_VECTOR ( 0 to 0 ); + m_axi_mpm_ep_wdata : out STD_LOGIC_VECTOR ( 31 downto 0 ); + m_axi_mpm_ep_wstrb : out STD_LOGIC_VECTOR ( 3 downto 0 ); + m_axi_mpm_ep_wvalid : out STD_LOGIC_VECTOR ( 0 to 0 ); + m_axi_mpm_ep_wready : in STD_LOGIC_VECTOR ( 0 to 0 ); + m_axi_mpm_ep_bresp : in STD_LOGIC_VECTOR ( 1 downto 0 ); + m_axi_mpm_ep_bvalid : in STD_LOGIC_VECTOR ( 0 to 0 ); + m_axi_mpm_ep_bready : out STD_LOGIC_VECTOR ( 0 to 0 ); + m_axi_mpm_ep_araddr : out STD_LOGIC_VECTOR ( 39 downto 0 ); + m_axi_mpm_ep_arprot : out STD_LOGIC_VECTOR ( 2 downto 0 ); + m_axi_mpm_ep_arvalid : out STD_LOGIC_VECTOR ( 0 to 0 ); + m_axi_mpm_ep_arready : in STD_LOGIC_VECTOR ( 0 to 0 ); + m_axi_mpm_ep_rdata : in STD_LOGIC_VECTOR ( 31 downto 0 ); + m_axi_mpm_ep_rresp : in STD_LOGIC_VECTOR ( 1 downto 0 ); + m_axi_mpm_ep_rvalid : in STD_LOGIC_VECTOR ( 0 to 0 ); + m_axi_mpm_ep_rready : out STD_LOGIC_VECTOR ( 0 to 0 ); + adc_tile224_ch0_dout_i_tdata : out STD_LOGIC_VECTOR ( 127 downto 0 ); + adc_tile224_ch0_dout_i_tready : in STD_LOGIC; + adc_tile224_ch0_dout_i_tvalid : out STD_LOGIC; + adc_tile224_ch0_dout_q_tdata : out STD_LOGIC_VECTOR ( 127 downto 0 ); + adc_tile224_ch0_dout_q_tready : in STD_LOGIC; + adc_tile224_ch0_dout_q_tvalid : out STD_LOGIC; + adc_tile224_ch1_dout_i_tdata : out STD_LOGIC_VECTOR ( 127 downto 0 ); + adc_tile224_ch1_dout_i_tready : in STD_LOGIC; + adc_tile224_ch1_dout_i_tvalid : out STD_LOGIC; + adc_tile224_ch1_dout_q_tdata : out STD_LOGIC_VECTOR ( 127 downto 0 ); + adc_tile224_ch1_dout_q_tready : in STD_LOGIC; + adc_tile224_ch1_dout_q_tvalid : out STD_LOGIC; + adc_tile226_ch0_dout_i_tdata : out STD_LOGIC_VECTOR ( 127 downto 0 ); + adc_tile226_ch0_dout_i_tready : in STD_LOGIC; + adc_tile226_ch0_dout_i_tvalid : out STD_LOGIC; + adc_tile226_ch0_dout_q_tdata : out STD_LOGIC_VECTOR ( 127 downto 0 ); + adc_tile226_ch0_dout_q_tready : in STD_LOGIC; + adc_tile226_ch0_dout_q_tvalid : out STD_LOGIC; + adc_tile226_ch1_dout_i_tdata : out STD_LOGIC_VECTOR ( 127 downto 0 ); + adc_tile226_ch1_dout_i_tready : in STD_LOGIC; + adc_tile226_ch1_dout_i_tvalid : out STD_LOGIC; + adc_tile226_ch1_dout_q_tdata : out STD_LOGIC_VECTOR ( 127 downto 0 ); + adc_tile226_ch1_dout_q_tready : in STD_LOGIC; + adc_tile226_ch1_dout_q_tvalid : out STD_LOGIC; + dac_tile228_ch0_vout_v_n : out STD_LOGIC; + dac_tile228_ch0_vout_v_p : out STD_LOGIC; + dac_tile228_ch1_vout_v_n : out STD_LOGIC; + dac_tile228_ch1_vout_v_p : out STD_LOGIC; + dac_tile229_ch0_vout_v_n : out STD_LOGIC; + dac_tile229_ch0_vout_v_p : out STD_LOGIC; + dac_tile229_ch1_vout_v_n : out STD_LOGIC; + dac_tile229_ch1_vout_v_p : out STD_LOGIC; + dac_tile228_ch0_din_tdata : in STD_LOGIC_VECTOR ( 255 downto 0 ); + dac_tile228_ch0_din_tvalid : in STD_LOGIC; + dac_tile228_ch0_din_tready : out STD_LOGIC; + dac_tile228_ch1_din_tdata : in STD_LOGIC_VECTOR ( 255 downto 0 ); + dac_tile228_ch1_din_tvalid : in STD_LOGIC; + dac_tile228_ch1_din_tready : out STD_LOGIC; + dac_tile229_ch0_din_tdata : in STD_LOGIC_VECTOR ( 255 downto 0 ); + dac_tile229_ch0_din_tvalid : in STD_LOGIC; + dac_tile229_ch0_din_tready : out STD_LOGIC; + dac_tile229_ch1_din_tdata : in STD_LOGIC_VECTOR ( 255 downto 0 ); + dac_tile229_ch1_din_tvalid : in STD_LOGIC; + dac_tile229_ch1_din_tready : out STD_LOGIC; + s_axi_hpc1_awid : in STD_LOGIC_VECTOR ( 5 downto 0 ); + s_axi_hpc1_awaddr : in STD_LOGIC_VECTOR ( 48 downto 0 ); + s_axi_hpc1_awlen : in STD_LOGIC_VECTOR ( 7 downto 0 ); + s_axi_hpc1_awsize : in STD_LOGIC_VECTOR ( 2 downto 0 ); + s_axi_hpc1_awburst : in STD_LOGIC_VECTOR ( 1 downto 0 ); + s_axi_hpc1_awlock : in STD_LOGIC_VECTOR ( 0 to 0 ); + s_axi_hpc1_awcache : in STD_LOGIC_VECTOR ( 3 downto 0 ); + s_axi_hpc1_awprot : in STD_LOGIC_VECTOR ( 2 downto 0 ); + s_axi_hpc1_awqos : in STD_LOGIC_VECTOR ( 3 downto 0 ); + s_axi_hpc1_awvalid : in STD_LOGIC_VECTOR ( 0 to 0 ); + s_axi_hpc1_awready : out STD_LOGIC_VECTOR ( 0 to 0 ); + s_axi_hpc1_wdata : in STD_LOGIC_VECTOR ( 127 downto 0 ); + s_axi_hpc1_wstrb : in STD_LOGIC_VECTOR ( 15 downto 0 ); + s_axi_hpc1_wlast : in STD_LOGIC_VECTOR ( 0 to 0 ); + s_axi_hpc1_wvalid : in STD_LOGIC_VECTOR ( 0 to 0 ); + s_axi_hpc1_wready : out STD_LOGIC_VECTOR ( 0 to 0 ); + s_axi_hpc1_bid : out STD_LOGIC_VECTOR ( 5 downto 0 ); + s_axi_hpc1_bresp : out STD_LOGIC_VECTOR ( 1 downto 0 ); + s_axi_hpc1_bvalid : out STD_LOGIC_VECTOR ( 0 to 0 ); + s_axi_hpc1_bready : in STD_LOGIC_VECTOR ( 0 to 0 ); + s_axi_hpc1_arid : in STD_LOGIC_VECTOR ( 5 downto 0 ); + s_axi_hpc1_araddr : in STD_LOGIC_VECTOR ( 48 downto 0 ); + s_axi_hpc1_arlen : in STD_LOGIC_VECTOR ( 7 downto 0 ); + s_axi_hpc1_arsize : in STD_LOGIC_VECTOR ( 2 downto 0 ); + s_axi_hpc1_arburst : in STD_LOGIC_VECTOR ( 1 downto 0 ); + s_axi_hpc1_arlock : in STD_LOGIC_VECTOR ( 0 to 0 ); + s_axi_hpc1_arcache : in STD_LOGIC_VECTOR ( 3 downto 0 ); + s_axi_hpc1_arprot : in STD_LOGIC_VECTOR ( 2 downto 0 ); + s_axi_hpc1_arqos : in STD_LOGIC_VECTOR ( 3 downto 0 ); + s_axi_hpc1_arvalid : in STD_LOGIC_VECTOR ( 0 to 0 ); + s_axi_hpc1_arready : out STD_LOGIC_VECTOR ( 0 to 0 ); + s_axi_hpc1_rid : out STD_LOGIC_VECTOR ( 5 downto 0 ); + s_axi_hpc1_rdata : out STD_LOGIC_VECTOR ( 127 downto 0 ); + s_axi_hpc1_rresp : out STD_LOGIC_VECTOR ( 1 downto 0 ); + s_axi_hpc1_rlast : out STD_LOGIC_VECTOR ( 0 to 0 ); + s_axi_hpc1_rvalid : out STD_LOGIC_VECTOR ( 0 to 0 ); + s_axi_hpc1_rready : in STD_LOGIC_VECTOR ( 0 to 0 ); + sysref_rf_in_diff_n : in STD_LOGIC; + sysref_rf_in_diff_p : in STD_LOGIC; + adc_tile224_ch0_vin_v_n : in STD_LOGIC; + adc_tile224_ch0_vin_v_p : in STD_LOGIC; + adc_tile224_ch1_vin_v_n : in STD_LOGIC; + adc_tile224_ch1_vin_v_p : in STD_LOGIC; + adc_tile226_ch0_vin_v_n : in STD_LOGIC; + adc_tile226_ch0_vin_v_p : in STD_LOGIC; + adc_tile226_ch1_vin_v_n : in STD_LOGIC; + adc_tile226_ch1_vin_v_p : in STD_LOGIC; + s_axi_hpc1_aruser : in STD_LOGIC_VECTOR ( 0 to 0 ); + s_axi_hpc1_awuser : in STD_LOGIC_VECTOR ( 0 to 0 ) + ); + end entity x4xx_ps_rfdc_bd; + +architecture stub of x4xx_ps_rfdc_bd is +begin +end architecture stub; diff --git a/fpga/usrp3/top/x400/ip/x4xx_ps_rfdc_bd/x4xx_ps_rfdc_bd.tcl b/fpga/usrp3/top/x400/ip/x4xx_ps_rfdc_bd/x4xx_ps_rfdc_bd.tcl new file mode 100644 index 000000000..23eedcb0e --- /dev/null +++ b/fpga/usrp3/top/x400/ip/x4xx_ps_rfdc_bd/x4xx_ps_rfdc_bd.tcl @@ -0,0 +1,3681 @@ + +################################################################ +# This is a generated script based on design: x4xx_ps_rfdc_bd +# +# Though there are limitations about the generated script, +# the main purpose of this utility is to make learning +# IP Integrator Tcl commands easier. +################################################################ + +namespace eval _tcl { +proc get_script_folder {} { + set script_path [file normalize [info script]] + set script_folder [file dirname $script_path] + return $script_folder +} +} +variable script_folder +set script_folder [_tcl::get_script_folder] + +################################################################ +# Check if script is running in correct Vivado version. +################################################################ +set scripts_vivado_version 2019.1 +set current_vivado_version [version -short] + +if { [string first $scripts_vivado_version $current_vivado_version] == -1 } { + puts "" + catch {common::send_msg_id "BD_TCL-109" "ERROR" "This script was generated using Vivado <$scripts_vivado_version> and is being run in <$current_vivado_version> of Vivado. Please run the script in Vivado <$scripts_vivado_version> then open the design in Vivado <$current_vivado_version>. Upgrade the design by running \"Tools => Report => Report IP Status...\", then run write_bd_tcl to create an updated script."} + + return 1 +} + +################################################################ +# START +################################################################ + +# To test this script, run the following commands from Vivado Tcl console: +# source x4xx_ps_rfdc_bd_script.tcl + + +# The design that will be created by this Tcl script contains the following +# module references: +# capture_sysref, clock_gates, rf_nco_reset, rf_reset_controller, gpio_to_axis_mux + +# Please add the sources of those modules before sourcing this Tcl script. + +# If there is no project opened, this script will create a +# project, but make sure you do not have an existing project +# <./myproj/project_1.xpr> in the current working folder. + +set list_projs [get_projects -quiet] +if { $list_projs eq "" } { + create_project project_1 myproj -part xczu28dr-ffvg1517-1-e +} + + +# CHANGE DESIGN NAME HERE +variable design_name +set design_name x4xx_ps_rfdc_bd + +# If you do not already have an existing IP Integrator design open, +# you can create a design using the following command: +# create_bd_design $design_name + +# Creating design if needed +set errMsg "" +set nRet 0 + +set cur_design [current_bd_design -quiet] +set list_cells [get_bd_cells -quiet] + +if { ${design_name} eq "" } { + # USE CASES: + # 1) Design_name not set + + set errMsg "Please set the variable to a non-empty value." + set nRet 1 + +} elseif { ${cur_design} ne "" && ${list_cells} eq "" } { + # USE CASES: + # 2): Current design opened AND is empty AND names same. + # 3): Current design opened AND is empty AND names diff; design_name NOT in project. + # 4): Current design opened AND is empty AND names diff; design_name exists in project. + + if { $cur_design ne $design_name } { + common::send_msg_id "BD_TCL-001" "INFO" "Changing value of from <$design_name> to <$cur_design> since current design is empty." + set design_name [get_property NAME $cur_design] + } + common::send_msg_id "BD_TCL-002" "INFO" "Constructing design in IPI design <$cur_design>..." + +} elseif { ${cur_design} ne "" && $list_cells ne "" && $cur_design eq $design_name } { + # USE CASES: + # 5) Current design opened AND has components AND same names. + + set errMsg "Design <$design_name> already exists in your project, please set the variable to another value." + set nRet 1 +} elseif { [get_files -quiet ${design_name}.bd] ne "" } { + # USE CASES: + # 6) Current opened design, has components, but diff names, design_name exists in project. + # 7) No opened design, design_name exists in project. + + set errMsg "Design <$design_name> already exists in your project, please set the variable to another value." + set nRet 2 + +} else { + # USE CASES: + # 8) No opened design, design_name not in project. + # 9) Current opened design, has components, but diff names, design_name not in project. + + common::send_msg_id "BD_TCL-003" "INFO" "Currently there is no design <$design_name> in project, so creating one..." + + create_bd_design $design_name + + common::send_msg_id "BD_TCL-004" "INFO" "Making design <$design_name> as current_bd_design." + current_bd_design $design_name + +} + + # Add USER_COMMENTS on $design_name + set_property USER_COMMENTS.comment_2 "reg_reset_mmcm: +[0] = mmcm_reset_n (default b0)" [get_bd_designs $design_name] + set_property USER_COMMENTS.comment_3 "reg_invert_iq: +[15:8] = invert DAC channels +[7:0] = invert ADC channels" [get_bd_designs $design_name] + +common::send_msg_id "BD_TCL-005" "INFO" "Currently the variable is equal to \"$design_name\"." + +if { $nRet != 0 } { + catch {common::send_msg_id "BD_TCL-114" "ERROR" $errMsg} + return $nRet +} + +set bCheckIPsPassed 1 +################################################################## +# CHECK IPs +################################################################## +set bCheckIPs 1 +if { $bCheckIPs == 1 } { + set list_check_ips "\ +ettus.com:ip:axi_bitq:1.0\ +xilinx.com:ip:zynq_ultra_ps_e:3.3\ +xilinx.com:ip:xlconcat:2.1\ +xilinx.com:ip:xlconstant:1.1\ +xilinx.com:ip:clk_wiz:6.0\ +xilinx.com:ip:axi_gpio:2.0\ +xilinx.com:ip:usp_rf_data_converter:2.1\ +xilinx.com:ip:xlslice:1.0\ +xilinx.com:ip:axi_protocol_converter:2.1\ +xilinx.com:ip:axi_dma:7.1\ +xilinx.com:ip:smartconnect:1.0\ +xilinx.com:ip:util_ds_buf:2.1\ +" + + set list_ips_missing "" + common::send_msg_id "BD_TCL-006" "INFO" "Checking if the following IPs exist in the project's IP catalog: $list_check_ips ." + + foreach ip_vlnv $list_check_ips { + set ip_obj [get_ipdefs -all $ip_vlnv] + if { $ip_obj eq "" } { + lappend list_ips_missing $ip_vlnv + } + } + + if { $list_ips_missing ne "" } { + catch {common::send_msg_id "BD_TCL-115" "ERROR" "The following IPs are not found in the IP Catalog:\n $list_ips_missing\n\nResolution: Please add the repository containing the IP(s) to the project." } + set bCheckIPsPassed 0 + } + +} + +################################################################## +# CHECK Modules +################################################################## +set bCheckModules 1 +if { $bCheckModules == 1 } { + set list_check_mods "\ +capture_sysref\ +clock_gates\ +rf_nco_reset\ +rf_reset_controller\ +gpio_to_axis_mux\ +" + + set list_mods_missing "" + common::send_msg_id "BD_TCL-006" "INFO" "Checking if the following modules exist in the project's sources: $list_check_mods ." + + foreach mod_vlnv $list_check_mods { + if { [can_resolve_reference $mod_vlnv] == 0 } { + lappend list_mods_missing $mod_vlnv + } + } + + if { $list_mods_missing ne "" } { + catch {common::send_msg_id "BD_TCL-115" "ERROR" "The following module(s) are not found in the project: $list_mods_missing" } + common::send_msg_id "BD_TCL-008" "INFO" "Please add source files for the missing module(s) above." + set bCheckIPsPassed 0 + } +} + +if { $bCheckIPsPassed != 1 } { + common::send_msg_id "BD_TCL-1003" "WARNING" "Will not continue with creation of design due to the error(s) above." + return 3 +} + +################################################################## +# DESIGN PROCs +################################################################## + + +# Hierarchical cell: rf_clock_buffers +proc create_hier_cell_rf_clock_buffers { parentCell nameHier } { + + variable script_folder + + if { $parentCell eq "" || $nameHier eq "" } { + catch {common::send_msg_id "BD_TCL-102" "ERROR" "create_hier_cell_rf_clock_buffers() - Empty argument(s)!"} + return + } + + # Get object for parentCell + set parentObj [get_bd_cells $parentCell] + if { $parentObj == "" } { + catch {common::send_msg_id "BD_TCL-100" "ERROR" "Unable to find parent cell <$parentCell>!"} + return + } + + # Make sure parentObj is hier blk + set parentType [get_property TYPE $parentObj] + if { $parentType ne "hier" } { + catch {common::send_msg_id "BD_TCL-101" "ERROR" "Parent <$parentObj> has TYPE = <$parentType>. Expected to be ."} + return + } + + # Save current instance; Restore later + set oldCurInst [current_bd_instance .] + + # Set parent object as current + current_bd_instance $parentObj + + # Create cell and set as current instance + set hier_obj [create_bd_cell -type hier $nameHier] + current_bd_instance $hier_obj + + # Create interface pins + + # Create pins + create_bd_pin -dir O -from 0 -to 0 rfdc_clk + create_bd_pin -dir O -from 0 -to 0 rfdc_clk_2x + create_bd_pin -dir I -from 0 -to 0 rfdc_clk_2x_ce + create_bd_pin -dir I -from 0 -to 0 -type clk rfdc_clk_2x_pll + create_bd_pin -dir I -from 0 -to 0 rfdc_clk_ce + create_bd_pin -dir I -from 0 -to 0 -type clk rfdc_clk_pll + + # Create instance: rfdc_clk_1x_buf, and set properties + set rfdc_clk_1x_buf [ create_bd_cell -type ip -vlnv xilinx.com:ip:util_ds_buf:2.1 rfdc_clk_1x_buf ] + set_property -dict [ list \ + CONFIG.C_BUF_TYPE {BUFGCE} \ + ] $rfdc_clk_1x_buf + + # Create instance: rfdc_clk_2x_buf, and set properties + set rfdc_clk_2x_buf [ create_bd_cell -type ip -vlnv xilinx.com:ip:util_ds_buf:2.1 rfdc_clk_2x_buf ] + set_property -dict [ list \ + CONFIG.C_BUF_TYPE {BUFGCE} \ + ] $rfdc_clk_2x_buf + + # Create port connections + connect_bd_net -net BUFGCE_I2_1 [get_bd_pins rfdc_clk_2x_pll] [get_bd_pins rfdc_clk_2x_buf/BUFGCE_I] + connect_bd_net -net rfdc_clk_1 [get_bd_pins rfdc_clk_pll] [get_bd_pins rfdc_clk_1x_buf/BUFGCE_I] + connect_bd_net -net rfdc_clk_1x_buf_BUFGCE_O [get_bd_pins rfdc_clk] [get_bd_pins rfdc_clk_1x_buf/BUFGCE_O] + connect_bd_net -net rfdc_clk_2x_buf_BUFGCE_O [get_bd_pins rfdc_clk_2x] [get_bd_pins rfdc_clk_2x_buf/BUFGCE_O] + connect_bd_net -net rfdc_clk_2x_ce_1 [get_bd_pins rfdc_clk_2x_ce] [get_bd_pins rfdc_clk_2x_buf/BUFGCE_CE] + connect_bd_net -net rfdc_clk_ce_1 [get_bd_pins rfdc_clk_ce] [get_bd_pins rfdc_clk_1x_buf/BUFGCE_CE] + + # Restore current instance + current_bd_instance $oldCurInst +} + +# Hierarchical cell: calibration_muxes +proc create_hier_cell_calibration_muxes { parentCell nameHier } { + + variable script_folder + + if { $parentCell eq "" || $nameHier eq "" } { + catch {common::send_msg_id "BD_TCL-102" "ERROR" "create_hier_cell_calibration_muxes() - Empty argument(s)!"} + return + } + + # Get object for parentCell + set parentObj [get_bd_cells $parentCell] + if { $parentObj == "" } { + catch {common::send_msg_id "BD_TCL-100" "ERROR" "Unable to find parent cell <$parentCell>!"} + return + } + + # Make sure parentObj is hier blk + set parentType [get_property TYPE $parentObj] + if { $parentType ne "hier" } { + catch {common::send_msg_id "BD_TCL-101" "ERROR" "Parent <$parentObj> has TYPE = <$parentType>. Expected to be ."} + return + } + + # Save current instance; Restore later + set oldCurInst [current_bd_instance .] + + # Set parent object as current + current_bd_instance $parentObj + + # Create cell and set as current instance + set hier_obj [create_bd_cell -type hier $nameHier] + current_bd_instance $hier_obj + + # Create interface pins + create_bd_intf_pin -mode Slave -vlnv xilinx.com:interface:aximm_rtl:1.0 S_AXI_1 + + create_bd_intf_pin -mode Slave -vlnv xilinx.com:interface:axis_rtl:1.0 dac_tile228_ch0_din + + create_bd_intf_pin -mode Slave -vlnv xilinx.com:interface:axis_rtl:1.0 dac_tile228_ch1_din + + create_bd_intf_pin -mode Slave -vlnv xilinx.com:interface:axis_rtl:1.0 dac_tile229_ch0_din + + create_bd_intf_pin -mode Slave -vlnv xilinx.com:interface:axis_rtl:1.0 dac_tile229_ch1_din + + create_bd_intf_pin -mode Master -vlnv xilinx.com:interface:axis_rtl:1.0 m_axis_0_0 + + create_bd_intf_pin -mode Master -vlnv xilinx.com:interface:axis_rtl:1.0 m_axis_1_0 + + create_bd_intf_pin -mode Master -vlnv xilinx.com:interface:axis_rtl:1.0 m_axis_2_0 + + create_bd_intf_pin -mode Master -vlnv xilinx.com:interface:axis_rtl:1.0 m_axis_3_0 + + + # Create pins + create_bd_pin -dir I -type clk s_axi_aclk_0 + create_bd_pin -dir I -type rst s_axi_config_aresetn + create_bd_pin -dir I -type clk s_axi_config_clk + + # Create instance: axi_gpio_data, and set properties + set axi_gpio_data [ create_bd_cell -type ip -vlnv xilinx.com:ip:axi_gpio:2.0 axi_gpio_data ] + set_property -dict [ list \ + CONFIG.C_ALL_OUTPUTS {1} \ + CONFIG.C_ALL_OUTPUTS_2 {1} \ + CONFIG.C_GPIO2_WIDTH {8} \ + CONFIG.C_IS_DUAL {1} \ + ] $axi_gpio_data + + # Create instance: gpio_to_axis_mux_0, and set properties + set block_name gpio_to_axis_mux + set block_cell_name gpio_to_axis_mux_0 + if { [catch {set gpio_to_axis_mux_0 [create_bd_cell -type module -reference $block_name $block_cell_name] } errmsg] } { + catch {common::send_msg_id "BD_TCL-105" "ERROR" "Unable to add referenced block <$block_name>. Please add the files for ${block_name}'s definition into the project."} + return 1 + } elseif { $gpio_to_axis_mux_0 eq "" } { + catch {common::send_msg_id "BD_TCL-106" "ERROR" "Unable to referenced block <$block_name>. Please add the files for ${block_name}'s definition into the project."} + return 1 + } + set_property -dict [ list \ + CONFIG.kGpioWidth {32} \ + ] $gpio_to_axis_mux_0 + + # Create interface connections + connect_bd_intf_net -intf_net Conn1 [get_bd_intf_pins m_axis_0_0] [get_bd_intf_pins gpio_to_axis_mux_0/m_axis_0] + connect_bd_intf_net -intf_net Conn2 [get_bd_intf_pins m_axis_1_0] [get_bd_intf_pins gpio_to_axis_mux_0/m_axis_1] + connect_bd_intf_net -intf_net Conn3 [get_bd_intf_pins m_axis_2_0] [get_bd_intf_pins gpio_to_axis_mux_0/m_axis_2] + connect_bd_intf_net -intf_net Conn4 [get_bd_intf_pins m_axis_3_0] [get_bd_intf_pins gpio_to_axis_mux_0/m_axis_3] + connect_bd_intf_net -intf_net Conn5 [get_bd_intf_pins dac_tile228_ch0_din] [get_bd_intf_pins gpio_to_axis_mux_0/s_axis_0] + connect_bd_intf_net -intf_net Conn6 [get_bd_intf_pins dac_tile228_ch1_din] [get_bd_intf_pins gpio_to_axis_mux_0/s_axis_1] + connect_bd_intf_net -intf_net Conn7 [get_bd_intf_pins dac_tile229_ch0_din] [get_bd_intf_pins gpio_to_axis_mux_0/s_axis_2] + connect_bd_intf_net -intf_net Conn8 [get_bd_intf_pins dac_tile229_ch1_din] [get_bd_intf_pins gpio_to_axis_mux_0/s_axis_3] + connect_bd_intf_net -intf_net Conn10 [get_bd_intf_pins S_AXI_1] [get_bd_intf_pins axi_gpio_data/S_AXI] + + # Create port connections + connect_bd_net -net Net [get_bd_pins s_axi_config_clk] [get_bd_pins axi_gpio_data/s_axi_aclk] + connect_bd_net -net Net1 [get_bd_pins s_axi_config_aresetn] [get_bd_pins axi_gpio_data/s_axi_aresetn] + connect_bd_net -net axi_gpio_0_gpio_io_o [get_bd_pins axi_gpio_data/gpio_io_o] [get_bd_pins gpio_to_axis_mux_0/gpio] + connect_bd_net -net axi_gpio_data_gpio2_io_o [get_bd_pins axi_gpio_data/gpio2_io_o] [get_bd_pins gpio_to_axis_mux_0/mux_select] + connect_bd_net -net s_axi_aclk_0_1 [get_bd_pins s_axi_aclk_0] [get_bd_pins gpio_to_axis_mux_0/m_axis_0_aclk] [get_bd_pins gpio_to_axis_mux_0/m_axis_1_aclk] [get_bd_pins gpio_to_axis_mux_0/m_axis_2_aclk] [get_bd_pins gpio_to_axis_mux_0/m_axis_3_aclk] [get_bd_pins gpio_to_axis_mux_0/s_axis_0_aclk] [get_bd_pins gpio_to_axis_mux_0/s_axis_1_aclk] [get_bd_pins gpio_to_axis_mux_0/s_axis_2_aclk] [get_bd_pins gpio_to_axis_mux_0/s_axis_3_aclk] + + # Restore current instance + current_bd_instance $oldCurInst +} + +# Hierarchical cell: ThresholdRegister +proc create_hier_cell_ThresholdRegister { parentCell nameHier } { + + variable script_folder + + if { $parentCell eq "" || $nameHier eq "" } { + catch {common::send_msg_id "BD_TCL-102" "ERROR" "create_hier_cell_ThresholdRegister() - Empty argument(s)!"} + return + } + + # Get object for parentCell + set parentObj [get_bd_cells $parentCell] + if { $parentObj == "" } { + catch {common::send_msg_id "BD_TCL-100" "ERROR" "Unable to find parent cell <$parentCell>!"} + return + } + + # Make sure parentObj is hier blk + set parentType [get_property TYPE $parentObj] + if { $parentType ne "hier" } { + catch {common::send_msg_id "BD_TCL-101" "ERROR" "Parent <$parentObj> has TYPE = <$parentType>. Expected to be ."} + return + } + + # Save current instance; Restore later + set oldCurInst [current_bd_instance .] + + # Set parent object as current + current_bd_instance $parentObj + + # Create cell and set as current instance + set hier_obj [create_bd_cell -type hier $nameHier] + current_bd_instance $hier_obj + + # Create interface pins + create_bd_intf_pin -mode Slave -vlnv xilinx.com:interface:aximm_rtl:1.0 S_AXI + + + # Create pins + create_bd_pin -dir I -from 0 -to 0 In0 + create_bd_pin -dir I -from 0 -to 0 In1 + create_bd_pin -dir I -from 0 -to 0 In2 + create_bd_pin -dir I -from 0 -to 0 In3 + create_bd_pin -dir I -from 0 -to 0 In5 + create_bd_pin -dir I -from 0 -to 0 In6 + create_bd_pin -dir I -from 0 -to 0 In7 + create_bd_pin -dir I -from 0 -to 0 In8 + create_bd_pin -dir I -type rst s_axi_config_aresetn + create_bd_pin -dir I -type clk s_axi_config_clk + + # Create instance: axi_gpio_0, and set properties + set axi_gpio_0 [ create_bd_cell -type ip -vlnv xilinx.com:ip:axi_gpio:2.0 axi_gpio_0 ] + set_property -dict [ list \ + CONFIG.C_ALL_INPUTS {1} \ + CONFIG.C_GPIO_WIDTH {12} \ + ] $axi_gpio_0 + + # Create instance: xlconcat_0, and set properties + set xlconcat_0 [ create_bd_cell -type ip -vlnv xilinx.com:ip:xlconcat:2.1 xlconcat_0 ] + set_property -dict [ list \ + CONFIG.NUM_PORTS {9} \ + ] $xlconcat_0 + + # Create instance: xlconstant_0, and set properties + set xlconstant_0 [ create_bd_cell -type ip -vlnv xilinx.com:ip:xlconstant:1.1 xlconstant_0 ] + set_property -dict [ list \ + CONFIG.CONST_WIDTH {4} \ + ] $xlconstant_0 + + # Create interface connections + connect_bd_intf_net -intf_net Conn1 [get_bd_intf_pins S_AXI] [get_bd_intf_pins axi_gpio_0/S_AXI] + + # Create port connections + connect_bd_net -net In0_1 [get_bd_pins In0] [get_bd_pins xlconcat_0/In0] + connect_bd_net -net In1_1 [get_bd_pins In1] [get_bd_pins xlconcat_0/In1] + connect_bd_net -net In2_1 [get_bd_pins In2] [get_bd_pins xlconcat_0/In2] + connect_bd_net -net In3_1 [get_bd_pins In3] [get_bd_pins xlconcat_0/In3] + connect_bd_net -net In5_1 [get_bd_pins In5] [get_bd_pins xlconcat_0/In5] + connect_bd_net -net In6_1 [get_bd_pins In6] [get_bd_pins xlconcat_0/In6] + connect_bd_net -net In7_1 [get_bd_pins In7] [get_bd_pins xlconcat_0/In7] + connect_bd_net -net In8_1 [get_bd_pins In8] [get_bd_pins xlconcat_0/In8] + connect_bd_net -net s_axi_config_aresetn_1 [get_bd_pins s_axi_config_aresetn] [get_bd_pins axi_gpio_0/s_axi_aresetn] + connect_bd_net -net s_axi_config_clk_1 [get_bd_pins s_axi_config_clk] [get_bd_pins axi_gpio_0/s_axi_aclk] + connect_bd_net -net xlconcat_0_dout [get_bd_pins axi_gpio_0/gpio_io_i] [get_bd_pins xlconcat_0/dout] + connect_bd_net -net xlconstant_0_dout [get_bd_pins xlconcat_0/In4] [get_bd_pins xlconstant_0/dout] + + # Restore current instance + current_bd_instance $oldCurInst +} + +# Hierarchical cell: eth_dma_internal +proc create_hier_cell_eth_dma_internal { parentCell nameHier } { + + variable script_folder + + if { $parentCell eq "" || $nameHier eq "" } { + catch {common::send_msg_id "BD_TCL-102" "ERROR" "create_hier_cell_eth_dma_internal() - Empty argument(s)!"} + return + } + + # Get object for parentCell + set parentObj [get_bd_cells $parentCell] + if { $parentObj == "" } { + catch {common::send_msg_id "BD_TCL-100" "ERROR" "Unable to find parent cell <$parentCell>!"} + return + } + + # Make sure parentObj is hier blk + set parentType [get_property TYPE $parentObj] + if { $parentType ne "hier" } { + catch {common::send_msg_id "BD_TCL-101" "ERROR" "Parent <$parentObj> has TYPE = <$parentType>. Expected to be ."} + return + } + + # Save current instance; Restore later + set oldCurInst [current_bd_instance .] + + # Set parent object as current + current_bd_instance $parentObj + + # Create cell and set as current instance + set hier_obj [create_bd_cell -type hier $nameHier] + current_bd_instance $hier_obj + + # Create interface pins + create_bd_intf_pin -mode Master -vlnv xilinx.com:interface:aximm_rtl:1.0 m_axi_to_ps + + create_bd_intf_pin -mode Master -vlnv xilinx.com:interface:axis_rtl:1.0 m_axis_eth_dma + + create_bd_intf_pin -mode Slave -vlnv xilinx.com:interface:aximm_rtl:1.0 s_axi_eth_dma_ctrl + + create_bd_intf_pin -mode Slave -vlnv xilinx.com:interface:axis_rtl:1.0 s_axis_eth_dma + + + # Create pins + create_bd_pin -dir I -type clk bus_clk + create_bd_pin -dir I -type rst bus_rstn + create_bd_pin -dir I -type clk clk40 + create_bd_pin -dir I -type rst clk40_rstn + create_bd_pin -dir O -from 1 -to 0 irq + + # Create instance: axi_eth_dma_internal, and set properties + set axi_eth_dma_internal [ create_bd_cell -type ip -vlnv xilinx.com:ip:axi_dma:7.1 axi_eth_dma_internal ] + set_property -dict [ list \ + CONFIG.c_addr_width {36} \ + CONFIG.c_enable_multi_channel {0} \ + CONFIG.c_include_mm2s_dre {1} \ + CONFIG.c_include_s2mm {1} \ + CONFIG.c_include_s2mm_dre {1} \ + CONFIG.c_m_axi_mm2s_data_width {128} \ + CONFIG.c_m_axi_s2mm_data_width {128} \ + CONFIG.c_m_axis_mm2s_tdata_width {64} \ + CONFIG.c_micro_dma {0} \ + CONFIG.c_mm2s_burst_size {16} \ + CONFIG.c_s2mm_burst_size {16} \ + CONFIG.c_sg_include_stscntrl_strm {0} \ + ] $axi_eth_dma_internal + + # Create instance: pl_ps_irq1_concat, and set properties + set pl_ps_irq1_concat [ create_bd_cell -type ip -vlnv xilinx.com:ip:xlconcat:2.1 pl_ps_irq1_concat ] + set_property -dict [ list \ + CONFIG.NUM_PORTS {2} \ + ] $pl_ps_irq1_concat + + # Create instance: smartconnect_dma, and set properties + set smartconnect_dma [ create_bd_cell -type ip -vlnv xilinx.com:ip:smartconnect:1.0 smartconnect_dma ] + set_property -dict [ list \ + CONFIG.NUM_SI {3} \ + ] $smartconnect_dma + + # Create interface connections + connect_bd_intf_net -intf_net Conn3 [get_bd_intf_pins m_axis_eth_dma] [get_bd_intf_pins axi_eth_dma_internal/M_AXIS_MM2S] + connect_bd_intf_net -intf_net Conn4 [get_bd_intf_pins s_axis_eth_dma] [get_bd_intf_pins axi_eth_dma_internal/S_AXIS_S2MM] + connect_bd_intf_net -intf_net axi_eth_dma_internal_M_AXI_MM2S [get_bd_intf_pins axi_eth_dma_internal/M_AXI_MM2S] [get_bd_intf_pins smartconnect_dma/S01_AXI] + connect_bd_intf_net -intf_net axi_eth_dma_internal_M_AXI_S2MM [get_bd_intf_pins axi_eth_dma_internal/M_AXI_S2MM] [get_bd_intf_pins smartconnect_dma/S02_AXI] + connect_bd_intf_net -intf_net axi_eth_dma_internal_M_AXI_SG [get_bd_intf_pins axi_eth_dma_internal/M_AXI_SG] [get_bd_intf_pins smartconnect_dma/S00_AXI] + connect_bd_intf_net -intf_net axi_interconnect_common_m_axi_eth_dma_ctrl [get_bd_intf_pins s_axi_eth_dma_ctrl] [get_bd_intf_pins axi_eth_dma_internal/S_AXI_LITE] + connect_bd_intf_net -intf_net smartconnect_0_M00_AXI [get_bd_intf_pins m_axi_to_ps] [get_bd_intf_pins smartconnect_dma/M00_AXI] + + # Create port connections + connect_bd_net -net axi_eth_dma_internal_mm2s_introut [get_bd_pins axi_eth_dma_internal/mm2s_introut] [get_bd_pins pl_ps_irq1_concat/In0] + connect_bd_net -net axi_eth_dma_internal_s2mm_introut [get_bd_pins axi_eth_dma_internal/s2mm_introut] [get_bd_pins pl_ps_irq1_concat/In1] + connect_bd_net -net bus_rstn_1 [get_bd_pins bus_rstn] [get_bd_pins smartconnect_dma/aresetn] + connect_bd_net -net clk40_1 [get_bd_pins clk40] [get_bd_pins axi_eth_dma_internal/s_axi_lite_aclk] + connect_bd_net -net clk40_rstn_1 [get_bd_pins clk40_rstn] [get_bd_pins axi_eth_dma_internal/axi_resetn] + connect_bd_net -net m_axi_sg_aclk_0_1 [get_bd_pins bus_clk] [get_bd_pins axi_eth_dma_internal/m_axi_mm2s_aclk] [get_bd_pins axi_eth_dma_internal/m_axi_s2mm_aclk] [get_bd_pins axi_eth_dma_internal/m_axi_sg_aclk] [get_bd_pins smartconnect_dma/aclk] + connect_bd_net -net xlconcat_0_dout [get_bd_pins irq] [get_bd_pins pl_ps_irq1_concat/dout] + + # Restore current instance + current_bd_instance $oldCurInst +} + +# Hierarchical cell: axi_interconnect_common +proc create_hier_cell_axi_interconnect_common { parentCell nameHier } { + + variable script_folder + + if { $parentCell eq "" || $nameHier eq "" } { + catch {common::send_msg_id "BD_TCL-102" "ERROR" "create_hier_cell_axi_interconnect_common() - Empty argument(s)!"} + return + } + + # Get object for parentCell + set parentObj [get_bd_cells $parentCell] + if { $parentObj == "" } { + catch {common::send_msg_id "BD_TCL-100" "ERROR" "Unable to find parent cell <$parentCell>!"} + return + } + + # Make sure parentObj is hier blk + set parentType [get_property TYPE $parentObj] + if { $parentType ne "hier" } { + catch {common::send_msg_id "BD_TCL-101" "ERROR" "Parent <$parentObj> has TYPE = <$parentType>. Expected to be ."} + return + } + + # Save current instance; Restore later + set oldCurInst [current_bd_instance .] + + # Set parent object as current + current_bd_instance $parentObj + + # Create cell and set as current instance + set hier_obj [create_bd_cell -type hier $nameHier] + current_bd_instance $hier_obj + + # Create interface pins + create_bd_intf_pin -mode Master -vlnv xilinx.com:interface:aximm_rtl:1.0 m_axi_app + + create_bd_intf_pin -mode Master -vlnv xilinx.com:interface:aximm_rtl:1.0 m_axi_core + + create_bd_intf_pin -mode Master -vlnv xilinx.com:interface:aximm_rtl:1.0 m_axi_eth_dma_ctrl + + create_bd_intf_pin -mode Master -vlnv xilinx.com:interface:aximm_rtl:1.0 m_axi_eth_internal + + create_bd_intf_pin -mode Master -vlnv xilinx.com:interface:aximm_rtl:1.0 m_axi_jtag + + create_bd_intf_pin -mode Master -vlnv xilinx.com:interface:aximm_rtl:1.0 m_axi_mpm_ep + + create_bd_intf_pin -mode Master -vlnv xilinx.com:interface:aximm_rtl:1.0 m_axi_rf + + create_bd_intf_pin -mode Master -vlnv xilinx.com:interface:aximm_rtl:1.0 m_axi_rpu + + create_bd_intf_pin -mode Slave -vlnv xilinx.com:interface:aximm_rtl:1.0 s_axi_common + + create_bd_intf_pin -mode Slave -vlnv xilinx.com:interface:aximm_rtl:1.0 s_axi_lpd + + + # Create pins + create_bd_pin -dir I -type clk clk40 + create_bd_pin -dir I -type rst clk40_rstn + + # Create instance: axi_interconnect_0, and set properties + set axi_interconnect_0 [ create_bd_cell -type ip -vlnv xilinx.com:ip:axi_interconnect:2.1 axi_interconnect_0 ] + set_property -dict [ list \ + CONFIG.NUM_MI {7} \ + ] $axi_interconnect_0 + + # Create instance: axi_protocol_convert_0, and set properties + set axi_protocol_convert_0 [ create_bd_cell -type ip -vlnv xilinx.com:ip:axi_protocol_converter:2.1 axi_protocol_convert_0 ] + + # Create interface connections + connect_bd_intf_net -intf_net Conn1 [get_bd_intf_pins m_axi_jtag] [get_bd_intf_pins axi_interconnect_0/M01_AXI] + connect_bd_intf_net -intf_net axi_interconnect_0_M00_AXI [get_bd_intf_pins m_axi_app] [get_bd_intf_pins axi_interconnect_0/M00_AXI] + connect_bd_intf_net -intf_net axi_interconnect_0_M02_AXI [get_bd_intf_pins m_axi_rf] [get_bd_intf_pins axi_interconnect_0/M02_AXI] + connect_bd_intf_net -intf_net axi_interconnect_0_M03_AXI [get_bd_intf_pins m_axi_mpm_ep] [get_bd_intf_pins axi_interconnect_0/M03_AXI] + connect_bd_intf_net -intf_net axi_interconnect_0_M04_AXI [get_bd_intf_pins m_axi_core] [get_bd_intf_pins axi_interconnect_0/M04_AXI] + connect_bd_intf_net -intf_net axi_interconnect_0_M05_AXI [get_bd_intf_pins m_axi_eth_dma_ctrl] [get_bd_intf_pins axi_interconnect_0/M05_AXI] + connect_bd_intf_net -intf_net axi_interconnect_0_M06_AXI [get_bd_intf_pins m_axi_eth_internal] [get_bd_intf_pins axi_interconnect_0/M06_AXI] + connect_bd_intf_net -intf_net axi_protocol_convert_0_M_AXI [get_bd_intf_pins m_axi_rpu] [get_bd_intf_pins axi_protocol_convert_0/M_AXI] + connect_bd_intf_net -intf_net inst_zynq_ps_M_AXI_HPM0_FPD [get_bd_intf_pins s_axi_common] [get_bd_intf_pins axi_interconnect_0/S00_AXI] + connect_bd_intf_net -intf_net s_axi_lpd_1 [get_bd_intf_pins s_axi_lpd] [get_bd_intf_pins axi_protocol_convert_0/S_AXI] + + # Create port connections + connect_bd_net -net M01_ARESETN_1 [get_bd_pins clk40_rstn] [get_bd_pins axi_interconnect_0/ARESETN] [get_bd_pins axi_interconnect_0/M00_ARESETN] [get_bd_pins axi_interconnect_0/M01_ARESETN] [get_bd_pins axi_interconnect_0/M02_ARESETN] [get_bd_pins axi_interconnect_0/M03_ARESETN] [get_bd_pins axi_interconnect_0/M04_ARESETN] [get_bd_pins axi_interconnect_0/M05_ARESETN] [get_bd_pins axi_interconnect_0/M06_ARESETN] [get_bd_pins axi_interconnect_0/S00_ARESETN] [get_bd_pins axi_protocol_convert_0/aresetn] + connect_bd_net -net clk40_1 [get_bd_pins clk40] [get_bd_pins axi_interconnect_0/ACLK] [get_bd_pins axi_interconnect_0/M00_ACLK] [get_bd_pins axi_interconnect_0/M01_ACLK] [get_bd_pins axi_interconnect_0/M02_ACLK] [get_bd_pins axi_interconnect_0/M03_ACLK] [get_bd_pins axi_interconnect_0/M04_ACLK] [get_bd_pins axi_interconnect_0/M05_ACLK] [get_bd_pins axi_interconnect_0/M06_ACLK] [get_bd_pins axi_interconnect_0/S00_ACLK] [get_bd_pins axi_protocol_convert_0/aclk] + + # Restore current instance + current_bd_instance $oldCurInst +} + +# Hierarchical cell: rfdc +proc create_hier_cell_rfdc { parentCell nameHier } { + + variable script_folder + + if { $parentCell eq "" || $nameHier eq "" } { + catch {common::send_msg_id "BD_TCL-102" "ERROR" "create_hier_cell_rfdc() - Empty argument(s)!"} + return + } + + # Get object for parentCell + set parentObj [get_bd_cells $parentCell] + if { $parentObj == "" } { + catch {common::send_msg_id "BD_TCL-100" "ERROR" "Unable to find parent cell <$parentCell>!"} + return + } + + # Make sure parentObj is hier blk + set parentType [get_property TYPE $parentObj] + if { $parentType ne "hier" } { + catch {common::send_msg_id "BD_TCL-101" "ERROR" "Parent <$parentObj> has TYPE = <$parentType>. Expected to be ."} + return + } + + # Save current instance; Restore later + set oldCurInst [current_bd_instance .] + + # Set parent object as current + current_bd_instance $parentObj + + # Create cell and set as current instance + set hier_obj [create_bd_cell -type hier $nameHier] + current_bd_instance $hier_obj + + # Create interface pins + create_bd_intf_pin -mode Slave -vlnv xilinx.com:interface:diff_clock_rtl:1.0 adc0_clk + + create_bd_intf_pin -mode Slave -vlnv xilinx.com:interface:diff_clock_rtl:1.0 adc2_clk + + create_bd_intf_pin -mode Master -vlnv xilinx.com:interface:axis_rtl:1.0 adc_tile224_ch0_dout_i + + create_bd_intf_pin -mode Master -vlnv xilinx.com:interface:axis_rtl:1.0 adc_tile224_ch0_dout_q + + create_bd_intf_pin -mode Slave -vlnv xilinx.com:interface:diff_analog_io_rtl:1.0 adc_tile224_ch0_vin + + create_bd_intf_pin -mode Master -vlnv xilinx.com:interface:axis_rtl:1.0 adc_tile224_ch1_dout_i + + create_bd_intf_pin -mode Master -vlnv xilinx.com:interface:axis_rtl:1.0 adc_tile224_ch1_dout_q + + create_bd_intf_pin -mode Slave -vlnv xilinx.com:interface:diff_analog_io_rtl:1.0 adc_tile224_ch1_vin + + create_bd_intf_pin -mode Master -vlnv xilinx.com:interface:axis_rtl:1.0 adc_tile226_ch0_dout_i + + create_bd_intf_pin -mode Master -vlnv xilinx.com:interface:axis_rtl:1.0 adc_tile226_ch0_dout_q + + create_bd_intf_pin -mode Slave -vlnv xilinx.com:interface:diff_analog_io_rtl:1.0 adc_tile226_ch0_vin + + create_bd_intf_pin -mode Master -vlnv xilinx.com:interface:axis_rtl:1.0 adc_tile226_ch1_dout_i + + create_bd_intf_pin -mode Master -vlnv xilinx.com:interface:axis_rtl:1.0 adc_tile226_ch1_dout_q + + create_bd_intf_pin -mode Slave -vlnv xilinx.com:interface:diff_analog_io_rtl:1.0 adc_tile226_ch1_vin + + create_bd_intf_pin -mode Slave -vlnv xilinx.com:interface:diff_clock_rtl:1.0 dac0_clk + + create_bd_intf_pin -mode Slave -vlnv xilinx.com:interface:diff_clock_rtl:1.0 dac1_clk + + create_bd_intf_pin -mode Slave -vlnv xilinx.com:interface:axis_rtl:1.0 dac_tile228_ch0_din + + create_bd_intf_pin -mode Master -vlnv xilinx.com:interface:diff_analog_io_rtl:1.0 dac_tile228_ch0_vout + + create_bd_intf_pin -mode Slave -vlnv xilinx.com:interface:axis_rtl:1.0 dac_tile228_ch1_din + + create_bd_intf_pin -mode Master -vlnv xilinx.com:interface:diff_analog_io_rtl:1.0 dac_tile228_ch1_vout + + create_bd_intf_pin -mode Slave -vlnv xilinx.com:interface:axis_rtl:1.0 dac_tile229_ch0_din + + create_bd_intf_pin -mode Master -vlnv xilinx.com:interface:diff_analog_io_rtl:1.0 dac_tile229_ch0_vout + + create_bd_intf_pin -mode Slave -vlnv xilinx.com:interface:axis_rtl:1.0 dac_tile229_ch1_din + + create_bd_intf_pin -mode Master -vlnv xilinx.com:interface:diff_analog_io_rtl:1.0 dac_tile229_ch1_vout + + create_bd_intf_pin -mode Slave -vlnv xilinx.com:interface:aximm_rtl:1.0 s_axi_config + + create_bd_intf_pin -mode Slave -vlnv xilinx.com:display_usp_rf_data_converter:diff_pins_rtl:1.0 sysref_rf_in + + + # Create pins + create_bd_pin -dir O adc_data_out_resetn_dclk + create_bd_pin -dir O adc_enable_data_rclk + create_bd_pin -dir I adc_reset_pulse_dclk + create_bd_pin -dir O adc_rfdc_axi_resetn_rclk + create_bd_pin -dir O dac_data_in_resetn_dclk + create_bd_pin -dir O dac_data_in_resetn_dclk2x + create_bd_pin -dir O dac_data_in_resetn_rclk + create_bd_pin -dir O dac_data_in_resetn_rclk2x + create_bd_pin -dir I dac_reset_pulse_dclk + create_bd_pin -dir O -type clk data_clk + create_bd_pin -dir O -type clk data_clk_2x + create_bd_pin -dir O data_clock_locked + create_bd_pin -dir I enable_gated_clocks_clk40 + create_bd_pin -dir I enable_sysref_rclk + create_bd_pin -dir O fir_resetn_rclk2x + create_bd_pin -dir O gated_base_clks_valid_clk40 + create_bd_pin -dir O -from 7 -to 0 invert_adc_iq_rclk2 + create_bd_pin -dir O -from 7 -to 0 invert_dac_iq_rclk2 + create_bd_pin -dir O nco_reset_done_dclk + create_bd_pin -dir I -type clk pll_ref_clk_in + create_bd_pin -dir O -type clk pll_ref_clk_out + create_bd_pin -dir I -from 31 -to 0 rf_axi_status_sclk + create_bd_pin -dir I -from 31 -to 0 rf_dsp_info_sclk + create_bd_pin -dir O -from 0 -to 0 rfdc_clk + create_bd_pin -dir O -from 0 -to 0 rfdc_clk_2x + create_bd_pin -dir O -type intr rfdc_irq + create_bd_pin -dir I -type rst s_axi_config_aresetn + create_bd_pin -dir I -type clk s_axi_config_clk + create_bd_pin -dir I start_nco_reset_dclk + create_bd_pin -dir O sysref_out_pclk + create_bd_pin -dir O sysref_out_rclk + create_bd_pin -dir I sysref_pl_in + + # Create instance: ThresholdRegister + create_hier_cell_ThresholdRegister $hier_obj ThresholdRegister + + # Create instance: axi_interconnect_rf, and set properties + set axi_interconnect_rf [ create_bd_cell -type ip -vlnv xilinx.com:ip:axi_interconnect:2.1 axi_interconnect_rf ] + set_property -dict [ list \ + CONFIG.ENABLE_ADVANCED_OPTIONS {0} \ + CONFIG.NUM_MI {9} \ + CONFIG.STRATEGY {1} \ + ] $axi_interconnect_rf + + # Create instance: calibration_muxes + create_hier_cell_calibration_muxes $hier_obj calibration_muxes + + # Create instance: capture_sysref, and set properties + set block_name capture_sysref + set block_cell_name capture_sysref + if { [catch {set capture_sysref [create_bd_cell -type module -reference $block_name $block_cell_name] } errmsg] } { + catch {common::send_msg_id "BD_TCL-105" "ERROR" "Unable to add referenced block <$block_name>. Please add the files for ${block_name}'s definition into the project."} + return 1 + } elseif { $capture_sysref eq "" } { + catch {common::send_msg_id "BD_TCL-106" "ERROR" "Unable to referenced block <$block_name>. Please add the files for ${block_name}'s definition into the project."} + return 1 + } + + set_property -dict [ list \ + CONFIG.FREQ_HZ {61440000} \ + CONFIG.PHASE {0} \ + CONFIG.CLK_DOMAIN {x4xx_ps_rfdc_bd_pll_ref_clk_in} \ + ] [get_bd_pins /rfdc/capture_sysref/pll_ref_clk] + + set_property -dict [ list \ + CONFIG.FREQ_HZ {184320000} \ + CONFIG.PHASE {0} \ + CONFIG.CLK_DOMAIN {x4xx_ps_rfdc_bd_pll_ref_clk_in} \ + ] [get_bd_pins /rfdc/capture_sysref/rfdc_clk] + + # Create instance: clock_gates_0, and set properties + set block_name clock_gates + set block_cell_name clock_gates_0 + if { [catch {set clock_gates_0 [create_bd_cell -type module -reference $block_name $block_cell_name] } errmsg] } { + catch {common::send_msg_id "BD_TCL-105" "ERROR" "Unable to add referenced block <$block_name>. Please add the files for ${block_name}'s definition into the project."} + return 1 + } elseif { $clock_gates_0 eq "" } { + catch {common::send_msg_id "BD_TCL-106" "ERROR" "Unable to referenced block <$block_name>. Please add the files for ${block_name}'s definition into the project."} + return 1 + } + + # Create instance: const_1, and set properties + set const_1 [ create_bd_cell -type ip -vlnv xilinx.com:ip:xlconstant:1.1 const_1 ] + + # Create instance: data_clock_mmcm, and set properties + set data_clock_mmcm [ create_bd_cell -type ip -vlnv xilinx.com:ip:clk_wiz:6.0 data_clock_mmcm ] + set_property -dict [ list \ + CONFIG.AXI_DRP {true} \ + CONFIG.CLKIN1_JITTER_PS {162.76} \ + CONFIG.CLKOUT1_DRIVES {Buffer} \ + CONFIG.CLKOUT1_JITTER {116.960} \ + CONFIG.CLKOUT1_PHASE_ERROR {124.626} \ + CONFIG.CLKOUT1_REQUESTED_OUT_FREQ {61.44} \ + CONFIG.CLKOUT2_DRIVES {Buffer} \ + CONFIG.CLKOUT2_JITTER {104.559} \ + CONFIG.CLKOUT2_PHASE_ERROR {124.626} \ + CONFIG.CLKOUT2_REQUESTED_OUT_FREQ {122.88} \ + CONFIG.CLKOUT2_USED {true} \ + CONFIG.CLKOUT3_DRIVES {Buffer} \ + CONFIG.CLKOUT3_JITTER {98.017} \ + CONFIG.CLKOUT3_PHASE_ERROR {124.626} \ + CONFIG.CLKOUT3_REQUESTED_OUT_FREQ {184.32} \ + CONFIG.CLKOUT3_USED {true} \ + CONFIG.CLKOUT4_DRIVES {Buffer} \ + CONFIG.CLKOUT4_JITTER {93.671} \ + CONFIG.CLKOUT4_PHASE_ERROR {124.626} \ + CONFIG.CLKOUT4_REQUESTED_OUT_FREQ {245.76} \ + CONFIG.CLKOUT4_USED {true} \ + CONFIG.CLKOUT5_DRIVES {Buffer} \ + CONFIG.CLKOUT5_JITTER {87.938} \ + CONFIG.CLKOUT5_PHASE_ERROR {124.626} \ + CONFIG.CLKOUT5_REQUESTED_OUT_FREQ {368.64} \ + CONFIG.CLKOUT5_USED {true} \ + CONFIG.CLKOUT6_DRIVES {Buffer} \ + CONFIG.CLKOUT7_DRIVES {Buffer} \ + CONFIG.CLK_OUT1_PORT {pll_ref_clk_out} \ + CONFIG.CLK_OUT2_PORT {data_clk} \ + CONFIG.CLK_OUT3_PORT {rfdc_clk} \ + CONFIG.CLK_OUT4_PORT {data_clk_2x} \ + CONFIG.CLK_OUT5_PORT {rfdc_clk_2x} \ + CONFIG.ENABLE_CLOCK_MONITOR {false} \ + CONFIG.FEEDBACK_SOURCE {FDBK_AUTO} \ + CONFIG.MMCM_CLKFBOUT_MULT_F {24.000} \ + CONFIG.MMCM_CLKIN1_PERIOD {16.276} \ + CONFIG.MMCM_CLKIN2_PERIOD {10.0} \ + CONFIG.MMCM_CLKOUT0_DIVIDE_F {24.000} \ + CONFIG.MMCM_CLKOUT1_DIVIDE {12} \ + CONFIG.MMCM_CLKOUT2_DIVIDE {8} \ + CONFIG.MMCM_CLKOUT3_DIVIDE {6} \ + CONFIG.MMCM_CLKOUT4_DIVIDE {4} \ + CONFIG.MMCM_DIVCLK_DIVIDE {1} \ + CONFIG.NUM_OUT_CLKS {5} \ + CONFIG.PHASE_DUTY_CONFIG {false} \ + CONFIG.PRIMITIVE {MMCM} \ + CONFIG.PRIM_IN_FREQ {61.44} \ + CONFIG.PRIM_SOURCE {No_buffer} \ + CONFIG.SECONDARY_SOURCE {Single_ended_clock_capable_pin} \ + CONFIG.USE_CLKFB_STOPPED {false} \ + CONFIG.USE_DYN_RECONFIG {true} \ + CONFIG.USE_INCLK_STOPPED {false} \ + CONFIG.USE_LOCKED {true} \ + CONFIG.USE_PHASE_ALIGNMENT {true} \ + CONFIG.USE_POWER_DOWN {false} \ + CONFIG.USE_RESET {true} \ + CONFIG.USE_SAFE_CLOCK_STARTUP {false} \ + ] $data_clock_mmcm + + # Create instance: reg_clock_gate_control, and set properties + set reg_clock_gate_control [ create_bd_cell -type ip -vlnv xilinx.com:ip:axi_gpio:2.0 reg_clock_gate_control ] + set_property -dict [ list \ + CONFIG.C_ALL_INPUTS_2 {1} \ + CONFIG.C_ALL_OUTPUTS {1} \ + CONFIG.C_GPIO_WIDTH {32} \ + CONFIG.C_IS_DUAL {1} \ + ] $reg_clock_gate_control + + # Create instance: reg_invert_iq, and set properties + set reg_invert_iq [ create_bd_cell -type ip -vlnv xilinx.com:ip:axi_gpio:2.0 reg_invert_iq ] + set_property -dict [ list \ + CONFIG.C_ALL_OUTPUTS {1} \ + ] $reg_invert_iq + + # Create instance: reg_reset_mmcm, and set properties + set reg_reset_mmcm [ create_bd_cell -type ip -vlnv xilinx.com:ip:axi_gpio:2.0 reg_reset_mmcm ] + set_property -dict [ list \ + CONFIG.C_ALL_OUTPUTS {1} \ + CONFIG.C_GPIO_WIDTH {1} \ + ] $reg_reset_mmcm + + # Create instance: reg_rf_axi_status, and set properties + set reg_rf_axi_status [ create_bd_cell -type ip -vlnv xilinx.com:ip:axi_gpio:2.0 reg_rf_axi_status ] + set_property -dict [ list \ + CONFIG.C_ALL_INPUTS {1} \ + CONFIG.C_ALL_INPUTS_2 {1} \ + CONFIG.C_ALL_OUTPUTS {0} \ + CONFIG.C_GPIO_WIDTH {32} \ + CONFIG.C_IS_DUAL {1} \ + ] $reg_rf_axi_status + + # Create instance: reg_rf_reset_control, and set properties + set reg_rf_reset_control [ create_bd_cell -type ip -vlnv xilinx.com:ip:axi_gpio:2.0 reg_rf_reset_control ] + set_property -dict [ list \ + CONFIG.C_ALL_INPUTS_2 {1} \ + CONFIG.C_ALL_OUTPUTS {1} \ + CONFIG.C_GPIO_WIDTH {32} \ + CONFIG.C_IS_DUAL {1} \ + ] $reg_rf_reset_control + + # Create instance: rf_clock_buffers + create_hier_cell_rf_clock_buffers $hier_obj rf_clock_buffers + + # Create instance: rf_data_converter, and set properties + set rf_data_converter [ create_bd_cell -type ip -vlnv xilinx.com:ip:usp_rf_data_converter:2.1 rf_data_converter ] + set_property -dict [ list \ + CONFIG.ADC0_Enable {1} \ + CONFIG.ADC0_Fabric_Freq {184.320} \ + CONFIG.ADC0_Multi_Tile_Sync {true} \ + CONFIG.ADC0_Outclk_Freq {184.320} \ + CONFIG.ADC0_Refclk_Freq {2949.120} \ + CONFIG.ADC0_Sampling_Rate {2.94912} \ + CONFIG.ADC1_Enable {0} \ + CONFIG.ADC1_Fabric_Freq {0.0} \ + CONFIG.ADC1_Multi_Tile_Sync {false} \ + CONFIG.ADC1_Outclk_Freq {15.625} \ + CONFIG.ADC1_Refclk_Freq {2000.000} \ + CONFIG.ADC1_Sampling_Rate {2.0} \ + CONFIG.ADC224_En {true} \ + CONFIG.ADC225_En {false} \ + CONFIG.ADC2_Enable {1} \ + CONFIG.ADC2_Fabric_Freq {184.320} \ + CONFIG.ADC2_Multi_Tile_Sync {true} \ + CONFIG.ADC2_Outclk_Freq {184.320} \ + CONFIG.ADC2_Refclk_Freq {2949.120} \ + CONFIG.ADC2_Sampling_Rate {2.94912} \ + CONFIG.ADC_Data_Type00 {1} \ + CONFIG.ADC_Data_Type01 {1} \ + CONFIG.ADC_Data_Type02 {1} \ + CONFIG.ADC_Data_Type03 {1} \ + CONFIG.ADC_Data_Type10 {0} \ + CONFIG.ADC_Data_Type11 {0} \ + CONFIG.ADC_Data_Type12 {0} \ + CONFIG.ADC_Data_Type13 {0} \ + CONFIG.ADC_Data_Type20 {1} \ + CONFIG.ADC_Data_Type21 {1} \ + CONFIG.ADC_Data_Type22 {1} \ + CONFIG.ADC_Data_Type23 {1} \ + CONFIG.ADC_Data_Width00 {8} \ + CONFIG.ADC_Data_Width01 {8} \ + CONFIG.ADC_Data_Width02 {8} \ + CONFIG.ADC_Data_Width03 {8} \ + CONFIG.ADC_Data_Width10 {8} \ + CONFIG.ADC_Data_Width11 {8} \ + CONFIG.ADC_Data_Width12 {8} \ + CONFIG.ADC_Data_Width13 {8} \ + CONFIG.ADC_Data_Width20 {8} \ + CONFIG.ADC_Data_Width21 {8} \ + CONFIG.ADC_Data_Width22 {8} \ + CONFIG.ADC_Data_Width23 {8} \ + CONFIG.ADC_Debug {false} \ + CONFIG.ADC_Decimation_Mode00 {2} \ + CONFIG.ADC_Decimation_Mode01 {2} \ + CONFIG.ADC_Decimation_Mode02 {2} \ + CONFIG.ADC_Decimation_Mode03 {2} \ + CONFIG.ADC_Decimation_Mode10 {0} \ + CONFIG.ADC_Decimation_Mode11 {0} \ + CONFIG.ADC_Decimation_Mode12 {0} \ + CONFIG.ADC_Decimation_Mode13 {0} \ + CONFIG.ADC_Decimation_Mode20 {2} \ + CONFIG.ADC_Decimation_Mode21 {2} \ + CONFIG.ADC_Decimation_Mode22 {2} \ + CONFIG.ADC_Decimation_Mode23 {2} \ + CONFIG.ADC_Dither00 {false} \ + CONFIG.ADC_Dither01 {false} \ + CONFIG.ADC_Dither02 {false} \ + CONFIG.ADC_Dither03 {false} \ + CONFIG.ADC_Dither10 {true} \ + CONFIG.ADC_Dither11 {true} \ + CONFIG.ADC_Dither12 {true} \ + CONFIG.ADC_Dither13 {true} \ + CONFIG.ADC_Dither20 {false} \ + CONFIG.ADC_Dither21 {false} \ + CONFIG.ADC_Dither22 {false} \ + CONFIG.ADC_Dither23 {false} \ + CONFIG.ADC_Mixer_Mode00 {0} \ + CONFIG.ADC_Mixer_Mode01 {0} \ + CONFIG.ADC_Mixer_Mode02 {0} \ + CONFIG.ADC_Mixer_Mode03 {0} \ + CONFIG.ADC_Mixer_Mode10 {2} \ + CONFIG.ADC_Mixer_Mode11 {2} \ + CONFIG.ADC_Mixer_Mode12 {2} \ + CONFIG.ADC_Mixer_Mode13 {2} \ + CONFIG.ADC_Mixer_Mode20 {0} \ + CONFIG.ADC_Mixer_Mode21 {0} \ + CONFIG.ADC_Mixer_Mode22 {0} \ + CONFIG.ADC_Mixer_Mode23 {0} \ + CONFIG.ADC_Mixer_Type00 {2} \ + CONFIG.ADC_Mixer_Type01 {2} \ + CONFIG.ADC_Mixer_Type02 {2} \ + CONFIG.ADC_Mixer_Type03 {2} \ + CONFIG.ADC_Mixer_Type10 {3} \ + CONFIG.ADC_Mixer_Type11 {3} \ + CONFIG.ADC_Mixer_Type12 {3} \ + CONFIG.ADC_Mixer_Type13 {3} \ + CONFIG.ADC_Mixer_Type20 {2} \ + CONFIG.ADC_Mixer_Type21 {2} \ + CONFIG.ADC_Mixer_Type22 {2} \ + CONFIG.ADC_Mixer_Type23 {2} \ + CONFIG.ADC_NCO_Freq00 {0.200} \ + CONFIG.ADC_NCO_Freq01 {0.200} \ + CONFIG.ADC_NCO_Freq02 {0.200} \ + CONFIG.ADC_NCO_Freq03 {0.200} \ + CONFIG.ADC_NCO_Freq10 {0.0} \ + CONFIG.ADC_NCO_Freq11 {0.0} \ + CONFIG.ADC_NCO_Freq12 {0.0} \ + CONFIG.ADC_NCO_Freq13 {0.0} \ + CONFIG.ADC_NCO_Freq20 {0.200} \ + CONFIG.ADC_NCO_Freq21 {0.200} \ + CONFIG.ADC_NCO_Freq22 {0.200} \ + CONFIG.ADC_NCO_Freq23 {0.200} \ + CONFIG.ADC_NCO_Freq30 {0.0} \ + CONFIG.ADC_NCO_Freq31 {0.0} \ + CONFIG.ADC_NCO_RTS {true} \ + CONFIG.ADC_RTS {true} \ + CONFIG.ADC_Slice00_Enable {true} \ + CONFIG.ADC_Slice01_Enable {true} \ + CONFIG.ADC_Slice02_Enable {true} \ + CONFIG.ADC_Slice03_Enable {true} \ + CONFIG.ADC_Slice10_Enable {false} \ + CONFIG.ADC_Slice11_Enable {false} \ + CONFIG.ADC_Slice12_Enable {false} \ + CONFIG.ADC_Slice13_Enable {false} \ + CONFIG.ADC_Slice20_Enable {true} \ + CONFIG.ADC_Slice21_Enable {true} \ + CONFIG.ADC_Slice22_Enable {true} \ + CONFIG.ADC_Slice23_Enable {true} \ + CONFIG.Axiclk_Freq {40} \ + CONFIG.Calibration_Freeze {true} \ + CONFIG.Converter_Setup {1} \ + CONFIG.DAC0_Band {0} \ + CONFIG.DAC0_Enable {1} \ + CONFIG.DAC0_Fabric_Freq {184.320} \ + CONFIG.DAC0_Multi_Tile_Sync {true} \ + CONFIG.DAC0_Outclk_Freq {184.320} \ + CONFIG.DAC0_Refclk_Freq {2949.120} \ + CONFIG.DAC0_Sampling_Rate {2.94912} \ + CONFIG.DAC1_Enable {1} \ + CONFIG.DAC1_Fabric_Freq {184.320} \ + CONFIG.DAC1_Multi_Tile_Sync {true} \ + CONFIG.DAC1_Outclk_Freq {184.320} \ + CONFIG.DAC1_Refclk_Freq {2949.120} \ + CONFIG.DAC1_Sampling_Rate {2.94912} \ + CONFIG.DAC228_En {true} \ + CONFIG.DAC_Data_Type00 {0} \ + CONFIG.DAC_Data_Type01 {0} \ + CONFIG.DAC_Data_Width00 {16} \ + CONFIG.DAC_Data_Width01 {16} \ + CONFIG.DAC_Data_Width02 {16} \ + CONFIG.DAC_Data_Width03 {16} \ + CONFIG.DAC_Data_Width10 {16} \ + CONFIG.DAC_Data_Width11 {16} \ + CONFIG.DAC_Debug {false} \ + CONFIG.DAC_Interpolation_Mode00 {2} \ + CONFIG.DAC_Interpolation_Mode01 {2} \ + CONFIG.DAC_Interpolation_Mode02 {0} \ + CONFIG.DAC_Interpolation_Mode03 {0} \ + CONFIG.DAC_Interpolation_Mode10 {2} \ + CONFIG.DAC_Interpolation_Mode11 {2} \ + CONFIG.DAC_Invsinc_Ctrl00 {false} \ + CONFIG.DAC_Mixer_Mode00 {0} \ + CONFIG.DAC_Mixer_Mode01 {0} \ + CONFIG.DAC_Mixer_Mode02 {2} \ + CONFIG.DAC_Mixer_Mode03 {2} \ + CONFIG.DAC_Mixer_Mode10 {0} \ + CONFIG.DAC_Mixer_Mode11 {0} \ + CONFIG.DAC_Mixer_Mode13 {2} \ + CONFIG.DAC_Mixer_Mode20 {2} \ + CONFIG.DAC_Mixer_Mode21 {2} \ + CONFIG.DAC_Mixer_Mode30 {2} \ + CONFIG.DAC_Mixer_Mode31 {2} \ + CONFIG.DAC_Mixer_Type00 {2} \ + CONFIG.DAC_Mixer_Type01 {2} \ + CONFIG.DAC_Mixer_Type02 {3} \ + CONFIG.DAC_Mixer_Type03 {3} \ + CONFIG.DAC_Mixer_Type10 {2} \ + CONFIG.DAC_Mixer_Type11 {2} \ + CONFIG.DAC_NCO_Freq00 {0.200} \ + CONFIG.DAC_NCO_Freq01 {0.200} \ + CONFIG.DAC_NCO_Freq10 {0.200} \ + CONFIG.DAC_NCO_Freq11 {0.200} \ + CONFIG.DAC_NCO_RTS {true} \ + CONFIG.DAC_Output_Current {1} \ + CONFIG.DAC_RTS {false} \ + CONFIG.DAC_Slice00_Enable {true} \ + CONFIG.DAC_Slice01_Enable {true} \ + CONFIG.DAC_Slice02_Enable {false} \ + CONFIG.DAC_Slice03_Enable {false} \ + CONFIG.DAC_Slice10_Enable {true} \ + CONFIG.DAC_Slice11_Enable {true} \ + CONFIG.mADC_Data_Type00 {0} \ + CONFIG.mADC_Data_Type01 {0} \ + CONFIG.mADC_Data_Type02 {0} \ + CONFIG.mADC_Data_Type03 {0} \ + CONFIG.mADC_Data_Width00 {8} \ + CONFIG.mADC_Data_Width01 {8} \ + CONFIG.mADC_Data_Width02 {8} \ + CONFIG.mADC_Data_Width03 {8} \ + CONFIG.mADC_Decimation_Mode00 {0} \ + CONFIG.mADC_Decimation_Mode01 {0} \ + CONFIG.mADC_Decimation_Mode02 {0} \ + CONFIG.mADC_Decimation_Mode03 {0} \ + CONFIG.mADC_Dither00 {true} \ + CONFIG.mADC_Dither01 {true} \ + CONFIG.mADC_Dither02 {true} \ + CONFIG.mADC_Dither03 {true} \ + CONFIG.mADC_Enable {0} \ + CONFIG.mADC_Fabric_Freq {0.0} \ + CONFIG.mADC_Mixer_Mode00 {2} \ + CONFIG.mADC_Mixer_Mode01 {2} \ + CONFIG.mADC_Mixer_Mode02 {2} \ + CONFIG.mADC_Mixer_Mode03 {2} \ + CONFIG.mADC_Mixer_Type00 {3} \ + CONFIG.mADC_Mixer_Type01 {3} \ + CONFIG.mADC_Mixer_Type02 {3} \ + CONFIG.mADC_Mixer_Type03 {3} \ + CONFIG.mADC_Multi_Tile_Sync {false} \ + CONFIG.mADC_NCO_Freq02 {0.0} \ + CONFIG.mADC_NCO_Freq03 {0.0} \ + CONFIG.mADC_Outclk_Freq {15.625} \ + CONFIG.mADC_Refclk_Freq {2000.000} \ + CONFIG.mADC_Sampling_Rate {2.0} \ + CONFIG.mADC_Slice00_Enable {false} \ + CONFIG.mADC_Slice01_Enable {false} \ + CONFIG.mADC_Slice02_Enable {false} \ + CONFIG.mADC_Slice03_Enable {false} \ + CONFIG.mDAC_Band {0} \ + CONFIG.mDAC_Data_Type00 {0} \ + CONFIG.mDAC_Data_Type01 {0} \ + CONFIG.mDAC_Data_Width00 {2} \ + CONFIG.mDAC_Data_Width01 {2} \ + CONFIG.mDAC_Data_Width02 {16} \ + CONFIG.mDAC_Data_Width03 {16} \ + CONFIG.mDAC_Enable {1} \ + CONFIG.mDAC_Fabric_Freq {368.640} \ + CONFIG.mDAC_Interpolation_Mode00 {8} \ + CONFIG.mDAC_Interpolation_Mode01 {8} \ + CONFIG.mDAC_Interpolation_Mode02 {0} \ + CONFIG.mDAC_Interpolation_Mode03 {0} \ + CONFIG.mDAC_Invsinc_Ctrl00 {false} \ + CONFIG.mDAC_Mixer_Mode00 {0} \ + CONFIG.mDAC_Mixer_Mode01 {0} \ + CONFIG.mDAC_Mixer_Mode02 {2} \ + CONFIG.mDAC_Mixer_Mode03 {2} \ + CONFIG.mDAC_Mixer_Type00 {2} \ + CONFIG.mDAC_Mixer_Type01 {2} \ + CONFIG.mDAC_Mixer_Type02 {3} \ + CONFIG.mDAC_Mixer_Type03 {3} \ + CONFIG.mDAC_Multi_Tile_Sync {false} \ + CONFIG.mDAC_NCO_Freq01 {0} \ + CONFIG.mDAC_Outclk_Freq {184.320} \ + CONFIG.mDAC_Refclk_Freq {2949.120} \ + CONFIG.mDAC_Sampling_Rate {2.94912} \ + CONFIG.mDAC_Slice00_Enable {true} \ + CONFIG.mDAC_Slice01_Enable {true} \ + CONFIG.mDAC_Slice02_Enable {false} \ + CONFIG.mDAC_Slice03_Enable {false} \ + ] $rf_data_converter + + # Create instance: rf_nco_reset_0, and set properties + set block_name rf_nco_reset + set block_cell_name rf_nco_reset_0 + if { [catch {set rf_nco_reset_0 [create_bd_cell -type module -reference $block_name $block_cell_name] } errmsg] } { + catch {common::send_msg_id "BD_TCL-105" "ERROR" "Unable to add referenced block <$block_name>. Please add the files for ${block_name}'s definition into the project."} + return 1 + } elseif { $rf_nco_reset_0 eq "" } { + catch {common::send_msg_id "BD_TCL-106" "ERROR" "Unable to referenced block <$block_name>. Please add the files for ${block_name}'s definition into the project."} + return 1 + } + + # Create instance: rf_reset_controller_0, and set properties + set block_name rf_reset_controller + set block_cell_name rf_reset_controller_0 + if { [catch {set rf_reset_controller_0 [create_bd_cell -type module -reference $block_name $block_cell_name] } errmsg] } { + catch {common::send_msg_id "BD_TCL-105" "ERROR" "Unable to add referenced block <$block_name>. Please add the files for ${block_name}'s definition into the project."} + return 1 + } elseif { $rf_reset_controller_0 eq "" } { + catch {common::send_msg_id "BD_TCL-106" "ERROR" "Unable to referenced block <$block_name>. Please add the files for ${block_name}'s definition into the project."} + return 1 + } + + # Create instance: slice_15_8, and set properties + set slice_15_8 [ create_bd_cell -type ip -vlnv xilinx.com:ip:xlslice:1.0 slice_15_8 ] + set_property -dict [ list \ + CONFIG.DIN_FROM {15} \ + CONFIG.DIN_TO {8} \ + CONFIG.DOUT_WIDTH {8} \ + ] $slice_15_8 + + # Create instance: slice_7_0, and set properties + set slice_7_0 [ create_bd_cell -type ip -vlnv xilinx.com:ip:xlslice:1.0 slice_7_0 ] + set_property -dict [ list \ + CONFIG.DIN_FROM {7} \ + CONFIG.DOUT_WIDTH {8} \ + ] $slice_7_0 + + # Create interface connections + connect_bd_intf_net -intf_net S_AXI_1_1 [get_bd_intf_pins axi_interconnect_rf/M06_AXI] [get_bd_intf_pins calibration_muxes/S_AXI_1] + connect_bd_intf_net -intf_net adc0_clk_0_1 [get_bd_intf_pins adc0_clk] [get_bd_intf_pins rf_data_converter/adc0_clk] + connect_bd_intf_net -intf_net adc2_clk_0_1 [get_bd_intf_pins adc2_clk] [get_bd_intf_pins rf_data_converter/adc2_clk] + connect_bd_intf_net -intf_net axi_interconnect_0_M00_AXI [get_bd_intf_pins axi_interconnect_rf/M00_AXI] [get_bd_intf_pins rf_data_converter/s_axi] + connect_bd_intf_net -intf_net axi_interconnect_rf_M01_AXI [get_bd_intf_pins axi_interconnect_rf/M01_AXI] [get_bd_intf_pins data_clock_mmcm/s_axi_lite] + connect_bd_intf_net -intf_net axi_interconnect_rf_M02_AXI [get_bd_intf_pins axi_interconnect_rf/M02_AXI] [get_bd_intf_pins reg_invert_iq/S_AXI] + connect_bd_intf_net -intf_net axi_interconnect_rf_M03_AXI [get_bd_intf_pins axi_interconnect_rf/M03_AXI] [get_bd_intf_pins reg_reset_mmcm/S_AXI] + connect_bd_intf_net -intf_net axi_interconnect_rf_M04_AXI [get_bd_intf_pins axi_interconnect_rf/M04_AXI] [get_bd_intf_pins reg_rf_reset_control/S_AXI] + connect_bd_intf_net -intf_net axi_interconnect_rf_M05_AXI [get_bd_intf_pins axi_interconnect_rf/M05_AXI] [get_bd_intf_pins reg_rf_axi_status/S_AXI] + connect_bd_intf_net -intf_net axi_interconnect_rf_M07_AXI [get_bd_intf_pins axi_interconnect_rf/M07_AXI] [get_bd_intf_pins reg_clock_gate_control/S_AXI] + connect_bd_intf_net -intf_net axi_interconnect_rf_M08_AXI [get_bd_intf_pins ThresholdRegister/S_AXI] [get_bd_intf_pins axi_interconnect_rf/M08_AXI] + connect_bd_intf_net -intf_net calibration_muxes_m_axis_0_0 [get_bd_intf_pins calibration_muxes/m_axis_0_0] [get_bd_intf_pins rf_data_converter/s00_axis] + connect_bd_intf_net -intf_net calibration_muxes_m_axis_1_0 [get_bd_intf_pins calibration_muxes/m_axis_1_0] [get_bd_intf_pins rf_data_converter/s01_axis] + connect_bd_intf_net -intf_net calibration_muxes_m_axis_2_0 [get_bd_intf_pins calibration_muxes/m_axis_2_0] [get_bd_intf_pins rf_data_converter/s10_axis] + connect_bd_intf_net -intf_net calibration_muxes_m_axis_3_0 [get_bd_intf_pins calibration_muxes/m_axis_3_0] [get_bd_intf_pins rf_data_converter/s11_axis] + connect_bd_intf_net -intf_net dac0_clk_0_1 [get_bd_intf_pins dac0_clk] [get_bd_intf_pins rf_data_converter/dac0_clk] + connect_bd_intf_net -intf_net dac1_clk_0_1 [get_bd_intf_pins dac1_clk] [get_bd_intf_pins rf_data_converter/dac1_clk] + connect_bd_intf_net -intf_net dac_tile228_ch0_din_1 [get_bd_intf_pins dac_tile228_ch0_din] [get_bd_intf_pins calibration_muxes/dac_tile228_ch0_din] + connect_bd_intf_net -intf_net dac_tile228_ch1_din_1 [get_bd_intf_pins dac_tile228_ch1_din] [get_bd_intf_pins calibration_muxes/dac_tile228_ch1_din] + connect_bd_intf_net -intf_net dac_tile229_ch0_din_1 [get_bd_intf_pins dac_tile229_ch0_din] [get_bd_intf_pins calibration_muxes/dac_tile229_ch0_din] + connect_bd_intf_net -intf_net dac_tile229_ch1_din_1 [get_bd_intf_pins dac_tile229_ch1_din] [get_bd_intf_pins calibration_muxes/dac_tile229_ch1_din] + connect_bd_intf_net -intf_net rf_data_converter_m00_axis [get_bd_intf_pins adc_tile224_ch0_dout_i] [get_bd_intf_pins rf_data_converter/m00_axis] + connect_bd_intf_net -intf_net rf_data_converter_m01_axis [get_bd_intf_pins adc_tile224_ch0_dout_q] [get_bd_intf_pins rf_data_converter/m01_axis] + connect_bd_intf_net -intf_net rf_data_converter_m02_axis [get_bd_intf_pins adc_tile224_ch1_dout_i] [get_bd_intf_pins rf_data_converter/m02_axis] + connect_bd_intf_net -intf_net rf_data_converter_m03_axis [get_bd_intf_pins adc_tile224_ch1_dout_q] [get_bd_intf_pins rf_data_converter/m03_axis] + connect_bd_intf_net -intf_net rf_data_converter_m20_axis [get_bd_intf_pins adc_tile226_ch0_dout_i] [get_bd_intf_pins rf_data_converter/m20_axis] + connect_bd_intf_net -intf_net rf_data_converter_m21_axis [get_bd_intf_pins adc_tile226_ch0_dout_q] [get_bd_intf_pins rf_data_converter/m21_axis] + connect_bd_intf_net -intf_net rf_data_converter_m22_axis [get_bd_intf_pins adc_tile226_ch1_dout_i] [get_bd_intf_pins rf_data_converter/m22_axis] + connect_bd_intf_net -intf_net rf_data_converter_m23_axis [get_bd_intf_pins adc_tile226_ch1_dout_q] [get_bd_intf_pins rf_data_converter/m23_axis] + connect_bd_intf_net -intf_net rf_data_converter_vout00 [get_bd_intf_pins dac_tile228_ch0_vout] [get_bd_intf_pins rf_data_converter/vout00] + connect_bd_intf_net -intf_net rf_data_converter_vout01 [get_bd_intf_pins dac_tile228_ch1_vout] [get_bd_intf_pins rf_data_converter/vout01] + connect_bd_intf_net -intf_net rf_data_converter_vout10 [get_bd_intf_pins dac_tile229_ch0_vout] [get_bd_intf_pins rf_data_converter/vout10] + connect_bd_intf_net -intf_net rf_data_converter_vout11 [get_bd_intf_pins dac_tile229_ch1_vout] [get_bd_intf_pins rf_data_converter/vout11] + connect_bd_intf_net -intf_net s_axi_config_1 [get_bd_intf_pins s_axi_config] [get_bd_intf_pins axi_interconnect_rf/S00_AXI] + connect_bd_intf_net -intf_net sysref_in_0_1 [get_bd_intf_pins sysref_rf_in] [get_bd_intf_pins rf_data_converter/sysref_in] + connect_bd_intf_net -intf_net vin0_01_0_1 [get_bd_intf_pins adc_tile224_ch0_vin] [get_bd_intf_pins rf_data_converter/vin0_01] + connect_bd_intf_net -intf_net vin0_23_0_1 [get_bd_intf_pins adc_tile224_ch1_vin] [get_bd_intf_pins rf_data_converter/vin0_23] + connect_bd_intf_net -intf_net vin2_01_0_1 [get_bd_intf_pins adc_tile226_ch0_vin] [get_bd_intf_pins rf_data_converter/vin2_01] + connect_bd_intf_net -intf_net vin2_23_0_1 [get_bd_intf_pins adc_tile226_ch1_vin] [get_bd_intf_pins rf_data_converter/vin2_23] + + # Create port connections + connect_bd_net -net M02_ARESETN_1 [get_bd_pins axi_interconnect_rf/M02_ARESETN] [get_bd_pins const_1/dout] [get_bd_pins reg_invert_iq/s_axi_aresetn] + connect_bd_net -net adc_reset_pulse_dclk_1 [get_bd_pins adc_reset_pulse_dclk] [get_bd_pins rf_reset_controller_0/dAdcResetPulse] + connect_bd_net -net capture_sysref_0_sysref_out_rclk [get_bd_pins sysref_out_rclk] [get_bd_pins capture_sysref/sysref_out_rclk] [get_bd_pins rf_data_converter/user_sysref_adc] [get_bd_pins rf_data_converter/user_sysref_dac] + connect_bd_net -net capture_sysref_sysref_out_pclk [get_bd_pins sysref_out_pclk] [get_bd_pins capture_sysref/sysref_out_pclk] [get_bd_pins rf_nco_reset_0/dSysref] + connect_bd_net -net clk_in1_0_1 [get_bd_pins pll_ref_clk_in] [get_bd_pins data_clock_mmcm/clk_in1] + connect_bd_net -net clock_gates_0_cSoftwareStatus [get_bd_pins clock_gates_0/rSoftwareStatus] [get_bd_pins reg_clock_gate_control/gpio2_io_i] + connect_bd_net -net clock_gates_0_rGatedBaseClksValid [get_bd_pins gated_base_clks_valid_clk40] [get_bd_pins clock_gates_0/rGatedBaseClksValid] + connect_bd_net -net clock_gates_0_rPllLocked [get_bd_pins data_clock_locked] [get_bd_pins clock_gates_0/rPllLocked] + connect_bd_net -net clock_gates_0_rf2EnableBufg [get_bd_pins clock_gates_0/aEnableRfBufg2x] [get_bd_pins rf_clock_buffers/rfdc_clk_2x_ce] + connect_bd_net -net clock_gates_0_rfEnableBufg [get_bd_pins clock_gates_0/aEnableRfBufg1x] [get_bd_pins rf_clock_buffers/rfdc_clk_ce] + connect_bd_net -net dac_reset_pulse_dclk_1 [get_bd_pins dac_reset_pulse_dclk] [get_bd_pins rf_reset_controller_0/dDacResetPulse] + connect_bd_net -net data_clk_2x_pll [get_bd_pins clock_gates_0/DataClk2xPll] [get_bd_pins data_clock_mmcm/data_clk_2x] + connect_bd_net -net data_clock_mmcm_data_clk [get_bd_pins data_clk] [get_bd_pins clock_gates_0/DataClk1x] [get_bd_pins rf_nco_reset_0/DataClk] [get_bd_pins rf_reset_controller_0/DataClk] + connect_bd_net -net data_clock_mmcm_data_clk1 [get_bd_pins clock_gates_0/DataClk1xPll] [get_bd_pins data_clock_mmcm/data_clk] + connect_bd_net -net data_clock_mmcm_data_clk_2x [get_bd_pins data_clk_2x] [get_bd_pins clock_gates_0/DataClk2x] [get_bd_pins rf_reset_controller_0/DataClk2x] + connect_bd_net -net data_clock_mmcm_locked [get_bd_pins clock_gates_0/aPllLocked] [get_bd_pins data_clock_mmcm/locked] + connect_bd_net -net data_clock_mmcm_rfdc_clk [get_bd_pins rfdc_clk] [get_bd_pins calibration_muxes/s_axi_aclk_0] [get_bd_pins capture_sysref/rfdc_clk] [get_bd_pins rf_clock_buffers/rfdc_clk] [get_bd_pins rf_data_converter/m0_axis_aclk] [get_bd_pins rf_data_converter/m2_axis_aclk] [get_bd_pins rf_data_converter/s0_axis_aclk] [get_bd_pins rf_data_converter/s1_axis_aclk] [get_bd_pins rf_reset_controller_0/RfClk] + connect_bd_net -net data_clock_mmcm_rfdc_clk1 [get_bd_pins data_clock_mmcm/rfdc_clk] [get_bd_pins rf_clock_buffers/rfdc_clk_pll] + connect_bd_net -net data_clock_mmcm_rfdc_clk_2x [get_bd_pins rfdc_clk_2x] [get_bd_pins axi_interconnect_rf/M02_ACLK] [get_bd_pins reg_invert_iq/s_axi_aclk] [get_bd_pins rf_clock_buffers/rfdc_clk_2x] [get_bd_pins rf_reset_controller_0/RfClk2x] + connect_bd_net -net data_clock_mmcm_rfdc_clk_2x1 [get_bd_pins data_clock_mmcm/rfdc_clk_2x] [get_bd_pins rf_clock_buffers/rfdc_clk_2x_pll] + connect_bd_net -net data_clock_mmcm_tdc_ref_clk [get_bd_pins pll_ref_clk_out] [get_bd_pins capture_sysref/pll_ref_clk] [get_bd_pins data_clock_mmcm/pll_ref_clk_out] [get_bd_pins rf_reset_controller_0/PllRefClk] + connect_bd_net -net enable_gated_clocks_clk40_1 [get_bd_pins enable_gated_clocks_clk40] [get_bd_pins clock_gates_0/rSafeToEnableGatedClks] + connect_bd_net -net enable_rclk_0_1 [get_bd_pins enable_sysref_rclk] [get_bd_pins capture_sysref/enable_rclk] + connect_bd_net -net gpio2_io_i_0_2 [get_bd_pins rf_dsp_info_sclk] [get_bd_pins reg_rf_axi_status/gpio2_io_i] + connect_bd_net -net gpio_io_i_0_1 [get_bd_pins rf_axi_status_sclk] [get_bd_pins reg_rf_axi_status/gpio_io_i] + connect_bd_net -net reg_reset_mmcm_gpio_io_o [get_bd_pins axi_interconnect_rf/M01_ARESETN] [get_bd_pins clock_gates_0/rPllReset_n] [get_bd_pins data_clock_mmcm/s_axi_aresetn] [get_bd_pins reg_reset_mmcm/gpio_io_o] + connect_bd_net -net reg_rf_reset_control1_gpio_io_o [get_bd_pins clock_gates_0/rSoftwareControl] [get_bd_pins reg_clock_gate_control/gpio_io_o] + connect_bd_net -net reg_rf_resets_gpio_io_o [get_bd_pins reg_rf_reset_control/gpio_io_o] [get_bd_pins rf_reset_controller_0/cSoftwareControl] + connect_bd_net -net rf_data_converter_adc0_01_over_threshold1 [get_bd_pins ThresholdRegister/In0] [get_bd_pins rf_data_converter/adc0_01_over_threshold1] + connect_bd_net -net rf_data_converter_adc0_01_over_threshold2 [get_bd_pins ThresholdRegister/In1] [get_bd_pins rf_data_converter/adc0_01_over_threshold2] + connect_bd_net -net rf_data_converter_adc0_23_over_threshold1 [get_bd_pins ThresholdRegister/In2] [get_bd_pins rf_data_converter/adc0_23_over_threshold1] + connect_bd_net -net rf_data_converter_adc0_23_over_threshold2 [get_bd_pins ThresholdRegister/In3] [get_bd_pins rf_data_converter/adc0_23_over_threshold2] + connect_bd_net -net rf_data_converter_adc0_nco_update_busy [get_bd_pins rf_data_converter/adc0_nco_update_busy] [get_bd_pins rf_nco_reset_0/cAdc0xNcoUpdateBusy] + connect_bd_net -net rf_data_converter_adc2_01_over_threshold1 [get_bd_pins ThresholdRegister/In5] [get_bd_pins rf_data_converter/adc2_01_over_threshold1] + connect_bd_net -net rf_data_converter_adc2_01_over_threshold2 [get_bd_pins ThresholdRegister/In6] [get_bd_pins rf_data_converter/adc2_01_over_threshold2] + connect_bd_net -net rf_data_converter_adc2_23_over_threshold1 [get_bd_pins ThresholdRegister/In7] [get_bd_pins rf_data_converter/adc2_23_over_threshold1] + connect_bd_net -net rf_data_converter_adc2_23_over_threshold2 [get_bd_pins ThresholdRegister/In8] [get_bd_pins rf_data_converter/adc2_23_over_threshold2] + connect_bd_net -net rf_data_converter_adc2_nco_update_busy [get_bd_pins rf_data_converter/adc2_nco_update_busy] [get_bd_pins rf_nco_reset_0/cAdc2xNcoUpdateBusy] + connect_bd_net -net rf_data_converter_dac0_nco_update_busy [get_bd_pins rf_data_converter/dac0_nco_update_busy] [get_bd_pins rf_nco_reset_0/cDac0xNcoUpdateBusy] + connect_bd_net -net rf_data_converter_dac1_nco_update_busy [get_bd_pins rf_data_converter/dac1_nco_update_busy] [get_bd_pins rf_nco_reset_0/cDac1xNcoUpdateBusy] + connect_bd_net -net rf_data_converter_irq [get_bd_pins rfdc_irq] [get_bd_pins rf_data_converter/irq] + connect_bd_net -net rf_nco_reset_0_cAdc0xNcoUpdateReq [get_bd_pins rf_data_converter/adc0_nco_update_req] [get_bd_pins rf_nco_reset_0/cAdc0xNcoUpdateReq] + connect_bd_net -net rf_nco_reset_0_cAdc2xNcoUpdateReq [get_bd_pins rf_data_converter/adc2_nco_update_req] [get_bd_pins rf_nco_reset_0/cAdc2xNcoUpdateReq] + connect_bd_net -net rf_nco_reset_0_cDac0xNcoUpdateReq [get_bd_pins rf_data_converter/dac0_nco_update_req] [get_bd_pins rf_nco_reset_0/cDac0xNcoUpdateReq] + connect_bd_net -net rf_nco_reset_0_cDac0xSysrefIntGating [get_bd_pins rf_data_converter/dac0_sysref_int_gating] [get_bd_pins rf_nco_reset_0/cDac0xSysrefIntGating] + connect_bd_net -net rf_nco_reset_0_cDac0xSysrefIntReenable [get_bd_pins rf_data_converter/dac0_sysref_int_reenable] [get_bd_pins rf_nco_reset_0/cDac0xSysrefIntReenable] + connect_bd_net -net rf_nco_reset_0_cDac1xNcoUpdateReq [get_bd_pins rf_data_converter/dac1_nco_update_req] [get_bd_pins rf_nco_reset_0/cDac1xNcoUpdateReq] + connect_bd_net -net rf_nco_reset_0_cNcoPhaseRst [get_bd_pins rf_data_converter/adc0_01_nco_phase_rst] [get_bd_pins rf_data_converter/adc0_23_nco_phase_rst] [get_bd_pins rf_data_converter/adc2_01_nco_phase_rst] [get_bd_pins rf_data_converter/adc2_23_nco_phase_rst] [get_bd_pins rf_data_converter/dac00_nco_phase_rst] [get_bd_pins rf_data_converter/dac01_nco_phase_rst] [get_bd_pins rf_data_converter/dac10_nco_phase_rst] [get_bd_pins rf_data_converter/dac11_nco_phase_rst] [get_bd_pins rf_nco_reset_0/cNcoPhaseRst] + connect_bd_net -net rf_nco_reset_0_cNcoUpdateEn [get_bd_pins rf_data_converter/adc0_01_nco_update_en] [get_bd_pins rf_data_converter/adc0_23_nco_update_en] [get_bd_pins rf_data_converter/adc2_01_nco_update_en] [get_bd_pins rf_data_converter/adc2_23_nco_update_en] [get_bd_pins rf_data_converter/dac00_nco_update_en] [get_bd_pins rf_data_converter/dac01_nco_update_en] [get_bd_pins rf_data_converter/dac10_nco_update_en] [get_bd_pins rf_data_converter/dac11_nco_update_en] [get_bd_pins rf_nco_reset_0/cNcoUpdateEn] + connect_bd_net -net rf_nco_reset_0_dNcoResetDone [get_bd_pins nco_reset_done_dclk] [get_bd_pins rf_nco_reset_0/dNcoResetDone] + connect_bd_net -net rf_reset_controller_0_cSoftwareStatus [get_bd_pins reg_rf_reset_control/gpio2_io_i] [get_bd_pins rf_reset_controller_0/cSoftwareStatus] + connect_bd_net -net rf_reset_controller_0_d2DacFirReset_n [get_bd_pins dac_data_in_resetn_dclk2x] [get_bd_pins rf_reset_controller_0/d2DacFirReset_n] + connect_bd_net -net rf_reset_controller_0_dAdcDataOutReset_n [get_bd_pins adc_data_out_resetn_dclk] [get_bd_pins rf_reset_controller_0/dAdcDataOutReset_n] + connect_bd_net -net rf_reset_controller_0_dDacDataInReset_n [get_bd_pins dac_data_in_resetn_dclk] [get_bd_pins rf_reset_controller_0/dDacDataInReset_n] + connect_bd_net -net rf_reset_controller_0_r2AdcFirReset_n [get_bd_pins fir_resetn_rclk2x] [get_bd_pins rf_reset_controller_0/r2AdcFirReset_n] + connect_bd_net -net rf_reset_controller_0_r2DacFirReset_n [get_bd_pins dac_data_in_resetn_rclk2x] [get_bd_pins rf_reset_controller_0/r2DacFirReset_n] + connect_bd_net -net rf_reset_controller_0_rAdcEnableData [get_bd_pins adc_enable_data_rclk] [get_bd_pins rf_reset_controller_0/rAdcEnableData] + connect_bd_net -net rf_reset_controller_0_rAdcGearboxReset_n [get_bd_pins adc_rfdc_axi_resetn_rclk] [get_bd_pins rf_reset_controller_0/rAdcGearboxReset_n] + connect_bd_net -net rf_reset_controller_0_rAdcRfdcAxiReset_n [get_bd_pins rf_data_converter/m0_axis_aresetn] [get_bd_pins rf_data_converter/m2_axis_aresetn] [get_bd_pins rf_reset_controller_0/rAdcRfdcAxiReset_n] + connect_bd_net -net rf_reset_controller_0_rDacGearboxReset_n [get_bd_pins dac_data_in_resetn_rclk] [get_bd_pins rf_reset_controller_0/rDacGearboxReset_n] + connect_bd_net -net rf_reset_controller_0_rDacRfdcAxiReset_n [get_bd_pins rf_data_converter/s0_axis_aresetn] [get_bd_pins rf_data_converter/s1_axis_aresetn] [get_bd_pins rf_reset_controller_0/rDacRfdcAxiReset_n] + connect_bd_net -net rfdc_regs_gpio_io_o [get_bd_pins reg_invert_iq/gpio_io_o] [get_bd_pins slice_15_8/Din] [get_bd_pins slice_7_0/Din] + connect_bd_net -net s_axi_aresetn_0_1 [get_bd_pins s_axi_config_aresetn] [get_bd_pins ThresholdRegister/s_axi_config_aresetn] [get_bd_pins axi_interconnect_rf/ARESETN] [get_bd_pins axi_interconnect_rf/M00_ARESETN] [get_bd_pins axi_interconnect_rf/M03_ARESETN] [get_bd_pins axi_interconnect_rf/M04_ARESETN] [get_bd_pins axi_interconnect_rf/M05_ARESETN] [get_bd_pins axi_interconnect_rf/M06_ARESETN] [get_bd_pins axi_interconnect_rf/M07_ARESETN] [get_bd_pins axi_interconnect_rf/M08_ARESETN] [get_bd_pins axi_interconnect_rf/S00_ARESETN] [get_bd_pins calibration_muxes/s_axi_config_aresetn] [get_bd_pins reg_clock_gate_control/s_axi_aresetn] [get_bd_pins reg_reset_mmcm/s_axi_aresetn] [get_bd_pins reg_rf_axi_status/s_axi_aresetn] [get_bd_pins reg_rf_reset_control/s_axi_aresetn] [get_bd_pins rf_data_converter/s_axi_aresetn] + connect_bd_net -net s_axi_config_clk_1 [get_bd_pins s_axi_config_clk] [get_bd_pins ThresholdRegister/s_axi_config_clk] [get_bd_pins axi_interconnect_rf/ACLK] [get_bd_pins axi_interconnect_rf/M00_ACLK] [get_bd_pins axi_interconnect_rf/M01_ACLK] [get_bd_pins axi_interconnect_rf/M03_ACLK] [get_bd_pins axi_interconnect_rf/M04_ACLK] [get_bd_pins axi_interconnect_rf/M05_ACLK] [get_bd_pins axi_interconnect_rf/M06_ACLK] [get_bd_pins axi_interconnect_rf/M07_ACLK] [get_bd_pins axi_interconnect_rf/M08_ACLK] [get_bd_pins axi_interconnect_rf/S00_ACLK] [get_bd_pins calibration_muxes/s_axi_config_clk] [get_bd_pins clock_gates_0/ReliableClk] [get_bd_pins data_clock_mmcm/s_axi_aclk] [get_bd_pins reg_clock_gate_control/s_axi_aclk] [get_bd_pins reg_reset_mmcm/s_axi_aclk] [get_bd_pins reg_rf_axi_status/s_axi_aclk] [get_bd_pins reg_rf_reset_control/s_axi_aclk] [get_bd_pins rf_data_converter/s_axi_aclk] [get_bd_pins rf_nco_reset_0/ConfigClk] [get_bd_pins rf_reset_controller_0/ConfigClk] + connect_bd_net -net start_nco_reset_rclk_1 [get_bd_pins start_nco_reset_dclk] [get_bd_pins rf_nco_reset_0/dStartNcoReset] + connect_bd_net -net sysref_in_0_2 [get_bd_pins sysref_pl_in] [get_bd_pins capture_sysref/sysref_in] + connect_bd_net -net xlslice_0_Dout [get_bd_pins invert_adc_iq_rclk2] [get_bd_pins slice_7_0/Dout] + connect_bd_net -net xlslice_1_Dout [get_bd_pins invert_dac_iq_rclk2] [get_bd_pins slice_15_8/Dout] + + # Restore current instance + current_bd_instance $oldCurInst +} + +# Hierarchical cell: ps +proc create_hier_cell_ps { parentCell nameHier } { + + variable script_folder + + if { $parentCell eq "" || $nameHier eq "" } { + catch {common::send_msg_id "BD_TCL-102" "ERROR" "create_hier_cell_ps() - Empty argument(s)!"} + return + } + + # Get object for parentCell + set parentObj [get_bd_cells $parentCell] + if { $parentObj == "" } { + catch {common::send_msg_id "BD_TCL-100" "ERROR" "Unable to find parent cell <$parentCell>!"} + return + } + + # Make sure parentObj is hier blk + set parentType [get_property TYPE $parentObj] + if { $parentType ne "hier" } { + catch {common::send_msg_id "BD_TCL-101" "ERROR" "Parent <$parentObj> has TYPE = <$parentType>. Expected to be ."} + return + } + + # Save current instance; Restore later + set oldCurInst [current_bd_instance .] + + # Set parent object as current + current_bd_instance $parentObj + + # Create cell and set as current instance + set hier_obj [create_bd_cell -type hier $nameHier] + current_bd_instance $hier_obj + + # Create interface pins + create_bd_intf_pin -mode Master -vlnv xilinx.com:interface:gpio_rtl:1.0 gpio_0 + + create_bd_intf_pin -mode Master -vlnv xilinx.com:interface:aximm_rtl:1.0 m_axi_app + + create_bd_intf_pin -mode Master -vlnv xilinx.com:interface:aximm_rtl:1.0 m_axi_core + + create_bd_intf_pin -mode Master -vlnv xilinx.com:interface:aximm_rtl:1.0 m_axi_eth_internal + + create_bd_intf_pin -mode Master -vlnv xilinx.com:interface:aximm_rtl:1.0 m_axi_mpm_ep + + create_bd_intf_pin -mode Master -vlnv xilinx.com:interface:aximm_rtl:1.0 m_axi_rf + + create_bd_intf_pin -mode Master -vlnv xilinx.com:interface:aximm_rtl:1.0 m_axi_rpu + + create_bd_intf_pin -mode Master -vlnv xilinx.com:interface:axis_rtl:1.0 m_axis_eth_dma + + create_bd_intf_pin -mode Slave -vlnv xilinx.com:interface:aximm_rtl:1.0 s_axi_hp0 + + create_bd_intf_pin -mode Slave -vlnv xilinx.com:interface:aximm_rtl:1.0 s_axi_hp1 + + create_bd_intf_pin -mode Slave -vlnv xilinx.com:interface:aximm_rtl:1.0 s_axi_hpc0 + + create_bd_intf_pin -mode Slave -vlnv xilinx.com:interface:aximm_rtl:1.0 s_axi_hpc1 + + create_bd_intf_pin -mode Slave -vlnv xilinx.com:interface:axis_rtl:1.0 s_axis_eth_dma + + + # Create pins + create_bd_pin -dir I -type clk bus_clk + create_bd_pin -dir I -type rst bus_rstn + create_bd_pin -dir I -type clk clk40 + create_bd_pin -dir I -type rst clk40_rstn + create_bd_pin -dir I irq0_lpd_rpu_n + create_bd_pin -dir I irq1_lpd_rpu_n + create_bd_pin -dir IO jtag0_tck + create_bd_pin -dir IO jtag0_tdi + create_bd_pin -dir I jtag0_tdo + create_bd_pin -dir IO jtag0_tms + create_bd_pin -dir O -type clk pl_clk40 + create_bd_pin -dir O -type clk pl_clk100 + create_bd_pin -dir O -type clk pl_clk166 + create_bd_pin -dir O -type clk pl_clk200 + create_bd_pin -dir I -from 7 -to 0 -type intr pl_ps_irq0 + create_bd_pin -dir I -from 5 -to 0 pl_ps_irq1_1 + create_bd_pin -dir O -type rst pl_resetn0 + create_bd_pin -dir O -type rst pl_resetn1 + create_bd_pin -dir O -type rst pl_resetn2 + create_bd_pin -dir O -type rst pl_resetn3 + create_bd_pin -dir I -type clk s_axi_hp0_aclk + create_bd_pin -dir I -type clk s_axi_hp1_aclk + create_bd_pin -dir I -type clk s_axi_hpc0_aclk + + # Create instance: axi_interconnect_common + create_hier_cell_axi_interconnect_common $hier_obj axi_interconnect_common + + # Create instance: cpld_jtag_engine, and set properties + set cpld_jtag_engine [ create_bd_cell -type ip -vlnv ettus.com:ip:axi_bitq:1.0 cpld_jtag_engine ] + + set_property -dict [ list \ + CONFIG.FREQ_HZ {40000000} \ + CONFIG.CLK_DOMAIN {x4xx_ps_rfdc_bd_clk40} \ + ] [get_bd_pins /ps/cpld_jtag_engine/S_AXI_ACLK] + + # Create instance: eth_dma_internal + create_hier_cell_eth_dma_internal $hier_obj eth_dma_internal + + # Create instance: hpc1_axi_interconnect, and set properties + set hpc1_axi_interconnect [ create_bd_cell -type ip -vlnv xilinx.com:ip:axi_interconnect:2.1 hpc1_axi_interconnect ] + set_property -dict [ list \ + CONFIG.NUM_MI {1} \ + CONFIG.NUM_SI {2} \ + ] $hpc1_axi_interconnect + + # Create instance: inst_zynq_ps, and set properties + set inst_zynq_ps [ create_bd_cell -type ip -vlnv xilinx.com:ip:zynq_ultra_ps_e:3.3 inst_zynq_ps ] + set_property -dict [ list \ + CONFIG.CAN0_BOARD_INTERFACE {custom} \ + CONFIG.CAN1_BOARD_INTERFACE {custom} \ + CONFIG.CSU_BOARD_INTERFACE {custom} \ + CONFIG.DP_BOARD_INTERFACE {custom} \ + CONFIG.GEM0_BOARD_INTERFACE {custom} \ + CONFIG.GEM1_BOARD_INTERFACE {custom} \ + CONFIG.GEM2_BOARD_INTERFACE {custom} \ + CONFIG.GEM3_BOARD_INTERFACE {custom} \ + CONFIG.GPIO_BOARD_INTERFACE {custom} \ + CONFIG.IIC0_BOARD_INTERFACE {custom} \ + CONFIG.IIC1_BOARD_INTERFACE {custom} \ + CONFIG.NAND_BOARD_INTERFACE {custom} \ + CONFIG.PCIE_BOARD_INTERFACE {custom} \ + CONFIG.PJTAG_BOARD_INTERFACE {custom} \ + CONFIG.PMU_BOARD_INTERFACE {custom} \ + CONFIG.PSU_BANK_0_IO_STANDARD {LVCMOS18} \ + CONFIG.PSU_BANK_1_IO_STANDARD {LVCMOS18} \ + CONFIG.PSU_BANK_2_IO_STANDARD {LVCMOS18} \ + CONFIG.PSU_BANK_3_IO_STANDARD {LVCMOS33} \ + CONFIG.PSU_DDR_RAM_HIGHADDR {0xFFFFFFFF} \ + CONFIG.PSU_DDR_RAM_HIGHADDR_OFFSET {0x800000000} \ + CONFIG.PSU_DDR_RAM_LOWADDR_OFFSET {0x80000000} \ + CONFIG.PSU_DYNAMIC_DDR_CONFIG_EN {0} \ + CONFIG.PSU_IMPORT_BOARD_PRESET {} \ + CONFIG.PSU_MIO_0_DIRECTION {inout} \ + CONFIG.PSU_MIO_0_DRIVE_STRENGTH {12} \ + CONFIG.PSU_MIO_0_INPUT_TYPE {schmitt} \ + CONFIG.PSU_MIO_0_POLARITY {Default} \ + CONFIG.PSU_MIO_0_PULLUPDOWN {pullup} \ + CONFIG.PSU_MIO_0_SLEW {slow} \ + CONFIG.PSU_MIO_10_DIRECTION {inout} \ + CONFIG.PSU_MIO_10_DRIVE_STRENGTH {12} \ + CONFIG.PSU_MIO_10_INPUT_TYPE {schmitt} \ + CONFIG.PSU_MIO_10_POLARITY {Default} \ + CONFIG.PSU_MIO_10_PULLUPDOWN {disable} \ + CONFIG.PSU_MIO_10_SLEW {slow} \ + CONFIG.PSU_MIO_11_DIRECTION {inout} \ + CONFIG.PSU_MIO_11_DRIVE_STRENGTH {12} \ + CONFIG.PSU_MIO_11_INPUT_TYPE {schmitt} \ + CONFIG.PSU_MIO_11_POLARITY {Default} \ + CONFIG.PSU_MIO_11_PULLUPDOWN {disable} \ + CONFIG.PSU_MIO_11_SLEW {slow} \ + CONFIG.PSU_MIO_12_DIRECTION {inout} \ + CONFIG.PSU_MIO_12_DRIVE_STRENGTH {12} \ + CONFIG.PSU_MIO_12_INPUT_TYPE {schmitt} \ + CONFIG.PSU_MIO_12_POLARITY {Default} \ + CONFIG.PSU_MIO_12_PULLUPDOWN {pullup} \ + CONFIG.PSU_MIO_12_SLEW {slow} \ + CONFIG.PSU_MIO_13_DIRECTION {inout} \ + CONFIG.PSU_MIO_13_DRIVE_STRENGTH {12} \ + CONFIG.PSU_MIO_13_INPUT_TYPE {schmitt} \ + CONFIG.PSU_MIO_13_POLARITY {Default} \ + CONFIG.PSU_MIO_13_PULLUPDOWN {pullup} \ + CONFIG.PSU_MIO_13_SLEW {slow} \ + CONFIG.PSU_MIO_14_DIRECTION {inout} \ + CONFIG.PSU_MIO_14_DRIVE_STRENGTH {12} \ + CONFIG.PSU_MIO_14_INPUT_TYPE {schmitt} \ + CONFIG.PSU_MIO_14_POLARITY {Default} \ + CONFIG.PSU_MIO_14_PULLUPDOWN {pullup} \ + CONFIG.PSU_MIO_14_SLEW {slow} \ + CONFIG.PSU_MIO_15_DIRECTION {inout} \ + CONFIG.PSU_MIO_15_DRIVE_STRENGTH {12} \ + CONFIG.PSU_MIO_15_INPUT_TYPE {schmitt} \ + CONFIG.PSU_MIO_15_POLARITY {Default} \ + CONFIG.PSU_MIO_15_PULLUPDOWN {pullup} \ + CONFIG.PSU_MIO_15_SLEW {slow} \ + CONFIG.PSU_MIO_16_DIRECTION {inout} \ + CONFIG.PSU_MIO_16_DRIVE_STRENGTH {12} \ + CONFIG.PSU_MIO_16_INPUT_TYPE {schmitt} \ + CONFIG.PSU_MIO_16_POLARITY {Default} \ + CONFIG.PSU_MIO_16_PULLUPDOWN {pullup} \ + CONFIG.PSU_MIO_16_SLEW {slow} \ + CONFIG.PSU_MIO_17_DIRECTION {inout} \ + CONFIG.PSU_MIO_17_DRIVE_STRENGTH {12} \ + CONFIG.PSU_MIO_17_INPUT_TYPE {schmitt} \ + CONFIG.PSU_MIO_17_POLARITY {Default} \ + CONFIG.PSU_MIO_17_PULLUPDOWN {pullup} \ + CONFIG.PSU_MIO_17_SLEW {slow} \ + CONFIG.PSU_MIO_18_DIRECTION {inout} \ + CONFIG.PSU_MIO_18_DRIVE_STRENGTH {12} \ + CONFIG.PSU_MIO_18_INPUT_TYPE {schmitt} \ + CONFIG.PSU_MIO_18_POLARITY {Default} \ + CONFIG.PSU_MIO_18_PULLUPDOWN {pullup} \ + CONFIG.PSU_MIO_18_SLEW {slow} \ + CONFIG.PSU_MIO_19_DIRECTION {inout} \ + CONFIG.PSU_MIO_19_DRIVE_STRENGTH {12} \ + CONFIG.PSU_MIO_19_INPUT_TYPE {schmitt} \ + CONFIG.PSU_MIO_19_POLARITY {Default} \ + CONFIG.PSU_MIO_19_PULLUPDOWN {pullup} \ + CONFIG.PSU_MIO_19_SLEW {slow} \ + CONFIG.PSU_MIO_1_DIRECTION {inout} \ + CONFIG.PSU_MIO_1_DRIVE_STRENGTH {12} \ + CONFIG.PSU_MIO_1_INPUT_TYPE {schmitt} \ + CONFIG.PSU_MIO_1_POLARITY {Default} \ + CONFIG.PSU_MIO_1_PULLUPDOWN {pullup} \ + CONFIG.PSU_MIO_1_SLEW {slow} \ + CONFIG.PSU_MIO_20_DIRECTION {inout} \ + CONFIG.PSU_MIO_20_DRIVE_STRENGTH {12} \ + CONFIG.PSU_MIO_20_INPUT_TYPE {schmitt} \ + CONFIG.PSU_MIO_20_POLARITY {Default} \ + CONFIG.PSU_MIO_20_PULLUPDOWN {pullup} \ + CONFIG.PSU_MIO_20_SLEW {slow} \ + CONFIG.PSU_MIO_21_DIRECTION {inout} \ + CONFIG.PSU_MIO_21_DRIVE_STRENGTH {12} \ + CONFIG.PSU_MIO_21_INPUT_TYPE {schmitt} \ + CONFIG.PSU_MIO_21_POLARITY {Default} \ + CONFIG.PSU_MIO_21_PULLUPDOWN {pullup} \ + CONFIG.PSU_MIO_21_SLEW {slow} \ + CONFIG.PSU_MIO_22_DIRECTION {out} \ + CONFIG.PSU_MIO_22_DRIVE_STRENGTH {12} \ + CONFIG.PSU_MIO_22_INPUT_TYPE {cmos} \ + CONFIG.PSU_MIO_22_POLARITY {Default} \ + CONFIG.PSU_MIO_22_PULLUPDOWN {pullup} \ + CONFIG.PSU_MIO_22_SLEW {slow} \ + CONFIG.PSU_MIO_23_DIRECTION {out} \ + CONFIG.PSU_MIO_23_DRIVE_STRENGTH {12} \ + CONFIG.PSU_MIO_23_INPUT_TYPE {cmos} \ + CONFIG.PSU_MIO_23_POLARITY {Default} \ + CONFIG.PSU_MIO_23_PULLUPDOWN {pullup} \ + CONFIG.PSU_MIO_23_SLEW {slow} \ + CONFIG.PSU_MIO_24_DIRECTION {inout} \ + CONFIG.PSU_MIO_24_DRIVE_STRENGTH {12} \ + CONFIG.PSU_MIO_24_INPUT_TYPE {schmitt} \ + CONFIG.PSU_MIO_24_POLARITY {Default} \ + CONFIG.PSU_MIO_24_PULLUPDOWN {pullup} \ + CONFIG.PSU_MIO_24_SLEW {slow} \ + CONFIG.PSU_MIO_25_DIRECTION {inout} \ + CONFIG.PSU_MIO_25_DRIVE_STRENGTH {12} \ + CONFIG.PSU_MIO_25_INPUT_TYPE {schmitt} \ + CONFIG.PSU_MIO_25_POLARITY {Default} \ + CONFIG.PSU_MIO_25_PULLUPDOWN {pullup} \ + CONFIG.PSU_MIO_25_SLEW {slow} \ + CONFIG.PSU_MIO_26_DIRECTION {inout} \ + CONFIG.PSU_MIO_26_DRIVE_STRENGTH {12} \ + CONFIG.PSU_MIO_26_INPUT_TYPE {schmitt} \ + CONFIG.PSU_MIO_26_POLARITY {Default} \ + CONFIG.PSU_MIO_26_PULLUPDOWN {pullup} \ + CONFIG.PSU_MIO_26_SLEW {slow} \ + CONFIG.PSU_MIO_27_DIRECTION {inout} \ + CONFIG.PSU_MIO_27_DRIVE_STRENGTH {12} \ + CONFIG.PSU_MIO_27_INPUT_TYPE {schmitt} \ + CONFIG.PSU_MIO_27_POLARITY {Default} \ + CONFIG.PSU_MIO_27_PULLUPDOWN {pullup} \ + CONFIG.PSU_MIO_27_SLEW {slow} \ + CONFIG.PSU_MIO_28_DIRECTION {inout} \ + CONFIG.PSU_MIO_28_DRIVE_STRENGTH {12} \ + CONFIG.PSU_MIO_28_INPUT_TYPE {schmitt} \ + CONFIG.PSU_MIO_28_POLARITY {Default} \ + CONFIG.PSU_MIO_28_PULLUPDOWN {pullup} \ + CONFIG.PSU_MIO_28_SLEW {slow} \ + CONFIG.PSU_MIO_29_DIRECTION {inout} \ + CONFIG.PSU_MIO_29_DRIVE_STRENGTH {12} \ + CONFIG.PSU_MIO_29_INPUT_TYPE {schmitt} \ + CONFIG.PSU_MIO_29_POLARITY {Default} \ + CONFIG.PSU_MIO_29_PULLUPDOWN {pullup} \ + CONFIG.PSU_MIO_29_SLEW {slow} \ + CONFIG.PSU_MIO_2_DIRECTION {inout} \ + CONFIG.PSU_MIO_2_DRIVE_STRENGTH {12} \ + CONFIG.PSU_MIO_2_INPUT_TYPE {schmitt} \ + CONFIG.PSU_MIO_2_POLARITY {Default} \ + CONFIG.PSU_MIO_2_PULLUPDOWN {pullup} \ + CONFIG.PSU_MIO_2_SLEW {slow} \ + CONFIG.PSU_MIO_30_DIRECTION {in} \ + CONFIG.PSU_MIO_30_DRIVE_STRENGTH {12} \ + CONFIG.PSU_MIO_30_INPUT_TYPE {schmitt} \ + CONFIG.PSU_MIO_30_POLARITY {Default} \ + CONFIG.PSU_MIO_30_PULLUPDOWN {pullup} \ + CONFIG.PSU_MIO_30_SLEW {fast} \ + CONFIG.PSU_MIO_31_DIRECTION {out} \ + CONFIG.PSU_MIO_31_DRIVE_STRENGTH {12} \ + CONFIG.PSU_MIO_31_INPUT_TYPE {cmos} \ + CONFIG.PSU_MIO_31_POLARITY {Default} \ + CONFIG.PSU_MIO_31_PULLUPDOWN {pullup} \ + CONFIG.PSU_MIO_31_SLEW {slow} \ + CONFIG.PSU_MIO_32_DIRECTION {out} \ + CONFIG.PSU_MIO_32_DRIVE_STRENGTH {12} \ + CONFIG.PSU_MIO_32_INPUT_TYPE {cmos} \ + CONFIG.PSU_MIO_32_POLARITY {Default} \ + CONFIG.PSU_MIO_32_PULLUPDOWN {pullup} \ + CONFIG.PSU_MIO_32_SLEW {slow} \ + CONFIG.PSU_MIO_33_DIRECTION {in} \ + CONFIG.PSU_MIO_33_DRIVE_STRENGTH {12} \ + CONFIG.PSU_MIO_33_INPUT_TYPE {schmitt} \ + CONFIG.PSU_MIO_33_POLARITY {Default} \ + CONFIG.PSU_MIO_33_PULLUPDOWN {pullup} \ + CONFIG.PSU_MIO_33_SLEW {fast} \ + CONFIG.PSU_MIO_34_DIRECTION {out} \ + CONFIG.PSU_MIO_34_DRIVE_STRENGTH {12} \ + CONFIG.PSU_MIO_34_INPUT_TYPE {cmos} \ + CONFIG.PSU_MIO_34_POLARITY {Default} \ + CONFIG.PSU_MIO_34_PULLUPDOWN {pullup} \ + CONFIG.PSU_MIO_34_SLEW {fast} \ + CONFIG.PSU_MIO_35_DIRECTION {out} \ + CONFIG.PSU_MIO_35_DRIVE_STRENGTH {12} \ + CONFIG.PSU_MIO_35_INPUT_TYPE {cmos} \ + CONFIG.PSU_MIO_35_POLARITY {Default} \ + CONFIG.PSU_MIO_35_PULLUPDOWN {pullup} \ + CONFIG.PSU_MIO_35_SLEW {slow} \ + CONFIG.PSU_MIO_36_DIRECTION {inout} \ + CONFIG.PSU_MIO_36_DRIVE_STRENGTH {12} \ + CONFIG.PSU_MIO_36_INPUT_TYPE {schmitt} \ + CONFIG.PSU_MIO_36_POLARITY {Default} \ + CONFIG.PSU_MIO_36_PULLUPDOWN {pullup} \ + CONFIG.PSU_MIO_36_SLEW {slow} \ + CONFIG.PSU_MIO_37_DIRECTION {inout} \ + CONFIG.PSU_MIO_37_DRIVE_STRENGTH {12} \ + CONFIG.PSU_MIO_37_INPUT_TYPE {schmitt} \ + CONFIG.PSU_MIO_37_POLARITY {Default} \ + CONFIG.PSU_MIO_37_PULLUPDOWN {pullup} \ + CONFIG.PSU_MIO_37_SLEW {slow} \ + CONFIG.PSU_MIO_38_DIRECTION {inout} \ + CONFIG.PSU_MIO_38_DRIVE_STRENGTH {12} \ + CONFIG.PSU_MIO_38_INPUT_TYPE {schmitt} \ + CONFIG.PSU_MIO_38_POLARITY {Default} \ + CONFIG.PSU_MIO_38_PULLUPDOWN {pullup} \ + CONFIG.PSU_MIO_38_SLEW {slow} \ + CONFIG.PSU_MIO_39_DIRECTION {inout} \ + CONFIG.PSU_MIO_39_DRIVE_STRENGTH {12} \ + CONFIG.PSU_MIO_39_INPUT_TYPE {schmitt} \ + CONFIG.PSU_MIO_39_POLARITY {Default} \ + CONFIG.PSU_MIO_39_PULLUPDOWN {pullup} \ + CONFIG.PSU_MIO_39_SLEW {slow} \ + CONFIG.PSU_MIO_3_DIRECTION {inout} \ + CONFIG.PSU_MIO_3_DRIVE_STRENGTH {12} \ + CONFIG.PSU_MIO_3_INPUT_TYPE {schmitt} \ + CONFIG.PSU_MIO_3_POLARITY {Default} \ + CONFIG.PSU_MIO_3_PULLUPDOWN {pullup} \ + CONFIG.PSU_MIO_3_SLEW {slow} \ + CONFIG.PSU_MIO_40_DIRECTION {inout} \ + CONFIG.PSU_MIO_40_DRIVE_STRENGTH {12} \ + CONFIG.PSU_MIO_40_INPUT_TYPE {schmitt} \ + CONFIG.PSU_MIO_40_POLARITY {Default} \ + CONFIG.PSU_MIO_40_PULLUPDOWN {pullup} \ + CONFIG.PSU_MIO_40_SLEW {slow} \ + CONFIG.PSU_MIO_41_DIRECTION {inout} \ + CONFIG.PSU_MIO_41_DRIVE_STRENGTH {12} \ + CONFIG.PSU_MIO_41_INPUT_TYPE {schmitt} \ + CONFIG.PSU_MIO_41_POLARITY {Default} \ + CONFIG.PSU_MIO_41_PULLUPDOWN {pullup} \ + CONFIG.PSU_MIO_41_SLEW {slow} \ + CONFIG.PSU_MIO_42_DIRECTION {inout} \ + CONFIG.PSU_MIO_42_DRIVE_STRENGTH {12} \ + CONFIG.PSU_MIO_42_INPUT_TYPE {schmitt} \ + CONFIG.PSU_MIO_42_POLARITY {Default} \ + CONFIG.PSU_MIO_42_PULLUPDOWN {pullup} \ + CONFIG.PSU_MIO_42_SLEW {slow} \ + CONFIG.PSU_MIO_43_DIRECTION {inout} \ + CONFIG.PSU_MIO_43_DRIVE_STRENGTH {12} \ + CONFIG.PSU_MIO_43_INPUT_TYPE {schmitt} \ + CONFIG.PSU_MIO_43_POLARITY {Default} \ + CONFIG.PSU_MIO_43_PULLUPDOWN {pullup} \ + CONFIG.PSU_MIO_43_SLEW {slow} \ + CONFIG.PSU_MIO_44_DIRECTION {inout} \ + CONFIG.PSU_MIO_44_DRIVE_STRENGTH {12} \ + CONFIG.PSU_MIO_44_INPUT_TYPE {schmitt} \ + CONFIG.PSU_MIO_44_POLARITY {Default} \ + CONFIG.PSU_MIO_44_PULLUPDOWN {pulldown} \ + CONFIG.PSU_MIO_44_SLEW {slow} \ + CONFIG.PSU_MIO_45_DIRECTION {in} \ + CONFIG.PSU_MIO_45_DRIVE_STRENGTH {12} \ + CONFIG.PSU_MIO_45_INPUT_TYPE {schmitt} \ + CONFIG.PSU_MIO_45_POLARITY {Default} \ + CONFIG.PSU_MIO_45_PULLUPDOWN {pullup} \ + CONFIG.PSU_MIO_45_SLEW {fast} \ + CONFIG.PSU_MIO_46_DIRECTION {inout} \ + CONFIG.PSU_MIO_46_DRIVE_STRENGTH {12} \ + CONFIG.PSU_MIO_46_INPUT_TYPE {schmitt} \ + CONFIG.PSU_MIO_46_POLARITY {Default} \ + CONFIG.PSU_MIO_46_PULLUPDOWN {pullup} \ + CONFIG.PSU_MIO_46_SLEW {slow} \ + CONFIG.PSU_MIO_47_DIRECTION {inout} \ + CONFIG.PSU_MIO_47_DRIVE_STRENGTH {12} \ + CONFIG.PSU_MIO_47_INPUT_TYPE {schmitt} \ + CONFIG.PSU_MIO_47_POLARITY {Default} \ + CONFIG.PSU_MIO_47_PULLUPDOWN {pullup} \ + CONFIG.PSU_MIO_47_SLEW {slow} \ + CONFIG.PSU_MIO_48_DIRECTION {inout} \ + CONFIG.PSU_MIO_48_DRIVE_STRENGTH {12} \ + CONFIG.PSU_MIO_48_INPUT_TYPE {schmitt} \ + CONFIG.PSU_MIO_48_POLARITY {Default} \ + CONFIG.PSU_MIO_48_PULLUPDOWN {pullup} \ + CONFIG.PSU_MIO_48_SLEW {slow} \ + CONFIG.PSU_MIO_49_DIRECTION {inout} \ + CONFIG.PSU_MIO_49_DRIVE_STRENGTH {12} \ + CONFIG.PSU_MIO_49_INPUT_TYPE {schmitt} \ + CONFIG.PSU_MIO_49_POLARITY {Default} \ + CONFIG.PSU_MIO_49_PULLUPDOWN {pullup} \ + CONFIG.PSU_MIO_49_SLEW {slow} \ + CONFIG.PSU_MIO_4_DIRECTION {inout} \ + CONFIG.PSU_MIO_4_DRIVE_STRENGTH {12} \ + CONFIG.PSU_MIO_4_INPUT_TYPE {schmitt} \ + CONFIG.PSU_MIO_4_POLARITY {Default} \ + CONFIG.PSU_MIO_4_PULLUPDOWN {pullup} \ + CONFIG.PSU_MIO_4_SLEW {slow} \ + CONFIG.PSU_MIO_50_DIRECTION {inout} \ + CONFIG.PSU_MIO_50_DRIVE_STRENGTH {12} \ + CONFIG.PSU_MIO_50_INPUT_TYPE {schmitt} \ + CONFIG.PSU_MIO_50_POLARITY {Default} \ + CONFIG.PSU_MIO_50_PULLUPDOWN {pullup} \ + CONFIG.PSU_MIO_50_SLEW {slow} \ + CONFIG.PSU_MIO_51_DIRECTION {out} \ + CONFIG.PSU_MIO_51_DRIVE_STRENGTH {12} \ + CONFIG.PSU_MIO_51_INPUT_TYPE {cmos} \ + CONFIG.PSU_MIO_51_POLARITY {Default} \ + CONFIG.PSU_MIO_51_PULLUPDOWN {pullup} \ + CONFIG.PSU_MIO_51_SLEW {slow} \ + CONFIG.PSU_MIO_52_DIRECTION {in} \ + CONFIG.PSU_MIO_52_DRIVE_STRENGTH {12} \ + CONFIG.PSU_MIO_52_INPUT_TYPE {schmitt} \ + CONFIG.PSU_MIO_52_POLARITY {Default} \ + CONFIG.PSU_MIO_52_PULLUPDOWN {pullup} \ + CONFIG.PSU_MIO_52_SLEW {fast} \ + CONFIG.PSU_MIO_53_DIRECTION {in} \ + CONFIG.PSU_MIO_53_DRIVE_STRENGTH {12} \ + CONFIG.PSU_MIO_53_INPUT_TYPE {schmitt} \ + CONFIG.PSU_MIO_53_POLARITY {Default} \ + CONFIG.PSU_MIO_53_PULLUPDOWN {pullup} \ + CONFIG.PSU_MIO_53_SLEW {fast} \ + CONFIG.PSU_MIO_54_DIRECTION {inout} \ + CONFIG.PSU_MIO_54_DRIVE_STRENGTH {12} \ + CONFIG.PSU_MIO_54_INPUT_TYPE {schmitt} \ + CONFIG.PSU_MIO_54_POLARITY {Default} \ + CONFIG.PSU_MIO_54_PULLUPDOWN {pullup} \ + CONFIG.PSU_MIO_54_SLEW {slow} \ + CONFIG.PSU_MIO_55_DIRECTION {in} \ + CONFIG.PSU_MIO_55_DRIVE_STRENGTH {12} \ + CONFIG.PSU_MIO_55_INPUT_TYPE {schmitt} \ + CONFIG.PSU_MIO_55_POLARITY {Default} \ + CONFIG.PSU_MIO_55_PULLUPDOWN {pullup} \ + CONFIG.PSU_MIO_55_SLEW {fast} \ + CONFIG.PSU_MIO_56_DIRECTION {inout} \ + CONFIG.PSU_MIO_56_DRIVE_STRENGTH {12} \ + CONFIG.PSU_MIO_56_INPUT_TYPE {schmitt} \ + CONFIG.PSU_MIO_56_POLARITY {Default} \ + CONFIG.PSU_MIO_56_PULLUPDOWN {pullup} \ + CONFIG.PSU_MIO_56_SLEW {slow} \ + CONFIG.PSU_MIO_57_DIRECTION {inout} \ + CONFIG.PSU_MIO_57_DRIVE_STRENGTH {12} \ + CONFIG.PSU_MIO_57_INPUT_TYPE {schmitt} \ + CONFIG.PSU_MIO_57_POLARITY {Default} \ + CONFIG.PSU_MIO_57_PULLUPDOWN {pullup} \ + CONFIG.PSU_MIO_57_SLEW {slow} \ + CONFIG.PSU_MIO_58_DIRECTION {out} \ + CONFIG.PSU_MIO_58_DRIVE_STRENGTH {12} \ + CONFIG.PSU_MIO_58_INPUT_TYPE {cmos} \ + CONFIG.PSU_MIO_58_POLARITY {Default} \ + CONFIG.PSU_MIO_58_PULLUPDOWN {pullup} \ + CONFIG.PSU_MIO_58_SLEW {slow} \ + CONFIG.PSU_MIO_59_DIRECTION {inout} \ + CONFIG.PSU_MIO_59_DRIVE_STRENGTH {12} \ + CONFIG.PSU_MIO_59_INPUT_TYPE {schmitt} \ + CONFIG.PSU_MIO_59_POLARITY {Default} \ + CONFIG.PSU_MIO_59_PULLUPDOWN {pullup} \ + CONFIG.PSU_MIO_59_SLEW {slow} \ + CONFIG.PSU_MIO_5_DIRECTION {inout} \ + CONFIG.PSU_MIO_5_DRIVE_STRENGTH {12} \ + CONFIG.PSU_MIO_5_INPUT_TYPE {schmitt} \ + CONFIG.PSU_MIO_5_POLARITY {Default} \ + CONFIG.PSU_MIO_5_PULLUPDOWN {pullup} \ + CONFIG.PSU_MIO_5_SLEW {slow} \ + CONFIG.PSU_MIO_60_DIRECTION {inout} \ + CONFIG.PSU_MIO_60_DRIVE_STRENGTH {12} \ + CONFIG.PSU_MIO_60_INPUT_TYPE {schmitt} \ + CONFIG.PSU_MIO_60_POLARITY {Default} \ + CONFIG.PSU_MIO_60_PULLUPDOWN {pullup} \ + CONFIG.PSU_MIO_60_SLEW {slow} \ + CONFIG.PSU_MIO_61_DIRECTION {inout} \ + CONFIG.PSU_MIO_61_DRIVE_STRENGTH {12} \ + CONFIG.PSU_MIO_61_INPUT_TYPE {schmitt} \ + CONFIG.PSU_MIO_61_POLARITY {Default} \ + CONFIG.PSU_MIO_61_PULLUPDOWN {pullup} \ + CONFIG.PSU_MIO_61_SLEW {slow} \ + CONFIG.PSU_MIO_62_DIRECTION {inout} \ + CONFIG.PSU_MIO_62_DRIVE_STRENGTH {12} \ + CONFIG.PSU_MIO_62_INPUT_TYPE {schmitt} \ + CONFIG.PSU_MIO_62_POLARITY {Default} \ + CONFIG.PSU_MIO_62_PULLUPDOWN {pullup} \ + CONFIG.PSU_MIO_62_SLEW {slow} \ + CONFIG.PSU_MIO_63_DIRECTION {inout} \ + CONFIG.PSU_MIO_63_DRIVE_STRENGTH {12} \ + CONFIG.PSU_MIO_63_INPUT_TYPE {schmitt} \ + CONFIG.PSU_MIO_63_POLARITY {Default} \ + CONFIG.PSU_MIO_63_PULLUPDOWN {pullup} \ + CONFIG.PSU_MIO_63_SLEW {slow} \ + CONFIG.PSU_MIO_64_DIRECTION {out} \ + CONFIG.PSU_MIO_64_DRIVE_STRENGTH {12} \ + CONFIG.PSU_MIO_64_INPUT_TYPE {cmos} \ + CONFIG.PSU_MIO_64_POLARITY {Default} \ + CONFIG.PSU_MIO_64_PULLUPDOWN {pullup} \ + CONFIG.PSU_MIO_64_SLEW {slow} \ + CONFIG.PSU_MIO_65_DIRECTION {out} \ + CONFIG.PSU_MIO_65_DRIVE_STRENGTH {12} \ + CONFIG.PSU_MIO_65_INPUT_TYPE {cmos} \ + CONFIG.PSU_MIO_65_POLARITY {Default} \ + CONFIG.PSU_MIO_65_PULLUPDOWN {pullup} \ + CONFIG.PSU_MIO_65_SLEW {slow} \ + CONFIG.PSU_MIO_66_DIRECTION {out} \ + CONFIG.PSU_MIO_66_DRIVE_STRENGTH {12} \ + CONFIG.PSU_MIO_66_INPUT_TYPE {cmos} \ + CONFIG.PSU_MIO_66_POLARITY {Default} \ + CONFIG.PSU_MIO_66_PULLUPDOWN {pullup} \ + CONFIG.PSU_MIO_66_SLEW {slow} \ + CONFIG.PSU_MIO_67_DIRECTION {out} \ + CONFIG.PSU_MIO_67_DRIVE_STRENGTH {12} \ + CONFIG.PSU_MIO_67_INPUT_TYPE {cmos} \ + CONFIG.PSU_MIO_67_POLARITY {Default} \ + CONFIG.PSU_MIO_67_PULLUPDOWN {pullup} \ + CONFIG.PSU_MIO_67_SLEW {slow} \ + CONFIG.PSU_MIO_68_DIRECTION {out} \ + CONFIG.PSU_MIO_68_DRIVE_STRENGTH {12} \ + CONFIG.PSU_MIO_68_INPUT_TYPE {cmos} \ + CONFIG.PSU_MIO_68_POLARITY {Default} \ + CONFIG.PSU_MIO_68_PULLUPDOWN {pullup} \ + CONFIG.PSU_MIO_68_SLEW {slow} \ + CONFIG.PSU_MIO_69_DIRECTION {out} \ + CONFIG.PSU_MIO_69_DRIVE_STRENGTH {12} \ + CONFIG.PSU_MIO_69_INPUT_TYPE {cmos} \ + CONFIG.PSU_MIO_69_POLARITY {Default} \ + CONFIG.PSU_MIO_69_PULLUPDOWN {pullup} \ + CONFIG.PSU_MIO_69_SLEW {slow} \ + CONFIG.PSU_MIO_6_DIRECTION {inout} \ + CONFIG.PSU_MIO_6_DRIVE_STRENGTH {12} \ + CONFIG.PSU_MIO_6_INPUT_TYPE {schmitt} \ + CONFIG.PSU_MIO_6_POLARITY {Default} \ + CONFIG.PSU_MIO_6_PULLUPDOWN {pulldown} \ + CONFIG.PSU_MIO_6_SLEW {slow} \ + CONFIG.PSU_MIO_70_DIRECTION {in} \ + CONFIG.PSU_MIO_70_DRIVE_STRENGTH {12} \ + CONFIG.PSU_MIO_70_INPUT_TYPE {schmitt} \ + CONFIG.PSU_MIO_70_POLARITY {Default} \ + CONFIG.PSU_MIO_70_PULLUPDOWN {pullup} \ + CONFIG.PSU_MIO_70_SLEW {fast} \ + CONFIG.PSU_MIO_71_DIRECTION {in} \ + CONFIG.PSU_MIO_71_DRIVE_STRENGTH {12} \ + CONFIG.PSU_MIO_71_INPUT_TYPE {schmitt} \ + CONFIG.PSU_MIO_71_POLARITY {Default} \ + CONFIG.PSU_MIO_71_PULLUPDOWN {pullup} \ + CONFIG.PSU_MIO_71_SLEW {fast} \ + CONFIG.PSU_MIO_72_DIRECTION {in} \ + CONFIG.PSU_MIO_72_DRIVE_STRENGTH {12} \ + CONFIG.PSU_MIO_72_INPUT_TYPE {schmitt} \ + CONFIG.PSU_MIO_72_POLARITY {Default} \ + CONFIG.PSU_MIO_72_PULLUPDOWN {pullup} \ + CONFIG.PSU_MIO_72_SLEW {fast} \ + CONFIG.PSU_MIO_73_DIRECTION {in} \ + CONFIG.PSU_MIO_73_DRIVE_STRENGTH {12} \ + CONFIG.PSU_MIO_73_INPUT_TYPE {schmitt} \ + CONFIG.PSU_MIO_73_POLARITY {Default} \ + CONFIG.PSU_MIO_73_PULLUPDOWN {pullup} \ + CONFIG.PSU_MIO_73_SLEW {fast} \ + CONFIG.PSU_MIO_74_DIRECTION {in} \ + CONFIG.PSU_MIO_74_DRIVE_STRENGTH {12} \ + CONFIG.PSU_MIO_74_INPUT_TYPE {schmitt} \ + CONFIG.PSU_MIO_74_POLARITY {Default} \ + CONFIG.PSU_MIO_74_PULLUPDOWN {pullup} \ + CONFIG.PSU_MIO_74_SLEW {fast} \ + CONFIG.PSU_MIO_75_DIRECTION {in} \ + CONFIG.PSU_MIO_75_DRIVE_STRENGTH {12} \ + CONFIG.PSU_MIO_75_INPUT_TYPE {schmitt} \ + CONFIG.PSU_MIO_75_POLARITY {Default} \ + CONFIG.PSU_MIO_75_PULLUPDOWN {pullup} \ + CONFIG.PSU_MIO_75_SLEW {fast} \ + CONFIG.PSU_MIO_76_DIRECTION {out} \ + CONFIG.PSU_MIO_76_DRIVE_STRENGTH {12} \ + CONFIG.PSU_MIO_76_INPUT_TYPE {cmos} \ + CONFIG.PSU_MIO_76_POLARITY {Default} \ + CONFIG.PSU_MIO_76_PULLUPDOWN {pullup} \ + CONFIG.PSU_MIO_76_SLEW {slow} \ + CONFIG.PSU_MIO_77_DIRECTION {inout} \ + CONFIG.PSU_MIO_77_DRIVE_STRENGTH {12} \ + CONFIG.PSU_MIO_77_INPUT_TYPE {schmitt} \ + CONFIG.PSU_MIO_77_POLARITY {Default} \ + CONFIG.PSU_MIO_77_PULLUPDOWN {pullup} \ + CONFIG.PSU_MIO_77_SLEW {slow} \ + CONFIG.PSU_MIO_7_DIRECTION {out} \ + CONFIG.PSU_MIO_7_DRIVE_STRENGTH {12} \ + CONFIG.PSU_MIO_7_INPUT_TYPE {cmos} \ + CONFIG.PSU_MIO_7_POLARITY {Default} \ + CONFIG.PSU_MIO_7_PULLUPDOWN {pullup} \ + CONFIG.PSU_MIO_7_SLEW {slow} \ + CONFIG.PSU_MIO_8_DIRECTION {out} \ + CONFIG.PSU_MIO_8_DRIVE_STRENGTH {12} \ + CONFIG.PSU_MIO_8_INPUT_TYPE {cmos} \ + CONFIG.PSU_MIO_8_POLARITY {Default} \ + CONFIG.PSU_MIO_8_PULLUPDOWN {pullup} \ + CONFIG.PSU_MIO_8_SLEW {slow} \ + CONFIG.PSU_MIO_9_DIRECTION {inout} \ + CONFIG.PSU_MIO_9_DRIVE_STRENGTH {12} \ + CONFIG.PSU_MIO_9_INPUT_TYPE {schmitt} \ + CONFIG.PSU_MIO_9_POLARITY {Default} \ + CONFIG.PSU_MIO_9_PULLUPDOWN {pullup} \ + CONFIG.PSU_MIO_9_SLEW {slow} \ + CONFIG.PSU_MIO_TREE_PERIPHERALS {GPIO0 MIO#GPIO0 MIO#I2C 0#I2C 0#GPIO0 MIO#GPIO0 MIO#SPI 1#SPI 1#SPI 1#SPI 1#SPI 1#SPI 1#GPIO0 MIO#SD 0#SD 0#SD 0#SD 0#SD 0#SD 0#SD 0#SD 0#SD 0#SD 0#SD 0#GPIO0 MIO#GPIO0 MIO#GPIO1 MIO#GPIO1 MIO#GPIO1 MIO#GPIO1 MIO#UART 0#UART 0#UART 1#UART 1#PMU GPO 2#PMU GPO 3#I2C 1#I2C 1#GPIO1 MIO#SD 1#SD 1#SD 1#SD 1#GPIO1 MIO#GPIO1 MIO#SD 1#SD 1#SD 1#SD 1#SD 1#SD 1#SD 1#USB 0#USB 0#USB 0#USB 0#USB 0#USB 0#USB 0#USB 0#USB 0#USB 0#USB 0#USB 0#Gem 3#Gem 3#Gem 3#Gem 3#Gem 3#Gem 3#Gem 3#Gem 3#Gem 3#Gem 3#Gem 3#Gem 3#MDIO 3#MDIO 3} \ + CONFIG.PSU_MIO_TREE_SIGNALS {gpio0[0]#gpio0[1]#scl_out#sda_out#gpio0[4]#gpio0[5]#sclk_out#n_ss_out[2]#n_ss_out[1]#n_ss_out[0]#miso#mosi#gpio0[12]#sdio0_data_out[0]#sdio0_data_out[1]#sdio0_data_out[2]#sdio0_data_out[3]#sdio0_data_out[4]#sdio0_data_out[5]#sdio0_data_out[6]#sdio0_data_out[7]#sdio0_cmd_out#sdio0_clk_out#sdio0_bus_pow#gpio0[24]#gpio0[25]#gpio1[26]#gpio1[27]#gpio1[28]#gpio1[29]#rxd#txd#txd#rxd#gpo[2]#gpo[3]#scl_out#sda_out#gpio1[38]#sdio1_data_out[4]#sdio1_data_out[5]#sdio1_data_out[6]#sdio1_data_out[7]#gpio1[43]#gpio1[44]#sdio1_cd_n#sdio1_data_out[0]#sdio1_data_out[1]#sdio1_data_out[2]#sdio1_data_out[3]#sdio1_cmd_out#sdio1_clk_out#ulpi_clk_in#ulpi_dir#ulpi_tx_data[2]#ulpi_nxt#ulpi_tx_data[0]#ulpi_tx_data[1]#ulpi_stp#ulpi_tx_data[3]#ulpi_tx_data[4]#ulpi_tx_data[5]#ulpi_tx_data[6]#ulpi_tx_data[7]#rgmii_tx_clk#rgmii_txd[0]#rgmii_txd[1]#rgmii_txd[2]#rgmii_txd[3]#rgmii_tx_ctl#rgmii_rx_clk#rgmii_rxd[0]#rgmii_rxd[1]#rgmii_rxd[2]#rgmii_rxd[3]#rgmii_rx_ctl#gem3_mdc#gem3_mdio_out} \ + CONFIG.PSU_PERIPHERAL_BOARD_PRESET {} \ + CONFIG.PSU_SD0_INTERNAL_BUS_WIDTH {8} \ + CONFIG.PSU_SD1_INTERNAL_BUS_WIDTH {8} \ + CONFIG.PSU_SMC_CYCLE_T0 {NA} \ + CONFIG.PSU_SMC_CYCLE_T1 {NA} \ + CONFIG.PSU_SMC_CYCLE_T2 {NA} \ + CONFIG.PSU_SMC_CYCLE_T3 {NA} \ + CONFIG.PSU_SMC_CYCLE_T4 {NA} \ + CONFIG.PSU_SMC_CYCLE_T5 {NA} \ + CONFIG.PSU_SMC_CYCLE_T6 {NA} \ + CONFIG.PSU_USB3__DUAL_CLOCK_ENABLE {1} \ + CONFIG.PSU_VALUE_SILVERSION {3} \ + CONFIG.PSU__ACPU0__POWER__ON {1} \ + CONFIG.PSU__ACPU1__POWER__ON {1} \ + CONFIG.PSU__ACPU2__POWER__ON {1} \ + CONFIG.PSU__ACPU3__POWER__ON {1} \ + CONFIG.PSU__ACTUAL__IP {1} \ + CONFIG.PSU__ACT_DDR_FREQ_MHZ {1199.988037} \ + CONFIG.PSU__AFI0_COHERENCY {0} \ + CONFIG.PSU__AFI1_COHERENCY {0} \ + CONFIG.PSU__AUX_REF_CLK__FREQMHZ {33.333} \ + CONFIG.PSU__CAN0_LOOP_CAN1__ENABLE {0} \ + CONFIG.PSU__CAN0__GRP_CLK__ENABLE {0} \ + CONFIG.PSU__CAN0__PERIPHERAL__ENABLE {0} \ + CONFIG.PSU__CAN1__GRP_CLK__ENABLE {0} \ + CONFIG.PSU__CAN1__PERIPHERAL__ENABLE {0} \ + CONFIG.PSU__CRF_APB__ACPU_CTRL__ACT_FREQMHZ {1199.988037} \ + CONFIG.PSU__CRF_APB__ACPU_CTRL__DIVISOR0 {1} \ + CONFIG.PSU__CRF_APB__ACPU_CTRL__FREQMHZ {1200} \ + CONFIG.PSU__CRF_APB__ACPU_CTRL__SRCSEL {APLL} \ + CONFIG.PSU__CRF_APB__ACPU__FRAC_ENABLED {0} \ + CONFIG.PSU__CRF_APB__AFI0_REF_CTRL__ACT_FREQMHZ {667} \ + CONFIG.PSU__CRF_APB__AFI0_REF_CTRL__DIVISOR0 {2} \ + CONFIG.PSU__CRF_APB__AFI0_REF_CTRL__FREQMHZ {667} \ + CONFIG.PSU__CRF_APB__AFI0_REF_CTRL__SRCSEL {DPLL} \ + CONFIG.PSU__CRF_APB__AFI0_REF__ENABLE {0} \ + CONFIG.PSU__CRF_APB__AFI1_REF_CTRL__ACT_FREQMHZ {667} \ + CONFIG.PSU__CRF_APB__AFI1_REF_CTRL__DIVISOR0 {2} \ + CONFIG.PSU__CRF_APB__AFI1_REF_CTRL__FREQMHZ {667} \ + CONFIG.PSU__CRF_APB__AFI1_REF_CTRL__SRCSEL {DPLL} \ + CONFIG.PSU__CRF_APB__AFI1_REF__ENABLE {0} \ + CONFIG.PSU__CRF_APB__AFI2_REF_CTRL__ACT_FREQMHZ {667} \ + CONFIG.PSU__CRF_APB__AFI2_REF_CTRL__DIVISOR0 {2} \ + CONFIG.PSU__CRF_APB__AFI2_REF_CTRL__FREQMHZ {667} \ + CONFIG.PSU__CRF_APB__AFI2_REF_CTRL__SRCSEL {DPLL} \ + CONFIG.PSU__CRF_APB__AFI2_REF__ENABLE {0} \ + CONFIG.PSU__CRF_APB__AFI3_REF_CTRL__ACT_FREQMHZ {667} \ + CONFIG.PSU__CRF_APB__AFI3_REF_CTRL__DIVISOR0 {2} \ + CONFIG.PSU__CRF_APB__AFI3_REF_CTRL__FREQMHZ {667} \ + CONFIG.PSU__CRF_APB__AFI3_REF_CTRL__SRCSEL {DPLL} \ + CONFIG.PSU__CRF_APB__AFI3_REF__ENABLE {0} \ + CONFIG.PSU__CRF_APB__AFI4_REF_CTRL__ACT_FREQMHZ {667} \ + CONFIG.PSU__CRF_APB__AFI4_REF_CTRL__DIVISOR0 {2} \ + CONFIG.PSU__CRF_APB__AFI4_REF_CTRL__FREQMHZ {667} \ + CONFIG.PSU__CRF_APB__AFI4_REF_CTRL__SRCSEL {DPLL} \ + CONFIG.PSU__CRF_APB__AFI4_REF__ENABLE {0} \ + CONFIG.PSU__CRF_APB__AFI5_REF_CTRL__ACT_FREQMHZ {667} \ + CONFIG.PSU__CRF_APB__AFI5_REF_CTRL__DIVISOR0 {2} \ + CONFIG.PSU__CRF_APB__AFI5_REF_CTRL__FREQMHZ {667} \ + CONFIG.PSU__CRF_APB__AFI5_REF_CTRL__SRCSEL {DPLL} \ + CONFIG.PSU__CRF_APB__AFI5_REF__ENABLE {0} \ + CONFIG.PSU__CRF_APB__APLL_CTRL__DIV2 {1} \ + CONFIG.PSU__CRF_APB__APLL_CTRL__FBDIV {72} \ + CONFIG.PSU__CRF_APB__APLL_CTRL__FRACDATA {0.000000} \ + CONFIG.PSU__CRF_APB__APLL_CTRL__FRACFREQ {27.138} \ + CONFIG.PSU__CRF_APB__APLL_CTRL__SRCSEL {PSS_REF_CLK} \ + CONFIG.PSU__CRF_APB__APLL_FRAC_CFG__ENABLED {0} \ + CONFIG.PSU__CRF_APB__APLL_TO_LPD_CTRL__DIVISOR0 {3} \ + CONFIG.PSU__CRF_APB__APM_CTRL__ACT_FREQMHZ {1} \ + CONFIG.PSU__CRF_APB__APM_CTRL__DIVISOR0 {1} \ + CONFIG.PSU__CRF_APB__APM_CTRL__FREQMHZ {1} \ + CONFIG.PSU__CRF_APB__DBG_FPD_CTRL__ACT_FREQMHZ {249.997498} \ + CONFIG.PSU__CRF_APB__DBG_FPD_CTRL__DIVISOR0 {2} \ + CONFIG.PSU__CRF_APB__DBG_FPD_CTRL__FREQMHZ {250} \ + CONFIG.PSU__CRF_APB__DBG_FPD_CTRL__SRCSEL {IOPLL} \ + CONFIG.PSU__CRF_APB__DBG_TRACE_CTRL__ACT_FREQMHZ {250} \ + CONFIG.PSU__CRF_APB__DBG_TRACE_CTRL__DIVISOR0 {5} \ + CONFIG.PSU__CRF_APB__DBG_TRACE_CTRL__FREQMHZ {250} \ + CONFIG.PSU__CRF_APB__DBG_TRACE_CTRL__SRCSEL {IOPLL} \ + CONFIG.PSU__CRF_APB__DBG_TSTMP_CTRL__ACT_FREQMHZ {249.997498} \ + CONFIG.PSU__CRF_APB__DBG_TSTMP_CTRL__DIVISOR0 {2} \ + CONFIG.PSU__CRF_APB__DBG_TSTMP_CTRL__FREQMHZ {250} \ + CONFIG.PSU__CRF_APB__DBG_TSTMP_CTRL__SRCSEL {IOPLL} \ + CONFIG.PSU__CRF_APB__DDR_CTRL__ACT_FREQMHZ {599.994019} \ + CONFIG.PSU__CRF_APB__DDR_CTRL__DIVISOR0 {2} \ + CONFIG.PSU__CRF_APB__DDR_CTRL__FREQMHZ {1200} \ + CONFIG.PSU__CRF_APB__DDR_CTRL__SRCSEL {DPLL} \ + CONFIG.PSU__CRF_APB__DPDMA_REF_CTRL__ACT_FREQMHZ {599.994019} \ + CONFIG.PSU__CRF_APB__DPDMA_REF_CTRL__DIVISOR0 {2} \ + CONFIG.PSU__CRF_APB__DPDMA_REF_CTRL__FREQMHZ {600} \ + CONFIG.PSU__CRF_APB__DPDMA_REF_CTRL__SRCSEL {DPLL} \ + CONFIG.PSU__CRF_APB__DPLL_CTRL__DIV2 {1} \ + CONFIG.PSU__CRF_APB__DPLL_CTRL__FBDIV {72} \ + CONFIG.PSU__CRF_APB__DPLL_CTRL__FRACDATA {0.000000} \ + CONFIG.PSU__CRF_APB__DPLL_CTRL__FRACFREQ {27.138} \ + CONFIG.PSU__CRF_APB__DPLL_CTRL__SRCSEL {PSS_REF_CLK} \ + CONFIG.PSU__CRF_APB__DPLL_FRAC_CFG__ENABLED {0} \ + CONFIG.PSU__CRF_APB__DPLL_TO_LPD_CTRL__DIVISOR0 {3} \ + CONFIG.PSU__CRF_APB__DP_AUDIO_REF_CTRL__ACT_FREQMHZ {25} \ + CONFIG.PSU__CRF_APB__DP_AUDIO_REF_CTRL__DIVISOR0 {63} \ + CONFIG.PSU__CRF_APB__DP_AUDIO_REF_CTRL__DIVISOR1 {1} \ + CONFIG.PSU__CRF_APB__DP_AUDIO_REF_CTRL__FREQMHZ {25} \ + CONFIG.PSU__CRF_APB__DP_AUDIO_REF_CTRL__SRCSEL {VPLL} \ + CONFIG.PSU__CRF_APB__DP_AUDIO__FRAC_ENABLED {0} \ + CONFIG.PSU__CRF_APB__DP_STC_REF_CTRL__ACT_FREQMHZ {27} \ + CONFIG.PSU__CRF_APB__DP_STC_REF_CTRL__DIVISOR0 {6} \ + CONFIG.PSU__CRF_APB__DP_STC_REF_CTRL__DIVISOR1 {10} \ + CONFIG.PSU__CRF_APB__DP_STC_REF_CTRL__FREQMHZ {27} \ + CONFIG.PSU__CRF_APB__DP_STC_REF_CTRL__SRCSEL {VPLL} \ + CONFIG.PSU__CRF_APB__DP_VIDEO_REF_CTRL__ACT_FREQMHZ {320} \ + CONFIG.PSU__CRF_APB__DP_VIDEO_REF_CTRL__DIVISOR0 {5} \ + CONFIG.PSU__CRF_APB__DP_VIDEO_REF_CTRL__DIVISOR1 {1} \ + CONFIG.PSU__CRF_APB__DP_VIDEO_REF_CTRL__FREQMHZ {300} \ + CONFIG.PSU__CRF_APB__DP_VIDEO_REF_CTRL__SRCSEL {DPLL} \ + CONFIG.PSU__CRF_APB__DP_VIDEO__FRAC_ENABLED {0} \ + CONFIG.PSU__CRF_APB__GDMA_REF_CTRL__ACT_FREQMHZ {599.994019} \ + CONFIG.PSU__CRF_APB__GDMA_REF_CTRL__DIVISOR0 {2} \ + CONFIG.PSU__CRF_APB__GDMA_REF_CTRL__FREQMHZ {600} \ + CONFIG.PSU__CRF_APB__GDMA_REF_CTRL__SRCSEL {DPLL} \ + CONFIG.PSU__CRF_APB__GPU_REF_CTRL__ACT_FREQMHZ {0} \ + CONFIG.PSU__CRF_APB__GPU_REF_CTRL__DIVISOR0 {3} \ + CONFIG.PSU__CRF_APB__GPU_REF_CTRL__FREQMHZ {600} \ + CONFIG.PSU__CRF_APB__GPU_REF_CTRL__SRCSEL {DPLL} \ + CONFIG.PSU__CRF_APB__GTGREF0_REF_CTRL__ACT_FREQMHZ {-1} \ + CONFIG.PSU__CRF_APB__GTGREF0_REF_CTRL__DIVISOR0 {-1} \ + CONFIG.PSU__CRF_APB__GTGREF0_REF_CTRL__FREQMHZ {-1} \ + CONFIG.PSU__CRF_APB__GTGREF0_REF_CTRL__SRCSEL {NA} \ + CONFIG.PSU__CRF_APB__GTGREF0__ENABLE {NA} \ + CONFIG.PSU__CRF_APB__PCIE_REF_CTRL__ACT_FREQMHZ {250} \ + CONFIG.PSU__CRF_APB__PCIE_REF_CTRL__DIVISOR0 {6} \ + CONFIG.PSU__CRF_APB__PCIE_REF_CTRL__FREQMHZ {250} \ + CONFIG.PSU__CRF_APB__PCIE_REF_CTRL__SRCSEL {IOPLL} \ + CONFIG.PSU__CRF_APB__SATA_REF_CTRL__ACT_FREQMHZ {250} \ + CONFIG.PSU__CRF_APB__SATA_REF_CTRL__DIVISOR0 {5} \ + CONFIG.PSU__CRF_APB__SATA_REF_CTRL__FREQMHZ {250} \ + CONFIG.PSU__CRF_APB__SATA_REF_CTRL__SRCSEL {IOPLL} \ + CONFIG.PSU__CRF_APB__TOPSW_LSBUS_CTRL__ACT_FREQMHZ {99.999001} \ + CONFIG.PSU__CRF_APB__TOPSW_LSBUS_CTRL__DIVISOR0 {5} \ + CONFIG.PSU__CRF_APB__TOPSW_LSBUS_CTRL__FREQMHZ {100} \ + CONFIG.PSU__CRF_APB__TOPSW_LSBUS_CTRL__SRCSEL {IOPLL} \ + CONFIG.PSU__CRF_APB__TOPSW_MAIN_CTRL__ACT_FREQMHZ {533.328003} \ + CONFIG.PSU__CRF_APB__TOPSW_MAIN_CTRL__DIVISOR0 {2} \ + CONFIG.PSU__CRF_APB__TOPSW_MAIN_CTRL__FREQMHZ {533.333} \ + CONFIG.PSU__CRF_APB__TOPSW_MAIN_CTRL__SRCSEL {VPLL} \ + CONFIG.PSU__CRF_APB__VPLL_CTRL__DIV2 {1} \ + CONFIG.PSU__CRF_APB__VPLL_CTRL__FBDIV {64} \ + CONFIG.PSU__CRF_APB__VPLL_CTRL__FRACDATA {0.000000} \ + CONFIG.PSU__CRF_APB__VPLL_CTRL__FRACFREQ {27.138} \ + CONFIG.PSU__CRF_APB__VPLL_CTRL__SRCSEL {PSS_REF_CLK} \ + CONFIG.PSU__CRF_APB__VPLL_FRAC_CFG__ENABLED {0} \ + CONFIG.PSU__CRF_APB__VPLL_TO_LPD_CTRL__DIVISOR0 {2} \ + CONFIG.PSU__CRL_APB__ADMA_REF_CTRL__ACT_FREQMHZ {499.994995} \ + CONFIG.PSU__CRL_APB__ADMA_REF_CTRL__DIVISOR0 {3} \ + CONFIG.PSU__CRL_APB__ADMA_REF_CTRL__FREQMHZ {500} \ + CONFIG.PSU__CRL_APB__ADMA_REF_CTRL__SRCSEL {IOPLL} \ + CONFIG.PSU__CRL_APB__AFI6_REF_CTRL__ACT_FREQMHZ {500} \ + CONFIG.PSU__CRL_APB__AFI6_REF_CTRL__DIVISOR0 {3} \ + CONFIG.PSU__CRL_APB__AFI6_REF_CTRL__FREQMHZ {500} \ + CONFIG.PSU__CRL_APB__AFI6_REF_CTRL__SRCSEL {IOPLL} \ + CONFIG.PSU__CRL_APB__AFI6__ENABLE {0} \ + CONFIG.PSU__CRL_APB__AMS_REF_CTRL__ACT_FREQMHZ {49.999500} \ + CONFIG.PSU__CRL_APB__AMS_REF_CTRL__DIVISOR0 {30} \ + CONFIG.PSU__CRL_APB__AMS_REF_CTRL__DIVISOR1 {1} \ + CONFIG.PSU__CRL_APB__AMS_REF_CTRL__FREQMHZ {50} \ + CONFIG.PSU__CRL_APB__AMS_REF_CTRL__SRCSEL {IOPLL} \ + CONFIG.PSU__CRL_APB__CAN0_REF_CTRL__ACT_FREQMHZ {100} \ + CONFIG.PSU__CRL_APB__CAN0_REF_CTRL__DIVISOR0 {15} \ + CONFIG.PSU__CRL_APB__CAN0_REF_CTRL__DIVISOR1 {1} \ + CONFIG.PSU__CRL_APB__CAN0_REF_CTRL__FREQMHZ {100} \ + CONFIG.PSU__CRL_APB__CAN0_REF_CTRL__SRCSEL {IOPLL} \ + CONFIG.PSU__CRL_APB__CAN1_REF_CTRL__ACT_FREQMHZ {100} \ + CONFIG.PSU__CRL_APB__CAN1_REF_CTRL__DIVISOR0 {15} \ + CONFIG.PSU__CRL_APB__CAN1_REF_CTRL__DIVISOR1 {1} \ + CONFIG.PSU__CRL_APB__CAN1_REF_CTRL__FREQMHZ {100} \ + CONFIG.PSU__CRL_APB__CAN1_REF_CTRL__SRCSEL {IOPLL} \ + CONFIG.PSU__CRL_APB__CPU_R5_CTRL__ACT_FREQMHZ {499.994995} \ + CONFIG.PSU__CRL_APB__CPU_R5_CTRL__DIVISOR0 {3} \ + CONFIG.PSU__CRL_APB__CPU_R5_CTRL__FREQMHZ {500} \ + CONFIG.PSU__CRL_APB__CPU_R5_CTRL__SRCSEL {IOPLL} \ + CONFIG.PSU__CRL_APB__CSU_PLL_CTRL__ACT_FREQMHZ {180} \ + CONFIG.PSU__CRL_APB__CSU_PLL_CTRL__DIVISOR0 {3} \ + CONFIG.PSU__CRL_APB__CSU_PLL_CTRL__FREQMHZ {180} \ + CONFIG.PSU__CRL_APB__CSU_PLL_CTRL__SRCSEL {SysOsc} \ + CONFIG.PSU__CRL_APB__DBG_LPD_CTRL__ACT_FREQMHZ {249.997498} \ + CONFIG.PSU__CRL_APB__DBG_LPD_CTRL__DIVISOR0 {6} \ + CONFIG.PSU__CRL_APB__DBG_LPD_CTRL__FREQMHZ {250} \ + CONFIG.PSU__CRL_APB__DBG_LPD_CTRL__SRCSEL {IOPLL} \ + CONFIG.PSU__CRL_APB__DEBUG_R5_ATCLK_CTRL__ACT_FREQMHZ {1000} \ + CONFIG.PSU__CRL_APB__DEBUG_R5_ATCLK_CTRL__DIVISOR0 {6} \ + CONFIG.PSU__CRL_APB__DEBUG_R5_ATCLK_CTRL__FREQMHZ {1000} \ + CONFIG.PSU__CRL_APB__DEBUG_R5_ATCLK_CTRL__SRCSEL {RPLL} \ + CONFIG.PSU__CRL_APB__DLL_REF_CTRL__ACT_FREQMHZ {1499.984985} \ + CONFIG.PSU__CRL_APB__DLL_REF_CTRL__FREQMHZ {1500} \ + CONFIG.PSU__CRL_APB__DLL_REF_CTRL__SRCSEL {IOPLL} \ + CONFIG.PSU__CRL_APB__GEM0_REF_CTRL__ACT_FREQMHZ {125} \ + CONFIG.PSU__CRL_APB__GEM0_REF_CTRL__DIVISOR0 {12} \ + CONFIG.PSU__CRL_APB__GEM0_REF_CTRL__DIVISOR1 {1} \ + CONFIG.PSU__CRL_APB__GEM0_REF_CTRL__FREQMHZ {125} \ + CONFIG.PSU__CRL_APB__GEM0_REF_CTRL__SRCSEL {IOPLL} \ + CONFIG.PSU__CRL_APB__GEM1_REF_CTRL__ACT_FREQMHZ {125} \ + CONFIG.PSU__CRL_APB__GEM1_REF_CTRL__DIVISOR0 {12} \ + CONFIG.PSU__CRL_APB__GEM1_REF_CTRL__DIVISOR1 {1} \ + CONFIG.PSU__CRL_APB__GEM1_REF_CTRL__FREQMHZ {125} \ + CONFIG.PSU__CRL_APB__GEM1_REF_CTRL__SRCSEL {IOPLL} \ + CONFIG.PSU__CRL_APB__GEM2_REF_CTRL__ACT_FREQMHZ {125} \ + CONFIG.PSU__CRL_APB__GEM2_REF_CTRL__DIVISOR0 {12} \ + CONFIG.PSU__CRL_APB__GEM2_REF_CTRL__DIVISOR1 {1} \ + CONFIG.PSU__CRL_APB__GEM2_REF_CTRL__FREQMHZ {125} \ + CONFIG.PSU__CRL_APB__GEM2_REF_CTRL__SRCSEL {IOPLL} \ + CONFIG.PSU__CRL_APB__GEM3_REF_CTRL__ACT_FREQMHZ {124.998749} \ + CONFIG.PSU__CRL_APB__GEM3_REF_CTRL__DIVISOR0 {12} \ + CONFIG.PSU__CRL_APB__GEM3_REF_CTRL__DIVISOR1 {1} \ + CONFIG.PSU__CRL_APB__GEM3_REF_CTRL__FREQMHZ {125} \ + CONFIG.PSU__CRL_APB__GEM3_REF_CTRL__SRCSEL {IOPLL} \ + CONFIG.PSU__CRL_APB__GEM_TSU_REF_CTRL__ACT_FREQMHZ {249.997498} \ + CONFIG.PSU__CRL_APB__GEM_TSU_REF_CTRL__DIVISOR0 {6} \ + CONFIG.PSU__CRL_APB__GEM_TSU_REF_CTRL__DIVISOR1 {1} \ + CONFIG.PSU__CRL_APB__GEM_TSU_REF_CTRL__FREQMHZ {250} \ + CONFIG.PSU__CRL_APB__GEM_TSU_REF_CTRL__SRCSEL {IOPLL} \ + CONFIG.PSU__CRL_APB__I2C0_REF_CTRL__ACT_FREQMHZ {99.999001} \ + CONFIG.PSU__CRL_APB__I2C0_REF_CTRL__DIVISOR0 {15} \ + CONFIG.PSU__CRL_APB__I2C0_REF_CTRL__DIVISOR1 {1} \ + CONFIG.PSU__CRL_APB__I2C0_REF_CTRL__FREQMHZ {100} \ + CONFIG.PSU__CRL_APB__I2C0_REF_CTRL__SRCSEL {IOPLL} \ + CONFIG.PSU__CRL_APB__I2C1_REF_CTRL__ACT_FREQMHZ {99.999001} \ + CONFIG.PSU__CRL_APB__I2C1_REF_CTRL__DIVISOR0 {15} \ + CONFIG.PSU__CRL_APB__I2C1_REF_CTRL__DIVISOR1 {1} \ + CONFIG.PSU__CRL_APB__I2C1_REF_CTRL__FREQMHZ {100} \ + CONFIG.PSU__CRL_APB__I2C1_REF_CTRL__SRCSEL {IOPLL} \ + CONFIG.PSU__CRL_APB__IOPLL_CTRL__DIV2 {1} \ + CONFIG.PSU__CRL_APB__IOPLL_CTRL__FBDIV {90} \ + CONFIG.PSU__CRL_APB__IOPLL_CTRL__FRACDATA {0.000000} \ + CONFIG.PSU__CRL_APB__IOPLL_CTRL__FRACFREQ {27.138} \ + CONFIG.PSU__CRL_APB__IOPLL_CTRL__SRCSEL {PSS_REF_CLK} \ + CONFIG.PSU__CRL_APB__IOPLL_FRAC_CFG__ENABLED {0} \ + CONFIG.PSU__CRL_APB__IOPLL_TO_FPD_CTRL__DIVISOR0 {3} \ + CONFIG.PSU__CRL_APB__IOU_SWITCH_CTRL__ACT_FREQMHZ {266.664001} \ + CONFIG.PSU__CRL_APB__IOU_SWITCH_CTRL__DIVISOR0 {3} \ + CONFIG.PSU__CRL_APB__IOU_SWITCH_CTRL__FREQMHZ {267} \ + CONFIG.PSU__CRL_APB__IOU_SWITCH_CTRL__SRCSEL {RPLL} \ + CONFIG.PSU__CRL_APB__LPD_LSBUS_CTRL__ACT_FREQMHZ {99.999001} \ + CONFIG.PSU__CRL_APB__LPD_LSBUS_CTRL__DIVISOR0 {15} \ + CONFIG.PSU__CRL_APB__LPD_LSBUS_CTRL__FREQMHZ {100} \ + CONFIG.PSU__CRL_APB__LPD_LSBUS_CTRL__SRCSEL {IOPLL} \ + CONFIG.PSU__CRL_APB__LPD_SWITCH_CTRL__ACT_FREQMHZ {499.994995} \ + CONFIG.PSU__CRL_APB__LPD_SWITCH_CTRL__DIVISOR0 {3} \ + CONFIG.PSU__CRL_APB__LPD_SWITCH_CTRL__FREQMHZ {500} \ + CONFIG.PSU__CRL_APB__LPD_SWITCH_CTRL__SRCSEL {IOPLL} \ + CONFIG.PSU__CRL_APB__NAND_REF_CTRL__ACT_FREQMHZ {100} \ + CONFIG.PSU__CRL_APB__NAND_REF_CTRL__DIVISOR0 {15} \ + CONFIG.PSU__CRL_APB__NAND_REF_CTRL__DIVISOR1 {1} \ + CONFIG.PSU__CRL_APB__NAND_REF_CTRL__FREQMHZ {100} \ + CONFIG.PSU__CRL_APB__NAND_REF_CTRL__SRCSEL {IOPLL} \ + CONFIG.PSU__CRL_APB__OCM_MAIN_CTRL__ACT_FREQMHZ {500} \ + CONFIG.PSU__CRL_APB__OCM_MAIN_CTRL__DIVISOR0 {3} \ + CONFIG.PSU__CRL_APB__OCM_MAIN_CTRL__FREQMHZ {500} \ + CONFIG.PSU__CRL_APB__OCM_MAIN_CTRL__SRCSEL {IOPLL} \ + CONFIG.PSU__CRL_APB__PCAP_CTRL__ACT_FREQMHZ {187.498123} \ + CONFIG.PSU__CRL_APB__PCAP_CTRL__DIVISOR0 {8} \ + CONFIG.PSU__CRL_APB__PCAP_CTRL__FREQMHZ {200} \ + CONFIG.PSU__CRL_APB__PCAP_CTRL__SRCSEL {IOPLL} \ + CONFIG.PSU__CRL_APB__PL0_REF_CTRL__ACT_FREQMHZ {99.999001} \ + CONFIG.PSU__CRL_APB__PL0_REF_CTRL__DIVISOR0 {4} \ + CONFIG.PSU__CRL_APB__PL0_REF_CTRL__DIVISOR1 {1} \ + CONFIG.PSU__CRL_APB__PL0_REF_CTRL__FREQMHZ {100} \ + CONFIG.PSU__CRL_APB__PL0_REF_CTRL__SRCSEL {DPLL} \ + CONFIG.PSU__CRL_APB__PL1_REF_CTRL__ACT_FREQMHZ {39.999599} \ + CONFIG.PSU__CRL_APB__PL1_REF_CTRL__DIVISOR0 {10} \ + CONFIG.PSU__CRL_APB__PL1_REF_CTRL__DIVISOR1 {1} \ + CONFIG.PSU__CRL_APB__PL1_REF_CTRL__FREQMHZ {40} \ + CONFIG.PSU__CRL_APB__PL1_REF_CTRL__SRCSEL {DPLL} \ + CONFIG.PSU__CRL_APB__PL2_REF_CTRL__ACT_FREQMHZ {166.664993} \ + CONFIG.PSU__CRL_APB__PL2_REF_CTRL__DIVISOR0 {9} \ + CONFIG.PSU__CRL_APB__PL2_REF_CTRL__DIVISOR1 {1} \ + CONFIG.PSU__CRL_APB__PL2_REF_CTRL__FREQMHZ {166.6667} \ + CONFIG.PSU__CRL_APB__PL2_REF_CTRL__SRCSEL {IOPLL} \ + CONFIG.PSU__CRL_APB__PL3_REF_CTRL__ACT_FREQMHZ {199.998001} \ + CONFIG.PSU__CRL_APB__PL3_REF_CTRL__DIVISOR0 {2} \ + CONFIG.PSU__CRL_APB__PL3_REF_CTRL__DIVISOR1 {1} \ + CONFIG.PSU__CRL_APB__PL3_REF_CTRL__FREQMHZ {200} \ + CONFIG.PSU__CRL_APB__PL3_REF_CTRL__SRCSEL {DPLL} \ + CONFIG.PSU__CRL_APB__QSPI_REF_CTRL__ACT_FREQMHZ {299.997009} \ + CONFIG.PSU__CRL_APB__QSPI_REF_CTRL__DIVISOR0 {5} \ + CONFIG.PSU__CRL_APB__QSPI_REF_CTRL__DIVISOR1 {1} \ + CONFIG.PSU__CRL_APB__QSPI_REF_CTRL__FREQMHZ {300} \ + CONFIG.PSU__CRL_APB__QSPI_REF_CTRL__SRCSEL {IOPLL} \ + CONFIG.PSU__CRL_APB__RPLL_CTRL__DIV2 {1} \ + CONFIG.PSU__CRL_APB__RPLL_CTRL__FBDIV {48} \ + CONFIG.PSU__CRL_APB__RPLL_CTRL__FRACDATA {0.000000} \ + CONFIG.PSU__CRL_APB__RPLL_CTRL__FRACFREQ {27.138} \ + CONFIG.PSU__CRL_APB__RPLL_CTRL__SRCSEL {PSS_REF_CLK} \ + CONFIG.PSU__CRL_APB__RPLL_FRAC_CFG__ENABLED {0} \ + CONFIG.PSU__CRL_APB__RPLL_TO_FPD_CTRL__DIVISOR0 {2} \ + CONFIG.PSU__CRL_APB__SDIO0_REF_CTRL__ACT_FREQMHZ {199.998001} \ + CONFIG.PSU__CRL_APB__SDIO0_REF_CTRL__DIVISOR0 {4} \ + CONFIG.PSU__CRL_APB__SDIO0_REF_CTRL__DIVISOR1 {1} \ + CONFIG.PSU__CRL_APB__SDIO0_REF_CTRL__FREQMHZ {200} \ + CONFIG.PSU__CRL_APB__SDIO0_REF_CTRL__SRCSEL {RPLL} \ + CONFIG.PSU__CRL_APB__SDIO1_REF_CTRL__ACT_FREQMHZ {199.998001} \ + CONFIG.PSU__CRL_APB__SDIO1_REF_CTRL__DIVISOR0 {4} \ + CONFIG.PSU__CRL_APB__SDIO1_REF_CTRL__DIVISOR1 {1} \ + CONFIG.PSU__CRL_APB__SDIO1_REF_CTRL__FREQMHZ {200} \ + CONFIG.PSU__CRL_APB__SDIO1_REF_CTRL__SRCSEL {RPLL} \ + CONFIG.PSU__CRL_APB__SPI0_REF_CTRL__ACT_FREQMHZ {199.998001} \ + CONFIG.PSU__CRL_APB__SPI0_REF_CTRL__DIVISOR0 {7} \ + CONFIG.PSU__CRL_APB__SPI0_REF_CTRL__DIVISOR1 {1} \ + CONFIG.PSU__CRL_APB__SPI0_REF_CTRL__FREQMHZ {200} \ + CONFIG.PSU__CRL_APB__SPI0_REF_CTRL__SRCSEL {RPLL} \ + CONFIG.PSU__CRL_APB__SPI1_REF_CTRL__ACT_FREQMHZ {199.998001} \ + CONFIG.PSU__CRL_APB__SPI1_REF_CTRL__DIVISOR0 {4} \ + CONFIG.PSU__CRL_APB__SPI1_REF_CTRL__DIVISOR1 {1} \ + CONFIG.PSU__CRL_APB__SPI1_REF_CTRL__FREQMHZ {200} \ + CONFIG.PSU__CRL_APB__SPI1_REF_CTRL__SRCSEL {RPLL} \ + CONFIG.PSU__CRL_APB__TIMESTAMP_REF_CTRL__ACT_FREQMHZ {33.333000} \ + CONFIG.PSU__CRL_APB__TIMESTAMP_REF_CTRL__DIVISOR0 {1} \ + CONFIG.PSU__CRL_APB__TIMESTAMP_REF_CTRL__FREQMHZ {100} \ + CONFIG.PSU__CRL_APB__TIMESTAMP_REF_CTRL__SRCSEL {PSS_REF_CLK} \ + CONFIG.PSU__CRL_APB__UART0_REF_CTRL__ACT_FREQMHZ {99.999001} \ + CONFIG.PSU__CRL_APB__UART0_REF_CTRL__DIVISOR0 {15} \ + CONFIG.PSU__CRL_APB__UART0_REF_CTRL__DIVISOR1 {1} \ + CONFIG.PSU__CRL_APB__UART0_REF_CTRL__FREQMHZ {100} \ + CONFIG.PSU__CRL_APB__UART0_REF_CTRL__SRCSEL {IOPLL} \ + CONFIG.PSU__CRL_APB__UART1_REF_CTRL__ACT_FREQMHZ {99.999001} \ + CONFIG.PSU__CRL_APB__UART1_REF_CTRL__DIVISOR0 {15} \ + CONFIG.PSU__CRL_APB__UART1_REF_CTRL__DIVISOR1 {1} \ + CONFIG.PSU__CRL_APB__UART1_REF_CTRL__FREQMHZ {100} \ + CONFIG.PSU__CRL_APB__UART1_REF_CTRL__SRCSEL {IOPLL} \ + CONFIG.PSU__CRL_APB__USB0_BUS_REF_CTRL__ACT_FREQMHZ {249.997498} \ + CONFIG.PSU__CRL_APB__USB0_BUS_REF_CTRL__DIVISOR0 {6} \ + CONFIG.PSU__CRL_APB__USB0_BUS_REF_CTRL__DIVISOR1 {1} \ + CONFIG.PSU__CRL_APB__USB0_BUS_REF_CTRL__FREQMHZ {250} \ + CONFIG.PSU__CRL_APB__USB0_BUS_REF_CTRL__SRCSEL {IOPLL} \ + CONFIG.PSU__CRL_APB__USB1_BUS_REF_CTRL__ACT_FREQMHZ {250} \ + CONFIG.PSU__CRL_APB__USB1_BUS_REF_CTRL__DIVISOR0 {6} \ + CONFIG.PSU__CRL_APB__USB1_BUS_REF_CTRL__DIVISOR1 {1} \ + CONFIG.PSU__CRL_APB__USB1_BUS_REF_CTRL__FREQMHZ {250} \ + CONFIG.PSU__CRL_APB__USB1_BUS_REF_CTRL__SRCSEL {IOPLL} \ + CONFIG.PSU__CRL_APB__USB3_DUAL_REF_CTRL__ACT_FREQMHZ {19.999800} \ + CONFIG.PSU__CRL_APB__USB3_DUAL_REF_CTRL__DIVISOR0 {25} \ + CONFIG.PSU__CRL_APB__USB3_DUAL_REF_CTRL__DIVISOR1 {3} \ + CONFIG.PSU__CRL_APB__USB3_DUAL_REF_CTRL__FREQMHZ {20} \ + CONFIG.PSU__CRL_APB__USB3_DUAL_REF_CTRL__SRCSEL {IOPLL} \ + CONFIG.PSU__CRL_APB__USB3__ENABLE {0} \ + CONFIG.PSU__CSUPMU__PERIPHERAL__VALID {1} \ + CONFIG.PSU__CSU_COHERENCY {0} \ + CONFIG.PSU__CSU__CSU_TAMPER_0__ENABLE {0} \ + CONFIG.PSU__CSU__CSU_TAMPER_0__ERASE_BBRAM {0} \ + CONFIG.PSU__CSU__CSU_TAMPER_10__ENABLE {0} \ + CONFIG.PSU__CSU__CSU_TAMPER_10__ERASE_BBRAM {0} \ + CONFIG.PSU__CSU__CSU_TAMPER_11__ENABLE {0} \ + CONFIG.PSU__CSU__CSU_TAMPER_11__ERASE_BBRAM {0} \ + CONFIG.PSU__CSU__CSU_TAMPER_12__ENABLE {0} \ + CONFIG.PSU__CSU__CSU_TAMPER_12__ERASE_BBRAM {0} \ + CONFIG.PSU__CSU__CSU_TAMPER_1__ENABLE {0} \ + CONFIG.PSU__CSU__CSU_TAMPER_1__ERASE_BBRAM {0} \ + CONFIG.PSU__CSU__CSU_TAMPER_2__ENABLE {0} \ + CONFIG.PSU__CSU__CSU_TAMPER_2__ERASE_BBRAM {0} \ + CONFIG.PSU__CSU__CSU_TAMPER_3__ENABLE {0} \ + CONFIG.PSU__CSU__CSU_TAMPER_3__ERASE_BBRAM {0} \ + CONFIG.PSU__CSU__CSU_TAMPER_4__ENABLE {0} \ + CONFIG.PSU__CSU__CSU_TAMPER_4__ERASE_BBRAM {0} \ + CONFIG.PSU__CSU__CSU_TAMPER_5__ENABLE {0} \ + CONFIG.PSU__CSU__CSU_TAMPER_5__ERASE_BBRAM {0} \ + CONFIG.PSU__CSU__CSU_TAMPER_6__ENABLE {0} \ + CONFIG.PSU__CSU__CSU_TAMPER_6__ERASE_BBRAM {0} \ + CONFIG.PSU__CSU__CSU_TAMPER_7__ENABLE {0} \ + CONFIG.PSU__CSU__CSU_TAMPER_7__ERASE_BBRAM {0} \ + CONFIG.PSU__CSU__CSU_TAMPER_8__ENABLE {0} \ + CONFIG.PSU__CSU__CSU_TAMPER_8__ERASE_BBRAM {0} \ + CONFIG.PSU__CSU__CSU_TAMPER_9__ENABLE {0} \ + CONFIG.PSU__CSU__CSU_TAMPER_9__ERASE_BBRAM {0} \ + CONFIG.PSU__CSU__PERIPHERAL__ENABLE {0} \ + CONFIG.PSU__DDRC__ADDR_MIRROR {0} \ + CONFIG.PSU__DDRC__AL {0} \ + CONFIG.PSU__DDRC__BANK_ADDR_COUNT {2} \ + CONFIG.PSU__DDRC__BG_ADDR_COUNT {1} \ + CONFIG.PSU__DDRC__BRC_MAPPING {ROW_BANK_COL} \ + CONFIG.PSU__DDRC__BUS_WIDTH {64 Bit} \ + CONFIG.PSU__DDRC__CL {16} \ + CONFIG.PSU__DDRC__CLOCK_STOP_EN {0} \ + CONFIG.PSU__DDRC__COL_ADDR_COUNT {10} \ + CONFIG.PSU__DDRC__COMPONENTS {Components} \ + CONFIG.PSU__DDRC__CWL {12} \ + CONFIG.PSU__DDRC__DDR3L_T_REF_RANGE {NA} \ + CONFIG.PSU__DDRC__DDR3_T_REF_RANGE {NA} \ + CONFIG.PSU__DDRC__DDR4_ADDR_MAPPING {0} \ + CONFIG.PSU__DDRC__DDR4_CAL_MODE_ENABLE {0} \ + CONFIG.PSU__DDRC__DDR4_CRC_CONTROL {0} \ + CONFIG.PSU__DDRC__DDR4_MAXPWR_SAVING_EN {0} \ + CONFIG.PSU__DDRC__DDR4_T_REF_MODE {1} \ + CONFIG.PSU__DDRC__DDR4_T_REF_RANGE {High (95 Max)} \ + CONFIG.PSU__DDRC__DEEP_PWR_DOWN_EN {0} \ + CONFIG.PSU__DDRC__DEVICE_CAPACITY {8192 MBits} \ + CONFIG.PSU__DDRC__DIMM_ADDR_MIRROR {0} \ + CONFIG.PSU__DDRC__DM_DBI {DM_NO_DBI} \ + CONFIG.PSU__DDRC__DQMAP_0_3 {0} \ + CONFIG.PSU__DDRC__DQMAP_12_15 {0} \ + CONFIG.PSU__DDRC__DQMAP_16_19 {0} \ + CONFIG.PSU__DDRC__DQMAP_20_23 {0} \ + CONFIG.PSU__DDRC__DQMAP_24_27 {0} \ + CONFIG.PSU__DDRC__DQMAP_28_31 {0} \ + CONFIG.PSU__DDRC__DQMAP_32_35 {0} \ + CONFIG.PSU__DDRC__DQMAP_36_39 {0} \ + CONFIG.PSU__DDRC__DQMAP_40_43 {0} \ + CONFIG.PSU__DDRC__DQMAP_44_47 {0} \ + CONFIG.PSU__DDRC__DQMAP_48_51 {0} \ + CONFIG.PSU__DDRC__DQMAP_4_7 {0} \ + CONFIG.PSU__DDRC__DQMAP_52_55 {0} \ + CONFIG.PSU__DDRC__DQMAP_56_59 {0} \ + CONFIG.PSU__DDRC__DQMAP_60_63 {0} \ + CONFIG.PSU__DDRC__DQMAP_64_67 {0} \ + CONFIG.PSU__DDRC__DQMAP_68_71 {0} \ + CONFIG.PSU__DDRC__DQMAP_8_11 {0} \ + CONFIG.PSU__DDRC__DRAM_WIDTH {16 Bits} \ + CONFIG.PSU__DDRC__ECC {Disabled} \ + CONFIG.PSU__DDRC__ECC_SCRUB {0} \ + CONFIG.PSU__DDRC__ENABLE {1} \ + CONFIG.PSU__DDRC__ENABLE_2T_TIMING {0} \ + CONFIG.PSU__DDRC__ENABLE_DP_SWITCH {0} \ + CONFIG.PSU__DDRC__ENABLE_LP4_HAS_ECC_COMP {0} \ + CONFIG.PSU__DDRC__ENABLE_LP4_SLOWBOOT {0} \ + CONFIG.PSU__DDRC__EN_2ND_CLK {0} \ + CONFIG.PSU__DDRC__FGRM {1X} \ + CONFIG.PSU__DDRC__FREQ_MHZ {1} \ + CONFIG.PSU__DDRC__LPDDR3_DUALRANK_SDP {0} \ + CONFIG.PSU__DDRC__LPDDR3_T_REF_RANGE {NA} \ + CONFIG.PSU__DDRC__LPDDR4_T_REF_RANGE {NA} \ + CONFIG.PSU__DDRC__LP_ASR {manual normal} \ + CONFIG.PSU__DDRC__MEMORY_TYPE {DDR 4} \ + CONFIG.PSU__DDRC__PARITY_ENABLE {0} \ + CONFIG.PSU__DDRC__PER_BANK_REFRESH {0} \ + CONFIG.PSU__DDRC__PHY_DBI_MODE {0} \ + CONFIG.PSU__DDRC__PLL_BYPASS {0} \ + CONFIG.PSU__DDRC__PWR_DOWN_EN {0} \ + CONFIG.PSU__DDRC__RANK_ADDR_COUNT {0} \ + CONFIG.PSU__DDRC__RD_DQS_CENTER {0} \ + CONFIG.PSU__DDRC__ROW_ADDR_COUNT {16} \ + CONFIG.PSU__DDRC__SB_TARGET {15-15-15} \ + CONFIG.PSU__DDRC__SELF_REF_ABORT {0} \ + CONFIG.PSU__DDRC__SPEED_BIN {DDR4_2400P} \ + CONFIG.PSU__DDRC__STATIC_RD_MODE {0} \ + CONFIG.PSU__DDRC__TRAIN_DATA_EYE {1} \ + CONFIG.PSU__DDRC__TRAIN_READ_GATE {1} \ + CONFIG.PSU__DDRC__TRAIN_WRITE_LEVEL {1} \ + CONFIG.PSU__DDRC__T_FAW {30.0} \ + CONFIG.PSU__DDRC__T_RAS_MIN {32} \ + CONFIG.PSU__DDRC__T_RC {45.32} \ + CONFIG.PSU__DDRC__T_RCD {16} \ + CONFIG.PSU__DDRC__T_RP {16} \ + CONFIG.PSU__DDRC__VENDOR_PART {OTHERS} \ + CONFIG.PSU__DDRC__VIDEO_BUFFER_SIZE {0} \ + CONFIG.PSU__DDRC__VREF {1} \ + CONFIG.PSU__DDR_HIGH_ADDRESS_GUI_ENABLE {1} \ + CONFIG.PSU__DDR_QOS_ENABLE {0} \ + CONFIG.PSU__DDR_QOS_FIX_HP0_RDQOS {} \ + CONFIG.PSU__DDR_QOS_FIX_HP0_WRQOS {} \ + CONFIG.PSU__DDR_QOS_FIX_HP1_RDQOS {} \ + CONFIG.PSU__DDR_QOS_FIX_HP1_WRQOS {} \ + CONFIG.PSU__DDR_QOS_FIX_HP2_RDQOS {} \ + CONFIG.PSU__DDR_QOS_FIX_HP2_WRQOS {} \ + CONFIG.PSU__DDR_QOS_FIX_HP3_RDQOS {} \ + CONFIG.PSU__DDR_QOS_FIX_HP3_WRQOS {} \ + CONFIG.PSU__DDR_QOS_HP0_RDQOS {} \ + CONFIG.PSU__DDR_QOS_HP0_WRQOS {} \ + CONFIG.PSU__DDR_QOS_HP1_RDQOS {} \ + CONFIG.PSU__DDR_QOS_HP1_WRQOS {} \ + CONFIG.PSU__DDR_QOS_HP2_RDQOS {} \ + CONFIG.PSU__DDR_QOS_HP2_WRQOS {} \ + CONFIG.PSU__DDR_QOS_HP3_RDQOS {} \ + CONFIG.PSU__DDR_QOS_HP3_WRQOS {} \ + CONFIG.PSU__DDR_QOS_RD_HPR_THRSHLD {} \ + CONFIG.PSU__DDR_QOS_RD_LPR_THRSHLD {} \ + CONFIG.PSU__DDR_QOS_WR_THRSHLD {} \ + CONFIG.PSU__DDR_SW_REFRESH_ENABLED {1} \ + CONFIG.PSU__DDR__INTERFACE__FREQMHZ {600.000} \ + CONFIG.PSU__DEVICE_TYPE {RFSOC} \ + CONFIG.PSU__DISPLAYPORT__LANE0__ENABLE {0} \ + CONFIG.PSU__DISPLAYPORT__LANE1__ENABLE {0} \ + CONFIG.PSU__DISPLAYPORT__PERIPHERAL__ENABLE {0} \ + CONFIG.PSU__DLL__ISUSED {1} \ + CONFIG.PSU__DPAUX__PERIPHERAL__ENABLE {0} \ + CONFIG.PSU__ENABLE__DDR__REFRESH__SIGNALS {0} \ + CONFIG.PSU__ENET0__FIFO__ENABLE {0} \ + CONFIG.PSU__ENET0__GRP_MDIO__ENABLE {0} \ + CONFIG.PSU__ENET0__PERIPHERAL__ENABLE {0} \ + CONFIG.PSU__ENET0__PTP__ENABLE {0} \ + CONFIG.PSU__ENET0__TSU__ENABLE {0} \ + CONFIG.PSU__ENET1__FIFO__ENABLE {0} \ + CONFIG.PSU__ENET1__GRP_MDIO__ENABLE {0} \ + CONFIG.PSU__ENET1__PERIPHERAL__ENABLE {0} \ + CONFIG.PSU__ENET1__PTP__ENABLE {0} \ + CONFIG.PSU__ENET1__TSU__ENABLE {0} \ + CONFIG.PSU__ENET2__FIFO__ENABLE {0} \ + CONFIG.PSU__ENET2__GRP_MDIO__ENABLE {0} \ + CONFIG.PSU__ENET2__PERIPHERAL__ENABLE {0} \ + CONFIG.PSU__ENET2__PTP__ENABLE {0} \ + CONFIG.PSU__ENET2__TSU__ENABLE {0} \ + CONFIG.PSU__ENET3__FIFO__ENABLE {0} \ + CONFIG.PSU__ENET3__GRP_MDIO__ENABLE {1} \ + CONFIG.PSU__ENET3__GRP_MDIO__IO {MIO 76 .. 77} \ + CONFIG.PSU__ENET3__PERIPHERAL__ENABLE {1} \ + CONFIG.PSU__ENET3__PERIPHERAL__IO {MIO 64 .. 75} \ + CONFIG.PSU__ENET3__PTP__ENABLE {0} \ + CONFIG.PSU__ENET3__TSU__ENABLE {0} \ + CONFIG.PSU__EN_AXI_STATUS_PORTS {0} \ + CONFIG.PSU__EN_EMIO_TRACE {0} \ + CONFIG.PSU__EP__IP {0} \ + CONFIG.PSU__EXPAND__CORESIGHT {0} \ + CONFIG.PSU__EXPAND__FPD_SLAVES {0} \ + CONFIG.PSU__EXPAND__GIC {0} \ + CONFIG.PSU__EXPAND__LOWER_LPS_SLAVES {0} \ + CONFIG.PSU__EXPAND__UPPER_LPS_SLAVES {0} \ + CONFIG.PSU__FPDMASTERS_COHERENCY {0} \ + CONFIG.PSU__FPD_SLCR__WDT1__ACT_FREQMHZ {99.999001} \ + CONFIG.PSU__FPD_SLCR__WDT1__FREQMHZ {99.999001} \ + CONFIG.PSU__FPD_SLCR__WDT_CLK_SEL__SELECT {APB} \ + CONFIG.PSU__FPGA_PL0_ENABLE {1} \ + CONFIG.PSU__FPGA_PL1_ENABLE {1} \ + CONFIG.PSU__FPGA_PL2_ENABLE {1} \ + CONFIG.PSU__FPGA_PL3_ENABLE {1} \ + CONFIG.PSU__FP__POWER__ON {1} \ + CONFIG.PSU__FTM__CTI_IN_0 {0} \ + CONFIG.PSU__FTM__CTI_IN_1 {0} \ + CONFIG.PSU__FTM__CTI_IN_2 {0} \ + CONFIG.PSU__FTM__CTI_IN_3 {0} \ + CONFIG.PSU__FTM__CTI_OUT_0 {0} \ + CONFIG.PSU__FTM__CTI_OUT_1 {0} \ + CONFIG.PSU__FTM__CTI_OUT_2 {0} \ + CONFIG.PSU__FTM__CTI_OUT_3 {0} \ + CONFIG.PSU__FTM__GPI {0} \ + CONFIG.PSU__FTM__GPO {0} \ + CONFIG.PSU__GEM0_COHERENCY {0} \ + CONFIG.PSU__GEM0_ROUTE_THROUGH_FPD {0} \ + CONFIG.PSU__GEM1_COHERENCY {0} \ + CONFIG.PSU__GEM1_ROUTE_THROUGH_FPD {0} \ + CONFIG.PSU__GEM2_COHERENCY {0} \ + CONFIG.PSU__GEM2_ROUTE_THROUGH_FPD {0} \ + CONFIG.PSU__GEM3_COHERENCY {0} \ + CONFIG.PSU__GEM3_ROUTE_THROUGH_FPD {0} \ + CONFIG.PSU__GEM__TSU__ENABLE {0} \ + CONFIG.PSU__GEN_IPI_0__MASTER {APU} \ + CONFIG.PSU__GEN_IPI_10__MASTER {NONE} \ + CONFIG.PSU__GEN_IPI_1__MASTER {RPU0} \ + CONFIG.PSU__GEN_IPI_2__MASTER {RPU1} \ + CONFIG.PSU__GEN_IPI_3__MASTER {PMU} \ + CONFIG.PSU__GEN_IPI_4__MASTER {PMU} \ + CONFIG.PSU__GEN_IPI_5__MASTER {PMU} \ + CONFIG.PSU__GEN_IPI_6__MASTER {PMU} \ + CONFIG.PSU__GEN_IPI_7__MASTER {NONE} \ + CONFIG.PSU__GEN_IPI_8__MASTER {NONE} \ + CONFIG.PSU__GEN_IPI_9__MASTER {NONE} \ + CONFIG.PSU__GPIO0_MIO__IO {MIO 0 .. 25} \ + CONFIG.PSU__GPIO0_MIO__PERIPHERAL__ENABLE {1} \ + CONFIG.PSU__GPIO1_MIO__IO {MIO 26 .. 51} \ + CONFIG.PSU__GPIO1_MIO__PERIPHERAL__ENABLE {1} \ + CONFIG.PSU__GPIO2_MIO__PERIPHERAL__ENABLE {0} \ + CONFIG.PSU__GPIO_EMIO_WIDTH {32} \ + CONFIG.PSU__GPIO_EMIO__PERIPHERAL__ENABLE {1} \ + CONFIG.PSU__GPIO_EMIO__PERIPHERAL__IO {32} \ + CONFIG.PSU__GPIO_EMIO__WIDTH {[91:0]} \ + CONFIG.PSU__GPU_PP0__POWER__ON {0} \ + CONFIG.PSU__GPU_PP1__POWER__ON {0} \ + CONFIG.PSU__GT_REF_CLK__FREQMHZ {33.333} \ + CONFIG.PSU__GT__PRE_EMPH_LVL_4 {} \ + CONFIG.PSU__GT__VLT_SWNG_LVL_4 {} \ + CONFIG.PSU__HIGH_ADDRESS__ENABLE {1} \ + CONFIG.PSU__HPM0_FPD__NUM_READ_THREADS {4} \ + CONFIG.PSU__HPM0_FPD__NUM_WRITE_THREADS {4} \ + CONFIG.PSU__HPM0_LPD__NUM_READ_THREADS {4} \ + CONFIG.PSU__HPM0_LPD__NUM_WRITE_THREADS {4} \ + CONFIG.PSU__HPM1_FPD__NUM_READ_THREADS {4} \ + CONFIG.PSU__HPM1_FPD__NUM_WRITE_THREADS {4} \ + CONFIG.PSU__I2C0_LOOP_I2C1__ENABLE {0} \ + CONFIG.PSU__I2C0__GRP_INT__ENABLE {0} \ + CONFIG.PSU__I2C0__PERIPHERAL__ENABLE {1} \ + CONFIG.PSU__I2C0__PERIPHERAL__IO {MIO 2 .. 3} \ + CONFIG.PSU__I2C1__GRP_INT__ENABLE {0} \ + CONFIG.PSU__I2C1__PERIPHERAL__ENABLE {1} \ + CONFIG.PSU__I2C1__PERIPHERAL__IO {MIO 36 .. 37} \ + CONFIG.PSU__IOU_SLCR__IOU_TTC_APB_CLK__TTC0_SEL {APB} \ + CONFIG.PSU__IOU_SLCR__IOU_TTC_APB_CLK__TTC1_SEL {APB} \ + CONFIG.PSU__IOU_SLCR__IOU_TTC_APB_CLK__TTC2_SEL {APB} \ + CONFIG.PSU__IOU_SLCR__IOU_TTC_APB_CLK__TTC3_SEL {APB} \ + CONFIG.PSU__IOU_SLCR__TTC0__ACT_FREQMHZ {100} \ + CONFIG.PSU__IOU_SLCR__TTC0__FREQMHZ {100} \ + CONFIG.PSU__IOU_SLCR__TTC1__ACT_FREQMHZ {100} \ + CONFIG.PSU__IOU_SLCR__TTC1__FREQMHZ {100} \ + CONFIG.PSU__IOU_SLCR__TTC2__ACT_FREQMHZ {100} \ + CONFIG.PSU__IOU_SLCR__TTC2__FREQMHZ {100} \ + CONFIG.PSU__IOU_SLCR__TTC3__ACT_FREQMHZ {100} \ + CONFIG.PSU__IOU_SLCR__TTC3__FREQMHZ {100} \ + CONFIG.PSU__IOU_SLCR__WDT0__ACT_FREQMHZ {99.999001} \ + CONFIG.PSU__IOU_SLCR__WDT0__FREQMHZ {99.999001} \ + CONFIG.PSU__IOU_SLCR__WDT_CLK_SEL__SELECT {APB} \ + CONFIG.PSU__IRQ_P2F_ADMA_CHAN__INT {0} \ + CONFIG.PSU__IRQ_P2F_AIB_AXI__INT {0} \ + CONFIG.PSU__IRQ_P2F_AMS__INT {0} \ + CONFIG.PSU__IRQ_P2F_APM_FPD__INT {0} \ + CONFIG.PSU__IRQ_P2F_APU_COMM__INT {0} \ + CONFIG.PSU__IRQ_P2F_APU_CPUMNT__INT {0} \ + CONFIG.PSU__IRQ_P2F_APU_CTI__INT {0} \ + CONFIG.PSU__IRQ_P2F_APU_EXTERR__INT {0} \ + CONFIG.PSU__IRQ_P2F_APU_IPI__INT {0} \ + CONFIG.PSU__IRQ_P2F_APU_L2ERR__INT {0} \ + CONFIG.PSU__IRQ_P2F_APU_PMU__INT {0} \ + CONFIG.PSU__IRQ_P2F_APU_REGS__INT {0} \ + CONFIG.PSU__IRQ_P2F_ATB_LPD__INT {0} \ + CONFIG.PSU__IRQ_P2F_CAN0__INT {0} \ + CONFIG.PSU__IRQ_P2F_CAN1__INT {0} \ + CONFIG.PSU__IRQ_P2F_CLKMON__INT {0} \ + CONFIG.PSU__IRQ_P2F_CSUPMU_WDT__INT {0} \ + CONFIG.PSU__IRQ_P2F_CSU_DMA__INT {0} \ + CONFIG.PSU__IRQ_P2F_CSU__INT {0} \ + CONFIG.PSU__IRQ_P2F_DDR_SS__INT {0} \ + CONFIG.PSU__IRQ_P2F_DPDMA__INT {0} \ + CONFIG.PSU__IRQ_P2F_DPORT__INT {0} \ + CONFIG.PSU__IRQ_P2F_EFUSE__INT {0} \ + CONFIG.PSU__IRQ_P2F_ENT0_WAKEUP__INT {0} \ + CONFIG.PSU__IRQ_P2F_ENT0__INT {0} \ + CONFIG.PSU__IRQ_P2F_ENT1_WAKEUP__INT {0} \ + CONFIG.PSU__IRQ_P2F_ENT1__INT {0} \ + CONFIG.PSU__IRQ_P2F_ENT2_WAKEUP__INT {0} \ + CONFIG.PSU__IRQ_P2F_ENT2__INT {0} \ + CONFIG.PSU__IRQ_P2F_ENT3_WAKEUP__INT {0} \ + CONFIG.PSU__IRQ_P2F_ENT3__INT {0} \ + CONFIG.PSU__IRQ_P2F_FPD_APB__INT {0} \ + CONFIG.PSU__IRQ_P2F_FPD_ATB_ERR__INT {0} \ + CONFIG.PSU__IRQ_P2F_FP_WDT__INT {0} \ + CONFIG.PSU__IRQ_P2F_GDMA_CHAN__INT {0} \ + CONFIG.PSU__IRQ_P2F_GPIO__INT {0} \ + CONFIG.PSU__IRQ_P2F_GPU__INT {0} \ + CONFIG.PSU__IRQ_P2F_I2C0__INT {0} \ + CONFIG.PSU__IRQ_P2F_I2C1__INT {0} \ + CONFIG.PSU__IRQ_P2F_LPD_APB__INT {0} \ + CONFIG.PSU__IRQ_P2F_LPD_APM__INT {0} \ + CONFIG.PSU__IRQ_P2F_LP_WDT__INT {0} \ + CONFIG.PSU__IRQ_P2F_NAND__INT {0} \ + CONFIG.PSU__IRQ_P2F_OCM_ERR__INT {0} \ + CONFIG.PSU__IRQ_P2F_PCIE_DMA__INT {0} \ + CONFIG.PSU__IRQ_P2F_PCIE_LEGACY__INT {0} \ + CONFIG.PSU__IRQ_P2F_PCIE_MSC__INT {0} \ + CONFIG.PSU__IRQ_P2F_PCIE_MSI__INT {0} \ + CONFIG.PSU__IRQ_P2F_PL_IPI__INT {0} \ + CONFIG.PSU__IRQ_P2F_QSPI__INT {0} \ + CONFIG.PSU__IRQ_P2F_R5_CORE0_ECC_ERR__INT {0} \ + CONFIG.PSU__IRQ_P2F_R5_CORE1_ECC_ERR__INT {0} \ + CONFIG.PSU__IRQ_P2F_RPU_IPI__INT {0} \ + CONFIG.PSU__IRQ_P2F_RPU_PERMON__INT {0} \ + CONFIG.PSU__IRQ_P2F_RTC_ALARM__INT {0} \ + CONFIG.PSU__IRQ_P2F_RTC_SECONDS__INT {0} \ + CONFIG.PSU__IRQ_P2F_SATA__INT {0} \ + CONFIG.PSU__IRQ_P2F_SDIO0_WAKE__INT {0} \ + CONFIG.PSU__IRQ_P2F_SDIO0__INT {0} \ + CONFIG.PSU__IRQ_P2F_SDIO1_WAKE__INT {0} \ + CONFIG.PSU__IRQ_P2F_SDIO1__INT {0} \ + CONFIG.PSU__IRQ_P2F_SPI0__INT {0} \ + CONFIG.PSU__IRQ_P2F_SPI1__INT {0} \ + CONFIG.PSU__IRQ_P2F_TTC0__INT0 {0} \ + CONFIG.PSU__IRQ_P2F_TTC0__INT1 {0} \ + CONFIG.PSU__IRQ_P2F_TTC0__INT2 {0} \ + CONFIG.PSU__IRQ_P2F_TTC1__INT0 {0} \ + CONFIG.PSU__IRQ_P2F_TTC1__INT1 {0} \ + CONFIG.PSU__IRQ_P2F_TTC1__INT2 {0} \ + CONFIG.PSU__IRQ_P2F_TTC2__INT0 {0} \ + CONFIG.PSU__IRQ_P2F_TTC2__INT1 {0} \ + CONFIG.PSU__IRQ_P2F_TTC2__INT2 {0} \ + CONFIG.PSU__IRQ_P2F_TTC3__INT0 {0} \ + CONFIG.PSU__IRQ_P2F_TTC3__INT1 {0} \ + CONFIG.PSU__IRQ_P2F_TTC3__INT2 {0} \ + CONFIG.PSU__IRQ_P2F_UART0__INT {0} \ + CONFIG.PSU__IRQ_P2F_UART1__INT {0} \ + CONFIG.PSU__IRQ_P2F_USB3_ENDPOINT__INT0 {0} \ + CONFIG.PSU__IRQ_P2F_USB3_ENDPOINT__INT1 {0} \ + CONFIG.PSU__IRQ_P2F_USB3_OTG__INT0 {0} \ + CONFIG.PSU__IRQ_P2F_USB3_OTG__INT1 {0} \ + CONFIG.PSU__IRQ_P2F_USB3_PMU_WAKEUP__INT {0} \ + CONFIG.PSU__IRQ_P2F_XMPU_FPD__INT {0} \ + CONFIG.PSU__IRQ_P2F_XMPU_LPD__INT {0} \ + CONFIG.PSU__IRQ_P2F__INTF_FPD_SMMU__INT {0} \ + CONFIG.PSU__IRQ_P2F__INTF_PPD_CCI__INT {0} \ + CONFIG.PSU__L2_BANK0__POWER__ON {1} \ + CONFIG.PSU__LPDMA0_COHERENCY {0} \ + CONFIG.PSU__LPDMA1_COHERENCY {0} \ + CONFIG.PSU__LPDMA2_COHERENCY {0} \ + CONFIG.PSU__LPDMA3_COHERENCY {0} \ + CONFIG.PSU__LPDMA4_COHERENCY {0} \ + CONFIG.PSU__LPDMA5_COHERENCY {0} \ + CONFIG.PSU__LPDMA6_COHERENCY {0} \ + CONFIG.PSU__LPDMA7_COHERENCY {0} \ + CONFIG.PSU__LPD_SLCR__CSUPMU_WDT_CLK_SEL__SELECT {APB} \ + CONFIG.PSU__LPD_SLCR__CSUPMU__ACT_FREQMHZ {100.000000} \ + CONFIG.PSU__LPD_SLCR__CSUPMU__FREQMHZ {100.000000} \ + CONFIG.PSU__MAXIGP0__DATA_WIDTH {32} \ + CONFIG.PSU__MAXIGP1__DATA_WIDTH {128} \ + CONFIG.PSU__MAXIGP2__DATA_WIDTH {32} \ + CONFIG.PSU__M_AXI_GP0_SUPPORTS_NARROW_BURST {1} \ + CONFIG.PSU__M_AXI_GP1_SUPPORTS_NARROW_BURST {1} \ + CONFIG.PSU__M_AXI_GP2_SUPPORTS_NARROW_BURST {1} \ + CONFIG.PSU__NAND_COHERENCY {0} \ + CONFIG.PSU__NAND_ROUTE_THROUGH_FPD {0} \ + CONFIG.PSU__NAND__CHIP_ENABLE__ENABLE {0} \ + CONFIG.PSU__NAND__DATA_STROBE__ENABLE {0} \ + CONFIG.PSU__NAND__PERIPHERAL__ENABLE {0} \ + CONFIG.PSU__NAND__READY0_BUSY__ENABLE {0} \ + CONFIG.PSU__NAND__READY1_BUSY__ENABLE {0} \ + CONFIG.PSU__NAND__READY_BUSY__ENABLE {0} \ + CONFIG.PSU__NUM_FABRIC_RESETS {4} \ + CONFIG.PSU__OCM_BANK0__POWER__ON {1} \ + CONFIG.PSU__OCM_BANK1__POWER__ON {1} \ + CONFIG.PSU__OCM_BANK2__POWER__ON {1} \ + CONFIG.PSU__OCM_BANK3__POWER__ON {1} \ + CONFIG.PSU__OVERRIDE__BASIC_CLOCK {0} \ + CONFIG.PSU__PCIE__ACS_VIOLAION {0} \ + CONFIG.PSU__PCIE__ACS_VIOLATION {0} \ + CONFIG.PSU__PCIE__AER_CAPABILITY {0} \ + CONFIG.PSU__PCIE__ATOMICOP_EGRESS_BLOCKED {0} \ + CONFIG.PSU__PCIE__BAR0_64BIT {0} \ + CONFIG.PSU__PCIE__BAR0_ENABLE {0} \ + CONFIG.PSU__PCIE__BAR0_PREFETCHABLE {0} \ + CONFIG.PSU__PCIE__BAR0_VAL {} \ + CONFIG.PSU__PCIE__BAR1_64BIT {0} \ + CONFIG.PSU__PCIE__BAR1_ENABLE {0} \ + CONFIG.PSU__PCIE__BAR1_PREFETCHABLE {0} \ + CONFIG.PSU__PCIE__BAR1_VAL {} \ + CONFIG.PSU__PCIE__BAR2_64BIT {0} \ + CONFIG.PSU__PCIE__BAR2_ENABLE {0} \ + CONFIG.PSU__PCIE__BAR2_PREFETCHABLE {0} \ + CONFIG.PSU__PCIE__BAR2_VAL {} \ + CONFIG.PSU__PCIE__BAR3_64BIT {0} \ + CONFIG.PSU__PCIE__BAR3_ENABLE {0} \ + CONFIG.PSU__PCIE__BAR3_PREFETCHABLE {0} \ + CONFIG.PSU__PCIE__BAR3_VAL {} \ + CONFIG.PSU__PCIE__BAR4_64BIT {0} \ + CONFIG.PSU__PCIE__BAR4_ENABLE {0} \ + CONFIG.PSU__PCIE__BAR4_PREFETCHABLE {0} \ + CONFIG.PSU__PCIE__BAR4_VAL {} \ + CONFIG.PSU__PCIE__BAR5_64BIT {0} \ + CONFIG.PSU__PCIE__BAR5_ENABLE {0} \ + CONFIG.PSU__PCIE__BAR5_PREFETCHABLE {0} \ + CONFIG.PSU__PCIE__BAR5_VAL {} \ + CONFIG.PSU__PCIE__CLASS_CODE_BASE {} \ + CONFIG.PSU__PCIE__CLASS_CODE_INTERFACE {} \ + CONFIG.PSU__PCIE__CLASS_CODE_SUB {} \ + CONFIG.PSU__PCIE__CLASS_CODE_VALUE {} \ + CONFIG.PSU__PCIE__COMPLETER_ABORT {0} \ + CONFIG.PSU__PCIE__COMPLTION_TIMEOUT {0} \ + CONFIG.PSU__PCIE__CORRECTABLE_INT_ERR {0} \ + CONFIG.PSU__PCIE__CRS_SW_VISIBILITY {0} \ + CONFIG.PSU__PCIE__DEVICE_ID {} \ + CONFIG.PSU__PCIE__ECRC_CHECK {0} \ + CONFIG.PSU__PCIE__ECRC_ERR {0} \ + CONFIG.PSU__PCIE__ECRC_GEN {0} \ + CONFIG.PSU__PCIE__EROM_ENABLE {0} \ + CONFIG.PSU__PCIE__EROM_VAL {} \ + CONFIG.PSU__PCIE__FLOW_CONTROL_ERR {0} \ + CONFIG.PSU__PCIE__FLOW_CONTROL_PROTOCOL_ERR {0} \ + CONFIG.PSU__PCIE__HEADER_LOG_OVERFLOW {0} \ + CONFIG.PSU__PCIE__INTX_GENERATION {0} \ + CONFIG.PSU__PCIE__LANE0__ENABLE {0} \ + CONFIG.PSU__PCIE__LANE1__ENABLE {0} \ + CONFIG.PSU__PCIE__LANE2__ENABLE {0} \ + CONFIG.PSU__PCIE__LANE3__ENABLE {0} \ + CONFIG.PSU__PCIE__MC_BLOCKED_TLP {0} \ + CONFIG.PSU__PCIE__MSIX_BAR_INDICATOR {} \ + CONFIG.PSU__PCIE__MSIX_CAPABILITY {0} \ + CONFIG.PSU__PCIE__MSIX_PBA_BAR_INDICATOR {} \ + CONFIG.PSU__PCIE__MSIX_PBA_OFFSET {0} \ + CONFIG.PSU__PCIE__MSIX_TABLE_OFFSET {0} \ + CONFIG.PSU__PCIE__MSIX_TABLE_SIZE {0} \ + CONFIG.PSU__PCIE__MSI_64BIT_ADDR_CAPABLE {0} \ + CONFIG.PSU__PCIE__MSI_CAPABILITY {0} \ + CONFIG.PSU__PCIE__MULTIHEADER {0} \ + CONFIG.PSU__PCIE__PERIPHERAL__ENABLE {0} \ + CONFIG.PSU__PCIE__PERIPHERAL__ENDPOINT_ENABLE {1} \ + CONFIG.PSU__PCIE__PERIPHERAL__ROOTPORT_ENABLE {0} \ + CONFIG.PSU__PCIE__PERM_ROOT_ERR_UPDATE {0} \ + CONFIG.PSU__PCIE__RECEIVER_ERR {0} \ + CONFIG.PSU__PCIE__RECEIVER_OVERFLOW {0} \ + CONFIG.PSU__PCIE__RESET__POLARITY {Active Low} \ + CONFIG.PSU__PCIE__REVISION_ID {} \ + CONFIG.PSU__PCIE__SUBSYSTEM_ID {} \ + CONFIG.PSU__PCIE__SUBSYSTEM_VENDOR_ID {} \ + CONFIG.PSU__PCIE__SURPRISE_DOWN {0} \ + CONFIG.PSU__PCIE__TLP_PREFIX_BLOCKED {0} \ + CONFIG.PSU__PCIE__UNCORRECTABL_INT_ERR {0} \ + CONFIG.PSU__PCIE__VENDOR_ID {} \ + CONFIG.PSU__PJTAG__PERIPHERAL__ENABLE {0} \ + CONFIG.PSU__PL_CLK0_BUF {TRUE} \ + CONFIG.PSU__PL_CLK1_BUF {TRUE} \ + CONFIG.PSU__PL_CLK2_BUF {TRUE} \ + CONFIG.PSU__PL_CLK3_BUF {TRUE} \ + CONFIG.PSU__PL__POWER__ON {1} \ + CONFIG.PSU__PMU_COHERENCY {0} \ + CONFIG.PSU__PMU__AIBACK__ENABLE {0} \ + CONFIG.PSU__PMU__EMIO_GPI__ENABLE {0} \ + CONFIG.PSU__PMU__EMIO_GPO__ENABLE {0} \ + CONFIG.PSU__PMU__GPI0__ENABLE {0} \ + CONFIG.PSU__PMU__GPI1__ENABLE {0} \ + CONFIG.PSU__PMU__GPI2__ENABLE {0} \ + CONFIG.PSU__PMU__GPI3__ENABLE {0} \ + CONFIG.PSU__PMU__GPI4__ENABLE {0} \ + CONFIG.PSU__PMU__GPI5__ENABLE {0} \ + CONFIG.PSU__PMU__GPO0__ENABLE {0} \ + CONFIG.PSU__PMU__GPO1__ENABLE {0} \ + CONFIG.PSU__PMU__GPO2__ENABLE {1} \ + CONFIG.PSU__PMU__GPO2__IO {MIO 34} \ + CONFIG.PSU__PMU__GPO2__POLARITY {high} \ + CONFIG.PSU__PMU__GPO3__ENABLE {1} \ + CONFIG.PSU__PMU__GPO3__IO {MIO 35} \ + CONFIG.PSU__PMU__GPO3__POLARITY {high} \ + CONFIG.PSU__PMU__GPO4__ENABLE {0} \ + CONFIG.PSU__PMU__GPO5__ENABLE {0} \ + CONFIG.PSU__PMU__PERIPHERAL__ENABLE {1} \ + CONFIG.PSU__PMU__PLERROR__ENABLE {0} \ + CONFIG.PSU__PRESET_APPLIED {0} \ + CONFIG.PSU__PROTECTION__DDR_SEGMENTS {NONE} \ + CONFIG.PSU__PROTECTION__DEBUG {0} \ + CONFIG.PSU__PROTECTION__ENABLE {0} \ + CONFIG.PSU__PROTECTION__FPD_SEGMENTS {SA:0xFD1A0000 ;SIZE:1280;UNIT:KB ;RegionTZ:Secure ;WrAllowed:Read/Write;subsystemId:PMU Firmware | SA:0xFD000000 ;SIZE:64;UNIT:KB ;RegionTZ:Secure ;WrAllowed:Read/Write;subsystemId:PMU Firmware | SA:0xFD010000 ;SIZE:64;UNIT:KB ;RegionTZ:Secure ;WrAllowed:Read/Write;subsystemId:PMU Firmware | SA:0xFD020000 ;SIZE:64;UNIT:KB ;RegionTZ:Secure ;WrAllowed:Read/Write;subsystemId:PMU Firmware | SA:0xFD030000 ;SIZE:64;UNIT:KB ;RegionTZ:Secure ;WrAllowed:Read/Write;subsystemId:PMU Firmware | SA:0xFD040000 ;SIZE:64;UNIT:KB ;RegionTZ:Secure ;WrAllowed:Read/Write;subsystemId:PMU Firmware | SA:0xFD050000 ;SIZE:64;UNIT:KB ;RegionTZ:Secure ;WrAllowed:Read/Write;subsystemId:PMU Firmware | SA:0xFD610000 ;SIZE:512;UNIT:KB ;RegionTZ:Secure ;WrAllowed:Read/Write;subsystemId:PMU Firmware | SA:0xFD5D0000 ;SIZE:64;UNIT:KB ;RegionTZ:Secure ;WrAllowed:Read/Write;subsystemId:PMU Firmware} \ + CONFIG.PSU__PROTECTION__LOCK_UNUSED_SEGMENTS {0} \ + CONFIG.PSU__PROTECTION__LPD_SEGMENTS {SA:0xFF980000 ;SIZE:64;UNIT:KB ;RegionTZ:Secure ;WrAllowed:Read/Write;subsystemId:PMU Firmware|SA:0xFF5E0000 ;SIZE:2560;UNIT:KB ;RegionTZ:Secure ;WrAllowed:Read/Write;subsystemId:PMU Firmware|SA:0xFFCC0000 ;SIZE:64;UNIT:KB ;RegionTZ:Secure ;WrAllowed:Read/Write;subsystemId:PMU Firmware|SA:0xFF180000 ;SIZE:768;UNIT:KB ;RegionTZ:Secure ;WrAllowed:Read/Write;subsystemId:PMU Firmware|SA:0xFF410000 ;SIZE:640;UNIT:KB ;RegionTZ:Secure ;WrAllowed:Read/Write;subsystemId:PMU Firmware|SA:0xFFA70000 ;SIZE:64;UNIT:KB ;RegionTZ:Secure ;WrAllowed:Read/Write;subsystemId:PMU Firmware|SA:0xFF9A0000 ;SIZE:64;UNIT:KB ;RegionTZ:Secure ;WrAllowed:Read/Write;subsystemId:PMU Firmware} \ + CONFIG.PSU__PROTECTION__MASTERS {USB1:NonSecure;0|USB0:NonSecure;1|S_AXI_LPD:NA;0|S_AXI_HPC1_FPD:NA;1|S_AXI_HPC0_FPD:NA;1|S_AXI_HP3_FPD:NA;0|S_AXI_HP2_FPD:NA;0|S_AXI_HP1_FPD:NA;1|S_AXI_HP0_FPD:NA;1|S_AXI_ACP:NA;0|S_AXI_ACE:NA;0|SD1:NonSecure;1|SD0:NonSecure;1|SATA1:NonSecure;0|SATA0:NonSecure;0|RPU1:Secure;1|RPU0:Secure;1|QSPI:NonSecure;0|PMU:NA;1|PCIe:NonSecure;0|NAND:NonSecure;0|LDMA:NonSecure;1|GPU:NonSecure;1|GEM3:NonSecure;1|GEM2:NonSecure;0|GEM1:NonSecure;0|GEM0:NonSecure;0|FDMA:NonSecure;1|DP:NonSecure;0|DAP:NA;1|Coresight:NA;1|CSU:NA;1|APU:NA;1} \ + CONFIG.PSU__PROTECTION__MASTERS_TZ {GEM0:NonSecure|SD1:NonSecure|GEM2:NonSecure|GEM1:NonSecure|GEM3:NonSecure|PCIe:NonSecure|DP:NonSecure|NAND:NonSecure|GPU:NonSecure|USB1:NonSecure|USB0:NonSecure|LDMA:NonSecure|FDMA:NonSecure|QSPI:NonSecure|SD0:NonSecure} \ + CONFIG.PSU__PROTECTION__OCM_SEGMENTS {NONE} \ + CONFIG.PSU__PROTECTION__PRESUBSYSTEMS {NONE} \ + CONFIG.PSU__PROTECTION__SLAVES {LPD;USB3_1_XHCI;FE300000;FE3FFFFF;0|LPD;USB3_1;FF9E0000;FF9EFFFF;0|LPD;USB3_0_XHCI;FE200000;FE2FFFFF;1|LPD;USB3_0;FF9D0000;FF9DFFFF;1|LPD;UART1;FF010000;FF01FFFF;1|LPD;UART0;FF000000;FF00FFFF;1|LPD;TTC3;FF140000;FF14FFFF;0|LPD;TTC2;FF130000;FF13FFFF;0|LPD;TTC1;FF120000;FF12FFFF;0|LPD;TTC0;FF110000;FF11FFFF;0|FPD;SWDT1;FD4D0000;FD4DFFFF;1|LPD;SWDT0;FF150000;FF15FFFF;0|LPD;SPI1;FF050000;FF05FFFF;1|LPD;SPI0;FF040000;FF04FFFF;0|FPD;SMMU_REG;FD5F0000;FD5FFFFF;1|FPD;SMMU;FD800000;FDFFFFFF;1|FPD;SIOU;FD3D0000;FD3DFFFF;1|FPD;SERDES;FD400000;FD47FFFF;1|LPD;SD1;FF170000;FF17FFFF;1|LPD;SD0;FF160000;FF16FFFF;1|FPD;SATA;FD0C0000;FD0CFFFF;0|LPD;RTC;FFA60000;FFA6FFFF;1|LPD;RSA_CORE;FFCE0000;FFCEFFFF;1|LPD;RPU;FF9A0000;FF9AFFFF;1|LPD;R5_TCM_RAM_GLOBAL;FFE00000;FFE3FFFF;1|LPD;R5_1_Instruction_Cache;FFEC0000;FFECFFFF;1|LPD;R5_1_Data_Cache;FFED0000;FFEDFFFF;1|LPD;R5_1_BTCM_GLOBAL;FFEB0000;FFEBFFFF;1|LPD;R5_1_ATCM_GLOBAL;FFE90000;FFE9FFFF;1|LPD;R5_0_Instruction_Cache;FFE40000;FFE4FFFF;1|LPD;R5_0_Data_Cache;FFE50000;FFE5FFFF;1|LPD;R5_0_BTCM_GLOBAL;FFE20000;FFE2FFFF;1|LPD;R5_0_ATCM_GLOBAL;FFE00000;FFE0FFFF;1|LPD;QSPI_Linear_Address;C0000000;DFFFFFFF;1|LPD;QSPI;FF0F0000;FF0FFFFF;0|LPD;PMU_RAM;FFDC0000;FFDDFFFF;1|LPD;PMU_GLOBAL;FFD80000;FFDBFFFF;1|FPD;PCIE_MAIN;FD0E0000;FD0EFFFF;0|FPD;PCIE_LOW;E0000000;EFFFFFFF;0|FPD;PCIE_HIGH2;8000000000;BFFFFFFFFF;0|FPD;PCIE_HIGH1;600000000;7FFFFFFFF;0|FPD;PCIE_DMA;FD0F0000;FD0FFFFF;0|FPD;PCIE_ATTRIB;FD480000;FD48FFFF;0|LPD;OCM_XMPU_CFG;FFA70000;FFA7FFFF;1|LPD;OCM_SLCR;FF960000;FF96FFFF;1|OCM;OCM;FFFC0000;FFFFFFFF;1|LPD;NAND;FF100000;FF10FFFF;0|LPD;MBISTJTAG;FFCF0000;FFCFFFFF;1|LPD;LPD_XPPU_SINK;FF9C0000;FF9CFFFF;1|LPD;LPD_XPPU;FF980000;FF98FFFF;1|LPD;LPD_SLCR_SECURE;FF4B0000;FF4DFFFF;1|LPD;LPD_SLCR;FF410000;FF4AFFFF;1|LPD;LPD_GPV;FE100000;FE1FFFFF;1|LPD;LPD_DMA_7;FFAF0000;FFAFFFFF;1|LPD;LPD_DMA_6;FFAE0000;FFAEFFFF;1|LPD;LPD_DMA_5;FFAD0000;FFADFFFF;1|LPD;LPD_DMA_4;FFAC0000;FFACFFFF;1|LPD;LPD_DMA_3;FFAB0000;FFABFFFF;1|LPD;LPD_DMA_2;FFAA0000;FFAAFFFF;1|LPD;LPD_DMA_1;FFA90000;FFA9FFFF;1|LPD;LPD_DMA_0;FFA80000;FFA8FFFF;1|LPD;IPI_CTRL;FF380000;FF3FFFFF;1|LPD;IOU_SLCR;FF180000;FF23FFFF;1|LPD;IOU_SECURE_SLCR;FF240000;FF24FFFF;1|LPD;IOU_SCNTRS;FF260000;FF26FFFF;1|LPD;IOU_SCNTR;FF250000;FF25FFFF;1|LPD;IOU_GPV;FE000000;FE0FFFFF;1|LPD;I2C1;FF030000;FF03FFFF;1|LPD;I2C0;FF020000;FF02FFFF;1|FPD;GPU;FD4B0000;FD4BFFFF;0|LPD;GPIO;FF0A0000;FF0AFFFF;1|LPD;GEM3;FF0E0000;FF0EFFFF;1|LPD;GEM2;FF0D0000;FF0DFFFF;0|LPD;GEM1;FF0C0000;FF0CFFFF;0|LPD;GEM0;FF0B0000;FF0BFFFF;0|FPD;FPD_XMPU_SINK;FD4F0000;FD4FFFFF;1|FPD;FPD_XMPU_CFG;FD5D0000;FD5DFFFF;1|FPD;FPD_SLCR_SECURE;FD690000;FD6CFFFF;1|FPD;FPD_SLCR;FD610000;FD68FFFF;1|FPD;FPD_GPV;FD700000;FD7FFFFF;1|FPD;FPD_DMA_CH7;FD570000;FD57FFFF;1|FPD;FPD_DMA_CH6;FD560000;FD56FFFF;1|FPD;FPD_DMA_CH5;FD550000;FD55FFFF;1|FPD;FPD_DMA_CH4;FD540000;FD54FFFF;1|FPD;FPD_DMA_CH3;FD530000;FD53FFFF;1|FPD;FPD_DMA_CH2;FD520000;FD52FFFF;1|FPD;FPD_DMA_CH1;FD510000;FD51FFFF;1|FPD;FPD_DMA_CH0;FD500000;FD50FFFF;1|LPD;EFUSE;FFCC0000;FFCCFFFF;1|FPD;Display Port;FD4A0000;FD4AFFFF;0|FPD;DPDMA;FD4C0000;FD4CFFFF;0|FPD;DDR_XMPU5_CFG;FD050000;FD05FFFF;1|FPD;DDR_XMPU4_CFG;FD040000;FD04FFFF;1|FPD;DDR_XMPU3_CFG;FD030000;FD03FFFF;1|FPD;DDR_XMPU2_CFG;FD020000;FD02FFFF;1|FPD;DDR_XMPU1_CFG;FD010000;FD01FFFF;1|FPD;DDR_XMPU0_CFG;FD000000;FD00FFFF;1|FPD;DDR_QOS_CTRL;FD090000;FD09FFFF;1|FPD;DDR_PHY;FD080000;FD08FFFF;1|DDR;DDR_LOW;0;7FFFFFFF;1|DDR;DDR_HIGH;800000000;87FFFFFFF;1|FPD;DDDR_CTRL;FD070000;FD070FFF;1|LPD;Coresight;FE800000;FEFFFFFF;1|LPD;CSU_DMA;FFC80000;FFC9FFFF;1|LPD;CSU;FFCA0000;FFCAFFFF;0|LPD;CRL_APB;FF5E0000;FF85FFFF;1|FPD;CRF_APB;FD1A0000;FD2DFFFF;1|FPD;CCI_REG;FD5E0000;FD5EFFFF;1|FPD;CCI_GPV;FD6E0000;FD6EFFFF;1|LPD;CAN1;FF070000;FF07FFFF;0|LPD;CAN0;FF060000;FF06FFFF;0|FPD;APU;FD5C0000;FD5CFFFF;1|LPD;APM_INTC_IOU;FFA20000;FFA2FFFF;1|LPD;APM_FPD_LPD;FFA30000;FFA3FFFF;1|FPD;APM_5;FD490000;FD49FFFF;1|FPD;APM_0;FD0B0000;FD0BFFFF;1|LPD;APM2;FFA10000;FFA1FFFF;1|LPD;APM1;FFA00000;FFA0FFFF;1|LPD;AMS;FFA50000;FFA5FFFF;1|FPD;AFI_5;FD3B0000;FD3BFFFF;1|FPD;AFI_4;FD3A0000;FD3AFFFF;1|FPD;AFI_3;FD390000;FD39FFFF;1|FPD;AFI_2;FD380000;FD38FFFF;1|FPD;AFI_1;FD370000;FD37FFFF;1|FPD;AFI_0;FD360000;FD36FFFF;1|LPD;AFIFM6;FF9B0000;FF9BFFFF;1|FPD;ACPU_GIC;F9010000;F907FFFF;1} \ + CONFIG.PSU__PROTECTION__SUBSYSTEMS {PMU Firmware:PMU} \ + CONFIG.PSU__PSS_ALT_REF_CLK__ENABLE {0} \ + CONFIG.PSU__PSS_ALT_REF_CLK__FREQMHZ {33.333} \ + CONFIG.PSU__PSS_REF_CLK__FREQMHZ {33.333} \ + CONFIG.PSU__QSPI_COHERENCY {0} \ + CONFIG.PSU__QSPI_ROUTE_THROUGH_FPD {0} \ + CONFIG.PSU__QSPI__GRP_FBCLK__ENABLE {0} \ + CONFIG.PSU__QSPI__PERIPHERAL__DATA_MODE {} \ + CONFIG.PSU__QSPI__PERIPHERAL__MODE {} \ + CONFIG.PSU__SPI0__GRP_SS1__ENABLE {0} \ + CONFIG.PSU__SPI0__GRP_SS2__ENABLE {0} \ + CONFIG.PSU__SPI0__PERIPHERAL__ENABLE {0} \ + CONFIG.PSU__SPI0__PERIPHERAL__IO {