From 319d8c6411f62a2150b21b38bfe5fd55366ee700 Mon Sep 17 00:00:00 2001
From: Wade Fife <wade.fife@ettus.com>
Date: Thu, 10 Jun 2021 11:45:58 -0500
Subject: fpga: x400: Add makefiles for RF testbenches

---
 fpga/usrp3/top/x400/rf/common/Makefile.srcs | 18 ++++++++++++++++++
 1 file changed, 18 insertions(+)
 create mode 100644 fpga/usrp3/top/x400/rf/common/Makefile.srcs

(limited to 'fpga/usrp3/top/x400/rf/common')

diff --git a/fpga/usrp3/top/x400/rf/common/Makefile.srcs b/fpga/usrp3/top/x400/rf/common/Makefile.srcs
new file mode 100644
index 000000000..956b2253f
--- /dev/null
+++ b/fpga/usrp3/top/x400/rf/common/Makefile.srcs
@@ -0,0 +1,18 @@
+#
+# Copyright 2021 Ettus Research, a National Instruments Brand
+#
+# SPDX-License-Identifier: LGPL-3.0-or-later
+#
+
+RF_COMMON_SRCS = $(abspath $(addprefix $(BASE_DIR)/../top/x400/rf/common/, \
+PkgRf.vhd \
+axis_mux.vhd \
+capture_sysref.v \
+clock_gates.vhd \
+gpio_to_axis_mux.vhd \
+rf_nco_reset.vhd \
+rf_reset.vhd \
+rf_reset_controller.vhd \
+scale_2x.vhd \
+sync_wrapper.v \
+))
-- 
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