From 6d3765605262016a80f71e36357f749ea35cbe5a Mon Sep 17 00:00:00 2001
From: Wade Fife <wade.fife@ettus.com>
Date: Tue, 8 Jun 2021 19:40:46 -0500
Subject: fpga: x400: Add support for X410 motherboard FPGA
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Co-authored-by: Andrew Moch <Andrew.Moch@ni.com>
Co-authored-by: Daniel Jepson <daniel.jepson@ni.com>
Co-authored-by: Javier Valenzuela <javier.valenzuela@ni.com>
Co-authored-by: Joerg Hofrichter <joerg.hofrichter@ni.com>
Co-authored-by: Kumaran Subramoniam <kumaran.subramoniam@ni.com>
Co-authored-by: Max Köhler <max.koehler@ni.com>
Co-authored-by: Michael Auchter <michael.auchter@ni.com>
Co-authored-by: Paul Butler <paul.butler@ni.com>
Co-authored-by: Wade Fife <wade.fife@ettus.com>
Co-authored-by: Hector Rubio <hrubio@ni.com>
---
 fpga/usrp3/top/x400/ip/ddr4_64bits/Makefile.inc | 18 ++++++++++++++++++
 1 file changed, 18 insertions(+)
 create mode 100644 fpga/usrp3/top/x400/ip/ddr4_64bits/Makefile.inc

(limited to 'fpga/usrp3/top/x400/ip/ddr4_64bits/Makefile.inc')

diff --git a/fpga/usrp3/top/x400/ip/ddr4_64bits/Makefile.inc b/fpga/usrp3/top/x400/ip/ddr4_64bits/Makefile.inc
new file mode 100644
index 000000000..4b3ebada2
--- /dev/null
+++ b/fpga/usrp3/top/x400/ip/ddr4_64bits/Makefile.inc
@@ -0,0 +1,18 @@
+#
+# Copyright 2021 Ettus Research, a National Instruments Brand
+#
+# SPDX-License-Identifier: LGPL-3.0-or-later
+#
+
+include $(TOOLS_DIR)/make/viv_ip_builder.mak
+
+IP_DDR4_64BITS_SRCS = \
+$(IP_BUILD_DIR)/ddr4_64bits/ddr4_64bits.xci 
+
+IP_DDR4_64BITS_OUTS = $(addprefix $(IP_BUILD_DIR)/ddr4_64bits/, \
+ddr4_64bits.xci.out \
+)
+
+
+$(IP_DDR4_64BITS_SRCS) $(IP_DDR4_64BITS_OUTS) : $(IP_DIR)/ddr4_64bits/ddr4_64bits.xci
+	$(call BUILD_VIVADO_IP,ddr4_64bits,$(ARCH),$(PART_ID),$(IP_DIR),$(IP_BUILD_DIR),0)
-- 
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