From e1ce4565dbc7336ee806adce7c087bda4fcc77ae Mon Sep 17 00:00:00 2001 From: Humberto Jimenez Date: Wed, 27 Oct 2021 14:54:46 -0500 Subject: fpga: x400: Refactor CPLDs build process This commit refactors the X410's CPLDs build process to make it similar to other FPGA targets within the repo. The new process relies on basic Quartus build utilities. Additionally, this commit adds support for an alternative MAX10 CPLD for the motherboard CPLD implementation. Both previous (10M04) and new variant (10M08) are supported concurrently. The images package mapping is updated to reflect these changes. --- fpga/usrp3/top/x400/doc/X4XX_FPGA_right.htm | 68 ++++++++++++++++++++++++----- 1 file changed, 56 insertions(+), 12 deletions(-) (limited to 'fpga/usrp3/top/x400/doc') diff --git a/fpga/usrp3/top/x400/doc/X4XX_FPGA_right.htm b/fpga/usrp3/top/x400/doc/X4XX_FPGA_right.htm index 88c73f60c..8280e353b 100644 --- a/fpga/usrp3/top/x400/doc/X4XX_FPGA_right.htm +++ b/fpga/usrp3/top/x400/doc/X4XX_FPGA_right.htm @@ -2338,9 +2338,9 @@ This enumeration is used to create the constants held in the basic registers. - 553721877 + 554767892 - 0x21012015 + 0x21111614

CPLD_REVISION

@@ -14556,10 +14556,12 @@ RFDC timing control interface.

FLASH_PRIMARY_IMAGE_ADDR_ENUM Enumeration

-Those values are the start and end address of the CFM image flash - sector from Intel's On-Chip Flash IP Generator. Note that the values - given in the IP generator are byte based where the values of this enum - are U32 based (divided by 4). +These values are the start and end address of the CFM image flash + sector from Intel's On-Chip Flash IP Generator. + Be aware that three different values exist per each of the two + supported MAX10 variants: 10M04 and 10M08 + Note that the values given in the IP generator are byte based where + the values of this enum are U32 based (divided by 4). @@ -14583,7 +14585,20 @@ Those values are the start and end address of the CFM image flash + + + + + + + + + + @@ -14596,7 +14611,20 @@ Those values are the start and end address of the CFM image flash + + + + + + + + + + @@ -14609,7 +14637,20 @@ Those values are the start and end address of the CFM image flash + + + + + + + + + + @@ -14999,9 +15040,12 @@ Total Offset =

Defines the sector to be erased. Has to be set latest with the write access which starts the erase operation by strobing FLASH_ERASE_STB.
- If the flash is configured to support memory initialization (see - FLASH_MEM_INIT_ENABLED flag) the sectors 2 to 4 have to be erased. - If the flag is not asserted only sector 4 has to be erased.

+ With 10M04 variants, if the flash is configured to support memory + initialization (see FLASH_MEM_INIT_ENABLED flag) the sectors 2 + to 4 have to be erased. If the flag is not asserted only sector 4 + has to be erased. + With 10M08 variants, the sectors to be erased are 3 to 5 when + using memory initialization or only sector 5 otherwise.

-- cgit v1.2.3
0x01000 -

FLASH_PRIMARY_IMAGE_START_ADDR_MEM_INIT

+

FLASH_PRIMARY_IMAGE_START_ADDR_MEM_INIT_10M04

+ +
81920x02000 +

FLASH_PRIMARY_IMAGE_START_ADDR_MEM_INIT_10M08

0x09C00 -

FLASH_PRIMARY_IMAGE_START_ADDR

+

FLASH_PRIMARY_IMAGE_START_ADDR_10M04

+ +
440320x0AC00 +

FLASH_PRIMARY_IMAGE_START_ADDR_10M08

0x127FF -

FLASH_PRIMARY_IMAGE_END_ADDR

+

FLASH_PRIMARY_IMAGE_END_ADDR_10M04

+ +
798710x137FF +

FLASH_PRIMARY_IMAGE_END_ADDR_10M08