From b63507efb3cf1a8fa20794c452d57028e18da182 Mon Sep 17 00:00:00 2001
From: Ben Hilburn <ben.hilburn@ettus.com>
Date: Tue, 22 Jul 2014 15:49:02 -0700
Subject: fpga: Updating FPGA code for UHD-3.7.2-rc1
---
fpga/usrp3/top/x300/coregen_dsp/coregen.cgp | 2 +-
fpga/usrp3/top/x300/coregen_dsp/hbdec1.gise | 2 +-
fpga/usrp3/top/x300/coregen_dsp/hbdec1.ncf | 0
fpga/usrp3/top/x300/coregen_dsp/hbdec1.xise | 4 ++--
fpga/usrp3/top/x300/coregen_dsp/hbdec2.gise | 2 +-
fpga/usrp3/top/x300/coregen_dsp/hbdec2.ncf | 0
fpga/usrp3/top/x300/coregen_dsp/hbdec2.xise | 4 ++--
fpga/usrp3/top/x300/coregen_dsp/hbdec3.gise | 2 +-
fpga/usrp3/top/x300/coregen_dsp/hbdec3.ncf | 0
fpga/usrp3/top/x300/coregen_dsp/hbdec3.xise | 4 ++--
fpga/usrp3/top/x300/coregen_dsp/hbint1.gise | 2 +-
fpga/usrp3/top/x300/coregen_dsp/hbint1.ncf | 0
fpga/usrp3/top/x300/coregen_dsp/hbint1.xise | 4 ++--
fpga/usrp3/top/x300/coregen_dsp/hbint2.gise | 2 +-
fpga/usrp3/top/x300/coregen_dsp/hbint2.ncf | 0
fpga/usrp3/top/x300/coregen_dsp/hbint2.xise | 4 ++--
fpga/usrp3/top/x300/coregen_dsp/hbint3.gise | 2 +-
fpga/usrp3/top/x300/coregen_dsp/hbint3.ncf | 0
fpga/usrp3/top/x300/coregen_dsp/hbint3.xise | 4 ++--
19 files changed, 19 insertions(+), 19 deletions(-)
create mode 100644 fpga/usrp3/top/x300/coregen_dsp/hbdec1.ncf
create mode 100644 fpga/usrp3/top/x300/coregen_dsp/hbdec2.ncf
create mode 100644 fpga/usrp3/top/x300/coregen_dsp/hbdec3.ncf
create mode 100644 fpga/usrp3/top/x300/coregen_dsp/hbint1.ncf
create mode 100644 fpga/usrp3/top/x300/coregen_dsp/hbint2.ncf
create mode 100644 fpga/usrp3/top/x300/coregen_dsp/hbint3.ncf
(limited to 'fpga/usrp3/top/x300/coregen_dsp')
diff --git a/fpga/usrp3/top/x300/coregen_dsp/coregen.cgp b/fpga/usrp3/top/x300/coregen_dsp/coregen.cgp
index 75b625f9b..593e2f179 100644
--- a/fpga/usrp3/top/x300/coregen_dsp/coregen.cgp
+++ b/fpga/usrp3/top/x300/coregen_dsp/coregen.cgp
@@ -1,6 +1,6 @@
SET busformat = BusFormatAngleBracketNotRipped
SET designentry = Verilog
-SET device = xc7k325t
+SET device = xc7k410t
SET devicefamily = kintex7
SET flowvendor = Other
SET package = ffg900
diff --git a/fpga/usrp3/top/x300/coregen_dsp/hbdec1.gise b/fpga/usrp3/top/x300/coregen_dsp/hbdec1.gise
index 89731aaf8..5caeab612 100644
--- a/fpga/usrp3/top/x300/coregen_dsp/hbdec1.gise
+++ b/fpga/usrp3/top/x300/coregen_dsp/hbdec1.gise
@@ -15,7 +15,7 @@
<!-- -->
- <!-- Copyright (c) 1995-2012 Xilinx, Inc. All rights reserved. -->
+ <!-- Copyright (c) 1995-2013 Xilinx, Inc. All rights reserved. -->
<version xmlns="http://www.xilinx.com/XMLSchema">11.1</version>
diff --git a/fpga/usrp3/top/x300/coregen_dsp/hbdec1.ncf b/fpga/usrp3/top/x300/coregen_dsp/hbdec1.ncf
new file mode 100644
index 000000000..e69de29bb
diff --git a/fpga/usrp3/top/x300/coregen_dsp/hbdec1.xise b/fpga/usrp3/top/x300/coregen_dsp/hbdec1.xise
index 0d52b5d47..61795798c 100644
--- a/fpga/usrp3/top/x300/coregen_dsp/hbdec1.xise
+++ b/fpga/usrp3/top/x300/coregen_dsp/hbdec1.xise
@@ -9,10 +9,10 @@
<!-- along with the project source files, is sufficient to open and -->
<!-- implement in ISE Project Navigator. -->
<!-- -->
- <!-- Copyright (c) 1995-2012 Xilinx, Inc. All rights reserved. -->
+ <!-- Copyright (c) 1995-2013 Xilinx, Inc. All rights reserved. -->
</header>
- <version xil_pn:ise_version="14.4" xil_pn:schema_version="2"/>
+ <version xil_pn:ise_version="14.6" xil_pn:schema_version="2"/>
<files>
<file xil_pn:name="hbdec1.ngc" xil_pn:type="FILE_NGC">
diff --git a/fpga/usrp3/top/x300/coregen_dsp/hbdec2.gise b/fpga/usrp3/top/x300/coregen_dsp/hbdec2.gise
index 3a0d858e5..e87ebf933 100644
--- a/fpga/usrp3/top/x300/coregen_dsp/hbdec2.gise
+++ b/fpga/usrp3/top/x300/coregen_dsp/hbdec2.gise
@@ -15,7 +15,7 @@
<!-- -->
- <!-- Copyright (c) 1995-2012 Xilinx, Inc. All rights reserved. -->
+ <!-- Copyright (c) 1995-2013 Xilinx, Inc. All rights reserved. -->
<version xmlns="http://www.xilinx.com/XMLSchema">11.1</version>
diff --git a/fpga/usrp3/top/x300/coregen_dsp/hbdec2.ncf b/fpga/usrp3/top/x300/coregen_dsp/hbdec2.ncf
new file mode 100644
index 000000000..e69de29bb
diff --git a/fpga/usrp3/top/x300/coregen_dsp/hbdec2.xise b/fpga/usrp3/top/x300/coregen_dsp/hbdec2.xise
index ea71dfd55..af99fb5fb 100644
--- a/fpga/usrp3/top/x300/coregen_dsp/hbdec2.xise
+++ b/fpga/usrp3/top/x300/coregen_dsp/hbdec2.xise
@@ -9,10 +9,10 @@
<!-- along with the project source files, is sufficient to open and -->
<!-- implement in ISE Project Navigator. -->
<!-- -->
- <!-- Copyright (c) 1995-2012 Xilinx, Inc. All rights reserved. -->
+ <!-- Copyright (c) 1995-2013 Xilinx, Inc. All rights reserved. -->
</header>
- <version xil_pn:ise_version="14.4" xil_pn:schema_version="2"/>
+ <version xil_pn:ise_version="14.6" xil_pn:schema_version="2"/>
<files>
<file xil_pn:name="hbdec2.ngc" xil_pn:type="FILE_NGC">
diff --git a/fpga/usrp3/top/x300/coregen_dsp/hbdec3.gise b/fpga/usrp3/top/x300/coregen_dsp/hbdec3.gise
index 97abfa58f..d23808b1b 100644
--- a/fpga/usrp3/top/x300/coregen_dsp/hbdec3.gise
+++ b/fpga/usrp3/top/x300/coregen_dsp/hbdec3.gise
@@ -15,7 +15,7 @@
<!-- -->
- <!-- Copyright (c) 1995-2012 Xilinx, Inc. All rights reserved. -->
+ <!-- Copyright (c) 1995-2013 Xilinx, Inc. All rights reserved. -->
<version xmlns="http://www.xilinx.com/XMLSchema">11.1</version>
diff --git a/fpga/usrp3/top/x300/coregen_dsp/hbdec3.ncf b/fpga/usrp3/top/x300/coregen_dsp/hbdec3.ncf
new file mode 100644
index 000000000..e69de29bb
diff --git a/fpga/usrp3/top/x300/coregen_dsp/hbdec3.xise b/fpga/usrp3/top/x300/coregen_dsp/hbdec3.xise
index d38b61410..1af65c49d 100644
--- a/fpga/usrp3/top/x300/coregen_dsp/hbdec3.xise
+++ b/fpga/usrp3/top/x300/coregen_dsp/hbdec3.xise
@@ -9,10 +9,10 @@
<!-- along with the project source files, is sufficient to open and -->
<!-- implement in ISE Project Navigator. -->
<!-- -->
- <!-- Copyright (c) 1995-2012 Xilinx, Inc. All rights reserved. -->
+ <!-- Copyright (c) 1995-2013 Xilinx, Inc. All rights reserved. -->
</header>
- <version xil_pn:ise_version="14.4" xil_pn:schema_version="2"/>
+ <version xil_pn:ise_version="14.6" xil_pn:schema_version="2"/>
<files>
<file xil_pn:name="hbdec3.ngc" xil_pn:type="FILE_NGC">
diff --git a/fpga/usrp3/top/x300/coregen_dsp/hbint1.gise b/fpga/usrp3/top/x300/coregen_dsp/hbint1.gise
index fb4e6f8ff..c6c4013b9 100644
--- a/fpga/usrp3/top/x300/coregen_dsp/hbint1.gise
+++ b/fpga/usrp3/top/x300/coregen_dsp/hbint1.gise
@@ -15,7 +15,7 @@
<!-- -->
- <!-- Copyright (c) 1995-2012 Xilinx, Inc. All rights reserved. -->
+ <!-- Copyright (c) 1995-2013 Xilinx, Inc. All rights reserved. -->
<version xmlns="http://www.xilinx.com/XMLSchema">11.1</version>
diff --git a/fpga/usrp3/top/x300/coregen_dsp/hbint1.ncf b/fpga/usrp3/top/x300/coregen_dsp/hbint1.ncf
new file mode 100644
index 000000000..e69de29bb
diff --git a/fpga/usrp3/top/x300/coregen_dsp/hbint1.xise b/fpga/usrp3/top/x300/coregen_dsp/hbint1.xise
index a18bcca78..ddfc071f2 100644
--- a/fpga/usrp3/top/x300/coregen_dsp/hbint1.xise
+++ b/fpga/usrp3/top/x300/coregen_dsp/hbint1.xise
@@ -9,10 +9,10 @@
<!-- along with the project source files, is sufficient to open and -->
<!-- implement in ISE Project Navigator. -->
<!-- -->
- <!-- Copyright (c) 1995-2012 Xilinx, Inc. All rights reserved. -->
+ <!-- Copyright (c) 1995-2013 Xilinx, Inc. All rights reserved. -->
</header>
- <version xil_pn:ise_version="14.4" xil_pn:schema_version="2"/>
+ <version xil_pn:ise_version="14.6" xil_pn:schema_version="2"/>
<files>
<file xil_pn:name="hbint1.ngc" xil_pn:type="FILE_NGC">
diff --git a/fpga/usrp3/top/x300/coregen_dsp/hbint2.gise b/fpga/usrp3/top/x300/coregen_dsp/hbint2.gise
index f1ee7b4ca..e4b9546a7 100644
--- a/fpga/usrp3/top/x300/coregen_dsp/hbint2.gise
+++ b/fpga/usrp3/top/x300/coregen_dsp/hbint2.gise
@@ -15,7 +15,7 @@
<!-- -->
- <!-- Copyright (c) 1995-2012 Xilinx, Inc. All rights reserved. -->
+ <!-- Copyright (c) 1995-2013 Xilinx, Inc. All rights reserved. -->
<version xmlns="http://www.xilinx.com/XMLSchema">11.1</version>
diff --git a/fpga/usrp3/top/x300/coregen_dsp/hbint2.ncf b/fpga/usrp3/top/x300/coregen_dsp/hbint2.ncf
new file mode 100644
index 000000000..e69de29bb
diff --git a/fpga/usrp3/top/x300/coregen_dsp/hbint2.xise b/fpga/usrp3/top/x300/coregen_dsp/hbint2.xise
index 86c139f4e..471c12463 100644
--- a/fpga/usrp3/top/x300/coregen_dsp/hbint2.xise
+++ b/fpga/usrp3/top/x300/coregen_dsp/hbint2.xise
@@ -9,10 +9,10 @@
<!-- along with the project source files, is sufficient to open and -->
<!-- implement in ISE Project Navigator. -->
<!-- -->
- <!-- Copyright (c) 1995-2012 Xilinx, Inc. All rights reserved. -->
+ <!-- Copyright (c) 1995-2013 Xilinx, Inc. All rights reserved. -->
</header>
- <version xil_pn:ise_version="14.4" xil_pn:schema_version="2"/>
+ <version xil_pn:ise_version="14.6" xil_pn:schema_version="2"/>
<files>
<file xil_pn:name="hbint2.ngc" xil_pn:type="FILE_NGC">
diff --git a/fpga/usrp3/top/x300/coregen_dsp/hbint3.gise b/fpga/usrp3/top/x300/coregen_dsp/hbint3.gise
index 2ba7d5965..bad4add7b 100644
--- a/fpga/usrp3/top/x300/coregen_dsp/hbint3.gise
+++ b/fpga/usrp3/top/x300/coregen_dsp/hbint3.gise
@@ -15,7 +15,7 @@
<!-- -->
- <!-- Copyright (c) 1995-2012 Xilinx, Inc. All rights reserved. -->
+ <!-- Copyright (c) 1995-2013 Xilinx, Inc. All rights reserved. -->
<version xmlns="http://www.xilinx.com/XMLSchema">11.1</version>
diff --git a/fpga/usrp3/top/x300/coregen_dsp/hbint3.ncf b/fpga/usrp3/top/x300/coregen_dsp/hbint3.ncf
new file mode 100644
index 000000000..e69de29bb
diff --git a/fpga/usrp3/top/x300/coregen_dsp/hbint3.xise b/fpga/usrp3/top/x300/coregen_dsp/hbint3.xise
index 764b94b96..a608666d2 100644
--- a/fpga/usrp3/top/x300/coregen_dsp/hbint3.xise
+++ b/fpga/usrp3/top/x300/coregen_dsp/hbint3.xise
@@ -9,10 +9,10 @@
<!-- along with the project source files, is sufficient to open and -->
<!-- implement in ISE Project Navigator. -->
<!-- -->
- <!-- Copyright (c) 1995-2012 Xilinx, Inc. All rights reserved. -->
+ <!-- Copyright (c) 1995-2013 Xilinx, Inc. All rights reserved. -->
</header>
- <version xil_pn:ise_version="14.4" xil_pn:schema_version="2"/>
+ <version xil_pn:ise_version="14.6" xil_pn:schema_version="2"/>
<files>
<file xil_pn:name="hbint3.ngc" xil_pn:type="FILE_NGC">
--
cgit v1.2.3