From 00711ba213dde8aa0a099d2b18d3da0a33e6af79 Mon Sep 17 00:00:00 2001
From: Ben Hilburn <ben.hilburn@ettus.com>
Date: Wed, 14 May 2014 11:42:19 -0700
Subject: fpga: updating b200 and x300 FPGA source code for latest images

---
 .../b200/planahead/planahead.data/runs/impl_1.psg    | 20 ++++++++++++++++++++
 1 file changed, 20 insertions(+)
 create mode 100644 fpga/usrp3/top/b200/planahead/planahead.data/runs/impl_1.psg

(limited to 'fpga/usrp3/top/b200/planahead/planahead.data/runs/impl_1.psg')

diff --git a/fpga/usrp3/top/b200/planahead/planahead.data/runs/impl_1.psg b/fpga/usrp3/top/b200/planahead/planahead.data/runs/impl_1.psg
new file mode 100644
index 000000000..147f3a950
--- /dev/null
+++ b/fpga/usrp3/top/b200/planahead/planahead.data/runs/impl_1.psg
@@ -0,0 +1,20 @@
+<?xml version="1.0"?>
+<Strategy Version="1" Minor="2">
+	<StratHandle Name="ISE Defaults" Flow="ISE14">
+		<Desc>ISE Defaults, including packing registers in IOs off</Desc>
+	</StratHandle>
+	<Step Id="ngdbuild">
+	</Step>
+	<Step Id="map">
+		<Option Id="FFPackEnum">3</Option>
+	</Step>
+	<Step Id="par">
+	</Step>
+	<Step Id="trce">
+	</Step>
+	<Step Id="xdl">
+	</Step>
+	<Step Id="bitgen">
+	</Step>
+</Strategy>
+
-- 
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