From 0df4b801a34697f2058b4a7b95e08d2a0576c9db Mon Sep 17 00:00:00 2001 From: Ben Hilburn Date: Thu, 10 Oct 2013 10:17:27 -0700 Subject: Squashed B200 FPGA Source. Code from Josh Blum, Ian Buckley, and Matt Ettus. --- fpga/usrp3/top/b200/core_compile | 1 + 1 file changed, 1 insertion(+) create mode 100755 fpga/usrp3/top/b200/core_compile (limited to 'fpga/usrp3/top/b200/core_compile') diff --git a/fpga/usrp3/top/b200/core_compile b/fpga/usrp3/top/b200/core_compile new file mode 100755 index 000000000..553e9c8ad --- /dev/null +++ b/fpga/usrp3/top/b200/core_compile @@ -0,0 +1 @@ +iverilog -Wall -y. -y ../../control_lib/ -y ../../custom/ -y ../../fifo/ -y ../../gpif2/ -y ../../models/ -y ../../sdr_lib/ -y ../../coregen/ -y ../../vrt/ -y ../../opencores/i2c/rtl/verilog/ -y ../../opencores/spi/rtl/verilog/ -y ../../timing/ -y ../../opencores/8b10b/ -I ../../opencores/spi/rtl/verilog/ -I ../../opencores/i2c/rtl/verilog/ -y ../../simple_gemac B200.v 2>&1 | grep -v timescale | grep -v coregen | grep -v models -- cgit v1.2.3