From ff1546f8137f7f92bb250f685561b0c34cc0e053 Mon Sep 17 00:00:00 2001 From: Ben Hilburn Date: Fri, 14 Feb 2014 12:05:07 -0800 Subject: Pushing the bulk of UHD-3.7.0 code. --- fpga/usrp3/top/b200/Makefile.b200.inc | 4 +++- 1 file changed, 3 insertions(+), 1 deletion(-) (limited to 'fpga/usrp3/top/b200/Makefile.b200.inc') diff --git a/fpga/usrp3/top/b200/Makefile.b200.inc b/fpga/usrp3/top/b200/Makefile.b200.inc index da7561cab..288a29fe3 100644 --- a/fpga/usrp3/top/b200/Makefile.b200.inc +++ b/fpga/usrp3/top/b200/Makefile.b200.inc @@ -22,6 +22,7 @@ include ../../lib/packet_proc/Makefile.srcs include ../../lib/timing/Makefile.srcs include ../../lib/vita/Makefile.srcs include ../../lib/wishbone/Makefile.srcs +include ../../lib/axi/Makefile.srcs B200_COREGEN_SRCS = \ coregen/b200_clk_gen.v \ @@ -76,7 +77,8 @@ $(GPIF2_SRCS) $(PACKET_PROC_SRCS) \ $(WISHBONE_SRCS) \ $(TIMING_SRCS) \ $(DSP_SRCS) \ -$(VITA_SRCS) +$(VITA_SRCS) \ +$(AXI_SRCS) ################################################## # Process Properties -- cgit v1.2.3