From 6bb7d61251abd303049dfd0f47bd0266656797fb Mon Sep 17 00:00:00 2001 From: Wade Fife Date: Tue, 11 Jan 2022 15:19:14 -0600 Subject: fpga: tools: Fix adding directories for HDL source --- fpga/usrp3/tools/scripts/viv_utils.tcl | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'fpga/usrp3/tools') diff --git a/fpga/usrp3/tools/scripts/viv_utils.tcl b/fpga/usrp3/tools/scripts/viv_utils.tcl index 9ced39edf..e6683c151 100644 --- a/fpga/usrp3/tools/scripts/viv_utils.tcl +++ b/fpga/usrp3/tools/scripts/viv_utils.tcl @@ -64,7 +64,7 @@ proc ::vivado_utils::initialize_project { {save_to_disk 0} } { if [expr [file isdirectory $src_file] == 1] { puts "BUILDER: Expanding Directory : $src_file" set dir_contents [glob $src_file/*.*] - append design_srcs " " $dir_contents + append g_source_files " " $dir_contents } } -- cgit v1.2.3