From 66267f515802ff3f965fd44e1f0d3097ada7484f Mon Sep 17 00:00:00 2001 From: Wade Fife Date: Wed, 1 Sep 2021 15:27:45 -0500 Subject: fpga: tools: Add UHD_FPGA_DIR definition to synthesis This adds a Verilog definition named `UHD_FPGA_DIR that corresponds to the location of the UHD "fpga" directory. This allows you to include files in your out-of-tree modules relative to the FPGA directory. For example, you could include the library header file rfnoc_chdr_utils.vh using the following: `include `"`UHD_FPGA_DIR/usrp3/lib/rfnoc/core/rfnoc_chdr_utils.vh`" Some simulators may not support `" outside of the context of a `define, in which case you can do the following: `define RFNOC_CHDR_UTILS_PATH \ `"`UHD_FPGA_DIR/usrp3/lib/rfnoc/core/rfnoc_chdr_utils.vh`" `include `RFNOC_CHDR_UTILS_PATH --- fpga/usrp3/tools/scripts/viv_sim_project.tcl | 8 ++++++-- 1 file changed, 6 insertions(+), 2 deletions(-) (limited to 'fpga/usrp3/tools/scripts') diff --git a/fpga/usrp3/tools/scripts/viv_sim_project.tcl b/fpga/usrp3/tools/scripts/viv_sim_project.tcl index 922c1edcc..3e7cb429b 100644 --- a/fpga/usrp3/tools/scripts/viv_sim_project.tcl +++ b/fpga/usrp3/tools/scripts/viv_sim_project.tcl @@ -14,6 +14,7 @@ set part_name $::env(VIV_PART_NAME) set sim_runtime $::env(VIV_SIM_RUNTIME) set sim_fast $::env(VIV_SIM_FAST) set vivado_mode $::env(VIV_MODE) +set verilog_defs $::env(VIV_VERILOG_DEFS) set working_dir [pwd] set sim_fileset "sim_1" @@ -104,11 +105,14 @@ set_property target_simulator $simulator [current_project] # Vivado quirk when passing options to external simulators if [expr [string equal $simulator "XSim"] == 1] { - set_property verilog_define "WORKING_DIR=\"$working_dir\"" [get_filesets $sim_fileset] + append verilog_defs " WORKING_DIR=\"$working_dir\"" } else { - set_property verilog_define "WORKING_DIR=$working_dir" [get_filesets $sim_fileset] + append verilog_defs " WORKING_DIR=$working_dir" } +# Pass Verilog definitions to simulation for all files +set_property verilog_define $verilog_defs [get_filesets $sim_fileset] + # XSim specific settings set_property xsim.simulate.runtime "${sim_runtime}us" -objects [get_filesets $sim_fileset] set_property xsim.elaborate.debug_level "all" -objects [get_filesets $sim_fileset] -- cgit v1.2.3