From 87574a7c322f9f1af954bcee5dd9f59929992a85 Mon Sep 17 00:00:00 2001 From: Humberto Jimenez Date: Tue, 19 Nov 2019 09:11:14 -0600 Subject: fpga: lib: Add zynquplus family to axi_bitq --- fpga/usrp3/lib/vivado_ipi/axi_bitq/component.xml | 25 ++++++++++++------------ 1 file changed, 13 insertions(+), 12 deletions(-) (limited to 'fpga/usrp3/lib') diff --git a/fpga/usrp3/lib/vivado_ipi/axi_bitq/component.xml b/fpga/usrp3/lib/vivado_ipi/axi_bitq/component.xml index 2f22a5911..fbe8884f4 100644 --- a/fpga/usrp3/lib/vivado_ipi/axi_bitq/component.xml +++ b/fpga/usrp3/lib/vivado_ipi/axi_bitq/component.xml @@ -226,7 +226,7 @@ viewChecksum - 7ba7202f + fb2ab3e7 @@ -242,7 +242,7 @@ viewChecksum - 7ba7202f + fb2ab3e7 @@ -270,7 +270,7 @@ viewChecksum - 657bd79f + c813d9b2 @@ -646,7 +646,7 @@ axi_bitq.vhd vhdlSource - CHECKSUM_7f11f7eb + CHECKSUM_3028d8a4 @@ -690,16 +690,17 @@ zynq + zynquplus /EttusResearch axi_bitq_v1_0 - 1 + 2 user.org:user:axi_bitq:1.0 - 2018-01-17T16:36:23Z + 2019-01-18T15:57:32Z usrp3/lib/vivado_ipi/axi_bitq @@ -708,12 +709,12 @@ - 2015.4 - - - - - + 2018.3 + + + + + -- cgit v1.2.3