From 7b7fa68880ca423ea3a47fc3dc97ba533921c9a5 Mon Sep 17 00:00:00 2001 From: Wade Fife Date: Fri, 8 May 2020 14:18:29 -0500 Subject: fpga: Change default MTU to 10 --- fpga/usrp3/lib/rfnoc/core/axis_pyld_ctxt_to_chdr.v | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'fpga/usrp3/lib/rfnoc/core') diff --git a/fpga/usrp3/lib/rfnoc/core/axis_pyld_ctxt_to_chdr.v b/fpga/usrp3/lib/rfnoc/core/axis_pyld_ctxt_to_chdr.v index c73d7f365..71f38fd8b 100644 --- a/fpga/usrp3/lib/rfnoc/core/axis_pyld_ctxt_to_chdr.v +++ b/fpga/usrp3/lib/rfnoc/core/axis_pyld_ctxt_to_chdr.v @@ -44,7 +44,7 @@ module axis_pyld_ctxt_to_chdr #( parameter SYNC_CLKS = 0, parameter CONTEXT_FIFO_SIZE = 1, parameter PAYLOAD_FIFO_SIZE = 1, - parameter MTU = 9, + parameter MTU = 10, parameter CONTEXT_PREFETCH_EN = 1 )( // Clock, reset and settings -- cgit v1.2.3