From fd3e84941de463fa1a7ebab0a69515b4bf2614cd Mon Sep 17 00:00:00 2001
From: Martin Braun <martin.braun@ettus.com>
Date: Tue, 7 Oct 2014 11:25:20 +0200
Subject: Removed copy of FPGA source files.

---
 fpga/usrp3/lib/dsp/clip.v | 24 ------------------------
 1 file changed, 24 deletions(-)
 delete mode 100644 fpga/usrp3/lib/dsp/clip.v

(limited to 'fpga/usrp3/lib/dsp/clip.v')

diff --git a/fpga/usrp3/lib/dsp/clip.v b/fpga/usrp3/lib/dsp/clip.v
deleted file mode 100644
index 294c5e8ba..000000000
--- a/fpga/usrp3/lib/dsp/clip.v
+++ /dev/null
@@ -1,24 +0,0 @@
-// -*- verilog -*-
-//
-//  USRP - Universal Software Radio Peripheral
-//
-//  Copyright (C) 2008 Matt Ettus
-//
-
-//
-
-// Clipping "macro", keeps the bottom bits
-
-module clip
-  #(parameter bits_in=0,
-    parameter bits_out=0)
-    (input [bits_in-1:0] in,
-     output [bits_out-1:0] out);
-   
-   wire 		   overflow = |in[bits_in-1:bits_out-1] & ~(&in[bits_in-1:bits_out-1]);   
-   assign 		   out = overflow ? 
-			   (in[bits_in-1] ? {1'b1,{(bits_out-1){1'b0}}} : {1'b0,{(bits_out-1){1'b1}}}) :
-			   in[bits_out-1:0];
-   
-endmodule // clip
-
-- 
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