From d099fc3b032250bcc70e4c24f78d5eb6508850e1 Mon Sep 17 00:00:00 2001
From: Andrew Moch <Andrew.Moch@ni.com>
Date: Fri, 5 Feb 2021 10:48:24 -0600
Subject: fpga: lib: add pause support to ethernet xport

---
 fpga/usrp3/lib/axi4s_sv/axi4s_fifo.sv | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

(limited to 'fpga/usrp3/lib/axi4s_sv')

diff --git a/fpga/usrp3/lib/axi4s_sv/axi4s_fifo.sv b/fpga/usrp3/lib/axi4s_sv/axi4s_fifo.sv
index 0aa1daca0..d312b6f32 100644
--- a/fpga/usrp3/lib/axi4s_sv/axi4s_fifo.sv
+++ b/fpga/usrp3/lib/axi4s_sv/axi4s_fifo.sv
@@ -22,7 +22,7 @@ module axi4s_fifo #(
 );
 
   `include "axi4s.vh"
-  
+
   // Parameter Checks
   initial begin
     assert (i.DATA_WIDTH == o.DATA_WIDTH) else
-- 
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