From ff1546f8137f7f92bb250f685561b0c34cc0e053 Mon Sep 17 00:00:00 2001
From: Ben Hilburn <ben.hilburn@ettus.com>
Date: Fri, 14 Feb 2014 12:05:07 -0800
Subject: Pushing the bulk of UHD-3.7.0 code.

---
 fpga/usrp3/lib/axi/Makefile.srcs | 17 +++++++++++++++++
 1 file changed, 17 insertions(+)
 create mode 100644 fpga/usrp3/lib/axi/Makefile.srcs

(limited to 'fpga/usrp3/lib/axi/Makefile.srcs')

diff --git a/fpga/usrp3/lib/axi/Makefile.srcs b/fpga/usrp3/lib/axi/Makefile.srcs
new file mode 100644
index 000000000..26d2e0fee
--- /dev/null
+++ b/fpga/usrp3/lib/axi/Makefile.srcs
@@ -0,0 +1,17 @@
+#
+# Copyright 2012-2013 Ettus Research LLC
+#
+
+##################################################
+# FIFO Sources
+##################################################
+AXI_SRCS = $(abspath $(addprefix $(BASE_DIR)/../lib/axi/, \
+axi_dma_master.v \
+axi_dram_fifo.v \
+axi_embed_tlast.v \
+axi_extract_tlast.v \
+axi_chdr_test_pattern.v \
+axi_fast_fifo.v \
+axi_fast_extract_tlast.v \
+axi_chdr_header_trigger.v \
+))
-- 
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