From bb0572a960edf54486a4be746c681adaac0fa398 Mon Sep 17 00:00:00 2001 From: Josh Blum Date: Tue, 23 Nov 2010 13:36:42 -0800 Subject: fpga: performed a forceful checkout of fpga to overwrite with current fpga code --- fpga/usrp2/vrt/vita_tx_deframer.v | 4 +--- 1 file changed, 1 insertion(+), 3 deletions(-) (limited to 'fpga/usrp2/vrt/vita_tx_deframer.v') diff --git a/fpga/usrp2/vrt/vita_tx_deframer.v b/fpga/usrp2/vrt/vita_tx_deframer.v index 7fb8e3893..eb39feaec 100644 --- a/fpga/usrp2/vrt/vita_tx_deframer.v +++ b/fpga/usrp2/vrt/vita_tx_deframer.v @@ -80,7 +80,7 @@ module vita_tx_deframer wire fifo_space; always @(posedge clk) - if(reset | clear_seqnum) + if(reset | clear | clear_seqnum) begin seqnum_reg <= 32'hFFFF_FFFF; vita_seqnum_reg <= 4'hF; @@ -201,8 +201,6 @@ module vita_tx_deframer send_time[63:32] <= data_i[31:0]; VITA_TICS2 : send_time[31:0] <= data_i[31:0]; - VITA_STORE, VITA_HEADER : - send_time[63:0] <= 64'd0; endcase // case (vita_state) always @(posedge clk) -- cgit v1.2.3