From 05d77f772317de5d925301aa11bb9a880656dd05 Mon Sep 17 00:00:00 2001 From: Josh Blum Date: Thu, 15 Apr 2010 11:24:24 -0700 Subject: moved usrp1 and usrp2 fpga dirs into fpga subdirectory --- fpga/usrp2/sdr_lib/add2_and_round_reg.v | 16 ++++++++++++++++ 1 file changed, 16 insertions(+) create mode 100644 fpga/usrp2/sdr_lib/add2_and_round_reg.v (limited to 'fpga/usrp2/sdr_lib/add2_and_round_reg.v') diff --git a/fpga/usrp2/sdr_lib/add2_and_round_reg.v b/fpga/usrp2/sdr_lib/add2_and_round_reg.v new file mode 100644 index 000000000..e7fcbf1a1 --- /dev/null +++ b/fpga/usrp2/sdr_lib/add2_and_round_reg.v @@ -0,0 +1,16 @@ + +module add2_and_round_reg + #(parameter WIDTH=16) + (input clk, + input [WIDTH-1:0] in1, + input [WIDTH-1:0] in2, + output reg [WIDTH-1:0] sum); + + wire [WIDTH-1:0] sum_int; + + add2_and_round #(.WIDTH(WIDTH)) add2_n_rnd (.in1(in1),.in2(in2),.sum(sum_int)); + + always @(posedge clk) + sum <= sum_int; + +endmodule // add2_and_round_reg -- cgit v1.2.3