From fd3e84941de463fa1a7ebab0a69515b4bf2614cd Mon Sep 17 00:00:00 2001 From: Martin Braun Date: Tue, 7 Oct 2014 11:25:20 +0200 Subject: Removed copy of FPGA source files. --- fpga/usrp2/opencores/zpu/wishbone/wishbone_pkg.vhd | 86 ----------------- fpga/usrp2/opencores/zpu/wishbone/zpu_system.vhd | 105 --------------------- .../usrp2/opencores/zpu/wishbone/zpu_wb_bridge.vhd | 83 ---------------- 3 files changed, 274 deletions(-) delete mode 100644 fpga/usrp2/opencores/zpu/wishbone/wishbone_pkg.vhd delete mode 100644 fpga/usrp2/opencores/zpu/wishbone/zpu_system.vhd delete mode 100644 fpga/usrp2/opencores/zpu/wishbone/zpu_wb_bridge.vhd (limited to 'fpga/usrp2/opencores/zpu/wishbone') diff --git a/fpga/usrp2/opencores/zpu/wishbone/wishbone_pkg.vhd b/fpga/usrp2/opencores/zpu/wishbone/wishbone_pkg.vhd deleted file mode 100644 index 375c9ac7e..000000000 --- a/fpga/usrp2/opencores/zpu/wishbone/wishbone_pkg.vhd +++ /dev/null @@ -1,86 +0,0 @@ --- ZPU --- --- Copyright 2004-2008 oharboe - Øyvind Harboe - oyvind.harboe@zylin.com --- --- The FreeBSD license --- --- Redistribution and use in source and binary forms, with or without --- modification, are permitted provided that the following conditions --- are met: --- --- 1. Redistributions of source code must retain the above copyright --- notice, this list of conditions and the following disclaimer. --- 2. Redistributions in binary form must reproduce the above --- copyright notice, this list of conditions and the following --- disclaimer in the documentation and/or other materials --- provided with the distribution. --- --- THIS SOFTWARE IS PROVIDED BY THE ZPU PROJECT ``AS IS'' AND ANY --- EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, --- THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A --- PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE --- ZPU PROJECT OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, --- INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES --- (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS --- OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) --- HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, --- STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) --- ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF --- ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. --- --- The views and conclusions contained in the software and documentation --- are those of the authors and should not be interpreted as representing --- official policies, either expressed or implied, of the ZPU Project. - -library IEEE; -use IEEE.STD_LOGIC_1164.all; -use IEEE.STD_LOGIC_UNSIGNED.ALL; - -package wishbone_pkg is - - type wishbone_bus_in is record - adr : std_logic_vector(15 downto 0); - sel : std_logic_vector(3 downto 0); - we : std_logic; - dat : std_logic_vector(31 downto 0); -- Note! Data written with 'we' - cyc : std_logic; - stb : std_logic; - end record; - - type wishbone_bus_out is record - dat : std_logic_vector(31 downto 0); - ack : std_logic; - end record; - - type wishbone_bus is record - insig : wishbone_bus_in; - outsig : wishbone_bus_out; - end record; - - component atomic32_access is - port ( cpu_clk : in std_logic; - areset : in std_logic; - - -- Wishbone from CPU interface - wb_16_i : in wishbone_bus_in; - wb_16_o : out wishbone_bus_out; - -- Wishbone to FPGA registers and ethernet core - wb_32_i : in wishbone_bus_out; - wb_32_o : out wishbone_bus_in); - end component; - - component eth_access_corr is - port ( cpu_clk : in std_logic; - areset : in std_logic; - - -- Wishbone from Wishbone MUX - eth_raw_o : out wishbone_bus_out; - eth_raw_i : in wishbone_bus_in; - - -- Wishbone ethernet core - eth_slave_i : in wishbone_bus_out; - eth_slave_o : out wishbone_bus_in); - end component; - - -end wishbone_pkg; diff --git a/fpga/usrp2/opencores/zpu/wishbone/zpu_system.vhd b/fpga/usrp2/opencores/zpu/wishbone/zpu_system.vhd deleted file mode 100644 index 294651fe2..000000000 --- a/fpga/usrp2/opencores/zpu/wishbone/zpu_system.vhd +++ /dev/null @@ -1,105 +0,0 @@ --- ZPU --- --- Copyright 2004-2008 oharboe - Øyvind Harboe - oyvind.harboe@zylin.com --- --- The FreeBSD license --- --- Redistribution and use in source and binary forms, with or without --- modification, are permitted provided that the following conditions --- are met: --- --- 1. Redistributions of source code must retain the above copyright --- notice, this list of conditions and the following disclaimer. --- 2. Redistributions in binary form must reproduce the above --- copyright notice, this list of conditions and the following --- disclaimer in the documentation and/or other materials --- provided with the distribution. --- --- THIS SOFTWARE IS PROVIDED BY THE ZPU PROJECT ``AS IS'' AND ANY --- EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, --- THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A --- PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE --- ZPU PROJECT OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, --- INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES --- (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS --- OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) --- HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, --- STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) --- ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF --- ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. --- --- The views and conclusions contained in the software and documentation --- are those of the authors and should not be interpreted as representing --- official policies, either expressed or implied, of the ZPU Project. - -library IEEE; -use IEEE.STD_LOGIC_1164.all; -use IEEE.STD_LOGIC_UNSIGNED.all; - -library work; -use work.zpu_top_pkg.all; -use work.wishbone_pkg.all; -use work.zpupkg.all; -use work.zpu_config.all; - -entity zpu_system is - generic( - simulate : boolean := false); - port ( areset : in std_logic; - cpu_clk : in std_logic; - - -- ZPU Control signals - enable : in std_logic; - interrupt : in std_logic; - - zpu_status : out std_logic_vector(63 downto 0); - - -- wishbone interfaces - zpu_wb_i : in wishbone_bus_out; - zpu_wb_o : out wishbone_bus_in); -end zpu_system; - -architecture behave of zpu_system is - -signal mem_req : std_logic; -signal mem_we : std_logic; -signal mem_ack : std_logic; -signal mem_read : std_logic_vector(wordSize-1 downto 0); -signal mem_write : std_logic_vector(wordSize-1 downto 0); -signal out_mem_addr : std_logic_vector(maxAddrBitIncIO downto 0); -signal mem_writeMask : std_logic_vector(wordBytes-1 downto 0); - - -begin - - my_zpu_core: - zpu_core port map ( - clk => cpu_clk, - areset => areset, - enable => enable, - mem_req => mem_req, - mem_we => mem_we, - mem_ack => mem_ack, - mem_read => mem_read, - mem_write => mem_write, - out_mem_addr => out_mem_addr, - mem_writeMask => mem_writeMask, - interrupt => interrupt, - zpu_status => zpu_status, - break => open); - - my_zpu_wb_bridge: - zpu_wb_bridge port map ( - clk => cpu_clk, - areset => areset, - mem_req => mem_req, - mem_we => mem_we, - mem_ack => mem_ack, - mem_read => mem_read, - mem_write => mem_write, - out_mem_addr => out_mem_addr, - mem_writeMask => mem_writeMask, - zpu_wb_i => zpu_wb_i, - zpu_wb_o => zpu_wb_o); - -end behave; diff --git a/fpga/usrp2/opencores/zpu/wishbone/zpu_wb_bridge.vhd b/fpga/usrp2/opencores/zpu/wishbone/zpu_wb_bridge.vhd deleted file mode 100644 index 104ee10b8..000000000 --- a/fpga/usrp2/opencores/zpu/wishbone/zpu_wb_bridge.vhd +++ /dev/null @@ -1,83 +0,0 @@ --- ZPU --- --- Copyright 2004-2008 oharboe - Øyvind Harboe - oyvind.harboe@zylin.com --- --- The FreeBSD license --- --- Redistribution and use in source and binary forms, with or without --- modification, are permitted provided that the following conditions --- are met: --- --- 1. Redistributions of source code must retain the above copyright --- notice, this list of conditions and the following disclaimer. --- 2. Redistributions in binary form must reproduce the above --- copyright notice, this list of conditions and the following --- disclaimer in the documentation and/or other materials --- provided with the distribution. --- --- THIS SOFTWARE IS PROVIDED BY THE ZPU PROJECT ``AS IS'' AND ANY --- EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, --- THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A --- PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE --- ZPU PROJECT OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, --- INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES --- (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS --- OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) --- HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, --- STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) --- ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF --- ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. --- --- The views and conclusions contained in the software and documentation --- are those of the authors and should not be interpreted as representing --- official policies, either expressed or implied, of the ZPU Project. - -library IEEE; -use IEEE.STD_LOGIC_1164.ALL; -use IEEE.STD_LOGIC_UNSIGNED.ALL; - -library work; -use work.zpu_top_pkg.all; -use work.wishbone_pkg.all; -use work.zpupkg.all; -use work.zpu_config.all; - -entity zpu_wb_bridge is - port ( -- Native ZPU interface - clk : in std_logic; - areset : in std_logic; - - mem_req : in std_logic; - mem_we : in std_logic; - mem_ack : out std_logic; - mem_read : out std_logic_vector(wordSize-1 downto 0); - mem_write : in std_logic_vector(wordSize-1 downto 0); - out_mem_addr : in std_logic_vector(maxAddrBitIncIO downto 0); - mem_writeMask : in std_logic_vector(wordBytes-1 downto 0); - - -- Wishbone from ZPU - zpu_wb_i : in wishbone_bus_out; - zpu_wb_o : out wishbone_bus_in); - -end zpu_wb_bridge; - -architecture behave of zpu_wb_bridge is - -begin - - mem_read <= zpu_wb_i.dat; - mem_ack <= zpu_wb_i.ack; - - zpu_wb_o.adr <= out_mem_addr; - zpu_wb_o.dat <= mem_write; - zpu_wb_o.sel <= mem_writeMask; - zpu_wb_o.stb <= mem_req; - zpu_wb_o.cyc <= mem_req; - zpu_wb_o.we <= mem_we; - -end behave; - - - - - -- cgit v1.2.3