From fd3e84941de463fa1a7ebab0a69515b4bf2614cd Mon Sep 17 00:00:00 2001 From: Martin Braun Date: Tue, 7 Oct 2014 11:25:20 +0200 Subject: Removed copy of FPGA source files. --- fpga/usrp2/opencores/aemb/sim/cversim | 22 ---------------------- 1 file changed, 22 deletions(-) delete mode 100755 fpga/usrp2/opencores/aemb/sim/cversim (limited to 'fpga/usrp2/opencores/aemb/sim/cversim') diff --git a/fpga/usrp2/opencores/aemb/sim/cversim b/fpga/usrp2/opencores/aemb/sim/cversim deleted file mode 100755 index 0dbb7aea1..000000000 --- a/fpga/usrp2/opencores/aemb/sim/cversim +++ /dev/null @@ -1,22 +0,0 @@ -#!/bin/sh -# $Id: cversim,v 1.5 2007/12/11 00:44:30 sybreon Exp $ -# $Log: cversim,v $ -# Revision 1.5 2007/12/11 00:44:30 sybreon -# Modified for AEMB2 -# -# Revision 1.4 2007/11/30 17:08:30 sybreon -# Moved simulation kernel into code. -# -# Revision 1.3 2007/11/05 10:59:31 sybreon -# Added random seed for simulation. -# -# Revision 1.2 2007/04/12 20:21:33 sybreon -# Moved testbench into /sim/verilog. -# Simulation cleanups. -# -# Revision 1.1 2007/03/09 17:41:55 sybreon -# initial import -# -RANDOM=$(date +%s) -echo "parameter randseed = $RANDOM;" > random.v -cver -q -w +define+AEMBX_SIMULATION_KERNEL $@ ../rtl/verilog/*.v -- cgit v1.2.3