From 453b450aa2f40f1ab3689855654fd2167f554ccc Mon Sep 17 00:00:00 2001 From: Josh Blum Date: Mon, 11 Oct 2010 16:31:51 -0700 Subject: usrp2: implemented flow control monitor set registers in mboard impl to enable asyn fc packets modified microblaze code to handle dummy data packet offset --- firmware/microblaze/apps/txrx_uhd.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'firmware') diff --git a/firmware/microblaze/apps/txrx_uhd.c b/firmware/microblaze/apps/txrx_uhd.c index 1dd6e80ac..e38eb621d 100644 --- a/firmware/microblaze/apps/txrx_uhd.c +++ b/firmware/microblaze/apps/txrx_uhd.c @@ -372,7 +372,7 @@ eth_pkt_inspector(dbsm_t *sm, int bufno) // In the future, a hardware state machine will do this... if ( //warning! magic numbers approaching.... (((buff + ((2 + 14 + 20)/sizeof(uint32_t)))[0] & 0xffff) == USRP2_UDP_DATA_PORT) && - ((buff + ((2 + 14 + 20 + 8)/sizeof(uint32_t)))[0] != USRP2_INVALID_VRT_HEADER) + ((buff + ((2 + 14 + 20 + 8)/sizeof(uint32_t)))[1] != USRP2_INVALID_VRT_HEADER) ) return false; //test if its an ip recovery packet -- cgit v1.2.3 From 2c08c9a7e62b2ad7f75047cc54b0256173f1b674 Mon Sep 17 00:00:00 2001 From: Josh Blum Date: Tue, 12 Oct 2010 15:24:37 -0700 Subject: usrp2: register overflow, underflow, and pps level for pic also fix minor build issue w/ LDADD --- firmware/microblaze/lib/pic.c | 2 +- firmware/microblaze/usrp2/Makefile.am | 3 ++- 2 files changed, 3 insertions(+), 2 deletions(-) (limited to 'firmware') diff --git a/firmware/microblaze/lib/pic.c b/firmware/microblaze/lib/pic.c index e89d2b755..226da5f85 100644 --- a/firmware/microblaze/lib/pic.c +++ b/firmware/microblaze/lib/pic.c @@ -44,7 +44,7 @@ pic_init(void) // uP is level triggered pic_regs->mask = ~0; // mask all interrupts - pic_regs->edge_enable = PIC_ONETIME_INT; + pic_regs->edge_enable = PIC_ONETIME_INT | PIC_UNDERRUN_INT | PIC_OVERRUN_INT | PIC_PPS_INT; pic_regs->polarity = ~0 & ~PIC_PHY_INT; // rising edge pic_regs->pending = ~0; // clear all pending ints } diff --git a/firmware/microblaze/usrp2/Makefile.am b/firmware/microblaze/usrp2/Makefile.am index 8da013980..ba426b75c 100644 --- a/firmware/microblaze/usrp2/Makefile.am +++ b/firmware/microblaze/usrp2/Makefile.am @@ -22,10 +22,11 @@ AM_CFLAGS = \ AM_LDFLAGS = \ $(COMMON_LFLAGS) \ - libusrp2.a \ -Wl,-defsym -Wl,_TEXT_START_ADDR=0x0050 \ -Wl,-defsym -Wl,_STACK_SIZE=3072 +LDADD = libusrp2.a + ######################################################################## # USRP2 specific library and programs ######################################################################## -- cgit v1.2.3 From 376e22ca3bf25c8d6bb53cd987b245e5b79860f9 Mon Sep 17 00:00:00 2001 From: Josh Blum Date: Wed, 13 Oct 2010 18:38:54 -0700 Subject: usrp2: handle destination port unreachable icmp in fw (kills streaming and update packets) --- firmware/microblaze/lib/net_common.c | 11 ++++++++++- firmware/microblaze/usrp2/memory_map.h | 3 +++ 2 files changed, 13 insertions(+), 1 deletion(-) (limited to 'firmware') diff --git a/firmware/microblaze/lib/net_common.c b/firmware/microblaze/lib/net_common.c index 6c9509c92..0efb26639 100644 --- a/firmware/microblaze/lib/net_common.c +++ b/firmware/microblaze/lib/net_common.c @@ -291,8 +291,17 @@ handle_icmp_packet(struct ip_addr src, struct ip_addr dst, { switch (icmp->type){ case ICMP_DUR: // Destinatino Unreachable - //stop_streaming(); //FIXME if (icmp->code == ICMP_DUR_PORT){ // port unreachable + //handle destination port unreachable (the host ctrl+c'd the app): + + //end async update packets per second + sr_tx_ctrl->cyc_per_up = 0; + + //the end continuous streaming command + sr_rx_ctrl->cmd = (1 << 31) | 1; //one sample, asap + sr_rx_ctrl->time_secs = 0; + sr_rx_ctrl->time_ticks = 0; //latch the command + //struct udp_hdr *udp = (struct udp_hdr *)((char *)icmp + 28); //printf("icmp port unr %d\n", udp->dest); putchar('i'); diff --git a/firmware/microblaze/usrp2/memory_map.h b/firmware/microblaze/usrp2/memory_map.h index 41a2820bc..e7f41bc8d 100644 --- a/firmware/microblaze/usrp2/memory_map.h +++ b/firmware/microblaze/usrp2/memory_map.h @@ -463,6 +463,9 @@ typedef struct { typedef struct { volatile uint32_t num_chan; volatile uint32_t clear_state; // clears out state machine, fifos, + volatile uint32_t report_sid; + volatile uint32_t policy; + volatile uint32_t cyc_per_up; } sr_tx_ctrl_t; #define sr_tx_ctrl ((sr_tx_ctrl_t *) _SR_ADDR(SR_TX_CTRL)) -- cgit v1.2.3 From 81c9f77306dc82f250bfb2871b8bd7db67a40085 Mon Sep 17 00:00:00 2001 From: Josh Blum Date: Mon, 8 Nov 2010 17:22:37 -0800 Subject: usrp2: implemented clear state for RX and TX control, and zero sample command support --- firmware/microblaze/lib/net_common.c | 2 +- host/include/uhd/usrp/dsp_utils.hpp | 5 +---- host/lib/usrp/dsp_utils.cpp | 6 ++---- host/lib/usrp/usrp2/io_impl.cpp | 25 ------------------------- host/lib/usrp/usrp2/mboard_impl.cpp | 13 +++++-------- host/lib/usrp/usrp2/usrp2_impl.hpp | 1 - host/lib/usrp/usrp2/usrp2_regs.hpp | 2 +- 7 files changed, 10 insertions(+), 44 deletions(-) (limited to 'firmware') diff --git a/firmware/microblaze/lib/net_common.c b/firmware/microblaze/lib/net_common.c index 0a085db3a..6305408d6 100644 --- a/firmware/microblaze/lib/net_common.c +++ b/firmware/microblaze/lib/net_common.c @@ -298,7 +298,7 @@ handle_icmp_packet(struct ip_addr src, struct ip_addr dst, sr_tx_ctrl->cyc_per_up = 0; //the end continuous streaming command - sr_rx_ctrl->cmd = (1 << 31) | 1; //one sample, asap + sr_rx_ctrl->cmd = 1 << 31; //no samples now sr_rx_ctrl->time_secs = 0; sr_rx_ctrl->time_ticks = 0; //latch the command diff --git a/host/include/uhd/usrp/dsp_utils.hpp b/host/include/uhd/usrp/dsp_utils.hpp index 8ec04dd2f..5b81ce322 100644 --- a/host/include/uhd/usrp/dsp_utils.hpp +++ b/host/include/uhd/usrp/dsp_utils.hpp @@ -85,12 +85,9 @@ namespace dsp_type1{ /*! * Calculate the stream command word from the stream command struct. * \param stream_cmd the requested stream command with mode, flags, timestamp - * \param num_samps_continuous number of samples to request in continuous mode * \return the 32-bit stream command word */ - UHD_API boost::uint32_t calc_stream_cmd_word( - const stream_cmd_t &stream_cmd, size_t num_samps_continuous - ); + UHD_API boost::uint32_t calc_stream_cmd_word(const stream_cmd_t &stream_cmd); } //namespace dsp_type1 diff --git a/host/lib/usrp/dsp_utils.cpp b/host/lib/usrp/dsp_utils.cpp index 10ae9a086..2553e4a25 100644 --- a/host/lib/usrp/dsp_utils.cpp +++ b/host/lib/usrp/dsp_utils.cpp @@ -109,9 +109,7 @@ boost::uint32_t dsp_type1::calc_iq_scale_word(unsigned rate){ return calc_iq_scale_word(scale, scale); } -boost::uint32_t dsp_type1::calc_stream_cmd_word( - const stream_cmd_t &stream_cmd, size_t num_samps_continuous -){ +boost::uint32_t dsp_type1::calc_stream_cmd_word(const stream_cmd_t &stream_cmd){ UHD_ASSERT_THROW(stream_cmd.num_samps <= 0x3fffffff); //setup the mode to instruction flags @@ -133,6 +131,6 @@ boost::uint32_t dsp_type1::calc_stream_cmd_word( word |= boost::uint32_t((stream_cmd.stream_now)? 1 : 0) << 31; word |= boost::uint32_t((inst_chain)? 1 : 0) << 30; word |= boost::uint32_t((inst_reload)? 1 : 0) << 29; - word |= (inst_samps)? stream_cmd.num_samps : ((inst_chain)? num_samps_continuous : 1); + word |= (inst_samps)? stream_cmd.num_samps : ((inst_chain)? 1 : 0); return word; } diff --git a/host/lib/usrp/usrp2/io_impl.cpp b/host/lib/usrp/usrp2/io_impl.cpp index 39e6c167f..844df603c 100644 --- a/host/lib/usrp/usrp2/io_impl.cpp +++ b/host/lib/usrp/usrp2/io_impl.cpp @@ -241,8 +241,6 @@ void usrp2_impl::io_impl::recv_pirate_loop( /*********************************************************************** * Helper Functions **********************************************************************/ -#include //TODO remove when hack below is fixed - void usrp2_impl::io_init(void){ //the assumption is that all data transports should be identical @@ -252,29 +250,6 @@ void usrp2_impl::io_init(void){ //create new io impl _io_impl = UHD_PIMPL_MAKE(io_impl, (num_recv_frames, send_frame_size, _data_transports.size())); - //TODO temporary fix for weird power up state, remove when FPGA fixed - { - //send an initial packet to all transports - tx_metadata_t md; md.end_of_burst = true; - this->send( - std::vector(_data_transports.size(), NULL), 0, md, - io_type_t::COMPLEX_FLOAT32, device::SEND_MODE_ONE_PACKET, 0 - ); - - //issue a stream command to each motherboard - BOOST_FOREACH(usrp2_mboard_impl::sptr mboard, _mboards){ - (*mboard)[MBOARD_PROP_STREAM_CMD] = stream_cmd_t(stream_cmd_t::STREAM_MODE_STOP_CONTINUOUS); - } - - //wait - boost::this_thread::sleep(boost::posix_time::milliseconds(100)); - - //flush all transport receive queues (no timeout) - BOOST_FOREACH(zero_copy_if::sptr xport, _data_transports){ - while(xport->get_recv_buff(0).get() != NULL){}; - } - } - //create a new pirate thread for each zc if (yarr!!) for (size_t i = 0; i < _data_transports.size(); i++){ _io_impl->recv_pirate_crew.create_thread(boost::bind( diff --git a/host/lib/usrp/usrp2/mboard_impl.cpp b/host/lib/usrp/usrp2/mboard_impl.cpp index bb9b6d1a9..d4dc8a4bd 100644 --- a/host/lib/usrp/usrp2/mboard_impl.cpp +++ b/host/lib/usrp/usrp2/mboard_impl.cpp @@ -40,7 +40,6 @@ usrp2_mboard_impl::usrp2_mboard_impl( const device_addr_t &flow_control_hints ): _index(index), - _recv_samps_per_packet(recv_samps_per_packet), _iface(usrp2_iface::make(ctrl_transport)) { //Send a small data packet so the usrp2 knows the udp source port. @@ -74,9 +73,9 @@ usrp2_mboard_impl::usrp2_mboard_impl( } //init the rx control registers - _iface->poke32(U2_REG_RX_CTRL_NSAMPS_PER_PKT, _recv_samps_per_packet); + _iface->poke32(U2_REG_TX_CTRL_CLEAR_STATE, 1); //reset + _iface->poke32(U2_REG_RX_CTRL_NSAMPS_PER_PKT, recv_samps_per_packet); _iface->poke32(U2_REG_RX_CTRL_NCHANNELS, 1); - _iface->poke32(U2_REG_RX_CTRL_CLEAR_OVERRUN, 1); //reset _iface->poke32(U2_REG_RX_CTRL_VRT_HEADER, 0 | (0x1 << 28) //if data with stream id | (0x1 << 26) //has trailer @@ -88,8 +87,8 @@ usrp2_mboard_impl::usrp2_mboard_impl( _iface->poke32(U2_REG_TIME64_TPS, size_t(get_master_clock_freq())); //init the tx control registers - _iface->poke32(U2_REG_TX_CTRL_NUM_CHAN, 0); //1 channel _iface->poke32(U2_REG_TX_CTRL_CLEAR_STATE, 1); //reset + _iface->poke32(U2_REG_TX_CTRL_NUM_CHAN, 0); //1 channel _iface->poke32(U2_REG_TX_CTRL_REPORT_SID, 1); //sid 1 (different from rx) _iface->poke32(U2_REG_TX_CTRL_POLICY, U2_FLAG_TX_CTRL_POLICY_NEXT_PACKET); @@ -97,6 +96,7 @@ usrp2_mboard_impl::usrp2_mboard_impl( const double ups_per_sec = flow_control_hints.cast("ups_per_sec", 100); const size_t cycles_per_up = size_t(_clock_ctrl->get_master_clock_rate()/ups_per_sec); _iface->poke32(U2_REG_TX_CTRL_CYCLES_PER_UP, U2_FLAG_TX_CTRL_UP_ENB | cycles_per_up); + _iface->poke32(U2_REG_TX_CTRL_CYCLES_PER_UP, 0); //cycles per update is disabled //setting the packets per update const double ups_per_fifo = flow_control_hints.cast("ups_per_fifo", 8); @@ -187,7 +187,6 @@ void usrp2_mboard_impl::set_time_spec(const time_spec_t &time_spec, bool now){ } void usrp2_mboard_impl::handle_overflow(void){ - _iface->poke32(U2_REG_RX_CTRL_CLEAR_OVERRUN, 1); if (_continuous_streaming){ //re-issue the stream command if already continuous this->issue_ddc_stream_cmd(stream_cmd_t::STREAM_MODE_START_CONTINUOUS); } @@ -195,9 +194,7 @@ void usrp2_mboard_impl::handle_overflow(void){ void usrp2_mboard_impl::issue_ddc_stream_cmd(const stream_cmd_t &stream_cmd){ _continuous_streaming = stream_cmd.stream_mode == stream_cmd_t::STREAM_MODE_START_CONTINUOUS; - _iface->poke32(U2_REG_RX_CTRL_STREAM_CMD, dsp_type1::calc_stream_cmd_word( - stream_cmd, _recv_samps_per_packet - )); + _iface->poke32(U2_REG_RX_CTRL_STREAM_CMD, dsp_type1::calc_stream_cmd_word(stream_cmd)); _iface->poke32(U2_REG_RX_CTRL_TIME_SECS, boost::uint32_t(stream_cmd.time_spec.get_full_secs())); _iface->poke32(U2_REG_RX_CTRL_TIME_TICKS, stream_cmd.time_spec.get_tick_count(get_master_clock_freq())); } diff --git a/host/lib/usrp/usrp2/usrp2_impl.hpp b/host/lib/usrp/usrp2/usrp2_impl.hpp index e4980a539..e41cefc10 100644 --- a/host/lib/usrp/usrp2/usrp2_impl.hpp +++ b/host/lib/usrp/usrp2/usrp2_impl.hpp @@ -98,7 +98,6 @@ public: private: size_t _index; - const size_t _recv_samps_per_packet; bool _continuous_streaming; //interfaces diff --git a/host/lib/usrp/usrp2/usrp2_regs.hpp b/host/lib/usrp/usrp2/usrp2_regs.hpp index c3a4d22de..cef7cf2e6 100644 --- a/host/lib/usrp/usrp2/usrp2_regs.hpp +++ b/host/lib/usrp/usrp2/usrp2_regs.hpp @@ -179,7 +179,7 @@ #define U2_REG_RX_CTRL_TIME_SECS _SR_ADDR(SR_RX_CTRL + 1) #define U2_REG_RX_CTRL_TIME_TICKS _SR_ADDR(SR_RX_CTRL + 2) -#define U2_REG_RX_CTRL_CLEAR_OVERRUN _SR_ADDR(SR_RX_CTRL + 3) // write anything to clear overrun +#define U2_REG_RX_CTRL_CLEAR_STATE _SR_ADDR(SR_RX_CTRL + 3) #define U2_REG_RX_CTRL_VRT_HEADER _SR_ADDR(SR_RX_CTRL + 4) // word 0 of packet. FPGA fills in packet counter #define U2_REG_RX_CTRL_VRT_STREAM_ID _SR_ADDR(SR_RX_CTRL + 5) // word 1 of packet. #define U2_REG_RX_CTRL_VRT_TRAILER _SR_ADDR(SR_RX_CTRL + 6) -- cgit v1.2.3 From 768af46dc01d036999cb60ff16df4215d014c906 Mon Sep 17 00:00:00 2001 From: Nick Foster Date: Thu, 18 Nov 2010 09:55:48 -0800 Subject: Firmware mem map changes for flow ctrl somehow didn't get propagated. Also removed firmware update fw rev checking -- it occurs to me that checking fw rev in order to update fw is counterproductive. --- firmware/microblaze/usrp2/memory_map.h | 1 + firmware/microblaze/usrp2p/memory_map.h | 4 ++++ firmware/microblaze/usrp2p/udp_fw_update.c | 4 ++-- 3 files changed, 7 insertions(+), 2 deletions(-) (limited to 'firmware') diff --git a/firmware/microblaze/usrp2/memory_map.h b/firmware/microblaze/usrp2/memory_map.h index e7f41bc8d..eac0c217f 100644 --- a/firmware/microblaze/usrp2/memory_map.h +++ b/firmware/microblaze/usrp2/memory_map.h @@ -466,6 +466,7 @@ typedef struct { volatile uint32_t report_sid; volatile uint32_t policy; volatile uint32_t cyc_per_up; + volatile uint32_t packets_per_up; } sr_tx_ctrl_t; #define sr_tx_ctrl ((sr_tx_ctrl_t *) _SR_ADDR(SR_TX_CTRL)) diff --git a/firmware/microblaze/usrp2p/memory_map.h b/firmware/microblaze/usrp2p/memory_map.h index 8d0d0c365..3b2dc0057 100644 --- a/firmware/microblaze/usrp2p/memory_map.h +++ b/firmware/microblaze/usrp2p/memory_map.h @@ -490,6 +490,10 @@ typedef struct { typedef struct { volatile uint32_t num_chan; volatile uint32_t clear_state; // clears out state machine, fifos, + volatile uint32_t report_sid; + volatile uint32_t policy; + volatile uint32_t cyc_per_up; + volatile uint32_t packets_per_up; } sr_tx_ctrl_t; #define sr_tx_ctrl ((sr_tx_ctrl_t *) _SR_ADDR(SR_TX_CTRL)) diff --git a/firmware/microblaze/usrp2p/udp_fw_update.c b/firmware/microblaze/usrp2p/udp_fw_update.c index 55c206b1b..ead08ad2c 100644 --- a/firmware/microblaze/usrp2p/udp_fw_update.c +++ b/firmware/microblaze/usrp2p/udp_fw_update.c @@ -38,13 +38,13 @@ void handle_udp_fw_update_packet(struct socket_address src, struct socket_addres usrp2_fw_update_id_t update_data_in_id = update_data_in->id; //ensure that the protocol versions match - if (payload_len >= sizeof(uint32_t) && update_data_in->proto_ver != USRP2_FW_COMPAT_NUM){ +/* if (payload_len >= sizeof(uint32_t) && update_data_in->proto_ver != USRP2_FW_COMPAT_NUM){ printf("!Error in update packet handler: Expected compatibility number %d, but got %d\n", USRP2_FW_COMPAT_NUM, update_data_in->proto_ver ); update_data_in_id = USRP2_FW_UPDATE_ID_OHAI_LOL; //so we can respond } - +*/ //ensure that this is not a short packet if (payload_len < sizeof(usrp2_fw_update_data_t)){ printf("!Error in update packet handler: Expected payload length %d, but got %d\n", -- cgit v1.2.3 From a2dfa1988c6f624c3c45bd55ca7a7af9c10eb041 Mon Sep 17 00:00:00 2001 From: Nick Foster Date: Mon, 22 Nov 2010 16:50:14 -0800 Subject: N200 comes up with default IP and MAC when booted in safe mode (button pushed). --- firmware/microblaze/apps/txrx_uhd.c | 12 ++++++++++- firmware/microblaze/lib/eeprom.c | 12 +++++++++++ firmware/microblaze/lib/eth_addrs.c | 21 ++++++++++++++++++++ firmware/microblaze/lib/ethernet.h | 6 ++++++ firmware/microblaze/lib/i2c.h | 3 +++ firmware/microblaze/usrp2p/Makefile.am | 3 ++- .../microblaze/usrp2p/bootloader/init_bootloader.c | 23 ++++------------------ 7 files changed, 59 insertions(+), 21 deletions(-) (limited to 'firmware') diff --git a/firmware/microblaze/apps/txrx_uhd.c b/firmware/microblaze/apps/txrx_uhd.c index d00f2bc1f..c7163b6bf 100644 --- a/firmware/microblaze/apps/txrx_uhd.c +++ b/firmware/microblaze/apps/txrx_uhd.c @@ -497,6 +497,16 @@ main(void) { u2_init(); +//we do this to see if we should set a default ip addr or not +#ifdef USRP2P + bool safe_fw = find_safe_booted_flag(); + set_safe_booted_flag(0); + if(safe_fw) { + set_default_ip_addr(); + set_default_mac_addr(); + } +#endif + putstr("\nTxRx-NEWETH\n"); print_mac_addr(ethernet_mac_addr()->addr); newline(); @@ -507,7 +517,7 @@ main(void) //1) register the addresses into the network stack register_mac_addr(ethernet_mac_addr()); register_ip_addr(get_ip_addr()); - + //2) register callbacks for udp ports we service register_udp_listener(USRP2_UDP_CTRL_PORT, handle_udp_ctrl_packet); register_udp_listener(USRP2_UDP_DATA_PORT, handle_udp_data_packet); diff --git a/firmware/microblaze/lib/eeprom.c b/firmware/microblaze/lib/eeprom.c index b12ffe082..d4e170046 100644 --- a/firmware/microblaze/lib/eeprom.c +++ b/firmware/microblaze/lib/eeprom.c @@ -17,9 +17,21 @@ #include "i2c.h" #include "mdelay.h" +#include "usrp2/fw_common.h" static const int EEPROM_PAGESIZE = 16; +bool find_safe_booted_flag(void) { + unsigned char flag_byte; + eeprom_read(USRP2_I2C_ADDR_MBOARD, USRP2_EE_MBOARD_BOOTLOADER_FLAGS, &flag_byte, 1); + return (flag_byte == 0x5E); +} + +void set_safe_booted_flag(bool flag) { + unsigned char flag_byte = flag ? 0x5E : 0xDC; + eeprom_write(USRP2_I2C_ADDR_MBOARD, USRP2_EE_MBOARD_BOOTLOADER_FLAGS, &flag_byte, 1); +} + bool eeprom_write (int i2c_addr, int eeprom_offset, const void *buf, int len) { diff --git a/firmware/microblaze/lib/eth_addrs.c b/firmware/microblaze/lib/eth_addrs.c index c6320e4fa..ff5d04f4d 100644 --- a/firmware/microblaze/lib/eth_addrs.c +++ b/firmware/microblaze/lib/eth_addrs.c @@ -46,9 +46,20 @@ unprogrammed(const void *t, size_t len) //////////////////// MAC Addr Stuff /////////////////////// static int8_t src_mac_addr_initialized = false; + +static const eth_mac_addr_t default_mac_addr = {{ + 0x00, 0x50, 0xC2, 0x85, 0x3f, 0xff + }}; + static eth_mac_addr_t src_mac_addr = {{ 0x00, 0x50, 0xC2, 0x85, 0x3f, 0xff }}; + +void set_default_mac_addr(void) +{ + src_mac_addr_initialized = true; + src_mac_addr = default_mac_addr; +} const eth_mac_addr_t * ethernet_mac_addr(void) @@ -88,10 +99,20 @@ ethernet_set_mac_addr(const eth_mac_addr_t *t) //////////////////// IP Addr Stuff /////////////////////// static int8_t src_ip_addr_initialized = false; + +static const struct ip_addr default_ip_addr = { + (192 << 24 | 168 << 16 | 10 << 8 | 2 << 0) +}; + static struct ip_addr src_ip_addr = { (192 << 24 | 168 << 16 | 10 << 8 | 2 << 0) }; +void set_default_ip_addr(void) +{ + src_ip_addr_initialized = true; + src_ip_addr = default_ip_addr; +} const struct ip_addr *get_ip_addr(void) { diff --git a/firmware/microblaze/lib/ethernet.h b/firmware/microblaze/lib/ethernet.h index 8c6d8b567..52b297349 100644 --- a/firmware/microblaze/lib/ethernet.h +++ b/firmware/microblaze/lib/ethernet.h @@ -44,6 +44,9 @@ void ethernet_register_link_changed_callback(ethernet_link_changed_callback_t cb */ const eth_mac_addr_t *ethernet_mac_addr(void); +/*!set mac addr to default*/ +void set_default_mac_addr(void); + /*! * \brief write mac address to eeprom and begin using it */ @@ -54,6 +57,9 @@ bool ethernet_set_mac_addr(const eth_mac_addr_t *t); */ const struct ip_addr *get_ip_addr(void); +/*!set ip addr to default*/ +void set_default_ip_addr(void); + /*! * \brief write ip address to eeprom and begin using it */ diff --git a/firmware/microblaze/lib/i2c.h b/firmware/microblaze/lib/i2c.h index 6ff0e6982..1af4d72df 100644 --- a/firmware/microblaze/lib/i2c.h +++ b/firmware/microblaze/lib/i2c.h @@ -33,4 +33,7 @@ bool eeprom_write (int i2c_addr, int eeprom_offset, const void *buf, int len); bool eeprom_read (int i2c_addr, int eeprom_offset, void *buf, int len); +bool find_safe_booted_flag(void); +void set_safe_booted_flag(bool flag); + #endif /* INCLUDED_I2C_H */ diff --git a/firmware/microblaze/usrp2p/Makefile.am b/firmware/microblaze/usrp2p/Makefile.am index a5df3ff08..40766b406 100644 --- a/firmware/microblaze/usrp2p/Makefile.am +++ b/firmware/microblaze/usrp2p/Makefile.am @@ -18,7 +18,8 @@ include $(top_srcdir)/Makefile.common AM_CFLAGS = \ - $(COMMON_CFLAGS) + $(COMMON_CFLAGS) \ + -DUSRP2P AM_LDFLAGS = \ $(COMMON_LFLAGS) \ diff --git a/firmware/microblaze/usrp2p/bootloader/init_bootloader.c b/firmware/microblaze/usrp2p/bootloader/init_bootloader.c index 2bbbd405e..1d9d681d7 100644 --- a/firmware/microblaze/usrp2p/bootloader/init_bootloader.c +++ b/firmware/microblaze/usrp2p/bootloader/init_bootloader.c @@ -18,9 +18,6 @@ #include #include "usrp2/fw_common.h" -bool find_safe_booted_flag(void); -void set_safe_booted_flag(bool flag); - void pic_interrupt_handler() __attribute__ ((interrupt_handler)); void pic_interrupt_handler() @@ -28,18 +25,6 @@ void pic_interrupt_handler() // nop stub } -bool find_safe_booted_flag(void) { - unsigned char flag_byte; - eeprom_read(USRP2_I2C_ADDR_MBOARD, USRP2_EE_MBOARD_BOOTLOADER_FLAGS, &flag_byte, 1); - return (flag_byte == 0x5E); -} - -void set_safe_booted_flag(bool flag) { - unsigned char flag_byte = flag ? 0x5E : 0xDC; - eeprom_write(USRP2_I2C_ADDR_MBOARD, USRP2_EE_MBOARD_BOOTLOADER_FLAGS, &flag_byte, 1); -} - - void load_ihex(void) { //simple IHEX parser to load proper records into RAM. loads program when it receives end of record. char buf[128]; //input data buffer uint8_t ihx[32]; //ihex data buffer @@ -79,22 +64,22 @@ int main(int argc, char *argv[]) { puts("USRP2+ bootloader\n"); bool production_image = find_safe_booted_flag(); - if(production_image) set_safe_booted_flag(0); //we're the production image, so we clear the flag for the next boot - + set_safe_booted_flag(0); //haven't booted yet + if(BUTTON_PUSHED) { //see memory_map.h puts("Starting USRP2+ in safe mode."); if(is_valid_fw_image(SAFE_FW_IMAGE_LOCATION_ADDR)) { + set_safe_booted_flag(1); //let the firmware know it's the safe image spi_flash_read(SAFE_FW_IMAGE_LOCATION_ADDR, FW_IMAGE_SIZE_BYTES, (void *)RAM_BASE); start_program(RAM_BASE); puts("ERROR: return from main program! This should never happen!"); icap_reload_fpga(SAFE_FPGA_IMAGE_LOCATION_ADDR); } else { puts("ERROR: no safe firmware image available. I am a brick. Feel free to load IHEX to RAM."); - //puts("ERROR: no safe firmware image available. I am a brick."); load_ihex(); } } - + if(!production_image) { puts("Checking for valid production FPGA image..."); if(is_valid_fpga_image(PROD_FPGA_IMAGE_LOCATION_ADDR)) { -- cgit v1.2.3