From 57fcedbba7cbedda714aefa6653bf00e30e5981a Mon Sep 17 00:00:00 2001 From: Josh Blum Date: Wed, 17 Nov 2010 15:42:29 -0800 Subject: usrp2: removed buffer pool macros and constants from memory map --- firmware/microblaze/usrp2/memory_map.h | 108 --------------------------------- 1 file changed, 108 deletions(-) (limited to 'firmware/microblaze/usrp2/memory_map.h') diff --git a/firmware/microblaze/usrp2/memory_map.h b/firmware/microblaze/usrp2/memory_map.h index eac0c217f..8e2360c93 100644 --- a/firmware/microblaze/usrp2/memory_map.h +++ b/firmware/microblaze/usrp2/memory_map.h @@ -184,74 +184,6 @@ typedef struct { #define buffer_pool_status ((buffer_pool_status_t *) BUFFER_POOL_STATUS_BASE) -/* - * Buffer n's xfer is done. - * Clear this bit by issuing bp_clear_buf(n) - */ -#define BPS_DONE(n) (0x00000001 << (n)) -#define BPS_DONE_0 BPS_DONE(0) -#define BPS_DONE_1 BPS_DONE(1) -#define BPS_DONE_2 BPS_DONE(2) -#define BPS_DONE_3 BPS_DONE(3) -#define BPS_DONE_4 BPS_DONE(4) -#define BPS_DONE_5 BPS_DONE(5) -#define BPS_DONE_6 BPS_DONE(6) -#define BPS_DONE_7 BPS_DONE(7) - -/* - * Buffer n's xfer had an error. - * Clear this bit by issuing bp_clear_buf(n) - */ -#define BPS_ERROR(n) (0x00000100 << (n)) -#define BPS_ERROR_0 BPS_ERROR(0) -#define BPS_ERROR_1 BPS_ERROR(1) -#define BPS_ERROR_2 BPS_ERROR(2) -#define BPS_ERROR_3 BPS_ERROR(3) -#define BPS_ERROR_4 BPS_ERROR(4) -#define BPS_ERROR_5 BPS_ERROR(5) -#define BPS_ERROR_6 BPS_ERROR(6) -#define BPS_ERROR_7 BPS_ERROR(7) - -/* - * Buffer n is idle. A buffer is idle if it's not - * DONE, ERROR, or processing a transaction. If it's - * IDLE, it's safe to start a new transaction. - * - * Clear this bit by starting a xfer with - * bp_send_from_buf or bp_receive_to_buf. - */ -#define BPS_IDLE(n) (0x00010000 << (n)) -#define BPS_IDLE_0 BPS_IDLE(0) -#define BPS_IDLE_1 BPS_IDLE(1) -#define BPS_IDLE_2 BPS_IDLE(2) -#define BPS_IDLE_3 BPS_IDLE(3) -#define BPS_IDLE_4 BPS_IDLE(4) -#define BPS_IDLE_5 BPS_IDLE(5) -#define BPS_IDLE_6 BPS_IDLE(6) -#define BPS_IDLE_7 BPS_IDLE(7) - -/* - * Buffer n has a "slow path" packet in it. - * This bit is orthogonal to the bits above and indicates that - * the FPGA ethernet rx protocol engine has identified this packet - * as one requiring firmware intervention. - */ -#define BPS_SLOWPATH(n) (0x01000000 << (n)) -#define BPS_SLOWPATH_0 BPS_SLOWPATH(0) -#define BPS_SLOWPATH_1 BPS_SLOWPATH(1) -#define BPS_SLOWPATH_2 BPS_SLOWPATH(2) -#define BPS_SLOWPATH_3 BPS_SLOWPATH(3) -#define BPS_SLOWPATH_4 BPS_SLOWPATH(4) -#define BPS_SLOWPATH_5 BPS_SLOWPATH(5) -#define BPS_SLOWPATH_6 BPS_SLOWPATH(6) -#define BPS_SLOWPATH_7 BPS_SLOWPATH(7) - - -#define BPS_DONE_ALL 0x000000ff // mask of all dones -#define BPS_ERROR_ALL 0x0000ff00 // mask of all errors -#define BPS_IDLE_ALL 0x00ff0000 // mask of all idles -#define BPS_SLOWPATH_ALL 0xff000000 // mask of all slowpaths - // The hw_config register #define HWC_SIMULATION 0x80000000 @@ -319,46 +251,6 @@ typedef struct { volatile uint32_t ctrl; } buffer_pool_ctrl_t; -// buffer pool ports - -#define PORT_SERDES 0 // serial/deserializer -#define PORT_DSP 1 // DSP tx or rx pipeline -#define PORT_ETH 2 // ethernet tx or rx -#define PORT_RAM 3 // RAM tx or rx - -// the buffer pool ctrl register fields - -#define BPC_BUFFER(n) (((n) & 0xf) << 28) -#define BPC_BUFFER_MASK BPC_BUFFER(~0) -#define BPC_BUFFER_0 BPC_BUFFER(0) -#define BPC_BUFFER_1 BPC_BUFFER(1) -#define BPC_BUFFER_2 BPC_BUFFER(2) -#define BPC_BUFFER_3 BPC_BUFFER(3) -#define BPC_BUFFER_4 BPC_BUFFER(4) -#define BPC_BUFFER_5 BPC_BUFFER(5) -#define BPC_BUFFER_6 BPC_BUFFER(6) -#define BPC_BUFFER_7 BPC_BUFFER(7) -#define BPC_BUFFER_NIL BPC_BUFFER(0x8) // disable - -#define BPC_PORT(n) (((n) & 0x7) << 25) -#define BPC_PORT_MASK BPC_PORT(~0) -#define BPC_PORT_SERDES BPC_PORT(PORT_SERDES) -#define BPC_PORT_DSP BPC_PORT(PORT_DSP) -#define BPC_PORT_ETH BPC_PORT(PORT_ETH) -#define BPC_PORT_RAM BPC_PORT(PORT_RAM) -#define BPC_PORT_NIL BPC_PORT(0x4) // disable - -#define BPC_CLR (1 << 24) // mutually excl commands -#define BPC_READ (1 << 23) -#define BPC_WRITE (1 << 22) - -#define BPC_STEP(step) (((step) & 0xf) << 18) -#define BPC_STEP_MASK BPC_STEP(~0) -#define BPC_LAST_LINE(line) (((line) & 0x1ff) << 9) -#define BPC_LAST_LINE_MASK BPC_LAST_LINE(~0) -#define BPC_FIRST_LINE(line) (((line) & 0x1ff) << 0) -#define BPC_FIRST_LINE_MASK BPC_FIRST_LINE(~0) - #define buffer_pool_ctrl ((buffer_pool_ctrl_t *) BUFFER_POOL_CTRL_BASE) // --- misc outputs --- -- cgit v1.2.3 From 58d19c5adf7bde9298ad4363c275f72e4bbecd73 Mon Sep 17 00:00:00 2001 From: Josh Blum Date: Wed, 17 Nov 2010 16:42:27 -0800 Subject: usrp2: remove non-relevant buffer pool things from memory map --- firmware/microblaze/usrp2/memory_map.h | 6 ++---- firmware/microblaze/usrp2p/memory_map.h | 6 ++---- 2 files changed, 4 insertions(+), 8 deletions(-) (limited to 'firmware/microblaze/usrp2/memory_map.h') diff --git a/firmware/microblaze/usrp2/memory_map.h b/firmware/microblaze/usrp2/memory_map.h index 8e2360c93..2b07ff148 100644 --- a/firmware/microblaze/usrp2/memory_map.h +++ b/firmware/microblaze/usrp2/memory_map.h @@ -53,9 +53,7 @@ #define BUFFER_POOL_RAM_BASE 0x8000 -#define NBUFFERS 8 #define BP_NLINES 0x0200 // number of 32-bit lines in a buffer -#define BP_LAST_LINE (BP_NLINES - 1) // last line in a buffer #define buffer_pool_ram \ ((uint32_t *) BUFFER_POOL_RAM_BASE) @@ -173,8 +171,8 @@ typedef struct { #define BUFFER_POOL_STATUS_BASE 0xCC00 typedef struct { - volatile uint32_t last_line[NBUFFERS]; // last line xfer'd in buffer - volatile uint32_t status; // error and done flags + volatile uint32_t _padding[8]; + volatile uint32_t status; volatile uint32_t hw_config; // see below volatile uint32_t dummy[3]; volatile uint32_t irqs; diff --git a/firmware/microblaze/usrp2p/memory_map.h b/firmware/microblaze/usrp2p/memory_map.h index ca2933f6c..431dc19e7 100644 --- a/firmware/microblaze/usrp2p/memory_map.h +++ b/firmware/microblaze/usrp2p/memory_map.h @@ -78,9 +78,7 @@ wb_1master #(.decode_w(8), #define BUFFER_POOL_RAM_BASE 0x4000 -#define NBUFFERS 8 #define BP_NLINES 0x0200 // number of 32-bit lines in a buffer -#define BP_LAST_LINE (BP_NLINES - 1) // last line in a buffer #define buffer_pool_ram \ ((uint32_t *) BUFFER_POOL_RAM_BASE) @@ -198,8 +196,8 @@ typedef struct { #define BUFFER_POOL_STATUS_BASE 0x3300 typedef struct { - volatile uint32_t last_line[NBUFFERS]; // last line xfer'd in buffer - volatile uint32_t status; // error and done flags + volatile uint32_t _padding[8]; + volatile uint32_t status; volatile uint32_t hw_config; // see below volatile uint32_t dummy[3]; volatile uint32_t irqs; -- cgit v1.2.3 From 07de916b7646c78d4ad5ba9104d52343e993d198 Mon Sep 17 00:00:00 2001 From: Josh Blum Date: Tue, 23 Nov 2010 18:09:51 -0800 Subject: packet_router: added sregs for ip addr and ports the pkt control now programs the inspector with port and ip addr set the eth mac to pass all unicast added easy debug flag to net common --- firmware/microblaze/apps/txrx_uhd.c | 2 +- firmware/microblaze/lib/eth_mac.c | 4 +++- firmware/microblaze/lib/net_common.c | 10 ++++++---- firmware/microblaze/lib/pkt_ctrl.c | 16 +++++----------- firmware/microblaze/lib/pkt_ctrl.h | 8 ++++++-- firmware/microblaze/usrp2/memory_map.h | 2 ++ firmware/microblaze/usrp2p/memory_map.h | 2 ++ 7 files changed, 25 insertions(+), 19 deletions(-) (limited to 'firmware/microblaze/usrp2/memory_map.h') diff --git a/firmware/microblaze/apps/txrx_uhd.c b/firmware/microblaze/apps/txrx_uhd.c index 6f852bb18..8ee53ac3e 100644 --- a/firmware/microblaze/apps/txrx_uhd.c +++ b/firmware/microblaze/apps/txrx_uhd.c @@ -349,7 +349,7 @@ main(void) //1) register the addresses into the network stack register_addrs(ethernet_mac_addr(), get_ip_addr()); - pkt_ctrl_register_ip_addr(get_ip_addr()); + pkt_ctrl_program_inspector(get_ip_addr(), USRP2_UDP_DATA_PORT); //2) register callbacks for udp ports we service register_udp_listener(USRP2_UDP_CTRL_PORT, handle_udp_ctrl_packet); diff --git a/firmware/microblaze/lib/eth_mac.c b/firmware/microblaze/lib/eth_mac.c index 034a4d494..581a5c69f 100644 --- a/firmware/microblaze/lib/eth_mac.c +++ b/firmware/microblaze/lib/eth_mac.c @@ -28,6 +28,7 @@ void eth_mac_set_addr(const eth_mac_addr_t *src) { + /* disable because MAC_SET_PASS_ALL is set below eth_mac->ucast_hi = (((unsigned int)src->addr[0])<<8) + ((unsigned int)src->addr[1]); @@ -36,6 +37,7 @@ eth_mac_set_addr(const eth_mac_addr_t *src) (((unsigned int)src->addr[3])<<16) + (((unsigned int)src->addr[4])<<8) + (((unsigned int)src->addr[5])); +*/ } @@ -45,7 +47,7 @@ eth_mac_init(const eth_mac_addr_t *src) eth_mac->miimoder = 25; // divider from CPU clock (50MHz/25 = 2MHz) eth_mac_set_addr(src); - eth_mac->settings = MAC_SET_PAUSE_EN | MAC_SET_PASS_BCAST | MAC_SET_PASS_UCAST | MAC_SET_PAUSE_SEND_EN; + eth_mac->settings = MAC_SET_PAUSE_EN | MAC_SET_PASS_BCAST | MAC_SET_PASS_UCAST | MAC_SET_PAUSE_SEND_EN | MAC_SET_PASS_ALL; eth_mac->pause_time = 38; eth_mac->pause_thresh = 1200; diff --git a/firmware/microblaze/lib/net_common.c b/firmware/microblaze/lib/net_common.c index 9804ae4c5..947f41dae 100644 --- a/firmware/microblaze/lib/net_common.c +++ b/firmware/microblaze/lib/net_common.c @@ -37,6 +37,8 @@ #include #include "pkt_ctrl.h" +static const bool debug = false; + static const eth_mac_addr_t BCAST_MAC_ADDR = {{0xff, 0xff, 0xff, 0xff, 0xff, 0xff}}; // ------------------------------------------------------------------------ @@ -159,7 +161,7 @@ send_pkt(eth_mac_addr_t dst, int ethertype, total_len = 60; pkt_ctrl_commit_outgoing_buffer(total_len/4); - //printf("sent %d bytes\n", total_len); + if (debug) printf("sent %d bytes\n", (int)total_len); } unsigned int CHKSUM(unsigned int x, unsigned int *chksum) @@ -388,9 +390,9 @@ handle_arp_packet(struct arp_eth_ipv4 *p, size_t size) void handle_eth_packet(uint32_t *p, size_t nlines) { - //static size_t bcount = 0; - //printf("===> %d\n", bcount++); - //print_buffer(p, nlines); + static size_t bcount = 0; + if (debug) printf("===> %d\n", (int)bcount++); + if (debug) print_buffer(p, nlines); padded_eth_hdr_t *eth_hdr = (padded_eth_hdr_t *)p; diff --git a/firmware/microblaze/lib/pkt_ctrl.c b/firmware/microblaze/lib/pkt_ctrl.c index 9870a1f8a..f4b4b7825 100644 --- a/firmware/microblaze/lib/pkt_ctrl.c +++ b/firmware/microblaze/lib/pkt_ctrl.c @@ -17,8 +17,6 @@ #include "pkt_ctrl.h" #include "memory_map.h" -#include -#include #include static void set_control(uint32_t value, uint32_t mask){ @@ -47,15 +45,11 @@ static bool is_status_bit_set(int bit){ #define MODE_BIT 2 #define CLR_BIT 8 -void pkt_ctrl_register_ip_addr(const struct ip_addr *ip_addr){ - //program in the ip addr - set_control(0x1 << 4, 0x3 << 4); - set_control((ip_addr->addr & 0x0000ffff) << 16, 0xffff << 16); - set_control(0x2 << 4, 0x3 << 4); - set_control((ip_addr->addr & 0xffff0000) << 0, 0xffff << 16); - - //clear cmd - set_control(0x0, 0x3 << 4); +void pkt_ctrl_program_inspector( + const struct ip_addr *ip_addr, uint16_t dsp_udp_port +){ + buffer_pool_ctrl->ip_addr = ip_addr->addr; + buffer_pool_ctrl->udp_ports = dsp_udp_port; } void pkt_ctrl_set_routing_mode(pkt_ctrl_routing_mode_t mode){ diff --git a/firmware/microblaze/lib/pkt_ctrl.h b/firmware/microblaze/lib/pkt_ctrl.h index 2e175bca0..927d1fc7a 100644 --- a/firmware/microblaze/lib/pkt_ctrl.h +++ b/firmware/microblaze/lib/pkt_ctrl.h @@ -19,6 +19,8 @@ #define INCLUDED_PKT_CTRL_H #include +#include +#include #include typedef enum { @@ -26,8 +28,10 @@ typedef enum { PKT_CTRL_ROUTING_MODE_MASTER, } pkt_ctrl_routing_mode_t; -//! Register the IP address into the router -void pkt_ctrl_register_ip_addr(const struct ip_addr *ip_addr); +//! Program the decision values into the packet inspector +void pkt_ctrl_program_inspector( + const struct ip_addr *ip_addr, uint16_t dsp_udp_port +); //! Set the routing mode for this device void pkt_ctrl_set_routing_mode(pkt_ctrl_routing_mode_t mode); diff --git a/firmware/microblaze/usrp2/memory_map.h b/firmware/microblaze/usrp2/memory_map.h index 2b07ff148..25c800893 100644 --- a/firmware/microblaze/usrp2/memory_map.h +++ b/firmware/microblaze/usrp2/memory_map.h @@ -247,6 +247,8 @@ hwconfig_wishbone_divisor(void) typedef struct { volatile uint32_t ctrl; + volatile uint32_t ip_addr; + volatile uint32_t udp_ports; //dsp0 (low 16) dsp1 (high 16) } buffer_pool_ctrl_t; #define buffer_pool_ctrl ((buffer_pool_ctrl_t *) BUFFER_POOL_CTRL_BASE) diff --git a/firmware/microblaze/usrp2p/memory_map.h b/firmware/microblaze/usrp2p/memory_map.h index 431dc19e7..dedfdac8b 100644 --- a/firmware/microblaze/usrp2p/memory_map.h +++ b/firmware/microblaze/usrp2p/memory_map.h @@ -274,6 +274,8 @@ hwconfig_wishbone_divisor(void) typedef struct { volatile uint32_t ctrl; + volatile uint32_t ip_addr; + volatile uint32_t udp_ports; //dsp0 (low 16) dsp1 (high 16) } buffer_pool_ctrl_t; #define buffer_pool_ctrl ((buffer_pool_ctrl_t *) BUFFER_POOL_CTRL_BASE) -- cgit v1.2.3 From ecdb22b449e13d1ded69b82e5736d4c09c7db23a Mon Sep 17 00:00:00 2001 From: Josh Blum Date: Wed, 24 Nov 2010 20:26:38 -0800 Subject: packet_router: added cpu input and output control registers, modified control code --- firmware/microblaze/lib/pkt_ctrl.c | 54 +++++++++++---------------------- firmware/microblaze/usrp2/memory_map.h | 4 ++- firmware/microblaze/usrp2p/memory_map.h | 4 ++- 3 files changed, 23 insertions(+), 39 deletions(-) (limited to 'firmware/microblaze/usrp2/memory_map.h') diff --git a/firmware/microblaze/lib/pkt_ctrl.c b/firmware/microblaze/lib/pkt_ctrl.c index f4b4b7825..d2bfc339d 100644 --- a/firmware/microblaze/lib/pkt_ctrl.c +++ b/firmware/microblaze/lib/pkt_ctrl.c @@ -19,32 +19,6 @@ #include "memory_map.h" #include -static void set_control(uint32_t value, uint32_t mask){ - static uint32_t ctrl_shadow = 0; - - ctrl_shadow &= ~mask; - ctrl_shadow |= value & mask; - - buffer_pool_ctrl->ctrl = ctrl_shadow; -} - -static void set_control_bit(int bit){ - set_control(1 << bit, 1 << bit); -} - -static void clr_control_bit(int bit){ - set_control(0 << bit, 1 << bit); -} - -static bool is_status_bit_set(int bit){ - return buffer_pool_status->status & (1 << bit); -} - -#define INP_HS_BIT 0 //CPU out in packet_router.v -#define OUT_HS_BIT 1 //CPU inp in packet_router.v -#define MODE_BIT 2 -#define CLR_BIT 8 - void pkt_ctrl_program_inspector( const struct ip_addr *ip_addr, uint16_t dsp_udp_port ){ @@ -55,34 +29,40 @@ void pkt_ctrl_program_inspector( void pkt_ctrl_set_routing_mode(pkt_ctrl_routing_mode_t mode){ switch(mode){ case PKT_CTRL_ROUTING_MODE_SLAVE: - clr_control_bit(MODE_BIT); + buffer_pool_ctrl->misc_ctrl = 0; break; case PKT_CTRL_ROUTING_MODE_MASTER: - set_control_bit(MODE_BIT); + buffer_pool_ctrl->misc_ctrl = 1; break; } } +static inline bool is_status_bit_set(int bit){ + return buffer_pool_status->status & (1 << bit); +} + +#define CPU_OUT_HS_BIT 0 //from packet router to CPU +#define CPU_INP_HS_BIT 1 //from CPU to packet router + void *pkt_ctrl_claim_incoming_buffer(size_t *num_lines){ - if (!is_status_bit_set(INP_HS_BIT)) return NULL; + if (!is_status_bit_set(CPU_OUT_HS_BIT)) return NULL; *num_lines = (buffer_pool_status->status >> 16) & 0xffff; return buffer_ram(0); } void pkt_ctrl_release_incoming_buffer(void){ - set_control_bit(INP_HS_BIT); - while (is_status_bit_set(INP_HS_BIT)){} - clr_control_bit(INP_HS_BIT); + buffer_pool_ctrl->cpu_out_ctrl = 1; + while (is_status_bit_set(CPU_OUT_HS_BIT)){} + buffer_pool_ctrl->cpu_out_ctrl = 0; } void *pkt_ctrl_claim_outgoing_buffer(void){ - while (!is_status_bit_set(OUT_HS_BIT)){} + while (!is_status_bit_set(CPU_INP_HS_BIT)){} return buffer_ram(1); } void pkt_ctrl_commit_outgoing_buffer(size_t num_lines){ - set_control(num_lines << 16, 0xffff << 16); - set_control_bit(OUT_HS_BIT); - while (is_status_bit_set(OUT_HS_BIT)){} - clr_control_bit(OUT_HS_BIT); + buffer_pool_ctrl->cpu_inp_ctrl = ((num_lines & 0xffff) << 16) | 1; + while (is_status_bit_set(CPU_INP_HS_BIT)){} + buffer_pool_ctrl->cpu_inp_ctrl = 0; } diff --git a/firmware/microblaze/usrp2/memory_map.h b/firmware/microblaze/usrp2/memory_map.h index 25c800893..09aef643e 100644 --- a/firmware/microblaze/usrp2/memory_map.h +++ b/firmware/microblaze/usrp2/memory_map.h @@ -246,9 +246,11 @@ hwconfig_wishbone_divisor(void) // --- buffer pool control regs --- typedef struct { - volatile uint32_t ctrl; + volatile uint32_t misc_ctrl; volatile uint32_t ip_addr; volatile uint32_t udp_ports; //dsp0 (low 16) dsp1 (high 16) + volatile uint32_t cpu_out_ctrl; + volatile uint32_t cpu_inp_ctrl; } buffer_pool_ctrl_t; #define buffer_pool_ctrl ((buffer_pool_ctrl_t *) BUFFER_POOL_CTRL_BASE) diff --git a/firmware/microblaze/usrp2p/memory_map.h b/firmware/microblaze/usrp2p/memory_map.h index dedfdac8b..277f433c5 100644 --- a/firmware/microblaze/usrp2p/memory_map.h +++ b/firmware/microblaze/usrp2p/memory_map.h @@ -273,9 +273,11 @@ hwconfig_wishbone_divisor(void) // --- buffer pool control regs --- typedef struct { - volatile uint32_t ctrl; + volatile uint32_t misc_ctrl; volatile uint32_t ip_addr; volatile uint32_t udp_ports; //dsp0 (low 16) dsp1 (high 16) + volatile uint32_t cpu_out_ctrl; + volatile uint32_t cpu_inp_ctrl; } buffer_pool_ctrl_t; #define buffer_pool_ctrl ((buffer_pool_ctrl_t *) BUFFER_POOL_CTRL_BASE) -- cgit v1.2.3 From 096405b9291d1d3b3ac37d9768232cca43a37db6 Mon Sep 17 00:00:00 2001 From: Josh Blum Date: Fri, 10 Dec 2010 18:57:17 -0800 Subject: packet_router: added control register to set the udp control port --- firmware/microblaze/apps/txrx_uhd.c | 2 +- firmware/microblaze/lib/pkt_ctrl.c | 5 +++-- firmware/microblaze/lib/pkt_ctrl.h | 2 +- firmware/microblaze/usrp2/memory_map.h | 3 ++- firmware/microblaze/usrp2p/memory_map.h | 3 ++- 5 files changed, 9 insertions(+), 6 deletions(-) (limited to 'firmware/microblaze/usrp2/memory_map.h') diff --git a/firmware/microblaze/apps/txrx_uhd.c b/firmware/microblaze/apps/txrx_uhd.c index 8ee53ac3e..dc41e56c4 100644 --- a/firmware/microblaze/apps/txrx_uhd.c +++ b/firmware/microblaze/apps/txrx_uhd.c @@ -349,7 +349,7 @@ main(void) //1) register the addresses into the network stack register_addrs(ethernet_mac_addr(), get_ip_addr()); - pkt_ctrl_program_inspector(get_ip_addr(), USRP2_UDP_DATA_PORT); + pkt_ctrl_program_inspector(get_ip_addr(), USRP2_UDP_CTRL_PORT, USRP2_UDP_DATA_PORT); //2) register callbacks for udp ports we service register_udp_listener(USRP2_UDP_CTRL_PORT, handle_udp_ctrl_packet); diff --git a/firmware/microblaze/lib/pkt_ctrl.c b/firmware/microblaze/lib/pkt_ctrl.c index d2bfc339d..7e095ec00 100644 --- a/firmware/microblaze/lib/pkt_ctrl.c +++ b/firmware/microblaze/lib/pkt_ctrl.c @@ -20,10 +20,11 @@ #include void pkt_ctrl_program_inspector( - const struct ip_addr *ip_addr, uint16_t dsp_udp_port + const struct ip_addr *ip_addr, uint16_t ctrl_port, uint16_t data_port ){ buffer_pool_ctrl->ip_addr = ip_addr->addr; - buffer_pool_ctrl->udp_ports = dsp_udp_port; + buffer_pool_ctrl->ctrl_ports = ctrl_port; + buffer_pool_ctrl->data_ports = data_port; } void pkt_ctrl_set_routing_mode(pkt_ctrl_routing_mode_t mode){ diff --git a/firmware/microblaze/lib/pkt_ctrl.h b/firmware/microblaze/lib/pkt_ctrl.h index 927d1fc7a..346e22094 100644 --- a/firmware/microblaze/lib/pkt_ctrl.h +++ b/firmware/microblaze/lib/pkt_ctrl.h @@ -30,7 +30,7 @@ typedef enum { //! Program the decision values into the packet inspector void pkt_ctrl_program_inspector( - const struct ip_addr *ip_addr, uint16_t dsp_udp_port + const struct ip_addr *ip_addr, uint16_t ctrl_port, uint16_t data_port ); //! Set the routing mode for this device diff --git a/firmware/microblaze/usrp2/memory_map.h b/firmware/microblaze/usrp2/memory_map.h index 09aef643e..23d96389f 100644 --- a/firmware/microblaze/usrp2/memory_map.h +++ b/firmware/microblaze/usrp2/memory_map.h @@ -248,7 +248,8 @@ hwconfig_wishbone_divisor(void) typedef struct { volatile uint32_t misc_ctrl; volatile uint32_t ip_addr; - volatile uint32_t udp_ports; //dsp0 (low 16) dsp1 (high 16) + volatile uint32_t ctrl_ports; //ctrl (low 16) other (high 16) + volatile uint32_t data_ports; //dsp0 (low 16) dsp1 (high 16) volatile uint32_t cpu_out_ctrl; volatile uint32_t cpu_inp_ctrl; } buffer_pool_ctrl_t; diff --git a/firmware/microblaze/usrp2p/memory_map.h b/firmware/microblaze/usrp2p/memory_map.h index 277f433c5..5edb3b313 100644 --- a/firmware/microblaze/usrp2p/memory_map.h +++ b/firmware/microblaze/usrp2p/memory_map.h @@ -275,7 +275,8 @@ hwconfig_wishbone_divisor(void) typedef struct { volatile uint32_t misc_ctrl; volatile uint32_t ip_addr; - volatile uint32_t udp_ports; //dsp0 (low 16) dsp1 (high 16) + volatile uint32_t ctrl_ports; //ctrl (low 16) other (high 16) + volatile uint32_t data_ports; //dsp0 (low 16) dsp1 (high 16) volatile uint32_t cpu_out_ctrl; volatile uint32_t cpu_inp_ctrl; } buffer_pool_ctrl_t; -- cgit v1.2.3