From a7c230cb1f97b452da027d5baa71891f2066d430 Mon Sep 17 00:00:00 2001 From: Josh Blum Date: Wed, 28 Apr 2010 16:35:22 -0700 Subject: Added reload flag to the stream cmd. This reloads the last command to handle continuous streaming in hardware. Moved rx control register setup and stream command issuing to the host. --- firmware/microblaze/lib/banal.c | 18 ------------------ firmware/microblaze/lib/banal.h | 3 --- firmware/microblaze/lib/memory_map.h | 4 ---- firmware/microblaze/lib/u2_init.c | 4 ++-- 4 files changed, 2 insertions(+), 27 deletions(-) (limited to 'firmware/microblaze/lib') diff --git a/firmware/microblaze/lib/banal.c b/firmware/microblaze/lib/banal.c index 23f5f3b8a..42937957f 100644 --- a/firmware/microblaze/lib/banal.c +++ b/firmware/microblaze/lib/banal.c @@ -29,21 +29,3 @@ get_uint64(const unsigned char *s) { return (((uint64_t)get_uint32(s)) << 32) | get_uint32(s+4); } - -uint32_t -divide_uint64(uint64_t dividend, uint32_t divisor) -{ - uint32_t result = 0; - uint64_t dividend_ = 0; - for(int i = 31; i >= 0; i--){ - //approximate the divisor with the ith result bit set - uint64_t tmp = dividend_; - tmp += (uint64_t)divisor << i; - //set the ith result bit if the approximation is less - if (tmp <= dividend){ - dividend_ = tmp; - result |= 1 << i; - } - } - return result; -} diff --git a/firmware/microblaze/lib/banal.h b/firmware/microblaze/lib/banal.h index 6d9420602..7b3c71a20 100644 --- a/firmware/microblaze/lib/banal.h +++ b/firmware/microblaze/lib/banal.h @@ -87,7 +87,4 @@ get_int64(const unsigned char *s) void print_ip(struct ip_addr ip); -uint32_t -divide_uint64(uint64_t dividend, uint32_t divisor); - #endif /* INCLUDED_BANAL_H */ diff --git a/firmware/microblaze/lib/memory_map.h b/firmware/microblaze/lib/memory_map.h index fed1e5259..cdf3dd338 100644 --- a/firmware/microblaze/lib/memory_map.h +++ b/firmware/microblaze/lib/memory_map.h @@ -525,10 +525,6 @@ typedef struct { volatile uint32_t pad[7]; // Make each structure 16 elements long } sr_rx_ctrl_t; -#define MAX_SAMPLES_PER_CMD 0x3fffffff -#define MK_RX_CMD(nsamples, now, chain) \ - ((((now) & 0x1) << 31) | (((chain) & 0x1) << 30) | ((nsamples) & 0x3fffffff)) - #define sr_rx_ctrl ((sr_rx_ctrl_t *) _SR_ADDR(SR_RX_CTRL)) // --- dsp rx regs --- diff --git a/firmware/microblaze/lib/u2_init.c b/firmware/microblaze/lib/u2_init.c index 399d834cb..40237ba87 100644 --- a/firmware/microblaze/lib/u2_init.c +++ b/firmware/microblaze/lib/u2_init.c @@ -50,8 +50,8 @@ u2_init(void) hal_gpio_set_ddr(GPIO_TX_BANK, 0x0000, 0xffff); hal_gpio_set_ddr(GPIO_RX_BANK, 0x0000, 0xffff); - hal_gpio_write(GPIO_TX_BANK, 0x0000, 0xffff); // init s/w output value to zero - hal_gpio_write(GPIO_RX_BANK, 0x0000, 0xffff); + //hal_gpio_write(GPIO_TX_BANK, 0x0000, 0xffff); // init s/w output value to zero + //hal_gpio_write(GPIO_RX_BANK, 0x0000, 0xffff); dsp_rx_regs->gpio_stream_enable = 0; // I, Q LSBs come from DSP -- cgit v1.2.3 From c79595e6cc0044d09432aab19b26c3ac4d256595 Mon Sep 17 00:00:00 2001 From: Josh Blum Date: Wed, 28 Apr 2010 17:23:55 -0700 Subject: removed some unused things like gpio from microblaze code --- firmware/microblaze/apps/txrx_uhd.c | 25 ------ firmware/microblaze/lib/Makefile.am | 1 - firmware/microblaze/lib/hal_io.c | 128 ------------------------------- firmware/microblaze/lib/hal_io.h | 58 -------------- firmware/microblaze/lib/print_fxpt.c | 83 -------------------- firmware/microblaze/lib/print_mac_addr.c | 10 +-- firmware/microblaze/lib/u2_init.c | 11 --- 7 files changed, 4 insertions(+), 312 deletions(-) delete mode 100644 firmware/microblaze/lib/print_fxpt.c (limited to 'firmware/microblaze/lib') diff --git a/firmware/microblaze/apps/txrx_uhd.c b/firmware/microblaze/apps/txrx_uhd.c index d5b400e0c..db830fa51 100644 --- a/firmware/microblaze/apps/txrx_uhd.c +++ b/firmware/microblaze/apps/txrx_uhd.c @@ -22,8 +22,6 @@ #include "config.h" #endif -#define DEBUG_MODE 0 //0 for normal operation - #include #include #include "u2_init.h" @@ -49,8 +47,6 @@ #include #include -#define LEDS_SW LED_A - /* * Full duplex Tx and Rx between ethernet and DSP pipelines * @@ -481,27 +477,6 @@ main(void) register_udp_listener(USRP2_UDP_CTRL_PORT, handle_udp_ctrl_packet); register_udp_listener(USRP2_UDP_DATA_PORT, handle_udp_data_packet); - hal_set_led_src(0, LEDS_SW); - -#if 0 - // make bit 15 of Tx gpio's be a s/w output - hal_gpio_set_sel(GPIO_TX_BANK, 15, 's'); - hal_gpio_set_ddr(GPIO_TX_BANK, 0x8000, 0x8000); -#endif - -//set them all to the atr settings by default -hal_gpio_set_sels(GPIO_TX_BANK, "aaaaaaaaaaaaaaaa"); -hal_gpio_set_sels(GPIO_RX_BANK, "aaaaaaaaaaaaaaaa"); - - output_regs->debug_mux_ctrl = 1; -#if DEBUG_MODE - hal_gpio_set_sels(GPIO_TX_BANK, "0000000000000000"); - hal_gpio_set_sels(GPIO_RX_BANK, "0000000000000000"); - hal_gpio_set_ddr(GPIO_TX_BANK, 0xffff, 0xffff); - hal_gpio_set_ddr(GPIO_RX_BANK, 0xffff, 0xffff); -#endif - - // initialize double buffering state machine for ethernet -> DSP Tx dbsm_init(&dsp_tx_sm, DSP_TX_BUF_0, diff --git a/firmware/microblaze/lib/Makefile.am b/firmware/microblaze/lib/Makefile.am index 783895850..b51d74463 100644 --- a/firmware/microblaze/lib/Makefile.am +++ b/firmware/microblaze/lib/Makefile.am @@ -44,7 +44,6 @@ libu2fw_a_SOURCES = \ pic.c \ print_mac_addr.c \ print_rmon_regs.c \ - print_fxpt.c \ print_buffer.c \ printf.c \ sd.c \ diff --git a/firmware/microblaze/lib/hal_io.c b/firmware/microblaze/lib/hal_io.c index fdfa15000..0afd6a2cc 100644 --- a/firmware/microblaze/lib/hal_io.c +++ b/firmware/microblaze/lib/hal_io.c @@ -24,134 +24,6 @@ #include #include #include -//#include - -/* - * ======================================================================== - * GPIOS - * ======================================================================== - */ -void -hal_gpio_set_ddr(int bank, int value, int mask) -{ - bank &= 0x1; - - if (bank == GPIO_TX_BANK){ // tx in top half - value <<= 16; - mask <<= 16; - } - else { - value &= 0xffff; - mask &= 0xffff; - } - - int ei = hal_disable_ints(); - gpio_base->ddr = (gpio_base->ddr & ~mask) | (value & mask); - hal_restore_ints(ei); -} - -static bool -code_to_int(char code, int *val) -{ - switch(code){ - case 's': *val = GPIO_SEL_SW; return true; - case 'a': *val = GPIO_SEL_ATR; return true; - case '0': *val = GPIO_SEL_DEBUG_0; return true; - case '1': *val = GPIO_SEL_DEBUG_1; return true; - case '.': - default: - return false; - } -} - -void -hal_gpio_set_sel(int bank, int bitno, char code) -{ - bank &= 0x1; - int t; - - if (!code_to_int(code, &t)) - return; - - int val = t << (2 * bitno); - int mask = 0x3 << (2 * bitno); - - volatile uint32_t *sel = bank == GPIO_TX_BANK ? &gpio_base->tx_sel : &gpio_base->rx_sel; - int ei = hal_disable_ints(); - int v = (*sel & ~mask) | (val & mask); - *sel = v; - hal_restore_ints(ei); - - if (0) - printf("hal_gpio_set_sel(bank=%d, bitno=%d, code=%c) *sel = 0x%x\n", - bank, bitno, code, v); -} - -void -hal_gpio_set_sels(int bank, char *codes) -{ - //assert(strlen(codes) == 16); - - int val = 0; - int mask = 0; - int i; - - for (i = 15; i >= 0; i--){ - val <<= 2; - mask <<= 2; - int t; - if (code_to_int(codes[i], &t)){ - val |= t; - mask |= 0x3; - } - } - - volatile uint32_t *sel = bank == GPIO_TX_BANK ? &gpio_base->tx_sel : &gpio_base->rx_sel; - int ei = hal_disable_ints(); - *sel = (*sel & ~mask) | (val & mask); - hal_restore_ints(ei); -} - - -/*! - * \brief write \p value to gpio pins specified by \p mask. - */ -void -hal_gpio_write(int bank, int value, int mask) -{ - static uint32_t _gpio_io_shadow; - - bank &= 0x1; - - if (bank == GPIO_TX_BANK){ // tx in top half - value <<= 16; - mask <<= 16; - } - else { - value &= 0xffff; - mask &= 0xffff; - } - - //int ei = hal_disable_ints(); - _gpio_io_shadow = (_gpio_io_shadow & ~mask) | (value & mask); - gpio_base->io = _gpio_io_shadow; - //hal_restore_ints(ei); -} - - -/*! - * \brief read GPIO bits - */ -int -hal_gpio_read(int bank) -{ - bank &= 0x1; - int r = gpio_base->io; - if (bank == GPIO_TX_BANK) - r >>= 16; - - return r & 0xffff; -} /* * ======================================================================== diff --git a/firmware/microblaze/lib/hal_io.h b/firmware/microblaze/lib/hal_io.h index f8ec617f8..d8967f063 100644 --- a/firmware/microblaze/lib/hal_io.h +++ b/firmware/microblaze/lib/hal_io.h @@ -24,64 +24,6 @@ void hal_io_init(void); void hal_finish(); - -/* - * ------------------------------------------------------------------------ - * The GPIO pins are organized into two banks of 16-bits. - * Bank 0 goes to the Tx daughterboard, Bank 1 goes to the Rx daughterboard. - * - * Each pin may be configured as an input or an output from the FPGA. - * For output pins, there are four signals which may be routed to the - * pin. The four signals are the value written by s/w, the output of - * the ATR controller, or two different sources of debug info from the - * FPGA fabric. - * ------------------------------------------------------------------------ - */ - -#define GPIO_TX_BANK 0 // pins that connect to the Tx daughterboard -#define GPIO_RX_BANK 1 // pins that connect to the Rx daughterboard - - -/*! - * \brief Set the data direction for GPIO pins - * - * If the bit is set, it's an output from the FPGA. - * \param value is a 16-bit bitmask of values - * \param mask is a 16-bit bitmask of which bits to effect. - */ -void hal_gpio_set_ddr(int bank, int value, int mask); - -/*! - * \brief Select the source of the signal for an output pin. - * - * \param code is is one of 's', 'a', '0', '1' - * where 's' selects software output, 'a' selects ATR output, '0' selects - * debug 0, '1' selects debug 1. - */ -void hal_gpio_set_sel(int bank, int bitno, char code); - -/*! - * \brief Select the source of the signal for the output pins. - * - * \param codes is is a string of 16 characters composed of '.', 's', - * 'a', '0', or '1' where '.' means "don't change", 's' selects - * software output, 'a' selects ATR output, '0' selects debug 0, '1' - * selects debug 1. - */ -void hal_gpio_set_sels(int bank, char *codes); - - -/*! - * \brief write \p value to gpio pins specified by \p mask. - */ -void hal_gpio_write(int bank, int value, int mask); - -/*! - * \brief read GPIO bits - */ -int hal_gpio_read(int bank); - - /* * ------------------------------------------------------------------------ * control the leds diff --git a/firmware/microblaze/lib/print_fxpt.c b/firmware/microblaze/lib/print_fxpt.c deleted file mode 100644 index 185bbc51b..000000000 --- a/firmware/microblaze/lib/print_fxpt.c +++ /dev/null @@ -1,83 +0,0 @@ -/* -*- c++ -*- */ -/* - * Copyright 2008 Free Software Foundation, Inc. - * - * This program is free software: you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation, either version 3 of the License, or - * (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program. If not, see . - */ -#include - -/* - * print uint64_t - */ -void -print_uint64(uint64_t u) -{ - const char *_hex = "0123456789ABCDEF"; - if (u >= 10) - print_uint64(u/10); - putchar(_hex[u%10]); -} - -static void -print_thousandths(int thousandths) -{ - putchar('.'); - if (thousandths < 100) - putchar('0'); - if (thousandths < 10) - putchar('0'); - printf("%d", thousandths); -} - - -void -print_fxpt_freq(u2_fxpt_freq_t v) -{ - if (v < 0){ - v = -v; - putchar('-'); - } - - int64_t int_part = v >> 20; - int32_t frac_part = v & ((1 << 20) - 1); - -#if 0 - // would work, if we had it - printf("%lld.%03d", int_part, (frac_part * 1000) >> 20); -#else - print_uint64(int_part); - print_thousandths((frac_part * 1000) >> 20); -#endif -} - -void -print_fxpt_gain(u2_fxpt_gain_t v) -{ - if (v < 0){ - v = -v; - putchar('-'); - } - - int32_t int_part = v >> 7; - int32_t frac_part = v & ((1 << 7) - 1); - -#if 0 - // would work, if we had it - printf("%d.%03d", int_part, (frac_part * 1000) >> 7); -#else - printf("%d", int_part); - print_thousandths((frac_part * 1000) >> 7); -#endif -} - diff --git a/firmware/microblaze/lib/print_mac_addr.c b/firmware/microblaze/lib/print_mac_addr.c index 838fd614a..475082325 100644 --- a/firmware/microblaze/lib/print_mac_addr.c +++ b/firmware/microblaze/lib/print_mac_addr.c @@ -20,11 +20,9 @@ void print_mac_addr(const unsigned char addr[6]) { - puthex8(addr[0]); putchar(':'); - puthex8(addr[1]); putchar(':'); - puthex8(addr[2]); putchar(':'); - puthex8(addr[3]); putchar(':'); - puthex8(addr[4]); putchar(':'); - puthex8(addr[5]); + for(size_t i = 0; i < 6; i++){ + if(i) putchar(':'); + puthex8(addr[i]); + } } diff --git a/firmware/microblaze/lib/u2_init.c b/firmware/microblaze/lib/u2_init.c index 40237ba87..b4fbb9e88 100644 --- a/firmware/microblaze/lib/u2_init.c +++ b/firmware/microblaze/lib/u2_init.c @@ -46,13 +46,6 @@ get_hw_rev(void) bool u2_init(void) { - // Set GPIOs to inputs, disable GPIO streaming - hal_gpio_set_ddr(GPIO_TX_BANK, 0x0000, 0xffff); - hal_gpio_set_ddr(GPIO_RX_BANK, 0x0000, 0xffff); - - //hal_gpio_write(GPIO_TX_BANK, 0x0000, 0xffff); // init s/w output value to zero - //hal_gpio_write(GPIO_RX_BANK, 0x0000, 0xffff); - dsp_rx_regs->gpio_stream_enable = 0; // I, Q LSBs come from DSP hal_io_init(); @@ -71,10 +64,6 @@ u2_init(void) // Enable ADCs output_regs->adc_ctrl = ADC_CTRL_ON; - - // Initial values for tx and rx mux registers - dsp_tx_regs->tx_mux = 0x10; - dsp_rx_regs->rx_mux = 0x44444444; // Set up serdes output_regs->serdes_ctrl = (SERDES_ENABLE | SERDES_RXEN); -- cgit v1.2.3 From 30bd666e306cb8f8c947c6ba99a76f7c49484597 Mon Sep 17 00:00:00 2001 From: Josh Blum Date: Wed, 28 Apr 2010 17:38:22 -0700 Subject: Moved some misc setting registers into host. --- firmware/microblaze/lib/u2_init.c | 10 ---------- host/lib/usrp/usrp2/mboard_impl.cpp | 13 ++++++++++--- host/lib/usrp/usrp2/usrp2_regs.hpp | 20 ++++++++++++++++++-- 3 files changed, 28 insertions(+), 15 deletions(-) (limited to 'firmware/microblaze/lib') diff --git a/firmware/microblaze/lib/u2_init.c b/firmware/microblaze/lib/u2_init.c index b4fbb9e88..6809101c0 100644 --- a/firmware/microblaze/lib/u2_init.c +++ b/firmware/microblaze/lib/u2_init.c @@ -46,8 +46,6 @@ get_hw_rev(void) bool u2_init(void) { - dsp_rx_regs->gpio_stream_enable = 0; // I, Q LSBs come from DSP - hal_io_init(); // init spi, so that we can switch over to the high-speed clock @@ -60,14 +58,6 @@ u2_init(void) // set up the default clocks clocks_init(); - // clocks_enable_test_clk(true,1); - - // Enable ADCs - output_regs->adc_ctrl = ADC_CTRL_ON; - - // Set up serdes - output_regs->serdes_ctrl = (SERDES_ENABLE | SERDES_RXEN); - pic_init(); // progammable interrupt controller bp_init(); // buffer pool diff --git a/host/lib/usrp/usrp2/mboard_impl.cpp b/host/lib/usrp/usrp2/mboard_impl.cpp index 48aeb2a62..2c8fd2df4 100644 --- a/host/lib/usrp/usrp2/mboard_impl.cpp +++ b/host/lib/usrp/usrp2/mboard_impl.cpp @@ -63,6 +63,13 @@ void usrp2_impl::mboard_init(void){ boost::uint16_t data = ad9777_regs.get_write_reg(addr); _iface->transact_spi(SPI_SS_AD9777, spi_config_t::EDGE_RISE, data, 16, false /*no rb*/); } + + //enable ADCs + _iface->poke32(FR_MISC_CTRL_ADC, FRF_MISC_CTRL_ADC_ON); + + //set up serdes + _iface->poke32(FR_MISC_CTRL_SERDES, FRF_MISC_CTRL_SERDES_ENABLE | FRF_MISC_CTRL_SERDES_RXEN); + } void usrp2_impl::init_clock_config(void){ @@ -97,9 +104,9 @@ void usrp2_impl::update_clock_config(void){ //clock source ref 10mhz switch(_clock_config.ref_source){ - case clock_config_t::REF_INT : _iface->poke32(FR_CLOCK_CONTROL, 0x10); break; - case clock_config_t::REF_SMA : _iface->poke32(FR_CLOCK_CONTROL, 0x1C); break; - case clock_config_t::REF_MIMO: _iface->poke32(FR_CLOCK_CONTROL, 0x15); break; + case clock_config_t::REF_INT : _iface->poke32(FR_MISC_CTRL_CLOCK, 0x10); break; + case clock_config_t::REF_SMA : _iface->poke32(FR_MISC_CTRL_CLOCK, 0x1C); break; + case clock_config_t::REF_MIMO: _iface->poke32(FR_MISC_CTRL_CLOCK, 0x15); break; default: throw std::runtime_error("usrp2: unhandled clock configuration reference source"); } diff --git a/host/lib/usrp/usrp2/usrp2_regs.hpp b/host/lib/usrp/usrp2/usrp2_regs.hpp index 67a342217..feeccaa34 100644 --- a/host/lib/usrp/usrp2/usrp2_regs.hpp +++ b/host/lib/usrp/usrp2/usrp2_regs.hpp @@ -64,7 +64,23 @@ ///////////////////////////////////////////////// // Misc Control //////////////////////////////////////////////// -#define FR_CLOCK_CONTROL _SR_ADDR(0) +#define FR_MISC_CTRL_CLOCK _SR_ADDR(0) +#define FR_MISC_CTRL_SERDES _SR_ADDR(1) +#define FR_MISC_CTRL_ADC _SR_ADDR(2) +#define FR_MISC_CTRL_LEDS _SR_ADDR(3) +#define FR_MISC_CTRL_PHY _SR_ADDR(4) // LSB is reset line to eth phy +#define FR_MISC_CTRL_DBG_MUX _SR_ADDR(5) +#define FR_MISC_CTRL_RAM_PAGE _SR_ADDR(6) // FIXME should go somewhere else... +#define FR_MISC_CTRL_FLUSH_ICACHE _SR_ADDR(7) // Flush the icache +#define FR_MISC_CTRL_LED_SRC _SR_ADDR(8) // HW or SW control for LEDs + +#define FRF_MISC_CTRL_SERDES_ENABLE 8 +#define FRF_MISC_CTRL_SERDES_PRBSEN 4 +#define FRF_MISC_CTRL_SERDES_LOOPEN 2 +#define FRF_MISC_CTRL_SERDES_RXEN 1 + +#define FRF_MISC_CTRL_ADC_ON 0x0F +#define FRF_MISC_CTRL_ADC_OFF 0x00 ///////////////////////////////////////////////// // VITA49 64 bit time (write only) @@ -208,7 +224,7 @@ #define FR_ATR_FULL_RXSIDE FR_ATR_BASE + 14 /////////////////////////////////////////////////// -// ATR Controller, Slave 11 +// VITA RX CTRL regs /////////////////////////////////////////////////// // The following 3 are logically a single command register. // They are clocked into the underlying fifo when time_ticks is written. -- cgit v1.2.3