From c473cc56fafcb47d6ba1f16e8c9fb89ff6c57bca Mon Sep 17 00:00:00 2001 From: Josh Blum Date: Fri, 5 Nov 2010 12:32:09 -0700 Subject: usrp1: pulled in cmake build system for usrp1 firmware --- firmware/fx2/include | 1 + firmware/fx2/include/.gitignore | 25 -- firmware/fx2/include/Makefile.am | 61 --- firmware/fx2/include/delay.h | 38 -- firmware/fx2/include/fpga_regs0.h | 42 -- firmware/fx2/include/fpga_regs_common.h | 150 ------- firmware/fx2/include/fpga_regs_common.v | 117 ----- firmware/fx2/include/fpga_regs_standard.h | 300 ------------- firmware/fx2/include/fpga_regs_standard.v | 256 ----------- firmware/fx2/include/fx2regs.h | 716 ------------------------------ firmware/fx2/include/fx2utils.h | 31 -- firmware/fx2/include/generate_regs.py | 57 --- firmware/fx2/include/i2c.h | 32 -- firmware/fx2/include/isr.h | 172 ------- firmware/fx2/include/syncdelay.h | 65 --- firmware/fx2/include/timer.h | 35 -- firmware/fx2/include/usb_common.h | 37 -- firmware/fx2/include/usb_descriptors.h | 40 -- firmware/fx2/include/usb_requests.h | 88 ---- firmware/fx2/include/usrp_commands.h | 106 ----- firmware/fx2/include/usrp_config.h | 44 -- firmware/fx2/include/usrp_i2c_addr.h | 78 ---- firmware/fx2/include/usrp_ids.h | 68 --- firmware/fx2/include/usrp_interfaces.h | 47 -- firmware/fx2/include/usrp_spi_defs.h | 86 ---- 25 files changed, 1 insertion(+), 2691 deletions(-) create mode 120000 firmware/fx2/include delete mode 100644 firmware/fx2/include/.gitignore delete mode 100644 firmware/fx2/include/Makefile.am delete mode 100644 firmware/fx2/include/delay.h delete mode 100644 firmware/fx2/include/fpga_regs0.h delete mode 100644 firmware/fx2/include/fpga_regs_common.h delete mode 100644 firmware/fx2/include/fpga_regs_common.v delete mode 100644 firmware/fx2/include/fpga_regs_standard.h delete mode 100644 firmware/fx2/include/fpga_regs_standard.v delete mode 100644 firmware/fx2/include/fx2regs.h delete mode 100644 firmware/fx2/include/fx2utils.h delete mode 100755 firmware/fx2/include/generate_regs.py delete mode 100644 firmware/fx2/include/i2c.h delete mode 100644 firmware/fx2/include/isr.h delete mode 100644 firmware/fx2/include/syncdelay.h delete mode 100644 firmware/fx2/include/timer.h delete mode 100644 firmware/fx2/include/usb_common.h delete mode 100644 firmware/fx2/include/usb_descriptors.h delete mode 100644 firmware/fx2/include/usb_requests.h delete mode 100644 firmware/fx2/include/usrp_commands.h delete mode 100644 firmware/fx2/include/usrp_config.h delete mode 100644 firmware/fx2/include/usrp_i2c_addr.h delete mode 100644 firmware/fx2/include/usrp_ids.h delete mode 100644 firmware/fx2/include/usrp_interfaces.h delete mode 100644 firmware/fx2/include/usrp_spi_defs.h (limited to 'firmware/fx2/include') diff --git a/firmware/fx2/include b/firmware/fx2/include new file mode 120000 index 000000000..d66298e12 --- /dev/null +++ b/firmware/fx2/include @@ -0,0 +1 @@ +common \ No newline at end of file diff --git a/firmware/fx2/include/.gitignore b/firmware/fx2/include/.gitignore deleted file mode 100644 index 75bb241c8..000000000 --- a/firmware/fx2/include/.gitignore +++ /dev/null @@ -1,25 +0,0 @@ -/Makefile -/Makefile.in -/aclocal.m4 -/configure -/config.h.in -/stamp-h.in -/libtool -/config.log -/config.h -/config.cache -/config.status -/missing -/stamp-h -/stamp-h1 -/.la -/.lo -/.deps -/.libs -/*.la -/*.lo -/autom4te.cache -/*.cache -/missing -/make.log -/usrp.pc diff --git a/firmware/fx2/include/Makefile.am b/firmware/fx2/include/Makefile.am deleted file mode 100644 index e17726c07..000000000 --- a/firmware/fx2/include/Makefile.am +++ /dev/null @@ -1,61 +0,0 @@ -# -# Copyright 2003 Free Software Foundation, Inc. -# -# This file is part of GNU Radio -# -# GNU Radio is free software; you can redistribute it and/or modify -# it under the terms of the GNU General Public License as published by -# the Free Software Foundation; either version 3, or (at your option) -# any later version. -# -# GNU Radio is distributed in the hope that it will be useful, -# but WITHOUT ANY WARRANTY; without even the implied warranty of -# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -# GNU General Public License for more details. -# -# You should have received a copy of the GNU General Public License -# along with GNU Radio; see the file COPYING. If not, write to -# the Free Software Foundation, Inc., 51 Franklin Street, -# Boston, MA 02110-1301, USA. -# - -usrpincludedir = $(includedir)/usrp - -usrpinclude_HEADERS = \ - usrp_i2c_addr.h \ - usrp_spi_defs.h \ - fpga_regs_common.h \ - fpga_regs_standard.h - - -noinst_HEADERS = \ - delay.h \ - fpga_regs_common.v \ - fpga_regs_standard.v \ - fpga_regs0.h \ - fx2regs.h \ - fx2utils.h \ - i2c.h \ - isr.h \ - syncdelay.h \ - timer.h \ - usb_common.h \ - usb_descriptors.h \ - usb_requests.h \ - usrp_commands.h \ - usrp_config.h \ - usrp_ids.h \ - usrp_interfaces.h - - -CODE_GENERATOR = \ - generate_regs.py - -EXTRA_DIST = \ - $(CODE_GENERATOR) - -fpga_regs_common.v: fpga_regs_common.h generate_regs.py - PYTHONPATH=$(top_srcdir)/usrp/firmware/include $(PYTHON) $(srcdir)/generate_regs.py $(srcdir)/fpga_regs_common.h $@ - -fpga_regs_standard.v: fpga_regs_standard.h generate_regs.py - PYTHONPATH=$(top_srcdir)/usrp/firmware/include $(PYTHON) $(srcdir)/generate_regs.py $(srcdir)/fpga_regs_standard.h $@ diff --git a/firmware/fx2/include/delay.h b/firmware/fx2/include/delay.h deleted file mode 100644 index f5df779e1..000000000 --- a/firmware/fx2/include/delay.h +++ /dev/null @@ -1,38 +0,0 @@ -/* -*- c++ -*- */ -/* - * Copyright 2003 Free Software Foundation, Inc. - * - * This file is part of GNU Radio - * - * GNU Radio is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; either version 3, or (at your option) - * any later version. - * - * GNU Radio is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with GNU Radio; see the file COPYING. If not, write to - * the Free Software Foundation, Inc., 51 Franklin Street, - * Boston, MA 02110-1301, USA. - */ - -#ifndef _DELAY_H_ -#define _DELAY_H_ - -/* - * delay for approximately usecs microseconds - * Note limit of 255 usecs. - */ -void udelay (unsigned char usecs); - -/* - * delay for approximately msecs milliseconds - */ -void mdelay (unsigned short msecs); - - -#endif /* _DELAY_H_ */ diff --git a/firmware/fx2/include/fpga_regs0.h b/firmware/fx2/include/fpga_regs0.h deleted file mode 100644 index 883798301..000000000 --- a/firmware/fx2/include/fpga_regs0.h +++ /dev/null @@ -1,42 +0,0 @@ -/* -*- c++ -*- */ -/* - * Copyright 2003 Free Software Foundation, Inc. - * - * This file is part of GNU Radio - * - * GNU Radio is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; either version 3, or (at your option) - * any later version. - * - * GNU Radio is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with GNU Radio; see the file COPYING. If not, write to - * the Free Software Foundation, Inc., 51 Franklin Street, - * Boston, MA 02110-1301, USA. - */ - -#ifndef _FPGA_REGS0_H_ -#define _FPGA_REGS0_H_ - -#define FR_RX_FREQ_0 0 -#define FR_RX_FREQ_1 1 -#define FR_RX_FREQ_2 2 -#define FR_RX_FREQ_3 3 -#define FR_TX_FREQ_0 4 -#define FR_TX_FREQ_1 5 -#define FR_TX_FREQ_2 6 -#define FR_TX_FREQ_3 7 -#define FR_COMBO 8 - - -#define FR_ADC_CLK_DIV 128 // pseudo regs mapped to FR_COMBO by f/w -#define FR_EXT_CLK_DIV 129 -#define FR_INTERP 130 -#define FR_DECIM 131 - -#endif diff --git a/firmware/fx2/include/fpga_regs_common.h b/firmware/fx2/include/fpga_regs_common.h deleted file mode 100644 index b4a496af7..000000000 --- a/firmware/fx2/include/fpga_regs_common.h +++ /dev/null @@ -1,150 +0,0 @@ -/* -*- c++ -*- */ -/* - * Copyright 2003,2004 Free Software Foundation, Inc. - * - * This file is part of GNU Radio - * - * GNU Radio is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; either version 3, or (at your option) - * any later version. - * - * GNU Radio is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with GNU Radio; see the file COPYING. If not, write to - * the Free Software Foundation, Inc., 51 Franklin Street, - * Boston, MA 02110-1301, USA. - */ -#ifndef INCLUDED_FPGA_REGS_COMMON_H -#define INCLUDED_FPGA_REGS_COMMON_H - -// This file defines registers common to all FPGA configurations. -// Registers 0 to 31 are reserved for use in this file. - - -// The FPGA needs to know the rate that samples are coming from and -// going to the A/D's and D/A's. div = 128e6 / sample_rate - -#define FR_TX_SAMPLE_RATE_DIV 0 -#define FR_RX_SAMPLE_RATE_DIV 1 - -// 2 and 3 are defined in the ATR section - -#define FR_MASTER_CTRL 4 // master enable and reset controls -# define bmFR_MC_ENABLE_TX (1 << 0) -# define bmFR_MC_ENABLE_RX (1 << 1) -# define bmFR_MC_RESET_TX (1 << 2) -# define bmFR_MC_RESET_RX (1 << 3) - -// i/o direction registers for pins that go to daughterboards. -// Setting the bit makes it an output from the FPGA to the d'board. -// top 16 is mask, low 16 is value - -#define FR_OE_0 5 // slot 0 -#define FR_OE_1 6 -#define FR_OE_2 7 -#define FR_OE_3 8 - -// i/o registers for pins that go to daughterboards. -// top 16 is a mask, low 16 is value - -#define FR_IO_0 9 // slot 0 -#define FR_IO_1 10 -#define FR_IO_2 11 -#define FR_IO_3 12 - -#define FR_MODE 13 -# define bmFR_MODE_NORMAL 0 -# define bmFR_MODE_LOOPBACK (1 << 0) // enable digital loopback -# define bmFR_MODE_RX_COUNTING (1 << 1) // Rx is counting -# define bmFR_MODE_RX_COUNTING_32BIT (1 << 2) // Rx is counting with a 32 bit counter - // low and high 16 bits are multiplexed across channel I and Q - - -// If the corresponding bit is set, internal FPGA debug circuitry -// controls the i/o pins for the associated bank of daughterboard -// i/o pins. Typically used for debugging FPGA designs. - -#define FR_DEBUG_EN 14 -# define bmFR_DEBUG_EN_TX_A (1 << 0) // debug controls TX_A i/o -# define bmFR_DEBUG_EN_RX_A (1 << 1) // debug controls RX_A i/o -# define bmFR_DEBUG_EN_TX_B (1 << 2) // debug controls TX_B i/o -# define bmFR_DEBUG_EN_RX_B (1 << 3) // debug controls RX_B i/o - - -// If the corresponding bit is set, enable the automatic DC -// offset correction control loop. -// -// The 4 low bits are significant: -// -// ADC0 = (1 << 0) -// ADC1 = (1 << 1) -// ADC2 = (1 << 2) -// ADC3 = (1 << 3) -// -// This control loop works if the attached daugherboard blocks DC. -// Currently all daughterboards do block DC. This includes: -// basic rx, dbs_rx, tv_rx, flex_xxx_rx. - -#define FR_DC_OFFSET_CL_EN 15 // DC Offset Control Loop Enable - - -// offset corrections for ADC's and DAC's (2's complement) - -#define FR_ADC_OFFSET_0 16 -#define FR_ADC_OFFSET_1 17 -#define FR_ADC_OFFSET_2 18 -#define FR_ADC_OFFSET_3 19 - - -// ------------------------------------------------------------------------ -// Automatic Transmit/Receive switching -// -// If automatic transmit/receive (ATR) switching is enabled in the -// FR_ATR_CTL register, the presence or absence of data in the FPGA -// transmit fifo selects between two sets of values for each of the 4 -// banks of daughterboard i/o pins. -// -// Each daughterboard slot has 3 16-bit registers associated with it: -// FR_ATR_MASK_*, FR_ATR_TXVAL_* and FR_ATR_RXVAL_* -// -// FR_ATR_MASK_{0,1,2,3}: -// -// These registers determine which of the daugherboard i/o pins are -// affected by ATR switching. If a bit in the mask is set, the -// corresponding i/o bit is controlled by ATR, else it's output -// value comes from the normal i/o pin output register: -// FR_IO_{0,1,2,3}. -// -// FR_ATR_TXVAL_{0,1,2,3}: -// FR_ATR_RXVAL_{0,1,2,3}: -// -// If the Tx fifo contains data, then the bits from TXVAL that are -// selected by MASK are output. Otherwise, the bits from RXVAL that -// are selected by MASK are output. - -#define FR_ATR_MASK_0 20 // slot 0 -#define FR_ATR_TXVAL_0 21 -#define FR_ATR_RXVAL_0 22 - -#define FR_ATR_MASK_1 23 // slot 1 -#define FR_ATR_TXVAL_1 24 -#define FR_ATR_RXVAL_1 25 - -#define FR_ATR_MASK_2 26 // slot 2 -#define FR_ATR_TXVAL_2 27 -#define FR_ATR_RXVAL_2 28 - -#define FR_ATR_MASK_3 29 // slot 3 -#define FR_ATR_TXVAL_3 30 -#define FR_ATR_RXVAL_3 31 - -// Clock ticks to delay rising and falling edge of T/R signal -#define FR_ATR_TX_DELAY 2 -#define FR_ATR_RX_DELAY 3 - -#endif /* INCLUDED_FPGA_REGS_COMMON_H */ diff --git a/firmware/fx2/include/fpga_regs_common.v b/firmware/fx2/include/fpga_regs_common.v deleted file mode 100644 index 8035d8565..000000000 --- a/firmware/fx2/include/fpga_regs_common.v +++ /dev/null @@ -1,117 +0,0 @@ -// -// This file is machine generated from ./fpga_regs_common.h -// Do not edit by hand; your edits will be overwritten. -// - -// This file defines registers common to all FPGA configurations. -// Registers 0 to 31 are reserved for use in this file. - - -// The FPGA needs to know the rate that samples are coming from and -// going to the A/D's and D/A's. div = 128e6 / sample_rate - -`define FR_TX_SAMPLE_RATE_DIV 7'd0 -`define FR_RX_SAMPLE_RATE_DIV 7'd1 - -// 2 and 3 are defined in the ATR section - -`define FR_MASTER_CTRL 7'd4 // master enable and reset controls - -// i/o direction registers for pins that go to daughterboards. -// Setting the bit makes it an output from the FPGA to the d'board. -// top 16 is mask, low 16 is value - -`define FR_OE_0 7'd5 // slot 0 -`define FR_OE_1 7'd6 -`define FR_OE_2 7'd7 -`define FR_OE_3 7'd8 - -// i/o registers for pins that go to daughterboards. -// top 16 is a mask, low 16 is value - -`define FR_IO_0 7'd9 // slot 0 -`define FR_IO_1 7'd10 -`define FR_IO_2 7'd11 -`define FR_IO_3 7'd12 - -`define FR_MODE 7'd13 - - -// If the corresponding bit is set, internal FPGA debug circuitry -// controls the i/o pins for the associated bank of daughterboard -// i/o pins. Typically used for debugging FPGA designs. - -`define FR_DEBUG_EN 7'd14 - - -// If the corresponding bit is set, enable the automatic DC -// offset correction control loop. -// -// The 4 low bits are significant: -// -// ADC0 = (1 << 0) -// ADC1 = (1 << 1) -// ADC2 = (1 << 2) -// ADC3 = (1 << 3) -// -// This control loop works if the attached daugherboard blocks DC. -// Currently all daughterboards do block DC. This includes: -// basic rx, dbs_rx, tv_rx, flex_xxx_rx. - -`define FR_DC_OFFSET_CL_EN 7'd15 // DC Offset Control Loop Enable - - -// offset corrections for ADC's and DAC's (2's complement) - -`define FR_ADC_OFFSET_0 7'd16 -`define FR_ADC_OFFSET_1 7'd17 -`define FR_ADC_OFFSET_2 7'd18 -`define FR_ADC_OFFSET_3 7'd19 - - -// ------------------------------------------------------------------------ -// Automatic Transmit/Receive switching -// -// If automatic transmit/receive (ATR) switching is enabled in the -// FR_ATR_CTL register, the presence or absence of data in the FPGA -// transmit fifo selects between two sets of values for each of the 4 -// banks of daughterboard i/o pins. -// -// Each daughterboard slot has 3 16-bit registers associated with it: -// FR_ATR_MASK_*, FR_ATR_TXVAL_* and FR_ATR_RXVAL_* -// -// FR_ATR_MASK_{0,1,2,3}: -// -// These registers determine which of the daugherboard i/o pins are -// affected by ATR switching. If a bit in the mask is set, the -// corresponding i/o bit is controlled by ATR, else it's output -// value comes from the normal i/o pin output register: -// FR_IO_{0,1,2,3}. -// -// FR_ATR_TXVAL_{0,1,2,3}: -// FR_ATR_RXVAL_{0,1,2,3}: -// -// If the Tx fifo contains data, then the bits from TXVAL that are -// selected by MASK are output. Otherwise, the bits from RXVAL that -// are selected by MASK are output. - -`define FR_ATR_MASK_0 7'd20 // slot 0 -`define FR_ATR_TXVAL_0 7'd21 -`define FR_ATR_RXVAL_0 7'd22 - -`define FR_ATR_MASK_1 7'd23 // slot 1 -`define FR_ATR_TXVAL_1 7'd24 -`define FR_ATR_RXVAL_1 7'd25 - -`define FR_ATR_MASK_2 7'd26 // slot 2 -`define FR_ATR_TXVAL_2 7'd27 -`define FR_ATR_RXVAL_2 7'd28 - -`define FR_ATR_MASK_3 7'd29 // slot 3 -`define FR_ATR_TXVAL_3 7'd30 -`define FR_ATR_RXVAL_3 7'd31 - -// Clock ticks to delay rising and falling edge of T/R signal -`define FR_ATR_TX_DELAY 7'd2 -`define FR_ATR_RX_DELAY 7'd3 - diff --git a/firmware/fx2/include/fpga_regs_standard.h b/firmware/fx2/include/fpga_regs_standard.h deleted file mode 100644 index 7485e2bab..000000000 --- a/firmware/fx2/include/fpga_regs_standard.h +++ /dev/null @@ -1,300 +0,0 @@ -/* -*- c++ -*- */ -/* - * Copyright 2003,2004,2006 Free Software Foundation, Inc. - * - * This file is part of GNU Radio - * - * GNU Radio is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; either version 3, or (at your option) - * any later version. - * - * GNU Radio is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with GNU Radio; see the file COPYING. If not, write to - * the Free Software Foundation, Inc., 51 Franklin Street, - * Boston, MA 02110-1301, USA. - */ -#ifndef INCLUDED_FPGA_REGS_STANDARD_H -#define INCLUDED_FPGA_REGS_STANDARD_H - -// Register numbers 0 to 31 are reserved for use in fpga_regs_common.h. -// Registers 64 to 79 are available for custom FPGA builds. - - -// DDC / DUC - -#define FR_INTERP_RATE 32 // [1,1024] -#define FR_DECIM_RATE 33 // [1,256] - -// DDC center freq - -#define FR_RX_FREQ_0 34 -#define FR_RX_FREQ_1 35 -#define FR_RX_FREQ_2 36 -#define FR_RX_FREQ_3 37 - -// See below for DDC Starting Phase - -// ------------------------------------------------------------------------ -// configure FPGA Rx mux -// -// 3 2 1 -// 1 0 9 8 7 6 5 4 3 2 1 0 9 8 7 6 5 4 3 2 1 0 9 8 7 6 5 4 3 2 1 0 -// +-----------------------+-------+-------+-------+-------+-+-----+ -// | must be zero | Q3| I3| Q2| I2| Q1| I1| Q0| I0|Z| NCH | -// +-----------------------+-------+-------+-------+-------+-+-----+ -// -// There are a maximum of 4 digital downconverters in the the FPGA. -// Each DDC has two 16-bit inputs, I and Q, and two 16-bit outputs, I & Q. -// -// DDC I inputs are specified by the two bit fields I3, I2, I1 & I0 -// -// 0 = DDC input is from ADC 0 -// 1 = DDC input is from ADC 1 -// 2 = DDC input is from ADC 2 -// 3 = DDC input is from ADC 3 -// -// If Z == 1, all DDC Q inputs are set to zero -// If Z == 0, DDC Q inputs are specified by the two bit fields Q3, Q2, Q1 & Q0 -// -// NCH specifies the number of complex channels that are sent across -// the USB. The legal values are 1, 2 or 4, corresponding to 2, 4 or -// 8 16-bit values. - -#define FR_RX_MUX 38 - -// ------------------------------------------------------------------------ -// configure FPGA Tx Mux. -// -// 3 2 1 -// 1 0 9 8 7 6 5 4 3 2 1 0 9 8 7 6 5 4 3 2 1 0 9 8 7 6 5 4 3 2 1 0 -// +-----------------------+-------+-------+-------+-------+-+-----+ -// | | DAC3 | DAC2 | DAC1 | DAC0 |0| NCH | -// +-----------------------------------------------+-------+-+-----+ -// -// NCH specifies the number of complex channels that are sent across -// the USB. The legal values are 1 or 2, corresponding to 2 or 4 -// 16-bit values. -// -// There are two interpolators with complex inputs and outputs. -// There are four DACs. (We use the DUC in each AD9862.) -// -// Each 4-bit DACx field specifies the source for the DAC and -// whether or not that DAC is enabled. Each subfield is coded -// like this: -// -// 3 2 1 0 -// +-+-----+ -// |E| N | -// +-+-----+ -// -// Where E is set if the DAC is enabled, and N specifies which -// interpolator output is connected to this DAC. -// -// N which interp output -// --- ------------------- -// 0 chan 0 I -// 1 chan 0 Q -// 2 chan 1 I -// 3 chan 1 Q - -#define FR_TX_MUX 39 - -// ------------------------------------------------------------------------ -// REFCLK control -// -// Control whether a reference clock is sent to the daughterboards, -// and what frequency. The refclk is sent on d'board i/o pin 0. -// -// 3 2 1 -// 1 0 9 8 7 6 5 4 3 2 1 0 9 8 7 6 5 4 3 2 1 0 9 8 7 6 5 4 3 2 1 0 -// +-----------------------------------------------+-+------------+ -// | Reserved (Must be zero) |E| DIVISOR | -// +-----------------------------------------------+-+------------+ - -// -// Bit 7 -- 1 turns on refclk, 0 allows IO use -// Bits 6:0 Divider value - -#define FR_TX_A_REFCLK 40 -#define FR_RX_A_REFCLK 41 -#define FR_TX_B_REFCLK 42 -#define FR_RX_B_REFCLK 43 - -# define bmFR_REFCLK_EN 0x80 -# define bmFR_REFCLK_DIVISOR_MASK 0x7f - -// ------------------------------------------------------------------------ -// DDC Starting Phase - -#define FR_RX_PHASE_0 44 -#define FR_RX_PHASE_1 45 -#define FR_RX_PHASE_2 46 -#define FR_RX_PHASE_3 47 - -// ------------------------------------------------------------------------ -// Tx data format control register -// -// 3 2 1 -// 1 0 9 8 7 6 5 4 3 2 1 0 9 8 7 6 5 4 3 2 1 0 9 8 7 6 5 4 3 2 1 0 -// +-------------------------------------------------------+-------+ -// | Reserved (Must be zero) | FMT | -// +-------------------------------------------------------+-------+ -// -// FMT values: - -#define FR_TX_FORMAT 48 -# define bmFR_TX_FORMAT_16_IQ 0 // 16-bit I, 16-bit Q - -// ------------------------------------------------------------------------ -// Rx data format control register -// -// 3 2 1 -// 1 0 9 8 7 6 5 4 3 2 1 0 9 8 7 6 5 4 3 2 1 0 9 8 7 6 5 4 3 2 1 0 -// +-----------------------------------------+-+-+---------+-------+ -// | Reserved (Must be zero) |B|Q| WIDTH | SHIFT | -// +-----------------------------------------+-+-+---------+-------+ -// -// FMT values: - -#define FR_RX_FORMAT 49 - -# define bmFR_RX_FORMAT_SHIFT_MASK (0x0f << 0) // arithmetic right shift [0, 15] -# define bmFR_RX_FORMAT_SHIFT_SHIFT 0 -# define bmFR_RX_FORMAT_WIDTH_MASK (0x1f << 4) // data width in bits [1, 16] (not all valid) -# define bmFR_RX_FORMAT_WIDTH_SHIFT 4 -# define bmFR_RX_FORMAT_WANT_Q (0x1 << 9) // deliver both I & Q, else just I -# define bmFR_RX_FORMAT_BYPASS_HB (0x1 << 10) // bypass half-band filter - -// The valid combinations currently are: -// -// B Q WIDTH SHIFT -// 0 1 16 0 -// 0 1 8 8 - - -// Possible future values of WIDTH = {4, 2, 1} -// 12 takes a bit more work, since we need to know packet alignment. - -// ------------------------------------------------------------------------ -// FIXME register numbers 50 to 63 are available - -// ------------------------------------------------------------------------ -// Registers 64 to 95 are reserved for user custom FPGA builds. -// The standard USRP software will not touch these. - -#define FR_USER_0 64 -#define FR_USER_1 65 -#define FR_USER_2 66 -#define FR_USER_3 67 -#define FR_USER_4 68 -#define FR_USER_5 69 -#define FR_USER_6 70 -#define FR_USER_7 71 -#define FR_USER_8 72 -#define FR_USER_9 73 -#define FR_USER_10 74 -#define FR_USER_11 75 -#define FR_USER_12 76 -#define FR_USER_13 77 -#define FR_USER_14 78 -#define FR_USER_15 79 -#define FR_USER_16 80 -#define FR_USER_17 81 -#define FR_USER_18 82 -#define FR_USER_19 83 -#define FR_USER_20 84 -#define FR_USER_21 85 -#define FR_USER_22 86 -#define FR_USER_23 87 -#define FR_USER_24 88 -#define FR_USER_25 89 -#define FR_USER_26 90 -#define FR_USER_27 91 -#define FR_USER_28 92 -#define FR_USER_29 93 -#define FR_USER_30 94 -#define FR_USER_31 95 - -//Registers needed for multi usrp master/slave configuration -// -//Rx Master/slave control register (FR_RX_MASTER_SLAVE = FR_USER_0) -// -#define FR_RX_MASTER_SLAVE 64 -#define bitnoFR_RX_SYNC 0 -#define bitnoFR_RX_SYNC_MASTER 1 -#define bitnoFR_RX_SYNC_SLAVE 2 -# define bmFR_RX_SYNC (1 < list above. - * addr is the address of the interrupt service routine. - */ -void hook_sv (unsigned char vector_number, unsigned short addr); - -/* - * Hook usb interrupt vector. - * - * vector_number is from the UV_ list above. - * addr is the address of the interrupt service routine. - */ -void hook_uv (unsigned char vector_number, unsigned short addr); - -/* - * Hook fifo/gpif interrupt vector. - * - * vector_number is from the FGV_ list above. - * addr is the address of the interrupt service routine. - */ -void hook_fgv (unsigned char vector_number, unsigned short addr); - -/* - * One time call to enable autovectoring for both USB and FIFO/GPIF - */ -void setup_autovectors (void); - - -/* - * Must be called in each usb interrupt handler - */ -#define clear_usb_irq() \ - EXIF &= ~bmEXIF_USBINT; \ - INT2CLR = 0 - -/* - * Must be calledin each fifo/gpif interrupt handler - */ -#define clear_fifo_gpif_irq() \ - EXIF &= ~bmEXIF_IE4; \ - INT4CLR = 0 - -#endif /* _ISR_H_ */ diff --git a/firmware/fx2/include/syncdelay.h b/firmware/fx2/include/syncdelay.h deleted file mode 100644 index 0af7d099f..000000000 --- a/firmware/fx2/include/syncdelay.h +++ /dev/null @@ -1,65 +0,0 @@ -/* -*- c++ -*- */ -/* - * Copyright 2003 Free Software Foundation, Inc. - * - * This file is part of GNU Radio - * - * GNU Radio is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; either version 3, or (at your option) - * any later version. - * - * GNU Radio is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with GNU Radio; see the file COPYING. If not, write to - * the Free Software Foundation, Inc., 51 Franklin Street, - * Boston, MA 02110-1301, USA. - */ -#ifndef _SYNCDELAY_H_ -#define _SYNCDELAY_H_ - -/* - * Magic delay required between access to certain xdata registers (TRM page 15-106). - * For our configuration, 48 MHz FX2 / 48 MHz IFCLK, we need three cycles. Each - * NOP is a single cycle.... - * - * From TRM page 15-105: - * - * Under certain conditions, some read and write access to the FX2 registers must - * be separated by a "synchronization delay". The delay is necessary only under the - * following conditions: - * - * - between a write to any register in the 0xE600 - 0xE6FF range and a write to one - * of the registers listed below. - * - * - between a write to one of the registers listed below and a read from any register - * in the 0xE600 - 0xE6FF range. - * - * Registers which require a synchronization delay: - * - * FIFORESET FIFOPINPOLAR - * INPKTEND EPxBCH:L - * EPxFIFOPFH:L EPxAUTOINLENH:L - * EPxFIFOCFG EPxGPIFFLGSEL - * PINFLAGSAB PINFLAGSCD - * EPxFIFOIE EPxFIFOIRQ - * GPIFIE GPIFIRQ - * UDMACRCH:L GPIFADRH:L - * GPIFTRIG EPxGPIFTRIG - * OUTPKTEND REVCTL - * GPIFTCB3 GPIFTCB2 - * GPIFTCB1 GPIFTCB0 - */ - -/* - * FIXME ensure that the peep hole optimizer isn't screwing us - */ -#define SYNCDELAY _asm nop; nop; nop; _endasm -#define NOP _asm nop; _endasm - - -#endif /* _SYNCDELAY_H_ */ diff --git a/firmware/fx2/include/timer.h b/firmware/fx2/include/timer.h deleted file mode 100644 index 3181874d5..000000000 --- a/firmware/fx2/include/timer.h +++ /dev/null @@ -1,35 +0,0 @@ -/* -*- c++ -*- */ -/* - * Copyright 2003 Free Software Foundation, Inc. - * - * This file is part of GNU Radio - * - * GNU Radio is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; either version 3, or (at your option) - * any later version. - * - * GNU Radio is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with GNU Radio; see the file COPYING. If not, write to - * the Free Software Foundation, Inc., 51 Franklin Street, - * Boston, MA 02110-1301, USA. - */ - -#ifndef _TIMER_H_ -#define _TIMER_H_ - -/* - * Arrange to have isr_tick_handler called at 100 Hz - */ -void hook_timer_tick (unsigned short isr_tick_handler); - -#define clear_timer_irq() \ - TF2 = 0 /* clear overflow flag */ - - -#endif /* _TIMER_H_ */ diff --git a/firmware/fx2/include/usb_common.h b/firmware/fx2/include/usb_common.h deleted file mode 100644 index ae07b236c..000000000 --- a/firmware/fx2/include/usb_common.h +++ /dev/null @@ -1,37 +0,0 @@ -/* -*- c -*- */ -/* - * Copyright 2003 Free Software Foundation, Inc. - * - * This file is part of GNU Radio - * - * GNU Radio is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; either version 3, or (at your option) - * any later version. - * - * GNU Radio is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with GNU Radio; see the file COPYING. If not, write to - * the Free Software Foundation, Inc., 51 Franklin Street, - * Boston, MA 02110-1301, USA. - */ - -#ifndef _USB_COMMON_H_ -#define _USB_COMMON_H_ - -extern volatile bit _usb_got_SUDAV; - -// Provided by user application to handle VENDOR commands. -// returns non-zero if it handled the command. -unsigned char app_vendor_cmd (void); - -void usb_install_handlers (void); -void usb_handle_setup_packet (void); - -#define usb_setup_packet_avail() _usb_got_SUDAV - -#endif /* _USB_COMMON_H_ */ diff --git a/firmware/fx2/include/usb_descriptors.h b/firmware/fx2/include/usb_descriptors.h deleted file mode 100644 index 0b8c6212f..000000000 --- a/firmware/fx2/include/usb_descriptors.h +++ /dev/null @@ -1,40 +0,0 @@ -/* -*- c++ -*- */ -/* - * Copyright 2003 Free Software Foundation, Inc. - * - * This file is part of GNU Radio - * - * GNU Radio is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; either version 3, or (at your option) - * any later version. - * - * GNU Radio is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with GNU Radio; see the file COPYING. If not, write to - * the Free Software Foundation, Inc., 51 Franklin Street, - * Boston, MA 02110-1301, USA. - */ - -extern xdata const char high_speed_device_descr[]; -extern xdata const char high_speed_devqual_descr[]; -extern xdata const char high_speed_config_descr[]; - -extern xdata const char full_speed_device_descr[]; -extern xdata const char full_speed_devqual_descr[]; -extern xdata const char full_speed_config_descr[]; - -extern xdata unsigned char nstring_descriptors; -extern xdata char * xdata string_descriptors[]; - -/* - * We patch these locations with info read from the usrp config eeprom - */ -extern xdata char usb_desc_hw_rev_binary_patch_location_0[]; -extern xdata char usb_desc_hw_rev_binary_patch_location_1[]; -extern xdata char usb_desc_hw_rev_ascii_patch_location_0[]; -extern xdata char usb_desc_serial_number_ascii[]; diff --git a/firmware/fx2/include/usb_requests.h b/firmware/fx2/include/usb_requests.h deleted file mode 100644 index 7a543abb0..000000000 --- a/firmware/fx2/include/usb_requests.h +++ /dev/null @@ -1,88 +0,0 @@ -/* -*- c++ -*- */ -/* - * Copyright 2003 Free Software Foundation, Inc. - * - * This file is part of GNU Radio - * - * GNU Radio is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; either version 3, or (at your option) - * any later version. - * - * GNU Radio is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with GNU Radio; see the file COPYING. If not, write to - * the Free Software Foundation, Inc., 51 Franklin Street, - * Boston, MA 02110-1301, USA. - */ - -// Standard USB requests. -// These are contained in end point 0 setup packets - - -#ifndef _USB_REQUESTS_H_ -#define _USB_REQUESTS_H_ - -// format of bmRequestType byte - -#define bmRT_DIR_MASK (0x1 << 7) -#define bmRT_DIR_IN (1 << 7) -#define bmRT_DIR_OUT (0 << 7) - -#define bmRT_TYPE_MASK (0x3 << 5) -#define bmRT_TYPE_STD (0 << 5) -#define bmRT_TYPE_CLASS (1 << 5) -#define bmRT_TYPE_VENDOR (2 << 5) -#define bmRT_TYPE_RESERVED (3 << 5) - -#define bmRT_RECIP_MASK (0x1f << 0) -#define bmRT_RECIP_DEVICE (0 << 0) -#define bmRT_RECIP_INTERFACE (1 << 0) -#define bmRT_RECIP_ENDPOINT (2 << 0) -#define bmRT_RECIP_OTHER (3 << 0) - - -// standard request codes (bRequest) - -#define RQ_GET_STATUS 0 -#define RQ_CLEAR_FEATURE 1 -#define RQ_RESERVED_2 2 -#define RQ_SET_FEATURE 3 -#define RQ_RESERVED_4 4 -#define RQ_SET_ADDRESS 5 -#define RQ_GET_DESCR 6 -#define RQ_SET_DESCR 7 -#define RQ_GET_CONFIG 8 -#define RQ_SET_CONFIG 9 -#define RQ_GET_INTERFACE 10 -#define RQ_SET_INTERFACE 11 -#define RQ_SYNCH_FRAME 12 - -// standard descriptor types - -#define DT_DEVICE 1 -#define DT_CONFIG 2 -#define DT_STRING 3 -#define DT_INTERFACE 4 -#define DT_ENDPOINT 5 -#define DT_DEVQUAL 6 -#define DT_OTHER_SPEED 7 -#define DT_INTERFACE_POWER 8 - -// standard feature selectors - -#define FS_ENDPOINT_HALT 0 // recip: endpoint -#define FS_DEV_REMOTE_WAKEUP 1 // recip: device -#define FS_TEST_MODE 2 // recip: device - -// Get Status device attributes - -#define bmGSDA_SELF_POWERED 0x01 -#define bmGSDA_REM_WAKEUP 0x02 - - -#endif /* _USB_REQUESTS_H_ */ diff --git a/firmware/fx2/include/usrp_commands.h b/firmware/fx2/include/usrp_commands.h deleted file mode 100644 index 02778c7e3..000000000 --- a/firmware/fx2/include/usrp_commands.h +++ /dev/null @@ -1,106 +0,0 @@ -/* - * USRP - Universal Software Radio Peripheral - * - * Copyright (C) 2003,2004 Free Software Foundation, Inc. - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; either version 3 of the License, or - * (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 51 Franklin Street, Boston, MA 02110-1301 USA - */ - -#ifndef _USRP_COMMANDS_H_ -#define _USRP_COMMANDS_H_ - -#include -#include - -#define MAX_EP0_PKTSIZE 64 // max size of EP0 packet on FX2 - -// ---------------------------------------------------------------- -// Vendor bmRequestType's -// ---------------------------------------------------------------- - -#define VRT_VENDOR_IN 0xC0 -#define VRT_VENDOR_OUT 0x40 - -// ---------------------------------------------------------------- -// USRP Vendor Requests -// -// Note that Cypress reserves [0xA0,0xAF]. -// 0xA0 is the firmware load function. -// ---------------------------------------------------------------- - - -// IN commands - -#define VRQ_GET_STATUS 0x80 -#define GS_TX_UNDERRUN 0 // wIndexL // returns 1 byte -#define GS_RX_OVERRUN 1 // wIndexL // returns 1 byte - -#define VRQ_I2C_READ 0x81 // wValueL: i2c address; length: how much to read - -#define VRQ_SPI_READ 0x82 // wValue: optional header bytes - // wIndexH: enables - // wIndexL: format - // len: how much to read - -#define VRQ_SPI_TRANSACT 0x83 // wValueH: OUT byte 0 - // wValueL: OUT byte 1 - // wIndexH: OUT byte 2 - // wIndexL: OUT byte 3 - // wLengthH: enables - // wLengthL: transaction length - -// OUT commands - -#define VRQ_SET_LED 0x01 // wValueL off/on {0,1}; wIndexL: which {0,1} - -#define VRQ_FPGA_LOAD 0x02 -# define FL_BEGIN 0 // wIndexL: begin fpga programming cycle. stalls if trouble. -# define FL_XFER 1 // wIndexL: xfer up to 64 bytes of data -# define FL_END 2 // wIndexL: end programming cycle, check for success. - // stalls endpoint if trouble. - -#define VRQ_FPGA_WRITE_REG 0x03 // wIndexL: regno; data: 32-bit regval MSB first -#define VRQ_FPGA_SET_RESET 0x04 // wValueL: {0,1} -#define VRQ_FPGA_SET_TX_ENABLE 0x05 // wValueL: {0,1} -#define VRQ_FPGA_SET_RX_ENABLE 0x06 // wValueL: {0,1} -// see below VRQ_FPGA_SET_{TX,RX}_RESET - -#define VRQ_SET_SLEEP_BITS 0x07 // wValueH: mask; wValueL: bits. set bits given by mask to bits - -# define SLEEP_ADC0 0x01 -# define SLEEP_ADC1 0x02 -# define SLEEP_DAC0 0x04 -# define SLEEP_DAC1 0x08 - -#define VRQ_I2C_WRITE 0x08 // wValueL: i2c address; data: data - -#define VRQ_SPI_WRITE 0x09 // wValue: optional header bytes - // wIndexH: enables - // wIndexL: format - // len: how much to write - -#define VRQ_FPGA_SET_TX_RESET 0x0a // wValueL: {0, 1} -#define VRQ_FPGA_SET_RX_RESET 0x0b // wValueL: {0, 1} - - -// ------------------------------------------------------------------- -// we store the hashes at fixed addresses in the FX2 internal memory - -#define USRP_HASH_SLOT_0_ADDR 0xe1e0 -#define USRP_HASH_SLOT_1_ADDR 0xe1f0 - - - -#endif /* _USRP_COMMANDS_H_ */ diff --git a/firmware/fx2/include/usrp_config.h b/firmware/fx2/include/usrp_config.h deleted file mode 100644 index e77f8e4c5..000000000 --- a/firmware/fx2/include/usrp_config.h +++ /dev/null @@ -1,44 +0,0 @@ -/* - * USRP - Universal Software Radio Peripheral - * - * Copyright (C) 2003 Free Software Foundation, Inc. - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; either version 3 of the License, or - * (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 51 Franklin Street, Boston, MA 02110-1301 USA - */ - -/* - * configuration stuff for debugging - */ - -/* - * Define to 0 for normal use of port A, i.e., FPGA control bus. - * Define to 1 to write trace to port A for scoping with logic analyzer. - */ -#define UC_TRACE_USING_PORT_A 0 - - -/* - * Define to 0 for normal use of low 3 bits of port E, i.e., A/D, D/A SLEEP bits. - * Define to 1 to enable by default driving the GPIF state to the - * low three bits of port E. - */ -#define UC_START_WITH_GSTATE_OUTPUT_ENABLED 0 - - -/* - * Define to 1 for normal use (the board really has an FPGA on it). - * Define to 0 for debug use on board without FPGA. - */ -#define UC_BOARD_HAS_FPGA 1 diff --git a/firmware/fx2/include/usrp_i2c_addr.h b/firmware/fx2/include/usrp_i2c_addr.h deleted file mode 100644 index 0a4f3ea59..000000000 --- a/firmware/fx2/include/usrp_i2c_addr.h +++ /dev/null @@ -1,78 +0,0 @@ -/* -*- c++ -*- */ -/* - * Copyright 2004 Free Software Foundation, Inc. - * - * This file is part of GNU Radio - * - * GNU Radio is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; either version 3, or (at your option) - * any later version. - * - * GNU Radio is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with GNU Radio; see the file COPYING. If not, write to - * the Free Software Foundation, Inc., 51 Franklin Street, - * Boston, MA 02110-1301, USA. - */ -#ifndef INCLUDED_USRP_I2C_ADDR_H -#define INCLUDED_USRP_I2C_ADDR_H - -// I2C addresses - -#define I2C_DEV_EEPROM 0x50 // 24LC02[45]: 7-bits 1010xxx - -#define I2C_ADDR_BOOT (I2C_DEV_EEPROM | 0x0) -#define I2C_ADDR_TX_A (I2C_DEV_EEPROM | 0x4) -#define I2C_ADDR_RX_A (I2C_DEV_EEPROM | 0x5) -#define I2C_ADDR_TX_B (I2C_DEV_EEPROM | 0x6) -#define I2C_ADDR_RX_B (I2C_DEV_EEPROM | 0x7) - - -// format of FX2 BOOT EEPROM -// 00: 0xC0 code for ``Read IDs from EEPROM'' -// 01: 0xFE USB Vendor ID (LSB) -// 02: 0xFF USB Vendor ID (MSB) -// 03: 0x02 USB Product ID (LSB) -// 04: 0x00 USB Product ID (MSB) -// 05: 0x01 USB Device ID (LSB) // rev1 -// 06: 0x00 USB Device ID (MSB) // 0 = unconfig'd (no firmware) -// 07: 0x00 option byte - - -// format of daughterboard EEPROM -// 00: 0xDB code for ``I'm a daughterboard'' -// 01: .. Daughterboard ID (LSB) -// 02: .. Daughterboard ID (MSB) -// 03: .. io bits 7-0 direction (bit set if it's an output from m'board) -// 04: .. io bits 15-8 direction (bit set if it's an output from m'board) -// 05: .. ADC0 DC offset correction (LSB) -// 06: .. ADC0 DC offset correction (MSB) -// 07: .. ADC1 DC offset correction (LSB) -// 08: .. ADC1 DC offset correction (MSB) -// ... -// 1f: .. negative of the sum of bytes [0x00, 0x1e] - -#define DB_EEPROM_MAGIC 0x00 -#define DB_EEPROM_MAGIC_VALUE 0xDB -#define DB_EEPROM_ID_LSB 0x01 -#define DB_EEPROM_ID_MSB 0x02 -#define DB_EEPROM_OE_LSB 0x03 -#define DB_EEPROM_OE_MSB 0x04 -#define DB_EEPROM_OFFSET_0_LSB 0x05 // offset correction for ADC or DAC 0 -#define DB_EEPROM_OFFSET_0_MSB 0x06 -#define DB_EEPROM_OFFSET_1_LSB 0x07 // offset correction for ADC or DAC 1 -#define DB_EEPROM_OFFSET_1_MSB 0x08 -#define DB_EEPROM_CHKSUM 0x1f - -#define DB_EEPROM_CLEN 0x20 // length of common portion of eeprom - -#define DB_EEPROM_CUSTOM_BASE DB_EEPROM_CLEN // first avail offset for - // daughterboard specific use - -#endif /* INCLUDED_USRP_I2C_ADDR_H */ - diff --git a/firmware/fx2/include/usrp_ids.h b/firmware/fx2/include/usrp_ids.h deleted file mode 100644 index 46a069434..000000000 --- a/firmware/fx2/include/usrp_ids.h +++ /dev/null @@ -1,68 +0,0 @@ -/* -*- c++ -*- */ -/* - * Copyright 2003,2006,2007 Free Software Foundation, Inc. - * - * This file is part of GNU Radio - * - * GNU Radio is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; either version 3, or (at your option) - * any later version. - * - * GNU Radio is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with GNU Radio; see the file COPYING. If not, write to - * the Free Software Foundation, Inc., 51 Franklin Street, - * Boston, MA 02110-1301, USA. - */ - -/* - * USB Vendor and Product IDs that we use - * - * (keep in sync with usb_descriptors.a51) - */ - -#ifndef _USRP_IDS_H_ -#define _USRP_IDS_H_ - -#define USB_VID_CYPRESS 0x04b4 -#define USB_PID_CYPRESS_FX2 0x8613 - - -#define USB_VID_FSF 0xfffe // Free Software Folks -#define USB_PID_FSF_EXP_0 0x0000 // Experimental 0 -#define USB_PID_FSF_EXP_1 0x0001 // Experimental 1 -#define USB_PID_FSF_USRP 0x0002 // Universal Software Radio Peripheral -#define USB_PID_FSF_USRP_reserved 0x0003 // Universal Software Radio Peripheral -#define USB_PID_FSF_SSRP 0x0004 // Simple Software Radio Peripheral -#define USB_PID_FSF_SSRP_reserved 0x0005 // Simple Software Radio Peripheral -#define USB_PID_FSF_HPSDR 0x0006 // High Performance Software Defined Radio (Internal Boot) -#define USB_PID_FSF_HPSDR_HA 0x0007 // High Performance Software Defined Radio (Host Assisted Boot) -#define USB_PID_FSF_QS1R 0x0008 // QS1R HF receiver -#define USB_PID_FSF_EZDOP 0x0009 // ezdop -#define USB_PID_FSF_BDALE_0 0x000a // Bdale Garbee -#define USB_PID_FSF_BDALE_1 0x000b // Bdale Garbee -#define USB_PID_FSF_BDALE_2 0x000c // Bdale Garbee -#define USB_PID_FSF_BDALE_3 0x000d // Bdale Garbee -#define USB_PID_FSF_BDALE_4 0x000e // Bdale Garbee -#define USB_PID_FSF_BDALE_5 0x000f // Bdale Garbee -#define USB_PID_FSF_BDALE_6 0x0010 // Bdale Garbee -#define USB_PID_FSF_BDALE_7 0x0011 // Bdale Garbee -#define USB_PID_FSF_BDALE_8 0x0012 // Bdale Garbee -#define USB_PID_FSF_BDALE_9 0x0013 // Bdale Garbee -#define USB_PID_FSF_HPSDR_HERMES 0x0014 // HPSDR Hermes -#define USB_PID_FSF_THINKRF 0x0015 // Catalin Patulea -#define USB_PID_FSF_MSA 0x0016 // Hans de Bok Scotty's Modular Spectrum Analyzer - -#define USB_PID_FSF_LBNL_UXO 0x0018 // http://recycle.lbl.gov/~ldoolitt/uxo/ - - -#define USB_DID_USRP_0 0x0000 // unconfigured rev 0 USRP -#define USB_DID_USRP_1 0x0001 // unconfigured rev 1 USRP -#define USB_DID_USRP_2 0x0002 // unconfigured rev 2 USRP - -#endif /* _USRP_IDS_H_ */ diff --git a/firmware/fx2/include/usrp_interfaces.h b/firmware/fx2/include/usrp_interfaces.h deleted file mode 100644 index 8666e0490..000000000 --- a/firmware/fx2/include/usrp_interfaces.h +++ /dev/null @@ -1,47 +0,0 @@ -/* -*- c++ -*- */ -/* - * Copyright 2003 Free Software Foundation, Inc. - * - * This file is part of GNU Radio - * - * GNU Radio is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; either version 3, or (at your option) - * any later version. - * - * GNU Radio is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with GNU Radio; see the file COPYING. If not, write to - * the Free Software Foundation, Inc., 51 Franklin Street, - * Boston, MA 02110-1301, USA. - */ - -#ifndef _USRP_INTERFACES_H_ -#define _USRP_INTERFACES_H_ - -/* - * We've now split the USRP into 3 separate interfaces. - * - * Interface 0 contains only ep0 and is used for command and status. - * Interface 1 is the Tx path and it uses ep2 OUT BULK. - * Interface 2 is the Rx path and it uses ep6 IN BULK. - */ - -#define USRP_CMD_INTERFACE 0 -#define USRP_CMD_ALTINTERFACE 0 -#define USRP_CMD_ENDPOINT 0 - -#define USRP_TX_INTERFACE 1 -#define USRP_TX_ALTINTERFACE 0 -#define USRP_TX_ENDPOINT 2 // streaming data from host to FPGA - -#define USRP_RX_INTERFACE 2 -#define USRP_RX_ALTINTERFACE 0 -#define USRP_RX_ENDPOINT 6 // streaming data from FPGA to host - - -#endif /* _USRP_INTERFACES_H_ */ diff --git a/firmware/fx2/include/usrp_spi_defs.h b/firmware/fx2/include/usrp_spi_defs.h deleted file mode 100644 index 963463ef2..000000000 --- a/firmware/fx2/include/usrp_spi_defs.h +++ /dev/null @@ -1,86 +0,0 @@ -/* -*- c++ -*- */ -/* - * Copyright 2004 Free Software Foundation, Inc. - * - * This file is part of GNU Radio - * - * GNU Radio is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; either version 3, or (at your option) - * any later version. - * - * GNU Radio is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with GNU Radio; see the file COPYING. If not, write to - * the Free Software Foundation, Inc., 51 Franklin Street, - * Boston, MA 02110-1301, USA. - */ - -#ifndef INCLUDED_USRP_SPI_DEFS_H -#define INCLUDED_USRP_SPI_DEFS_H - -/* - * defines for the VRQ_SPI_READ and VRQ_SPI_WRITE commands - * - * SPI == "Serial Port Interface". SPI is a 3 wire bus plus a - * separate enable for each peripheral. The common lines are SCLK, - * SDI and SDO. The FX2 always drives SCLK and SDI, the clock and - * data lines from the FX2 to the peripheral. When enabled, a - * peripheral may drive SDO, the data line from the peripheral to the - * FX2. - * - * The SPI_READ and SPI_WRITE commands are formatted identically. - * Each specifies which peripherals to enable, whether the bits should - * be transmistted Most Significant Bit first or Least Significant Bit - * first, the number of bytes in the optional header, and the number - * of bytes to read or write in the body. - * - * The body is limited to 64 bytes. The optional header may contain - * 0, 1 or 2 bytes. For an SPI_WRITE, the header bytes are - * transmitted to the peripheral followed by the the body bytes. For - * an SPI_READ, the header bytes are transmitted to the peripheral, - * then len bytes are read back from the peripheral. - */ - -/* - * SPI_FMT_* goes in wIndexL - */ -#define SPI_FMT_xSB_MASK (1 << 7) -# define SPI_FMT_LSB (1 << 7) // least signficant bit first -# define SPI_FMT_MSB (0 << 7) // most significant bit first -#define SPI_FMT_HDR_MASK (3 << 5) -# define SPI_FMT_HDR_0 (0 << 5) // 0 header bytes -# define SPI_FMT_HDR_1 (1 << 5) // 1 header byte -# define SPI_FMT_HDR_2 (2 << 5) // 2 header bytes - -/* - * SPI_ENABLE_* goes in wIndexH - * - * For the software interface, the enables are active high. - * For reads, it's an error to have more than one enable set. - * - * [FWIW, the hardware implements them as active low. Don't change the - * definitions of these. They are related to usrp_rev1_regs.h] - */ -#define SPI_ENABLE_FPGA 0x01 // select FPGA -#define SPI_ENABLE_CODEC_A 0x02 // select AD9862 A -#define SPI_ENABLE_CODEC_B 0x04 // select AD9862 B -#define SPI_ENABLE_reserved 0x08 -#define SPI_ENABLE_TX_A 0x10 // select d'board TX A -#define SPI_ENABLE_RX_A 0x20 // select d'board RX A -#define SPI_ENABLE_TX_B 0x40 // select d'board TX B -#define SPI_ENABLE_RX_B 0x80 // select d'board RX B - -/* - * If there's one header byte, it goes in wValueL. - * - * If there are two header bytes, they go in wValueH | wValueL. - * The transmit order of the bytes (and bits within them) is - * determined by SPI_FMT_*SB - */ - -#endif /* INCLUDED_USRP_SPI_DEFS_H */ -- cgit v1.2.3