From ba0bbdb3ca3815ca45766cc5f2d06a4d12810f0f Mon Sep 17 00:00:00 2001
From: Matt Ettus <matt@ettus.com>
Date: Mon, 22 Feb 2010 18:37:29 -0800
Subject: first cut at automatically setting the debug pins

---
 host/apps/omap_debug/set_debug_pins.py | 34 ++++++++++++++++++++++++++++++++++
 1 file changed, 34 insertions(+)
 create mode 100755 host/apps/omap_debug/set_debug_pins.py

diff --git a/host/apps/omap_debug/set_debug_pins.py b/host/apps/omap_debug/set_debug_pins.py
new file mode 100755
index 000000000..982c290ef
--- /dev/null
+++ b/host/apps/omap_debug/set_debug_pins.py
@@ -0,0 +1,34 @@
+#!/usr/bin/python
+
+import os
+
+# Memory Map
+misc_base = 0
+uart_base = 1
+spi_base = 2
+i2c_base = 3
+gpio_base = 4
+settings_base = 5
+
+# GPIO offset
+gpio_pins = 0
+gpio_ddr = 4
+gpio_ctrl_lo = 8
+gpio_ctrl_hi = 12
+
+def set_reg(reg, val):
+    os.system("usrp1-e-ctl w %d 1 %d" % (reg,val))
+
+def get_reg(reg):
+    fin,fout = os.popen4("usrp1-e-ctl r %d 1" % (reg,))
+    print fout.read()
+
+# Set DDRs to output
+set_reg(gpio_base+gpio_ddr, 0xFFFF)
+set_reg(gpio_base+gpio_ddr+2, 0xFFFF)
+
+# Set CTRL to Debug #0 ( A is for debug 0, F is for debug 1 )
+set_reg(gpio_base+ctrl_lo, 0xAAAA)
+set_reg(gpio_base+ctrl_lo+2, 0xAAAA)
+set_reg(gpio_base+ctrl_hi, 0xAAAA)
+set_reg(gpio_base+ctrl_hi+2, 0xAAAA)
-- 
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