From adb352a2ad81d7c6d70ec5880a787b6bab7d19ba Mon Sep 17 00:00:00 2001
From: Javier Valenzuela <javier.valenzuela@ni.com>
Date: Wed, 16 Feb 2022 22:06:33 -0600
Subject: fpga: x400: Adjust SPI engine strobes alignment

Modify behavior of clock crossing between radio_clk and radio_clk_2x.
This ensures strobe signals are always asserted for a single
radio_clk_2x cycle and when radio_clk is low.
---
 fpga/usrp3/top/x400/doc/X4XX_FPGA_right.htm               |  4 ++--
 .../usrp3/top/x400/regmap/versioning_regs_regmap_utils.vh |  2 +-
 fpga/usrp3/top/x400/x4xx.v                                |  2 +-
 fpga/usrp3/top/x400/x4xx_gpio_spi.v                       | 15 ++++++++++-----
 4 files changed, 14 insertions(+), 9 deletions(-)

diff --git a/fpga/usrp3/top/x400/doc/X4XX_FPGA_right.htm b/fpga/usrp3/top/x400/doc/X4XX_FPGA_right.htm
index b7495d673..0d8ec1cb1 100644
--- a/fpga/usrp3/top/x400/doc/X4XX_FPGA_right.htm
+++ b/fpga/usrp3/top/x400/doc/X4XX_FPGA_right.htm
@@ -24131,9 +24131,9 @@ FPGA version.<BR/>
 
 <tr valign="top">
 
-                        <td class='value'>570500626</td>
+                        <td class='value'>570565649</td>
                         
-                            <td class='l'>0x22012612</td>
+                            <td class='l'>0x22022411</td>
                             
                             <td class="l" style="text-align: left;">
                               <p class="name"><a name='VERSIONING_REGS_REGMAP|FPGA_VERSION|FPGA_VERSION_LAST_MODIFIED_TIME'></a>FPGA_VERSION_LAST_MODIFIED_TIME</p>
diff --git a/fpga/usrp3/top/x400/regmap/versioning_regs_regmap_utils.vh b/fpga/usrp3/top/x400/regmap/versioning_regs_regmap_utils.vh
index 9d9eb397e..8928f06f3 100644
--- a/fpga/usrp3/top/x400/regmap/versioning_regs_regmap_utils.vh
+++ b/fpga/usrp3/top/x400/regmap/versioning_regs_regmap_utils.vh
@@ -85,7 +85,7 @@
   localparam FPGA_CURRENT_VERSION_MINOR            = 'h6;  // FPGA_VERSION:FPGA_CURRENT_VERSION_MINOR
   localparam FPGA_CURRENT_VERSION_MAJOR            = 'h7;  // FPGA_VERSION:FPGA_CURRENT_VERSION_MAJOR
   localparam FPGA_OLDEST_COMPATIBLE_VERSION_MAJOR  = 'h7;  // FPGA_VERSION:FPGA_OLDEST_COMPATIBLE_VERSION_MAJOR
-  localparam FPGA_VERSION_LAST_MODIFIED_TIME       = 'h22012612;  // FPGA_VERSION:FPGA_VERSION_LAST_MODIFIED_TIME
+  localparam FPGA_VERSION_LAST_MODIFIED_TIME       = 'h22022411;  // FPGA_VERSION:FPGA_VERSION_LAST_MODIFIED_TIME
 
   // Enumerated type RF_CORE_100M_VERSION
   localparam RF_CORE_100M_VERSION_SIZE = 7;
diff --git a/fpga/usrp3/top/x400/x4xx.v b/fpga/usrp3/top/x400/x4xx.v
index 5c05b9eb9..c16f551d5 100644
--- a/fpga/usrp3/top/x400/x4xx.v
+++ b/fpga/usrp3/top/x400/x4xx.v
@@ -2289,7 +2289,7 @@ endmodule
 //      <value name="FPGA_OLDEST_COMPATIBLE_VERSION_MAJOR" integer="7"/>
 //      <value name="FPGA_OLDEST_COMPATIBLE_VERSION_MINOR" integer="0"/>
 //      <value name="FPGA_OLDEST_COMPATIBLE_VERSION_BUILD" integer="0"/>
-//      <value name="FPGA_VERSION_LAST_MODIFIED_TIME"      integer="0x22012612"/>
+//      <value name="FPGA_VERSION_LAST_MODIFIED_TIME"      integer="0x22022411"/>
 //    </enumeratedtype>
 //  </group>
 //</regmap>
diff --git a/fpga/usrp3/top/x400/x4xx_gpio_spi.v b/fpga/usrp3/top/x400/x4xx_gpio_spi.v
index b5866f867..a037ae158 100644
--- a/fpga/usrp3/top/x400/x4xx_gpio_spi.v
+++ b/fpga/usrp3/top/x400/x4xx_gpio_spi.v
@@ -342,13 +342,18 @@ module x4xx_gpio_spi #(
 
   //  Register set_stb for use in 2x domain.
   reg set_stb_2x = 1'b0;
-  reg ctrlport_clk_phase = 1'b0;
+  reg ctrlport_clk_phase = 1'b1;
 
   always @ (posedge ctrlport_clk_2x) begin
-    // Assert strobe only during a single 2x cycle of the
-    // 1x pulse.
-    set_stb_2x         <= ctrlport_clk_phase & set_stb;
-    ctrlport_clk_phase <= ~ctrlport_clk_phase;
+    if (ctrlport_rst) begin
+      ctrlport_clk_phase <= 1'b1;
+      set_stb_2x         <= 1'b0;
+    end else begin
+      // Assert strobe only during a single 2x cycle of the
+      // 1x pulse, when 1x clock is low.
+      set_stb_2x         <= ctrlport_clk_phase & set_stb;
+      ctrlport_clk_phase <= ~ctrlport_clk_phase;
+    end
   end
 
   simple_spi_core #(
-- 
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