From b1388bc15972e04e616f2734a05efc11a7726d3a Mon Sep 17 00:00:00 2001 From: Moritz Fischer Date: Wed, 29 Jul 2015 22:58:54 -0700 Subject: e3xx: docs: Add a paragraph on network configuration. Signed-off-by: Moritz Fischer --- host/docs/usrp_e3x0.dox | 52 +++++++++++++++++++++++++++++++++++++++++++++---- 1 file changed, 48 insertions(+), 4 deletions(-) diff --git a/host/docs/usrp_e3x0.dox b/host/docs/usrp_e3x0.dox index 7479c584d..e23bbaeb5 100644 --- a/host/docs/usrp_e3x0.dox +++ b/host/docs/usrp_e3x0.dox @@ -1,4 +1,4 @@ -/*! \page page_usrp_e3x0 USRP-E3x0 Series +/*! \page page_usrp_e3x0 USRP-E3xx Series \tableofcontents @@ -35,7 +35,7 @@ There are two different methods to connect to the device - using the gigabit ethernet connector and a ssh client on your host computer For the first boot, booting with the serial cable connected to the device -is recommended, as it allows to review and modify the network configuration, +is recommended, as it allows to review and modify the \ref e3xx_network_configuration and allows to enter the bootloader in case of issues during the boot. @@ -248,8 +248,7 @@ You may need to change the USRP's IP address for several reasons: - to use multiple USRP-E Series devices with the same host computer - to set a known IP address into USRP (in case you forgot) - - +For examples refer to the \ref e3xx_network_configuration section. \section e3x0_hw Hardware Notes @@ -626,6 +625,51 @@ TRX-B | >= 2940.0 | 11 | 10 | XXX _Note: Although the transmit filters are low pass, the following table describes UHD's tuning range for selecting each filter path. The table also includes the required transmit enable states._ +\section e3xx_network_configuration Network configuration + +Your USRP E3XX Series device can be configured by editing the /etc/network/interfaces.
+The device defaults to *DHCP*, meaning it will query the local network's DHCP server for an address. + +\subsection e3xx_network_dhcp DHCP + +The default configuration should look similar to, instructing your device to query +local DHCP servers for an IP address, gateway, etc. +~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +auto eth0 +iface eth0 inet dhcp +~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ + +In order to change the hostname used to obtain an IP address via DHCP change + + /etc/hostname + +and edit: + + /etc/network/interfaces + +~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +auto eth0 +iface eth0 inet dhcp + hostname your-hostname +~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ + + +\subsection e3xx_network_static Static IP + +To configure a static IP address edit + + /etc/hostname + +to look like + +~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +auto eth0 +iface eth0 inet static + address your-ip + netmask your-netmask + gateway your-gateway +~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ + \section e3x0_misc Miscellaneous \subsection e3x0_misc_multirx Multiple RX channels -- cgit v1.2.3 From 34b037f50e9fa40ebe6e78e327b57715d2a1d495 Mon Sep 17 00:00:00 2001 From: Marcus Müller Date: Sun, 2 Aug 2015 16:31:53 +0200 Subject: docs: Added X3x0 LEDs table --- host/docs/usrp_x3x0.dox | 24 ++++++++++++++++++++++++ 1 file changed, 24 insertions(+) diff --git a/host/docs/usrp_x3x0.dox b/host/docs/usrp_x3x0.dox index 9af68546f..d9657424e 100644 --- a/host/docs/usrp_x3x0.dox +++ b/host/docs/usrp_x3x0.dox @@ -609,6 +609,30 @@ The +3.3V is for ESD clamping purposes only and not designed to deliver high cur Please see the \ref page_gpio_api for information on configuring and using the GPIO bus. +\subsection x3x0_hw_on_board_leds On-Board LEDs + +|LED | | Description | +|-------|---------------|-------------------------------| +|DS1 |1.2V |power | +|DS2 |TXRX1 |Red: TX, Green: RX | +|DS3 |RX1 |Green: RX | +|DS4 |REF |reference lock | +|DS5 |PPS |flashes on edge | +|DS6 |GPS |GPS lock | +|DS7 |SFP0 |link | +|DS8 |SFP0 |link activity | +|DS10 |TXRX2 |Red: TX Green: RX | +|DS11 |RX2 |Green: RX | +|DS12 |6V |daughterboard power | +|DS13 |3.8V |power | +|DS14 |3.3V |management power | +|DS15 |3.3V |auxiliary management power | +|DS16 |1.8V |FPGA power | +|DS16 |3.3V |FPGA power | +|DS19 |SFP1 |link | +|DS20 |SFP1 |link active | +|DS21 |LINK |link activity | + \subsection x3x0_hw_chipscope Debugging custom FPGA designs with Xilinx Chipscope Xilinx chipscope allows for debugging custom FPGA designs similar to a logic analyzer. -- cgit v1.2.3 From 12cea5a4843722daf9628006cb8b0c0580034aa7 Mon Sep 17 00:00:00 2001 From: Nicholas Corgan Date: Mon, 3 Aug 2015 14:14:15 -0700 Subject: Added NI B2x0 VID/PID pairs to udev rules --- host/utils/uhd-usrp.rules | 4 +++- 1 file changed, 3 insertions(+), 1 deletion(-) diff --git a/host/utils/uhd-usrp.rules b/host/utils/uhd-usrp.rules index 2f5198d64..10d68a290 100644 --- a/host/utils/uhd-usrp.rules +++ b/host/utils/uhd-usrp.rules @@ -1,5 +1,5 @@ # -# Copyright 2011 Ettus Research LLC +# Copyright 2011,2015 Ettus Research LLC # # This program is free software: you can redistribute it and/or modify # it under the terms of the GNU General Public License as published by @@ -23,3 +23,5 @@ SUBSYSTEMS=="usb", ATTRS{idVendor}=="2500", ATTRS{idProduct}=="0002", MODE:="066 #B200 SUBSYSTEMS=="usb", ATTRS{idVendor}=="2500", ATTRS{idProduct}=="0020", MODE:="0666" +SUBSYSTEMS=="usb", ATTRS{idVendor}=="3923", ATTRS{idProduct}=="7813", MODE:="0666" +SUBSYSTEMS=="usb", ATTRS{idVendor}=="3923", ATTRS{idProduct}=="7814", MODE:="0666" -- cgit v1.2.3