From ce2d5e2b8a8ca97cd24654e0ea7c0ed86aae525c Mon Sep 17 00:00:00 2001 From: Josh Blum Date: Wed, 4 Jul 2012 13:38:31 -0700 Subject: uhd: docstring typo fix version.hpp --- host/include/uhd/version.hpp | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/host/include/uhd/version.hpp b/host/include/uhd/version.hpp index ee0c4fe43..9a7226323 100644 --- a/host/include/uhd/version.hpp +++ b/host/include/uhd/version.hpp @@ -24,7 +24,7 @@ /*! * The ABI version string that the client application builds against. * Call get_abi_string() to check this against the library build. - * The format is oldest ABI compatible release - ABI compat number. + * The format is oldest API compatible release - ABI compat number. * The compatibility number allows pre-release ABI to be versioned. */ #define UHD_VERSION_ABI_STRING "3.4.0-0" -- cgit v1.2.3 From 23f8854b398b92b34d520720abb239fa41b04254 Mon Sep 17 00:00:00 2001 From: Nicholas Corgan Date: Wed, 4 Jul 2012 06:30:53 -0700 Subject: lib: FW/FPGA compatibility error prompts user to use regular card/net burner instead of gui --- host/lib/usrp/usrp2/usrp2_iface.cpp | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/host/lib/usrp/usrp2/usrp2_iface.cpp b/host/lib/usrp/usrp2/usrp2_iface.cpp index 316e38da8..f0b2a90a6 100644 --- a/host/lib/usrp/usrp2/usrp2_iface.cpp +++ b/host/lib/usrp/usrp2/usrp2_iface.cpp @@ -413,13 +413,13 @@ public: //create the images downloader and burner commands const std::string images_downloader_cmd = str(boost::format("%s\"%s\"") % sudo % find_images_downloader()); if (this->get_rev() == USRP2_REV3 or this->get_rev() == USRP2_REV4){ - const std::string card_burner = (fs::path(fw_image_path).branch_path().branch_path() / "utils" / "usrp2_card_burner_gui.py").string(); + const std::string card_burner = (fs::path(fw_image_path).branch_path().branch_path() / "utils" / "usrp2_card_burner.py").string(); const std::string card_burner_cmd = str(boost::format("\"%s%s\" %s--fpga=\"%s\" %s--fw=\"%s\"") % sudo % card_burner % ml % fpga_image_path % ml % fw_image_path); return str(boost::format("%s\n%s") % print_images_error() % card_burner_cmd); } else{ const std::string addr = _ctrl_transport->get_recv_addr(); - const std::string net_burner = (fs::path(fw_image_path).branch_path().branch_path() / "utils" / "usrp_n2xx_net_burner_gui.py").string(); + const std::string net_burner = (fs::path(fw_image_path).branch_path().branch_path() / "utils" / "usrp_n2xx_net_burner.py").string(); const std::string net_burner_cmd = str(boost::format("\"%s\" %s--fpga=\"%s\" %s--fw=\"%s\" %s--addr=\"%s\"") % net_burner % ml % fpga_image_path % ml % fw_image_path % ml % addr); return str(boost::format("%s\n%s") % print_images_error() % net_burner_cmd); } -- cgit v1.2.3 From 7c8fef85c070ad582d16d5782e7421700b714918 Mon Sep 17 00:00:00 2001 From: Josh Blum Date: Tue, 3 Jul 2012 17:40:52 -0700 Subject: usrp: cache writes to gpio pins (avoids overhead) --- host/lib/usrp/cores/gpio_core_200.cpp | 8 +++++++- 1 file changed, 7 insertions(+), 1 deletion(-) diff --git a/host/lib/usrp/cores/gpio_core_200.cpp b/host/lib/usrp/cores/gpio_core_200.cpp index d756097ff..cdab70b8d 100644 --- a/host/lib/usrp/cores/gpio_core_200.cpp +++ b/host/lib/usrp/cores/gpio_core_200.cpp @@ -63,6 +63,7 @@ private: wb_iface::sptr _iface; const size_t _base; const size_t _rb_addr; + uhd::dict _update_cache; uhd::dict _pin_ctrl, _gpio_out, _gpio_ddr; uhd::dict > _atr_regs; @@ -90,7 +91,12 @@ private: const boost::uint32_t ctrl = (boost::uint32_t(_pin_ctrl[dboard_iface::UNIT_RX]) << unit2shit(dboard_iface::UNIT_RX)) | (boost::uint32_t(_pin_ctrl[dboard_iface::UNIT_TX]) << unit2shit(dboard_iface::UNIT_TX)); - _iface->poke32(addr, (ctrl & atr_val) | ((~ctrl) & gpio_val)); + const boost::uint32_t val = (ctrl & atr_val) | ((~ctrl) & gpio_val); + if (not _update_cache.has_key(addr) or _update_cache[addr] != val) + { + _iface->poke32(addr, val); + } + _update_cache[addr] = val; } }; -- cgit v1.2.3 From af6ad0d8ae9235b261799e4384ffc7fc59c4319c Mon Sep 17 00:00:00 2001 From: Josh Blum Date: Thu, 12 Jul 2012 01:18:40 -0700 Subject: n2xx: fix for usrp_n2xx_net_burner addr decode failure In the windows network address extractor: The except: continue line could get use stuck in an infinite loop. This fix sets addr to None so the code below it does not execute, and the next node in the chain is tested as expected. --- host/utils/usrp_n2xx_net_burner.py | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/host/utils/usrp_n2xx_net_burner.py b/host/utils/usrp_n2xx_net_burner.py index c52be3d44..f2cfb8ecf 100755 --- a/host/utils/usrp_n2xx_net_burner.py +++ b/host/utils/usrp_n2xx_net_burner.py @@ -199,7 +199,7 @@ def win_get_interfaces(): try: ipAddr = adNode.ipAddress.decode() ipMask = adNode.ipMask.decode() - except: continue + except: ipAddr = None if ipAddr and ipMask: hexAddr = struct.unpack(" Date: Sun, 15 Jul 2012 22:43:52 -0700 Subject: e100: reverted commit registering in gpmc There is a subtle bus issue that the last changset did not address. --- usrp2/gpmc/gpmc.v | 39 +-------------------------------------- 1 file changed, 1 insertion(+), 38 deletions(-) diff --git a/usrp2/gpmc/gpmc.v b/usrp2/gpmc/gpmc.v index 8ecae4daf..a5d4db466 100644 --- a/usrp2/gpmc/gpmc.v +++ b/usrp2/gpmc/gpmc.v @@ -49,18 +49,6 @@ module gpmc wire [15:0] EM_D_fifo; wire [15:0] EM_D_wb; - // these registers are used for the GPMC-to-FIFO interface - reg [15:0] em_d_reg; - reg [ADDR_WIDTH:1] em_a_reg; - reg [1:0] em_nbe_reg; - reg em_wait0_reg; - reg em_ncs4_reg; - reg em_ncs6_reg; - reg em_nwe_reg; - reg em_noe_reg; - - - assign EM_D = ~EM_output_enable ? 16'bz : ~EM_NCS4 ? EM_D_fifo : EM_D_wb; // CS4 is RAM_2PORT for DATA PATH (high-speed data) @@ -75,34 +63,9 @@ module gpmc wire [35:0] tx_data, txb_data; wire tx_src_rdy, tx_dst_rdy; wire txb_src_rdy, txb_dst_rdy; - - // Register signals to prevent Sequence errors (S-errors) from occuring - always @(negedge EM_CLK or posedge arst) begin - if (arst) begin - - em_d_reg <= 0; - em_a_reg <= 0; - em_nbe_reg <= 0; - em_wait0_reg <= 0; - em_ncs4_reg <= 0; - em_ncs6_reg <= 0; - em_nwe_reg <= 0; - em_noe_reg <= 0; - end - else begin - em_d_reg <= EM_D; - em_a_reg <= EM_A; - em_nbe_reg <= EM_NBE; - em_wait0_reg <= EM_WAIT0; - em_ncs4_reg <= EM_NCS4; - em_ncs6_reg <= EM_NCS6; - em_nwe_reg <= EM_NWE; - em_noe_reg <= EM_NOE; - end - end gpmc_to_fifo #(.ADDR_WIDTH(ADDR_WIDTH)) gpmc_to_fifo - (.EM_D(em_d_reg), .EM_A(em_a_reg), .EM_CLK(EM_CLK), .EM_WE(~em_ncs4_reg & ~em_nwe_reg), + (.EM_D(EM_D), .EM_A(EM_A), .EM_CLK(EM_CLK), .EM_WE(~EM_NCS4 & ~EM_NWE), .clk(fifo_clk), .reset(fifo_rst), .clear(clear_tx), .arst(fifo_rst | clear_tx | arst), .data_o(tx18_data), .src_rdy_o(tx18_src_rdy), .dst_rdy_i(tx18_dst_rdy), .have_space(tx_have_space)); -- cgit v1.2.3 From 38ec062b628e39397999d86fb3a68438aa586d5a Mon Sep 17 00:00:00 2001 From: Josh Blum Date: Sun, 15 Jul 2012 22:50:19 -0700 Subject: e100: offset gpmc to fifo writes by 2 transfers This effectivly works around bus initial transaction issues. --- usrp2/gpmc/gpmc_to_fifo.v | 8 ++++---- usrp2/top/E1x0/u1e_core.v | 2 +- 2 files changed, 5 insertions(+), 5 deletions(-) diff --git a/usrp2/gpmc/gpmc_to_fifo.v b/usrp2/gpmc/gpmc_to_fifo.v index 4aa55953a..cfc5aaa8b 100644 --- a/usrp2/gpmc/gpmc_to_fifo.v +++ b/usrp2/gpmc/gpmc_to_fifo.v @@ -70,9 +70,9 @@ module gpmc_to_fifo case(gpmc_state) GPMC_STATE_START: begin - if (EM_A == 0) begin + if (EM_A == 2) begin gpmc_state <= GPMC_STATE_FILL; - last_addr <= {EM_D[ADDR_WIDTH-2:0], 1'b0} - 1'b1; + last_addr <= {EM_D[ADDR_WIDTH-2:0], 1'b0} - 1'b1 + 2; next_gpmc_ptr <= gpmc_ptr + 1; end end @@ -116,14 +116,14 @@ module gpmc_to_fifo if (reset | clear) begin fifo_state <= FIFO_STATE_CLAIM; fifo_ptr <= 0; - counter <= 0; + counter <= 2; end else begin case(fifo_state) FIFO_STATE_CLAIM: begin if (bram_available_to_empty) fifo_state <= FIFO_STATE_EMPTY; - counter <= 0; + counter <= 2; end FIFO_STATE_EMPTY: begin diff --git a/usrp2/top/E1x0/u1e_core.v b/usrp2/top/E1x0/u1e_core.v index e3d1656a6..bd19d6076 100644 --- a/usrp2/top/E1x0/u1e_core.v +++ b/usrp2/top/E1x0/u1e_core.v @@ -454,7 +454,7 @@ module u1e_core // Readback mux 32 -- Slave #7 //compatibility number -> increment when the fpga has been sufficiently altered - localparam compat_num = {16'd9, 16'd2}; //major, minor + localparam compat_num = {16'd9, 16'd3}; //major, minor wire [31:0] reg_test32; -- cgit v1.2.3 From eb0833008f38a5b9d33ed9282042bd4ca3fd3ff9 Mon Sep 17 00:00:00 2001 From: Josh Blum Date: Mon, 16 Jul 2012 17:51:41 -0700 Subject: e100: set vita header offset for previous FPGA changeset --- host/lib/usrp/e100/io_impl.cpp | 5 ++++- 1 file changed, 4 insertions(+), 1 deletion(-) diff --git a/host/lib/usrp/e100/io_impl.cpp b/host/lib/usrp/e100/io_impl.cpp index e9608125f..332fe76ae 100644 --- a/host/lib/usrp/e100/io_impl.cpp +++ b/host/lib/usrp/e100/io_impl.cpp @@ -42,6 +42,8 @@ using namespace uhd; using namespace uhd::usrp; using namespace uhd::transport; +static const size_t vrt_send_header_offset_words32 = 1; + /*********************************************************************** * io impl details (internal to this file) * - pirate crew of 1 @@ -324,6 +326,7 @@ tx_streamer::sptr e100_impl::get_tx_stream(const uhd::stream_args_t &args_){ //calculate packet size static const size_t hdr_size = 0 + + vrt_send_header_offset_words32*sizeof(boost::uint32_t) + vrt::max_if_hdr_words32*sizeof(boost::uint32_t) + sizeof(vrt::if_packet_info_t().tlr) //forced to have trailer - sizeof(vrt::if_packet_info_t().sid) //no stream id ever used @@ -338,7 +341,7 @@ tx_streamer::sptr e100_impl::get_tx_stream(const uhd::stream_args_t &args_){ //init some streamer stuff my_streamer->resize(args.channels.size()); - my_streamer->set_vrt_packer(&vrt::if_hdr_pack_le); + my_streamer->set_vrt_packer(&vrt::if_hdr_pack_le, vrt_send_header_offset_words32); //set the converter uhd::convert::id_type id; -- cgit v1.2.3