From 863648f52eeeea0a8c7e80a7d0f42c5efeede92a Mon Sep 17 00:00:00 2001 From: Martin Braun Date: Wed, 22 Jul 2015 18:11:14 -0700 Subject: cores: Moved subtree populate code to frontend cores --- host/lib/usrp/cores/rx_frontend_core_200.cpp | 21 +++++++++++++++++++++ host/lib/usrp/cores/rx_frontend_core_200.hpp | 9 ++++++++- host/lib/usrp/cores/tx_frontend_core_200.cpp | 16 ++++++++++++++++ host/lib/usrp/cores/tx_frontend_core_200.hpp | 8 +++++++- host/lib/usrp/e300/e300_impl.cpp | 24 ++---------------------- host/lib/usrp/x300/x300_impl.cpp | 28 ++++++++-------------------- 6 files changed, 62 insertions(+), 44 deletions(-) diff --git a/host/lib/usrp/cores/rx_frontend_core_200.cpp b/host/lib/usrp/cores/rx_frontend_core_200.cpp index b73896b57..7ac920553 100644 --- a/host/lib/usrp/cores/rx_frontend_core_200.cpp +++ b/host/lib/usrp/cores/rx_frontend_core_200.cpp @@ -17,6 +17,7 @@ #include "rx_frontend_core_200.hpp" #include +#include using namespace uhd; @@ -38,6 +39,10 @@ rx_frontend_core_200::~rx_frontend_core_200(void){ /* NOP */ } +const std::complex rx_frontend_core_200::DEFAULT_DC_OFFSET_VALUE = std::complex(0.0, 0.0); +const bool rx_frontend_core_200::DEFAULT_DC_OFFSET_ENABLE = true; +const std::complex rx_frontend_core_200::DEFAULT_IQ_BALANCE_VALUE = std::complex(0.0, 0.0); + class rx_frontend_core_200_impl : public rx_frontend_core_200{ public: rx_frontend_core_200_impl(wb_iface::sptr iface, const size_t base): @@ -74,6 +79,22 @@ public: _iface->poke32(REG_RX_FE_PHASE_CORRECTION, fs_to_bits(cor.imag(), 18)); } + void populate_subtree(uhd::property_tree::sptr subtree) + { + subtree->create >("dc_offset/value") + .set(DEFAULT_DC_OFFSET_VALUE) + .coerce(boost::bind(&rx_frontend_core_200::set_dc_offset, this, _1)) + ; + subtree->create("dc_offset/enable") + .set(DEFAULT_DC_OFFSET_ENABLE) + .subscribe(boost::bind(&rx_frontend_core_200::set_dc_offset_auto, this, _1)) + ; + subtree->create >("iq_balance/value") + .set(DEFAULT_IQ_BALANCE_VALUE) + .subscribe(boost::bind(&rx_frontend_core_200::set_iq_balance, this, _1)) + ; + } + private: boost::int32_t _i_dc_off, _q_dc_off; wb_iface::sptr _iface; diff --git a/host/lib/usrp/cores/rx_frontend_core_200.hpp b/host/lib/usrp/cores/rx_frontend_core_200.hpp index 9b18e2089..32ce77e00 100644 --- a/host/lib/usrp/cores/rx_frontend_core_200.hpp +++ b/host/lib/usrp/cores/rx_frontend_core_200.hpp @@ -19,14 +19,19 @@ #define INCLUDED_LIBUHD_USRP_TX_FRONTEND_CORE_200_HPP #include +#include +#include #include #include -#include #include #include class rx_frontend_core_200 : boost::noncopyable{ public: + static const std::complex DEFAULT_DC_OFFSET_VALUE; + static const bool DEFAULT_DC_OFFSET_ENABLE; + static const std::complex DEFAULT_IQ_BALANCE_VALUE; + typedef boost::shared_ptr sptr; virtual ~rx_frontend_core_200(void) = 0; @@ -41,6 +46,8 @@ public: virtual void set_iq_balance(const std::complex &cor) = 0; + virtual void populate_subtree(uhd::property_tree::sptr subtree) = 0; + }; #endif /* INCLUDED_LIBUHD_USRP_TX_FRONTEND_CORE_200_HPP */ diff --git a/host/lib/usrp/cores/tx_frontend_core_200.cpp b/host/lib/usrp/cores/tx_frontend_core_200.cpp index 7000f46bd..0fa028571 100644 --- a/host/lib/usrp/cores/tx_frontend_core_200.cpp +++ b/host/lib/usrp/cores/tx_frontend_core_200.cpp @@ -20,6 +20,7 @@ #include #include #include +#include using namespace uhd; @@ -29,6 +30,9 @@ using namespace uhd; #define REG_TX_FE_PHASE_CORRECTION _base + 12 //18 bits #define REG_TX_FE_MUX _base + 16 //8 bits (std output = 0x10, reversed = 0x01) +const std::complex tx_frontend_core_200::DEFAULT_DC_OFFSET_VALUE = std::complex(0.0, 0.0); +const std::complex tx_frontend_core_200::DEFAULT_IQ_BALANCE_VALUE = std::complex(0.0, 0.0); + static boost::uint32_t fs_to_bits(const double num, const size_t bits){ return boost::int32_t(boost::math::round(num * (1 << (bits-1)))); } @@ -71,6 +75,18 @@ public: _iface->poke32(REG_TX_FE_PHASE_CORRECTION, fs_to_bits(cor.imag(), 18)); } + void populate_subtree(uhd::property_tree::sptr subtree) + { + subtree->create< std::complex >("dc_offset/value") + .set(DEFAULT_DC_OFFSET_VALUE) + .coerce(boost::bind(&tx_frontend_core_200::set_dc_offset, this, _1)) + ; + subtree->create< std::complex >("iq_balance/value") + .set(DEFAULT_IQ_BALANCE_VALUE) + .subscribe(boost::bind(&tx_frontend_core_200::set_iq_balance, this, _1)) + ; + } + private: wb_iface::sptr _iface; const size_t _base; diff --git a/host/lib/usrp/cores/tx_frontend_core_200.hpp b/host/lib/usrp/cores/tx_frontend_core_200.hpp index 0b89ea818..912256329 100644 --- a/host/lib/usrp/cores/tx_frontend_core_200.hpp +++ b/host/lib/usrp/cores/tx_frontend_core_200.hpp @@ -19,9 +19,10 @@ #define INCLUDED_LIBUHD_USRP_RX_FRONTEND_CORE_200_HPP #include +#include +#include #include #include -#include #include #include @@ -29,6 +30,9 @@ class tx_frontend_core_200 : boost::noncopyable{ public: typedef boost::shared_ptr sptr; + static const std::complex DEFAULT_DC_OFFSET_VALUE; + static const std::complex DEFAULT_IQ_BALANCE_VALUE; + virtual ~tx_frontend_core_200(void) = 0; static sptr make(uhd::wb_iface::sptr iface, const size_t base); @@ -39,6 +43,8 @@ public: virtual void set_iq_balance(const std::complex &cor) = 0; + virtual void populate_subtree(uhd::property_tree::sptr subtree) = 0; + }; #endif /* INCLUDED_LIBUHD_USRP_RX_FRONTEND_CORE_200_HPP */ diff --git a/host/lib/usrp/e300/e300_impl.cpp b/host/lib/usrp/e300/e300_impl.cpp index 6f7ea5abf..90897e6bb 100644 --- a/host/lib/usrp/e300/e300_impl.cpp +++ b/host/lib/usrp/e300/e300_impl.cpp @@ -982,28 +982,8 @@ void e300_impl::_setup_radio(const size_t dspno) //////////////////////////////////////////////////////////////////// // front end corrections //////////////////////////////////////////////////////////////////// - const fs_path rx_fe_path = mb_path / "rx_frontends" / slot_name; - _tree->create >(rx_fe_path / "dc_offset" / "value") - .set(std::complex(0.0, 0.0)) - .coerce(boost::bind(&rx_frontend_core_200::set_dc_offset, perif.rx_fe, _1)) - ; - _tree->create(rx_fe_path / "dc_offset" / "enable") - .set(true) - .subscribe(boost::bind(&rx_frontend_core_200::set_dc_offset_auto, perif.rx_fe, _1)) - ; - _tree->create >(rx_fe_path / "iq_balance" / "value") - .set(std::complex(0.0, 0.0)) - .subscribe(boost::bind(&rx_frontend_core_200::set_iq_balance, perif.rx_fe, _1)) - ; - const fs_path tx_fe_path = mb_path / "tx_frontends" / slot_name; - _tree->create >(tx_fe_path / "dc_offset" / "value") - .set(std::complex(0.0, 0.0)) - .coerce(boost::bind(&tx_frontend_core_200::set_dc_offset, perif.tx_fe, _1)) - ; - _tree->create >(tx_fe_path / "iq_balance" / "value") - .set(std::complex(0.0, 0.0)) - .subscribe(boost::bind(&tx_frontend_core_200::set_iq_balance, perif.tx_fe, _1)) - ; + perif.rx_fe->populate_subtree(_tree->subtree(mb_path / "rx_frontends" / slot_name)); + perif.tx_fe->populate_subtree(_tree->subtree(mb_path / "tx_frontends" / slot_name)); //////////////////////////////////////////////////////////////////// // create rx dsp control objects diff --git a/host/lib/usrp/x300/x300_impl.cpp b/host/lib/usrp/x300/x300_impl.cpp index 903b63198..1c2d177a1 100644 --- a/host/lib/usrp/x300/x300_impl.cpp +++ b/host/lib/usrp/x300/x300_impl.cpp @@ -935,6 +935,12 @@ void x300_impl::setup_radio(const size_t mb_i, const std::string &slot_name, con perif.adc = x300_adc_ctrl::make(perif.spi, DB_ADC_SEN); perif.dac = x300_dac_ctrl::make(perif.spi, DB_DAC_SEN, mb.clock->get_master_clock_rate()); perif.leds = gpio_core_200_32wo::make(perif.ctrl, TOREG(SR_LEDS)); + perif.rx_fe = rx_frontend_core_200::make(perif.ctrl, TOREG(SR_RX_FRONT)); + perif.rx_fe->set_dc_offset(rx_frontend_core_200::DEFAULT_DC_OFFSET_VALUE); + perif.rx_fe->set_dc_offset_auto(rx_frontend_core_200::DEFAULT_DC_OFFSET_ENABLE); + perif.tx_fe = tx_frontend_core_200::make(perif.ctrl, TOREG(SR_TX_FRONT)); + perif.tx_fe->set_dc_offset(tx_frontend_core_200::DEFAULT_DC_OFFSET_VALUE); + perif.tx_fe->set_iq_balance(tx_frontend_core_200::DEFAULT_IQ_BALANCE_VALUE); //Capture delays are calibrated every time. The status is only printed is the user //asks to run the xfer self cal using "self_cal_adc_delay" @@ -960,26 +966,8 @@ void x300_impl::setup_radio(const size_t mb_i, const std::string &slot_name, con //////////////////////////////////////////////////////////////////// // front end corrections //////////////////////////////////////////////////////////////////// - perif.rx_fe = rx_frontend_core_200::make(perif.ctrl, TOREG(SR_RX_FRONT)); - const fs_path rx_fe_path = mb_path / "rx_frontends" / slot_name; - _tree->create >(rx_fe_path / "dc_offset" / "value") - .coerce(boost::bind(&rx_frontend_core_200::set_dc_offset, perif.rx_fe, _1)) - .set(std::complex(0.0, 0.0)); - _tree->create(rx_fe_path / "dc_offset" / "enable") - .subscribe(boost::bind(&rx_frontend_core_200::set_dc_offset_auto, perif.rx_fe, _1)) - .set(true); - _tree->create >(rx_fe_path / "iq_balance" / "value") - .subscribe(boost::bind(&rx_frontend_core_200::set_iq_balance, perif.rx_fe, _1)) - .set(std::complex(0.0, 0.0)); - - perif.tx_fe = tx_frontend_core_200::make(perif.ctrl, TOREG(SR_TX_FRONT)); - const fs_path tx_fe_path = mb_path / "tx_frontends" / slot_name; - _tree->create >(tx_fe_path / "dc_offset" / "value") - .coerce(boost::bind(&tx_frontend_core_200::set_dc_offset, perif.tx_fe, _1)) - .set(std::complex(0.0, 0.0)); - _tree->create >(tx_fe_path / "iq_balance" / "value") - .subscribe(boost::bind(&tx_frontend_core_200::set_iq_balance, perif.tx_fe, _1)) - .set(std::complex(0.0, 0.0)); + perif.rx_fe->populate_subtree(_tree->subtree(mb_path / "rx_frontends" / slot_name)); + perif.tx_fe->populate_subtree(_tree->subtree(mb_path / "tx_frontends" / slot_name)); //////////////////////////////////////////////////////////////////// // create rx dsp control objects -- cgit v1.2.3