From 77e9cbb40fc22de20f9cd13655fd9c9fce4f40f6 Mon Sep 17 00:00:00 2001
From: Jon Kiser <jon.kiser@ettus.com>
Date: Mon, 2 Feb 2015 17:14:33 -0800
Subject: e300/docs: updated manual with E3x0 audio jack pinout

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 host/docs/res/TRRS.png  | Bin 0 -> 2955 bytes
 host/docs/usrp_e3x0.dox |   5 +++++
 2 files changed, 5 insertions(+)
 create mode 100755 host/docs/res/TRRS.png

diff --git a/host/docs/res/TRRS.png b/host/docs/res/TRRS.png
new file mode 100755
index 000000000..78619c869
Binary files /dev/null and b/host/docs/res/TRRS.png differ
diff --git a/host/docs/usrp_e3x0.dox b/host/docs/usrp_e3x0.dox
index f93326bee..38bf8d926 100644
--- a/host/docs/usrp_e3x0.dox
+++ b/host/docs/usrp_e3x0.dox
@@ -362,6 +362,11 @@ For more advanced IMU based applications please refer to the <a href="https://gi
 Please see the \ref page_gpio_api for information on configuring and using the GPIO bus.
 
 \subsection e3x0_hw_audio Audio connectors
+The E3x0 2.5 mm Audio Jack TRRS pins are assigned as follows: Tip=Mic, Ring1=Right, Ring2=Left, Sleeve=GND. 
+
+\image html TRRS.png "Audio Jack"
+
+The Left/Right audio outputs are compatible with typical low-impedance headphones (16 to 32 Ohms). The Microphone pin provides approximately 2 mA bias at 2.2 V when not suspended. A variety of pin configurations can be found on commonly available headsets, so an adapter may be required.
 
 \subsection e3x0_hw_chipscope Debugging custom FPGA designs with Xilinx Chipscope
 
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