From 6a2a8bb2f7c7a58c39e83776c1b9fe6692b922ad Mon Sep 17 00:00:00 2001 From: sugandhagupta Date: Wed, 3 May 2017 16:25:33 -0700 Subject: mpm: fixed port expander connections - reversed CLK-MAINREF-SEL0 and SEL1 --- mpm/python/usrp_mpm/periph_manager/n310.py | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/mpm/python/usrp_mpm/periph_manager/n310.py b/mpm/python/usrp_mpm/periph_manager/n310.py index 8cc33cc9c..1bf204218 100644 --- a/mpm/python/usrp_mpm/periph_manager/n310.py +++ b/mpm/python/usrp_mpm/periph_manager/n310.py @@ -48,8 +48,8 @@ class TCA6424(object): 'WB-CDCM-OD1', 'WB-CDCM-OD2', 'PWREN-CLK-MAINREF', - 'CLK-MAINREF-SEL0', 'CLK-MAINREF-SEL1', + 'CLK-MAINREF-SEL0', '12', '13', 'FPGA-GPIO-EN', -- cgit v1.2.3