From 672a77767faf0070e94de0c8acd74328a301cae5 Mon Sep 17 00:00:00 2001
From: Josh Blum <josh@joshknows.com>
Date: Tue, 6 Mar 2012 18:51:31 -0800
Subject: fifo ctrl: ~usrp2_fifo_ctrl acks, usrp2 DCM workaround, bootloader no
blinkie
---
firmware/zpu/lib/clocks.c | 5 ++++-
firmware/zpu/lib/u2_init.c | 2 ++
host/lib/usrp/usrp2/usrp2_fifo_ctrl.cpp | 8 ++++++++
3 files changed, 14 insertions(+), 1 deletion(-)
diff --git a/firmware/zpu/lib/clocks.c b/firmware/zpu/lib/clocks.c
index c1e8ce827..bc1954e13 100644
--- a/firmware/zpu/lib/clocks.c
+++ b/firmware/zpu/lib/clocks.c
@@ -43,7 +43,10 @@ clocks_init(void)
//enable the 100MHz clock output to the FPGA for 50MHz CPU clock
clocks_enable_fpga_clk(true, 1);
- spi_wait();
+ //! Cannot SPI wait since SPI is on DSP clock
+ //! because DSP clock goes away until DCM reset.
+ //! However, spi is quick, the cpu is slow, its already ready...
+ //spi_wait();
//wait for the clock to stabilize
while(!clocks_lock_detect());
diff --git a/firmware/zpu/lib/u2_init.c b/firmware/zpu/lib/u2_init.c
index 71bd2c594..77c8c0722 100644
--- a/firmware/zpu/lib/u2_init.c
+++ b/firmware/zpu/lib/u2_init.c
@@ -51,6 +51,7 @@ u2_init(void)
hal_enable_ints();
// flash all leds to let us know board is alive
+#ifndef BOOTLOADER
hal_set_led_src(0x0, 0x1f); /* software ctrl */
hal_set_leds(0x0, 0x1f); mdelay(300);
hal_set_leds(LED_E, LED_E); mdelay(300);
@@ -61,6 +62,7 @@ u2_init(void)
hal_set_leds(0x0, 0x1f); mdelay(100);
hal_set_leds(blinks, 0x1f); mdelay(100);
}
+#endif
hal_set_led_src(0x1f & ~LED_D, 0x1f); /* hardware ctrl */
hal_set_leds(LED_D, 0x1f); // Leave one on
diff --git a/host/lib/usrp/usrp2/usrp2_fifo_ctrl.cpp b/host/lib/usrp/usrp2/usrp2_fifo_ctrl.cpp
index a602bfe9f..090bae759 100644
--- a/host/lib/usrp/usrp2/usrp2_fifo_ctrl.cpp
+++ b/host/lib/usrp/usrp2/usrp2_fifo_ctrl.cpp
@@ -18,6 +18,7 @@
#include "usrp2_regs.hpp"
#include <uhd/exception.hpp>
#include <uhd/utils/msg.hpp>
+#include <uhd/utils/safe_call.hpp>
#include <uhd/transport/vrt_if_packet.hpp>
#include "usrp2_fifo_ctrl.hpp"
#include <boost/thread/mutex.hpp>
@@ -55,6 +56,13 @@ public:
this->init_spi();
}
+ ~usrp2_fifo_ctrl_impl(void){
+ _timeout = ACK_TIMEOUT; //reset timeout to something small
+ UHD_SAFE_CALL(
+ this->peek32(0); //dummy peek with the purpose of ack'ing all packets
+ )
+ }
+
UHD_INLINE void send_pkt(wb_addr_type addr, boost::uint32_t data, int cmd){
managed_send_buffer::sptr buff = _xport->get_send_buff(0.0);
if (not buff){
--
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