From 5f54616b4f8456a6dab879ebd8fc9bca287987b9 Mon Sep 17 00:00:00 2001
From: Matt Ettus <matt@ettus.com>
Date: Fri, 11 Dec 2009 18:27:14 -0800
Subject: Add ability to clear state out when there is an underrun

---
 vrt/vita_tx_control.v | 7 ++++++-
 1 file changed, 6 insertions(+), 1 deletion(-)

diff --git a/vrt/vita_tx_control.v b/vrt/vita_tx_control.v
index e53b968a5..2af68c073 100644
--- a/vrt/vita_tx_control.v
+++ b/vrt/vita_tx_control.v
@@ -40,9 +40,14 @@ module vita_tx_control
    localparam IBS_UNDERRUN = 3;
 
    reg [2:0] ibs_state;
+
+   wire      clear_state;
+   setting_reg #(.my_addr(`DSP_CORE_TX_BASE+3)) sr_3
+     (.clk(clk),.rst(rst),.strobe(set_stb),.addr(set_addr),
+      .in(set_data),.out(),.changed(clear_state));
    
    always @(posedge clk)
-     if(reset | clear)
+     if(reset | clear_state)
        ibs_state <= 0;
      else
        case(ibs_state)
-- 
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