From 2b6046fb33e8f1d5f76766ed60d658027c6b45e9 Mon Sep 17 00:00:00 2001 From: Martin Braun Date: Wed, 30 May 2018 15:03:08 -0700 Subject: docs: test procedures: Add FPGAFUNCVERIF-N3x0-v1 --- host/docs/rd_testing.dox | 53 +++++++++++++++++++++++++++++++++++++++++++++++- 1 file changed, 52 insertions(+), 1 deletion(-) diff --git a/host/docs/rd_testing.dox b/host/docs/rd_testing.dox index 6a32130dc..f12244f2f 100644 --- a/host/docs/rd_testing.dox +++ b/host/docs/rd_testing.dox @@ -322,6 +322,8 @@ tbd | FPGAFUNCVERIF-X300-XG-v1 | USRP X300 | 2x UBX | \ref rdtesting_fpgafuncverif_manual | \ref rdtesting_fpgafuncverif_auto | | FPGAFUNCVERIF-E310-SG1-v1 | USRP E310 SG1 | None | \ref rdtesting_fpgafuncverif_manual | \ref rdtesting_fpgafuncverif_auto | | FPGAFUNCVERIF-E310-SG3-v1 | USRP E310 SG3 | None | \ref rdtesting_fpgafuncverif_manual | \ref rdtesting_fpgafuncverif_auto | +| FPGAFUNCVERIF-N310-v1 | USRP N310 | None | \ref rdtesting_fpgafuncverif_manual | \ref rdtesting_fpgafuncverif_auto | +| FPGAFUNCVERIF-N300-v1 | USRP N300 | None | \ref rdtesting_fpgafuncverif_manual | \ref rdtesting_fpgafuncverif_auto | The FPGA functional verification tests exercise the Digital Downconverter (DDC), Digital Upconverter (DUC), and Radio Core RFNoC blocks. @@ -333,7 +335,8 @@ Digital Upconverter (DUC), and Radio Core RFNoC blocks. - HG tests require a single 10 GigE connection, XG requires two for the 2x RX 200 MSPS test - 1 GigE and PCIe adapters and cabling for optional tests -- E310 SG1 & SG3 with SSH access +- E310: SG1 & SG3 with SSH access +- N310: No special requirements \subsection rdtesting_fpgafuncverif_manual FPGA Functional Verification: Manual Test Procedure @@ -427,6 +430,54 @@ Note: On TX tests, initial Us within the first 5 seconds can be ignored and do n | 1x RX & 1x TX | 61.44e6 | 1e6 | 3600 | Use channel 0 | | 2x RX & 2x TX | 30.72e6 | 1e6 | 3600 | | +#### USRP N300/N310: 1 GigE Interface + +- Required images to test: HG +- Note: On TX tests, initial Us within the first 5 seconds can be ignored and do not fail the test + +| Channels | Master Clock Rate | Sample Rates | Duration | Notes | +|---------------|-------------------|-------------------------|----------|-----------------------------------| +| 1x RX | 125e6 | 1.25e6 | 60 | One test each for all 4 channels | +| 1x RX | 122.88e6 | 1.2288e6 | 60 | One test each for all 4 channels | +| 1x RX | 153.6e6 | 1.536e6 | 60 | One test each for all 4 channels | +| 1x TX | 125e6 | 1.25e6 | 60 | One test each for all 4 channels | +| 1x TX | 122.88e6 | 1.2288e6 | 60 | One test each for all 4 channels | +| 1x TX | 153.6e6 | 1.536e6 | 60 | One test each for all 4 channels | +| 2/3/4x RX | 125e6 | 1.25e6 | 60 | 3 tests total | +| 2/3/4x RX | 122.88e6 | 1.2288e6 | 60 | 3 tests total | +| 2/3/4x RX | 153.6e6 | 1.536e6 | 60 | 3 tests total | +| 2/3/4x TX | 125e6 | 1.25e6 | 60 | 3 tests total | +| 2/3/4x TX | 122.88e6 | 1.2288e6 | 60 | 3 tests total | +| 2/3/4x TX | 153.6e6 | 1.536e6 | 60 | 3 tests total | +| 4x RX & 4x TX | 125e6 | 1.25e6 | 60 | Drop to 2 channels for N300 +| 4x RX & 4x TX | 122.88e6 | 1.2288e6 | 60 | Drop to 2 channels for N300 +| 4x RX & 4x TX | 153e6 | 1.536e6 | 60 | Drop to 2 channels for N300 + +#### USRP N300/N310: 10 GigE Interface + +- Required images to test: N310 HG + XG +- Note: On TX tests, initial Us within the first 5 seconds can be ignored and do not fail the test + +| Channels | Master Clock Rate | Sample Rates | Duration | Notes | +|---------------|-------------------|-------------------------|----------|-----------------------------------| +| 1x RX | 125e6 | 1.25e6, 125e6 | 60 | One test each for all 4 channels | +| 1x RX | 122.88e6 | 1.2288e6, 122.88e6 | 60 | One test each for all 4 channels | +| 1x RX | 153.6e6 | 1.536e6, 153.6e6 | 60 | One test each for all 4 channels | +| 2/3/4x RX | 125e6 | 1.25e6 | 60 | 3 tests total | +| 2/3/4x RX | 122.88e6 | 1.2288e6 | 60 | 3 tests total | +| 2/3/4x RX | 153.6e6 | 1.536e6 | 60 | 3 tests total | +| 4x RX | 125e6 | 1.25e6, 62.5e6 | 60 | N310 only +| 4x TX | 125e6 | 1.25e6, 12.5e6 | 60 | N310 only +| 4x RX & 4x TX | 125e6 | 1.25e6, 62.5e6 | 60 | Drop to 2 channels for N300 +| 4x RX & 4x TX | 122.88e6 | 1.2288e6, 61.44e6 | 60 | Drop to 2 channels for N300 +| 4x RX & 4x TX | 153e6 | 1.536e6, 76.8e6 | 60 | Drop to 2 channels for N300 +| 4x RX & 4x TX | 125e6 | 62.5e6 | 3600 | Drop to 2 channels for N300 +| 4x RX & 4x TX | 122.88e6 | 61.44e6 | 3600 | Drop to 2 channels for N300 +| 4x RX & 4x TX | 153e6 | 76.8e6 | 3600 | Drop to 2 channels for N300 +| 4x RX & 4x TX | 125e6 | 125e6 RX, 62.5e6 TX | 60 | Use dual 10GigE, N310 only +| 4x RX & 4x TX | 122.88e6 | 122.88e6 RX, 61.44e6 TX | 60 | Use dual 10GigE, N310 only +| 4x RX & 4x TX | 153e6 | 153e6 RX, 76.8e6 TX | 60 | Use dual 10GigE, N310 only + \subsection rdtesting_fpgafuncverif_auto FPGA Functional Verification: Automatic Test Procedure tbd -- cgit v1.2.3