From 27f5e9151c1621f25948a579c1cf7aa0e156e323 Mon Sep 17 00:00:00 2001 From: Martin Braun Date: Mon, 16 Apr 2018 10:56:28 -0700 Subject: x300: Replace all references to boost::this_thread::sleep() Use std::this_thread::sleep_for() instead. --- host/lib/transport/nirio/niusrprio_session.cpp | 5 ++++- host/lib/usrp/x300/x300_dac_ctrl.cpp | 7 ++++--- host/lib/usrp/x300/x300_fw_ctrl.cpp | 9 +++++---- host/lib/usrp/x300/x300_impl.cpp | 25 +++++++++++++++---------- host/lib/usrp/x300/x300_radio_ctrl_impl.cpp | 18 ++++++++++-------- 5 files changed, 38 insertions(+), 26 deletions(-) diff --git a/host/lib/transport/nirio/niusrprio_session.cpp b/host/lib/transport/nirio/niusrprio_session.cpp index 0cbc31592..797855a11 100644 --- a/host/lib/transport/nirio/niusrprio_session.cpp +++ b/host/lib/transport/nirio/niusrprio_session.cpp @@ -14,6 +14,8 @@ #include #include #include +#include +#include #include namespace { @@ -211,7 +213,8 @@ nirio_status niusrprio_session::_ensure_fpga_ready() //there is a small chance that the server is still finishing up cleaning up //the DMA FIFOs. We currently don't have any feedback from the driver regarding //this state so just wait. - boost::this_thread::sleep(boost::posix_time::milliseconds(FPGA_READY_TIMEOUT_IN_MS)); + std::this_thread::sleep_for( + std::chrono::milliseconds(FPGA_READY_TIMEOUT_IN_MS)); //Disable all FIFOs in the FPGA for (size_t i = 0; i < _lvbitx->get_input_fifo_count(); i++) { diff --git a/host/lib/usrp/x300/x300_dac_ctrl.cpp b/host/lib/usrp/x300/x300_dac_ctrl.cpp index c200a696a..d7b3892fd 100644 --- a/host/lib/usrp/x300/x300_dac_ctrl.cpp +++ b/host/lib/usrp/x300/x300_dac_ctrl.cpp @@ -13,7 +13,8 @@ #include #include #include -#include //sleep +#include +#include #define X300_DAC_FRONTEND_SYNC_FAILURE_FATAL @@ -219,7 +220,7 @@ public: throw uhd::runtime_error("x300_dac_ctrl: timeout waiting for DAC PLL to lock"); if (reg_6 & (1 << 7)) // Lock lost? write_ad9146_reg(0x06, 0xC0); // Clear PLL event flags - boost::this_thread::sleep(boost::posix_time::milliseconds(10)); + std::this_thread::sleep_for(std::chrono::milliseconds(10)); } } @@ -235,7 +236,7 @@ public: const time_spec_t exit_time = uhd::get_system_time() + time_spec_t(1.0); while (true) { - boost::this_thread::sleep(boost::posix_time::milliseconds(1)); // wait for sync to complete + std::this_thread::sleep_for(std::chrono::milliseconds(1)); // wait for sync to complete const size_t reg_12 = read_ad9146_reg(0x12); // Sync Status (Expect bit 7 = 0, bit 6 = 1) const size_t reg_6 = read_ad9146_reg(0x06); // Event Flags (Expect bit 5 = 0 and bit 4 = 1) if ((((reg_12 >> 6) & 0x3) == 0x1) && (((reg_6 >> 4) & 0x3) == 0x1)) diff --git a/host/lib/usrp/x300/x300_fw_ctrl.cpp b/host/lib/usrp/x300/x300_fw_ctrl.cpp index dd2e299bb..21c64b509 100644 --- a/host/lib/usrp/x300/x300_fw_ctrl.cpp +++ b/host/lib/usrp/x300/x300_fw_ctrl.cpp @@ -17,7 +17,8 @@ #include #include "x300_regs.hpp" #include -#include +#include +#include using namespace uhd; using namespace uhd::niusrprio; @@ -210,7 +211,7 @@ public: boost::posix_time::time_duration elapsed; do { - boost::this_thread::sleep(boost::posix_time::microsec(500)); //Avoid flooding the bus + std::this_thread::sleep_for(std::chrono::microseconds(500)); //Avoid flooding the bus elapsed = boost::posix_time::microsec_clock::local_time() - start_time; nirio_status_chain(_drv_proxy->peek(PCIE_ZPU_STATUS_REG(0), reg_data), status); } while ( @@ -238,7 +239,7 @@ protected: nirio_status_chain(_drv_proxy->poke(PCIE_ZPU_DATA_REG(addr), data), status); if (nirio_status_not_fatal(status)) { do { - boost::this_thread::sleep(boost::posix_time::microsec(50)); //Avoid flooding the bus + std::this_thread::sleep_for(std::chrono::microseconds(50)); //Avoid flooding the bus elapsed = boost::posix_time::microsec_clock::local_time() - start_time; nirio_status_chain(_drv_proxy->peek(PCIE_ZPU_STATUS_REG(addr), reg_data), status); } while ( @@ -263,7 +264,7 @@ protected: nirio_status_chain(_drv_proxy->poke(PCIE_ZPU_READ_REG(addr), PCIE_ZPU_READ_START), status); if (nirio_status_not_fatal(status)) { do { - boost::this_thread::sleep(boost::posix_time::microsec(50)); //Avoid flooding the bus + std::this_thread::sleep_for(std::chrono::microseconds(50)); //Avoid flooding the bus elapsed = boost::posix_time::microsec_clock::local_time() - start_time; nirio_status_chain(_drv_proxy->peek(PCIE_ZPU_STATUS_REG(addr), reg_data), status); } while ( diff --git a/host/lib/usrp/x300/x300_impl.cpp b/host/lib/usrp/x300/x300_impl.cpp index d74aad806..15d996955 100644 --- a/host/lib/usrp/x300/x300_impl.cpp +++ b/host/lib/usrp/x300/x300_impl.cpp @@ -32,6 +32,8 @@ #include #include #include +#include +#include #define NIUSRPRIO_DEFAULT_RPC_PORT "5444" @@ -391,7 +393,7 @@ static void x300_load_fw(wb_iface::sptr fw_reg_ctrl, const std::string &file_nam } //Wait for fimrware to reboot. 3s is an upper bound - boost::this_thread::sleep(boost::posix_time::milliseconds(3000)); + std::this_thread::sleep_for(std::chrono::milliseconds(3000)); UHD_LOGGER_INFO("X300") << "Firmware loaded!" ; } @@ -1530,12 +1532,15 @@ void x300_impl::sync_times(mboard_members_t &mb, const uhd::time_spec_t& t) bool x300_impl::wait_for_clk_locked(mboard_members_t& mb, uint32_t which, double timeout) { - boost::system_time timeout_time = boost::get_system_time() + boost::posix_time::milliseconds(timeout * 1000.0); + const auto timeout_time = + std::chrono::steady_clock::now() + + std::chrono::milliseconds(int64_t(timeout * 1000)); do { - if (mb.fw_regmap->clock_status_reg.read(which)==1) + if (mb.fw_regmap->clock_status_reg.read(which) == 1) { return true; - boost::this_thread::sleep(boost::posix_time::milliseconds(1)); - } while (boost::get_system_time() < timeout_time); + } + std::this_thread::sleep_for(std::chrono::milliseconds(1)); + } while (std::chrono::steady_clock::now() < timeout_time); //Check one last time return (mb.fw_regmap->clock_status_reg.read(which)==1); @@ -1557,7 +1562,7 @@ bool x300_impl::is_pps_present(mboard_members_t& mb) uint32_t pps_detect = mb.fw_regmap->clock_status_reg.read(fw_regmap_t::clk_status_reg_t::PPS_DETECT); for (int i = 0; i < 15; i++) { - boost::this_thread::sleep(boost::posix_time::milliseconds(100)); + std::this_thread::sleep_for(std::chrono::milliseconds(100)); if (pps_detect != mb.fw_regmap->clock_status_reg.read(fw_regmap_t::clk_status_reg_t::PPS_DETECT)) return true; } @@ -1571,7 +1576,7 @@ bool x300_impl::is_pps_present(mboard_members_t& mb) void x300_impl::claimer_loop(wb_iface::sptr iface) { claim(iface); - boost::this_thread::sleep(boost::posix_time::milliseconds(1000)); //1 second + std::this_thread::sleep_for(std::chrono::seconds(1)); } x300_impl::claim_status_t x300_impl::claim_status(wb_iface::sptr iface) @@ -1595,7 +1600,7 @@ x300_impl::claim_status_t x300_impl::claim_status(wb_iface::sptr iface) // be in the process of being released. This is possible because // older firmware takes a long time to update the status. Wait and // check status again. - boost::this_thread::sleep(boost::posix_time::milliseconds(5)); + std::this_thread::sleep_for(std::chrono::milliseconds(5)); continue; } claim_status = (hash == get_process_hash() ? CLAIMED_BY_US : CLAIMED_BY_OTHER); @@ -1620,7 +1625,7 @@ bool x300_impl::try_to_claim(wb_iface::sptr iface, long timeout) { claim(iface); // It takes the claimer 10ms to update status, so wait 20ms before verifying claim - boost::this_thread::sleep(boost::posix_time::milliseconds(20)); + std::this_thread::sleep_for(std::chrono::milliseconds(20)); continue; } if (status == CLAIMED_BY_US) @@ -1632,7 +1637,7 @@ bool x300_impl::try_to_claim(wb_iface::sptr iface, long timeout) // Another process owns the device - give up return false; } - boost::this_thread::sleep(boost::posix_time::milliseconds(100)); + std::this_thread::sleep_for(std::chrono::milliseconds(100)); } return true; } diff --git a/host/lib/usrp/x300/x300_radio_ctrl_impl.cpp b/host/lib/usrp/x300/x300_radio_ctrl_impl.cpp index af91fd1ad..524480dc6 100644 --- a/host/lib/usrp/x300/x300_radio_ctrl_impl.cpp +++ b/host/lib/usrp/x300/x300_radio_ctrl_impl.cpp @@ -19,6 +19,8 @@ #include #include #include +#include +#include using namespace uhd; using namespace uhd::usrp; @@ -804,10 +806,10 @@ void x300_radio_ctrl_impl::self_test_adc(uint32_t ramp_time_ms) _adc->set_test_word("ramp", "ramp"); _regs->misc_outs_reg.write(radio_regmap_t::misc_outs_reg_t::ADC_CHECKER_ENABLED, 0); //Sleep added for SPI transactions to finish and ramp to start before checker is enabled. - boost::this_thread::sleep(boost::posix_time::microsec(1000)); + std::this_thread::sleep_for(std::chrono::microseconds(1000)); _regs->misc_outs_reg.write(radio_regmap_t::misc_outs_reg_t::ADC_CHECKER_ENABLED, 1); - boost::this_thread::sleep(boost::posix_time::milliseconds(ramp_time_ms)); + std::this_thread::sleep_for(std::chrono::milliseconds(ramp_time_ms)); _regs->misc_ins_reg.refresh(); std::string i_status, q_status; @@ -981,7 +983,7 @@ double x300_radio_ctrl_impl::self_cal_adc_xfer_delay( radios[r]->_regs->misc_outs_reg.write(radio_regmap_t::misc_outs_reg_t::ADC_CHECKER_ENABLED, 0); radios[r]->_regs->misc_outs_reg.write(radio_regmap_t::misc_outs_reg_t::ADC_CHECKER_ENABLED, 1); //50ms @ 200MHz = 10 million samples - boost::this_thread::sleep(boost::posix_time::milliseconds(50)); + std::this_thread::sleep_for(std::chrono::milliseconds(50)); if (radios[r]->_regs->misc_ins_reg.read(radio_regmap_t::misc_ins_reg_t::ADC_CHECKER1_I_LOCKED)) { err_code += radios[r]->_regs->misc_ins_reg.get(radio_regmap_t::misc_ins_reg_t::ADC_CHECKER1_I_ERROR); } else { @@ -996,7 +998,7 @@ double x300_radio_ctrl_impl::self_cal_adc_xfer_delay( radios[r]->_regs->misc_outs_reg.write(radio_regmap_t::misc_outs_reg_t::ADC_CHECKER_ENABLED, 0); radios[r]->_regs->misc_outs_reg.write(radio_regmap_t::misc_outs_reg_t::ADC_CHECKER_ENABLED, 1); //50ms @ 200MHz = 10 million samples - boost::this_thread::sleep(boost::posix_time::milliseconds(50)); + std::this_thread::sleep_for(std::chrono::milliseconds(50)); if (radios[r]->_regs->misc_ins_reg.read(radio_regmap_t::misc_ins_reg_t::ADC_CHECKER1_Q_LOCKED)) { err_code += radios[r]->_regs->misc_ins_reg.get(radio_regmap_t::misc_ins_reg_t::ADC_CHECKER1_Q_ERROR); } else { @@ -1121,7 +1123,7 @@ void x300_radio_ctrl_impl::_self_cal_adc_capture_delay(bool print_status) _regs->misc_outs_reg.write(radio_regmap_t::misc_outs_reg_t::ADC_CHECKER_ENABLED, 0); _regs->misc_outs_reg.write(radio_regmap_t::misc_outs_reg_t::ADC_CHECKER_ENABLED, 1); //5ms @ 200MHz = 1 million samples - boost::this_thread::sleep(boost::posix_time::milliseconds(5)); + std::this_thread::sleep_for(std::chrono::milliseconds(5)); if (_regs->misc_ins_reg.read(radio_regmap_t::misc_ins_reg_t::ADC_CHECKER0_I_LOCKED)) { err_code += _regs->misc_ins_reg.get(radio_regmap_t::misc_ins_reg_t::ADC_CHECKER0_I_ERROR); } else { @@ -1136,7 +1138,7 @@ void x300_radio_ctrl_impl::_self_cal_adc_capture_delay(bool print_status) _regs->misc_outs_reg.write(radio_regmap_t::misc_outs_reg_t::ADC_CHECKER_ENABLED, 0); _regs->misc_outs_reg.write(radio_regmap_t::misc_outs_reg_t::ADC_CHECKER_ENABLED, 1); //5ms @ 200MHz = 1 million samples - boost::this_thread::sleep(boost::posix_time::milliseconds(5)); + std::this_thread::sleep_for(std::chrono::milliseconds(5)); if (_regs->misc_ins_reg.read(radio_regmap_t::misc_ins_reg_t::ADC_CHECKER0_Q_LOCKED)) { err_code += _regs->misc_ins_reg.get(radio_regmap_t::misc_ins_reg_t::ADC_CHECKER0_Q_ERROR); } else { @@ -1166,7 +1168,7 @@ void x300_radio_ctrl_impl::_self_cal_adc_capture_delay(bool print_status) if ((win_start == -1 || (win_stop - win_start) < MIN_WINDOW_LEN) && iter < NUM_RETRIES /*not last iteration*/) { win_start = -1; win_stop = -1; - boost::this_thread::sleep(boost::posix_time::milliseconds(2000)); + std::this_thread::sleep_for(std::chrono::milliseconds(2000)); } else { break; } @@ -1198,7 +1200,7 @@ void x300_radio_ctrl_impl::_check_adc(const uint32_t val) //Wait for previous control transaction to flush user_reg_read64(regs::RB_TEST); //Wait for ADC test pattern to propagate - boost::this_thread::sleep(boost::posix_time::microsec(5)); + std::this_thread::sleep_for(std::chrono::microseconds(5)); //Read value of RX readback register and verify uint32_t adc_rb = static_cast(user_reg_read64(regs::RB_TEST)>>32); adc_rb ^= 0xfffc0000; //adapt for I inversion in FPGA -- cgit v1.2.3