From 226ca69c6c2c230fd0f1f398d9176d28522b7b59 Mon Sep 17 00:00:00 2001
From: Matt Ettus <matt@ettus.com>
Date: Wed, 16 Mar 2011 16:50:33 -0700
Subject: u1e: use icarus verilog for lint

---
 usrp2/top/u1e/core_compile | 2 ++
 1 file changed, 2 insertions(+)
 create mode 100755 usrp2/top/u1e/core_compile

diff --git a/usrp2/top/u1e/core_compile b/usrp2/top/u1e/core_compile
new file mode 100755
index 000000000..fb1b2a854
--- /dev/null
+++ b/usrp2/top/u1e/core_compile
@@ -0,0 +1,2 @@
+iverilog -Wall -y. -y ../../control_lib/ -y ../../fifo/ -y ../../gpmc/ -y ../../models/ -y ../../sdr_lib/ -y ../../coregen/ -y ../../vrt/ -y ../../opencores/i2c/rtl/verilog/ -y ../../opencores/spi/rtl/verilog/ -y ../../timing/ -y ../../opencores/8b10b/ -I ../../opencores/spi/rtl/verilog/ -I ../../opencores/i2c/rtl/verilog/ -y ../../simple_gemac u1e_core.v  2>&1  
+
-- 
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