From 1f77494788fa4fa8450aaf170055553bd0e5fe8e Mon Sep 17 00:00:00 2001 From: Matt Ettus Date: Fri, 24 Sep 2010 14:37:15 -0700 Subject: allow for CS to rise before, at the same time, or after OE --- usrp2/gpmc/fifo_to_gpmc_async.v | 13 ++++++------- 1 file changed, 6 insertions(+), 7 deletions(-) diff --git a/usrp2/gpmc/fifo_to_gpmc_async.v b/usrp2/gpmc/fifo_to_gpmc_async.v index 5ac8b19bd..cf8b6e861 100644 --- a/usrp2/gpmc/fifo_to_gpmc_async.v +++ b/usrp2/gpmc/fifo_to_gpmc_async.v @@ -11,23 +11,22 @@ module fifo_to_gpmc_async input [15:0] frame_len); // Synchronize the async control signals - reg [1:0] cs_del, oe_del; + reg [2:0] cs_del, oe_del; reg [15:0] counter; always @(posedge clk) if(reset) begin - cs_del <= 2'b11; - oe_del <= 2'b11; + cs_del <= 3'b11; + oe_del <= 3'b11; end else begin - cs_del <= { cs_del[0], EM_NCS }; - oe_del <= { oe_del[0], EM_NOE }; + cs_del <= { cs_del[1:0], EM_NCS }; + oe_del <= { oe_del[1:0], EM_NOE }; end - //wire do_read = (~cs_del[0] & (oe_del == 2'b10)); - wire do_read = (~cs_del[1] & (oe_del == 2'b01)); // change output on trailing edge + wire do_read = ( (~cs_del[1] | ~cs_del[2]) & (oe_del[1:0] == 2'b01)); // change output on trailing edge wire first_read = (counter == 0); wire last_read = ((counter+1) == frame_len); -- cgit v1.2.3