From 0c44559d10f47c46ba485f39627c3890eca5639d Mon Sep 17 00:00:00 2001
From: Matt Ettus <matt@ettus.com>
Date: Thu, 14 Jan 2010 17:29:28 -0800
Subject: debug state
---
simple_gemac/simple_gemac.v | 7 +++++--
simple_gemac/simple_gemac_rx.v | 5 ++++-
simple_gemac/simple_gemac_wrapper19.v | 5 +++--
3 files changed, 12 insertions(+), 5 deletions(-)
diff --git a/simple_gemac/simple_gemac.v b/simple_gemac/simple_gemac.v
index e7f327358..2dd8deb99 100644
--- a/simple_gemac/simple_gemac.v
+++ b/simple_gemac/simple_gemac.v
@@ -16,7 +16,9 @@ module simple_gemac
output rx_clk, output [7:0] rx_data, output rx_valid, output rx_error, output rx_ack,
// TX Client Interface
- output tx_clk, input [7:0] tx_data, input tx_valid, input tx_error, output tx_ack
+ output tx_clk, input [7:0] tx_data, input tx_valid, input tx_error, output tx_ack,
+
+ output [31:0] debug
);
localparam SGE_IFG = 8'd12; // 12 should be the absolute minimum
@@ -46,7 +48,8 @@ module simple_gemac
.ucast_addr(ucast_addr), .mcast_addr(mcast_addr),
.pass_ucast(pass_ucast), .pass_mcast(pass_mcast), .pass_bcast(pass_bcast),
.pass_pause(pass_pause), .pass_all(pass_all),
- .pause_quanta_rcvd(pause_quanta_rcvd), .pause_rcvd(pause_rcvd)
+ .pause_quanta_rcvd(pause_quanta_rcvd), .pause_rcvd(pause_rcvd),
+ .debug(debug)
);
flow_ctrl_tx flow_ctrl_tx
diff --git a/simple_gemac/simple_gemac_rx.v b/simple_gemac/simple_gemac_rx.v
index 45ddd6dfa..b02bb0758 100644
--- a/simple_gemac/simple_gemac_rx.v
+++ b/simple_gemac/simple_gemac_rx.v
@@ -6,7 +6,8 @@ module simple_gemac_rx
output rx_clk, output [7:0] rx_data, output reg rx_valid, output rx_error, output reg rx_ack,
input [47:0] ucast_addr, input [47:0] mcast_addr,
input pass_ucast, input pass_mcast, input pass_bcast, input pass_pause, input pass_all,
- output reg [15:0] pause_quanta_rcvd, output pause_rcvd );
+ output reg [15:0] pause_quanta_rcvd, output pause_rcvd,
+ output [31:0] debug );
localparam RX_IDLE = 0;
localparam RX_PREAMBLE = 1;
@@ -170,5 +171,7 @@ module simple_gemac_rx
pause_quanta_rcvd[7:0] <= rxd_d1;
assign rx_clk = GMII_RX_CLK;
+
+ assign debug = rx_state;
endmodule // simple_gemac_rx
diff --git a/simple_gemac/simple_gemac_wrapper19.v b/simple_gemac/simple_gemac_wrapper19.v
index 14ebd4ab3..2becd6aa1 100644
--- a/simple_gemac/simple_gemac_wrapper19.v
+++ b/simple_gemac/simple_gemac_wrapper19.v
@@ -49,7 +49,8 @@ module simple_gemac_wrapper19
.rx_clk(rx_clk), .rx_data(rx_data),
.rx_valid(rx_valid), .rx_error(rx_error), .rx_ack(rx_ack),
.tx_clk(tx_clk), .tx_data(tx_data),
- .tx_valid(tx_valid), .tx_error(tx_error), .tx_ack(tx_ack)
+ .tx_valid(tx_valid), .tx_error(tx_error), .tx_ack(tx_ack),
+ .debug(debug_state)
);
simple_gemac_wb simple_gemac_wb
@@ -155,7 +156,7 @@ module simple_gemac_wrapper19
tx_ll_sof2, tx_ll_eof2, tx_ll_src_rdy2, tx_ll_dst_rdy2 },
{ tx_valid, tx_error, tx_ack, tx_f19_src_rdy_int1, tx_f19_dst_rdy_int1, tx_f19_data_int1[18:16]},
{ tx_data} };
- assign debug_rx = { { rx_ll_data },
+ assign debug_rx = { { rx_f19_src_rdy, rx_f19_dst_rdy, debug_state[5:0] },
{ rx_ll_sof, rx_ll_eof, rx_ll_src_rdy, rx_ll_dst_rdy,
rx_ll_sof2, rx_ll_eof2, rx_ll_src_rdy2, rx_ll_dst_rdy2 },
{ rx_valid, rx_error, rx_ack, rx_f19_src_rdy_int1, rx_f19_dst_rdy_int1, rx_f19_data_int1[18:16]},
--
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