uhd - Ettus' UHD Repository

	Commit message (Expand)	Author	Age	Files	Lines
*	dsp_core_tx now has setting reg base settable from u2_core. underrun bug in ...	Matt Ettus	2009-12-14	1	-1/+1
*	reorder the memory map	Matt Ettus	2009-12-11	2	-2/+2
*	put new setting reg into the address space in the right place	Matt Ettus	2009-12-11	1	-1/+1
*	only pull from input fifo when really consuming or pushing into the next fifo	Matt Ettus	2009-12-11	1	-1/+1
*	Add ability to clear state out when there is an underrun	Matt Ettus	2009-12-11	1	-1/+6
*	fixed typo in u2_core.v resulting in unconnected net. added debug pins	Matt Ettus	2009-12-11	2	-3/+16
*	ignore save files	Matt Ettus	2009-12-09	1	-0/+1
*	First cut at vita tx, whole thing compiles	Matt Ettus	2009-12-09	1	-0/+1
*	very basic packet sending works	Matt Ettus	2009-12-09	2	-140/+50
*	seems to correctly deframe packets. now need to consume them.	Matt Ettus	2009-12-08	1	-12/+23
*	progress on vita_tx. it compiles now, need to work on vita_tx_control.	Matt Ettus	2009-12-08	3	-239/+182
*	make the testbench work in this environment, without the crossclock settings bus	Matt Ettus	2009-12-08	3	-5/+8
*	be a little more PC about it	Matt Ettus	2009-11-18	1	-5/+9
*	mostly just copied over from the rx side. Still needs a lot of work.	Matt Ettus	2009-11-18	3	-13/+221
*	VITA49 rx (and tx skeleton) copied over from quad radio	Matt Ettus	2009-11-05	7	-0/+1026