| Commit message (Collapse) | Author | Age | Files | Lines |
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udp_wrapper in top level with some fifo conversion stuff
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module
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packet router to be muxed to com out
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inspector check
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in crossbar input)
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cpu, dsp, crs
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muxed into the comm output
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offset
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muxes (in and out)
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serdes)
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logic does not enable it yet)
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place)
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generates its own flow control packets now.
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reset to make sure it is in the correct clock domain.
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style fifo in rx.
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