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* dsp rework: finished engine HEADER_OFFSET stuff, add post_engine_bufferingJosh Blum2012-01-302-8/+13
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* dsp rework: work on 8 to 16 engine (usrp2 ok)Josh Blum2012-01-302-25/+26
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* dsp_engine: work with transport headerMatt Ettus2012-01-301-16/+14
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* dsp rework: integrated dspengine_8to16, some tweaksJosh Blum2012-01-303-8/+8
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* dsp: 8 to 16 bit conversion for tx side. believed to be functionalMatt Ettus2012-01-292-12/+230
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* dsp rework: increase the number of effective bits in the duc scale factorJosh Blum2012-01-281-1/+1
| | | | This will be useful for effecting the dynamic range of the sc8 tx mode.
* dsp rework: added double buffer interface to vita txJosh Blum2012-01-285-12/+41
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* dsp rework: moved scale and round into ddc chainJosh Blum2012-01-287-41/+49
| | | | 16to8 engine now performs only a clip from 16->8
* dsp rework: top level fixes B100/E100Josh Blum2012-01-274-8/+9
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* dsp rework: integrated custom dsp module shellsJosh Blum2012-01-2718-38/+370
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* dsp rework: implemented dsp changes for other top levelsJosh Blum2012-01-2710-106/+203
| | | | added user registers into each toplevel (not used yet)
* dsp rework: renamed dsp signals for frontend IOJosh Blum2012-01-275-32/+35
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* dsp rework: u2_core test implementationJosh Blum2012-01-2613-446/+49
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* n2xx: updated bootloader to latest build in uhd masterJosh Blum2012-01-111-377/+377
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* usrp2/nseries: restored clock/serdes readbackJosh Blum2011-11-232-4/+4
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* need more umph out of correction valuesJosh Blum2011-11-106-8/+8
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* remove unused irq to meet timingJosh Blum2011-11-052-21/+7
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* convenience makefiles for top level projectsJosh Blum2011-11-052-0/+31
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* increase vita rx fifosize to 10, like USRP2, make things workJosh Blum2011-11-042-4/+4
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* dsp: remove dsp_buffer and replace with simpler add_routing_header,Matt Ettus2011-11-043-3/+50
| | | | other funcs of dsp_buffer are done by double_buffer and dsp_engine
* dsp: remove warningsMatt Ettus2011-11-042-4/+6
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* u1e: fix unattached nets from copy-paste errorMatt Ettus2011-11-041-3/+3
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* b100: fix warnings, complete removal of test codeMatt Ettus2011-11-042-16/+7
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* b100: remove test features from GPIF to save spaceMatt Ettus2011-11-042-82/+9
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* u1e/u1p: GPIOs switched over to setting regsMatt Ettus2011-10-272-32/+45
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* forgot to add gpio atr to makefile source listJosh Blum2011-10-261-0/+1
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* 32 bit compat number for E and B seriesJosh Blum2011-10-262-10/+8
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* u1e/u1p: removed led setting regMatt Ettus2011-10-262-14/+4
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* u1p/u1e: partially redone atr and gpio redoMatt Ettus2011-10-262-33/+11
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* u2/u2p: use new setting_reg based gpios, gets it off of wbMatt Ettus2011-10-263-17/+98
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* u1e/u1p: remove unused UARTMatt Ettus2011-10-262-24/+0
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* u2/u2p: move nearly all setting regs onto dsp_clkMatt Ettus2011-10-262-30/+37
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* u2/u2p: remove dead comments and codeMatt Ettus2011-10-262-84/+16
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* dsp: make rounding a single bit work againMatt Ettus2011-10-261-5/+13
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* dsp: new rounding. more complex, but better propertiesMatt Ettus2011-10-262-3/+80
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* dsp_engine: don't use SD rounding in 8 bit mode, so we can have a flat noise ↵Matt Ettus2011-10-262-4/+5
| | | | floor.
* dsp_engine: trailer change to fit standardMatt Ettus2011-10-261-2/+2
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* dsp_engine fix rst -> reset, default to read addressMatt Ettus2011-10-262-3/+3
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* dspengine: move the register to VITA_RX_CTRL + 9 instead of + 3 which is ↵Matt Ettus2011-10-261-1/+1
| | | | occupied
* dspengine: insert into the rx chainMatt Ettus2011-10-264-2/+29
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* dsp_engine: new way of doing DSP operations on VITA packets. Example does ↵Matt Ettus2011-10-267-3/+899
| | | | 16 to 8 bit conversion
* dsp: ability to set rx dc offset to a fixed valueMatt Ettus2011-10-261-1/+2
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* usrp2: fix typo in top level core filesJosh Blum2011-10-262-2/+2
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* connect and map b100 and e100 front-panel ledsJosh Blum2011-10-112-2/+2
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* E100: GPSDO serial port level conversionNick Foster2011-09-282-2/+9
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* B100: use gpif_misc on R2 hw, invert direction of gpif_misc pinsNick Foster2011-09-191-2/+2
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* u1e,u1p: turn off debug pins, misc cleanupsMatt Ettus2011-09-082-26/+10
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* u1p: proper format in ucf fileMatt Ettus2011-09-085-4/+474
| | | | u1p: build separate u1plus (prototypes) and B100 (release)
* u1e: relax GPMC constraints, eases P&RMatt Ettus2011-09-021-10/+10
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* u1e: separate build for E100 and E110, just a different FPGAMatt Ettus2011-09-012-1/+102
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