uhd - Ettus' UHD Repository

	Commit message (Collapse)	Author	Age	Files	Lines
*	u1e: relax GPMC constraints, eases P&R	Matt Ettus	2011-09-02	1	-10/+10
\|
*	u1e: separate build for E100 and E110, just a different FPGA	Matt Ettus	2011-09-01	2	-1/+102
\|
*	e100: squashed work on bus implementation on GPMC	Josh Blum	2011-08-29	22	-984/+545
\|
*	fix warning on dat_o in atr_controller16.v	Josh Blum	2011-08-29	1	-3/+2
\|
*	fpga: minor tweaks to build system	Josh Blum	2011-08-26	2	-2/+4
\|
*	fix typo	Matt Ettus	2011-08-26	1	-21/+21
\|
*	all: tie unused ram inputs to 1 instead of zero, helps routing	Matt Ettus	2011-08-26	2	-22/+22
\|
*	b100: gpif_rst resynced to gpif_clk	Matt Ettus	2011-08-26	1	-1/+1
\|
*	dsp: slow down the time constant of the DC offset correction by a factor of ↵	Matt Ettus	2011-08-26	1	-1/+1
\| \| \| \|	16. it may need to be even slower.
*	usrp2: reconnect frontend calibration, timing meets	Josh Blum	2011-08-26	5	-6/+6
\|
*	e100: continuation of the atr fix to get e100 to build	Josh Blum	2011-08-15	1	-2/+2
\|
*	usrp2: bump FPGA minor number to 2 for patch release	Josh Blum	2011-08-15	2	-2/+2
\|
*	connect unused BRAM inputs to 1s to save routing logic	Josh Blum	2011-08-15	1	-1/+1
\|
*	dsp: clear cic_decim when not enabled	Matt Ettus	2011-08-15	1	-4/+4
\|
*	N2x0: print constraints summary from makefile	Josh Blum	2011-08-15	1	-0/+1
\|
*	N2x0: added a Makefile to build all N2x0 projects (make -j4)	Josh Blum	2011-08-15	1	-0/+22
\|
*	N2x0: delay ADC A inversion so A and B are latched in the same	Josh Blum	2011-08-15	1	-3/+5
\|
*	B100/E100: fix ATR RX mode pins not connected	Nick Foster	2011-08-10	2	-4/+4
\|
*	time: register time output to help fpga timing	Matt Ettus	2011-07-28	1	-2/+5
\|
*	vrt: delay the late signal to help with timing	Matt Ettus	2011-07-28	1	-5/+20
\|
*	dsp: allow tx iq balance to be removed at compile time	Matt Ettus	2011-07-28	1	-23/+38
\|
*	dsp: option to remove iq compensation at compile time	Matt Ettus	2011-07-28	1	-35/+40
\|
*	time64: reverted mimo sync changes to time64	Josh Blum	2011-07-28	1	-3/+1
\|
*	u2/u2p: speed up time_64, and remove readbacks on simple_gemac wb regs	Matt Ettus	2011-07-28	2	-11/+13
\|
*	simple_gemac: remove old 19-bit wide wrapper	Matt Ettus	2011-07-28	4	-402/+0
\|
*	usrp2: remove old unused readback mux value	Josh Blum	2011-07-28	2	-2/+2
\|
*	usrp2: bump minor version number for changes	Josh Blum	2011-07-28	2	-2/+2
\|
*	vita_rx_ctrl: use an extra cmd bit to signal stop	Josh Blum	2011-07-28	1	-7/+7
\|
*	usrp2: fixed swapped tx/rx signals for nsgpio	Josh Blum	2011-07-28	2	-2/+2
\|
*	simple_gemac: add parameter to allow disabling rx flow control at compile time	Matt Ettus	2011-07-27	1	-6/+10
\|
*	u2/u2p: apply atr/gpio changes to u2p	Matt Ettus	2011-07-27	2	-14/+7
\|
*	atr: forgot to delete this line	Matt Ettus	2011-07-27	1	-1/+0
\|
*	u2: redo the atr gpio pins, remove some old cruft	Matt Ettus	2011-07-27	2	-52/+48
\|
*	u2p: finish copying over serdes light fix	Matt Ettus	2011-07-22	1	-2/+1
\|
*	u2/u2p: further qualify the serdes link light	Matt Ettus	2011-07-21	3	-7/+13
\|
*	usrp2: split inspection logic into each relevant cycle	Josh Blum	2011-07-19	1	-11/+35
\|
*	appease the ISE gods	Matt Ettus	2011-07-19	5	-2/+5
\|
*	removed wb readback of ATR, allowing it to be synthesized as luts	Matt Ettus	2011-07-19	2	-4/+10
\|
*	N200: detailed map report allows you to see what takes up too much space	Matt Ettus	2011-07-19	4	-0/+4
\|
*	dsp: reduce bitwidth to help timing	Matt Ettus	2011-07-19	1	-4/+6
\|
*	fpga: print timing report after generate bin file	Josh Blum	2011-07-19	2	-1/+34
\|
*	dsp: reset the interpolator when the rate changes, to prevent oscillation	Matt Ettus	2011-07-19	1	-7/+8
\|
*	b100: fix for fpga syntax error on xfer_rate	Josh Blum	2011-07-19	1	-1/+1
\|
*	Merge branch 'b100_shrink' into new_work	Josh Blum	2011-07-19	29	-718/+967
\|\
\| *	usrp2: split compat number into major/minor (increment minor for fixes)	Josh Blum	2011-07-03	2	-2/+2
\| \|
\| *	e100: proc_int should be high when interrupted	Josh Blum	2011-06-20	1	-3/+1
\| \|
\| *	e100: added proc_int and buffer for async messages	Josh Blum	2011-06-19	2	-17/+49
\| \| \| \| \| \| \| \| \| \| \| \| \| \| \| \|	Redirected the tx_err stream into a buffer_int2, and connected interrupt when a packet is written. The proc_int is muxed into the aux spi miso to use when its not being selected for spi.
\| *	u1p: remove uart and bus testing to fit easier	Matt Ettus	2011-06-16	1	-8/+9
\| \|
\| *	u1p: remove unused ports	Matt Ettus	2011-06-16	1	-1/+0
\| \|
\| *	u1e: core compile now works as a fullchip lint	Matt Ettus	2011-06-16	1	-1/+1
\| \|