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* Merge branch 'ise12' into u1eMatt Ettus2010-07-199-45/+163
|\ | | | | | | | | | | | | | | | | | | | | | | * ise12: move declaration ahead of use put run_tx and run_rx on the displayed LEDs remove warnings add mux and demux to build mux multiple fifo streams into one. Allows priority or round robin split fifo into 2 streams based on first line in each packet precompute udp checksums barely fails timing on gigE/10 and gigE/12, larger fail on udp/10, but all seem to work ok
| * move declaration ahead of useMatt Ettus2010-07-191-5/+5
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| * put run_tx and run_rx on the displayed LEDsMatt Ettus2010-07-191-3/+4
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| * remove warningsMatt Ettus2010-07-162-3/+3
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| * add mux and demux to buildMatt Ettus2010-07-151-0/+2
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| * mux multiple fifo streams into one. Allows priority or round robinMatt Ettus2010-07-151-0/+57
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| * split fifo into 2 streams based on first line in each packetMatt Ettus2010-07-151-0/+50
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| * Merge branch 'reload' into ise12Matt Ettus2010-07-154-22/+59
| |\ | | | | | | | | | | | | | | | | | | | | | * reload: fix to stop endless error packets updated tests to match new features error packets are now valid Extension Context packets error packets don't have a trailer any more streamid is now optional on data packets, set by header register trailer now has a bit to indicate successful End-of-burst hard-coded some header bits to correct values to ensure valid packets reload bit for vita rx ctrl
| * \ Merge branch 'master' into ise12Matt Ettus2010-07-121-4/+5
| |\ \ | | | | | | | | | | | | | | | | * master: fix bug which caused serdes fifo to disappear
| * \ \ Merge branch 'master' into ise12Matt Ettus2010-06-181-1/+2
| |\ \ \ | | | | | | | | | | | | | | | | | | | | * master: proper dependency tracking for the makefile
| * | | | precompute udp checksumsMatt Ettus2010-06-151-5/+14
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| * | | | barely fails timing on gigE/10 and gigE/12, larger fail on udp/10, but allMatt Ettus2010-06-147-275/+390
| | | | | | | | | | | | | | | | | | | | seem to work ok
* | | | | make loopback compileMatt Ettus2010-07-141-0/+3
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* | | | | Merge branch 'reload' into u1eMatt Ettus2010-07-092-5/+10
|\ \ \ \ \ | | |_|_|/ | |/| | | | | | | | | | | | | | | | | | * reload: fix to stop endless error packets updated tests to match new features
| * | | | fix to stop endless error packetsMatt Ettus2010-07-091-2/+2
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| * | | | updated tests to match new featuresMatt Ettus2010-07-092-4/+9
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* | | | | point to new location for fifosMatt Ettus2010-07-091-1/+1
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* | | | | Merge branch 'reload' into u1eMatt Ettus2010-07-081-11/+32
|\| | | | | | | | | | | | | | | | | | | | | | | | * reload: error packets are now valid Extension Context packets
| * | | | error packets are now valid Extension Context packetsMatt Ettus2010-07-081-11/+32
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | error packets don't have a trailer any more streamid is now optional on data packets, set by header register trailer now has a bit to indicate successful End-of-burst hard-coded some header bits to correct values to ensure valid packets
* | | | | Merge branch 'reload' into u1eMatt Ettus2010-07-071-5/+16
|\| | | | | | | | | | | | | | | | | | | | | | | | * reload: reload bit for vita rx ctrl
| * | | | reload bit for vita rx ctrlJosh Blum2010-07-051-5/+16
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* | | | Merge branch 'master' into u1eMatt Ettus2010-07-061-4/+5
|\| | | | | | | | | | | | | | | | | | | * master: fix bug which caused serdes fifo to disappear
| * | | fix bug which caused serdes fifo to disappearMatt Ettus2010-07-031-4/+5
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* | | Merge branch 'master' into u1eMatt Ettus2010-06-181-1/+2
|\| | | | | | | | | | | | | | * master: proper dependency tracking for the makefile
| * | proper dependency tracking for the makefileMatt Ettus2010-06-181-1/+2
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* | added ability to clear out fifos of tx and rx.Matt Ettus2010-06-173-28/+37
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* | Merge branch 'master' into u1e_newbuildMatt Ettus2010-06-1442-715/+672
|\| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Made so Makefile changes as well to get it to build * master: new make works on ise12 produces good bin files first attempt at cleaning up the build system get rid of debug stuff to help timing move u2_core into u2_rev3 directory to simplify directory structure and save headaches Conflicts: usrp2/fifo/fifo36_to_fifo18.v usrp2/top/u2_rev3/Makefile usrp2/top/u2_rev3/Makefile.udp usrp2/top/u2_rev3/u2_core_udp.v
| * new make works on ise12Matt Ettus2010-06-141-1/+7
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| * produces good bin filesMatt Ettus2010-06-114-57/+31
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| * first attempt at cleaning up the build systemMatt Ettus2010-06-1038-422/+583
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| * get rid of debug stuff to help timingMatt Ettus2010-06-081-7/+16
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| * move u2_core into u2_rev3 directory to simplify directory structure and save ↵Matt Ettus2010-06-085-46/+2
| | | | | | | | headaches
* | debug pinsMatt Ettus2010-06-101-3/+6
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* | much bigger fifosMatt Ettus2010-06-101-2/+2
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* | left something out of the sensitivity list.Matt Ettus2010-06-101-1/+1
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* | proper overrun, underrun connections, debug pins.Matt Ettus2010-06-101-4/+8
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* | ignoresMatt Ettus2010-06-081-0/+1
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* | debug pinsMatt Ettus2010-06-083-4/+10
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* | Merge branch 'master' into u1eMatt Ettus2010-06-083-15/+17
|\| | | | | | | | | | | | | | | * master: allow other clock rates in vita time report ise version in build proper name for directory name build directory with ISE version name
| * allow other clock rates in vita timeMatt Ettus2010-06-081-13/+15
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| * report ise version in buildMatt Ettus2010-06-071-1/+1
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| * proper name for directoryMatt Ettus2010-06-071-1/+1
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| * name build directory with ISE version nameMatt Ettus2010-06-071-1/+1
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* | remove double declarationMatt Ettus2010-06-061-1/+1
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* | use fifo19 not fifo18 in makefileMatt Ettus2010-06-061-1/+1
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* | added little endian capability for gpmc to fifo and fifo to gpmc, since ARM ↵Matt Ettus2010-06-064-41/+51
| | | | | | | | is LE.
* | get rid of redundant fifo18, since we can just use fifo19 and ignore the occ bitMatt Ettus2010-06-063-44/+6
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* | Phil wants gpio #145Matt Ettus2010-06-032-4/+4
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* | use same version as usrp2-udp, so regs are same place in memory mapMatt Ettus2010-06-012-2/+2
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* | Merge branch 'ise12_exp' into u1eMatt Ettus2010-06-0110-391/+1747
|\ \ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | * ise12_exp: zero out debug pins. helps timing a little bit. non-udp uses a different address for the tx dsp core manual merge to use localparams from udp version from UDP branch, changed names because I want these separate from the non-udp versions ignore output files new files from udp branch added to main Makefile change the debug pins, which makes it more reliable. This is unnerving. experimental mods to make ram loader fully synchronous. Based on IJB's work fixes from IJB from 5/24. Basically connect unconnected wires. removes the icache and pipelines the reads
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