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* Change bit width of CORDIC constants to remove meaningless warningJohnathan Corgan2010-02-231-24/+24
* Manually assign clk_fpga to BUFG to improve timingJohnathan Corgan2010-02-231-1/+5
* Moved usrp2 fpga files into usrp2 subdir.Josh Blum2010-01-22633-0/+1556369