| Commit message (Expand) | Author | Age | Files | Lines |
|---|
| * | 32 bit compat number for E and B series | Josh Blum | 2011-10-26 | 2 | -10/+8 |
| * | u1e/u1p: removed led setting reg | Matt Ettus | 2011-10-26 | 2 | -14/+4 |
| * | u1p/u1e: partially redone atr and gpio redo | Matt Ettus | 2011-10-26 | 2 | -33/+11 |
| * | u2/u2p: use new setting_reg based gpios, gets it off of wb | Matt Ettus | 2011-10-26 | 3 | -17/+98 |
| * | u1e/u1p: remove unused UART | Matt Ettus | 2011-10-26 | 2 | -24/+0 |
| * | u2/u2p: move nearly all setting regs onto dsp_clk | Matt Ettus | 2011-10-26 | 2 | -30/+37 |
| * | u2/u2p: remove dead comments and code | Matt Ettus | 2011-10-26 | 2 | -84/+16 |
| * | dsp: make rounding a single bit work again | Matt Ettus | 2011-10-26 | 1 | -5/+13 |
| * | dsp: new rounding. more complex, but better properties | Matt Ettus | 2011-10-26 | 2 | -3/+80 |
| * | dsp_engine: don't use SD rounding in 8 bit mode, so we can have a flat noise ... | Matt Ettus | 2011-10-26 | 2 | -4/+5 |
| * | dsp_engine: trailer change to fit standard | Matt Ettus | 2011-10-26 | 1 | -2/+2 |
| * | dsp_engine fix rst -> reset, default to read address | Matt Ettus | 2011-10-26 | 2 | -3/+3 |
| * | dspengine: move the register to VITA_RX_CTRL + 9 instead of + 3 which is occu... | Matt Ettus | 2011-10-26 | 1 | -1/+1 |
| * | dspengine: insert into the rx chain | Matt Ettus | 2011-10-26 | 4 | -2/+29 |
| * | dsp_engine: new way of doing DSP operations on VITA packets. Example does 16... | Matt Ettus | 2011-10-26 | 7 | -3/+899 |
| * | dsp: ability to set rx dc offset to a fixed value | Matt Ettus | 2011-10-26 | 1 | -1/+2 |
| * | usrp2: fix typo in top level core files | Josh Blum | 2011-10-26 | 2 | -2/+2 |
| * | connect and map b100 and e100 front-panel leds | Josh Blum | 2011-10-11 | 2 | -2/+2 |
| * | E100: GPSDO serial port level conversion | Nick Foster | 2011-09-28 | 2 | -2/+9 |
| * | B100: use gpif_misc on R2 hw, invert direction of gpif_misc pins | Nick Foster | 2011-09-19 | 1 | -2/+2 |
| * | u1e,u1p: turn off debug pins, misc cleanups | Matt Ettus | 2011-09-08 | 2 | -26/+10 |
| * | u1p: proper format in ucf file | Matt Ettus | 2011-09-08 | 5 | -4/+474 |
| * | u1e: relax GPMC constraints, eases P&R | Matt Ettus | 2011-09-02 | 1 | -10/+10 |
| * | u1e: separate build for E100 and E110, just a different FPGA | Matt Ettus | 2011-09-01 | 2 | -1/+102 |
| * | e100: squashed work on bus implementation on GPMC | Josh Blum | 2011-08-29 | 22 | -984/+545 |
| * | fix warning on dat_o in atr_controller16.v | Josh Blum | 2011-08-29 | 1 | -3/+2 |
| * | fpga: minor tweaks to build system | Josh Blum | 2011-08-26 | 2 | -2/+4 |
| * | fix typo | Matt Ettus | 2011-08-26 | 1 | -21/+21 |
| * | all: tie unused ram inputs to 1 instead of zero, helps routing | Matt Ettus | 2011-08-26 | 2 | -22/+22 |
| * | b100: gpif_rst resynced to gpif_clk | Matt Ettus | 2011-08-26 | 1 | -1/+1 |
| * | dsp: slow down the time constant of the DC offset correction by a factor of 1... | Matt Ettus | 2011-08-26 | 1 | -1/+1 |
| * | usrp2: reconnect frontend calibration, timing meets | Josh Blum | 2011-08-26 | 5 | -6/+6 |
| * | e100: continuation of the atr fix to get e100 to build | Josh Blum | 2011-08-15 | 1 | -2/+2 |
| * | usrp2: bump FPGA minor number to 2 for patch release | Josh Blum | 2011-08-15 | 2 | -2/+2 |
| * | connect unused BRAM inputs to 1s to save routing logic | Josh Blum | 2011-08-15 | 1 | -1/+1 |
| * | dsp: clear cic_decim when not enabled | Matt Ettus | 2011-08-15 | 1 | -4/+4 |
| * | N2x0: print constraints summary from makefile | Josh Blum | 2011-08-15 | 1 | -0/+1 |
| * | N2x0: added a Makefile to build all N2x0 projects (make -j4) | Josh Blum | 2011-08-15 | 1 | -0/+22 |
| * | N2x0: delay ADC A inversion so A and B are latched in the same | Josh Blum | 2011-08-15 | 1 | -3/+5 |
| * | B100/E100: fix ATR RX mode pins not connected | Nick Foster | 2011-08-10 | 2 | -4/+4 |
| * | time: register time output to help fpga timing | Matt Ettus | 2011-07-28 | 1 | -2/+5 |
| * | vrt: delay the late signal to help with timing | Matt Ettus | 2011-07-28 | 1 | -5/+20 |
| * | dsp: allow tx iq balance to be removed at compile time | Matt Ettus | 2011-07-28 | 1 | -23/+38 |
| * | dsp: option to remove iq compensation at compile time | Matt Ettus | 2011-07-28 | 1 | -35/+40 |
| * | time64: reverted mimo sync changes to time64 | Josh Blum | 2011-07-28 | 1 | -3/+1 |
| * | u2/u2p: speed up time_64, and remove readbacks on simple_gemac wb regs | Matt Ettus | 2011-07-28 | 2 | -11/+13 |
| * | simple_gemac: remove old 19-bit wide wrapper | Matt Ettus | 2011-07-28 | 4 | -402/+0 |
| * | usrp2: remove old unused readback mux value | Josh Blum | 2011-07-28 | 2 | -2/+2 |
| * | usrp2: bump minor version number for changes | Josh Blum | 2011-07-28 | 2 | -2/+2 |
| * | vita_rx_ctrl: use an extra cmd bit to signal stop | Josh Blum | 2011-07-28 | 1 | -7/+7 |
